Acer Aspire 5745p 5745pg 5820t Quanta Zr7 Rev 3b SCH

LVD_IBG

AP39
AP41

LVD_IBG
LVD_VBG

R300
R305

AR@0_4
AR@0_4

LVD_VREFH
LVD_VREFL

AT43
AT42

LVD_VREFH
LVD_VREFL

SYS_PWROK

SYS_RESET#
SYS_PWROK

B17

RSV_ICH_LAN_RST#

PWROK

MEPWROK

A10

LAN_RST#

4,35 PM_DRAM_PWRGD

DRAMPWROK

C16

36 ICH_RSMRST#
SUS_PWR_ACK_R

RSMRST#

DNBSWON#

PCH_ACIN

P5
R345

*0_4 ACIN_R
PM_BATLOW#

PM_RI#

CLKRUN# / GPIO32

PWRBTN#

ACPRESENT / GPIO31

BATLOW# / GPIO72

F14

RI#

J12

PCIE_WAKE#

23 INT_TXLOUT0+
23 INT_TXLOUT1+
23 INT_TXLOUT2+

SUS_STAT#

T49

SLP_S5#_R

T59

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SUSC# 36

SLP_S3#

P12

SUSB#

SLP_M#
TP23
PMSYNCH
SLP_LAN# / GPIO29

ICH_SUSCLK

INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+

BB48
BA50
AY49
AV48

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED

LVDSB_CLK#
LVDSB_CLK

AY53
AT49
AU52
AT53

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

AY51
AT48
AU50
AT51

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

AA52
AB53
AD53

CRT_BLUE
CRT_GREEN
CRT_RED

Y53
Y51

*0_4

DAC_IREF

T55

R317
1K/F_4

PM_SYNC 4
PM_SLP_LAN#

AP48
AP47

V51
V53

SDVO_STALLN
SDVO_STALLP

BJ48
BG48

SDVO_INTN
SDVO_INTP

BF45
BH45

AD48
AB51

CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN

SDVO_CTRLCLK
SDVO_CTRLDAT

BG44
BJ44
AU38

T109
T108

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38

INT_HDMITX2N_R
INT_HDMITX2P_R
INT_HDMITX1N_R
INT_HDMITX1P_R
INT_HDMITX0N_R
INT_HDMITX0P_R
INT_HDMICLK-_R
INT_HDMICLK+_R

SDVO_CTRLCLK 24
SDVO_CTRLDAT 24

INT_HDMI_HPD
C408
C409
C411
C410
C453
C452
C426
C425

[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4

INT_HDMITX2N
INT_HDMITX2P
INT_HDMITX1N
INT_HDMITX1P
INT_HDMITX0N
INT_HDMITX0P
INT_HDMICLKINT_HDMICLK+

24
24
24
24
24
24
24
24
24
C

DDPC_CTRLCLK
DDPC_CTRLDATA

Y49
AB49

DDPC_AUXN
DDPC_AUXP
DDPC_HPD

BE44
BD44
AV40

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

DDPD_CTRLCLK
DDPD_CTRLDATA

CRT_DDC_CLK
CRT_DDC_DATA

T51
T53

DDPB_AUXN
DDPB_AUXP
DDPB_HPD

IV@ --> iGPU only

AR@ --> ARD CPU

U50
U52

DDPD_AUXN
DDPD_AUXP
DDPD_HPD

BC46
BD46
AT38

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

36
23 INT_HSYNC
23 INT_VSYNC

BJ10
F6

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

23 INT_CRT_DDCCLK
23 INT_CRT_DDCDAT

SLP_M# R354

LVDSA_CLK#
LVDSA_CLK

36
23 INT_CRT_BLU
23 INT_CRT_GRN
23 INT_CRT_RED

BJ46
BG46

SDVO_CTRLCLK
SDVO_CTRLDATA

BB47
BA52
AY48
AV47

25,27

SDVO_TVCLKINN
SDVO_TVCLKINP

L_CTRL_CLK
L_CTRL_DATA

INT_TXLOUT0INT_TXLOUT1INT_TXLOUT2-

CLKRUN# 36

SUS_STAT# / GPIO61

SUS_PWR_DN_ACK / GPIO30

WAKE#

System Power Management

INT_TXLCLKOUT- AV53
INT_TXLCLKOUT+ AV51

23 INT_TXLOUT023 INT_TXLOUT123 INT_TXLOUT2-

10/20 Modify Unstuff

XDP_DBRST#

L_DDC_CLK
L_DDC_DATA

R307

4 XDP_DBRST#

L_BKLTCTL

L_CTRL_CLK
AB46
L_CTRL_DATA
V48

23 INT_TXLCLKOUT23 INT_TXLCLKOUT+

L_BKLTEN
L_VDD_EN

Y48

AR@10K_4
AR@10K_4

R329
R333

+3V

T48
T47

AB48
Y45

23 INT_LVDS_EDIDCLK
23 INT_LVDS_EDIDDATA

FDI_FSYNC0

INT_LVDS_BLON
INT_LVDS_DIGON

23 INT_LVDS_BLON
23 INT_LVDS_DIGON

Digital Display Interface

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

BE22
BF21
BD20
BE18

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

R567
R554
R552
R565
R548
R572
R569
R550

LVDS

4
4
4
4

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

BD24
BG22
BA20
BG20

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

FDI_TXN0_R
FDI_TXN1_R
FDI_TXN2_R
FDI_TXN3_R
FDI_TXN4_R
FDI_TXN5_R
FDI_TXN6_R
FDI_TXN7_R

CRT

4
4
4
4

BC24
BJ22
AW20
BJ20

FDI

4
4
4
4

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI

4
4
4
4

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

R place close to PCH

R596

AR@150_4

INT_CRT_BLU

R587

AR@150_4

INT_CRT_GRN

R584

AR@150_4

INT_CRT_RED

IbexPeak-M_R1P0

T58

IbexPeak-M_R1P0

System PWR_OK

AR@ --> ARD CPU

R132

AR@100K_4

INT_LVDS_BLON

R119

AR@100K_4

INT_LVDS_DIGON

CLKRUN#

R586

8.2K_4

PM_RI#

R372

10K_4

XDP_DBRST#

R352

1K_4

PM_BATLOW#

R632

8.2K_4

PCIE_WAKE#

R365

1K_4

PM_SLP_LAN#

R369

*10K_4

SUS_PWR_ACK_R

R619

10K_4

ACIN_R

R346

10K_4

ICH_RSMRST#
+3V
R160

SDVO_CTRLCLK

R161

SDVO_CTRLDAT

+3V_S5

R650

+3V_S5
C778

10K_4

RSV_ICH_LAN_RST#

R662

10K_4

SYS_PWROK

R670

10K_4

DELAY_VR_PWRGOOD need PU 2K to +3V.

PU at power side

*.1u/10V_4

+3V

1
SYS_PWROK

DELAY_VR_PWRGOOD

4
2
U45

PCH Pull-high/low

R695

4,39

Quanta Computer Inc.

PWROK_EC 36
100K_4

TC7SH08FU

PROJECT : ZR7
Size

Document Number

Date:

Monday, February 22, 2010

Rev
3B

IBEX PEAK-M 1/6

Sheet
1

RTC Circuitry

C758
15p/50V_4
+VCCRTC

2
1

+3VPCU
CR1

RTC_X1
RTC_X2

15p/50V_4

R677
1K_4

C14

R663

+VCCRTC

C753
1u/10V_4

1M_4

SRTC_RST#

D17

SM_INTRUDER#

A16

J2
*SHORT_PAD

PCH_INVRMEN

A14

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

D33
B33
C32
A32

FWH4 / LFRAME#

C34

LDRQ0#
LDRQ1# / GPIO23

A34
F34

RTCX1
RTCX2
RTCRST#
SRTCRST#
INTRUDER#
INTVRMEN

SERIRQ

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

27,36
27,36
27,36
27,36

LPC_LFRAME# 27,36
D

R327

10K_4

+3V

AB9

IRQ_SERIRQ 36

C784
1u/10V_4

RTC_RST#
SRTC_RST#

20K/F_4

R405

B13
D13

LPC

J1
*SHORT_PAD

U40A

32.768KHZ

RTC

C757

C768
1u/10V_4

BAT54C

R647
10M_4

RTC_RST#

20K/F_4

3
4

R676
VCCRTC_1

3 RTC_N01

R674

*22K/F_6

Q55

R673

*MMBT3904

A30

ACZ_SYNC

D29

SPKR

ACZ_RST#

HDA_BCLK
HDA_SYNC
SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

*68.1K/F_4
29 PCH_AZ_CODEC_SDIN0

RTC_N03

BT1

1
2

+5V_S5

ACZ_BIT_CLK

Internal weak pull-down

VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V

1
2

R678

E32

*150K/F_6

F32

RTC_CONN

IHDA

VCCRTC_2

HDA_SYNC (PCH strap pin)

HDA_SDIN2
HDA_SDIN3

ACZ_SDOUT

B29

HDA_SDO

PCH_GPIO33

H32

HDA_DOCK_EN# / GPIO33

PCH_GPIO13

J30

HDA_DOCK_RST# / GPIO13

*10K_4

29 PCH_AZ_CODEC_SYNC

R653

33_4

ACZ_SYNC

JTAG_TMS

JTAG_TDI

R659

33_4

ACZ_RST#

R658

33_4

ACZ_SDOUT

J2
J4

29 PCH_AZ_CODEC_RST#
29 PCH_AZ_CODEC_SDOUT

R654

29 PCH_AZ_CODEC_BITCLK

33_4

+3VPCU

ACZ_BIT_CLK

R575

*10K_4

C759
*27p/50V_4

10/29 Modify P/N to 2M

12/7 Modify P/N to 4M

+3V

JTAG_TDO
TRST#

SPI_CLK_R

BA2

SPI_CLK
SPI_CS0#

SPI_CS0#_R

AV3

SPI_CS1#

AY3

SPI_SI_R

AY1

SPI_SO_R

AV1

AK7
AK6
AK11
AK9

SATA_TXN0_C
SATA_TXP0_C

C483
C484

.01u/25V_4
.01u/25V_4

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

28
28
28
28

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

AH6
AH5
AH9
AH8

SATA_TXN1_C
SATA_TXP1_C

C495
C487

.01u/25V_4
.01u/25V_4

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

28
28
28
28

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

AF11
AF9
AF7
AF6

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

AH3
AH1
AF3
AF1

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

AD9
AD8
AD6
AD5

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

AD3
AD1
AB3
AB1

SATAICOMPO
SATAICOMPI

SPI_CS1#

SATALED#

SPI_MOSI

SATA0GP / GPIO21

SPI_MISO

SATA1GP / GPIO19

10/20 Modify
Note:
SATA port2/3 may not be available on all PCH sku
(HM55 support 3 port only)

AF16
SATAICOMP

AF15

+3V

R608

1
6
5
2

3.3K/F_4

CE#
SCK
SI
SO

VDD
HOLD#

WP#

VSS

W25X32QVSSIG

SPI_CLK_R

C463

37.4/F_4

+1.05V

SATA_ACT# 32
PCH_ODD_EN 28

R338

10K_4

+3V

R594

10K_4

+3V

INTVRMEN

Integrated 1.05V VRM Enable /

Disable

1 = Integrated VRM is enabled

0 = Integrated VRM is disabled

SPI_MOSI

TPM Functionality
Disable

1 = Enabled
0 = Disable

SPKR

Reboot option at power-up

0 = Default Mode (Internal weak Pull-down)

1 = No Reboot Mode with TCO Disabled

HDA_DOCK_EN Flash Descriptor

Security Override
#/GPIO33

0 = Flash Descriptor Security will be overridden

1 = Security measure defined in the Flash
Descriptor will be enabled.

GNT0#,
GNT1#

(0,0) = LPC
(1,0) = PCI

R685

330K_6

PCH_INVRMEN

+3V

R618

*1K_4

SPI_SI_R

+3V

R611

+VCCRTC

11/5 R338 and R594

Modify to 10K ohm.

*1K/F_4SPKR

R370

*1K/F_4

R382

*10K_4

12/1 Add by SPI ROM

PCH_GPIO33
+3V

U41
SPI_CS0#_R
SPI_CLK_R
SPI_SI_R
SPI_SO_R

R319

IbexPeak-M_R1P0

PCH Strap Pin Configuration Table-1

PCH SPI

JTAG_TCK

K3
C

JTAG

R652

SPI

+3V_S5

HDA Bus

SATA

1/7 Change P/N by ME.

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

+3V

8
7 R613

3.3K/F_4

Boot BIOS Strap

PCI_GNT0#

R360

*1K_4

PCI_GNT0#

R708

1K_4

PCI_GNT1#

R363

*1K_4

PCI_GNT1#

R709

1K_4

10,23 PWM_SELECT#

R364

*1K/F_4

(0,1) = Reserved NAND

(1,1) = SPI

4
C717
.1u/10V_4

GNT2#/
GPIO53

*22p_4

ESI compatible mode is for server

platforms only

GNT3#/
GPIO55

Top-Block
Swap Override

0 = Top Block Swap Mode

1 = Default Mode (Internal pull-up)

NV_ALE

IntelR Anti-Theft Technology

HDD Data Protection
(Intel AT-d) Enable

1 = Enabled
0 = Disabled (Default)

DMI Termination
Voltage

DMI termination voltage. Weak

internal pull-up. Do not pull low.

NV_CLE

GPIO8

GPIO15

ESI Strap
(Server Only)

GPIO27

Reserved

On-Die PLL Voltage

Regulator
<internal weak pull-up>

This signal has a weak internal pull up.

NOTE: This signal should not be pulled low
0 = Intel ME Crypto Transport Layer Security
(TLS) cipher suite with no confidentiality
1 = Intel ME Crypto Transport Layer Security
(TLS) cipher suite with confidentiality
0 = Disables the VccVRM.
1 = Enables the internal VccVRM to have
a clean supply for analog rails.

PCI_GNT3#

R628

NV_ALE

*1K/F_4

+1.8V

NV_CLE

R295

*1K/F_4

+1.8V

RSV_GPIO8

R380
R371

*10K/F_4

R296

CR_WAKE#

11 PCH_GPIO27

10K_4

+3V_S5

*1K_4

R341

1K_4

R324

+3V_S5

*10K_4

Quanta Computer Inc.

PROJECT : ZR7
Size

Document Number

Date:

Monday, February 22, 2010

Rev
3B

IBEX PEAK-M 2/6

Sheet
1

IV@ --> iGPU only

EV@ --> dGPU only
SW@ --> iGPU & dGPU Switch
U40B
U40E

F48
K45
F36
H53

9
PCI_GNT0#
9
PCI_GNT1#
9,23 PWM_SELECT#
9
PCI_GNT3#

PCI_SERR#
PCI_PERR#

E44
E50

PCI_IRDY#
PCI_PAR
PCI_DEVSEL#
PCI_FRAME#

A42
H44
F46
C46

PCI_PLOCK#

D49

T54

R612

22_4

R358
CLK_PCI_FB R606

22_4
22_4

27 CLK_LPC_DEBUG
T56
36

B41
K53
A36
A48

PCI_RST#

T63

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

CLK_PCI_775

PCI_STOP#
PCI_TRDY#

D41
C48

ICH_PME#

PCI_PLTRST#

CLK_LPC_DEBUG_C
CLK_PCI_PCCARD
CLK_PCI_775_C
CLK_PCI_FB_C

N52
P53
P46
P51
P48

NV_WR#0_RE#
NV_WR#1_RE#
NV_WE#_CK0
NV_WE#_CK1

PIRQA#
PIRQB#
PIRQC#
PIRQD#

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
PCIRST#
SERR#
PERR#
IRDY#
PAR
DEVSEL#
FRAME#
PLOCK#

USBRBIAS#
STOP#
TRDY#

USBRBIAS

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

BA32
BB32
BD32
BE32
BF33
BH33
BG32
BJ32

BD3
AY6

NV_ALE 9
NV_CLE 9
NV_RCOMP

R574

27
27
27
27

WLAN

*32.4/F_4

PCIE_RX6PCIE_RX6+
PCIE_TX6PCIE_TX6+

C451
C450

PCIE_TXN6_C
PCIE_TXP6_C

.1u/10V_4
.1u/10V_4

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

BA34
AW34
BC34
BD34
AT34
AU34
AU36
AV36

AV7
AY8
AY5

BG34
BJ34
BG36
BJ36

AV11
BF5
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
B25

SML0ALERT# / GPIO60
SML0CLK

PERN3
PERP3
PETN3
PETP3

USBP1USBP1+

33
33

USBP3USBP3+
USBP4USBP4+
USBP5USBP5+

33
33
33
33
27
27

AK48
AK47

MB USB

CLK_PCIE_REQ0#

T50
T48

USB/B-USB1-3
BLUETOOTH

AM43
AM45

EHCI1
CLK_PCIE_REQ1#_R

USB_BIAS

R651

23
23
33
33
27
27
33
33
31
31
27
27

Reserve Touch Screen

USB port6/7 may not be available on all PCH sku

(HM55 support 12port only)
USBP8USBP8+
USBP9USBP9+
USBP10USBP10+
USBP11USBP11+
USBP12USBP12+
USBP13USBP13+

AM47
AM48

27 CLK_PCH_SRC2#
27 CLK_PCH_SRC2
R616

27 PCIE_CLK_REQ2#

Camera

*SHORT_4

CLK_PCIE_REQ2#_R

USB/B-USB1-2
Touch Screen
USB/B-USB1-1

N4
AH42
AH41

CLK_PCIE_REQ3#

EHCI2

Card Reader

AM51
AM53

Mini Card (WLAN)

CLK_PCIE_REQ4#

USB_OC6#
USB_OC7#

SML1ALERT# / GPIO74
SML1CLK / GPIO58
SML1DATA / GPIO75

PERN5
PERP5
PETN5
PETP5
PERN6
PERP6
PETN6
PETP6

CL_CLK1
CL_DATA1
CL_RST1#

PEG_A_CLKRQ# / GPIO47
PERN7
PERP7
PETN7
PETP7

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

PERN8
PERP8
PETN8
PETP8
CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCIECLKRQ1# / GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P

RSV_SMBALERT#

H14

ICH_SMBCLK

ICH_SMBDATA

J14

RSV_SML0ALERT#

SMB_CLK_ME0

SMB_DATA_ME0

ICH_SMBCLK

ICH_SMBDATA

SMB_CLK_ME0 25
SMB_DATA_ME0 25

M14

RSV_SML1ALERT#

E10

SMB_CLK_ME1

G12

SMB_DATA_ME1

T13

CL_CLK1

T11

CL_DATA1

CL_RST1#

PEG_CLKREQ#_R

R336

*0_4

SML1ALERT# 11,34,36

CL_CLK1 27

SW@ --> iGPU & dGPU Switch

CL_DATA1 27
CL_RST1# 27

R620

AD43
AD45

SW@0_4

PEG_CLKREQ#

AN4
AN2

CLK_PCIE_3GPLL# 4
CLK_PCIE_3GPLL 4

AT1
CLKOUT_DP_N / CLKOUT_BCLK1_N
AT3
CLKOUT_DP_P / CLKOUT_BCLK1_P

DPLL_REF_SSCLK# 4
DPLL_REF_SSCLK 4

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P

PCIECLKRQ2# / GPIO20
CLKOUT_PCIE3N
CLKOUT_PCIE3P

REFCLK14IN

USB_OC0# 33
USB_OC1# 33
T51
T53

H6
AK53
AK51

25 CLK_PCIE_LOM#
25 CLK_PCIE_LOM
USB_OC4_5#

CLK_PCIE_VGA# 16
CLK_PCIE_VGA 16

AW24
BA24

CLK_BUF_PCIE_3GPLL# 3
CLK_BUF_PCIE_3GPLL 3

AP3
AP1

CLK_BUF_BCLK# 3
CLK_BUF_BCLK 3

F18
E18

CLK_BUF_DREFCLK# 3
CLK_BUF_DREFCLK 3

AH13
AH12

CLK_BUF_DREFSSCLK# 3
CLK_BUF_DREFSSCLK 3

P41

CLK_ICH_14M

11/27 Modify
C699,C703 to 27pF
R699

EV@0_4

3
AR@27p/50V_4

PCIECLKRQ3# / GPIO25

CLKIN_PCILOOPBACK

J42

CLK_PCI_FB

AH51
AH53

XTAL25_IN
XTAL25_OUT

AF38

XCLK_RCOMP R312

T45

BOARD_ID1

P43

BOARD_ID2

T42

BOARD_ID3

C699

CLKOUT_PCIE4N
CLKOUT_PCIE4P

XTAL25_IN
XTAL25_OUT

PCIECLKRQ4# / GPIO26

XCLK_RCOMP

R581

R591

25 CLK_PCIE_LAN_REQ#

*SHORT_4

T62
T61

PCIE_CLK_REQB#

P13

CLKOUT_PCIE5N
CLKOUT_PCIE5P

CLKOUTFLEX0 / GPIO64

PCIECLKRQ5# / GPIO44
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P

CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66

PEG_B_CLKRQ# / GPIO56

CLKOUTFLEX3 / GPIO67

IbexPeak-M_R1P0

Y4
AR@25MHz

AR@1M_4
90.9/F_4

22.6/F_4

AJ50
AJ52
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4_5#

SML0DATA

PERN4
PERP4
PETN4
PETP4

Port1 and port9 can be used on debug mode

T57
T52

D25
N16
J16
F16
L16
E14
G16
F12
T15

SMBDATA
PERN2
PERP2
PETN2
PETP2

SMBus

AU30
AT30
AU32
AV32

SMBCLK

Link

11/18 Delete R597, C444,C445 for cancel 3G function.

SMBALERT# / GPIO11

PCI-E*

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

AU2

AW30
BA30
BC30
BD30

CLK_PCIE_REQ5#

PME#
PLTRST#

AV9
BG8

PERN1
PERP1
PETN1
PETP1

Controller

NVRAM

NV_RB#

PCIE_TXN1_C
PCIE_TXP1_C

.1u/10V_4
.1u/10V_4

F51
A46
B45
M53

NV_RCOMP

C679
C680

BG30
BJ30
BF29
BH29

PEG

PCI_REQ0#
PCI_REQ1#
dGPU_SELECT#
PCI_REQ3#

NV_ALE
NV_CLE

GLAN

PCIE_RX1PCIE_RX1+
PCIE_TX1PCIE_TX1+

AR@27p/50V_4

C703

+1.05V

11/5 Add R699 connect

XTAL25_IN to Gnd.

11/18 Modify

N50

dGPU_EDIDSEL#
R349

23 dGPU_SELECT#

G38
H51
B37
A44

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

25
25
25
25

From CLK BUFFER

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

NV_DQS0
NV_DQS1

AY9
BD1
AP15
BD8

Clock Flex

J50
G42
H47
G34

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

USB

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PCI

H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36

10K_4

23,24

+3V

IbexPeak-M_R1P0

+3V_S5

+3V
CLK_PCIE_REQ0#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
PCIE_CLK_REQB#

*10K_4

BOARD_ID1

R355

10K_4

R373

*10K_4

BOARD_ID2

R359

10K_4

R347

*10K_4

BOARD_ID3

R342

10K_4

R387

+3V_S5
RP1
USB_OC7#
USB_OC6#
USB_OC4_5#
+3V_S5

+3V_S5

6
7
8
9
10

5
4
3
2
1

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#

R390

10K_4

dGPU_SELECT#

R593

10K_4

CLK_PCIE_REQ1#_R

R376
R348
R669
R665

8.2K_4
8.2K_4
8.2K_4
10K_4

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCIE_CLK_REQ2#

.1u/10V_4

RP4

PCI_PLTRST#

2
4
1

+3V

PLTRST# 4,11,16,25,27,31,36

PCI_PIRQD#
PCI_REQ1#
PCI_FRAME#
PCI_TRDY#

U25
TC7SH08FU

6
7
8
9
10

R389

5
4
3
2
1

PCI_REQ3#
PCI_PIRQB#
PCI_REQ0#
PCI_PIRQH#

8.2K_10P8R

IV@ --> iGPU only

2.2K_4
SMB_CLK_ME1

3
Q26
*2N7002D
R700

+3V_S5

0_4

11/25 Modify.
R649
R385
R340
R404
R403
R627
R622

C524
+3V

36 2ND_MBCLK

11/18 Modify

+3V

8.2K_10P8R

+3V_S5

+3V

Main Board ID
R374

10K_4
10K_4
10K_4
10K_4
10K_4

10K_4
10K_4
10K_4
2.2K_4
2.2K_4
2.2K_4
2.2K_4

RSV_SMBALERT#
RSV_SML0ALERT#
RSV_SML1ALERT#
ICH_SMBCLK
ICH_SMBDATA
SMB_CLK_ME0
SMB_DATA_ME0

+3V

R381

36 2ND_MBDATA

EV@ --> dGPU only

+3V_S5

2.2K_4

R353
R634
R357
R362
R600

3
Q29
*2N7002D

SMB_DATA_ME1

100K_4
+3V
RP5
R388

PCI_PIRQC#
PCI_PIRQA#
PCI_STOP#
PCI_IRDY#

*0_4

+3V

6
7
8
9
10

5
4
3
2
1

R701
+3V_S5

PCI_PERR#
PCI_PLOCK#
PCI_DEVSEL#
PCI_SERR#

0_4

11/25 Modify.
R624

IV@10K_4

PEG_CLKREQ#_R

R625

EV@10K/F_4

Quanta Computer Inc.

8.2K_10P8R

PROJECT : ZR7
Size

Document Number

Rev
3B

IBEX PEAK-M 3/6

Date:
5

Monday, February 22, 2010

Sheet

1
16

SIO_EXT_SMI#

C38

36 SIO_EXT_SCI#

SIO_EXT_SCI#

D37

TACH2 / GPIO6

BOARD_ID0

J32

TACH3 / GPIO7

RSV_GPIO8

F10

GPIO8

CR_WAKE#

dGPU_HOLD_RST#

AA2

dGPU_PWROK

F38

H10

T60
9

PCH_GPIO27

PCH_GPIO27
TP_PCH_GPIO28

dGPU_PWR_EN# should be stable

before dGPU_VRON enable

STP_PCI#

45 dGPU_PWR_EN

10/19

MISC

PECI
RCIN#

AM1

CLK_CPU_BCLK 4

BG10

H_PECI 4

SIO_RCIN#

PROCPWRGD

BE10

THRMTRIP#

BD10

STP_PCI# / GPIO34

TP1

BA22

TP2

AW22

SLOAD / GPIO38

TP3

BB22

SDATAOUT0 / GPIO39

TP4

PCIECLKRQ6# / GPIO45

TP5

AY46

PCIECLKRQ7# / GPIO46

TP6

AV43

SDATAOUT1 / GPIO48

TP7

P3
H3

SV_SET_UP

AB6

SATA5GP

AA4
F8

SATA5GP / GPIO49 / TEMP_ALERT# is used to

alert for EC when CPU or Graph/Memory
controllers' temperature go out of limit.
So connecting GPIO49 to EC and avoid this
pin to be used for other purpose

A4
A49
A5
A50
A52
A53
B2
B4
B52
B53
BE1
BE53
BF1
BF53
BH1
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53

H_PWRGOOD 4
PCH_THRMTRIP#_R

+1.1V_VTT

SATA3GP / GPIO37

GPIO57

R286
R294

56/F_4

PM_THRMTRIP# 4

10/19

TP9

M18

TP10

N18

TP11

AJ24

TP14

M30

TP17

N30

*10K_4

LAN_DISABLE#

R356

10K_4

SIO_EXT_SMI#

R401

10K_4

SIO_EXT_SCI#

R660

10K_4

+3V

R326

EV@10K_4

VTT Rail Values are

Arrandale VTT=1.05V
Clarksfield VTT=1.1V

SIO_RCIN#

R605

10K_4

SIO_A20GATE

R604

10K_4

dGPU_HOLD_RST#

R321

10K_4

SATA5GP

R325

10K_4

GPIO22

R337

10K_4

SAVE_LED#

R610

10K_4

STP_PCI#

R351

10K_4

GPIO38

R585

10K_4

BMBUSY#

R328

8.2K_4

SV_SET_UP

R332

10K_4

11/26 Modify.

dGPU_PWROK

R442

IV@10K_4

11/19 Modify.

BOARD_ID0

R667

10K_4

R439

*10K_4

11/19 Modify.

SV_SET_UP

1-X High = Strong (Default)

GPIO57 stuff PD and not stuff PU for Intel suggestion at 6/1

AA23

NC_1

AB45

NC_2

AB38

GPIO57

+3V

R320

R379

10K_4

IV@10K_4 dGPU_PRSNT#

R316

ES@10K_4

AB42

dGPU always exist --> PD 10K

NC_4

AB41

NC_5

T39
P6

IV@ --> iGPU only

TP_INT3_3V

T47

ES@ --> External VGA SKU

Integrated Clock Chip Enable

C10

High = Disable

IbexPeak-M_R1P0

R386

H12

TP19

TP24

10K_4

GPIO57

M32

TP16

INIT3_3V#

R402

AK42

TP15

NC_3

10K_4

RST_GATE#

AK41

N32

TP18

10K_4

R626

dGPU_PWR_EN

AF13

GPIO57

TP13

R602

GPIO45

56/F_4

AV45

TP8

TP12

TP_PCH_GPIO28

AY45

SATA5GP / GPIO49

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31

+3V_S5

EV@ --> dGPU only

SATACLKREQ# / GPIO35
SATA2GP / GPIO36

1/7 Modify.

SCLOCK / GPIO22

GPIO28

EC suggestion use GPIO49 for FAN control

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

CLK_CPU_BCLK# 4

AB7

RST_GATE#

*SHORT_4

TACH0 / GPIO17

GPIO27

SIO_A20GATE 36

AM3

AB13

GPIO45

R331

dGPU_PRSNT#

SAVE_LED#

R470
SW@100K_4

GPIO Pull-up/Pull-down

AF48
AF47

dGPU_PWR_EN

GPIO38

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

V13

A20GATE

SATA4GP / GPIO16

AB12

M11

CLKOUT_PCIE7N
CLKOUT_PCIE7P

GPIO15

GPIO24

43,47 dGPU_VRON

LAN_PHY_PWR_CTRL / GPIO12

CPU

LAN_DISABLE#

GPIO22

AH45
AH46

U35
SW@TC7SH08FU

TACH1 / GPIO1

RSVD

CR_WAKE#

CLKOUT_PCIE6N
CLKOUT_PCIE6P

NCTF

RSV_GPIO8

18,36 dGPU_PWROK

10,34,36 SML1ALERT#

BMBUSY# / GPIO0

36 SIO_EXT_SMI#

11/27 Del R440

GPIO

BMBUSY#

dGPU_HOLD_RST#

SW@ -->
iGPU & dGPU
Switch

PLTRST# 4,10,16,25,27,31,36

GPU_RST#

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

C596

U40F

11/18 Modify

+3V

GPU RST#

IV@ --> iGPU only

EV@ --> dGPU only
SW@ --> iGPU & dGPU Switch
ES@ --> External VGA SKU

RSV_GPIO8

Low = Enable

Quanta Computer Inc.

PROJECT : ZR7
Size

Document Number

Date:

Monday, February 22, 2010

Rev
3B

IBEX PEAK-M 4/6

Sheet
1

1u/6.3V_4

VCCCORE(+1.05V) = 1.432A(80mils)
D

+1.05V

R287

+1.05V

L23

AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]

*SHORT_6 +1.05V_PCH_VCCDPLL_EXP AK24

*1uh_6

+V1.1LAN_VCCAPLL_EXP

VCCADAC[1]

VCCALVDS
VSSA_LVDS

AN30
AN31

+3V

R306

*SHORT_6 +3V_VCCA3GBG

+V1.5S_1.8S

R308

*SHORT_6 +VCCAFDI_VRM

AB34

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO[1]

C447
*10u/6.3V_6

VCC3_3[3]
VCC3_3[4]

U40J

R313
EV@0_4

*10uh_8
+V1.1LAN_VCCA_CLK
*10u/6.3V_6
*1u/6.3V_4

+1.05V

C692
C694

+3V

AR@0_4

C490
[email protected]/10V_4

R318

+1.05V

+1.05V_VCCAUX

*0_6

AP51

VCCACLK[1]

AP53

VCCACLK[2]

AF23

VCCLAN = 320mA(30mils)
AF24

VCCTX_LVDS
C481

TP_PCH_VCCDSW

C482

[email protected]/25V_4

AR@22u/6.3V_8

C506
.1u/10V_4

R304
EV@0_4

VCC3_3 = 357mA(30mils)
+3V_VCC_GIO

R339

*SHORT_6

Y20
AD38
AD39

10/20 Change to 0.1uF

AB35
AD35

R698
0_4

+1.8V

L26
[email protected]_8
C480

AD41
AF43

VCCME(+1.05V) = 1.849A(100mils)

+3V

C500

+1.05V

.1u/10V_4

AT24

VCCDMI[1]

AT16

VCCDMI[2]

AU16

+VCCVRM

R310

+VCCDMI

R303

R323

*SHORT_8 +1.05V_VCCEPW

R334

*SHORT_8

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

*SHORT_6
*SHORT_4

+V1.5S_1.8S

VCCDMI= 61mA(15mils)

+1.1V_VTT

VTT Rail Values are

Arrandale VTT=1.05V
Clarksfield VTT=1.1V

C475
1u/10V_4

VCCPNAND

R291

*SHORT_8 +1.8V

68mA(15mils)

VCCME[8]

Y39

1U/6.3V_4

Y41

C505

1U/6.3V_4

Y42

AU24

+V1.1LAN_VCCA_B_DPL

69mA(15mils)

VCCME3_3= 85mA(15mils)
AM8
AM9
AP11
AP9

BB51
BB53

+3V_VCCME_SPI R309

*SHORT_6

BD51
BD53
AH23
AJ35
AH35

VCCIO = 3.062A(150mils)

VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

C492
.1u/10V_4

C491
C488
C489

+3V

1U/6.3V_4
1U/6.3V_4
1U/6.3V_4

C486

VCCME[4]

VCCME[7]

22U/6.3V_8

+V1.1LAN_VCCA_A_DPL

VCCME[3]

VCCME[6]

C504

+V1.5S_1.8S

VCCPNAND= 156mA(15mils)

VCCME[2]

V41

C508

+VCCRTCEXT
.1u/10V_4

VCCME[1]

V39

V42

C509

DCPSUSBYP

AF42

22U/6.3V_8

VCCME[9]
VCCME[10]
VCCME[11]
VCCME[12]

DCPRTC

VCCVRM[3]
VCCADPLLA[1]
VCCADPLLA[2]
VCCADPLLB[1]
VCCADPLLB[2]
VCCIO[21]
VCCIO[22]
VCCIO[23]

AF34

VCCIO[2]

AH34

VCCIO[3]

AF32

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]
VCCSUS3_3[28]

C510

DCPSST

+V1.1LAN_INT_VCCSUS
.1u/10V_4

Y22

C501

DCPSUS

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

+1.05V
C507

1U/6.3V_4
+3V_S5_VCCPUSB

C513
C514
C518

F24

R343

*SHORT_6

+1.05V

V5REF_SUS< 1mA
R664

100/F_4

+5V_S5

D18

RB500V-40

+3V_S5

C762

.1u/10V_4

10/20 Change to 0.1uF

V5REF< 1mA
D10

100/F_4

+5V

RB500V-40

+3V

V5REF_SUS
C516

K49

V5REF

VCC3_3[8]

+3V_VCCPPCI

VCC3_3[9]

L38

VCC3_3[10]

M36

R361

1U/6.3V_4

*SHORT_6

+3V

VCC3_3 = 0.357A(30mils)
C517

.1u/10V_4

C515

.1u/10V_4

N36

VCC3_3[12]

P36

VCC3_3[13]

U35

31mA(15mils)

AD13
+V1.1LAN_VCCAPLL

VCCSATAPLL[1]
VCCSATAPLL[2]

+3V_S5

VCCSUS3_3 = 0.163A(20mils)

J38

VCC3_3[11]

*SHORT_8

R366

V5REF_SUS

V5REF

R384

.1u/10V_4
.1u/10V_4
0.022U/16V_4

U23
V23

VCCIO[4]

V12

V24
V26
Y24
Y26

VCCIO[56]

VCC3_3[14]

+VCCSST
.1u/10V_4

.1u/10V_4

VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

VCCLAN[2]

VCCME[5]

VCCIO = 3.208A(150mils)

POWER

VCCLAN[1]

AF41

C502

+1.05V

FDI

+1.05V_VCCDPLL_FDI

VCCACLK= 52mA(15mils)
L35

[email protected]/25V_4

DMI

VCC3_3[1]

AT22

+V1.1LAN_VCCAPLL_FDI

.1u/10V_4

VCCVRM= 196mA(15mils)

37mA(15mils)
*1uH_6

10u/6.3V_6

VCCTX_LVDS= 59mA(15mils)

VCC3_3[2]

VCCVRM[2]

VCCIO[54]
VCCIO[55]

AN35

.01u/25V_4

+3V

AH39
AP43
AP45
AT46
AT45

HVCMOS

VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]

C714

AH38

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

PCI E*

10U/6.3V_8
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4

AF51

C711

R322

NAND / SPI

C479
C457
C470
C493
C464

VSSA_DAC[2]

VCCAPLLEXP

AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27

VCCIO = 3.062A(150mils)

VSSA_DAC[1]

C713

VCCALVDS

C448 *10u/6.3V_6

+1.05V

AE52
AF53

VCCALVDS= 1mA

VCCIO[24]

BJ24

AE50

VCCADAC[2]

USB

C496

10u/6.3V_8

L22

AR@ --> ARD CPU

CF@ --> CFD CPU

Clock and Miscellaneous

AR@ --> ARD CPU

CF@ --> CFD CPU

+1.05V

PBY160808T/2A/180ohm_6
L39

+VCCA_DAC_1_2

PCI/GPIO/LPC

*SHORT_8

CRT

R314

LVDS

*SHORT_8 +1.05V_VCCCORE_ICH
C498

40mA(15mils)

POWER

U40G

R315

VCC CORE

+1.05V

VCCADAC= 69mA(15mils)

IBEX PEAK-M (POWER)

AK3
AK1

C705
*1u/6.3V_4

L37

*10uh_8

+1.05V

C704
*10u/6.3V_6

IbexPeak-M_R1P0

VCCIO = 3.062A(150mils)
VCCIO[9]

*SHORT_6

AH22

+V1.1LAN_VCC_SATA

R335

*SHORT_1206+1.05V

VCCVRM=196mA(15mils)
R289

HDA_SYNC (PCH strap pin)

*SHORT_6

+V1.5S_1.8S

C456
.1u/10V_4

C455
.1u/10V_4

+3V_S5

Internal weak pull-down

VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V

*SHORT_6 +3V_S5_VCCPSUS

VCCSUS3_3[29]

U19

VCCSUS3_3[30]

U20
U22
C511

.1u/10V_4

+3V

R330

*SHORT_6 +3V_VCCPCORE

V15
V16
Y16

V_CPU_IO >1mA(15mils)
L33

10uh_8

C503

.1u/10V_4

VCC3_3[5]
VCC3_3[6]

C691
1u/10V_4

220u_3528

R571
*0_8

VTT Rail Values are

Arrandale VTT=1.05V
Clarksfield VTT=1.1V

+1.1V_VTT

R299

*SHORT_6 +VTT_VCCPCPU
C471
C473
C474

4.7U/6.3V_6
.1u/10V_4
.1u/10V_4

AT18

VCC3_3[7]

AU18

V_CPU_IO[1]
V_CPU_IO[2]

VCCVRM[4]

AT20

VCCIO[10]

AH19

VCCIO[11]

AD20

VCCIO[12]

+V1.1LAN_VCCA_A_DPL
+

C685

L34

VCCSUS3_3[32]

VCC3_3 = 0.357A(30mils)

VRM enable by strap pin GPIO27

which supply clean 1.05V for
[VCCACLK,VCCAPLLEXP,VCCFDIPLL,VCCSATAPLL]

+1.05V

VCCSUS3_3[31]

C497
1u/10V_4

+V1.5S_1.8S

AF22

VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]

AD19
AF20
AF19
AH20

VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]

AB19
AB20
AB22
AD22

VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]

VCCME = 1.849A(100mils)
AA34
Y34
Y35
AA35

+1.05V_VCCEPW
R344

*0_4

+1.5V_SUS

+V1.1LAN_VCCA_B_DPL

10uh_8
+

C671

VCCRTC= 2mA(15mils)

C674
1u/10V_4

220u_3528

A12

+VCCRTC
C754
C743

.1u/10V_4
.1u/10V_4

VCCRTC
IbexPeak-M_R1P0

HDA

+1.8V

R378

P18

SATA

VCCSUS3_3 = 163mA(20mils)

PCI/GPIO/LPC

R311

CPU

+1.05V

RTC

VCCSUSHDA

L30

+V3.3A_1.5A_HDA_IO

R350

*SHORT_4

+3V_S5

VCCSUSHDA= 6mA(15mils)
C519
1u/10V_4

10/22 Stuff

Quanta Computer Inc.

PROJECT : ZR7
Size

Document Number

Rev
3B

IBEX PEAK-M 5/6

Date:
5

Monday, February 22, 2010

Sheet

U40I
AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42

IBEX PEAK-M (GND)

U40H

AB16

VSS[0]

AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28

VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

IbexPeak-M_R1P0

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

Quanta Computer Inc.

PROJECT : ZR7

IbexPeak-M_R1P0

Size

Document Number

Date:

Monday, February 22, 2010

Rev
3B

IBEX PEAK-M 6/6

Sheet
1

+1.5V_SUS
M_A_DQ[63:0] 5

M_A_A[15:0]

5
5
5
5
5
5
5
5
5
5
5
5
5
5
10K_4
10K_4

R284
R283

M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CS#0
M_A_CS#1
M_A_CLK0
M_A_CLK0#
M_A_CLK1
M_A_CLK1#
M_A_CKE0
M_A_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#

3,15,27 CLK_SCLK
3,15,27 CLK_SDATA
5
M_A_ODT0
5
M_A_ODT1
5 M_A_DM[7:0]

5 M_A_DQS[7:0]

5 M_A_DQS#[7:0]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

DIMM0_SA0
DIMM0_SA1
CLK_SCLK
CLK_SDATA

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

116
120

ODT0
ODT1

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

PC2100 DDR3 SDRAM SO-DIMM

(204P)

JDIM4A
5

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

2.48A

+3V

4 PM_EXTTS#0
15,35 DDR3_DRAMRST#

+SMDDR_VREF
7,35 VREF_DQ_DIMM0

+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM

R116

M1@0_6

R124

*M3@0_6

35 +SMDDR_VREF_DQ0

+1.5V_SUS

+SMDDR_VREF_DIMM

JDIM4B

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199

VDDSPD

77
122
125

NC1
NC2
NCTEST

198
30

EVENT#
RESET#

1
126

VREF_DQ
VREF_CA

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

R193
*10K_4

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

PC2100 DDR3 SDRAM SO-DIMM

(204P)

DIMM A0

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

VTT1
VTT2

203
204

GND
GND

205
206

Place these Caps near So-Dimm0.

+1.5V_SUS

C365

C276
10u/6.3V_6

C280
10u/6.3V_6

C320
10u/6.3V_6

R186

C367

.1u/10V_4

C294
.1u/10V_4

2.2u/6.3V_6

+SMDDR_VREF_DQ0
C256
10u/6.3V_6

C261
10u/6.3V_6

C319
10u/6.3V_6

C254
.1u/10V_4

C301
.1u/10V_4

C312
.1u/10V_4
C202

C201

.1u/10V_4
+3V

2.2u/6.3V_6

+0.75V_DDR_VTT

C398

C407

C435

C436

C418

C437

C421

C419

C420

2.2u/6.3V_6

.1u/10V_4

1U/6.3V_4

10u/6.3V_6

maybe can save

+0.75V_DDR_VTT

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

*SHORT_6 +SMDDR_VREF_DIMM
R194
*10K_4

C302
.1u/10V_4

+ C267
330u/2V_7343

DDR3-DIMM0_H=8.0_Standard
+SMDDR_VREF

+SMDDR_VREF_DIMM

C366
470p/X7R_4

R130
R141
R147
R148
R205
R221
R245
R248

*CF@0_4
*CF@0_4
*CF@0_4
*CF@0_4
*CF@0_4
*CF@0_4
*CF@0_4
*CF@0_4

Close to SO-DIMM

DDR3-DIMM0_H=8.0_Standard

+1.5V_SUS
M_A_DQ[63:0] 5

M_A_A[15:0]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

5
5
5
7
7
7
7
7
7
7
7

R282
R281

+3V

M_A_BS#0
M_A_BS#1
M_A_BS#2

M_A_CS#2
M_A_CS#3
M_A_CLK2
M_A_CLK2#
M_A_CLK3
M_A_CLK3#
M_A_CKE2
M_A_CKE3
5
M_A_CAS#
5
M_A_RAS#
5
M_A_WE#
4D@10K_4
4D@10K_4
3,15,27 CLK_SCLK
3,15,27 CLK_SDATA

7
7

DIMM0_SA2
DIMM0_SA3
CLK_SCLK
CLK_SDATA

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
116
120

M_A_ODT2
M_A_ODT3
5 M_A_DM[7:0]

5 M_A_DQS[7:0]

5 M_A_DQS#[7:0]

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

11
28
46
63
136
153
170
187

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

PC2100 DDR3 SDRAM SO-DIMM

(204P)

JDIM3A
5

2.48A

JDIM3B

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
199

+3V

4 PM_EXTTS#0
15,35 DDR3_DRAMRST#
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDDSPD

77
122
125

NC1
NC2
NCTEST

198
30

EVENT#
RESET#

1
126

VREF_DQ
VREF_CA

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

PC2100 DDR3 SDRAM SO-DIMM

(204P)

DIMM A1 4D@ --> 4 SO-DIMM

VTT1
VTT2
GND
GND

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

Place these Caps near So-Dimm0.

+SMDDR_VREF_DIMM
+1.5V_SUS

C259
C278
4D@10u/6.3V_6
[email protected]/10V_4
C334
C260
C298
4D@10u/6.3V_6
4D@10u/6.3V_6
[email protected]/10V_4

C363

C364

+ C266
4D@330u/2V_7343
C270
4D@10u/6.3V_6

C335
C285
4D@10u/6.3V_6
[email protected]/10V_4
C269
C277
C313
4D@10u/6.3V_6
[email protected]/10V_4
[email protected]/10V_4

+SMDDR_VREF_DQ0

C212

C213

+3V

+0.75V_DDR_VTT
C429
4D@1U/6.3V_4
C405
[email protected]/6.3V_6

C430
4D@1U/6.3V_4

C413
4D@10u/6.3V_6
C412
4D@10u/6.3V_6

C416
[email protected]/10V_4
C428
4D@1U/6.3V_4

C415
4D@1U/6.3V_4

C414
4D@10u/6.3V_6
maybe can save

+0.75V_DDR_VTT

205
206

4D@DDR3-DIMM0_H=4.0_Standard
A

Quanta Computer Inc.

PROJECT : ZR7

4D@DDR3-DIMM0_H=4.0_Standard

Size

Document Number

Date:

Monday, February 22, 2010

Rev
3B

DDRIII SO-DIMM-A0/A1
5

Sheet
1

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

+3V

R262
R280

5
5
5
5
5
5
5
5
5
5
5
5
5
5
10K_4
10K_4

M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CS#0
M_B_CS#1
M_B_CLK0
M_B_CLK0#
M_B_CLK1
M_B_CLK1#
M_B_CKE0
M_B_CKE1
M_B_CAS#
M_B_RAS#
M_B_WE#

DIMM1_SA0
DIMM1_SA1

3,14,27 CLK_SCLK
3,14,27 CLK_SDATA
5
M_B_ODT0
5
M_B_ODT1
5 M_B_DM[7:0]

5 M_B_DQS[7:0]

5 M_B_DQS#[7:0]

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

116
120

ODT0
ODT1

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

PC2100 DDR3 SDRAM SO-DIMM

(204P)

M_B_A[15:0]

+1.5V_SUS

M_B_DQ[63:0] 5

JDIM2A
5

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

2.48A

+3V

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199

VDDSPD

77
122
125
4 PM_EXTTS#1
14,35 DDR3_DRAMRST#
+SMDDR_VREF
7,35 VREF_DQ_DIMM1

R113
R120

M1@0_6

+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM

NC1
NC2
NCTEST

198
30

EVENT#
RESET#

1
126

VREF_DQ
VREF_CA

*M3@0_6

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

35 +SMDDR_VREF_DQ1

JDIM2B

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

PC2100 DDR3 SDRAM SO-DIMM

(204P)

DIMM B0

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

VTT1
VTT2

203
204

GND
GND

205
206

+1.5V_SUS

Place these Caps near So-Dimm1.

+SMDDR_VREF_DIMM

C265
10u/6.3V_6

C361
10u/6.3V_6

C307
10u/6.3V_6

C255
.1u/10V_4

C343
.1u/10V_4
+ C329
330u/2V_7343

C369

C371

.1u/10V_4
C356
10u/6.3V_6

C354
10u/6.3V_6

C299
10u/6.3V_6

C305
.1u/10V_4

C342
.1u/10V_4

2.2u/6.3V_6

C345
.1u/10V_4

+SMDDR_VREF_DQ1

C207

C206

.1u/10V_4
+3V

2.2u/6.3V_6

+0.75V_DDR_VTT

C401

C399

C403

C432

C423

C402

C397

C434

C404

2.2u/6.3V_6

.1u/10V_4

1U/6.3V_4

10u/6.3V_6

maybe can save

+0.75V_DDR_VTT

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

DDR3-DIMM1_H=4.0_Reverse

R131
R136
R145
R149
R204
R216
R237
R257

*CF@0_4
*CF@0_4
*CF@0_4
*CF@0_4
*CF@0_4
*CF@0_4
*CF@0_4
*CF@0_4

Close to SO-DIMM

DDR3-DIMM1_H=4.0_Reverse

4D@ --> 4 SO-DIMM

5
5
5
7
7
7
7
7
7
7
7

R290
R285

+3V

M_B_BS#0
M_B_BS#1
M_B_BS#2

M_B_CS#2
M_B_CS#3
M_B_CLK2
M_B_CLK2#
M_B_CLK3
M_B_CLK3#
M_B_CKE2
M_B_CKE3
5
M_B_CAS#
5
M_B_RAS#
5
M_B_WE#
4D@10K_4
4D@10K_4

DIMM1_SA2
DIMM1_SA3

3,14,27 CLK_SCLK
3,14,27 CLK_SDATA
7
7

M_B_ODT2
M_B_ODT3
5 M_B_DM[7:0]

5 M_B_DQS[7:0]

5 M_B_DQS#[7:0]

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

116
120

ODT0
ODT1

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

11
28
46
63
136
153
170
187

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

PC2100 DDR3 SDRAM SO-DIMM

(204P)

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

+1.5V_SUS

M_B_DQ[63:0] 5

JDIM1A
5 M_B_A[15:0]

2.48A

+3V

4 PM_EXTTS#1
14,35 DDR3_DRAMRST#

+SMDDR_VREF_DIMM

+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM

JDIM1B

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199

VDDSPD

77
122
125

NC1
NC2
NCTEST

198
30

EVENT#
RESET#

1
126
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

VREF_DQ
VREF_CA
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

PC2100 DDR3 SDRAM SO-DIMM

(204P)

DIMM B1

VTT1
VTT2
GND
GND

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

Place these Caps near So-Dimm1.

+SMDDR_VREF_DIMM
+1.5V_SUS

C263
C303
4D@10u/6.3V_6
[email protected]/10V_4
C262
C264
C289
4D@10u/6.3V_6
4D@10u/6.3V_6
[email protected]/10V_4

C372

C370

+ C373
4D@330u/2V_7343
C315
C346
C316
4D@10u/6.3V_6
4D@10u/6.3V_6
[email protected]/10V_4
C359
C336
C330
4D@10u/6.3V_6
[email protected]/10V_4
[email protected]/10V_4

C208

C205

+3V

+SMDDR_VREF_DQ1

+0.75V_DDR_VTT
C422
4D@1U/6.3V_4

C438
4D@1U/6.3V_4

C446
4D@10u/6.3V_6
C406

C454
[email protected]/6.3V_6

C441
4D@10u/6.3V_6
[email protected]/10V_4
C440
4D@1U/6.3V_4

C439
4D@1U/6.3V_4

C433
4D@10u/6.3V_6
maybe can save

203
204

+0.75V_DDR_VTT

205
206

4D@DDR3-DIMM1_H=8.0_Reverse
A

Quanta Computer Inc.

PROJECT : ZR7

4D@DDR3-DIMM1_H=8.0_Reverse

Size

Document Number

Date:

Monday, February 22, 2010

Rev
3B

DDRIII SO-DIMM-B0/B1
5

Sheet
1

PEX_IOVDD+PEX_IOVDDQ+PEX_PLLVDD >2.2A
U33A

VSP@N11P-GE-A1/H

+1.05V_GFX

~ 500mA
A

COMMON

C62
C85
C100
C66
C63
C71

[email protected]/10V_4
[email protected]/10V_4
ES@1U/6.3V_4
ES@1U/6.3V_4
[email protected]/6.3V_6
[email protected]/6.3V_6

C109

ES@10U/6.3V_6

11/27 Modify to CC0603

+1.05V_GFX

1600mA
Near BGA

C99
C74
C80
C134
C124
C96

[email protected]/10V_4
[email protected]/10V_4
ES@1U/6.3V_4
ES@1U/6.3V_4
[email protected]/6.3V_6
[email protected]/6.3V_6

C84

ES@10U/6.3V_6

11/27 Modify to CC0603

AK16
AK17
AK21
AK24
AK27

AG11
AG12
AG13
AG15
AG16
AG17
AG18
AG22
AG23
AG24
AG25
AG26
AJ14
AJ15
AJ19
AJ21
AJ22
AJ24
AJ25
AJ27
AK18
AK20
AK23
AK26
AL16

+3V_GFX
C126
C141
C130
C127
C112

10/20 add

J10
J11
J12
J13
J9

T7
T1
T10

C118
C119

ES@1U/6.3V_4
ES@1U/6.3V_4

C133
C132

ES@1U/6.3V_4
[email protected]/6.3V_6

AP17
AN17
AN19
AP19
AR19
AR20
AP20
AN20
AN22
AP22
AR22
AR23
AP23
AN23
AN25
AP25
AR25
AR26
AP26
AN26
AN28
AP28
AR28
AR29
AP29
AN29
AN31
AP31
AR31
AR32
AR34
AP34

PEG_TXP15
PEG_TXN15
PEG_TXP14
PEG_TXN14
PEG_TXP13
PEG_TXN13
PEG_TXP12
PEG_TXN12
PEG_TXP11
PEG_TXN11
PEG_TXP10
PEG_TXN10
PEG_TXP9
PEG_TXN9
PEG_TXP8
PEG_TXN8
PEG_TXP7
PEG_TXN7
PEG_TXP6
PEG_TXN6
PEG_TXP5
PEG_TXN5
PEG_TXP4
PEG_TXN4
PEG_TXP3
PEG_TXN3
PEG_TXP2
PEG_TXN2
PEG_TXP1
PEG_TXN1
PEG_TXP0
PEG_TXN0

PEX_TX0
PEX_TX0*
PEX_TX1
PEX_TX1*
PEX_TX2
PEX_TX2*
PEX_TX3
PEX_TX3*
PEX_TX4
PEX_TX4*
PEX_TX5
PEX_TX5*
PEX_TX6
PEX_TX6*
PEX_TX7
PEX_TX7*
PEX_TX8
PEX_TX8*
PEX_TX9
PEX_TX9*
PEX_TX10
PEX_TX10*
PEX_TX11
PEX_TX11*
PEX_TX12
PEX_TX12*
PEX_TX13
PEX_TX13*
PEX_TX14
PEX_TX14*
PEX_TX15
PEX_TX15*

AL17
AM17
AM18
AM19
AL19
AK19
AL20
AM20
AM21
AM22
AL22
AK22
AL23
AM23
AM24
AM25
AL25
AK25
AL26
AM26
AM27
AM28
AL28
AK28
AK29
AL29
AM29
AM30
AM31
AM32
AN32
AP32

CPEG_RXP15
CPEG_RXN15
CPEG_RXP14
CPEG_RXN14
CPEG_RXP13
CPEG_RXN13
CPEG_RXP12
CPEG_RXN12
CPEG_RXP11
CPEG_RXN11
CPEG_RXP10
CPEG_RXN10
CPEG_RXP9
CPEG_RXN9
CPEG_RXP8
CPEG_RXN8
CPEG_RXP7
CPEG_RXN7
CPEG_RXP6
CPEG_RXN6
CPEG_RXP5
CPEG_RXN5
CPEG_RXP4
CPEG_RXN4
CPEG_RXP3
CPEG_RXN3
CPEG_RXP2
CPEG_RXN2
CPEG_RXP1
CPEG_RXN1
CPEG_RXP0
CPEG_RXN0

PEX_REFCLK
PEX_REFCLK*

AR16
AR17

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT*

AJ17
AJ18

PEX_TSTCLK R34
PEX_TSTCLK#

AM16

VGA_RST#

PEX_CLKREQ*

AR13

PEX_CLKREQ# R449

ES@10K/F_4

PEX_TERMP

AG21

PEX_TERMP

R42

TESTMODE

AP35

TESTMODE

R435

ES@10K/F_4

R434

*ES@10K/F_4

PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
PEX_IOVDDQ_15
PEX_IOVDDQ_16
PEX_IOVDDQ_17
PEX_IOVDDQ_18
PEX_IOVDDQ_19
PEX_IOVDDQ_20
PEX_IOVDDQ_21
PEX_IOVDDQ_22
PEX_IOVDDQ_23
PEX_IOVDDQ_24
PEX_IOVDDQ_25

PCI EXPRESS

[email protected]/6.3V_6
ES@1U/6.3V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4

12~16 mils width 110mA

PEX_RX0
PEX_RX0*
PEX_RX1
PEX_RX1*
PEX_RX2
PEX_RX2*
PEX_RX3
PEX_RX3*
PEX_RX4
PEX_RX4*
PEX_RX5
PEX_RX5*
PEX_RX6
PEX_RX6*
PEX_RX7
PEX_RX7*
PEX_RX8
PEX_RX8*
PEX_RX9
PEX_RX9*
PEX_RX10
PEX_RX10*
PEX_RX11
PEX_RX11*
PEX_RX12
PEX_RX12*
PEX_RX13
PEX_RX13*
PEX_RX14
PEX_RX14*
PEX_RX15
PEX_RX15*

PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5

+1.05V_GFX

AD20
D35
P7

VDD_SENSE
NC_9/ VDD_SENSE
NC_16/ VDD_SENSE

AD19
E35
R7

GND_SENSE
NC_10/ GND_SENSE
NC_17/ GND_SENSE

L3
ES@100nH_6
+PEX_PLLVDD

VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5

AG14

PEX_PLLVDD

10/20 del C3553,C3554

12~16 mils width

+3V_GFX

ES@0_6

+PEX_SVDD_3V3

10/20 Modify to 1uF

C149

ES@1U/6.3V_4

C93
C144

[email protected]/10V_4
[email protected]/6.3V_6

AG19
F7

AG20
A2
AB7
AD6
AF6
AG6
AJ5
AK15
AL7
E7
H32
M7
P6
U7
V6

PEX_CAL_PD_VDDQ/ PEX_SVDD_3V3
NC_12/ PEX_SVDD_3V3

PEX_CAL_PU_GND/ NC
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_11
NC_13
NC_14
NC_15
NC_18
NC_19

PEX_RST*

EV@ --> dGPU only

SW@ --> iGPU & dGPU Switch
ES@ --> External VGA SKU
VSP@ --> Operation P/N (VGA)

power up sequence

PEG_TXP15 4
PEG_TXN15 4
PEG_TXP14 4
PEG_TXN14 4
PEG_TXP13 4
PEG_TXN13 4
PEG_TXP12 4
PEG_TXN12 4
PEG_TXP11 4
PEG_TXN11 4
PEG_TXP10 4
PEG_TXN10 4
PEG_TXP9 4
PEG_TXN9 4
PEG_TXP8 4
PEG_TXN8 4
PEG_TXP7 4
PEG_TXN7 4
PEG_TXP6 4
PEG_TXN6 4
PEG_TXP5 4
PEG_TXN5 4
PEG_TXP4 4
PEG_TXN4 4
PEG_TXP3 4
PEG_TXN3 4
PEG_TXP2 4
PEG_TXN2 4
PEG_TXP1 4
PEG_TXN1 4
PEG_TXP0 4
PEG_TXN0 4
C129
C122
C123
C111
C110
C103
C104
C98
C88
C83
C87
C97
C82
C76
C68
C77
C60
C67
C61
C51
C50
C42
C40
C43
C39
C36
C37
C35
C32
C30
C31
C28

PXE 1.05VDD

I/O 3.3V

NVCORE

1.5VFBDDQ

NB9M: VGACORE +0.90V (Normal) , +1.09V

NVVDD Maximum Settling Time

PEG_RXP15 4
PEG_RXN15 4
PEG_RXP14 4
PEG_RXN14 4
PEG_RXP13 4
PEG_RXN13 4
PEG_RXP12 4
PEG_RXN12 4
PEG_RXP11 4
PEG_RXN11 4
PEG_RXP10 4
PEG_RXN10 4
PEG_RXP9 4
PEG_RXN9 4
PEG_RXP8 4
PEG_RXN8 4
PEG_RXP7 4
PEG_RXN7 4
PEG_RXP6 4
PEG_RXN6 4
PEG_RXP5 4
PEG_RXN5 4
PEG_RXP4 4
PEG_RXN4 4
PEG_RXP3 4
PEG_RXN3 4
PEG_RXP2 4
PEG_RXN2 4
PEG_RXP1 4
PEG_RXN1 4
PEG_RXP0 4
PEG_RXN0 4

NVVDD

GPIO

tsNVVDD<= 192us

SW@ --> iGPU & dGPU Switch

PEX_RST timing

CLK_PCIE_VGA 10
CLK_PCIE_VGA# 10

R459

SW@100K_4

*ES@200_4
R460

SW@0_4

GPU_RST# 11

R456

EV@0_4

PLTRST# 4,10,11,25,27,31,36

PEX_RST

+3V_GFX

EV@ --> dGPU only

R456 un-mount for switchable function

Trise >= 1uS

Tfail <=500nS

+3V_GFX
+3V_GFX

Only for Hybrid

R487
R483
SW@10K/F_4

SW@ --> iGPU & dGPU Switch

SW@10K/F_4

+3V_S5
PEG_CLKREQ# 10
D

Q41
SW@DTC144EUA
1

Q40
SW@DTC144EUA

Quanta Computer Inc.

PROJECT :

PEX_CLKREQ#

I/O 3.3V

Size

ZR7

Document Number

Rev
3B

N11P-GE (PCIE I/F) 1/5

Date:
1

Monday, February 22, 2010

Sheet

16
8

11EP@ --> N11P/N11E-GE1 Setting

VSP@ --> Operation P/N (VGA)
U33B
ES@ --> External VGA SKU
12/02

21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21

V32
W31
U31
Y32
AB35
AB34
W35
W33
W30
T34
T35
AB31
Y30
Y34
W32
VMA_CMD15 AA30
AA32
Y33
U32
Y31
U34
Y35
W34
VMA_CMD23 V30
U35
U30
U33
AB30
AB33
T33
W29

VMA_CMD0
VMA_CMD1
VMA_CMD2
VMA_CMD3
VMA_CMD4
VMA_CMD5
VMA_CMD6
VMA_CMD7
VMA_CMD8
VMA_CMD9
VMA_CMD10
VMA_CMD11
VMA_CMD12
VMA_CMD13
VMA_CMD14
T3
VMA_CMD16
VMA_CMD17
VMA_CMD18
VMA_CMD19
VMA_CMD20
VMA_CMD21
VMA_CMD22
T2
VMA_CMD24
VMA_CMD25
VMA_CMD26
VMA_CMD27
VMA_CMD28
VMA_CMD29
VMA_CMD30

P32
H34
J30
P30
AF32
AL32
AL34
AF35

FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7

VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7

L34
H35
J32
N31
AE31
AJ32
AJ34
AC33

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7

L35
G35
H31
N32
AD32
AJ31
AJ35
AC34

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

P29
R29
L29
M29
AG29
AH29
AD29
AE29

FBA_WCK0
FBA_WCK0_N
FBA_WCK1
FBA_WCK1_N
FBA_WCK2
FBA_WCK2_N
FBA_WCK3
FBA_WCK3_N

AA27
AA29
AA31
AB27
AB29
AC27
AD27
AE27
AJ28
B18
E21
G17
G18
G22
G8
G9
H29
J14
J15
J16
J17
J20
J21
J22
J23
J24
J29

FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
FBVDDQ_24
FBVDDQ_25
FBVDDQ_26
FBVDDQ_27

12/02 modify
package for N10

+1.5V_GFX

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30

VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7

modify
package for N10

fcbga973-nvidia-n11p-es-a1
COMMON

FBA_D00
FBA_D01
FBA_D02
FBA_D03
FBA_D04
FBA_D05
FBA_D06
FBA_D07
FBA_D08
FBA_D09
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

L32
N33
L33
N34
N35
P35
P33
P34
K35
K33
K34
H33
G34
G33
E34
E33
G31
F30
G30
G32
K30
K32
H30
K31
L31
L30
M32
N30
M30
P31
R32
R30
AG30
AG32
AH31
AF31
AF30
AE30
AC32
AD30
AN33
AL31
AM33
AL33
AK30
AK32
AJ30
AH30
AH33
AH35
AH34
AH32
AJ33
AL35
AM34
AM35
AF33
AE32
AF34
AE35
AE34
AE33
AB32
AC35

FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*

T32
T31
AC31
AC30

FB_VREF

fcbga973-nvidia-n11p-es-a1
COMMON

21 VMA_RDQS[7..0]

22
22
22
22
22
22
22
22
22
22
22
22
22
22
22

22 VMC_DQ[63..0]
22

VMC_DM[7..0]

22 VMC_WDQS[7..0]
22 VMC_RDQS[7..0]

22
22
22
22
22
22
22

VMA_CMD25

R16

ES@10K/F_4

VMA_CMD16

R12

ES@10K/F_4

VMA_CMD0

R17

ES@10K/F_4

VMA_CMD27

R20

ES@10K/F_4

VMA_CMD28

R11

ES@10K/F_4

VMC_CMD25

R32

11EP@10K/F_4

VMC_CMD16

R22

11EP@10K/F_4

VMC_CMD0

R35

11EP@10K/F_4

VMC_CMD27

R27

11EP@10K/F_4

VMC_CMD28

R24

11EP@10K/F_4

Un-stuff for N11M

Stuff for N11P ,N11E

C17
B19
D18
F21
A23
D21
B23
E20
G21
F20
F19
F23
A22
C22
B17
VMC_CMD15 F24
C25
E22
C20
B22
A19
D22
D20
VMC_CMD23 E19
D19
F18
C19
F22
C23
B20
A20

VMC_CMD0
VMC_CMD1
VMC_CMD2
VMC_CMD3
VMC_CMD4
VMC_CMD5
VMC_CMD6
VMC_CMD7
VMC_CMD8
VMC_CMD9
VMC_CMD10
VMC_CMD11
VMC_CMD12
VMC_CMD13
VMC_CMD14
T6
VMC_CMD16
VMC_CMD17
VMC_CMD18
VMC_CMD19
VMC_CMD20
VMC_CMD21
VMC_CMD22
T8
VMC_CMD24
VMC_CMD25
VMC_CMD26
VMC_CMD27
VMC_CMD28
VMC_CMD29
VMC_CMD30

22
22
22
22
22
22
22

A16
D10
F11
D15
D27
D34
A34
D28

FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7

VMC_WDQS0
VMC_WDQS1
VMC_WDQS2
VMC_WDQS3
VMC_WDQS4
VMC_WDQS5
VMC_WDQS6
VMC_WDQS7

C14
A10
E10
D14
E26
D32
A32
B26

FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7

VMC_RDQS0
VMC_RDQS1
VMC_RDQS2
VMC_RDQS3
VMC_RDQS4
VMC_RDQS5
VMC_RDQS6
VMC_RDQS7

B14
B10
D9
E14
F26
D31
A31
A26

FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7

G14
G15
G11
G12
G27
G28
G24
G25

FBC_WCK0
FBC_WCK0_N
FBC_WCK1
FBC_WCK1_N
FBC_WCK2
FBC_WCK2_N
FBC_WCK3
FBC_WCK3_N

N27
P27
R27
T27
U27
U29
V27
V29
V34
W27
Y27

FBVDDQ_28
FBVDDQ_29
FBVDDQ_30
FBVDDQ_31
FBVDDQ_32
FBVDDQ_33
FBVDDQ_34
FBVDDQ_35
FBVDDQ_36
FBVDDQ_37
FBVDDQ_38

12/02 modify
package for N10

+FB_VREF1

+1.5V_GFX

21
21
21
21

FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30

VMC_DM0
VMC_DM1
VMC_DM2
VMC_DM3
VMC_DM4
VMC_DM5
VMC_DM6
VMC_DM7

11EP@ --> N11P/N11E-GE1 Setting

VMA_CLKP0
VMA_CLKN0
VMA_CLKP1
VMA_CLKN1

15mils width

FBC_D00
FBC_D01
FBC_D02
FBC_D03
FBC_D04
FBC_D05
FBC_D06
FBC_D07
FBC_D08
FBC_D09
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63

B13
D13
A13
A14
C16
B16
A17
D16
C13
B11
C11
A11
C10
C8
B8
A8
E8
F8
F10
F9
F12
D8
D11
E11
D12
E13
F13
F14
F15
E16
F16
F17
D29
F27
F28
E28
D26
F25
D24
E25
E32
F32
D33
E31
C33
F29
D30
E29
B29
C31
C29
B31
C32
B32
B35
B34
A29
B28
A28
C28
C26
D25
B25
A25

FBC_CLK0
FBC_CLK0*
FBC_CLK1
FBC_CLK1*

E17
D17
D23
E23

For Debug only

FBA_DEBUG

AG27

FB_PLLAVDD0

AF27

R19

K27

FB_CAL_PD_VDDQ

R26

FB_CAL_PU_GND

L27

FB_CAL_PU_GND

R25

FB_CAL_TERM_GND
*ES@10K/F_4

M27

FB_CAL_TERM_GND

R18

FBC_DEBUG

G19

FBC_DEBUG

R33

*ES@10K/F_4

+1.5V_GFX

ES@PBY160808T-301Y-N_6
L1

[email protected]/6.3V_6
ES@1U/6.3V_4
[email protected]/10V_4

+1.05V_GFX

C107
C52
C57
C47
C44
C101
C56
C59
C79
C58
C48
C86

[email protected]/25V_4
[email protected]/25V_4
[email protected]/25V_4
[email protected]/25V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/6.3V_6
[email protected]/6.3V_6

NC/ FB_DLLAVDD1

J19

NC/ FB_PLLAVDD1

J18

+1.5V_GFX

VSP@

N11P/N11E-GE1 Stuff 40.2 ohm

N11M-GE1 Stuff 60.4 ohm
D

Quanta Computer Inc.

PROJECT :

ZR7

Document Number

Rev
3B

N11P-GE (MEMORY I/F) 2/5

Date:

22
22
22
22

FB_CAL_PD_VDDQ

Size

VMC_CLKP0
VMC_CLKN0
VMC_CLKP1
VMC_CLKN1

MEMORY I/F C

All need stuff for N10P

+1.5V_GFX

+FB_PLLAVDD
C45
C54
C53

2/16

FBA_DEBUG

15mils width
FB_DLLAVDD0

12/02 modify
package for N10

VMC_DQ0
VMC_DQ1
VMC_DQ2
VMC_DQ3
VMC_DQ4
VMC_DQ5
VMC_DQ6
VMC_DQ7
VMC_DQ8
VMC_DQ9
VMC_DQ10
VMC_DQ11
VMC_DQ12
VMC_DQ13
VMC_DQ14
VMC_DQ15
VMC_DQ16
VMC_DQ17
VMC_DQ18
VMC_DQ19
VMC_DQ20
VMC_DQ21
VMC_DQ22
VMC_DQ23
VMC_DQ24
VMC_DQ25
VMC_DQ26
VMC_DQ27
VMC_DQ28
VMC_DQ29
VMC_DQ30
VMC_DQ31
VMC_DQ32
VMC_DQ33
VMC_DQ34
VMC_DQ35
VMC_DQ36
VMC_DQ37
VMC_DQ38
VMC_DQ39
VMC_DQ40
VMC_DQ41
VMC_DQ42
VMC_DQ43
VMC_DQ44
VMC_DQ45
VMC_DQ46
VMC_DQ47
VMC_DQ48
VMC_DQ49
VMC_DQ50
VMC_DQ51
VMC_DQ52
VMC_DQ53
VMC_DQ54
VMC_DQ55
VMC_DQ56
VMC_DQ57
VMC_DQ58
VMC_DQ59
VMC_DQ60
VMC_DQ61
VMC_DQ62
VMC_DQ63

MEMORY I/F A
T30

U33C

VMA_DM[7..0]

21 VMA_WDQS[7..0]

VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63

J27

21 VMA_DQ[63..0]

Monday, February 22, 2010

Sheet

17
8

U33D

AK9

COMMON

IFPAB_PLLVDD

IFPA_TXC
IFPA_TXC*
IFPA_TXD0
IFPA_TXD0*
IFPA_TXD1
IFPA_TXD1*
IFPA_TXD2
IFPA_TXD2*
IFPA_TXD3
IFPA_TXD3*
IFPB_TXC
IFPB_TXC*
IFPB_TXD4
IFPB_TXD4*
IFPB_TXD5
IFPB_TXD5*
IFPB_TXD6
IFPB_TXD6*
IFPB_TXD7
IFPB_TXD7*

IFPAB(LVDS)

10/20 Del C3647

ES@FBMA-10-160808-300T_6
+IFPAB_IOVDD
L9

ES@FBMA-10-160808-300T_6
+IFPCD_PLLVDD
L11

AJ11

IFPAB_RSET

AG9
AG10

IFPA_IOVDD
IFPB_IOVDD

220 mA
AJ9

[email protected]/10V_4
ES@1U/6.3V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/6.3V_6

R60
R59

+1.05V_GFX

200 mA

[email protected]/10V_4
[email protected]/10V_4
ES@1U/6.3V_4
[email protected]/6.3V_6

C160
C178
C180
C145
C186

(1.05V +/- 3% )

IFPAB_RSET

*ES@1K/F_4

C146
C176
C179
C184

ES@MLB-201209-0030P-N1-RU_8
+IFPCD_IOVDD
L7

AC6

IFPC_RSET
IFPD_RSET

ES@1K/F_4
ES@1K/F_4

C168
C165
C158
C173

285 mA

IFPCD_PLLVDD/
IFPC_PLLVDD
DACB_VDD/
IFPD_PLLVDD

AK7
AB6

IFPCD_RSET/ IFPC_RSET
DACB_RSET/ IFPD_RSET

AJ8
AK8

IFPC_IOVDD
IFPD_IOVDD

IFPCD

[email protected]/10V_4
[email protected]/10V_4
ES@1U/6.3V_4
[email protected]/6.3V_6

AL1

IFPEF_RSET

ES@10K/F_4
ES@10K/F_4

ES@PBY160808T-301Y-N_6
L6
C153
C150
C154

AJ6
AE7
AD7

IFPEF_PLLVDD
IFPE_IOVDD
IFPF_IOVDD

[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4

+DACA_VDD
C157
C164
C155
C156

C140
R48
R52

IFPEF_PLLVDD
IFPEF_IOVDD

120 mA

AJ12

DACA_VDD

ES@1U/6.3V_4
[email protected]/6.3V_6
ES@4700P/25V_4
ES@470p/X7R_4

[email protected]/10V_4
ES@124/F_4
ES@10K/F_4

DACA_VREF
DACA_RSET
+DACB_VDD

AK12
AK13
AG7
AK6

AN3
AP2
AR2
AP1
AM4
AM3
AM5
AL5
AM6
AM7
AN4
AP4
AR4
AR5
AP5
AN5
AN7
AP7
AR7
AR8

I2CY_SCL/ IFPE_AUX
I2CY_SDA/ IFPE_AUX*
IFPE_L0
IFPE_L0*
IFPE_L1
IFPE_L1*
IFPE_L2
IFPE_L2*
IFPE_L3
IFPE_L3*
I2CZ_SCL/ IFPF_AUX
I2CZ_SDA/ IFPF_AUX*
IFPF_L0
IFPF_L0*
IFPF_L1
IFPF_L1*
IFPF_L2
IFPF_L2*
IFPF_L3
IFPF_L3*

AE4
AD4
AH6
AH5
AH4
AG4
AF4
AF5
AE6
AE5
AF3
AF2
AL2
AL3
AJ3
AJ2
AJ1
AH1
AH2
AH3

AH7

DACA(CRT)

+1.05V_GFX

ES@100nH_6
L4

+NV_PLLVDD
C136
C147
C148
C137

+1.05V_GFX

ES@100nH_6
L10

60mA

[email protected]/10V_4
[email protected]/10V_4
ES@1U/6.3V_4
[email protected]/6.3V_6

+NV_SPPLLVDD

AE9

PLLVDD

AD9

VID_PLLVDD

MXM_DDCDAT_C
MXM_DDCCK_C

MXM_DDCDAT_C 24
MXM_DDCCK_C 24

HDMITX0N
HDMITX0P
HDMITX1N
HDMITX1P
HDMITX2N
HDMITX2P

24
24
24
24
24
24

10/23 Modify

TMDS channel two

Q39
ES@PDTC143TT

+3V_GFX

10/20 STUFF

DACA_BLUE

AL14

DACA_HSYNC
DACA_VSYNC

AM13
AL13

EV_HSYNC_R
EV_VSYNC_R

G1
G4

EV_CRTDCLK
EV_CRTDDAT

R450
R453

ES@33_4
ES@33_4

EV_CRTDCLK

R84

EV_CRTDDAT

R468

MXM_DDCCK_C

R463

MXM_DDCDAT_C

EV_CRTDCLK 23
EV_CRTDDAT 23

AK4

EV_CRT_RED

R36

ES@150/F_4

EV_CRT_GRN

R38

ES@150/F_4

EV_CRT_BLU

R40

ES@150/F_4

AL4
AJ4
+3V_GFX

AM1
AM2
G3
G2
AA4
AB4
Y4
AB5

DACB_CSYNC R61

XTAL_SSIN
XTAL_OUTBUFF

D2
D1

XTAL_SSIN
BXTALOUT

R91

*ES@22_4

CLK_27M_SS 3

XTAL_IN

XTALI_27M

R471

*ES@0_4

27M_CLK 3

XTAL_OUT

XTALO_27M

R477
R476

[email protected]_4
[email protected]_4

PLACE CLOSE TO GPU

ES@10K/F_4

XTAL_SSIN

R472

ES@10K/F_4

BXTALOUT

R70

ES@10K/F_4

10 k

pull-down only if no spread chip used.

C601

C600

STUFF PDs on XTALSSIN and

XTALOUTBUFF WHEN
EXT_SS IS NOT USED

Quanta Computer Inc.

ES@27P/50V_4

ES@1U/6.3V_4
[email protected]/6.3V_6

PROJECT :
Size

Rev
3B

N11P-GE (DISPLAY) 3/5

11/27 Modify C601,C600 to 27pF

ZR7

Document Number

10/20 Del C3515

EV_HSYNC 23
EV_VSYNC 23

I2CB_SCL
I2CB_SDA

SP_PLLVDD

R75

EV_CRT_BLU 23

Y3
ES@27MHZ
AF9

Display port output

EV_CRT_GRN 23

NC/ DACB_BLUE
CEC/ DACB_CSYNC

Q38
ES@2N7002D

+1.8V_GFX

EV_CRT_BLU

DACB(TV) NC/ DACB_GREEN

dGPU_PWROK 11,36

EV_CRT_RED 23

/DACC_RED
DACB_RED
/DACC_GREEN
DACB_GREEN
/DACC_BLUE
DACB_BLUE
DACB_HSYNC/ DACC_HSYNC
DACB_VSYNC/ DACC_VSYNC

R480
ES@10K_4

GPU all PWROK

R484
ES@10K_4

EV_CRT_GRN

DACC(CRT2)

+3V_GFX

+3V_S5

EV_CRT_RED

I2CA_SCL
I2CA_SDA

10/20
HDMICLK- 24
HDMICLK+ 24

ES@27P/50V_4
C177
C185

11/16 Change LVDS to two channel.

AM14

XTAL_PLL
45mA

EV_TXUCLKOUT+ 23
EV_TXUCLKOUT- 23
EV_TXUOUT0+ 23
EV_TXUOUT0- 23
EV_TXUOUT1+ 23
EV_TXUOUT1- 23
EV_TXUOUT2+ 23
EV_TXUOUT2- 23

AM15

NC/ DACB_RED

DACB_VREF/ NC

LVDS clk spread : Center

+/-0.5% ( 30~33KHZ)

DACA_RED

I2CB_SCL
I2CB_SDA

AC5

EV_TXLCLKOUT+ 23
EV_TXLCLKOUT- 23
EV_TXLOUT0+ 23
EV_TXLOUT0- 23
EV_TXLOUT1+ 23
EV_TXLOUT1- 23
EV_TXLOUT2+ 23
EV_TXLOUT2- 23

DACA_GREEN

DACA_VREF
DACA_RSET
DACC_VDD/
DACB_VDD
DACC_VREF/
DACB_VREF
DACC_RSET/
DACB_RSET

AM11
AM12
AM8
AL8
AM10
AM9
AK10
AL10
AK11
AL11
AP13
AN13
AN8
AP8
AP10
AN10
AR11
AR10
AN11
AP11

I2CW_SDA/ IFPC_AUX_N
I2CW_SCL/ IFPC_AUX
IFPC_L3_N
IFPC_L3
IFPC_L2_N
IFPC
IFPC_L2
IFPC_L1_N
IFPC_L1
IFPC_L0_N
IFPC_L0
I2CX_SDA/ IFPD_AUX_N
I2CX_SCL/ IFPD_AUX
IFPD_L3_N
IFPD_L3
IFPD_L2_N
IFPD
IFPD_L2
IFPD_L1_N
IFPD_L1
IFPD_L0_N
IFPD_L0

IFPEF
R56
R67

+3V_GFX

220 mA

ES@1U/6.3V_4
[email protected]/6.3V_6

R49

+3V_GFX

C170
C169

+1.8V_GFX

fcbga973-nvidia-n11p-es-a1

ES@FBMA-10-160808-300T_6
+IFPAB_PLLVDD
L8

+1.05V_GFX

ES@ --> External VGA SKU

VSP@ --> Operation P/N (VGA)

Date:
6

Monday, February 22, 2010

Sheet

18
8

U33E

R44

ES@0_6
C138

P9
R9
T9
U9

10/20

fcbga973-nvidia-n11p-es-a1
COMMON

MIOA_VDDQ_1
MIOA_VDDQ_2
MIOA_VDDQ_3
MIOA_VDDQ_4

MIOA_D0
MIOA_D1
MIOA_D2
MIOA_D3
MIOA_D4
MIOA_D5
MIOA_D6
MIOA_D7
MIOA_D8
MIOA_D9
MIOA_D10
MIOA_D11
MIOA_D12
MIOA_D13
MIOA_D14

N1
P4
P1
P2
P3
T3
T2
T1
U4
U1
U2
U3
R6
T6
N6

MIOA_CTL3
MIOA_HSYNC
MIOA_VSYNC
MIOA_DE

P5
N3
L3
N2

MIOA_CLKOUT
MIOA_CLKOUT*
MIOA_CLKIN

R4
T4
N4

MIOA

Notice
N11M/N11P : Stuff 0 ohm
N11X-FERMI : UnStuff 0 ohm

MIOA_CAL_PD_VDDQ

Notice
N11M/N11P : Stuff 0.1uF
N11X-FERMI : Stuff 10K ohm

+3V_GFX

MIOA_CAL_PU_GND

MIOA_VREF

10/20 Add

R74

ES@0_6
C139

AA9
AB9
W9
Y9

10/20

MIOB_VDDQ_1
MIOB_VDDQ_2
MIOB_VDDQ_3
MIOB_VDDQ_4

MIOB_D0
MIOB_D1
MIOB_D2
MIOB_D3
MIOB_D4
MIOB_D5
MIOB_D6
MIOB_D7
MIOB_D8
MIOB_D9
MIOB_D10
MIOB_D11
MIOB_D12
MIOB_D13
MIOB_D14
STRAP0
STRAP1
STRAP2

MIOB

Notice
N11M/N11P : Stuff 0 ohm
N11X-FERMI : UnStuff 0 ohm

AA7
AA6

Notice
N11M/N11P : Stuff 0.1uF
N11X-FERMI : Stuff 10K ohm

AF1

MIOB_CAL_PD_VDDQ
MIOB_CAL_PU_GND

MIOB_VREF

MIOB_CTL3
MIOB_HSYNC
MIOB_VSYNC
MIOB_DE
MIOB_CLKOUT
MIOB_CLKOUT*
MIOB_CLKIN
20

GPU_D-

GPU_D+

B5
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#

T66
T67
T68
T65
T64

E2
E1
E3
E4
F4
G5
D5
E5

+3V_GFX

10/20 STUFF
R76

EV_LVDS_DDCCLK

R69

EV_LVDS_DDCDAT

R45
R41

[email protected]/F_4
[email protected]/F_4

J26
J25
D7
D6
C7
B7
A7

STRAP_REF_3V3
STRAP_REF_MIOB

N9
M9

THERMDN

GPIO0
GPIO1
GPIO2
THERMDP
GPIO3
GPIO4
GPIO5
JTAG_TCK MISC1
GPIO6
JTAG_TMS (GPIOS,JTAG,THERM,I2C) GPIO7
JTAG_TDI
GPIO8
JTAG_TDO
GPIO9
JTAG_TRST*
GPIO10
GPIO11
GPIO12
I2CS_SCL
GPIO13
I2CS_SDA
GPIO14
I2CC_SCL
GPIO15
I2CC_SDA
GPIO16
I2CD_SCL/ NC
GPIO17
I2CD_SDA/ NC
GPIO18
I2CE_SCL/ NC
GPIO19
I2CE_SDA/ NC
GPIO20
GPIO21
GPIO22
GPIO23
BBIASN_NC
BBIASP_NC

ROM_CS*
ROM_SI
ROM_SO
ROM_SCLK

MISC2(ROM)

HDA_BCLK/ NC
HDA_RST*/ NC
HDA_SDI/ NC
HDA_SDO/ NC
HDA_SYNC/ NC

I2CH_SCL
I2CH_SDA

SPDIF
STRAP_REF_3V3/ MULTI_STRAP_REF0_GND
STRAP_REF_MIOB/ MULTI_STRAP_REF1_GND BUFRST*
NC
GND
GND/ NC

VGA Thermal
ADDRESS: 9AH

R100

MXM_SMCLK12 20,36

Q9
SW@2N7002D

MIOA_CLKIN
R475

K1
K2
K3
H3
H2
H1
H4
H5
H6
J7
K4
K5
H7
J4
J6
L1
L2
L4
M4
L7
L5
K6
L6
M6

MXM_SMDATA12 20,36

STRAP0
STRAP1
STRAP2

MIOB_CLKIN
R66

SW@ --> iGPU & dGPU Switch

RAMCFG[2]

RAMCFG[1]

RAMCFG[0]

XXXX

STRAP2

PCI_DEVID[3]

PCI_DEVID[2]

PCI_DEVID[1]

PCI_DEVID[0]

XXXX

STRAP1

3GIO_PADCFG[3]

3GIO_PADCFG[2]

3GIO_PADCFG[1]

3GIO_PADCFG[0]

1110

STRAP0

USER[3]

USER[2]

USER[1]

USER[0]

1111

R89

VGA_OVT#
ALERT#

ALERT#
T84
T9

VGA_ACIN

R488

DDR3 64Mx16x8, 128bit, 1GB,667MHz

Hynix
Samsung

H5TQ1G63AFR-14C
K4W1G1646D-EC12

1000

0000

10K

1001

0001

15K

1010

0010

20K

1011

0011

25K

1100

0100

30K

1101

0101

35K

1110

0110

45K

1111

0111

+3V_GFX

R491
*ES@20K/F_4

R482
*[email protected]/F_4

R481
VSP@15K/F_4

R485
VSP@15K/F_4

11P@
N11P-GE1
Setting

R71
[email protected]/F_4

R68
[email protected]/F_4

R490
11P@10K/F_4

R473
ES@10K/F_4

R478
11P@15K/F_4

R64
*ES@2K/F_4

R73

R489
[email protected]/F_4

*[email protected]/F_4

11P@
N11P-GE1
Setting

STRAP2

PCI_DEVID

PD 30K

0x0A75

N11P-GE1

PD 15K

PU 10K

0x0A29

N11E-GE1

PU 15K

PD 5K

0x0CB0

+3V_GFX

11EP@ --> N11P/N11E-GE1 Setting

ROM_SI
ROM_SO
ROM_SCLK

F6
G6

HDCP_SCL
HDCP_SDA

SPDIF_VGA

A5 N.C due to N11X HAD

function is through
PCI-E interface

T69

DGPU_IDLE_INT#

R486

ES@10K/F_4

GPU_VID2
GPU_VID1

R57
R83

*ES@10K/F_4
11EP@10K/F_4

VSP@
N11E-GE1
N11M-GE1
Setting

4.99K/F_4: CS24992FB26 [RES CHIP 4.99K 1/16W +1%(0402)]

10K/F_4: CS31002FB26 [RES CHIP 10K 1/16W +1% (0402)]
15K/F_4: CS31502FB24 [RES CHIP 15K 1/16W +1% (0402)]
20K/F_4: CS32002FB29 RES CHIP 20K 1/16W +-1%(0402)
30.1K/F_4: CS33012FB18 [RES CHIP 30.1K 1/16W +-1%(0402)]
35.7K/F_4: CS33572FB13 [RES CHIP 35.7K 1/16W +-1%(0402)]
45.3K/F_4: CS34532FB18 [RES CHIP 45.3K 1/16W +-1% (0402)]

JTAG_TMS
JTAG_TDI
VGA_OVT#
ALERT#

R444
R447
R82
R85

*ES@10K/F_4
*ES@10K/F_4
ES@10K/F_4
ES@10K/F_4

JTAG_TRST#

R441

ES@1K/F_4

JTAG_TCK
HDMI_HP_EV

R443
R72

*ES@10K/F_4
*[email protected]/J_4

EV_LVDS_BRIGHT

R65

ES@10K/F_4

EV_LVDS_VDDEN

R90

ES@10K/F_4

EV_LVDS_BLON

R81

ES@10K/F_4

AK14
K9

GPIO
10/16

+3V_GFX
U28

+3V_GFX

SCL

C555

7
6

*[email protected]/10V_4
R429

*ES@10K/F_4

R431

R430

HDCP_SCL

HDCP_SDA
GND SDA 5
*ES@AT88SC0808C-SU

Fill U36 to correct p/n as Top B/S P/N(AR0QT6VB002)

+3V_GFX

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14

ACTIVE

I/O
N/A
IN
OUT
OUT
OUT
OUT
OUT
OUT
I/O
I/O
OUT
OUT
IN
OUT
OUT

N/A
N/A
HIGH
HIGH
HIGH
N/A
N/A
N/A
LOW
LOW
N/A
N/A
N/A
N/A
N/A

HDCP_SCL

Low: Crypto ROM

Hi: I2C ROM

Quanta Computer Inc.

EV@0_4

USAGE

DHCP ROM

Q43
SW@2N7002D
ACIN

VCC

R112
*ES@10K_4

Q10
*ES@DTA114YUA

36,37

10/16

HDCP ROM
11/4 Modify.

GPIO ASSIGNMENTS

10/20

A4
C5

R94
*0_4

Q11
*ES@2N7002D

HDCP ROM reserve , Due to N11x had

support internal HDCP function.

PROJECT :
Size

ZR7

Document Number

10/20
3

+3V_GFX

VSP@

(Ra)

Rev
3B

N11P-GE (GPIO&STRAPS) 4/5

Date:

AKD5LZGTW04
AKD5LGGT506

STRAP0
STRAP1
STRAP2

PU 15K

DGPU_IDLE_INT#

C3
D3
C4
D4

EV@0_4

PD 10K
PD 15K
PD 20K

VSP@
N11E-GE1
N11M-GE1
Setting

ROM_SI
ROM_SO
ROM_SCLK

ROM_SCLK

N11M-GE1

10/20 Modify

VGA_THERM# 20,36

DGPU_IDLE#

IDGH1G-04A1F1C-16X
H5TQ1G63BFR-12C
K4W1G1646E-HC12

Reserved
Qimonda
Hynix
Samsung
Reserved

(Ra)

ROM_SI

Vendor P/N

Vendor

DDR3 64Mx16x8, 128bit, 1GB,800MHz

DDR3 64Mx16x8, 128bit, 1GB,800MHz
DDR3 64Mx16x8, 128bit, 1GB,800MHz

T90

DESCRIPTION

CHIP
HDMI_HP_EV 24
EV_LVDS_BRIGHT 23
EV_LVDS_VDDEN 23
EV_LVDS_BLON 23
GPU_VID1 43,47
GPU_VID2 43,47

EV_LVDS_BRIGHT
EV_LVDS_VDDEN
EV_LVDS_BLON
GPU_VID1
GPU_VID2

R93
*10K_4

2
DGPU_IDLE_INT#

RAMCFG[3]

ES@10K/F_4
T76

EV@0_4

EV@ --> dGPU only

X010

ROM_SI

=15K pull down(64Mx16)

VSP@ Hynix
Samsung =20k pull down(64Mx16)

+3V_GFX
R95

PEX_PLL_EN_TERM

Logical Strap Bit Mapping

10K

VGA_DEVICE

SLOT_CLK_CFG

ES@10K/F_4

47K

SMB_DATA_VGA

Q7
SW@2N7002D
3

SMB_ALT_ADDR

SUB_VENDOR

Q6
SW@2N7002D

0001

FB_0_BAR_SIZE

Default: Hynix VRAM

V4
W4
AE1

Logical
Strapping Bit0

PCI_DEVIDE[4]

0000
0001
0010
0011
0101
0110
XXXX
XXXX

T80
T86
T79
T73
T93
T85
T92
T72
T78
T91
T71
T77

VGA_ACIN
VGA_OVT#

Logical
Strapping Bit1

XCLK_417

RAMCFG
[3:0]

W3
W1
W2
Y5

+3V_GFX

R96
[email protected]_4

Logical
Strapping Bit2

ROM_SCLK

10/20

NB10X

Logical
Strapping Bit3

VRAM Configuration Table

EV@0_4

R103
[email protected]_4

Y1
Y2
Y3
AB3
AB2
AB1
AC4
AC1
AC2
AC3
AE3
AE2
U6
W6
Y6
W5
W7
V7

VSP@ --> Operation P/N (VGA)

SW@ --> iGPU & dGPU Switch
EV@ --> dGPU only

+3V_GFX

SMB_CLK_VGA

ROM_SO

11P@ --> N11P-GE1 Setting

11M@ --> N11M-GE1 Setting
ES@ --> External VGA SKU

T89
T96
T70
T83
T95
T88
T82
T75
T74
T87
T94
T81

AP14
AR14
AN14
AN16
AP16

SMB_CLK_VGA
SMB_DATA_VGA
ES@33_4 I2CC_SCL_G
ES@33_4 I2CC_SDA_G

R63
R62

23 EV_LVDS_DDCCLK
23 EV_LVDS_DDCDAT

11EP@ --> N11P/N11E-GE1 Setting

10/20 Add

+3V_GFX

Monday, February 22, 2010

Sheet

19
8

+VGPU_CORE

COMMON

NVVDD

VDD_057
VDD_058
VDD_059
VDD_060
VDD_061
VDD_062
VDD_063
VDD_064
VDD_065
VDD_066
VDD_067
VDD_068
VDD_069
VDD_070
VDD_071
VDD_072
VDD_073
VDD_074
VDD_075
VDD_076
VDD_077
VDD_078
VDD_079
VDD_080
VDD_081
VDD_082
VDD_083
VDD_084
VDD_085
VDD_086
VDD_087
VDD_088
VDD_089
VDD_090
VDD_091
VDD_092
VDD_093
VDD_094
VDD_095
VDD_096
VDD_097
VDD_098
VDD_099
VDD_100
VDD_101
VDD_102
VDD_103
VDD_104
VDD_105
VDD_106
VDD_107
VDD_108
VDD_109
VDD_110
VDD_111

P21
P23
P25
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
T12
T14
T16
T18
T20
T22
T24
V11
V13
V15
V17
V19
V21
V23
V25
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
W24
W25
Y12
Y14
Y16
Y18
Y20
Y22
Y24

AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA2
AA20
AA21
AA22
AA23
AA24
AA25
AA34
AA5
AB12
AB14
AB16
AB18
AB20
AB22
AB24
AC9
AD11
AD13
AD15
AD17
AD2
AD21
AD23
AD25
AD31
AD34
AD5
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AG2
AG31
AG34
AG5
AK2
AK31
AK34
AK5
AL12
AL15
AL18
AL21
AL24
AL27
AL30
AL6
AL9
AN2
AN34
AP12
AP15
AP18
AP21
AP24
AP27
AP3
AP30
AP33
AP6
AP9
B12
B15
B21
B24
B27
B3
B30
B33
B6
B9
C2
C34
E12

NVVDD Decoupling
+VGPU_CORE
PLACE UNDER BALLS

2/16

C72
C73
C117
C108
C78
C92
C125
C95
C115
C116
C69
C94
C75
C106
C91
C120

[email protected]/25V_4
[email protected]/25V_4
[email protected]/25V_4
[email protected]/25V_4
[email protected]/25V_4
[email protected]/25V_4
[email protected]/16V_4
[email protected]/16V_4
[email protected]/16V_4
[email protected]/16V_4
[email protected]/25V_4
[email protected]/25V_4
[email protected]/25V_4
[email protected]/6.3V_4
[email protected]/6.3V_4
ES@1U/6.3V_4

C113

C81
C105

ES@10U/6.3V_6
ES@10U/6.3V_6

11/27 Modify to CC0603

none

WINDBOND

AL83L771K02

GROUND

ES@330u/2V_7343

GND_096
GND_097
GND_098
GND_099
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191

GMT

AL000780003

1
Q30
*ES@2N7002D
+3V_GFX

E15
E18
E24
E27
E30
E6
E9
F2
F31
F34
F5
J2
J31
J34
J5
L9
M11
M13
M15
M17
M19
M2
M21
M23
M25
M31
M34
M5
N11
N12
N13
N14
N15
N16
N17
N18
N19
N20
N21
N22
N23
N24
N25
P12
P14
P16
P18
P20
P22
P24
R2
R31
R34
R5
T11
T13
T15
T17
T19
T21
T23
T25
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
U24
U25
V12
V14
V16
V18
V2
V20
V22
V24
V31
V5
V9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25

+3V_GFX
*[email protected]/10V_4
C553

*ES@10K_4
R426
U27

19,36 MXM_SMDATA12

1
Q31
*ES@2N7002D
19

GPU_SMCLK

GPU_SMDATA

7
6

ALERT#

19,36 VGA_THERM#

SCLK

VCC

SDA

DXP

ALERT#

DXN

OVERT#

GND

GPU_D+

C554

*ES@2200p/50V_4
GPU_D-

10/20 Modify
*ES@G780-1P81U(MSOP)

ADDRESS: 9AH

Quanta Computer Inc.

C151

GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_081
GND_082
GND_083
GND_084
GND_085
GND_086
GND_087
GND_088
GND_089
GND_090
GND_091
GND_092
GND_093
GND_094
GND_095

19,36 MXM_SMCLK12

VDD_001
VDD_002
VDD_003
VDD_004
VDD_005
VDD_006
VDD_007
VDD_008
VDD_009
VDD_010
VDD_011
VDD_012
VDD_013
VDD_014
VDD_015
VDD_016
VDD_017
VDD_018
VDD_019
VDD_020
VDD_021
VDD_022
VDD_023
VDD_024
VDD_025
VDD_026
VDD_027
VDD_028
VDD_029
VDD_030
VDD_031
VDD_032
VDD_033
VDD_034
VDD_035
VDD_036
VDD_037
VDD_038
VDD_039
VDD_040
VDD_041
VDD_042
VDD_043
VDD_044
VDD_045
VDD_046
VDD_047
VDD_048
VDD_049
VDD_050
VDD_051
VDD_052
VDD_053
VDD_054
VDD_055
VDD_056

fcbga973-nvidia-n11p-es-a1

COMMON

AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AC11
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC24
AC25
AD12
AD14
AD16
AD18
AD22
AD24
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
M12
M14
M16
M18
M20
M22
M24
P11
P13
P15
P17
P19

R427
*ES@10K_4

U33G

fcbga973-nvidia-n11p-es-a1

+3V_GFX

U33F

+VGPU_CORE

Thermal Sensor

ES@ --> External VGA SKU

VSP@ --> Operation P/N (VGA)

11/25 Modify.

PROJECT :
PLACE NEAR BALLS

Size

Document Number

Date:

Monday, February 22, 2010

ZR7
Rev
3B

N11P-GE (POWER & GND&THM) 5/5

Sheet

20
8

ES@ --> External VGA SKU

VSP@ --> Operation P/N (VGA-VRAM)

17 VMA_DQ[63..0]
17 VMA_DM[7..0]
17 VMA_WDQS[7..0]
17 VMA_RDQS[7..0]

VREFCA
VREFDQ

17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17

VMA_CMD7
VMA_CMD20
VMA_CMD4
VMA_CMD14
VMA_CMD17
VMA_CMD6
VMA_CMD26
VMA_CMD3
VMA_CMD1
VMA_CMD10
VMA_CMD21
VMA_CMD5
VMA_CMD22
VMA_CMD18
VMA_CMD29
VMA_CMD30

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

17
17
17

VMA_CMD12
VMA_CMD9
VMA_CMD13

M2
N8
M3

BA0
BA1
BA2

17
17
17

VMA_CLKP0
VMA_CLKN0
VMA_CMD0

J7
K7
K9

CK
CK
CKE

17
17
17
17
17

VMA_CMD25
VMA_CMD2
VMA_CMD24
VMA_CMD8
VMA_CMD19

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

VMA_WDQS2
VMA_RDQS2

F3
G3

DQSL
DQSL

VMA_DM2
VMA_DM0

E7
D3

DML
DMU

VMA_WDQS0
VMA_RDQS0

C7
B7

DQSU
DQSU

RESET

VMA_CMD28
VMA_ZQ1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

Should be 240
Ohms +-1%
R4
ES@243/F_4
J1
L1
J9
L9

NC#J1
NC#L1
NC#J9
NC#L9

U30
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMA_DQ16
VMA_DQ22
VMA_DQ18
VMA_DQ23
VMA_DQ19
VMA_DQ20
VMA_DQ17
VMA_DQ21

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMA_DQ7
VMA_DQ2
VMA_DQ5
VMA_DQ1
VMA_DQ6
VMA_DQ0
VMA_DQ4
VMA_DQ3

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VREFC_VMA1
VREFD_VMA1

M8
H1

VMA_CMD7
VMA_CMD20
VMA_CMD4
VMA_CMD14
VMA_CMD17
VMA_CMD6
VMA_CMD26
VMA_CMD3
VMA_CMD1
VMA_CMD10
VMA_CMD21
VMA_CMD5
VMA_CMD22
VMA_CMD18
VMA_CMD29
VMA_CMD30

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

VMA_CMD12
VMA_CMD9
VMA_CMD13

M2
N8
M3

BA0
BA1
BA2

VMA_CLKP0
VMA_CLKN0
VMA_CMD0

J7
K7
K9

CK
CK
CKE

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

VMA_CMD25
VMA_CMD2
VMA_CMD24
VMA_CMD8
VMA_CMD19

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

VMA_WDQS3
VMA_RDQS3

F3
G3

DQSL
DQSL

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VMA_DM3
VMA_DM1

E7
D3

DML
DMU

VMA_WDQS1
VMA_RDQS1

C7
B7

DQSU
DQSU

VMA_CMD28

RESET

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5V_GFX

CHANNEL A: 256MB/512MB DDR3

U2
VREFC_VMA1 M8
VREFD_VMA1 H1

VMA_ZQ2

Should be 240
Ohms +-1%
R423
ES@243/F_4
J1
L1
J9
L9

96-BALL
SDRAM DDR3
VSP@VRAM_DDR3

VREFCA
VREFDQ

NC#J1
NC#L1
NC#J9
NC#L9

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMA_DQ30
VMA_DQ26
VMA_DQ29
VMA_DQ28
VMA_DQ31
VMA_DQ25
VMA_DQ27
VMA_DQ24

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMA_DQ12
VMA_DQ10
VMA_DQ15
VMA_DQ8
VMA_DQ13
VMA_DQ11
VMA_DQ14
VMA_DQ9

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

17 VMA_CLKP1
17 VMA_CLKN1
17 VMA_CMD27

+1.5V_GFX

17 VMA_CMD16
17 VMA_CMD11

VREFC_VMA3
VREFD_VMA3

M8
H1

VMA_CMD22
VMA_CMD4
VMA_CMD20
VMA_CMD9
VMA_CMD6
VMA_CMD17
VMA_CMD3
VMA_CMD26
VMA_CMD1
VMA_CMD5
VMA_CMD19
VMA_CMD10
VMA_CMD7
VMA_CMD29
VMA_CMD18
VMA_CMD13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

VMA_CMD12
VMA_CMD14
VMA_CMD30

M2
N8
M3

BA0
BA1
BA2

VMA_CMD27

J7
K7
K9

CK
CK
CKE

VMA_CMD16
VMA_CMD11
VMA_CMD24
VMA_CMD8
VMA_CMD21

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

VMA_WDQS5
VMA_RDQS5

F3
G3

DQSL
DQSL

VMA_DM5
VMA_DM4

E7
D3

DML
DMU

VMA_WDQS4
VMA_RDQS4

C7
B7

DQSU
DQSU

VMA_CMD28

RESET

VMA_ZQ3

Should be 240
Ohms +-1%
R1
ES@243/F_4
J1
L1
J9
L9

96-BALL
SDRAM DDR3
VSP@VRAM_DDR3
+1.5V_GFX

U29
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMA_DQ45
VMA_DQ43
VMA_DQ44
VMA_DQ41
VMA_DQ47
VMA_DQ40
VMA_DQ46
VMA_DQ42

VREFC_VMA3
VREFD_VMA3

M8
H1

VREFCA
VREFDQ

VMA_CMD22
VMA_CMD4
VMA_CMD20
VMA_CMD9
VMA_CMD6
VMA_CMD17
VMA_CMD3
VMA_CMD26
VMA_CMD1
VMA_CMD5
VMA_CMD19
VMA_CMD10
VMA_CMD7
VMA_CMD29
VMA_CMD18
VMA_CMD13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMA_DQ36
VMA_DQ39
VMA_DQ32
VMA_DQ38
VMA_DQ33
VMA_DQ37
VMA_DQ34
VMA_DQ35

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VMA_CMD12
VMA_CMD14
VMA_CMD30

M2
N8
M3

BA0
BA1
BA2

VMA_CLKP1
VMA_CLKN1
VMA_CMD27

J7
K7
K9

CK
CK
CKE

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

VMA_CMD16
VMA_CMD11
VMA_CMD24
VMA_CMD8
VMA_CMD21

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

VMA_WDQS7
VMA_RDQS7

F3
G3

DQSL
DQSL

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VMA_DM7
VMA_DM6

E7
D3

DML
DMU

VMA_WDQS6
VMA_RDQS6

C7
B7

DQSU
DQSU

VMA_CMD28

RESET

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

VREFCA
VREFDQ

NC#J1
NC#L1
NC#J9
NC#L9

+1.5V_GFX

VMA_ZQ4

Should be 240
Ohms +-1%
R433
ES@243/F_4
J1
L1
J9
L9

96-BALL
SDRAM DDR3
VSP@VRAM_DDR3

NC#J1
NC#L1
NC#J9
NC#L9

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMA_DQ58
VMA_DQ63
VMA_DQ56
VMA_DQ61
VMA_DQ59
VMA_DQ57
VMA_DQ60
VMA_DQ62

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMA_DQ51
VMA_DQ53
VMA_DQ50
VMA_DQ52
VMA_DQ48
VMA_DQ54
VMA_DQ49
VMA_DQ55

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5V_GFX

96-BALL
SDRAM DDR3
VSP@VRAM_DDR3

+1.5V_GFX

10/21 Add for NV Request

VMA_CLKP0

R422
[email protected]/F_4

10/21 Add for NV Request

R417
[email protected]/F_4

+1.5V_GFX

VREFC_VMA1

VREFD_VMA1

C14
C6
C537
C538
C557
C559
C7
C560

VMA_CLKN0
C564
C539
C563
C16
C15
C13
C1
C2

ES@1U/6.3V_4
ES@1U/6.3V_4
ES@1U/6.3V_4
ES@1U/6.3V_4
ES@1U/6.3V_4
ES@1U/6.3V_4
ES@1U/6.3V_4
ES@1U/6.3V_4

R419
[email protected]/F_4

C546

R424

C533
[email protected]/10V_4

+1.5V_GFX

R420
[email protected]/F_4

VMA_CLKP1

R3
ES@243/F_4

R2
ES@243/F_4

ES@1U/6.3V_4
ES@1U/6.3V_4
ES@1U/6.3V_4
ES@1U/6.3V_4
ES@1U/6.3V_4
ES@1U/6.3V_4
ES@1U/6.3V_4
ES@1U/6.3V_4

R416
[email protected]/F_4

VREFC_VMA3

VREFD_VMA3

VMA_CLKN1
R421

C542

R418

C545

+1.5V_GFX

+1.5V_GFX
+1.5V_GFX
C551
C18
C10
C541
C536

ES@1U/6.3V_4
ES@1U/6.3V_4
ES@1U/6.3V_4
ES@1U/6.3V_4

C20
C556

C4
C19
C3
C5
C17
C12
C535
C562

*ES@10u/6.3V_6
[email protected]/10V_4
[email protected]/10V_4

[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4

C21
C534
C11
C561
C540

[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4

+1.5V_GFX
C544
C552
C543
C558

[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4

Quanta Computer Inc.

PROJECT :
Size

ZR7

Document Number

Rev
3B

N11P-GE VRAM-1(DDR3 BGA96)

Date:
1

Monday, February 22, 2010

Sheet

21
8

11EP@ --> N11P/N11E-GE1 Setting

17 VMC_DQ[63..0]
17 VMC_DM[7..0]
17 VMC_WDQS[7..0]
17 VMC_RDQS[7..0]

VSP@ --> Operation P/N (VGA-VRAM CH:B N11P/N11E only)

CHANNEL B: 256MB/512MB DDR3

U34
VREFC_VMC1
VREFD_VMC1

17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17

VMC_CMD7
VMC_CMD20
VMC_CMD4
VMC_CMD14
VMC_CMD17
VMC_CMD6
VMC_CMD26
VMC_CMD3
VMC_CMD1
VMC_CMD10
VMC_CMD21
VMC_CMD5
VMC_CMD22
VMC_CMD18
VMC_CMD29
VMC_CMD30

17
17
17

VMC_CMD12
VMC_CMD9
VMC_CMD13

M2
N8
M3

BA0
BA1
BA2

17
17
17

VMC_CLKP0
VMC_CLKN0
VMC_CMD0

J7
K7
K9

CK
CK
CKE

VMC_CMD25
VMC_CMD2
VMC_CMD24
VMC_CMD8
VMC_CMD19
VMC_WDQS2
VMC_RDQS2
VMC_DM2
VMC_DM0
VMC_WDQS0
VMC_RDQS0

VREFCA
VREFDQ

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

17
17
17
17
17

M8
H1

VMC_CMD28
VMC_ZQ1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

F3
G3

DQSL
DQSL

E7
D3

DML
DMU

C7
B7

DQSU
DQSU

RESET

Should be 240
Ohms +-1%
R452
11EP@243/F_4
J1
L1
J9
L9

NC#J1
NC#L1
NC#J9
NC#L9

U3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMC_DQ22
VMC_DQ21
VMC_DQ23
VMC_DQ16
VMC_DQ20
VMC_DQ17
VMC_DQ18
VMC_DQ19

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMC_DQ3
VMC_DQ6
VMC_DQ0
VMC_DQ7
VMC_DQ1
VMC_DQ5
VMC_DQ2
VMC_DQ4

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VREFC_VMC1
VREFD_VMC1

M8
H1

VREFCA
VREFDQ

VMC_CMD7
VMC_CMD20
VMC_CMD4
VMC_CMD14
VMC_CMD17
VMC_CMD6
VMC_CMD26
VMC_CMD3
VMC_CMD1
VMC_CMD10
VMC_CMD21
VMC_CMD5
VMC_CMD22
VMC_CMD18
VMC_CMD29
VMC_CMD30

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

VMC_CMD12
VMC_CMD9
VMC_CMD13

M2
N8
M3

BA0
BA1
BA2

VMC_CLKP0
VMC_CLKN0
VMC_CMD0

J7
K7
K9

CK
CK
CKE

+1.5V_GFX

A1
A8
C1
C9
D2
E9
F1
H2
H9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

VMC_CMD25
VMC_CMD2
VMC_CMD24
VMC_CMD8
VMC_CMD19

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

VMC_WDQS3
VMC_RDQS3

F3
G3

DQSL
DQSL

VMC_DM3
VMC_DM1

E7
D3

DML
DMU

VMC_WDQS1
VMC_RDQS1

C7
B7

DQSU
DQSU

VMC_CMD28

RESET

VMC_ZQ2

Should be 240
Ohms +-1%
R50
11EP@243/F_4
J1
L1
J9
L9

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMC_DQ24
VMC_DQ30
VMC_DQ26
VMC_DQ28
VMC_DQ25
VMC_DQ31
VMC_DQ27
VMC_DQ29

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMC_DQ8
VMC_DQ14
VMC_DQ9
VMC_DQ12
VMC_DQ11
VMC_DQ13
VMC_DQ10
VMC_DQ15

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

NC#J1
NC#L1
NC#J9
NC#L9

+1.5V_GFX

17 VMC_CLKP1
17 VMC_CLKN1
17 VMC_CMD27
17 VMC_CMD16
17 VMC_CMD11

VREFC_VMC3
VREFD_VMC3

M8
H1

VMC_CMD22
VMC_CMD4
VMC_CMD20
VMC_CMD9
VMC_CMD6
VMC_CMD17
VMC_CMD3
VMC_CMD26
VMC_CMD1
VMC_CMD5
VMC_CMD19
VMC_CMD10
VMC_CMD7
VMC_CMD29
VMC_CMD18
VMC_CMD13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

VMC_CMD12
VMC_CMD14
VMC_CMD30

M2
N8
M3

BA0
BA1
BA2

VMC_CMD27

J7
K7
K9

CK
CK
CKE

VMC_CMD16
VMC_CMD11
VMC_CMD24
VMC_CMD8
VMC_CMD21

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

VMC_WDQS4
VMC_RDQS4

F3
G3

DQSL
DQSL

VMC_DM4
VMC_DM5

E7
D3

DML
DMU

VMC_WDQS5
VMC_RDQS5

C7
B7

DQSU
DQSU

VMC_CMD28

RESET

VMC_ZQ3

Should be 240
Ohms +-1%

B1
B9
D1
D8
E2
E8
F9
G1
G9

R23
11EP@243/F_4
J1
L1
J9
L9

96-BALL
SDRAM DDR3
VSP@VRAM_DDR3

96-BALL
SDRAM DDR3
VSP@VRAM_DDR3
+1.5V_GFX

VMC_CLKP0

U32
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMC_DQ36
VMC_DQ34
VMC_DQ39
VMC_DQ32
VMC_DQ37
VMC_DQ35
VMC_DQ38
VMC_DQ33

VREFC_VMC3
VREFD_VMC3

M8
H1

VREFCA
VREFDQ

VMC_CMD22
VMC_CMD4
VMC_CMD20
VMC_CMD9
VMC_CMD6
VMC_CMD17
VMC_CMD3
VMC_CMD26
VMC_CMD1
VMC_CMD5
VMC_CMD19
VMC_CMD10
VMC_CMD7
VMC_CMD29
VMC_CMD18
VMC_CMD13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMC_DQ42
VMC_DQ47
VMC_DQ41
VMC_DQ45
VMC_DQ44
VMC_DQ43
VMC_DQ40
VMC_DQ46

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VMC_CMD12
VMC_CMD14
VMC_CMD30

M2
N8
M3

BA0
BA1
BA2

VMC_CLKP1
VMC_CLKN1
VMC_CMD27

J7
K7
K9

CK
CK
CKE

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

VMC_CMD16
VMC_CMD11
VMC_CMD24
VMC_CMD8
VMC_CMD21

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

VMC_WDQS6
VMC_RDQS6

F3
G3

DQSL
DQSL

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VMC_DM6
VMC_DM7

E7
D3

DML
DMU

VMC_WDQS7
VMC_RDQS7

C7
B7

DQSU
DQSU

VMC_CMD28

RESET

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

VREFCA
VREFDQ

NC#J1
NC#L1
NC#J9
NC#L9

+1.5V_GFX

VMC_ZQ4

Should be 240
Ohms +-1%
R438
11EP@243/F_4
J1
L1
J9
L9

96-BALL
SDRAM DDR3
VSP@VRAM_DDR3

NC#J1
NC#L1
NC#J9
NC#L9

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMC_DQ49
VMC_DQ48
VMC_DQ55
VMC_DQ53
VMC_DQ52
VMC_DQ50
VMC_DQ54
VMC_DQ51

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMC_DQ61
VMC_DQ58
VMC_DQ62
VMC_DQ59
VMC_DQ60
VMC_DQ56
VMC_DQ63
VMC_DQ57

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5V_GFX

VMC_CLKP1

R55

+1.5V_GFX

96-BALL
SDRAM DDR3
VSP@VRAM_DDR3

+1.5V_GFX

R446

+1.5V_GFX

R14

R437

10/21 Add for NV Request

R451
11EP@243/F_4

+1.5V_GFX

VREFC_VMC1

R21
11EP@243/F_4

VREFD_VMC1

11EP@1U/6.3V_4
11EP@1U/6.3V_4
11EP@1U/6.3V_4
11EP@1U/6.3V_4
11EP@1U/6.3V_4
11EP@1U/6.3V_4
11EP@1U/6.3V_4
11EP@1U/6.3V_4

R445

C590

R54

C152

R15

C38

C571

+1.5V_GFX

C135
C131
C142
C162
C587
C588
C597
C582

+1.5V_GFX

+1.5V_GFX
+1.5V_GFX
C592
C29
C114
C159
C121
C593

*11EP@10u/6.3V_6
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4

C595
C572
C591
C46
C577
C575
C167
C33

[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4

C585
C70

C570
C41
C568
C594
C171

[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4

11EP@1U/6.3V_4
11EP@1U/6.3V_4
11EP@1U/6.3V_4
11EP@1U/6.3V_4
11EP@1U/6.3V_4
11EP@1U/6.3V_4
11EP@1U/6.3V_4
11EP@1U/6.3V_4

Quanta Computer Inc.

PROJECT :
Size

ZR7

Document Number

Rev
3B

N11P-GE VRAM-2(DDR3 BGA96)

Date:

R436

10/21 Add for NV Request

+1.5V_GFX

11EP@1U/6.3V_4
11EP@1U/6.3V_4
11EP@1U/6.3V_4
11EP@1U/6.3V_4

VREFD_VMC3

VMC_CLKN1

C128
C25
C584
C578

VREFC_VMC3

VMC_CLKN0
C49
C65
C55
C579
C580
C581
C567
C569

Monday, February 22, 2010

Sheet

22
8

3.3V or 5V level?

EV_LVDS/CRT

INT_LVDS/CRT

U12

16
2
5
11
14

18 EV_CRT_BLU
18 EV_CRT_GRN
18 EV_CRT_RED

3
6
10
13

INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED

dGPU_SELECT#

GND

IA0
IB0
IC0
ID0

YA
YB

IA1
IB1
IC1
ID1

YC
YD

VGA_BLU

VGA_GRN

VGA_RED

iGPU
only

+5V

2
5
11
14

INT_CRT_DDCCLK
INT_CRT_DDCDAT
INT_LVDS_EDIDDATA
INT_LVDS_EDIDCLK

3
6
10
13

S
OE
SW@SN74CBT3257CPWR

LCD_EDIDDATA

BLM18BA750SN1D/0.3A/75ohm_6

CRT_R1

VGA_GRN

L13

BLM18BA750SN1D/0.3A/75ohm_6

CRT_G1

VGA_BLU

L12

BLM18BA750SN1D/0.3A/75ohm_6

CRT_B1

R139

R128

R109

C219

C214

C199

C200

C203

C217

150/F_4

10p/50V_4

YA
YB

IA1
IB1
IC1
ID1

YC
YD

LVDS_BLON_R

R133
R110
R111
R126
R117
R86
R102
R104
R98

IV@0_4
IV@0_4
IV@0_4
IV@0_4
IV@0_4
IV@0_4
IV@0_4
IV@0_4
IV@0_4

INT_LVDS_DIGON
INT_LVDS_BLON

1
3
RN10

LVDS_VDDEN
2
LVDS_BLON
4
IV@0_4P2R

VGA_RED
VGA_GRN
VGA_BLU
VSYNC
HSYNC
CRTDDATA
CRTDCLK
LCD_EDIDDATA
LCD_EDIDCLK

LVDS_VDDEN_R

HSYNC

VSYNC

10/18

dGPU
only

46
45

18 EV_TXLOUT2+
18 EV_TXLOUT2-

44
43

18 EV_TXLOUT1+
18 EV_TXLOUT1-

41
40

18 EV_TXLOUT0+
18 EV_TXLOUT0-

39
38

8 INT_TXLCLKOUT+
8 INT_TXLCLKOUT-

35
34

8 INT_TXLOUT2+
8 INT_TXLOUT2-

33
32

8 INT_TXLOUT1+
8 INT_TXLOUT1-

30
29

8 INT_TXLOUT0+
8 INT_TXLOUT0-

28
27

A2P
A2N

C2P
C2N

A1P
A1N

IN_A

C1P
C1N

OUT_C

A0P
A0N

C0P
C0N

ACLKP
ACLKN

CCLKP
CCLKN

EV_LVDS_VDDEN
EV_LVDS_BLON

S
6
7

TXLOUT2+
TXLOUT2-

15
16

TXLOUT1+
TXLOUT1-

18
19

TXLOUT0+
TXLOUT0-

0
+1.8V

EV_LVDS

IN_B

BCLKP
BCLKN
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

CRT_R1
CRT_G1
CRT_B1

INT_LVDS

1
3
5
8
11
14
17
20
22
24
26
31
37
42
47

C181

C190

C90

C102

.1u/10V_4

1000p/50V_4

4.7u/25V_8

1000p/50V_4

VIN

C192

R105

*SW@100K_4

1/11 Add L48 by EMI

dGPU_SELECT#

*SHORT_8
*SHORT_8

INVCC0

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

36 PANEL_COLOR
36 PANEL_ENG
BL_ON
L48
LVDS_BRIGHT_R
SBY100505T-121Y-N

LVDS_BRIGHT

EV_LVDS_BRIGHT#

18 EV_TXUCLKOUT+
18 EV_TXUCLKOUT-

U11
*SW@OR_GATE

18 EV_TXUOUT2+
18 EV_TXUOUT2-

10/22 Modify Footprint

18 EV_TXUOUT1+
18 EV_TXUOUT1R92

*SW@10K_4

18 EV_TXUOUT0+
18 EV_TXUOUT0-

EV_LVDS_BRIGHT#

TXLCLKOUT+
TXLCLKOUTTXLOUT2+
TXLOUT2-

Q8
*SW@2N7002D

TXLOUT1+
TXLOUT1TXLOUT0+
TXLOUT0+3V

R79
R80

2.2K_4
2.2K_4

LCD_EDIDCLK
LCD_EDIDDATA

LCDVCC
C143

iGPU only

8 INT_LVDS_BRIGHT
R43

CONTRAST

SW@0_4

10/18

S
YA
GND

PWM_SELECT#

LVDS_BRIGHT

R53

9,10

INT_TXLCLKOUTINT_TXLCLKOUT+
INT_TXLOUT0INT_TXLOUT0+
INT_TXLOUT1INT_TXLOUT1+
INT_TXLOUT2INT_TXLOUT2+

RN1

1/14 Change pin3,4 define.

R493
R494

RN4
RN3
RN2

CRTVDD5

2.7K_4
2.7K_4

R492

R503

2.7K_4

Stuff R713 on 2 CH.

5V_LCD

C631

*.1u/10V_4

CRTVDD5

C629

*10p/50V_4

CRTVSYNC

C630

*10p/50V_4

CRTHSYNC

C614

10p/50V_4

DDCCLK_1

C632

10p/50V_4

DDCDAT_1

2
4
2
4
2
4
2
4

IV@0_4P2R

V2@0_1206

LVDS_VDDEN

IV@0_4P2R
IV@0_4P2R
IV@0_4P2R

SW@0_4

LVDS_VDDEN

U10

OUT

GND

ON/OFF

GND

LCDVCC

1
2
5

C198

C195

C196

C197

C194

*.1u/10V_4

*2.2u/10V_8

.1u/10V_4

.01u/25V_4

22u/6.3V_8

1U/6.3V_4
AAT4280-4
+3V
*[email protected]_4
C187

5V_LCD

R99

*SW@100K_4

EV_LVDS_VDDEN

INT_LVDS_DIGON

10/22 Modify Footprint

+5V

*SHORT_PAD

U8
*SW@OR_GATE

1/15 Add

G_4

10/20 Modify

Backlight Control

LVDS_BLON_R

R122

SW@0_4

LVDS_BLON

LID591#,EC intrnal PU
LID591#

+3V

G_1

R46
R37

33,36

10K_4
BL_ON

10K_4

10/16
*SW@100K_4

LVDS_BLON

2
2

Q3
2N7002D

EC_FPBACK#

Q2
DTC144EU

2
Q4
2N7002D

11/16 Change CN3 to 8pin conn.

EV@0_4

EV_TXLCLKOUTEV_TXLCLKOUT+
EV_TXLOUT0EV_TXLOUT0+
EV_TXLOUT1EV_TXLOUT1+
EV_TXLOUT2EV_TXLOUT2+

RN6
RN9
RN8
RN7

10/22 Modify Footprint

CN3

dGPU only

10/18 Add , 10/20 Swap

3
1
3
1
3
1
3
1

4 EV@0_4P2R
2
4 EV@0_4P2R
2
4 EV@0_4P2R
2
4 EV@0_4P2R
2

8
7
6
5
4
3
2
1

+3V

IV@0_4

USBP8-_R
USBP8+_R

TXLCLKOUTTXLCLKOUT+
TXLOUT0TXLOUT0+
TXLOUT1TXLOUT1+
TXLOUT2TXLOUT2+

29
29

DMIC_CLK_1
DMIC0_1

10
9

+3V
C89

EV_LVDS_BLON

INT_LVDS_BLON

4
8P_CON

R29

U4
*SW@OR_GATE

*0_4

L2
10
10

USBP8USBP8+

2
3

1
4

USBP8-_R
USBP8+_R

Quanta Computer Inc.

DLW21HN900SQ2L/300mA/90ohm
R28

PROJECT : ZR7

*0_4

11/26 Change footprint

1/11 Stuff L2.
1

D3
BAS316

11/19 Change LVDS to two channel.

CCD & MIC

R121

LVDS_VDDEN_R

GS12401-1011-40P-R-NH

TXLCLKOUTTXLCLKOUT+
TXLOUT0TXLOUT0+
TXLOUT1TXLOUT1+
TXLOUT2TXLOUT2+

10/20 Modify

R713

BL#

1
3
1
3
1
3
1
3

SW@74LVC1G3157GW
R51

DDCCLK_1
DDCDAT_1

R39

9
12

CN5

2A
R30
R31

DDCCLK_1

Stuff R712 on 1 CH.

11/27 Add CN5

pin45 to GND

+3V

GND

CRTDCLK
CRTDDATA

+3V

CRTVSYNC

CRTVSYNC
CRTHSYNC

+3V

10
11

V1@0_6

dGPU_SELECT#

Brightness

DDC_OUT1
DDC_OUT2

INVCC0

10/16

*ES@0_4

DDC_IN1
DDC_IN2

C191

19 EV_LVDS_BRIGHT

R47

VIDEO_1
VIDEO_2
VIDEO_3

R712

R106

R97
SW@100K_4

T101

LCD_ON (LCD Power)

LVDS

10/16

VCC

15
13

dGPU_SELECT_R

CRTHSYNC

CM2009-02QR

0_4
0_4

VSYNC
HSYNC

+3V

3
4
5
6

SW@TS3DV421DGVR

+1.8V

R501
R502

CRT_VSYNC2
CRT_HSYNC2

16
14

VCC_SYNC SYNC_OUT2
SYNC_OUT1
VCC_DDC
BYP
SYNC_IN2
VCC_VIDEO
SYNC_IN1

1/7 Modify.

B0P
B0N

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

.22u/25V_6

.1u/10V_4

SW@0_4

B1P
B1N

CRT_BYP

7
8

C626

Output

48
36
25
23
21
12
4
2

SEL

DDCDAT_1

LVDS_VDDEN
2
LVDS_BLON
4
EV@0_4P2R

SW@2N7002D
Q12

B2P
B2N

+3V

VGA_RED
VGA_GRN
VGA_BLU
VSYNC
HSYNC
CRTDDATA
CRTDCLK
LCD_EDIDDATA
LCD_EDIDCLK

dGPU_SELECT#

CRT_11

U36
CRTVDD5

.1u/10V_4

+3V

TXLCLKOUT+
TXLCLKOUT-

9
10

EV@0_4
EV@0_4
EV@0_4
EV@0_4
EV@0_4
EV@0_4
EV@0_4
EV@0_4
EV@0_4

1
3

RN5

18 EV_TXLCLKOUT+
18 EV_TXLCLKOUT-

R134
R107
R108
R127
R118
R78
R101
R87
R88

+3V

C615
EV_CRT_RED
EV_CRT_GRN
EV_CRT_BLU
EV_VSYNC
EV_HSYNC
EV_CRTDDAT
EV_CRTDCLK
EV_LVDS_DDCDAT
EV_LVDS_DDCCLK

CN13
CRT

6
1
7
2
8
3
9
4
10
5

IA0
IB0
IC0
ID0

SSM22LLPT

L14

10/20 Modify

LVDS Switch

INT_CRT_RED
INT_CRT_GRN
INT_CRT_BLU
INT_VSYNC
INT_HSYNC
INT_CRT_DDCDAT
INT_CRT_DDCCLK
INT_LVDS_EDIDDATA
INT_LVDS_EDIDCLK

VGA_RED

12 LCD_EDIDCLK

CRTDDATA

GND

S
OE
SW@SN74CBT3257CPWR

C188

CRTDCLK

dGPU_SELECT#

SW@1000p/50V_4
SW@1000p/50V_4
[email protected]/6.3V_4
[email protected]/10V_4
[email protected]/10V_4

IA1
IB1
IC1
ID1

3
6
10
13

8 INT_LVDS_BLON
8 INT_LVDS_DIGON
8 INT_HSYNC
8 INT_VSYNC

C182
C161
C175
C172
C189

2
5
11
14

VCC

updatefootprint 12/11

CRTVDD5

G_6

19 EV_LVDS_BLON
19 EV_LVDS_VDDEN
18 EV_HSYNC
18 EV_VSYNC

19 EV_LVDS_BRIGHT

SMD1206P110TFT

IA0
IB0
IC0
ID0

G_5

.1u/10V_4

GND

C617
U13

EV_CRTDCLK
EV_CRTDDAT
EV_LVDS_DDCDAT
EV_LVDS_DDCCLK

10,24 dGPU_EDIDSEL#

SW@SN74CBT3257CPWR

C215

VCC

G_0

8
8
8

VCC

8 INT_CRT_DDCCLK
8 INT_CRT_DDCDAT
8 INT_LVDS_EDIDDATA
8 INT_LVDS_EDIDCLK

C193

12/29 Modify

C216

18 EV_CRTDCLK
18 EV_CRTDDAT
19 EV_LVDS_DDCDAT
19 EV_LVDS_DDCCLK

C183
[email protected]/6.3V_4

+5V
+5V

EV@ --> dGPU only

CRT

IV@ --> iGPU only

+5V

Output

SW@ --> iGPU & dGPU Switch

dGPU_SELECT#
dGPU_EDIDSEL#

CRT Switch

Size

Document Number

Date:

Monday, February 22, 2010

Rev
3B

CRT/LVDS/CAMERA/LID
6

Sheet

23
8

iGPU HDMI LEVEL SHIFTER

+3V_GFX

To dGPU HPD

+3V

IV@ --> iGPU only

EV@ --> dGPU only

R506

+3V

HDMI_MB_HP
U17

from PCH

close to pin2/11/15/21/26/33/40/46
+3V

10/16

8 INT_HDMITX0P
8 INT_HDMITX0N
+3V
8 INT_HDMITX2N
8 INT_HDMITX2P

C663

C665

C657

8 INT_HDMITX1P
8 INT_HDMITX1N
+3V

Q42
ES@2N7002D

GND
IN_D1IN_D1+
VCC
IN_D2IN_D2+
GND
IN_D3IN_D3+
VCC
IN_D4IN_D4+
GND

10/16

GND
OUT_D1OUT_D1+
VCC
OUT_D2OUT_D2+
GND
OUT_D3OUT_D3+
VCC
OUT_D4OUT_D4+

24
23
22
21
20
19
18
17
16
15
14
13

+5V

R151

Q44
2N7002D

*10K_4

MB_HDMITX0P
MB_HDMITX0N
+3V

MB_HDMITX2N
MB_HDMITX2P

SDVO I2C Control

MB_HDMITX1P
MB_HDMITX1N
+3V

+5V

Bypass(default)

MB_HDMICLK+
MB_HDMICLK-

MXM_DDCCK_C
MXM_DDCDAT_C
C229

R150
R146

EV@0_4
EV@0_4

MXM_DDCCK
MXM_DDCDAT

U14
SW@SN74CBT3257CPWR

IV@PS8101

VCC

2
5
11
14

IA0
IB0
IC0
ID0

GND

MXM_DDCCK

MXM_DDCDAT

IA1
IB1
IC1
ID1

1
2
3
4
5
6
7
8
9
10
11
12

8 INT_HDMICLK+
8 INT_HDMICLK-

37
38
39
40
41
42
43
44
45
46
47
48
49

10/20 Add

C656

36
35
34
33
32
31
30
29
28
27
26
25

C290

GND
CCT2
CCT1
VCC
DDC_EN
GND
HPD_SINK
SDA_SINK
SCL_SINK
GND
VCC
OE#

C664

GND
VCC
TRIM
HPDEN
GND
REXT
HPD_S
SDA_S
SCL_S
NC
VCC
GND

C355

HDMI_HPD_EC#
Q46
SW@2N7002D
2

Active Buffer
C287

SW@0_4
3

DDCBUF_EN
CFG

+3V

HDMI_HP_EV

R504
10K_4
INT_HDMI_HPD

R187

+3V

CSP@ --> Operation P/N

R479
ES@10K_4

R505
SW@10K_4

HDMI_MB_HP
MB_HDMI_DDCDATA
MB_HDMI_DDCCLK
HDMI_HPD_EC#

SW@ --> iGPU & dGPU Switch

+3V

OE# control for

power saving

To iGPU HPD

ES@ --> External VGA SKU

36 HDMI_HPD_EC#

+3V
[email protected]_4
*[email protected]_4

R155

R189
R188

*[email protected]_4
*[email protected]_4

PC0
+3V
PC1

PC0
PC1

from PCH

DDCBUF_EN
R166

LS_REXT

R156
R157

18 MXM_DDCCK_C
18 MXM_DDCDAT_C

+3V

3
6
10
13

8 SDVO_CTRLCLK
8 SDVO_CTRLDAT
MB_HDMITX2P

IV@499/F_4

Control by pin4 HPDEN_R

R190
R191

*[email protected]_4
*[email protected]_4

CFG

R173

MB_HDMITX2N

10,23 dGPU_EDIDSEL#

MB_HDMITX1P
8 SDVO_CTRLDAT
8 SDVO_CTRLCLK

8dB
4dB
12dB
0dB

HDMI_DDCDATA_SW

R164

IV@0_4

HDMI_DDCCLK_SW

R171

*IV@100/F_4
MB_HDMITX1N

12/29 Modify
MXM_DDCCK

R162
[email protected]_4

MB_HDMI_DDCCLK

Q45
ES@BSN20

D6 2

+5V

R163

NV suggestion near
HDMI connector

*SHORT_6

RB501V-40
1

HDMI_DDCCLK_MB

C286
*.1u/10V_4

SDVO I2C
CSP@ HDMI
For IV: 2.2K ohm

MB_HDMI_DDCCLK

R158
[email protected]_4

For ES:4.7K ohm

R177

*IV@100/F_4

PC0
internal PD
PC1
internal PD
DDCBUF_EN
internal PD
CFG
internal PD
DDC_EN
internal PU

+3V

MB_HDMITX0N

MB_HDMI_DDCDATA

PC1 PC0
PIN4 PIN3 EQ Control
L
H
L
H

IV@0_4

SDVO I2C
CSP@ HDMI
For IV: 2.2K ohm

MB_HDMITX0P

Equalization Control

L
L
H
H

R165

RB501V-40
1

For ES:4.7K ohm

*IV@100/F_4

INT_HDMI_HPD

8 INT_HDMI_HPD

D5 2

+5V

R154

*SHORT_6

HDMI_DDCDATA_MB

MB_HDMICLK+
MXM_DDCDAT
R168

MB_HDMI_DDCDATA

C275

*IV@100/F_4
Q16
ES@BSN20

MB_HDMICLK-

*.1u/10V_4

GPU Switchable Graphic HDMI source

ESD Protect

HDMI connector
CN15

12/29 Delete U15, U16, U18.

MB_HDMITX2P
18
18

HDMITX0N
HDMITX0P

18
18

HDMITX2N
HDMITX2P

18
18

HDMITX1P
HDMITX1N

18
18

HDMICLK+
HDMICLK-

C339
C344

MB_HDMITX0N
MB_HDMITX0P

MB_HDMITX2N
MB_HDMITX1P

C333
C321

MB_HDMITX2N
MB_HDMITX2P

MB_HDMITX1N
MB_HDMITX0P

C317
C311

MB_HDMITX1P
MB_HDMITX1N

MB_HDMITX0N
MB_HDMICLK+

C306
C295

MB_HDMICLK+
MB_HDMICLKR507

To Discrete

R508

R509

R511

R512

R513

R515

12/29 Modify

R514
ES@562/F_4

HDMI_DDCCLK_MB
HDMI_DDCDATA_MB

F2
1

ES@562/F_4
ES@562/F_4
ES@562/F_4
ES@562/F_4
ES@562/F_4
ES@562/F_4
ES@562/F_4

D11

SSM22LLPT

+5V_HDMI
HP_DET

SMD1206P110TFT

MB_HDMICLK-

+5V

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

HDMI_MB_HP

R159

SHELL1
D2+
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0GND
CK+
CK Shield GND
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
SHELL2

1/11 Add C928 by EMI.

20
+3V

C928
2200p/50V_4
23
22

HDMI

*SHORT_4

Q47
R152

+5V

100K_4
ES@2N7002D

Quanta Computer Inc.

R510
ES@100K_4

PROJECT : ZR7
Size

Document Number

Rev
3B

HDMI (PS8101)
Date:
5

Sheet

Monday, February 22, 2010

Giga-LAN AR8151

10/26 Add
+3V_LAN
BCM_CLKREQ# R292

+3V_S5
D

R297

+3V_LAN

*SHORT_6

C459

C458

C461

C462

C460

10u/6.3V_8

1u/6.3V_4

.1u/10V_4

*1000p/50V_4

U23
1

VDD33

PERSTn

WAKEn

10/26 Add
4,10,11,16,27,31,36

PLTRST#

8,27 PCIE_WAKE#
R288

10 CLK_PCIE_LAN_REQ#

*SHORT_4

C687

.1u/10V_4

+VDDCT

CLKREQn

VDDCT

AR8151
5X5mm

1u/6.3V_4

AVDDL

AVDDL_REG

C682

.1u/10V_4

XTLO

C676

1u/6.3V_4

C677

.1u/10V_4

R267

AVDDH

9
RBIAS

40-Pin QFN

XTLI
AVDDH_REG
RBIAS

AVDDH

C424

.1u/10V_4

DVDDL

C442

.1u/10V_4

SMCLK

SMCLK_8151

R298

*0_4

SMDATA

SMDATA_8151

R293

*0_4

TESTMODE

TEST_RST

AVDDH

CLKREQn/LED2

DVDDL

TX_N

TX_P

PCIE_RXP1_LAN_R

AVDDL

LAN_TRD0P

TRXP0

REFCLK_N

LAN_TRD0N

TRXN0

REFCLK_P

NC/AVDDL

AVDDL

.1u/10V_4

AVDDL

Y2
25MHz

C427

33p/50V_4

1.2H

C465

SMB_DATA_ME0 10

.1u/10V_4

C477

.1u/10V_4

C478

PCIE_RX1- 10
PCIE_RX1+ 10
C

.1u/10V_4
CLK_PCIE_LOM# 10
CLK_PCIE_LOM 10

AVDDL

C466

.1u/10V_4

LAN_TRD1P

TRXP1

RX_P

LAN_TRD1N

TRXN1

RX_N

NC/AVDDH

DVDDL_REG

DVDDL

C467

1u/6.3V_4

LAN_ACTLED

C468

.1u/10V_4

AVDDH

PCIE_TX1+ 10
PCIE_TX1- 10

LAN_TRD2P

NC/TRXP2

LED0

LAN_TRD2N

NC/TRXN2

LED1

LAN_LINKLED#

NC/AVDDL

GND

C672

XTLI

AVDDL

SMB_CLK_ME0 10

10/26 Modify

T44
PCIE_RXN1_LAN_R

XTLO

XTLI

2.37K/F_4

C673
33p/50V_4

BCM_CLKREQ#

C684

C675

C443

*10K_4

+3V_LAN

.1u/10V_4

AVDDL

LAN_TRD3P

LAN_TRD3N

NC/TRXP3
NC/TRXN3

L24

LAN_ACTLED 26
LAN_LINKLED# 26
4.7uH/1A_2X2

+VDDCT
C469

C472

C476

10u/6.3V_8

.1u/10V_4

*1000p/50V_4
B

LAN_TRD3N

LAN_TRD3P

LAN_TRD2N

LAN_TRD2P

LAN_TRD1N

LAN_TRD1P

LAN_TRD0N

LAN_TRD0P

AR8151

R271

R270

R269

R268

49.9/F_4

LAN_N4

R272

49.9/F_4

LAN_N3

R273

49.9/F_4

LAN_N2

R274

49.9/F_4

LAN_N1

R275

C396

C395

C394

C393

.1u/10V_4

Quanta Computer Inc.

PROJECT : ZR7
Size

Document Number

Rev
3B

GLAN BCM57780
Date:
5

Monday, February 22, 2010

Sheet
1

TRANSFORMER

+VDDCT
PBY160808T-181Y-N/2A/180ohm_6
L21
+VDDCT_TR

C384

C375

C378

C380

.1u/10V_4

C387

LAN_TRD0P
LAN_TRD0N

25
25

LAN_TRD1P
LAN_TRD1N

25
25

LAN_TRD2P
LAN_TRD2N

25
25

10/22 modify Footprint

Close to Transformer pin 1,4,7,10

25
25

1U/10V_4

U38

LAN_TRD3P
LAN_TRD3N

LAN_TRD0P
LAN_TRD0N

1
2
3

TCT1
TD1+
TD1-

MCT1
MX1+
MX1-

24
23
22

X-TX0P
X-TX0N

LAN_TRD1P
LAN_TRD1N

4
5
6

TCT2
TD2+
TD2-

MCT2
MX2+
MX2-

21
20
19

X-TX1P
X-TX1N

LAN_TRD2P
LAN_TRD2N

7
8
9

TCT3
TD3+
TD3-

MCT3
MX3+
MX3-

18
17
16

X-TX2P
X-TX2N

LAN_TRD3P
LAN_TRD3N

10
11
12

TCT4
TD4+
TD4-

MCT4
MX4+
MX4-

15
14
13

X-TX3P
X-TX3N

LFE9276A-R
R206
75/F_8

Delta9276A-R

DBBL5MLAN01

Delta9276C-R

DB0ZR1LAN00

R218
75/F_8

R228
75/F_8

R241
75/F_8

C368
1500p/3KV_18
C

LAN_ACT_LED_PWR

RJ45

LAN_LINKLED#

CN16
R517

25 LAN_ACTLED

R516

220_8

LAN_ACT_LED_PWR

25 LAN_LINKLED#
R576

YELLOW_N
YELLOW_P

5.1K_4
X-TX0P
X-TX0N
X-TX1P
X-TX2P
X-TX2N
X-TX1N
X-TX3P
X-TX3N

1
2
3
4
5
6
7
8

LAN_LINKLED#
LAN_LNK_LED_PWR

11
12

+3V_LAN

9
10

220_8

GND2
GND1

0+
01+
2+
213+
3-

14
13

R258
R196

*.1u//50V_8

Quanta Computer Inc.

PROJECT : ZR7

GREEN_N
GREEN_P

Size

Document Number

Rev
3B

LAN Transformer and RJ45

Date:

C690

*.1u//50V_8

RJ45

C349

*SHORT_6
*SHORT_6

Monday, February 22, 2010

Sheet
7

of
8

CL_DATA1_WLAN
CL_CLK1_WLAN

R684
R679
R686

CL_RST1#
CL_DATA1
CL_CLK1

*0_4
*0_4
*0_4

CL_RST1#_WLAN
CL_DATA1_WLAN
CL_CLK1_WLAN

+WL_VDD
A

10
10

PCIE_TX6+
PCIE_TX6-

10
10

PCIE_RX6+
PCIE_RX6-

10 CLK_PCH_SRC2
10 CLK_PCH_SRC2#
10 PCIE_CLK_REQ2#
PCIE_WAKE#_R

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8

15
13
11
9
7
5
3
1

GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

+WL_VDD

UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V

16
14
12
10
8
6
4
2

A_LFRAME#_R
A_LAD3_R
A_LAD2_R
A_LAD1_R
A_LAD0_R

Q49
*2N7002D

+WL_VDD
R635

*SHORT_8

C748
10u/10V_8

+1.5V
RFLED#
R633
*SHORT_4

R697

+WL_VDD

*SHORT_4

RF_LED#

C750
.1u/10V_4

C744
*.1u/10V_4

C746
*.1u/10V_4

32,36

11/19 Add R697 for WI-FI.

USBP13+
USBP13-

10
10

CLK_SDATA 3,14,15
CLK_SCLK 3,14,15

+1.5V

11/25 Modify.

+WL_VDD

PLTRST#
RF_EN
R645
R646
R639
R640
R641

PLTRST# 4,10,11,16,25,31,36

36
0_4
0_4
0_4
0_4
0_4

Debug
LPC_LFRAME# 9,36
LPC_LAD3 9,36
LPC_LAD2 9,36
LPC_LAD1 9,36
LPC_LAD0 9,36

C745
1000p/50V_4

C747
.1u/10V_4

C741
10u/6.3V_8

+1.5V
+WL_VDD

+WL_VDD

+3V

H=5.6mm
MINI_PCIE_H5.6

CN21
10
10
10

+WL_VDD

12/30 modify Footprint

GND

*0_4
*0_4

GND

R680
R696

10
PCI_RST#
10 CLK_LPC_DEBUG

+3.3V: 1000mA
+3.3Vaux:330mA
+1.5V:500mA

Check LED signal. (active high or low)

MINI-CARD WLAN(MPC)

8,25 PCIE_WAKE#

Q51
*DTC144EUA
1

PCIE_WAKE#_R

1/8 Change CN12,CN22 6pin conn footprint for Touch Screen.

+5V
C499

11/27 Add by EMI

10
10

USBP10USBP10+

.1u/16V_4

CN12

*DLW21HN900SQ2L/300mA/90ohm
L46
USBP10-_R
3 3
4 4
USBP10+_R
2 2
1 1
R702

0_4

R703

0_4

6
5
4
3
2
1
TS_6P_CON

+5V

C919

*.1u_4
CN22

11/27 Add by EMI

10
10

*DLW21HN900SQ2L/300mA/90ohm
L47
USBP5-_R
3 3
4 4
USBP5+_R
2 2
1 1

USBP5USBP5+

R704
R705

6
5
4
3
2
1

*0_4
*0_4

*3D@IR_CONN

11/18 Reserve C919, CN22 for NV IR signals on B-test

Quanta Computer Inc.

PROJECT : ZR7
Size

Document Number

Rev
3B

MINI PCI-E card/Touch Screen

Date:
1

Monday, February 22, 2010

Sheet
8

VIN

EE RETURN-PATH CAPACITORS

MAIN SATA HDD

+5V

GND1
RXP
RXN
GND2
TXN
TXP
GND3

1
2
3
4
5
6
7

3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

GND24

C613

*.01u/25V_4

VIN

C715
C712

.01u/25V_4
.01u/25V_4

C523

+3V

SATA_RXN0 9
SATA_RXP0 9

C520

+5V_S5

C521

+5V

+5V_HDD

+5V

R547

*.1u/10V_4

C605

0.1u/25V_4

C761

*.1u/10V_4

C604

0.1u/25V_4

C669

*.1u/10V_4

C547

0.1u/25V_4

*.01u/25V_4

VIN

C293

*.1u/10V_4

C548

0.1u/25V_4

C528

*.1u/10V_4

C603

0.1u/25V_4

C292

*.1u/10V_4

C549

0.1u/25V_4

C668

*.1u/10V_4

C606

0.1u/25V_4

C760

*.1u/10V_4

C64

0.1u/25V_4

C670

C678

C689

C688

C683

C681

100u/6.3V_3528

10u/10V_8

*.1u/16V_4

.01u/25V_4

*.01u/25V_4

C727

*.01u/25V_4

+3V

C512

*.1u/10V_4

+3V

+VCC_CORE

C925

0.1u/25V_4

+1.5V_CPUVDDQ

C926

0.1u/25V_4

C927

+1.1V_VTT

SATA_HDD

1/14 Change footprint.

+1.5V_CPUVDDQ

0.1u/25V_4

11/26 Add for EMI

ODD (SATA)

ODD POWER(ODD)

C921

0.1u/25V_4

C923

0.1u/25V_4

+1.5V_SUS

C924

0.1u/25V_4

Q17
AO6402A

+5V

+3VPCU

*0_8

C250
C247

.01u/25V_4
.01u/25V_4

SATA_RXN1 9
SATA_RXP1 9

MOD_EN_5V

GND15

SATA_RXN1_C
SATA_RXP1_C

1
100K_4

8
9
10
11
12
13

DP
5V
5V
MD
GND
GND

+15V

SATA_TXP1 9
SATA_TXN1 9

Q19
DMN601K-7

C234

C222

C218

.01u/25V_4

*.1u/16V_4

10u/10V_8

C633

*SHORT_4 ODD_EN 2

9 PCH_ODD_EN

R179

*0_4

Q18
DMN601K-7
1

C231

R176

100u/6.3V_3528

C226

36 ODD_POWER

10/20 Unstuff

R175
*100K_4

SATA_ODD

1/14 Change footprint.

1K_4

R142

C338
.1u/25V_6

2
+5V_ODD

SATA_DP

+5V

+5V_ODD

R169
1
2
3
4
5
6
7

R153

6
5
2
1

R172
100K_4

GND
A+
AGND
BB+
GND

0.1u/25V_4

+1.1V_VTT

GND14

C920

11/25 Add for EMI

CN14
C

Quanta Computer Inc.

PROJECT : ZR7
Size

Document Number

Rev
3B

SATA-HDD/ODD/USB-ESATA
Date:
1

*.1u/10V_4

*SHORT_8 +5V_HDD

0.1u/25V_4

C529

*.01u/25V_4

SATA_TXP0 9
SATA_TXN0 9
SATA_RXN0_C
SATA_RXP0_C

0.1u/25V_4

C550

GND23
A

C532

+5V

CN18

Monday, February 22, 2010

Sheet
4

+5V

Mute(ADO)

2/3 Modify RevD

R693

+5V

HD@1K_4
30

HP-L

HP-R

NHD@BAS316

reverse R441
*0_4

ADOGND

R681

MIC1-VREFO-L

*HD@10K_4

*SHORT_4

MIC1-VREFO-R

MIC1-VREFO-L

MIC1-VREFO-R

PD#
3

R630
R621

C731

Codec(ADO)

10u/6.3V_6

C732

EAPD#

BAS316

D21

AMP_MUTE# 36
D

Q54
*HD@DTC144EUA

Q56
*HD@2N7002D

Place next to pin 27

10/22 Add & Modify

ADOGND

C733
+5VA

PCH_AZ_CODEC_RST#

ADOGND

2.2u/6.3V_6

MIC1-VREFO-L

*0_4

PCH_AZ_CODEC_RST#

D20

R629

D22
*BAS316

ADOGND

C730

C739

10u/6.3V_6

.1u/10V_4

+5VA

Place next to pin 25

+
+5VPVDD1

GND_EARTH

PVSS1

JDREF

PVSS2

Sense-B

(Vista Premium Version)

SPK-R-

MIC2-R

R_SPK+

SPK-R+

MIC2-L

PVDD2

SPDIFO2/EAPD

SPDIFO

PGND

DVDD-IO

LINE2-R

LINE2-L

Sense A

PCBEEP
12

Spilt by DGND

RESET#

R_SPK-

R_SPK+

SYNC

R_SPK-

SDATA-IN

Place next to pin 46

C526

C525

.1u/10V_4

10u/6.3V_6

26
AVSS1

AVDD1

27
VREF

LDO-CAP

MIC2-VREFO

31
MIC1-VREFO-L

MIC1-VREFO-R

MONO-OUT

.1u/10V_4

MIC1-L

SPK-L-

10u/6.3V_6

SPK-L+

DVSS2

.1u/10V_4

MIC1-L

BIT-CLK

10u/6.3V_6

MIC1-R

L_SPK-

C763

L_SPK+

EAPD#
C764

MIC1-R

L_SPK-

+5VPVDD2

C770

L_SPK+

*SHORT_6

C769

LINE1-L

SDATA-OUT

R672

+5V

LINE1-R

PD#

.1u/10V_4

C751

10u/6.3V_6

C755

.1u/10V_4

PVDD1

GPIO1/DMIC-CLK

C752

10u/6.3V_6

C756

AVDD2

GPIO0/DMIC-DATA

*SHORT_6

AVSS2

DVDD1

R648

+5V

HP-OUT-L

Spilt by AGND

HP-OUT-R

Place next to pin 38

ADOGND

ANALOG

CPVEE

ADOGND

CBP

U43

CBN

C737
.1u/10V_4

C735
10u/6.3V_6

2.2u/6.3V_6

T111
ADOGND

T113

R656

SENSEA

MIC1-R

MIC1-L

MIC
C

20K/F_4

ADOGND

R668

39.2K/F_4

LINEOUT_JD

R671

20K/F_4

MIC1_JD

LINEOUT_JD
MIC1_JD

ANALOG

ALC271X

DIGITAL

PCBEEP dont coupling any signals if possible

8/17 separate PCBEEP to Digital from Realtek suggestion
1.6Vrms

SPDIF_OUT

+3V

PCBEEP

C773

1u/10V_6 BEEP_1
C780

C772
.1u/10V_4

C779
10u/6.3V_6

100p/50V_4

R691

47K/F_4

SPKR

R690
4.7K_4

1/7 R682 short.

R683

*0_6

+1.5V

R682

*SHORT_6

+3V

23
23

SBK160808T-301Y-N/0.2A/300ohm_6
L45

DMIC0_1

Place next to pin 1

DMIC0
DMIC_CLK

DMIC_CLK_1

L44
SBK160808T-301Y-N/0.2A/300ohm_6
C783
*33p/50V_4

C782
*33p/50V_4

PCH_AZ_CODEC_RST#

EMI request

ACZ_SDIN0_R

R692

22_4

PD#

0V : Power down Class D SPK amplifer

3.3V : Power up Class D SPK amplifer

DIGITAL

C781

PCH_AZ_CODEC_SYNC

PCH_AZ_CODEC_SDIN0

C775

C774

.1u/10V_4

10u/6.3V_6

C766
*100p/50V_4

PCH_AZ_CODEC_SDOUT

PCH_AZ_CODEC_BITCLK

Place next to pin 9

*22p/50V_4

ANALOG

Power (ADO)

L43
UPB201209T-310Y-N/6A/31ohm_8

+5V

R689

*0_6

R688

*0_6

+5VA
U42

GND

SHDN

GND_EARTH don't coupling AGND and SPK signals

OUT

SET

R631

*29.4K/F_4

R582

*SHORT_6

R592
R687
R580
R607

*0_6
*0_6
*0_6
*0_6

C724
C725

*1000p/50V_4
*1000p/50V_4

R392

*SHORT_6

GND_EARTH

R666

*SHORT_6

R655
R661

*0_6
*0_6

*G923-330T1UF
C728

R623
*10K/F_4

C734

C738

C736

10u/10V_3216

.1u/10V_4

+
R609

.1u/10V_4

*0_4

Quanta Computer Inc.

10u/10V_3216
ADOGND

PROJECT : ZR7

ADOGND
ADOGND

Size

Document Number

Rev
3B

REALTEK ALC271/MDC

C730, C787 close U37 pin3 and L65

Date:
4

Monday, February 22, 2010

Sheet
1

MIC

Internal Speaker

MIC1-VREFO-R

29 MIC1-VREFO-R

1/5 Modify to black.

MIC1-VREFO-L

29 MIC1-VREFO-L

Normal OPEN Jack

R615
4.7K/F_4

R588
4.7K/F_4

BLACK

CN19
D

MIC1-L

C726

4.7u/6.3V_6

MIC1_L2

R614

1K/F_4

MIC1_L3

L42

SBK160808T-121Y-N/0.4A/120ohm_6

MIC1_L

MIC1-R

C721

4.7u/6.3V_6

MIC1_R2

R601

1K/F_4

MIC1_R3

L38

SBK160808T-121Y-N/0.4A/120ohm_6

MIC1_R

1
2
6
3
4

CN7
29
29
29
29

MIC1_JD

7
R_SPKR_SPK+
L_SPKL_SPK+

R_SPKR_SPK+
L_SPKL_SPK+

R202
R201
R200
R199

*SHORT_6
*SHORT_6
*SHORT_6
*SHORT_6

R_SPK-_1
R_SPK+_1
L_SPK-_1
L_SPK+_1

5
MIC_JACK
C352
*.22u/25V_6

Max. 100mVrms input for Mic-IN

ADOGND

C353
*.22u/25V_6

C351
*.22u/25V_6

1
25
36
4

SPEAKER-CONN
C350
*.22u/25V_6

MIC1_JD
1

C706
470p/50V_4

C729
470p/50V_4

D9
*VPORT_6
ADOGND

ADOGND
C

HP/SPDIF
+3V_SPD

2/3 R368,R393 modify to 75ohm.

CN20

HP_JD
29

HP-L

HP-R

HP-L

R368

75_4

HPL-1

L27

SBK160808T-121Y-N/0.4A/120ohm_6

HPL_SYS

1
2

HP-R

R393

75_4

HPR-1

L30

SBK160808T-121Y-N/0.4A/120ohm_6

HPR_SYS

3
4
5

R396

R367

C531

C522

*1K_4

2200p/50V_4

7
8
6

Drive
IC

LED

SPDIF

ADOGND
ADOGND
B

SPDIF_OUT

L32

BLM15BD121SN1D/0.3A/120ohm_4

SPDIF_OUT_R

+5VA
+3V_SPD
LINEOUT_JD

R377

+5VA

C527

HP_JD

0.22u/6.3V_4
LINE_JD#

Q50

R397
ADOGND

2N7002D

D19

20K_4
HP_JD

LINEOUT_JD 29

10K_4

Q53
ME2347

+3V

Q52

ADOGND

Quanta Computer Inc.

ADOGND

2N7002D

*VPORT_6

PROJECT : ZR7

ADOGND
Size

Document Number

Rev
3B

AMP /AUDIO JACK CONN

Date:
5

Monday, February 22, 2010

Sheet
1

CARD READER Controller

T110
T112
*SHORT_4 XTALSEL

C743 close PIN46, 47

+1.8V_VDD

Clock input selection

'1' for 48MHz input [Default]
'0' for 12MHz input

C708 close PIN48, 47

+3V_VDD

XTALSEL
CRMD_N
NBMD
XD_CLE/SD_WP
XD_WE#/SD_CD#
DATA1
DATA0
DATA7
DATA6

R642

C530
.1u/16V_4

C742

R644

PLTRST#

*SHORT_4

R636

*SHORT_6
C740

.1u/16V_4

CARD_RST#

C749

+3V

+3V_VDD

U44

*0.47u/10V_6

+3V_VDD

4.7u/10V_6
R657
10
10

330_4

USBP12+
USBP12C765

C767

*5p/50V_4

XI
XO
+1.8V_VDD

1
2
3
4
5
6
7
8
9
10
11
12

GPON7
EXT48IN
RSTN
REXT
VD33P
DP
DM
VS33P
XI
XO
VDD
VDD

8/14 C707 close PIN11, 12

DFHD36MS012

CTRL0, CRTL 1 trace length shorter ,

and surround with GND.

AU6437-GBL

XD_ALE/MS_BS
DATA5
XD_RDY/SD_CMD

36
35
34
33
32
31
30
29
28
27
26
25

CTRL0
DATA5
CTRL2
GPI4
DATA4
DATA3
DATA2
XDWPN
GPI2
XDCEN
EEPDATA
GPI1

10/19

DATA4
DATA3
DATA2
XD_WP#
GPI2
XD_CE#
EEPDATA
GPI1

T115
T114
T116
3

13
14
15
16
17
18
19
20
21
22
23
24

Second

48
47
46
45
44
43
42
41
40
39
38
37

4,10,11,16,25,27,36

*100K_4

VDDHM
GND
VDD
XTALSEL
TRIST
NBMD
CTRL1
CTRL3
DATA1
DATA0
DATA7
DATA6

R643

DFHD36MS006

V18
CF_V33
VCC33
AGND5V
V33
VDDHM
GND
VDD
CTRL4
XDCDN
SDWPEN
EEPCLK

8/14 ZH7 remove R136, R591 and C775

Main

crystal trace width needs at least 10 mils.

EEPCLK
8/14 pin13 output 20mils
C771

18p/50V_4

T117

C777

XI
Y7
12MHz

C776

VCC_XD

4.7u/10V_6
R675
270K_4

18p/50V_4

*0_4

R694

XD_CD#

XO
XD_RE#/MS_INS#

SD write protect
1:decided by SDWP[Default]
0:letting SD always
write-able

+1.8V_VDD
+3V_VDD

+3V_VDD
C785

C786

4.7u/10V_6

.1u/16V_4

4 IN 1 CARD READER (MMC)

Close to CN14 pin 14 & pin23

4.7u CAP close to pin23

VCC_XD
VCC_XD

VCC_XD
CN9

XD_RDY/SD_CMD
XD_RE#/MS_INS#
XD_CE#
XD_CLE/SD_WP
XD_ALE/MS_BS
XD_WE#/SD_CD#
XD_WP#
DATA0
DATA1
DATA2
DATA3
XD_RDY/SD_CMD

MS_SCLK
DATA3
XD_RE#/MS_INS#
DATA2
DATA0

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

R583

XD-R/B
XD-RE
XD-CE
XD-CLE
XD-ALE
XD-WE
XD-WP
XD-D0
XD-D1
SD-DAT2
SD-DAT3
SD-CMD
4IN1-GND1
MS-VCC
MS-SCLK
MS-DATA3
MS-INS
MS-DATA2
MS-DATA0

MS-DATA1
MS-BS
4IN1-GND2
SD-VCC
SD-CLK
SD-DAT0
XD-D2
XD-D3
XD-D4
SD-DAT1
XD-D5
XD-D6
XD-D7
XD-VCC
XD-CD-SW
SD-WP-SW
SD-CD-SW

20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36

SHIELD1-GND
SHIELD2-GND
SHIELD3-GND
SHIELD4-GND

37
38
41
42

DATA1
XD_ALE/MS_BS
SD_CLK
DATA0
DATA2
DATA3
DATA4
DATA1
DATA5
DATA6
DATA7

*5.1K_4

C716

C708
4.7u/10V_6

Close to connector
SBK160808T-121Y-N_6
XD_ALE/MS_BS

R590

SD_CLK

C709

*10p/50V/COG_4

XD_CLE/SD_WP

R589

MS_SCLK

C710

*10p/50V/COG_4

SBK160808T-121Y-N_6

XD_CD#
XD_CLE/SD_WP
XD_WE#/SD_CD#

11/26 Change FILTER by EMI

Quanta Computer Inc.

PROJECT : ZR7
Size

Document Number

CardReader

Rev
3B

AU6437 CardReader
Date:

.1u/16V_4

Monday, February 22, 2010

Sheet

31
E

POWER BOARD CONN(UIF)

LED

2/4 modify by ME.

POWER

+3V_S5

Amber
LED1

+3V_S5

SUSLED#
PWRLED#

SUSLED#

R409

715_4

PWRLED#

R408

20_4

+3VPCU

2
1
LED_A/B

R432
*100K/F_6

2
Q32
*BSS84

ACPRN

Q1
BSS84

36
36

*1M_4

+3VPCU
+3VPCU

12
11
10
9
8
7
6
5
4
3
2
1

PWR_LED
SUS_LED
PIPE_LED
D2

NBSWON#

*1M_4

R413

Amber

POWER/B

Q33
*BSS84
36

R412

Battery

+3V

SUSLED#

PIPE LED will flash while

battery insert at C-test

NUMLED#
CAPSLED#

BAS316

SATA_LED#_R

+3V

14
13

LED2
36

BATLED1#

BATLED0#

R411

715_4

R410

20_4

2
1

Blue
WLAN_LED#
CN1

Q57
BSS84
1

R710
36 WLAN_LED#

2
3

SATA_ACT#

Amber

+3V

LED3

SATA_LED#_R

4
9

*0_4

R5
10K/F_4

LED_A/B

Blue
PWRLED#

R415

27,36 RF_LED#

U31
*TC7SH08FU

715_4

R711

*0_4

LED

12/17 Change by EC.

12/1 Modify LED

R10

*SHORT_4

SW /B
+3V
+3V
CN4
3

Q5
BSS84

R77

330_4

P_SAVE_LED

36
ODD_EJ
36 POWER_SAVE

36 P_SAVE_LED#

1
2
3
4
5
6

+3V

C174
7
8

7
8

.1u/10V_4
A

SW/B_conn

Quanta Computer Inc.

R706
R707

100K_4
100K_4

ODD_EJ
POWER_SAVE

PROJECT : ZR7
Size

POWER/MMB/LAUNCH/LED

12/1 Add
Date:
5

Document Number

Monday, February 22, 2010

Sheet
1

Rev
3B

11/16 Rev:B Modify

Footprint to 5pin.

BLUETOOTH CONNECTOR

+5V_S5

USB

+3V_S5

BT_POWER

C485

CN8
U24

USBON#

2
3

IN1
IN2

4
1

EN#
GND

OUT3
OUT2
OUT1
OC#

8
7
6

USBPWR1

BT_POWER

3
Q23

+ C693

C686

330u/6.3V_6X5.7

1U/6.3V_4

+ C389
2.2u/6.3V_6

AO3413

5
4
3
2
1

USBP4+_R
USBP4-_R

C390
1000p/50V_4

BT_LED

T42

36 BT_POWERON#

1000p/50V_4

5
4
3
2
1

7
6

BT_CONN_L
C385
*.01u/16V_4

G547F2P81U

1/5 Modify footprint.

USB_OC0#
CN17
1
2
3
4

USBP1-_R
USBP1+_R

11/26 Stuff common choke by EMI

1
2
3
4

8
7
6
5

11/26 Change footprint

R301

*0_4

R302

*0_4

10
10

RV1

RV2

*EGA-0402

USBP1USBP1+

10
10

USB_CONN_MB
DLW21HN900SQ2L/300mA/90ohm
L25
USBP1-_R
2 2
1 1
USBP1+_R
3 3
4 4

3
2

USBP4+
USBP4-

*DLW21HN900SQ2L/300mA/90ohm
L19
USBP4+_R
3
4 4
USBP4-_R
2
1 1

R242

0_4

R246

0_4
C

USB/B

11/18 Stuff common choke by EMI

11/25 L31 SWAP

10
10

USBP3USBP3+

L31
DLW21HN900SQ2L/300mA/90ohm
USBP3-_R
2 2
1 1
USBP3+_R
3 3
4 4
R400

*0_4

R398

*0_4

10
10

USBP9USBP9+

DLW21HN900SQ2L/300mA/90ohm
L29
USBP9-_R
2 2
1 1
USBP9+_R
3 3
4 4
R391

*0_4

R394

*0_4

+3VPCU

36
USBON#
10
USB_OC1#
10 USB_OC4_5#
23,36

LID591#
USBP3-_R
USBP3+_R
USBP9-_R
USBP9+_R

10
10

USBP11USBP11+

2
3

USBP11-_R
USBP11+_R

DLW21HN900SQ2L/300mA/90ohm
L28
USBP11-_R
2
1 1
USBP11+_R
3
4 4

+5V_S5

CN10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

USB/B_CONN
R375

*0_4

R383

*0_4

11/2 Rev:B Change CN10 P/N by PDC.

Quanta Computer Inc.

PROJECT : ZR7
Size

Document Number

Rev
3B

USB/ BT
Date:
5

Monday, February 22, 2010

Sheet
1

CN2

MY3
MY2
MY1
MY0
MY7
MY6
MY5
MY4
MY11
MY10
MY9
MY8

+3V

+5V

+3V

+5V

+3V

R457

R454

R467

R455

10K_4

10K_4
D

R458
FAN_PWM_E
*10K_4

CN11

FANSIG

MX6
MX7
MY17
MY16

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

1
2
3
4

MX2
MX3
MX4
MX5

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0

Q36
MMBT3904

10,11,36 SML1ALERT#

FAN_PWM_CN

FAN

Q37
MMBT3904

7
8
5
6
3
4
1
2
CP6
*100p/50Vx4
7
8
5
6
3
4
1
2
CP5
*100p/50Vx4
7
8
5
6
3
4
1
2
CP1
*100p/50Vx4
7
8
5
6
3
4
1
2
CP2
*100p/50Vx4
7
8
5
6
3
4
1
2
CP3
*100p/50Vx4
7
8
5
6
3
4
1
2
CP4
*100p/50Vx4
C565 *100p/50V_4
C566 *100p/50V_4

36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36

CPUFAN#

27
28
KB

MY15
MY14
MY13
MY12

+3VPCU

MX1
MX0
MX4
MX5
MX6
MX7

RP2
10
9
8
7
6

10K_10P8R
1 MX3
2 MX2
3 MX1
4 MX0
5

+5V

+5V
L15

*SHORT_8 +TPVDD
C225

R143
10K_4

CN6
TPDATA
TPCLK

*SHORT_6

L17

*SHORT_6

1
2
3
4
5
6
7
8
9
10
11
12

TPDATA_R
TPCLK_R

C223

C228

*.01u/25V_4

RIGHT#

HOLE22
HOLE21
*HG-C315D110P2 *H-C91D91N
7
6
8
5
9
4

LEFT#

13
14

TP_CONN

1
2
3

HOLE8
*H-C236D142P2

HOLE26
*h-tc236d162pt

HOLE12
*H-C236D142P2

SW3
3
1

LEFT#

2
4

SW2
3
1

2
4

SWITCH_1.5

HOLE20
*h-tc236d162pt

HOLE24
*h-tc236d162pt

SWITCH_1.5

1
2
3

HOLE29
*hg-c394d110p2
7
6
8
5
9
4

1
2
3

1
2
3
HOLE5
HOLE7
HOLE11
*H-TC197D122PT*H-TC197D122PT*H-TC197D122PT

HOLE18
HOLE17
HOLE14
HOLE15
*H-TC236D142PT *H-TC236D142PT *H-TC236D142PT *H-TC236D142PT

Quanta Computer Inc.

HOLE16
*hg-c355d110p2
7
6
8
5
9
4

L16

36
36

RIGHT#
HOLE31
*hg-c236d110p2
7
6
8
5
9
4

.1u/10V_4

HOLE25
*H-C91D91N

HOLE4
*HG-C315D110P2
7
6
8
5
9
4

1
2
3

HOLE28
*HG-C315D110P2
7
6
8
5
9
4

HOLE30
*H-C91D91N

HOLE3
*H-C91D91N

1
2
3

HOLE13
*HG-C276D110P2
7
6
8
5
9
4

1
2
3

6
5
4

HOLE27
*HG-C315D110P2
7
6
8
5
9
4
1
2
3

HOLE23
*HG-C315D110P2
7
6
8
5
9
4
1
2
3

HOLE19
*HG-C276D110P2
7
6
8
5
9
4
1
2
3

HOLE9
*O-ZR7-1-B
7
8
9

1
2
3

HOLE1
*HG-C315D110P2
7
6
8
5
9
4

1
2
3

HOLE2
*HG-C315D110P2
7
6
8
5
9
4

R144
10K_4

PROJECT : ZR7
Size

Document Number

Rev
3B

KB/FAN/TP+FP
Date:
5

Monday, February 22, 2010

Sheet
1

11/12 PR90,PQ22 no stuff.

+0.75V_DDR_VTT

+1.5V_CPUVDDQ

PR90
*220_8

46 MAINON_DIS_G

PQ22
*DMN601K-7

PQ23
DMN601K-7

+1.5V_SUS

PR89
22_8

C291

*.1u_4

C282

*.1u_4

C279

*.1u_4

C274

*.1u_4

+1.5V_CPUVDDQ

+3V_S5
+3V_S5

+1.5V_SUS

R138
5

R399
*10K/F_4

*1K_4
R637

DDR3_DRAMRST# 14,15

PM_DRAM_PWRGD 4,8

Q15

*1.5K/F_4
3

Q25
*2N7002D

+1.5V_CPUVDDQ

R395
*10K/F_4

U26
*TC7SH08FU

R638
*750/F_4

RST_GATE#

2
Q24
*PDTC143TT

R137
0_4

*BSS138

4 CPU_DDR3_DRAMRST#

PWRGD_1.5VCPU 42

+1.5V_SUS

+1.5V_SUS
+1.5V_SUS

R140
*1K/F_4

R115
*1K/F_4
1
2
5
6

PQ16

+SMDDR_VREF_DQ0 14

10/29 Modify

+SMDDR_VREF_DQ1 15
3

Q14
RST_GATE#

Q13
R135
*1K/F_4

38,42,46 MAIND

RST_GATE#

*AO6402A
3

R114
*1K/F_4

0_1206

+1.5V_CPUVDDQ

6A/maximum

7,14 VREF_DQ_DIMM0

R167

0_1206

*A03402

R170

10/29 Modify

7,15 VREF_DQ_DIMM1

Quanta Computer Inc.

PROJECT : ZR7
Size

Document Number

Rev
3B

S3 power saving
Date:
1

Monday, February 22, 2010

Sheet

of
8

EC(KBC)

L18

AR@ --> ARD CPU

EV@ --> dGPU Only
SW@ --> iGPU & dGPU Switch

+A3VPCU

PBY160808T-250Y-N/3A/25ohm_6

+3V

30mil
+3VPCU

C382

C381

.1u/10V_4

10u/6.3V_6

I/O ADDRESS SETTING(KBC)

E775AGND
D8

0.03A(30mils)

+3VPCU_EC

2
2.2_6

C357

4.7U/6.3V_6

.1u/10V_4

*.1u/16V_4

.1u/10V_4

*.1u/16V_4

.1u/10V_4

U19

C348

C347

4.7U/6.3V_6

.1u/10V_4

C376

VDD

C392

102

C391

AVCC

C377

19
46
76
88
115

BAS316
C379

VCC1
VCC2
VCC3
VCC4
VCC5

1
R231

E775AGND

10u/6.3V_8 ICMNT

C386
C388

SIO_RCIN#
D7

11 SIO_EXT_SCI#
C360
*10p/50V/COG_4

BAS316

EC_FPBACK#

23 EC_FPBACK#

33
9

PLTRST#
USBON#
IRQ_SERIRQ

6
NOCIR#

T23
4,10,11,16,25,27,31

124

PLTRST#

USBON#

123

IRQ_SERIRQ

125
9

11 SIO_EXT_SMI#

34
34
34
34
34
34
34
34

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17

37
MBCLK
37
MBDATA
10 2ND_MBCLK
10 2ND_MBDATA

34
TPCLK
34
TPDATA
8
PCH_ACIN
33 BT_POWERON#
40,41,42,45,46 MAINON

10/20

T18
8

CR_PSAVE
ICH_SUSCLK

R263

R264

*20M_6

GPIO24/LDRQ
GPIO10/LPCPD
LREST
GPIO67/PWUREQ
SERIRQ
GPIO65/SMI

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA

70
69
67
68

GPIO17/SCL1
GPIO22/SDA1
GPIO73/SCL2
GPIO74/SDA2

TPCLK
TPDATA
PCH_ACIN

72
71
10
11
12
13

GPIO37/PSCLK1
GPIO35/PSDAT1
GPIO26/PSCLK2
GPIO27PSDAT2
GPIO25/PSCLK3
GPIO12/PSDAT3

GPIO00/32KCLKIN

LPC

ECSCI/GPIO54

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17

E775_32KX2

GPIO

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
KBSOUT0/JENK
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KB
KBSOUT4/JEN0
KBSOUT5/TDO
KBSOUT6/RDY
KBSOUT7
KBSOUT8
KBSOUT9/SDP_VIS
KBSOUT10/P80_CLK
KBSOUT11/P80_DAT
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17

PS/2

GPIO02
NPCE781

*33K/F_4
4

*32.768KHz

*15p/50V_4

C431

PBY160808T-250Y-N/3A/25ohm_6

*15p/50V_4

GPIO01/TB2
GPIO03
GPIO06/IOX_DOUT
GPIO07
GPIO23/SCL3
GPIO30/CIRTX2
GPIO31/SDA3
GPIO32/D_PWM
GPIO33/H_PWM
GPIO36
GPIO40/F_PWM
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/CIRRXM/TRST
GPO47/SCL4
GPIO50/TDO
GPIO51
GPIO52/CIRTX2/RDY
GPIO53/SDA4
GPIO81
GPO82/TEST
GPO84/TRIST
GPIO41

SHBM=0: Enable shared memory with host BIOS

GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM
GPIO66/G_PWM

32
118
62
81

TEMP_MBAT 37

WL_SW

T43

VGA_THERM# 19,20

10/28

84
83
82

ACIN
19,37
NBSWON# 32
LID591# 23,33
SUSB# 8
MXM_SMCLK12 19,20
ACPRN 32
MXM_SMDATA12 19,20
BATLED0# 32
BATLED1# 32
VRON 39
SUSLED# 32

AC_OFF

2ND_MBCLK
2ND_MBDATA

DGPU_IDLE#
VGA_THERM#

ODDLED

SW@10K_4
SW@10K_4

2.2K_4
2.2K_4

ODD_EJ

R265

*10K_4

R180

*10K_4

10/26 UnStuff

6
5
7

A0
A1
A2

1
2
3

VCC
GND

8
4

SCL
SDA
WP

C417

*ACER_ID_EEPROM
*.1u/10V_4

CONTRAST 23
NUMLED# 32
PWRLED# 32
CAPSLED# 32
ODD_EJ 32
3G_EN
RF_LED# 27,32
*SHORT_4
*SHORT_4

CIRR_X2
HWPG
P_SAVE_LED#

T16

F_SDI
F_SDO
F_CS0
F_SCK

86
87
90
92

SPI_SDI_uR
SPI_SDO_uR_R
SPI_CS0#_uR
SPI_SCK_uR_R

GPIO55/CLKOUT/IOX_DIN

ECDB_CLOCK

VCC_POR#

R256

47K/F_4

104

VREF_uR

R238

*SHORT_4 +A3VPCU

12/7 Change to 512K

SPI FLASH(KBC)
SPI_SDI_uR R266

+3VPCU

R259

22_4 SPI_SDI_uR_R

10K_4

SPI_SDO_uR

SPI_SCK_uR

SCK

SPI_CS0#_uR

22_4

SPI_SDO_uR

22_4

SPI_SCK_uR

VDD

HOLD

C449

.1u/10V_4

VSS

W25X40BVSSIG

P_SAVE_LED# 32

R247

+3VPCU

U21

11/09

ICH_RSMRST# 8
SUSC# 8
PWROK_EC 8
RF_EN 27

R261

1/13 Comfirm by vendor mail :

If the Southbridge enables 'Long Wait Abort' by
default, the flash device should be 50MHz (or faster)
R260

T19

100K_4

SPI_SDI_uR
+3V

HWPG(KBC)

+3VPCU

10/27 Modify

R217
10K_4

SM BUS ARRANGEMENT TABLE

SM Bus 1

Battery

SM Bus 2

PCH

40,45 HWPG_VTT
45 HWPG_1.8V

SM Bus 3

38 SYS_HWPG
44 HWPG_AXF

SM Bus 4

HDMI Controller, MMB1, MMB2 and VGA Thermal

POWER-ON Switch(KBC)

Add

BAS316

D12

BAS316

HWPG

D14

BAS316

D13

BAS316

D15

BAS316

D16

AR@BAS316

AR@ --> ARD CPU

D23

EV@BAS316

EV@ --> dGPU Only

*SHORT_4

42 HWPG_1.5V

MMB3 and EEPROM

D17

R222

41 HWPG_1.05V
C374

E775AGND

11,18 dGPU_PWROK

MPWROK 4

INTERNAL KEYBOARD STRIP SET(KBC)

10/26 UnStuff
SW1
*SWITCH_1.5
NBSWON#
2

1
3
D1
*VPORT_6

MY0
2
4
5
6

R230

+3VPCU

*10K_4

Quanta Computer Inc.

PROJECT : ZR7
Size

Document Number

Date:

Monday, February 22, 2010

Rev
3B

WPCE781 & FLASH

+3VPCU

U22
MXM_SMCLK12
MXM_SMDATA12

SUSON 42
FANSIG 34

R253

+3V

R208
R207

8/11 modify

ACER ID(KBC)

1u/6.3V_4

E775AGND

11/25 Modify.

+3V

R425
R428

T20

3G_EN

10K_4
10K_4

MXM_SMCLK12
MXM_SMDATA12

SW@ --> iGPU & dGPU Switch

11/09

WLAN_LED# 32
PANEL_ENG 23

+3V

*10K_4
*10K_4

ODD_POWER

CPUFAN# 34
PANEL_COLOR 23
VIN_ON 37
D/C#
37
S5_ON 38,46
HDMI_HPD_EC# 24
ODD_POWER 28
DNBSWON# 8

WLAN_LED
PANEL_ENG

R249
R250

R252
R251

11/25 Modify.

T17

R254

VREF

11/25 Modify unstuff.

AMP_MUTE# 29

PANEL_COLOR

+3VPCU
MBCLK
MBDATA

T15

3G_SW

PWROK_EC_uR

VCC_POR

10K_4

DGPU_IDLE# 19

RSMRST#_uR

FIU

R255

1/13 Comfirm by vendor mail :

Disabled ('1') if using FWH device on LPC.
Enabled ('0') if using SPI flash for both system BIOS and EC firmware

10/20

POWER_SAVE 32

DGPU_IDLE#

3G_EN

SHBM

SML1ALERT# 10,11,34
ICMNT 37
VGA_THERM#

75
73
74
113
14
114
111

GPIO72/IRRX1/SIN2
GPIO70/IRRX2_IRSL0
GPIO71/IRTX/SOUT2
GPIO87/CIRRXM/SIN_CR
GPIO34/CIRRXL
GPIO16/CIRTX
GPO83/SOUT_CR/XORTR

.01u/16V_4

SM BUS PU(KBC)
64
95
93
94
119
109
120
65
66
15
16
17
20
21
22
23
24
25
26
27
28
91
110
112
80
31
117
63

GPIO77/SPI_DI
GPO76/SPI_DO/SHBM
GPIO75/SPI_SCK

SPI

101
105
106
107

GPIO56/TA1
GPIO20/TA2/IOX_DIN
GPIO14/TB1

TIMER

SMB IR

L20
C400

GPIO94/DA0
GPI95/DA1
GPI96/DA2
GPI97

D/A

KBRST/GPIO86

54
55
56
57
58
59
60
61

R279

GPIO85/GA20

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

E775_32KX1

*SHORT_4

GPIO11/CLKRUN

VCORF

122

97
98
99
100
108
96

VCORF_uR 44

*22_4

AGND

8
121

GPIO90/AD0
GPIO91/AD1
GPIO92/AD2
GPIO93/AD3
GPIO05
GPIO04

A/D

103

CLKRUN#

11 SIO_A20GATE

8
R197

CLK_PCI_775

LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK

GND1
GND2
GND3
GND4
GND5
GND6

CLK_PCI_775

3
126
127
128
1
2

5
18
45
78
89
116

9,27 LPC_LFRAME#
9,27 LPC_LAD0
9,27 LPC_LAD1
9,27 LPC_LAD2
9,27 LPC_LAD3
10 CLK_PCI_775

Sheet
1

VA
PL3
HI0805R800R-00_8

PJ2
VDC

PQ32
FDD6685

VIN_SRC

BAT-V

PR129
220K/F_6

PD1
SW1010CPT

PR125
220K/F_6

VIN_SRC

EC5
*10u/25V_1206

PR30
10/F_6

CH2

CH3

PR28
100K/F_6

+3VPCU

VDDSMB

21
VDDP

1
33
32
31
30
28

MBDATA

VCC

6
5

PD7
*RB500V-40
PR29
2.7_6

BOOT

PC28
.1u/50V_8

12/30 Modify.

88731_DH 4

ACIN

SDA

UGATE

PQ5
AO4468

SCL

PHASE

ACOK

LGATE

0.01_3720
PR136

24
88731_LX

PL5
6.8uH
1

BAT-V

5
6
7
8

19,36

MBCLK
MBCLK

PC116
.1u/50V_6
PC117
2200p/50V_6

3
2
1

PC20
10u/25V_1206

PC23
1u/16V_6

CSIN

CSSN

CH4

+3VPCU

NC
GND
GND
GND
GND
CSSP

PU2
CM1293A-04SO

PC29
.1u/50V_6

CSIP
+3VPCU

PR25
4.7_6

PC32
.1u/50V_6

11/16 Modify PU3 footprint.

PQ36
DMN601K-7

PC30
1u/16V_6
PR31
10/F_6

D/C#

5
6
7
8

EC4
*10u/25V_1206

CSIP_1

CH1

PR135
10K_6

PQ31
IMD2AT108

VDC

PR134
33K_6

CSIP_1

2/5 Add by EMI

PC11
2200p/50V_6

PC114
PC111 PC115 EC1
EC2
.1u/50V_6
2200p/50V_6 *22u/25V_1210
.1u/50V_6 *22u/25V_1210

EC3
*10u/25V_1206

PC13
.1u/50V_6
VIN_SRC

9/1 modify

PC108
.1u/50V_6

PD6
SMAJ20A

PC109
.1u/50V_6

PC110
.1u/50V_6

PL4
HI0805R800R-00_8

TEMP_MBAT

POWER_CONN

PR133
0.01/F_7520

PQ30
FDD6685
VA1

1
2
3
4

PD5
SBR1045SP5-13
1

DCIN

2
PC105
.1u/50V_6
1

PR33
22K/F_6

3
4
5

HI0805R800R-00_8
PL2
BAT-V

MBAT+

VREF
ICOMP

VBF
VCOMP

PC33
*1u/16V_6
36

MBDATA

BAT-V

1/11 Add PC3100 by EMI

PR24
10/F_6

VIN_SRC

CSOP_1
BAT-V

GND

NC
14

5
PC3100

PR12
100_4
PC112
1U/25V_6

PR19
150K_6

*10u/25V_1206

ICM

1
2
3

BAT-V

1/11 Add by EMI

PR20
39K_6

11/23 Modify

VIN_SRC

PC35
*0.01u/50V_6
PC34
0.01u/50V_6

VIN_ON

PQ3
DMN601K-7

PC31
3300p/50V_4
PC3101
PC3103
PC3105
PC3107
*10u/25V_1206
*10u/25V_1206
*10u/25V_1206
*10u/25V_1206
PC3102
PC3104
PC3106
PC3108
*10u/25V_1206
*10u/25V_1206
*10u/25V_1206
*10u/25V_1206

1
2

PR18
*100K/F_6

PC12
0.01u/50V_6

Quanta Computer Inc.

PROJECT : ZR7
Size

Document Number

Date:

Monday, February 22, 2010

Rev
3B

CHARGER (ISL88731)
5

VIN
PQ33
AOL1413

PR17
100K/F_6
PR11
100_4
MBCLK

ICMNT

PC36
0.01u/50V_6

+3VPCU

PR10
100_4

PC107
10u/25V_1206

PR32
2.21K/F_6

TEMP_MBAT 36

PR13
*0_6

PC8
10u/25V_1206

PC6
47p/50V_6

PC106
2200p/50V_6

PC5
47p/50V_6

NC
7

PD4
RB500V-40

Batt_Conn

PC19
*680p/50V_6

PR27
*SHORT_4

GND

9/1 modify

17 CSON

PL1
HI0805R800R-00_8

TEMP_MBAT

PQ4
AO4710
CSOP_1

PC24
.1u/50V_6

PJ1

18 CSOP

ACIN

CSON

PC104
100p/50V_6

10 1
2
3
4
5
6
7
9 8

PR23
10/F_6
CSOP

PC7
0.01u/50V_6

PU3
ISL88731A

PR34
82.5K/F_6

PR22
*4.7_6

88731_DL 4
PGND

3
2
1

PR9
*SHORT_6

13
PC26
.1u/50V_6

PR26
49.9/F_6

Sheet
1

MAIND

35,42,46

PR109

*SHORT_4

2/11 Del PD3 and

change PR105 and
PR106.

4,46 SYS_SHDN#

VIN_SRC
D

PR213
39K/F_4

VIN_SRC

Add 100u cap

PC192
10u/25V_1206

1
PR221
*SHORT_4

PC90
1u/16V_6

PC173
.1u/50V_6

8
7
6
5

PR216
*0_4

PR236
*2.2_6

PC175

4
2

5V_DL

PC89
.1u/50V_6
330u/6.3V_6X5.7

+3VPCU
PQ71
AO4468

1
2
3

PQ72
AO4710

PR225
1/F_6

PD12
SX34

*0_6

8
7
6
5
4
3
2
1

9
10
11
12
2
200K/F_6 DDPWRGD_R 13
5V_EN 14
15
16
37
36

BYP
OUT1
FB1
ILIM1
PGOOD1
EN1
DH1
LX1
PAD
PAD

PU9
RT8206B

3
2
1

PL13
2.2uH_14A

REFIN2
ILIM2
OUT2
SKIP#
PGOOD2
EN2
DH2
LX2

32
31
30
29
28
27
26
25

PR114
182K/F_6
2

REFIN2
1

3V_LX

changed on 11/19
5
6
7
8

LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF

+5VPCU

PC177
.1u/50V_6

PC199
*2200p/50V_6

PR112
*SHORT_4

6.21A

change to 330u/6.3V_6x5.7

PR118
*2.2_6

SKIP
DDPWRGD_R
3V_EN

4
+

change to 330u/6.3V_6x5.7

1
PR115

8
7
6
5

5V_LX

OCP : 8A

PR214
*SHORT_6

PC99
*2200p/50V_6
PQ70
AO4710

PC178
.1u/50V_6

PD9
SX34

PR224
1/F_6

1
PR215
1
PR218

2
*0_4
2
*SHORT_4

3V_DL

PC166
.1u/50V_6

PC91
10u/25V_1206

PR227
*0_6
PC182
.1u/50V_6

2
PD10
CHN217UPT

SKIP

PR212
*SHORT_6

PC98
.1u/50V_6

OCP:8A

3
PC183
.1u/50V_6

PR219
*SHORT_6

+3VPCU

+15V_ALWP

pad 2/12 09

PR108
100K/F_4

Iocp=8-(2.48/2)=6.67A
Vth=6.67A*15mOhm=94.714mV
R(Ilim)=(94.714mV*10)/5uA
~191K

PR233
+15V

REF

L(ripple current) 0 ohm change to shot

=(19-3.3)*3.3/(2.2u*0.5M*19)
~2.48A

PR226
*SHORT_6

PD11
CHN217UPT

*0_6

PC180
1u/16V_6

PR116

PR113
*0_6

DDPWRGD_R

SYS_HWPG 36
PR217

22_8

*SHORT_4

PC196
.1u/50V_6

+15V

+5V_S5

+5VPCU

5
6
7
8

+3V_S5

+3VPCU

5
6
7
8

+5VPCU

VIN_SRC

PC169
330u/6.3V_6X5.7

3
2
1

1
2
3

changed on 11/19

PC97
10u/25V_1206
PC94
2200p/50V_4

BST1
DL1
PVCC
NC
GND
PGND
DL2
BST2

PQ69
AO4468

PL14
2.2uH_14A

5V_DH

17
18
19
20
21
22
23
24

Iocp=10-(4.18/2)=7.91A
Vth=7.91A*14.2mOhm=112.322mV
R(Ilim)=(112.322mV*10)/5uA
~220K

PAD
PAD
PAD

+5VPCU

PC100
.1u/50V_6

3V_DH
PR107
PR105
150K_4

35
34
33

5.64A

L(ripple current)
=(19-5)*5/(2.2u*0.4M*19)
~4.18A

OCP: 10A

PR110
*0_4

PC92
.1u/50V_6
REF

PC172
.01u/16V_4

5
6
7
8

PR106
390K_4

3V_EN

5V_EN

100u/25V_6.3X5.8

PR111
0_4
PR211
0_4

PR220
*SHORT_4
PC198

PC174
4.7u/10V_8

3V5V_EN
PC187
PC93
2200p/50V_6 *10u/25V_1206

PC188
.1u/50V_6

+3VPCU
MAIND

PR188
1M_6

MAIND 4

3
2
1
1

PC160

PQ68
DMN601K-7

2200p/50V_4
PQ66
DMN601K-7

PQ24
AO3404

2.79A

2.83A

+5V

PQ26

+3V

+3V_S5

AO4496
PQ67
DMN601K-7

PQ65
DTC144EU

PR205
1M_6

3
2
1

PQ25
AO4496

3
2

S5_ON

36,46

PQ27
AO4496

S5D 2

S5D

3
2
1

PR196
22_8

PR190
22_8

5
6
7
8

PR206
1M_6

0.23A

Quanta Computer Inc.

+5V_S5

2.85A

PROJECT : ZR7
Size

Document Number

Rev
3B

SYSTEM 5V/3V (RT8206)

Date:
5

Monday, February 22, 2010

Sheet
1

[PWM]
PR71, PR72, PR73, PR74, PR75, PR76, and PR77 deleted
3

VIN
4,8

DELAY_VR_PWRGOOD

VR_PWRGD_CK505#

PC65
10u/25V_1206

PC145
10u/25V_1206

+
PC61
.1u/50V_6

PC132
100u/25V_6X7.7

PC141
2200p/50V_6
PQ57
AOL1448

8/4 EMI request

62882_DH1

changed on 11/19

20A

1
2
3

+VCC_CORE

+3V
PL10
1

PQ59
AOL1718

PQ58
AOL1718

62882_LX1
PR78
*SHORT_6

PR82

0.36uH
2

VIN

+ PC71

5/12 Change pr144 from 10K to 1.91K

UGATE1
BOOT1

147K/F_6

3
4

H_PROCHOT#

RBIAS
PHASE1
VR_TT#
LGATE1a

PR55
*4.02K/F_4

5
PC58
*.01u/16V/X7R_4
1
2

H_VID3

H_VID4

H_VID5
H_VID6

H_VID1

H_VID2

H_VID3

H_VID4

H_VID5

H_VID6

ISEN1

38
DPRSLPVR

VID1
VID2

PC135
0.22u/10V_4

VCCP

ISL62882

PR185

0_4

PC153
10u/25V_1206

PC155
100u/25V_6X7.7

VID6

changed on 11/19

VR_ON
DPRSLPVR

UGATE2

FB2

VSSP2
ISEN2

PQ60
AOL1718

0.36uH
2

PR88
62882_DL2

+ PC72

4
*2.2/F_6

PC149
.22u/25V_6

330u/2V_7343

28
PR162

PR167

26
PC73
*1000p/50V_6

*SHORT_4

*SHORT_4
B

62882_ISEN2

10
1

PC52
1

PL11
1

62882_LX2
PQ61
AOL1718

29
30

20A
+VCC_CORE

PC70 1u/6.3V_4
1
2

LGATE2
9

8/4 EMI request

+5V_S5

PC150 1u/6.3V_4
1
2

VID5

PC133
22p/50V_4

PQ62
AOL1448
62882_DH2

VID4

PHASE2

PC74
10u/25V_1206

8/10 modify

BOOT2

PR56
412K/F_4

PC75
.1u/50V_6

VSUM-

VID3

PR183
2.2_6

PR67
*10K/F_4

PC154
2200p/50V_6

62882_ISEN1

VID0

PR175
499/F_4

PR177
100K/F_4

22
11

6 H_DPRSLPVR

62882_DL1B

H_VID0

VIN

LGATE1b

VRON

10K/F_4

1/F_4

PR65

H_VID2

PR173

H_VID1

VSUM62882_DL1A

3.65K/F_4

PC148
.22u/25V_6

H_VID0

10K/F_4

PR170

NTC

VSSP1
6

PR61

VSUM+

2
PR181
2.2_6

1
2
3

Close to Phase 1 Inductor

PSI#

PR180
*470K_4_NTC

*SHORT_4

PR66

10K/F_4

PR174

*SHORT_4

1
2
3

PR164

H_PSI#

PR171

1
2
3

PR165
*499/F_4
6

PAD

7/16 modify

PC68
*1000p/50V_6

PGOOD

CLK_EN#

PU8

VIN

VDD
41

+1.1V_VTT

330u/2V_7343

*SHORT_8

PC63
1u/6.3V_4

*2.2/F_6

1
2
3

PC66
.22u/25V_6

PR77
10_6

PR163
1.91K/F_4

1
2
3

11/16 Modify PU8 footprint.

PR62

PR172
1.91K/F_4

+5V_S5

150p/50V_4

COMP
2

PC134
0.22u/10V_4
VSUM8/10 modify

PR54
8.06K/F_4

VW
IMON

18
PR182
9.76K/F_4

ISUM+

ISUM-

10K/F_4

PR161

3.65K/F_4

VSUM-

PR166

1/F_4

PR60

10K/F_4

VSSSENSE

5/12 Change pc92 rom 0.33u_4 to 0.22u_6

5/12 stuff pc26 0.068u_6

2.8K/F_4

RTN

VSEN
12

PR57

5/12 Change pr24 rom 2.87K to 2.8K

PR52
VSUM+

PC146
0.033u/16V_4

PC54
1000p/50V_4

PC144
0.22u/10V_6

PC55
390p/50V_4

PC143
0.068u/25V_6
VSUM+

PR58
562/F_4

I_MON

PC136
10p/50V/COG_4

PR168
82.5/F_4

2
*27.4_4

PR59
2.61K/F_4

1
PR63

+VCC_CORE

PC59
PC142

VSSSENSE

PR64

*SHORT_4

PR71

*SHORT_4

330p/50V_4
PC137
330p/50V_4

Parallel

PC138
.01u/16V_4

PC60

1
PR70

2
*27.4_4

1000p/50V_4

2700p/50V_4

VCCSENSE

PR178
11K/F_4
PR184
10K_6_NTC
PR179
*SHORT_4

Panasonic
ERT-J1VR103J

VSUM-

5/12 Change pr34 rom 1K to 1.24K

PR176
1.24K/F_4

PC139
*1000p/50V_4

PR169
*100/F_4

PC140
.1u/10V_4

Close to Phase 1 Inductor

Quanta Computer Inc.

Load Line setting to 2mV/A

PROJECT : ZR7
Size

5/12 un-stuff PC76,PR140

Rev
3B

CPU Core ( ISL62882)

Date:

Document Number

Sheet

Monday, February 22, 2010

[PWM]
VIN

SP@ --> Operation P/N

+5V_S5

PD8
RB500V-40

+3V
PC45
*.1u/50V_6
PR45
V2@10K/F_6

EN/DEM

BOOT

TON

UGATE

VOUT

PHASE

VDD

36,45 HWPG_VTT
C

PC40
1u/16V_6

LGATE

GND

PGND

TPAD

PGOOD

6
5
14

stuff on 1/13

VDDP

PC126
2200p/50V_4

PQ52
AOL1448

PC128
.1u/50V_6

PC125
PC42
.1u/50V_6
10u/25V_1206
PC41
*10u/25V_1206

changed on 11/19
PL8
2.2uH

UGATE-VTT
PHASE-VTT
PR155

1.1VVTT_SRC

3.3K/F_6

MAINON

OCP: 18A
1.1V/15A

4
1
2
3

PR157
*SHORT_6

PU7
UP6111AQDD

PC123
4.7u/6.3V_6

PC124

+
1u/16V_6 LGATE-VTT

+1.1V_VTT

PL7
2.2uH
+

PR151
*4.7_6

4
PQ49
AOL1718

1
2
3

36,41,42,45,46

PR158
1M/F_6

PR159
*SHORT_6

PR152
2.2/F_6

PR156
10_6
D

PC37
330u/2V_7343

PC122
*680p/50V_6

PC43
330u/2V_7343

PC120
.1u/50V_6
PC121
10u/10V_8

PC44
*1000p/50V_6

VOUT=(1+R1/R2)*0.75
R1
PR42
*SHORT_6

PR154
[email protected]/F_6

PC127
*33p/50V_6

CSP@ --> Operation P/N (ARD&CFD)

VTT_FB

SP@ BOM change notice

R2
AO1718 Rdson=3~4.3mOhm
L(ripple current)
=(19-1.05)*1.05/(1u*272k*19)
~3.64A

TON=3.85p*RTON*Vout/(Vin-0.5)
Frequency=Vout/(Vin*TON)

PR153
10K/F_6

Arrandale (1.05V)
Clarksfield(1.1V)

R1 = 4.02K (CS24023F928)
R1 = 4.75K (CS24753F919)

VIN

4.3m*18=RILIM*20uA
RILIM=3.87K --- 3.92K

TON=3.85p*1M*1/(Vin-0.5)
Frequency=1/(0.0036767)=272K
A

C930
C931
C932
C933
C934
10u/25V_1206
*10u/25V_1206
10u/25V_1206
10u/25V_1206
*10u/25V_1206

Quanta Computer Inc.

2/11 Add C930~C934 by monitor test.

PROJECT : ZR7
Size

Document Number

Rev
3B

+VTT (UP6111A)
Date:
5

Monday, February 22, 2010

Sheet
1

VIN
+5V_S5

PD13
RB500V-40

PU11
UP6111AQDD

+3V
PC194
*.1u/50V_6
PR240
*10K/F_6

EN/DEM

BOOT

TON

UGATE

VOUT

PHASE

VDD

PC102
1u/16V_6

36 HWPG_1.05V

PGOOD

VDDP

LGATE

GND

PGND

TPAD

5
6
7
8

PC197
.1u/50V_6

PQ73
AO4468

3
2
1

PC101
2200p/50V_4

PC200
.1u/50V_6

1.05V/8A
OCP: 10A

PC202
10u/25V_1206

PL16
2.2uH_8A

UGATE-1.05V
PHASE-1.05V
PR121

+1.05V

5.76K/F_6

8/24 modify

5
6
7
8

MAINON

PC205
4.7u/6.3V_6

PC203
1u/16V_6

LGATE-1.05V

PR242
*4.7_6

Rds*OCP=RILIM*20uA
PQ74
AO4710

PC206
*680p/50V_6

3
2
1

PR119
*SHORT_6
36,40,42,45,46

PR235
*SHORT_6

PR241
2.2/F_6

PR234
1M_6

PR120
10/F_6

PC190
10u/10V_8

PC195
*1000p/50V_6

PC193
.1u/50V_6
PC204
560u/2.5V_6X5.7

PR237
4.02K/F_6

1.05V_FB

PC201
*33p/50V_6

VOUT=(1+R1/R2)*0.75
R2

PR238
10K/F_6
PR239
*SHORT_6

TON=3.85p*RTON*Vout/(Vin-0.5)
Frequency=Vout/(Vin*TON)
A

TON=3.85p*1M*1/(Vin-0.5)
Frequency=1/(0.0036767)=272K

AO4710 Rdson=11.7~14.2mOhm
L(ripple current)
=(19-1.05)*1.05/(1u*272k*19)
~3.646A

Quanta Computer Inc.

14.2m*10=RILIM*20uA
RILIM=7.1K--- 7.15K

PROJECT : ZR7
Size

Rev
3B

VCCP 1.05V(UP6111A)
Date:

Document Number

Monday, February 22, 2010

Sheet
1

[PWM]
PC49
10u/10V_8
PR50
PC48
*SHORT_6 .1u/50V_6
+0.75V_DDR_VTT
VIN

8207_DH
PC51
10u/10V_8

2.25A

PC50
10u/10V_8

8207_LX
5

8207_DL

VTTSNS

GND

1
2
3

DRVL

DRVH

+1.5V_SRC
PGND

CS_GND

V5IN

+5V_S5

100K/F_6

1
2
3

PC131
*680p/50V_6

PC53
1u/6.3V_4

PC152
560u/2.5V_6x5.7

PC151
560u/2.5V_6x5.7

+3VPCU

PC147
10u/10V_8

change to 560u/2.5V_6x5.7

HWPG_1.5V 36

S5_1.8V

PR69
*0/F_6

PQ14
AOL1718

PC56
1u/6.3V_4

2
NC

PR73

PR74
620K/F_4

S3_1.8V

+
PR160
*4.7_6

4
PQ56
AOL1718

+1.5V_SUS

PGOOD

14
13

FOR DDR III

COMP

PR53
5.1/F_6

V5FILT

VTTREF

+5V_S5

PC57
0.033u/50V_6

VDDQSET

0.75A

VDDQSNS

+SMDDR_VREF
C

PR51
5.6K/F_6

4
MODE

+1.5V_SUS 4

RT8207A
PU4

OCP 22A
18A

PC129
10u/25V_1206

PL9
0.56uH

1
2
3

VTTGND

PC130
PC47
2200p/50V_6 10u/25V_1206

PQ55
AOL1448

VBST

23
VLDOIN

VTT

GND

PR75
PR80

VIN

PR76
*SHORT_6
0/F_6
*0/F_6

(For RT8207A

SUSON

400KHZ )

MAINON 36,40,41,45,46
PWRGD_1.5VCPU 35

+5V_S5

Add it for S3 leakage circuit

7/23 modify

PR68
*SHORT_6
PR72
10K/F_4

Vout = (PR150/PR149) X 0.75 + 0.75

AO1718 Rdson=3.8~4.3mOhm
L(ripple current)
=(9-1.5)*1.5/(0.56u*400k*9)
~5.58A
Vtrip= (22-2.79)(*4.3mohm/2)=0.0413V
RILIM=Vtrip/10uA~4.13K

PR79
10K/F_4

PC62
*0.033u/50V_6

+1.5V_SUS
B

PC64
*33p/50V_6

MAIND

35,38,46 MAIND

VTT

REF

OFF

S4/S5

OFF

PQ20
AO3404

+1.5VSUS
+1.5V

2.03A

Quanta Computer Inc.

PROJECT : ZR7
Size

Document Number

Date:

Monday, February 22, 2010

Rev
3B

DDR III 1.5V(TPS51116)

Sheet
1

11/16 Change VGPU_CORE to two phase solution.

V2@ --> Two Phase dGPU only

EV@ --> External VGA SKU

+5V_S5
PR3001
V2@10_6

SW@ --> iGPU & dGPU Switch

MAX17007_VCC

11M@ --> N11M-GE1 Setitng

VIN

VCC

VDD

PC3001
V2@@1u/10V_6

SW@ --> iGPU & dGPU Switch

GND

BST1

MAX17007_BST1

PR3005
V2@0_6

PR3004

17007_EN
V2@100K_4

11
25

PR124
ES@0_4

DH1

MAX17007_DH1

MAX17007_LX1

MAX17007_DL1

PL3003
V2@1uH

V2@0_4

MAX17007_VCC

+VGPU_CORE

1/13 Add PR3032.

MAX17007_VCC

PR3009
*V2@0_4

DL1

PR3007
*[email protected]_6

PC3011
*V2@2200p/50V_4
PC3013
[email protected]/25V_6

SKIP
CSH1
CSL1

PR3032
V2@0_4

PQ3002
V2@AOL1718

PC3009
[email protected]/50V_6

PC3010
V2@330u/2V_7343

PR3011
V2@10K_6_NTC

PC3012
*V2@1000p/50V_4

PR3010
[email protected]/F_4
B

+VGPU_CORE

PC3014
V2@1000p/50V_4

PGOOD1
TON1
PGOOD2
TON2
BST2

PR3014

V2@200K/F_4

PR3015

V2@200K/F_4
PR3016
V2@0_6

MAX17007_BST2

VIN

+ PC3030
*V2@330u/2V_7343
PQ3003
V2@AOL1448

4
PC3020
[email protected]/25V_6

REF
DH2

MAX17007_DH2

LX2

MAX17007_LX2

DL2

MAX17007_DL2

PC3016
V2@2200p/50V_4

PU3001
V2@MAX17007AGTI+

PGND
REFIN1

PC3023
V2@330u/2V_7343
C

PR3022
V2@10K_6_NTC

PC3025
*V2@1000p/50V_4

PR3021
[email protected]/F_4

MAX17007_CSH2

26
27

PR3023
[email protected]/F_4

PR3024
V2@10_6
PC3027
V2@1000p/50V_4

PR3025
11M@100K_4

VID1

VID2

MAX17007_VCC

AGND

VIN_SRC

+VGPU_CORE

AGND

FB2

PC3028
[email protected]/16V_4

PC3022
[email protected]/50V_6

PQ3005
V2@DMN601K-7

reserved on 11/19

DCR=3m

PR3019
[email protected]/F_4

PR3020
V2@196K/F_4

CSH2
CSL2

PC3019
V2@10u/25V_1206

V2@AOL1718

PC3026
[email protected]/25V_6

+ PC3015
V2@330u/2V_7343

PQ3004

PC3024
*V2@2200p/50V_4

PC3018
V2@10u/25V_1206

PR3017
*[email protected]_6

4
1
2
3

PR3018
V2@34K/F_4

MAX17007_REFIN1

PC3017
[email protected]/50V_6

PL3002
V2@1uH

PC3021
V2@2200p/50V_4

VIN

MAX17007_REF

1
2
3

PR3008
[email protected]/F_4

MAX17007_CSH1

10
9

V2@100K_4

45,47 VGA_PG

PR3028
V2@1M_6

PR3026
[email protected]/F_4

PR3029
V2@22_8

GPU_VID1

GPU_VID2

+VGPU_CORE
1.035V

0.95V

0.85V

0.8V

N11E/N11P

PR3012
V2@10_6
PR3013

11M@ --> N11M-GE1 Setitng

ripple current~=3.2A--> current

limit=60mV(Vcc) & Rdcr_eq=2.69mohm
-->OCP=(60mV/2.69m+3.2A/2)*2=48A

DCR=3m

+VGPU_CORE

ILIM2

+3V

19,47 GPU_VID1

PC3006
V2@10u/25V_1206

TDC 36A/OCP 48A

ILIM1

PC3008
V2@120p/50V_4
MAX17007_REF

PC3005
V2@10u/25V_1206

PR3003

EN2
LX1

+3V_GFX

EV@ --> dGPU only

EN1

PC3003
V2@2200p/50V_4

PC3004
[email protected]/50V_6

1
2
3

V2@0_6

PR3002

PQ3001
V2@AOL1448

4
PC3007
[email protected]/25V_6

1
2
3

PR3006
*SW@0_4
11,47 dGPU_VRON

VIN

PC3002
[email protected]/6.3V_6

2
D

PQ3006
V2@DMN601K-7
17007_EN

2
2

PR3027
V2@100K_4

PR3030
V2@1M_6

PQ7020
V2@DTC144EU

PQ7019
V2@DMN601K-7

Quanta Computer Inc.

19,47 GPU_VID2

PC3029
[email protected]/16V_4

PROJECT : ZR7
Size

Document Number

Rev
3B

GPU CORE(MAX17007)
Date:
1

Monday, February 22, 2010

Sheet
5

Int_VGA

[PWM]

AR@ --> ARD CPU

6 GFX_VID0
6 GFX_VID1

+1.1V_VTT

6 GFX_VID2
6 GFX_VID3
1

PR102
*AR@0_6

6 GFX_VID4

PR101
*AR@0_6

PR192
*AR@0_6

PR100
*AR@0_6

PR97
*AR@0_6

PR92
*AR@0_6

PR91
*AR@0_6

6 GFX_VID5
6 GFX_VID6
GFX_VID6

62881_GND

GFX_ON

6 GFX_DPRSLPVR

AR@0_4

PR200

AR@0_4

GFX_VID2

GFX_VID1

GFX_VID0

GFX_VID6

GFX_VID5

GFX_VID4

GFX_VID3

GFX_VID2

62881VR_ON
27

PC76
2

62881_GND

PC77
PC157
AR@10u/25V_1206AR@10u/25V_1206

PC158
AR@2200p/50V_4

VID2

VID3

VID4

VID5

VID1

+5V_S5

1
2
3

PGOOD

GFX_VID0

CLK_EN#

VID6

VR_ON

GND

[email protected]/50V_6

GFX_VID1

DPRSLPVR

62881PGOOD

AR@0_4

GND

1
PR103

GND

PR207
[email protected]/F_4

HWPG_AXF

11/16 Change PU6 footprint by SMT.

+3V

GFX_VID3

VIN

62881_GND

GFX_VID4

*AR@SHORT

62881DPRSLPVR

PR193

PR195

GFX_VID5

PC168
*[email protected]/25V_4
2
1

PR198

AR@47K/F_4

PR208

62881RBIAS

RBIAS

VID0

20
PC78

62881VW

VCCP

PU6

PC86
LGATE

FB
PHASE
UGATE

17
16 62881PHASE
15 62881UGATE

BOOT

IMON

PC85

PC79

PR99
[email protected]/F_4

PQ21
AR@AOL1718

[email protected]/25V_6
GFX_IMON

62881_GND

PR93
*[email protected]/F_4

PC162
[email protected]/10V_4

62881_GND
AR@0_4

PR189

PC165
AR@47n/10V_4

+5V_S5

PC83
[email protected]/10V_4

62881_GND

0616 change to 2.49k

PR191

PC163
*AR@180p/50V_4
PR197
[email protected]/F_4

AR@10_6

PC164

PC80
AR@10u/6.3V_8

VIN

PC161
[email protected]/25V_6
62881_GND

PC159
AR@560u/2.5V_6X5.7

AR@11K/F_4
PC81
*[email protected]/25V_4
VSS_AXG_SENSE

PC167
AR@560u/2.5V_6X5.7

PR96

GFX_IMON 6

AR@1000p/50V_4

DCR=1.6~1.8mOhm
Load Line=7mV/A
1.6m*0.6168=0.986m
0.986m/.49K=396p
392p*2*8.87K=7.03m
OCP
20u/2*2.49K=24.9m
24.9m/0.6168=40.3m
40.3m/1.6m=25.2A

PR187
AR@10K_6_NTC

PC156
*AR@680p/50V_6

2
AR@1_6

62881RTN

PR94
62881BOOT

62881VIN

PC84
AR@330p/50V_4

62881VDD 11

PC88
AR@330p/50V_4

62881ISUM+ 10

AR@150p/25V_4

0616 change to 150pF

62881ISUM-

8
[email protected]/F_4

PQ63
AR@AOL1718

PR95
[email protected]/F_4

PR186
*[email protected]_6

4
1
2
3

VIN

VDD

PC87

ISUM+

VSEN
RTN

PL12
[email protected]

VSSP
6

0616 change to 8.87k

PR104
[email protected]/F_4
62881VSEN

PC171
AR@100p/50V_4

22A
+VGFX_AXG

18 62881LGATE

COMP

0616 change to 22pF

62881FB

PR209

AR@ISL62881HRZ-T

ISUM-

PC170
AR@22p/50V_4

62881COMP 5

AR@1000p/50V_4
PR210
AR@820K/F_4

0616 change to 0.56uH

1
2
3

62881_GND
PR199
*AR@150K/F_4
62881_GND

PQ64
AR@AOL1448

AR@1u/6.3V_4
PR194
*AR@100/F_4
62881_GND
PR98
[email protected]/F_4

Parallel
PR201

PR202

PC82
2
1

0616 un-mount

[email protected]/25V_4

AR@10/F_4

AR@0_4

VSS_AXG_SENSE 6

PR204
PR203

AR@10/F_4

AR@0_4

VCC_AXG_SENSE 6

Quanta Computer Inc.

PROJECT : ZR7
Size
1.Level 1 Environment-related Substances Should NEVER be Used.
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.
Date:
A

Document Number

Rev
3B

+VGFX_AXG (ISL62881)
Monday, February 22, 2010

Sheet
H

ES@ --> External VGA SKU

SW@ --> iGPU & GPU Switch

+3VPCU

+1.8V

PC96
0.1u/25V_4

11/16 Change PL15 footprint.

16
1

PR117
*SHORT_4

MAINON

15
54418-1.8_VFB

PC176
1000p/50V_4

VIN

BOOT

VSNS

DCR(max)=10mohm

PL15
1uH_7X7X3

12
D

PR223

*SHORT_6
PC179 .1u/50V_6

PWRGD

PR232
51.1/F_4

COMP

GND

RT/CLK

GND

AGND

PR230
182K/F_4

PC189
*100P/50V_4

MAINON

HPA00835RTER

VIN

HWPG_1.8V 36

PR231
100K/F_4

+3V

PC186
.01u/25V_4

MAINON 36,40,41,42,46

PR222
100K/F_4

22
21
20
19
18
17

PR228
15K/F_4

PU10

PAD
PAD
PAD
PAD
PAD
PAD

PC185
10u/10V_8

PC181
0.1u/25V_4

PC95
10u/10V_8

PC184
10u/10V_8

54418-1.8_VFB

PC191
1200p/50V_4

PR229
78.7K/F_4

V0=0.8*(R1+R2)/R2

+5V
5V_LCD

2A
PC3111
[email protected]/25V_4

PC3110
V2@10u/10V_8

PU3002

16
1
PR3033
V2@0_4

HWPG_VTT

15
54418-1.8_VFB_1

PR3036
[email protected]/F_4

PR3037
V2@182K/F_4

PC3117
*V2@100P/50V_4
HWPG_VTT

V2@HPA00835RTER
10
PH

VIN
VIN

BOOT

VSNS

COMP

RT/CLK

DCR(max)=10mohm

PL3005
V2@1uH_4X4X2

PWRGD

PR3034

HWPG_5V_LCD

V2@0_6
[email protected]/50V_6

PR3035
[email protected]/F_4

GND
GND

AGND

R1
PR3038

PR3039
*V2@100K/F_4

PC3114

V2@100K/F_4

+3V

22
21
20
19
18
17

PC3113
V2@1000p/50V_4

VIN

PAD
PAD
PAD
PAD
PAD
PAD

[email protected]/25V_4
PC3118
[email protected]/25V_4

PC3115
PC3116
V2@10u/10V_8
V2@10u/10V_8

54418-1.8_VFB_1
5V_LCD

HWPG_VTT 36,40
PC3119
V2@1000p/50V_4

VIN_SRC

11/19 Del 3G power circuit.

+1.5V_GFX

+1.8V_GFX

+1.8V

+15V

PR3040
[email protected]/F_4

1/13 Add 3D LCD power circuit.

5V_LCD

V0=0.8*(R1+R2)/R2

+1.5V_SUS
B

PR46
ES@22_8

PR36
ES@22_8

PR49
ES@1M/F_6

PQ8
ES@DMN601K-7

PQ13
ES@DMN601K-7

+1.05V_GFX

PR48
ES@22_8

+1.05V

PR43
ES@1M/F_6

2
PQ6
ES@DMN601K-7

PQ10
ES@DMN601K-7

PC39
*ES@2200p/50V_4

+1.05V_GFX

2
PQ9
ES@DMN601K-7

PQ7
ES@DTC144EU

dGPU_D

3
2
1

PR39
ES@1M/F_62

PR35
SW@100K_4

4
PQ54
ES@AO4468

PQ51
ES@AO3404

+3V_GFX

SW@0_4

+3VPCU

dGPU_D
EV@0_4

2.87A(Max 3.83A)

10/19

0.23A(Max0.3A)

+15V

PR37
ES@22_8

PR244

+1.5V_GFX

PR38
ES@1M/F_6

11 dGPU_PWR_EN

+1.8V_GFX

5
6
7
8

+3V_GFX

11/12
PR243

PC46
*ES@2200p/50V_4

4.28A(Max5.72A)

VIN_SRC

MAINON

PQ50
ES@AO4468

PQ11
ES@DTC144EU

PC38
ES@1u/10V_4

PQ53
ES@AO3404

1
2
PQ12
ES@DMN601K-7

2
PR40
ES@1M/F_6

ES@0_4

VGA_PG

dGPU_D1

3
PR44

43,47

dGPU_D1

10/19

3
2
1

PR47
ES@1M/F_6

5
6
7
8

Quanta Computer Inc.

1.04A(Max1.38A)

PROJECT : ZR7
SW@ --> iGPU & GPU Switch
5

Size

Document Number

Date:

Monday, February 22, 2010

Rev
3B

Discharge/1.8V)
4

Sheet
1

VIN_SRC

PU5B

PD2
SW1010CPT
A

LM393

For EC control thermal protection (output 3.3V)

PR87
1M_6

PQ17
AO3409

36,38

S5_ON

Thermal protection

PQ18
DTC144EU

PR85
*SHORT_6

SYS_SHDN#
PR83
1.2K/F_4

PR84
200K/F_4

4,38

PR81
200K_6

PC69
.1u/50V_6

2.469V

2
PQ15
DMN601K-7

PU5A
LM393

PC67
.1u/50V_6

PR41
10K_6_NTC

PR86
200K/F_4

S5_ON

PQ19
DMN601K-7

+3V

VIN_SRC

Add it for S3 leakage circuit

PR143
22_8

PR146
1M/F_6

35 MAINON_DIS_G

+5V

+1.1V_VTT

PR137
22_8

+1.5V

PR140
22_8

+1.05V

PR150
22_8

+15V

PR149
22_8

PR145
1M/F_6

7/23 modify
MAIND

MAIND

35,38,42

3
2
2

PQ40
DMN601K-7

DMN601K-7

Quanta Computer Inc.

PQ45
DMN601K-7

PQ46
DMN601K-7

PC118
*2200p/50V_4

PROJECT : ZR7

DMN601K-7

PQ42
1

PQ39
1

PQ41
DMN601K-7

PQ47
DTC144EU

2
2

PR148
*100K_4

PR142
1M/F_6

36,40,41,42,45 MAINON

MAINON_DIS_G

Size

Document Number

Rev
3B

Thermal Protection
Date:
1

Monday, February 22, 2010

Sheet
5

V1@ --> One Phase dGPU only

+5V_S5

EV@ --> External VGA SKU

VIN

SW@ --> iGPU & dGPU Switch

PQ37
V1@AOL1448

PC2

V1@1u/10V_6

2
8792VCC

VDD

8792TON

8792DH

BST

8792BST

TON

VGA_PG
8792EN

11,43 dGPU_VRON

V1@MAX8792ETD+TLX

PC1

8792SKIP# 12
PR8

PR3031
ES@0_4

SKIP#
DL

*V1@0_4
8792REFIN 10

REFIN

PR122

8792LX

8792DL

ILIM

PL3004
[email protected]
PR21
V1@1_8

10/19

8792REF

REF

8792_GND
PR130
V1@34K/F_4

+
PC25
V1@330u/2V

PC15
V1@1000p/50V_4

8792_GND

8792ILIM

11M@
N11M-GE1
Setitng

REF-2V
V1@100K_4

+VGPU_CORE

PC17
PC113
V1@2200p/50V_4
V1@10u/25V/X6S_1206
11P@
PL6
N11P-GE1
[email protected]
Setitng
+VGPU_CORE

1
2
3

EV@ --> GPU only

PU1

change net name