Scribd
Upload
1K views

Homework Solutions 4

This document contains the solutions to homework problems from an ECE 171 digital logic design course. The problems involve minimizing Boolean functions using Karnaugh maps and implementing the functions using logic gates. Specifically, the document provides solutions for minimizing two functions and combining them, simplifying a Boolean expression, identifying functions from logic gate schematics, and assessing the compatibility of logic gate voltage specifications.

Uploaded by

Minh Hoang
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
1K views

Homework Solutions 4

This document contains the solutions to homework problems from an ECE 171 digital logic design course. The problems involve minimizing Boolean functions using Karnaugh maps and implementing the functions using logic gates. Specifically, the document provides solutions for minimizing two functions and combining them, simplifying a Boolean expression, identifying functions from logic gate schematics, and assessing the compatibility of logic gate voltage specifications.

Uploaded by

Minh Hoang
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 4

ECE

171 Winter 2011 Homework 4 Solutions 1. [30] Consider the following two functions: ! !, !, ! , ! = 0,2,3,4,6,7,10,11 ! !, !, ! , ! = (0,4,8,9,10,11,12,13) a) Show K-maps and minimal equations for each of the functions. How many total gates are required (not including inverters)? You can assume AND and OR gates with any fan-in you like.

! !, !, ! , ! = ! ! + ! ! + ! ! ! !, !, ! , ! = ! ! + ! ! + ! ! Requires 8 gates. b) Now consider that the functions are to be implemented as part of the same circuit. Show K- maps that reduce the total number of gates needed. How many total gates are required? Hint: consider product term sharing. 5 points for correctly filled in and circled K-maps, 5 points for correct equations, 5 points for correct number of gates.

! !, !, ! , ! = ! ! ! + ! ! + ! ! ! ! !, !, ! , ! = ! ! ! + ! ! + ! ! ! Requires 6 gates.

5 points for correctly filled in and circled K-maps, 5 points for correct equations, 5 points for correct number of gates.

2. [15] Simplify the Boolean function ! !, ! , !, ! = There are two possible (equivalent) solutions:

1,3,7,11,15) + !" 0,2,5 . 5 points for correctly filled in and K-map; 5 points for correctly circled K-map; 5 points for correct minimal equation

3. [10] What function is implemented by the schematic below?

!2 = ! ! ! + ! ! ! + ! !

4. [10] What function is implemented by the schematic below? Give your answer in SOP form using only AND, OR, and NOT.

! ! , !, !, ! = ! ! ! + ! ! 5. [10] Draw a schematic to implement F A, B, C, D = A B C + A B D + B C D using a SOP NAND/NAND implementation (that is using only NAND gates and inverters). You do not need to minimize the function.

6. [15] Obtain a minimized equation for the function F X, Y, Z = 0,1,3 + md(5,6,7) then draw a schematic to implement the minimized function in SOP form using AND, OR and inverters. Draw a schematic implementing the function using only NOR and inverters. 5 points each for correct K-map (with circling), AND/OR circuit, NOR/NOR circuit.

7. [10] Can a 74AC08 output drive a 74AS138 input? Why or why not? Be specific. Assume both devices operate at a supply voltage Vcc = 4.5V. Yes. The Voh for the 74AC08 is at least 3.7V under the worst conditions, still greater than the Vih of the 74AS138. Its Vol is at most 0.44V, less than the 74AS138s Vil of 0.7V.

10 points: 5 points for Yes, 5 points for correct explanation specifically referring to Voh/Vih

You might also like