Scribd
Upload
159 views1 page

Syllabus VL9221

The document outlines the units of a course on VLSI design methodologies. Unit I introduces VLSI design automation tools and computational complexity. Unit II covers design rules, layout compaction, and placement algorithms. Unit III discusses floor planning concepts and global routing algorithms. Unit IV is about gate-level and switch-level simulation. Unit V focuses on high level synthesis, hardware models, allocation, assignment, scheduling, and transformations.

Uploaded by

ps0208
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
159 views1 page

Syllabus VL9221

The document outlines the units of a course on VLSI design methodologies. Unit I introduces VLSI design automation tools and computational complexity. Unit II covers design rules, layout compaction, and placement algorithms. Unit III discusses floor planning concepts and global routing algorithms. Unit IV is about gate-level and switch-level simulation. Unit V focuses on high level synthesis, hardware models, allocation, assignment, scheduling, and transformations.

Uploaded by

ps0208
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 1

VL9221 UNIT I

CAD FOR VLSI CIRCUITS VLSI DESIGN METHODOLOGIES

LTP C 300 3 9

Introduction to VLSI Design methodologies - Review of Data structures and algorithms - Review of VLSI Design automation tools - Algorithmic Graph Theory and Computational Complexity - Tractable and Intractable problems - general purpose methods for combinatorial optimization. UNIT II DESIGN RULES 9

Layout Compaction - Design rules - problem formulation - algorithms for constraint graph compaction - placement and partitioning - Circuit representation - Placement algorithms - partitioning UNIT III FLOOR PLANNING 9

Floor planning concepts - shape functions and floorplan sizing - Types of local routing problems - Area routing - channel routing - global routing - algorithms for global routing. UNIT IV SIMULATION 9

Simulation - Gate-level modeling and simulation - Switch-level modeling and simulation - Combinational Logic Synthesis - Binary Decision Diagrams - Two Level Logic Synthesis. UNIT V MODELLING AND SYNTHESIS 9

High level Synthesis - Hardware models - Internal representation - Allocation assignment and scheduling - Simple scheduling algorithm - Assignment problem High level transformations. TOTAL: 45 REFERENCES: 1. S.H. Gerez, "Algorithms for VLSI Design Automation", John Wiley & Sons,2002. 2. N.A. Sherwani, "Algorithms for VLSI Physical Design Automation", Kluwer Academic Publishers, 2002.

You might also like