TC281

1036- 1010-PIXEL CCD IMAGE SENSOR

SOCS058D JUNE 1996 REVISED MARCH 2003

D
D
D
D
D
D
D
D
D
D
D
D
D

High-Resolution, Solid-State
Frame-Transfer Image Sensor
11.3-mm Image Area Diagonal
1000 (H) x 1000 (V) Active Elements
Up to 30 Frames per Second
8-m Square Pixels
Low Dark Current
Advanced Lateral Overflow Drain for
Antiblooming
Single-Pulse Image Area Clear Capability
Dynamic Range of More Than 60 dB
High Sensitivity and Quantum Efficiency
Nondestructive Charge Detection Through
Texas Instruments Advanced BCD Node
Technology
High Near-Infrared (IR) and Blue Response
Solid-State Reliability With No Image
Burn-In, Residual Imaging, Image
Distortion, Image Lag, or Microphonics

DUAL-IN-LINE PACKAGE
(TOP VIEW)
SUB 1

22 SUB

ODB 2

21 TDB

IAG 3
SUB 4
SAG 5
SAG 6
SUB 7
OUT 8
ADB 9
CDB 10
VGATE 11

20 IAG
19 SUB
18 SUB
17 SUB
16 NC
15 SRG
14 TRG
13 VSOURCE
12 RST

description
The TC281 is a frame-transfer charge-coupled-device (CCD) image sensor that provides high-resolution image
acquisition capability for image-processing applications such as robotic vision, medical X-ray analysis, and
metrology. The image-sensing area measures 8 mm horizontally and 8 mm vertically; the image-area diagonal
measures 11,3 mm and the sensor has 8-m square pixels. The image area contains 1000 active lines with 1000
active pixels per line. The dark reference signal can be obtained from ten dark reference lines located between
the image area and the storage area, 28 dark reference pixels located at the left edge of each horizontal line,
and 8 dark reference pixels located at the right edge of each horizontal line.
The storage section of the TC281 device contains 1010 lines with 1036 pixels per line. The area is protected
from exposure to light by a metal layer. Photoelectric charge that is generated in the image area of the sensor
can be transferred into the storage section in less than 110 s. After the image capture is completed (integration
time) and the image is transferred into the storage, the image readout is accomplished by transferring charge,
one line at a time, into the serial register located below the storage area. The serial register contains 1036 active
pixels and 9 dummy pixels. The maximum serial-register data rate is 40 megapixels per second. If the storage
area must be cleared of all charge, charge can be transferred quickly across the serial registers into the clearing
drain located below the register.
A high performance bulk charge detection (BCD) node converts charge from each pixel into an output voltage.
A low-noise, two-stage, source-follower amplifier further buffers the signal before it is sent to the output pin. A
readout rate of 30 frames per second is easily achievable with this device.
This MOS device contains limited built-in gate protection. During storage or handling, the device leads should be shorted together
or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to VSS. Under no
circumstances should pin voltages exceed absolute maximum ratings. Avoid shorting OUT to VSS during operation to prevent
damage to the amplifier. The device can also be damaged if the output terminals are reverse-biased and an excessive current is
allowed to flow. Specific guidelines for handling devices of this type are contained in the publication Guidelines for Handling
Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
Copyright 2003, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

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TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

description (continued)
The blooming protection of the sensor is based on an advanced lateral overflow drain (ALOD). The antiblooming
function is activated when a suitable dc bias is applied to the overflow drain pin. With this type of blooming
protection it is also possible to clear the image area of charge completely. This is accomplished by providing
a single 10-V pulse of at least 1 s duration to the overflow drain pin.
The TC281 image sensor uses TI-proprietary advanced virtual-phase (AVP) technology, the advanced lateral
overflow drain, and the BCD detection node. These features provide the TI image sensing devices with a high
blue response, high near-IR sensitivity, low dark current, high photoresponse uniformity, and single-phase
clocking. The TC281 is characterized for operation from -10_C to 45_C.

functional block diagram

Top Drain

ODB

21

2
20

Image Area
IAG

TDB

IAG

6
SAG

SAG

Storage Area

VSOURCE
ADB

13

Amplifier

9
15

8
OUT
RST
Vgate

Serial Register
and Transfer Gate

12
11

Clearing Drain
10
CDB

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14

SRG
TRG

TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

sensor topology diagram

1000 Pixels
1000 Lines
28 Pixels

8 Pixels
10 Lines

1 Pixel

1 Pixel
1010 Lines

1036

Dummy Pixels

1 Dummy Pixel

Terminal Functions
TERMINAL
NAME
ADB

NO.

I/O

DESCRIPTION

Supply voltage for amplifier drain bias

CDB

10

Supply voltage for clearing drain bias

IAG

3, 20

Image area gate

NC

16

No internal connection

ODB

Supply voltage overflow drain antiblooming bias

OUT

Output signal

RST

12

Reset gate

SAG

5, 6

Storage area gate

SRG

15

Serial register gate

SUB

1, 4, 7, 17,
18, 19, 22

TDB

21

NC

TRG

14

Transfer gate

VGATE

11

Bias voltage for the gate of the BCD node

VSOURCE

13

Bias voltage for the source of the BCD node

Substrate and clock return

Supply voltage for test diode

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TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

Parallel Transfer

Integration Period Frame 2

ODB

1010 Clocks
IAG

SAG

TRG

SRG
1046 Clocks
RST
1046 Clocks

1010 Cycles
Readout Frame 1

Readout Frame 2

Figure 1. Overview of Frame Timing with Variable Integration

Parallel Transfer 1010 Clocks

ODB

IAG

SAG

TRG

SRG

RST

Figure 2. Expanded Parallel Transfer Timing

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TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

1010 Cycles
Transfers One Line
From SA to SR

IAG
~1s
SAG

Clears SRG During

Partial Line Readouts

TRG

SRG

RST

Serial Line Readout

1046 Clocks

Figure 3. Expanded Storage Area-to-Serial Register Transfer and Pixel Readout Timing
Storage Area Clear
9525 Clocks
ODB

IAG

SAG

TRG

SRG

RST

Figure 4. Special Modes of Operation: Storage Area Clear

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TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

Transfer The
First Line From
SA to AR

Transfer The
Second Line
Adding to The First

IAG
~1s
Each Additional Pulse
Bins One Additional Line

SAG

TRG

SRG

RST

Serial Line Readout

Figure 5. Special Modes of Operation: Binning

detailed description
The TC281 image sensor consists of five basic functional blocks:

D
D
D
D
D

Image-sensing area
ALOD
Storage area
Serial register
BCD node with the buffer output amplifier

image-sensing area
The image-sensing area contains 1036 x 1010 pixel elements. A metal light shield covers 28 pixels on the left
edge of the sensing area, 8 pixels on the right edge, and 10 rows at the bottom of the sensing area. The dark
pixel signal is used as a black reference during the video signal processing. The dark references accumulate
the dark current at the same rate as the active photosites, thus representing the true black level signal. As light
enters the active photosites in the image area, electron hole pairs are generated and the electrons are collected
in the potential wells of the pixels. The wells have a finite charge storage capacity determined by the pixel design.
When the generated number of electrons in the illuminated pixels exceeds this limit, the electrons can spill over
into neighboring pixels and cause blooming. To prevent this, each horizontal pair of pixels in the image sensing
area shares a lateral overflow drain structure which provides up to a 1000-to-1 protection against such
undesirable phenomena.
advanced lateral overflow drain
The advanced lateral overflow drain structure is shared by two neighboring pixels and provides several unique
features in the sensor. By varying the dc bias of the drain pin, the blooming protection level can be controlled
and traded for the well capacity.

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TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

advanced lateral overflow drain (continued)

Applying a 10-V pulse for a minimum duration of 1 s above the nominal dc bias level causes the charge in the
image area to be completely cleared. This feature permits a precise control of the integration time on a
frame-by-frame basis. The single-pulse clear capability also reduces smear by eliminating accumulated charge
from the pixels before the start of the integration (single-sided smear).
Application of a negative 2-V pulse during the parallel transfer is recommended to prevent possible artifacts
resulting from slight column-to-column pixel well capacity variations.
storage area
A metal light shield covers the storage area to prevent a further integration of charge when charge is being
stored before readout. To use the sensor in a single-shot mode after being dormant for a long period of time,
you must perform multiple storage area clears to ensure the complete charge removal (see Figure 4).
serial register
The serial register shifts the data out of the sensor area at a maximum rate of 40 MHz, thus achieving a
1000 x 1000 pixel readout with the frame rate of 30 frames per second. The data is shifted to the BCD node
on the falling edge of the SRG clocking pulses.
The data can also be transferred out of the serial registers in a parallel direction to the clear drain. This allows
partial line readouts. The timing for this operating mode consists of transferring the next row from the storage
into the serial register while also clocking the TRG. Binning of multiple pixels within a column to increase the
device sensitivity can be performed by multiple line transfers into the serial register prior to the register readout.
The timing for this mode of operation is shown in Figure 5. Care must be taken not to exceed the well capacity
of the serial register by transferring too many lines into it. Horizontal binning is also possible in this sensor. It
can be accomplished in the BCD detection node by a suitable skipping of the reset pulses.
bulk charge detection node and output amplifier
The TC281 image sensor uses a patented TI charge detection device called the bulk charge detection node.
In this node, the signal electron packets are transferred under a uniquely designed p-channel MOS transistor
where they modulate the transistor threshold voltage. The threshold voltage changes are then detected; they
represent the desired output signal. After sensing is completed, charge is removed from the node by applying
a reset pulse. One of the key advantages of the BCD charge detection concept is that charge is sensed
nondestructively. The nondestructive readout does not generate reset noise, eliminating the need for the CDS
post processing. Other advantages are high speed and low noise.
Emitter-follower output buffering is recommended for the TI image sensors. TI also recommends that the
emitter-follower be ac coupled to the rest of the signal processing chain. ac coupling eliminates problems with
the sensor output dc stability and the sensor-to-sensor dc output level variations.

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TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

spurious nonuniformity specification

The spurious nonuniformity specification of the TC281 CCD grade 30 is based on several performance
characteristics:

D
D
D

Amplitude of the nonuniform line or pixel signal

Polarity of the nonuniform pixel signal

Black

White

Column signal amplitude

The CCD sensors are characterized in both an illuminated condition and a dark condition. In the dark condition,
the nonuniformity is specified in terms of absolute amplitude, as shown in Figure 6. In the illuminated condition,
the nonuniformity is specified as a percentage of the total amplitude, as shown in Figure 7.
PIXEL NONUNIFORMITY
PART NUMBER

COLUMN NONUNIFORMITY

DARK CONDITION

ILLUMINATED CONDITION

PIXEL AMPLITUDE, x (mV)

% OF TOTAL ILLUMINATION

COLUMN AMPLITUDE
x (mV)

< 24

< 30%

< 0.6 mV

TC281-30
mV

Amplitude

% of Total
Illumination

Figure 6. Pixel Nonuniformity,

Dark Condition

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Figure 7. Pixel Nonuniformity,

Illuminated Condition

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TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage range, ADB, CDB, TDB, Vgate, Vsource . . . . . . . . . . . . . . . . . . . . . . . . . . . SUB to SUB + 15 V
Supply voltage range, ODB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SUB to SUB + 21 V
Clock voltage range: IAG, SAG, SRG, TRG (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V to 15 V
Clock input voltage range: RST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to +10 V
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10C to 45C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30C to 85C
Package temperature for ensured operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10C to 55C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Substrate at ground

recommended operating conditions

ADB, CDB
Supply voltage, VCC

MIN

NOM

MAX

11

12

13

Vsource

Supply voltage for ODB

Supply current

Image area clearing

Vclear

15

15.5

Antiblooming control

16

Vabc

5.5

Parallel transfer

Vxfer

4.5

3.5

ADB

Substrate bias voltage

0
Image area gate,
gate IAG
Storage area gate,
gate SAG

Clock voltage

gate SRG
Serial register gate,
Transfer gate,
gate TRG
Reset gate,
gate RST

1.5

2.5

Low

10.5

10

9.5

High

1.5

2.5

Low

10.5

10

9.5

High

1.5

2.5

Low

10.5

10

9.5

High

1.5

2.5

Low

10.5

10

9.5

High

Low

0.5

10

SRG RST

40

TRG

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V
mA
V

High

IAG, SAG
Clock frequency, fclock

12

Vgate

UNIT

MHz

10

TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature
PARAMETER

MIN

TYP

Dynamic range (see Note 2)

MAX

62

Charge-conversion factor

dB
V/e

10

Charge-transfer efficiency (see Note 3)

0.99990

0.99995

Signal-response delay time, Tau (see Note 4)

Output resistance

ns

310

Noise-equivalent signal

12

Supply current (see Note 5)

Capacitance

UNIT

400

25

electrons

IDD

3.5

IAG

14500

SAG

14500

SRG

52

TRG

50

mA

pF

RST
5.5
All typical values are used at TA = 25C.
NOTES: 2. Dynamic range is 20 times the logarithm of the mean-noise signal divided by the saturation-output signal.
3. Charge-transfer efficiency is one minus the charge loss per transfer in the output register. The test is performed in the dark using
an electrical input signal.
4. Signal-response delay time is the time between the falling edge of the SRG pulse and the output-signal valid state.
5. VADC at 12 V and VSUBSTRATE at ground.

optical characteristics
PARAMETER
Sensitivity (see Note 6)

MIN

No IR filter

MAX

240

With IR filter
Antiblooming disabled

320

Maximum usable signal, VUSE

Antiblooming disabled

120

Blooming overload ratio (see Note 8)

300

Image-area well capacity

mV
mV
1000
32K

Smear at 5 MHz (see Notes 9 and 10)

UNIT
mV/lux

30

Saturation signal, Vsat (see Note 7)

Dark current

TYP

electrons

0.06%
TA = 21C

nA/cm2

0.3

Electronic-shutter capability

1/1000

NOTES: 6.
7.
8.
9.

1/30

Saturation

sec

Based on 16.67 ms integration time.

Saturation is the condition in which further increases in exposure do not lead to further increase in output signal.
Blooming-overload ratio is the ratio of blooming exposure to saturation exposure.
Smear is a measure of the error introduced by transferring charge through an illuminated pixel in shutterless operation. It is
equivalent to the ratio of the single-pixel transfer time to the exposure time using an illuminated section that is 1/10 of the image-area
vertical height with recommended clock frequencies.
10. The exposure time is 16.67 ms, the fast dump clocking rate during vertical timing is 10 MHz, and the illuminated section is 1/10 of
the height of the image section.

10

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TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

TYPICAL CHARACTERISTICS
RESPONSIVITY
vs
WAVELENGTH
.30

.25
Responsitivity A/W

Responsitivity
.20

.15

.10

.05

0
300

500

700

900

1100

Wavelength nm

Figure 8. Typical Spectral Responsitivity

SENSITIVITY
vs
WAVELENGTH
12

Sensitivity Vcm^2/ j

10
Sensitivity
8

0
300

500

700

900

1100

Wavelength nm

Figure 9. Typical Spectral Sensitivity

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TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

TYPICAL CHARACTERISTICS
QUANTUM EFFICIENCY
vs
WAVELENGTH
250
100%
80%

Quantium Efficency mV

200

8.3 msec
Tint
60%

150
40%
100
20%
50
Data
0
400

500

600

700

800

900

1000

1100

Wavelength nm

Figure 10. Typical Spectral Quantum Efficiency

12

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TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

APPLICATION INFORMATION
VDD

U2
AB

VDD

R1
100 k

AB_IN
ODB

CLR

CLR_IN
U1

Discrete ODB Driver

1
2

U3
IAG

IAG_IN

IAG

SAG

SAG_IN

SAG

4
5
6
7
8

Discrete Driver

9
10
11

SUB
ODB

SUB
TDB

IAG
SUB
SAG

IAG
SUB
SUB

SAG
SUB
OUT

SUB
NC
SRG

ADB
CDB

TRG
VSOURCE
RST

VGATE

22
21
20
19
18
17
16
15
14
13
12

U4
SRG

SRG_IN

SRG

TRG

TRG_IN

TRG

RST

RST_IN

RST

Discrete Serial Driver

2
R2
100

1
Q1
NPN
R3
1 k

NOTES: A. TI recommends designing ac-coupled systems.

B. Inputs from user-defined timer

ccd ANALOG OUT

(AC Coupled)

3
C1

C. Decoupling capacitors are not shown.

Figure 11. Typical Application Circuit

Table 1. Supply Voltages for Application Circuits
SUPPLY

VOLTAGE

VDD
VCC

12 V

VAA
VRST

10 V

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58 V

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TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

APPLICATION INFORMATION
VDD

VDD
R4
3.83 k

U5
1
2
CLR
3
4

8
+V

+V

IN

P-OUT

NC

N-OUT

R6

C2
0.22 F
C3
0.22 F

R7

R5
1 k

200
K
R8
3.24 k

4-A Peak FET Driver

VDD

U6
1
2
AB
3
4

8
+V

+V

IN

P-OUT

NC

N-OUT

R9

10

C4
ODB
0.022 F
C5
0.22 F

4-A Peak FET Driver

NOTES: A. MOSFET driver with a 4-A peak current and a 2- output resistance (see Figure 14).
B. Image area clear (CLR) is active high while the parallel transfer (AB) is active low. These two pulses generate the timing for
ODB, as shown in Figure 1.
C. Decoupling capacitors are not shown.

Figure 12. Typical ODB Driver Circuit

14

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TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

APPLICATION INFORMATION
VCC
R10
10 k

VCC

R11
392

C6
0.22 F

TRG_IN

D1

R12
5.1

R13
2 k
R14
18

Q3
NFET

2
C7
0.22 F

R15
10 k

R13
2 k

SRG
1

3 Q2
PFET
1

D1

R12
5.1

D2

R11
392

C6
0.22 F

3 Q2
PFET

SRG_IN

R10
10 k

TRG

D2
1

R14
18

Q3
NFET

2
C7
0.22 F

R16
200

R15
10 k

VAA

R16
200
VAA

NOTE A: Decoupling capacitors are not shown.

Figure 13. Typical Serial/Transfer Driver Circuits

VRST
R10
10 k

R11
392

C6
0.22 F
2

RST_IN

3 Q2
PFET
1

D1

R12
200
R13
2 k

RST

D2
1

R14
200

Q3
NFET

2
C7
0.22 F

R15
10 k

R16
200

NOTE A: Decoupling capacitors are not shown.

Figure 14. Typical Reset Driver Circuit

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TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

APPLICATION INFORMATION
IAG_IN
R17
806

VCC

3
1

Q4
PNP

U7
1
2

3
R18
1 k

8
+V

+V

IN

P-OUT

NC

N-OUT

IAG

6
5

4-A Peak FET Driver

VAA
SAG_IN
R19
806

VCC

3
1

Q5
PNP

U8
1
2

3
R20
1 k

8
+V

+V

IN

P-OUT

NC

N-OUT

6
5

4-A Peak FET Driver

VAA
NOTES: A. MOSFET driver with a 4-A peak current and a 2- output resistance (see Figure 13).
B. Decoupling capacitors are not shown.

Figure 15. Typical Parallel Driver Circuit

16

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SAG

TC281
1036- 1010-PIXEL CCD IMAGE SENSOR
SOCS058D JUNE 1996 REVISED MARCH 2003

MECHANICAL DATA
The package for the TC281 consists of a ceramic base, a glass window, and a 22-lead frame. The package leads
are configured in a dual in-line organization and fit into mounting holes with 2,54 mm (0.10 in) center-to-center
spacing. The glass window is sealed to the package by an epoxy adhesive. It can be cleaned by any standard
procedure for cleaning optical assemblies or by wiping the surface with a cotton swab moistened with alcohol.
Package
Center

TC281 (22 pin)

3.22
2.62
1.12
0.92

Optical Center
0.67

28.22
27.66
25.13
24.87

2.10
1.70
0.508
1.00
0.90

0.08 0.08
Package
Center

17.90
17.40

16.60
16.40

Index Dot
Pin 1

0.30
0.20
18.03
17.53

9.51
9.21
0.76
0.16

5.10
3.50

0.56
0.46

2.67
2.41

11/00
NOTES: A.
B.
C.
D.

All linear dimensions are in millimeters.

Single dimensions are nominal.
The center of the package and the center of the image area are not coincident.
Each pin centerline is located within 0,25 mm (0.010 in) of its true longitudinal position.

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17

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enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TIs terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TIs standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
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