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Digital System Design Question Paper

This document contains an exam for a digital system design course, with 8 questions covering various topics: 1) Implementing a BCD to excess-3 code converter using ROM and calculating the cross point density. 2) Drawing the schematic, SSR notation, and NMOS implementation for a PLA with three inputs and three outputs. 3) Explaining the Boolean difference method and deriving a-tests and b-tests for detecting multiple stuck-at faults in a two level AND-OR circuit. 4) Explaining PODEM and transition count testing. 5) Drawing part of an ASM chart for a conditional register increment and drawing a control block diagram for a serial adder.

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3K views1 page

Digital System Design Question Paper

This document contains an exam for a digital system design course, with 8 questions covering various topics: 1) Implementing a BCD to excess-3 code converter using ROM and calculating the cross point density. 2) Drawing the schematic, SSR notation, and NMOS implementation for a PLA with three inputs and three outputs. 3) Explaining the Boolean difference method and deriving a-tests and b-tests for detecting multiple stuck-at faults in a two level AND-OR circuit. 4) Explaining PODEM and transition count testing. 5) Drawing part of an ASM chart for a conditional register increment and drawing a control block diagram for a serial adder.

Uploaded by

mujju433
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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R09

Code No: C0602, C7001, C5508, C7706, C4505, C6806, C5706, C3801
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M.Tech I - Semester Examinations, April/May-2012
DIGITAL SYSTEM DESIGN
(Common To DIGITAL SYSTEMS & COMPUTER ELECTRONICS, ELECTRONICS &
COMMUNICATION ENGINEERING, EMBEDDED SYSTEMS, EMBEDDED SYSTEMS & VLSI
DESIGN, SYSTEMS & SIGNAL PROCESSING, VLSI & EMBEDDED SYSTEMS, VLSI SYSTEM
DESIGN, DIGITAL ELECTRONICS & COMMUNICATION SYSTEMS )

Time: 3hours

1.a)
b)

Max. Marks: 60

Answer any five questions


All questions carry equal marks
--Implement a bcd- to excess three code converter by ROM. Calculate the cross point
density of the implementation.
For a pla with the following function
z1(x1x2x3) = x1:
z2(x1x2x3) = x1x2+x1x2: z3(x1x2x3) = x2x3+x2x3
show the schematic diagram, show its ssr notation and draw nmos nor-nor
implementation.

2.a)
b)

Explain the Boolean difference method with an example.


A two level AND-OR circuit has four AND gates feeding one OR gate.
The four AND gates realize the product terms x1x3x4, x2x4, x1x3x4 and x1x2x3
respectively. Derive the a and b - tests for detecting multiple stuck at faults.

3.a)
b)

Explain podem with an example.


Explain transition count testing with an example.

4.

Find the minimized PLA of the following output Boolean function by a PLA minimizer.
f1 = (2,4,5,6,7,10,14,15): f2 = (4,5,7,11,15)

5.a)

Draw the portion of an ASM chart that specify a conditional operation to increment
register (r) during state t1 and transfer to state t2 if control inputs z and y are
equal to 1 and 0 respectively.
Design an ASM chart for a serial adder with accumulator and show the control
block diagram.

b)

6.

Explain the procedure of designing a fault detection experiment with the help of an
example.

7.

Construct a fault-detection experiment for the machine of the following table. That is
entirely preset, that is with no initial adaptation part.
Ps
A
B
C
D

8.
a)
b)
c)

Ns, z
X = 0,
D,0
C,0
A,0
D,1

x=1
c,0
d,0
b,0
a,1

Write short notes on the following.


Capabilities and limitations of FSM
Transition check approach in sequential circuits.
Bridging fault model.
******

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