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Module Mux8 - Data (Select, D, Q) Input (2:0) Select Input (7:0) D Output Q Assign Q D (Select) Endmodule

This document describes two modules: MUX8TO1, an 8-to-1 multiplexer that selects one of eight inputs (A, B, C, D, E, F, G, H) based on a 3-bit selection code and outputs it to MUX_OUT. The second module, mux8_data, is a simpler 8-to-1 multiplexer that selects one bit from a 8-bit input d based on a 3-bit select code and outputs it to q.

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Er Pradip Patel
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0% found this document useful (0 votes)
101 views1 page

Module Mux8 - Data (Select, D, Q) Input (2:0) Select Input (7:0) D Output Q Assign Q D (Select) Endmodule

This document describes two modules: MUX8TO1, an 8-to-1 multiplexer that selects one of eight inputs (A, B, C, D, E, F, G, H) based on a 3-bit selection code and outputs it to MUX_OUT. The second module, mux8_data, is a simpler 8-to-1 multiplexer that selects one bit from a 8-bit input d based on a 3-bit select code and outputs it to q.

Uploaded by

Er Pradip Patel
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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module MUX8TO1(sel, A,B,C,D,E,F,G,H, MUX_OUT);

input [2:0] sel;


input A,B,C,D,E,F,G,H;
input reg MUX_OUT;
always@(A,B,C,D,E,F,G,H,sel)
begin
case(sel)
3'd0:MUX_OUT=A;
3'd1:MUX_OUT=B;
3'd2:MUX_OUT=C;
3'd3:MUX_OUT=D;
3'd4:MUX_OUT=E;
3'd5:MUX_OUT=F;
3'd6:MUX_OUT=G;
3'd7:MUX_OUT=H;
default:; // indicates null
endcase
end
endmodule

module mux8_data(select,d,q);
input[2:0] select;
input[7:0] d;
output q;
assign q=d[select];
endmodule

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