Q2AS (H) CPU (-S1) - User's Manual SH (NA) - 3599-K (01.11)
Q2AS (H) CPU (-S1) - User's Manual SH (NA) - 3599-K (01.11)
Before using this product, please read this manual and the relevant manuals carefully and pay full attention
to safety to handle the product correctly.
In this manual, the safety precautions are classified into two levels: "
CAUTION".
WARNING
CAUTION
Under some circumstances, failure to observe the precautions given under "
serious consequences.
Make sure that the end users read this manual and then keep the manual in a safe place for future
reference.
[DESIGN PRECAUTIONS]
WARNING
Create a safety circuit outside the programmable controller to ensure the whole system will operate
safely even if an external power failure or a programmable controller failure occurs. Otherwise,
incorrect output or malfunction may cause an accident.
(1) When creating an emergency stop circuit, a protection circuit or an interlock circuit for
incompatible actions such as forward/reverse rotation or for damage prevention such as the
upper/lower limit setting in positioning, create it outside the programmable controller.
Install the emergency stop switch outsid the controlpanel so that workers can operate it easily.
(2) When the programmable controller detects the following error conditions, it stops the operation
and turn off all the outputs.
The overcurrent or overvoltage protector of the power supply module is activated.
The programmable controller CPU detects an error such as a watchdog timer error by the
self-diagnostics function.
In the case of an error undetectable by the programmable controller CPU, such as an I/O control
part error, all the outputs may turn on. In order to make all machines operate safely in such a
case, set up a fail-safe circuit or a specific mechanism outside the programmable controller. For
fail safe circuit example, refer to "OADING AND INSTALLATION" of this manual.
(3) Depending on the failure of the output module's relay or transistor, the output status may remain
ON or OFF incorrectly. For output signals that may lead to a serious accident, create an external
monitoring circuit.
A-1
[DESIGN PRECAUTIONS]
WARNING
If load current more than the rating or overcurrent due to a short circuit in the load has flowed in the
output module for a long time, it may cause a fire and smoke. Provide an external safety device such
as a fuse.
Design a circuit so that the external power will be supplied after power-up of the programmable
controller.
Activating the external power supply prior to the programmable controller may result in an accident
due to incorrect output or malfunction.
For the operation status of each station at a communication error in data link, refer to the respective
data link manual.
Otherwise, incorrect output or malfunction may cause an accident.
When controlling a running programmable controller (data modification) by connecting a peripheral
device to the CPU module or a PC to a special function module, create an interlock circuit on
sequence programs so that the whole system functions safely all the time.
Also, before performing any other controls (e.g. program modification, operating status change
(status control)), read the manual carefully and ensure the safety.
In these controls, especially the one from an external device to a programmable controller in a
remote location, some programmable controller side problem may not be resolved immediately due
to failure of data communications.
To prevent this, create an interlock circuit on sequence programs and establish corrective
procedures for communication failure between the external device and the programmable controller
CPU.
When setting up the system, do not allow any empty slot on the base unit.
If any slot is left empty, be sure to use a blank cover (A1SG60) or a dummy module (A1SG62) for it.
When using the extension base unit, A1S52B(S1), A1S55B(S1) or A1S58B(S1), attach the included
dustproof cover to the module in slot 0.
Otherwise, internal parts of the module may be flied in the short circuit test or when an overcurrent or
overvoltage is accidentally applied to the external I/O section.
CAUTION
Do not install the control lines or communication cables together with the main circuit or power lines,
or bring them close to each other.
Keep a distance of 100mm (3.94inch) or more between them.
Failure to do so may cause malfunctions due to noise.
If having read register R outside the allowable range with the MOV instruction, the file register data
will be FFFFH. Using this as it is may cause malfunctions.Pay attention not to use any out-of-range
file register when designing sequence programs.For instruction details, refer to the programming
manual.
When an output module is used to control the lamp load, heater, solenoid valve, etc., a large current
(ten times larger than the normal one) may flow at the time that the output status changes from OFF
to ON. Take some preventive measures such as replacing the output module with the one of a
suitable current rating.
Time from when the CPU module is powered on or is reset to when it enters in RUN status depends
on the system configuration, parameter settings, and program size.
Design the program so that the entire system will always operate safely, regardless of the time.
A-2
[INSTALLATION PRECAUTIONS]
CAUTION
Use the programmable controller under the environment specified in the user's manual.
Otherwise, it may cause electric shocks, fires, malfunctions, product deterioration or damage.
Install the module after inserting the pegs on the bottom of the module securely into the base unit
peg holes.
Not doing so could cause a malfunction, failure or fall.
Tightening the screw excessively may damage the screw and/or the module, resulting in a drop of
the module, a short circuit or malfunctions.
Connect the extension cable to the connector of the base unit or module.
Check for incomplete connection after installing it.
Poor electrical contact may cause incorrect inputs and/or outputs.
Insert the memory card and fully press it to the memory card connector.
Check for incomplete connection after installing it.
Poor electrical contact may cause malfunctions.
Be sure to shut off all the phases of the external power supply used by the system before mounting
or removing the module.
Failure to do so may damage the module.
Do not directly touch the conductive part or electronic components of the module.
Doing so may cause malfunctions or a failure of the module.
A-3
[WIRING PRECAUTIONS]
WARNING
Be sure to shut off all phases of the external power supply used by the system before wiring.
Failure to do so may result in an electric shock or damage of the product.
Before energizing and operating the system after wiring, be sure to attach the terminal cover
supplied with the product.
Failure to do so may cause an electric shock.
CAUTION
Always ground the FG and LG terminals to the protective ground conductor.
Failure to do so may cause an electric shock or malfunctions.
Wire the module correctly after confirming the rated voltage and terminal layout.
Connecting a power supply of a different voltage rating or incorrect wiring may cause a fire or failure.
Do not connect multiple power supply modules to one module in parallel.
The power supply modules may be heated, resulting in a fire or failure.
Press, crimp or properly solder the connector for external connection with the specified tool.
Incomplete connection may cause a short circuit, fire or malfunctions.
Tighten terminal screws within the specified torque range.
If the screw is too loose, it may cause a short circuit, fire or malfunctions.
If too tight, it may damage the screw and/or the module, resulting in a short circuit or malfunctions.
Carefully prevent foreign matter such as dust or wire chips from entering the module.
Failure to do so may cause a fire, failure or malfunctions.
Install our programmable controller in a control panel for use.
Wire the main power supply to the power supply module installed in a control panel through a
distribution terminal block.
Furthermore, the wiring and replacement of a power supply module have to be performed by a
maintenance worker who acquainted with shock protection.
(For the wiring methods, refer to Section 19.7.)
A-4
A-5
CAUTION
When performing online operations (especially, program modification, forced output or operating
status change) by connecting a peripheral device to the running CPU module, read the manual
carefully and ensure the safety.
Incorrect operation will cause mechanical damage or accidents.
Do not disassemble or modify each of modules.
Doing so may cause failure, malfunctions, personal injuries and/or a fire.
When using a wireless communication device such as a mobile phone, keep a distance of 25cm
(9.84inch) or more from the programmable controller in all directions.
Failure to do so may cause malfunctions.
Be sure to shut off all the phases of the external power supply used by the system before mounting
or removing the module.
Failure to do so may result in failure or malfunctions of the module.
Do not drop or apply any impact to the battery.
Doing so may damage the battery, resulting in electrolyte spillage inside the battery.
If any impact has been applied, discard the battery and never use it.
Do not install/remove the terminal block more than 50 times after the first use of the product.
(IEC 61131-2 compliant)
Before handling modules, touch a grounded metal object to discharge the static electricity from the
human body.
Failure to do so may cause failure or malfunctions of the module.
A-6
[DISPOSAL PRECAUTIONS]
CAUTION
When disposing of the product, treat it as an industrial waste.
When disposing of batteries, separate them from other wastes according to the local regulations.
(For details of the battery directive in EU member states, refer to Appendix 11.)
[TRANSPORTATION PRECAUTIONS]
CAUTION
When transporting lithium batteries, make sure to treat them based on the transportation regulations.
(Refer to Appendix 10 for details of the relevant models.)
A-7
A-8
REVISIONS
*The manual number is noted at the lower left of the back cover.
Print Date
*Manual Number
Sep.1996
SH (NA)-3599-A
Feb,1999
SH(NA)-3599-B
Revision
First printing
Additional model
SW
Addition
The contents of the function version B has been added.
Section 2.2, Section 7.2, Sections 8.2.1, 8.2.2, Section 19.8, Appendix 7, 8
Partial correction
Safety Precautions, Contents, Section 1.2, Section 3.3.1, Chapter 4, Section
5.3, Section 6.1, Section 8.10.1, Section 15.2, Section 16.1, Section 19.7.1,
Section 21.3.1, Appendix 1.6, Appendix 2
Dec., 2002
SH(NA)-3599-C
Partial correction
SAFETY PRECAUTIONS, Section 3.1.2, Section 3.3.1, Section 3.3.2, Section
3.3.3, Section 8.2.1, Section 8.5, Section 12.1.5, Section 12.1.6, Chapter 13,
Section 14.3, Section 15.1, Section 15.3, Section 16.1, Section 16.2, Section
17.2, Section 17.3, Section 19.1, Section 22.3.2, Appendix 3
Dec., 2003
SH(NA)-3599-D
Additional model
A1SY42P
Addition
Appendix 9, 9.1, 9.2
Partial correction
Section 3.3.1, Section 14.3, Section 18.3, Section 19.4.1, Section 19.8, Section
20.1.4, Section 21.3
Oct., 2006
SH(NA)-3599-E
Partial correction
SAFETY PRECAUTIONS, Section 1.1, Section 1.2, Section 2.1, 3.1.1, Section
3.1.2, Section 3.3.1, Section 3.3.2, Chapter 4, Section 5.3, Section 7.1, Section
7.2, Section 8.1, Section 8.2.1, Section 8.3, Section 8.4.3, Section 8.6, Section
8.8, Section 8.9, Section 8.10.1, Section 9.3, Section 9.4, Section 10.1, Section
10.5, Section 10.6.3, Section 10.8, Section 12.1, Section 12.1.3, Section 12.1.5,
Section 12.4, Chapter 13, Section 14.2, Section 15.1, Section 15.3, Section
16.1.1, Section 16.2, Section 16.3, Section 17.1, Section 17.2, Section 17.3,
Section 17.5, Section 18.1, Section 18.2, Section 18.3, Section 19.1, Section
19.4.1, Section 19.4.2, Section 19.5, Section 19.6, Section 19.7, Section 19.7.1,
Section 19.7.2, 20, Section 20.2.4, Section 20.2.6, Section 21.2, Section 21.3,
Section 21.4, Section 21.5, Section 22.2.5, Section 22.2.6, Section 22.2.8,
Section 22.3.3, Section 22.5.2, Appendix 1.1, Appendix 1.6, Appendix 2,
Appendix 3, Appendix 4.1, Appendix 4.2, Appendix 5.1, Appendix 5.2,
Deletion
Section 14.2
Chapter change
Section 14.3
Section 14.2
A-9
Print Date
*Manual Number
Apr.,2007
SH(NA)-3599-F
Revision
Partial correction
Section 3.1.1, 3.3.1, 3.3.2, 17.1, 19.7.1, 19.7.2, 20.1.3, 20.2.7, 22.5.1, 22.5.2,
Appendix 2, Appendix 3, Appendix 6.3
Addition
Section 20.1.8
Sep.,2008
SH(NA)-3599-G
Partial correction
SAFETY PRECAUTIONS, Section 5.2, 5.4, 8.2, 8.2.1, 8.5, 9.2, 9.3, 10.1, 10.3.
10.4, 10.5, 10.6.1, 12.1, 12.1.1, 12.1.7, 12.2, 12.3, 12.4, Chapter 13, Section
15.1, 15.3, 16.1.1, 16.2, 19.1, 19.2, 19.3, 19.4.1, 19.4.2, 19.7.1, 19.8, 20.1,
20.1.2, 20.1.3, 20.2, 20.2.1, 20.2.2, 20.2.3, 20.2.4, 20.2.6, 20.2.7, Chapter 21,
Section 21.3.1, 21.3.2, 21.4, 21.5, 22.1, 22.2.2, 22.2.5, 22.3, 22.5.1, Appendix 2
Addition
Appendix 11, Appendix 11.1, Appendix 11.2
Aug.,2009
SH(NA)-3599-H
Partial correction
Section 15.1, 18.3, 18.6, Chapter 20, Section 21.3.1, 21.3.2, 22.3.3, 22.5.1,
Appendix 2, 3
Nov.,2009
SH(NA)-3599-I
Partial correction
SAFETY PRECAUTIONS, Section 3.3.1, 21.3.1
Addition
CONDITIONS OF USE FOR THE PRODUCT
Mar.,2010
SH(NA)-3599-J
Partial correction
SAFETY PRECAUTIONS, Section 3.3.1, 3.3.2, 19.1, 19.7.1, 21.2, 21.3.2,
22.3.7, Appendix 2
Jan., 2011
SH(NA)-3599-K
Partial correction
Section 3.2, Section 15.1, Section 19.1, Section 20.1.1, Section 20.1.8
Addition
Section 20.1.9
A - 10
Introduction
Thank you for purchasing the Mitsubishi programmable logic controller MELSEC-QnA series.
Before using your new PLC, please read this manual thoroughly to gain an understanding of its functions so
that you can use it properly.
Please forward a copy of this manual to the end user.
Table of Contents
1.1
1.2
OVERVIEW
2.1
Features ........................................................................................................................................2 - 1
2.2
3.1
3.2
3.3
2 - 1 to 2 - 8
1 - 1 to 1 - 2
SYSTEM CONFIGURATION
3 - 1 to 3 - 23
3.1.2
3.3.2
3.3.3
PERFORMANCE SPECIFICATIONS
4 - 1 to 4 - 3
5.1
5.2
5.3
5.4
6.1
Reading/Writing Data from/to the Q2ASCPU Using the FROM/TO Instruction ............................6 - 2
6.2
6.3
Processing for Data Communication Requests from a Special Function Module .........................6 - 5
7.1
For MELSECNET/MINI-S3............................................................................................................7 - 1
7.2
5 - 1 to 5 - 13
7 - 1 to 7 - 14
A - 11
DEBUGGING FUNCTION
8 - 1 to 8 - 64
8.1
8.2
Monitor Function............................................................................................................................8 - 2
8.2.1
8.2.2
8.3
8.4
8.4.2
8.4.3
8.5
8.6
8.7
8.7.2
Partial execution..................................................................................................................8 - 44
8.7.3
Skip function........................................................................................................................8 - 47
8.8
8.9
Simulation Function.....................................................................................................................8 - 57
MAINTENANCE FUNCTION
9 - 1 to 9 - 19
9.1
9.2
9.3
9.3.2
9.3.3
9.4
9.5
9.6
9.7
System Display............................................................................................................................9 - 14
9.8
10
9.8.1
9.8.2
OTHER FUNCTIONS
10 - 1 to 10 - 24
11
11 - 1 to 11 - 8
12
13
PARAMETER LIST
13 - 1 to 13 - 10
14
14 - 1 to 14 - 4
15
15 - 1 to 15 - 6
16
16 - 1 to 16 - 6
17
17 - 1 to 17 - 9
18
18 - 1 to 18 - 9
19
19 - 1 to 19 - 19
20
20 - 1 to 20 - 16
20.1.9 Installation environment of the CC-Link/LT module and the AS-i module.........................20 - 12
20.2 Requirements for Compliance with Low Voltage Directives......................................................20 - 13
20.2.1 Standard applied for MELSEC-QnA series programmable controller ...............................20 - 13
20.2.2 Precautions when using the QnA series programmable controller ...................................20 - 13
20.2.3 Power supply.....................................................................................................................20 - 14
20.2.4 Control panel.....................................................................................................................20 - 15
20.2.5 Module installation ............................................................................................................20 - 16
20.2.6 Grounding .........................................................................................................................20 - 16
20.2.7 External wiring...................................................................................................................20 - 16
21
21 - 1 to 21 - 16
22
TROUBLESHOOTING
22 - 1 to 22 - 53
22.5.1 Faults with the input circuit and the corrective actions......................................................22 - 47
22.5.2 Faults in the output circuit .................................................................................................22 - 49
APPENDICES
APPENDIX 1
Appendix 1.1
Appendix 1.2
Appendix 1.3
Appendix 1.4
Appendix 1.5
Appendix 1.6
APPENDIX 2
APPENDIX 3
APPENDIX 4
Appendix 4.1
Appendix 4.2
Appendix 4.3
Appendix 4.4
Appendix 4.5
Appendix 4.6
Appendix 4.7
Appendix 4.8
Appendix 4.9
Appendix 5.1
Appendix 5.2
Error Contents of Error Codes Detected by the CPU Module (4000H to 4FFFH)
......................................................................................................................... App - 133
APPENDIX 6
Appendix 6.1
Appendix 6.2
A1S61PN, A1S62PN and A1S63P power supply modules ............................. App - 142
Appendix 6.3
Appendix 6.4
APPENDIX 7
APPENDIX 8
APPENDIX 9
Appendix 9.1
Appendix 9.2
A - 16
INDEX
Index - 1 to Index - 5
A - 17
RELATED MANUALS
Manual No.
Manual Name
(Type code)
QnACPU GUIDEBOOK
For the first-time user of QnACPU, describes steps on creating a program, writing the program in
IB-66606
(13JF10)
(Sold separately)
IB-66614
creation.
(13JF46)
(Sold separately)
SH-080810ENG
(13JW11)
IB-66616
(13JF48)
IB-66617
(13JF49)
SH-080040
(13JF59)
SH-080041
(13JF60)
(Sold separately)
AnS Module Type I/O User's Manual
IB-66541
(13JE81)
IB-66620
(13JF77)
IB-66350
(13JF70)
SH-080373
(13JU41)
IB-66774
maintenance.
(13J921)
(Included with product)
A - 18
Manual No.
Manual Name
(Type code)
IB-66775
(13J922)
IB-66776
procedure, SFC program editing method, monitoring method, printout method and error messages.
(13J923)
IB-66777
A - 19
(13J924)
USER PRECAUTONS
(2)
A - 20
1.
1.1
REMARK
This manual does not cover MELSECNET(II) data link systems, MELSECNET/B data
link systems, MELSECNET/10 networks, or the SFC function.
For details on each function, refer to the following manuals.
MELSECNET(II), MELSECNET/B Data Link
MELSECNET, MELSECNET/B Data Link System Reference Manual
MELSECNET/10 Network
MELSECNET/10 Network System Manual for QnA/Q4AR
SFC Function
QCPU (Q Mode)/QnACPU Programming Manual (SFC)
1-1
1.
1.2
(2)
(3)
(4)
(5)
CC-Link.....................................
(6)
GPP function.............................
(7)
(8)
Peripheral device capable ......... Generic term for a peripheral device capable of
of GPP functions
running the GPP function software, for example
an IBM PC/AT.
(9)
type memory
1-2
2.
OVERVIEW
OVERVIEW
2.1
Features
Q2ASCPU has the following features.
(1)
(2)
High-speed processing
(a) Higher operation processing speeds have been achieved for basic instructions
and application instructions.
A2USCPU(S1)
Q2ASHCPU(S1)
0.2 s
0.075 s
0.225 s
Basic instructions
(b) The access time for expansion data memory (file registers: R) has been
conformed with the internal devices of the Q2ASCPU (data registers: D, and link
registers: W).
(c) Reading/writing of the buffer memories of special function modules dedicated to
QnA (serial communication modules) have been realised processing speed-up
by six times compared to AnUCPU.
(The processing speed of the existing special function modules for ACPU use is
about the same as that when using AnUCPU.)
(d) A high-speed access base unit (A1S38HB/A1S38HBEU) is available to speed
up the processing time for accessing special function modules such as network
modules and serial communication modules that handle large quantities of data.
Simply by mounting the special function module on the high-speed access base
unit, the access processing speed is increased when the Q2ASCPU accesses
the special function module.
2-1
2.
OVERVIEW
(3)
Selection of program execution type that is appropriate for the control has been
realised.
There are four program execution types to be selected as follows.
(a) Initial execution type
This program type is executed once only when the Q2ASCPU is set to RUN.
(b) Scan execution type
This program type is run continually while the Q2ASCPU is in the RUN status.
This is equivalent to a conventional program that runs from step 0 to END
instruction.It is possible to create subroutine programs and interrupt programs
for this type of program.
(c) Low-speed execution type
This is a program type which is executed only during the surplus constant scan
time (process to preset the program execution time for constant scan time) or
during the set execution time of the low-speed execution program.
(d) Stand-by type
This type of program consists entirely of a subroutine program or interrupt
program.
(4)
(5)
2-2
2.
OVERVIEW
(b) The user can standardize and simplify programs by creating and using macro
instructions corresponding to functions.
2-3
2.
OVERVIEW
(g) A powerful array of support software packages is available for program creation.
1) Data conversion package
Comment data, device data, etc., which is created with spreadsheet software
and text editors available on the market, can be converted to files for GPP
function use.
Conversely, files created for GPP function use can be converted to data for
spreadsheets or text editors.
2) Macro/library package
The basic programs for accessing special function modules, and standard
programs for error detection, alarm processing, etc., have been brought
together as a package of macro and library data.
3) Ladder sequence linking package
This package is used to link multiple programs to make a single program.
This has an automatic allocation function that ensures that devices from each
program without duplicating in the created program.
4) CAD interface program
This package is used to handle sequence ladders, instruction lists, comment
data and SFC diagrams as CAD data and communicate these data to CAD
systems.
2-4
2.
OVERVIEW
2.2
2-5
2.
OVERVIEW
Table 2.1 List of combination between Q2ASCPU and function version/version of special function module
QnACPU
SW0IVDGPPQ
SW1IVDGPPQ
SW2IVDGPPQ
A1SJ71QE7
1(B2), (B5)
A1SD75PS3
9707B and
later
9707B and
later
No
restriction
No
restriction
A1SJ71
A1SJ61QBT
11
A1SJ71QC2
4(N)(R2)
9707B and
later
No
restriction
BC and later
No
restriction
MELSECNET/10 relay
communication from Ethernet
Module/package Name
Function version
ID
-R4
Condition
Version
Local device
monitor test
Local device switching of
subroutine/interrupt program
A1SJ61QBT11 control
instructions
ID interface module
instructions
REMARK
1) Marks
, -,
and
2-6
2.
2.2.1
OVERVIEW
(2)
2-7
2.
OVERVIEW
(3)
(4)
2-8
3.
SYSTEM CONFIGURATION
SYSTEM CONFIGURATION
This section describes the system configurations that can be used for a system centered
on a Q2ASCPU, cautions on configuring the system, and the system equipment.
3.1
System Configuration
The following shows the configuration of equipment and peripheral device when a
Q2ASCPU is used in a stand-alone system.
3.1.1
*1
Q1MEMMemory card
(optional)
Q2ASCPU
A1SC
NB
Extension cable
(building-block type)
A1S3 B/A1S38HB
Main base
A6BAT
Battery
*2
A6 B extension base
(with power supply module)
A5 B extension base
(without power supply module)
A1SC
B
Extension cable
*2
A6 P power supply module
AX
input module
AY
output module
Special-function module
POINT
3-1
3.
3.1.2
SYSTEM CONFIGURATION
AC30R4-PUS cable
Q6PU
AC20R4-A8PU cable
programming unit
*2
RS-422 cable
RS-422
RS-232C
convertor
RS-232C cable
IBM-PC/AT-compatible
software package used:
*3
(Mounted to the
base unit)
A1SJ71QC24 serial
communication module
Option board
IC memory card
Dedicated cable
*1
reader/writer
IBM-PC/AT-compatible
software package used:
RS-232C cable
*1
For details on the IC memory card reader/writer setting, refer to Operating Manual for the
peripheral device capable of GPP functions.
*2
*3
REMARK
1.
2.
For details on the system configuration for each peripheral device, refer to
the Operating Manual for each.
Q2ASCPU can connect a peripheral device capable of ACPU only when
accessing an ACPU in another station via a MELSECNET/10 or
MELSECNET data link. (However, Q2ASCPU cannot be accessed.) In
this case, set SW1 of system setting switch 2 on the CPU module ON.
3-2
3.
SYSTEM CONFIGURATION
3.2
B(S1), A1S5
B(S1) extension
[When the A6
B, A5
base is used]
System configuration
CPU module
Power supply
module
Main base
unit
(A1S38B)
Slot No.
00 20 40 60 80 A0 C0 E0
to
to
to
to
to
to
to
to
1F 3F 5F 7F 9F BF DF FF
Extension cable
Slot No.
1st extension
stage
1
2
3
4
5
6
7
Power supply
module
UNIT
1
2
3
4
5
6
7
10 11 12 13 14 15
to
to
to
to
Maximum number of
extension stages
to
N, A
A)
16 modules
I/O modules
Maximum number of
512 points
I/O points
Main base unit model
name
model name
to
Maximum number of
to
A1S55B(S1), A1S58B(S1)
Extension cable
model name
B, A5
A1SC05NBA1SC07NBA1SC30NBA1SC50NB
(2) When the extension base A1S52B(S1), A1S55B(S1), A58B(S1) or A52B, A55B, A58B are used, the 5VDC
power is supplied from the power supply module of the main base unit.Before use, refer to Section 17.3 and
Precautions
I/O number
assignment
(When I/O assignment is
not performed)
A1S33B/A1S35B for 2/3/5 slots are used as the main base unit, add 6/5/3 slots (96 points/80 points/48
points) and assign the extension base unit I/O numbers.
(3) 16 points are assigned to an empty slot.
(4) When A6
B or A5
B is used, be sure to set to a single extension level.If it is set to the number of skipped
stages, 16 points/slot are assigned to all of skipped stages 8 slots, and thus it does not work.
(5) Items (2) to (3) can be changed by the I/O assignment. (Refer to Section 5.3)
3-3
3.
SYSTEM CONFIGURATION
B(S1), A1S5
B(S1) extension
base is used]
The following shows an example that the 16-point
module is installed to each slot.
[When the A6
B, A5
System configuration
CPU module
Power supply
module
Main base
unit
(A1S38B) 0
Slot No.
to
to
to
to
to
to
to
Extension cable
Slot No.
1st extension
stage
1
2
3
4
5
6
7
Power supply
module
UNIT
1
2
3
4
5
6
7
10 11 12 13 14 15
to
to
to
to
Maximum number of
extension stages
to
to
to
A)
Maximum number of
I/O modules
16 modules
Maximum number of
1024 points
I/O points
Main base unit model
name
Extension base unit
model name
A1S55B(S1), A1S58B(S1)
Extension cable
model name
B, A5
A1SC05NBA1SC07NBA1SC30NBA1SC50NB
(2) When the extension base A1S52B(S1), A1S55B(S1), A58B(S1) or A52B, A55B, A58B are used, the 5VDC
power is supplied from the power supply module of the main base unit.Before use, refer to Section 17.3 and
Precautions
I/O number
assignment
(When I/O assignment is
not performed)
A1S33B/A1S35B for 2/3/5 slots are used as the main base unit, add 6/5/3 slots (96 points/80 points/48
points) and assign the extension base unit I/O numbers.
(3) 16 points are assigned to an empty slot.
(4)When A6
B or A5
B is used, be sure to set to a single extension level.If it is set to the number of skipped
stages, 16 points/slot are assigned to all of skipped stages 8 slots, and thus it does not work.
(5) Items (2) to (3) can be changed by the I/O assignment. (Refer to Section 5.3)
3-4
3.
SYSTEM CONFIGURATION
3.3
System Equipment
3.3.1
Product Name
CPU module
Memory card
Model Name
Number of Occupied
Points (points)
[I/O Assignment
Module Type]
Description
Current consumption
5VDC
(A)
24VDC
(A)
Q2ASCPU
0.3
Q2ASHCPU
0.7
Q2ASCPU-S1
0.3
Q2ASHCPUS1
0.7
Q1MEM-64S
Q1MEM-128S
Q1MEM-256S
Q1MEM-512S
Q1MEM-1MS
SRAM, 1M bytes
Q1MEM-2MS
SRAM, 2M bytes
Q1MEM256SE
Q1MEM512SE
Remark
Memory card
procured
separately.
Including
memory card
current
consumption.
Power supply
module
A1S61PN
5VDC, 5A
A1S62PN
A1S63P
5VDC, 5A
100/200VAC input
24VDC input
3-5
For power
supply slots of
main base and
extension base
3.
SYSTEM CONFIGURATION
Product Name
Input module
Model Name
Number of Occupied
Points (points)
[I/O Assignment
Module Type]
Description
Current consumption
5VDC
(A)
24VDC
(A)
A1SX10
16
(16 inputs)
0.05
A1SX10EU
16
(16 inputs)
0.05
A1SX20
16
(16 inputs)
0.05
A1SX20EU
16
(16 inputs)
0.05
A1SX30
16
(16 inputs)
0.05
A1SX40
16
(16 inputs)
0.05
A1SX40-S1
16
(16 inputs)
0.05
A1SX40-S2
16
(16 inputs)
0.05
A1SX41
32
(32 inputs)
0.08
A1SX41-S1
32
(32 inputs)
0.12
A1SX41-S2
32
(32 inputs)
0.08
A1SX42
64
(64 inputs)
0.09
A1SX42-S1
64
(64 inputs)
0.16
A1SX42-S2
64
(64 inputs)
0.09
A1SX71
32
(32 inputs)
0.075
A1SX80
16
(16 inputs)
0.05
A1SX80-S1
16
(16 inputs)
0.05
A1SX80-S2
16
(16 inputs)
0.05
A1SX81
16
(16 inputs)
0.08
A1SX81-S2
32
(32 inputs)
0.08
A1SX82-S1
32
(32 inputs)
0.16
3-6
Remark
3.
SYSTEM CONFIGURATION
Product Name
Output module
Model Name
Number of Occupied
Points (points)
[I/O Assignment
Module Type]
Description
Current consumption
5VDC
(A)
24VDC
(A)
A1SY10
16
(16 outputs)
0.12
0.09
A1SY10EU
16
(16 outputs)
0.12
0.10
A1SY14EU
16
(16 outputs)
0.12
0.10
A1SY18A
16
(16 outputs)
0.24
0.075
A1SY18AEU
16
(16 outputs)
0.24
0.075
A1SY22
16
(16 outputs)
0.27
(200VAC)
0.002
A1SY28A
16
(16 outputs)
0.13
A1SY40
16
(16 outputs)
0.27
0.008
A1SY40P
16
(16 outputs)
0.08
0.011
A1SY41
32
(32 outputs)
0.50
0.008
A1SY41P
32
(32 outputs)
0.14
0.012
A1SY42
64
(64 outputs)
0.93
0.008
A1SY50
16
(16 outputs)
0.12
0.06
A1SY60
16
(16 outputs)
0.12
0.015
A1SY60E
16
(16 outputs)
0.20
0.01
A1SY68A
8 points 5/12/24/48VDC
transistor output module sink/source type
all points independent
16
(16 outputs)
0.11
A1SY71
32
(32 outputs)
0.40
0.15
A1SY80
16
(16 outputs)
0.12
0.02
A1SY81
32
(32 outputs)
0.50
0.008
A1SY82
64
(64 outputs)
0.93
0.008
3-7
Remark
3.
SYSTEM CONFIGURATION
Product Name
Model Name
Number of Occupied
Points (points)
[I/O Assignment
Module Type]
Description
Current consumption
5VDC
(A)
24VDC
(A)
A1SH42
32
(32 outputs)
0.50
0.008
A1SH42-S1
32
(32 outputs)
0.50
0.008
A1SX48Y18
16
(16 outputs)
0.085
0.045
A1SX48Y58
16
(16 outputs)
0.06
0.06
A1S42X
16/32/48/64 points
12/24VDC dynamic input module
Specified points
0.08
Dynamic output
A1S42Y
module
16/32/48/64 points
12/24VDC dynamic output module
Specified points
0.18
0.055
Blank cover
16
Specified points
I/O module
Dynamic input
module
A1SG60
[Input
[Output
[Input
[Empty]
Pulse catch
module
A1SP60
16
(16 outputs)
0.055
Analog timer
module
A1ST60
16
(16 outputs)
0.055
Interrupt
module
A1SI61
32
[Special 32 points]
0.057
A1SD61
32
[Special 32 points]
0.35
A1SD62
32
[Special 32 points]
0.1
32
[Special 32 points]
0.25
A1SD62D-S1
32
[Special 32 points]
0.27
A1SD62E
32
[Special 32 points]
0.1
A1S64AD
4 to 20mA/0 to 10V
4 analog channels
32
[Special 32 points]
0.4
A1S68AD
4 to 20mA/0 to 10V
8 analog channels
32
[Special 32 points]
0.4
A1SD62D
High-speed
counter module
A/D converter
module
3-8
Remark
3.
SYSTEM CONFIGURATION
Product Name
D/A converter
module
Model Name
Number of Occupied
Points (points)
[I/O Assignment
Module Type]
Description
Current consumption
5VDC
(A)
24VDC
(A)
A1S62DA
4 to 20mA/0 to 10V
Analog output, 2 channels
32
[Special 32 points]
0.8
A1S68DAV
32
[Special 32 points]
0.65
A1S68DAI
4 to 20mA input
Analog output, 8 channels
32
[Special 32 points]
0.85
A1S63ADA
32
[Special 32 points]
0.8
A1S66ADA
64
(64 outputs)
0.21
0.16
A1S62RD3
32
[Special 32 points]
0.49
32
[Special 32 points]
0.39
A1S68TD
32
[Special 32 points]
0.32
A1S62TCTTS2
32
[Special 32 points]
0.19
A1S62TCTTB
W-S2
32
[Special 32 points]
0.28
A1S62TCRTS2
32
[Special 32 points]
0.19
A1S62TCRTB
W-S2
32
[Special 32 points]
0.28
A1S64TCTTS1
32
[Special 32 points]
0.33
A1S64TCTTB
W-S1
32
[Special 32 points]
0.42
A1S64TCRTS1
32
[Special 32 points]
0.33
A1S64TCRTB
W-S1
32
[Special 32 points]
0.42
Analog I/O
module
Temperature
digital converter
A1S62RD4
module
Temperature
control module
3-9
Remark
3.
SYSTEM CONFIGURATION
Product Name
Model Name
Number of Occupied
Points (points)
[I/O Assignment
Module Type]
Description
24VDC
(A)
0.33
(0.19)*
32
A1S64TCTRT
BW
32
[Special 32 points]
0.39
(0.25)*
A1SJ71QC24
32
[Special 32 points]
0.24
32
[Special 32 points]
0.155
32
[Special 32 points]
Temperature
control module
[Special 32 points]
0.38
0.3
Computer link & printer function
RS-232C 2 channel 300 to 115,200bps
32
[Special 32 points]
0.3
[Special 32 points]
0.1
32
[Special 32 points]
0.1
32
[Special 32 points]
0.1
10 BASE-T
32
[Special 32 points]
0.69
10 BASE2
32
[Special 32 points]
0.66
10BASE5
32
[Special 32 points]
0.57
A1SJ71E71N3
-T*2
A1SJ71E71NB2*2
A1SJ71E71NB5*2
Remark
*:When the
temperature
conversion
function of
unused
channels are
not used in the
heating-cooling
control
0.35
Computer link function 300 to 115,200bps
RS-232C 1 channel, RS-422/485 1 channel
32
R2*2
Ethernet
interface
module
5VDC
(A)
A1S64TCTRT
Computer
link module
Current consumption
3 - 10
Dedicated to
QnACPU
3.
SYSTEM CONFIGURATION
Product Name
Ethernet
interface
module
Model Name
24VDC
(A)
[Special 32 points]
0.53
A1SJ71QE71N
10BASE5
-B5
32
[Special 32 points]
0.40
A1SJ71QE71N
10 BASE-T
3-T
32
[Special 32 points]
0.53
32
[Special 32 points]
0.4
48
First half
empty 16 points
Second half
special32 points
0.3
32
[Special 32 points]
0.7
32
[Special 32 points]
0.7
MELSECNET
(II)
data link
module
5VDC
(A)
32
A1SD70
ID
interface
module
Current consumption
A1SJ71QE71N
10 BASE2
-B2
Intelligent
communication A1SD51S*2
module
Positioning
module
Number of Occupied
Points (points)
[I/O Assignment
Module Type]
Description
10V)
[Special 32 points]
0.7
A1SD75M1
32
[Special 32 points]
0.7
A1SD75M2
32
[Special 32 points]
0.7
A1SD75M3
32
[Special 32 points]
0.7
A1SD35ID1
ID interface module
Connectable reader/writer unit: one
32
[Special 32 points]
0.25
0.17
A1SD35ID2
ID interface module
Connectable reader/writer units: two
32
[Special 32 points]
0.25
0.33
A1SJ71AP21*2
32
[Special 32 points]
0.33
32
[Special 32 points]
0.33
32
[Special 32 points]
0.8
A1SJ71AP21S3*2
A1SJ71AR21*2
3 - 11
Remark
Dedicated to
QnACPU
Maximum 4
modules can
be used for
one CPU
module.
(Refer to
Section 3.3.2)
* When
Differential
driver is
connected: 0.78
Maximum 2
modules can be
used for one
CPU module.
(Refer to
Section 3.3.2)
3.
SYSTEM CONFIGURATION
Product Name
MELSECNET/
B
data link
module
B/NET
interface
module
Model Name
Number of Occupied
Points (points)
[I/O Assignment
Module Type]
Description
*2
32
A1SJ71B62S3
5VDC
(A)
24VDC
(A)
0.66
0.3
32
[Special 32 points]
0.08
32
[Special 32 points]
0.40
32
[Special 32 points]
0.47
48
First half
empty 16 points
Second half
special32 points
0.40
0.17
32
[Special 32 points]
0.80
32
[Special 32 points]
1.14
[Special 32 points]
0.40
0.35
64
[Output 64 points]
0.115
0.09
MELSECNET/
10
data link
module
MELSECNET/
MI NI-S3
master module
A1SJ71PT32S3*1
[Special 32 points]
Current consumption
MELSEC - I/O
LINK master
module
A1SJ51T64
S-LINK
interface
module
A1SJ71SL92N
32
[Special 32 points]
0.20
AS-I interface
module
A1SJ71AS92
32
[Special 32 points]
0.15
Position
detection
module
A1S62LS
32
[Special 32 points]
0.55
PLC easier
monitoring
module
A1SS91
32
[Output 32 points]
0.08
3 - 12
Remark
Maximum 4
modules can be
used for one
CPU module.
(Refer to
Section 3.3.2)
3.
SYSTEM CONFIGURATION
Product Name
Model Name
Number of Occupied
Points (points)
[I/O Assignment
Module Type]
Description
Memory card
interface
module
A1SD59J-S2
Simulation
module
A6SIMX64Y64
PROFIBUS
Interface
Module
32
A1SJ71DN91
DeviceNet
Interface
Module
MODBUS
Interface
Module
32
5VDC
(A)
24VDC
(A)
0.05
TYP. 0.3
(When all
points
"ON")
[Special 32 points]
0.56
32
[Special 32 points]
0.56
32
[Special 32 points]
0.24
32
[Special 32 points]
0.1
32
[Special 32 points]
0.1
*1
*2
[Special 32 points]
Current consumption
(64 inputs)
(64 outputs)
Discontinued model
This module can access devices within the device range of the AnACPU
(cannot access file register). (Refer to Section 3.3.2.)
3 - 13
Remark
Power
consumption
assumes
connection of
A1SD59J-MIF.
3.
SYSTEM CONFIGURATION
Product Name
Model Name
A985GOT
A975GOT
Number of Occupied
Points (points)
[I/O Assignment Module
Type]
Description
Current consumption
Remark
5VDC
(A)
24VDC
(A)
0.22 *
*When bus
connected
For RS-232C
connected only
0.22 *
*When bus
connected
For RS-422
connected only
0.12
*When bus
connected
Extension
connector
attached to one
on each side
A970GOT
A960GOT
32
[Special 32 points]*
A956GOT
A956WGOT
Graphic
operation
terminal
A953GOT
A951GOT
32
[Special 32 points]*
GT1565-VTBA
[Special 32 points]*
A1S32B
A1S33B
A1S35B
A1S38B
3 - 14
3.
SYSTEM CONFIGURATION
Product Name
Model Name
Number of Occupied
Points (points)
[I/O Assignment Module
Type]
Description
Current consumption
Remark
5VDC
(A)
24VDC
(A)
The power
supply module
is required.
For extension to
right side
Extension base
module
connecting
cable
A1S52B
2 I/O modules can be installed.
A1S52B-S1
A1S55B
5 I/O modules can be installed.
A1S55B-S1
Extension Base
Unit
A1S58B
8 I/O modules can be installed.
A1S58B-S1
A1S65B
5 I/O modules can be installed.
A1S65B-S1
A1S68B
8 I/O modules can be installed.
A1S68B-S1
Extension
Cables
A1SC01B
A1SC03B
A1SCO7B
A1SC12B
A1SC30B
A1SC60B
A1SC05NB
A1SCO7NB
A1SC30NB
A1SC50NB
3 - 15
Cable for A
and A A
extension
bases
3.
SYSTEM CONFIGURATION
Product Name
Model Name
Description
Applicable Model
Memory
A2SNMCAE2PROM
cassette
30KE
Battery
A6BAT
A6TBXY36
A6TBXY54
A6TBX70
A6TBX36-E
A6TBY36-E
A1SY81, A1SY82
A6TBX54-E
A6TBY54-E
A1SY81, A1SY82
A6TBX70-E
AC05TB
AC10TB
AC20TB
AC30TB
AC50TB
AC80TB
AC100TB
AC05TB-E
AC10TB-E
AC20TB-E
AC30TB-E
AC50TB-E
A6TE2-16SRN
AC06TE
AC10TE
AC30TE
AC50TE
AC100TE
A1STEC-S
Connector/ terminal
block conversion
module
Cable for
connector/ terminal
block conversion
module
Relay terminal
module
Terminal block
cover for A1S I/O
module and special
module
A6TBXY36
A6TBXY54
A6TBX70
A6TBX36-E
A6TBY36-E
A6TBX54-E
A6TBY54-E
A6TBX70-E
A6TE2-16SRN
3 - 16
3.
SYSTEM CONFIGURATION
Product Name
Terminal block
adapter
Model Name
Description
Applicable Model
A1S-TA32
A1S-TA32-3
A1S-TA32-7
A1S-TB32
A6C0N1
A6C0N2
A6C0N3
A6CON4
A6C0N1E
A6C0N2E
A6C0N3E
40-pin connector
3-pin D-sub
connector
REMARK
Toa Electric Industrial CO., LTD. provides I/O cables with connectors, which can
connect to 40-pin connector (A1SX41,A1SX42,A1SY41,A1SY41P,A1SY42, etc.) or
37-pin D-sub connector (A1SX81,A1SY81) of I/O modules.
Contact:
TOA ELECTRIC INDUSTRIAL CO., LTD.
3 - 17
3.
SYSTEM CONFIGURATION
(2)
Peripheral device
Product Name
Programming unit
Model Name
Remark
Q6PU
AC30R4-PUS
AC20R4-A8PU
RS-422 cable
3 - 18
3.
3.3.2
SYSTEM CONFIGURATION
Hardware
(a) The number of modules that can be mounted is restricted depending on the
module type.
Applicable Module
For AnSCPU
Remark
No limit
No limit
No limit
I/O module
Special function module
Including GOT-A900
Series
(Only when the bus
Intelligent special
No limit
function module
Total 6 modules
connection is used.),
and GOT1000 Series
(Only when the bus
connection is used.)
Interrupt module
Link module
Ethernet module
Only 1 module
Total 4
Ethernet module for
Total 2
for network,
Ethernet and
data link use
REMARK
The modules described above are categorized as follows.
1) I/O module:
4) Interrupt module:
5) Link module:
6) Ethernet module:
3.
SYSTEM CONFIGURATION
(b) The following shows special function modules that cannot be used with
Q2ASCPU:
AJ71C23 (Host controller high-speed link module)
AD57-S2 (A6MD controller module)
AJ71C24 (Computer link module): Manufactured through February 1987.
Products manufactured in March 1987 or later,
and products marked "H" (corresponding to A3H
) can be used.
AD51 (Intelligent communication module)
: Manufactured thorugh March 1987.
Products manufactured in April 1987 or later,
and products marked "H" (corresponding to A3H
) can be used.
A7GT-BUS (Bus connection interface module for A77GOT and A870GOT):
Manufactured through January 1996.
Products manufactured in February 1996 or
later, and products marked "C" (corresponding to
A3H ) can be used.
AJ71LP21(G), AJ71BR11, AJ71LR21, A1SJ71LP21, A1SJ71BR11,
A1SJ71LR21 (MELSECNET/10 network modules)
(c) When using a special function module with Q2ASCPU, the device range to be
used is depending on models of special function modules.
Access range
Device range equivalent to the
A3HCPU*1
A1SD51S, A1SJ71UC24-R2/PRF/R4,
Device
A1SJ71AP21(S3)*2, A1SJ71AR21*2,
AD51(S3), AJ71C24-S3,
AJ71P41
A1SJ71AT21B*2, AD51H(S3),
AD51FD-S3, AJ71C23-S3,
AJ71C24-S6/S8, AJ71UC24,
AJ71AP21(S3)*2, AJ71AR21*2,
A1SJ71E71N(3)-T,
A1SJ71E71N3-B5T/B2/B5,
AJ71E71(S3), AJ71E71N(3)-T,
AJ71E71N-B5T/B2/B5
Q2AS(H)
Q2AS(H)-S1
X/Y0 to
X/Y1FF
X/Y0 to
X/Y3FF
AJ71AT21B*2, AJ71ME81
I/O device (X/Y)
X/Y0 to X/Y7FF
X/Y0 to X/Y7FF
M0 to M2047
M0 to M8191
M0 to M8191
B0 to B3FF
B0 to BFFF
B0 to BFFF
Timer (T)
T0 to T255
T0 to T2047
T0 to T2047
Counter (C)
C0 to C255
C0 to C1023
C0 to C1023
D0 to D1023
D0 to D6143
D0 to D6143
W0 to W3FF
W0 to WFFF
W0 to WFFF
Annunciator (F)
F0 to F255
F0 to F2047
F0 to F2047
*1
*2
*3
3 - 20
3.
SYSTEM CONFIGURATION
Connection Method
CC-Link connection
MELSECNET/10 connection
details.)
Bus connection
Direct connection to CPU
GOT-A900 series
CC-Link connection
(f)
The accessible range for an A1SJ71UC24 computer link module comprises the
CPU to which the A1SJ71UC24 is mounted (the host station) and the other
stations in the network to which the host station is connected.
It is not possible to access other stations in other networks by using the
MELSECNET/10 network system routing function.
The access range for an A1SJ71QC24N serial communication module is the
host station, other stations in the network connected to the host station, and
other stations in other networks accessed through up to 7 relay stations by using
the routing function.
3 - 21
3.
SYSTEM CONFIGURATION
(2)
Software package
The following shows the system start-up software packages to create programs for
Q2ASCPU.
Software Package for System Start-up
GX Developer, SW
IVD-GPPQ
PC CPU model
Q2AS(H)CPU
Q2A
Q2AS(H)CPU-S1
Q2AS1
Apart from the above, the following software packages can be used.
CAD interface package
SW
IVD-CADQ
SW
IVD-CNVQ
Macro/library package
SW
IVD-MSDQ
SW
IVD-MSPQ
SW
IVD-LNKQ
REMARK
The following shows the peripheral devices and software packages that cannot be
used with Q2ASCPU:
A PUProgramming unit)
A6WU (ROM writer unit)
A6DU-B (Data access unit)
A6TEL (Modem interface unit)
A6GPP (Intelligent GPP)
A6HGP (Hand-held graphic programmer)
A6PHP (Plasma hand-held graphic programmer)
System start-up software package for ACPU
SW
-GPPA, SW
-SAP2
Utility software package for ACPU
SW
-GPPATEL, SW
SW
-FUNP, SW
-CADIF, SW
-TSAP2
3 - 22
-DRWA,
3.
3.3.3
SYSTEM CONFIGURATION
Drive 0
Drive 1
Drive 2
Built-in RAM
PC memory
Error-history
storage memory
Device memory
Built-in RAM
Memory card
(RAM, ROM area)
PLC memory
For file types stored in each memory, refer to "FireTypes & Storage Destinations of Files
Managed by QnACPU" in the QnACPU Programming Manual (Fundamentals).
3 - 23
4.
PERFORMANCE SPECIFICATIONS
PERFORMANCE SPECIFICATIONS
This section shows the performance specifications of the Q2ASCPU.
Model Name
Item
Remark
Q2ASCPU
Q2ASCPU-S1
Q2ASHCPU
Control method
Refresh mode
Q2ASHCPU-S1
).
LD
0.2 s/step
0.075 s/step
MOV
0.6 s/step
0.225 s/step
Constant Scan
(Function that makes the scan time
constant)
Memory capacity
Program
capacity
Number of steps
Number of files
Maximum 60k
step
Maximum 28k
step
Maximum 60k
step
28
60
28
60
1024 points
X/Y0 to 3FF
4-1
512 points
X/Y0 to 7FF
1024 points
X/Y0 to FFF
4.
PERFORMANCE SPECIFICATIONS
Model Name
Item
Remark
Q2ASCPU
Q2ASHCPU
Q2ASHCPU-S1
Timer [T]
Counter [C]
Device points
Q2ASCPU-S1
Annunciator [F]
Pointer [P]
48 points I0 to 47
The fixed-cycle interval for system interrupt pointers I28 to I31 is set by
the parameter. (5ms to 1000ms, in 5ms units)
16 points (FX0 to F)
16 points (FY0 to F)
5 points (FD0 to 4)
4-2
4.
PERFORMANCE SPECIFICATIONS
Model Name
Item
Remark
Q2ASCPU
Q2ASCPU-S1
Q2ASHCPU
Q2ASHCPU-S1
Designation format: U
Latch (power failure compensation)
range
\G
L0 to L8191 (Default)
(Latch ranges can be set for B, F, V, T, ST, C, D, W devices.)
Possible to set in the parameters
Possible to setup one contact poin for each of RUN/PAUSE from X0 to
X1FFF.
Year, month, day, hour, minute, second, day of the week (automatic
detection of the leap year)
Accuracy -1.7 to +4.9s (TYP. +1.7s)/d at 0
Clock Function
0.3A
0.3A
0.7A
0.7A
Weight
0.5kg
0.5kg
0.5kg
0.5kg
External dimensions
130
54.5
110 (5.12
2.15
4.33)
REMARK
*
: 0.3A
Q2ASHCPU, Q2ASHCPU-S1
: 0.7A
4-3
5.
5.1
I/O Numbers
The I/O number is used in the sequence program to input data from a input module and to
output data to an output module.
The I/O number is expressed as three-digit hexadecimal numbers.
The I/O numbers when all the I/O modules are occupied in 16 points are indicated below.
REMARK
When programming with a peripheral device for GPP function, I/O numbers can be
input in 2 digits.
I/O numbers
Input with a peripheral device
X010
X10
Y020
Y20
5-1
5.
5.2
I/O numbers are sequentially assigned from left to right, taking slot 0 (The slot to the
right of the CPU module) of the main base unit to be "0".
(2)
The I/O modules and special function modules mounted to the main base unit occupy
the I/O numbers corresponding to the number of I/O points for each module.
(3)
16 points are assigned to the empty slots where no I/O module or special function
module is mounted.
(4)
If an extension base unit is connected, its assignment starts from the number
immediately after the number assigned to a main base unit.
5-2
(5)
I/O numbers are assigned assuming that every base unit has 8 slots.
If a 5-slot type base unit is used, an I/O number obtained by adding points equivalent
to 3 slots (48 points) to the final I/O number of the 5-slot base unit is assigned to the
next extension base unit.
Extension cable
CPU module
Main base
power supply
module
5.
20
30
40
50
60
70
to
to
to
to
to
to
2F
3F
4F
5F
6F
7F
00
10
to
to
0F
1F
Extension base
8
10
11
12
13
14
80
90
A0
B0
C0
D0
E0
F0
to
to
to
to
to
to
to
to
8F
9F
AF
BF
CF
DF
EF
FF
15
5-3
5.
5.3
(1)
(2)
5-4
0 point
0 point
0 point
Output 16 points
2
Input 16 points
Output 16 points
Input 16 points
CPU module
power supply
module
A1S35B
Input 16 points
The setting is made in units of 16 point within the range of 0 to 64.The default is 16 points.
Example: When the points occupied by empty slot is set to 0 points
Assign 0 point to three vacant slots
(worth 48 points) of A1S35B
Output 16 points
Output 16 points
A1S65B
power supply
module
5.
X050 X060
to
to
X05F X06F
5-5
5.
Setting
Setting range
Empty/input/output/special
Classification
Number of points
Start XY
Model Name
Base specification
POWER SUPPLY
MODULE
Extension cable
Default value
No setting
units)
0 to 1FFF (in 16 point units)
Up to 16 characters
No setting
Up to 16 characters
POINT
The power supply module names set in the base specification is only used for the
current capacity check in the PLC diagnostics mode and not used for a CPU
module. Therefore, even if they are not set, any problem does not occur.
5-6
5.
The CPU module performs the following processing when I/O assignment is set.
1) Any of the following assignment can be performed per slot of each base unit.
Assigned number of points
Special function
Empty slot
Input module
Output module
16
16
16
16
32
32
32
32
48
48
48
48
64
64
64
64
module
2) The slots for which I/O assignment has been performed with GPP function,
the I/O assignment setting takes priority regardless of the loaded module.
If a number of points fewer than the that of the loaded I/O module is set, the
actual number of points of the loaded I/O module is reduced.
For example, if the loaded module is a 32-point input module but I/O
assignment is set for a 16-point input module using GPP function, the latter
16 points for the input module cannot be used.
If a number of points is greater than the that of the loaded I/O module is
set, the number of points in excess of the actual number of points is
occupied with dummy points.
If the slot where an I/O module is loaded is set as a empty slot, the I/O
module will be unusable.
3) The slots for which I/Oassignment is not performed using GPP function are
assigned with the number of points of the loaded module.
4) The slots for which I/O assignment is not performed using GPP function are
assigned I/O numbers that are consecutive to those of modules for which I/O
assignment has been performed.
(3)
Precautions
(a) If there is a disparity between the I/O assignment made in the parameter settings
and the actually loaded I/O modules, the input and output is not normally
performed.
Loaded module
I/O assignment
Result
Input
Output
No input
Output
Input
No output
Input/Output
Special
Special
Input/Output
5-7
5.
(b) The I/O assignment of a slot to which a special function module is loaded has to
be the same setting with the module.Not doing so may cause an error.
1) A11VC....................................... Special: 16 points
2)
AI61 ..........................................
Special: 32 points
3)
AG62.........................................
4)
(c) When operating MELSECNET data link, perform I/O assignment as follows.
1) As for a master station, I/O assignment has to be performed for the master
station and all remote I/O stations.
I/O assignment of MELSECNET (II)/B to the remote I/O station is invalid.
2) As for a local station, perform I/O assignment only for the local station.
3) Assign the I/O for the I/O hybrid module (e.g. A42XY) as an output module.
(d) When the MELSECNET/10 network is established, assign the I/O only for the
host station (master station).
Since the I/O assignment of MELSECNET/10 to the remote I/O station is
irrelevant, the I/O assignment is not allowed.
For I/O assignment of MELSECNET/10 to the remote I/O station, use the I/O
assignment settings in the "Network param".
REMARK
As for the remote I/O station of MELSECNET (II)/B, I/O assignment settings in the
"Network param" is irrelevant, therefore, the I/O assignment is not allowed.
5-8
5.
5.4
90
Output 16 points
Output 16 points
Input 16 points
Input 32 points
Input 32 points
CPU module
power supply
module
00
20
40
50
60
70
80
to
to
to
to
to
to
to
to
1F
3F
4F
5F
6F
7F
8F
9F
10
11
12
Slot
Output 32 points
Output 32 points
C0
Output 16 points
A0
Vacant
Output 32 points
48 points occupied
power supply
module
(1)
D0
E0
100
to
to
to
to
to
BF
CF
DF
FF
11F
(b) I/O numbers when I/O assignment is performed using GPP function
1) I/O assignment example
5-9
Input 32 points
Input 32 points
Input 16 points
Output 16 points
Output 16 points
Vacant 16 points
Vacant 16 points
Vacant 16 points
CPU module
0S
0S
0S
to
to
to
11
Slot number
60
to
6F
(*3)
0
(*4)
12
Output 32 points
Vacant
32Y 32X
10
Output 32 points
Output 16 points
Output 32 points
5.
X70
90
Y8F
to
*1
*2
*3
*4
*5
*6
to
to
to
5 - 10
Input 16 points
7
Output 16 points
Output 16 points
Output 16 points
Output 16 points
Input 16 points
CPU module
A1S38B
Input 16 points
Input 16 points
(2)
Power supply
module
5.
(b) I/O numbers when I/O assignment is performed using GPP function
1) I/O assignment example
5 - 11
2) I/O numbers after performing I/O assignment using GPP function and
replacing the module
Output 16 points
Output 16 points
Output 16 points
Input 16 points
Output 16 points
Input 16 points
Input 32 points
CPU module
Input 16 points
A1S38B
power supply
module
5.
POINT
When the I/O number set for "Start XY" in the "I/OAssign" is changed, also set the
"Start XY" for the next module to avoid changing the I/O numbers of the module
for which the change was made and the subsequent modules.
In the example above, since "20" is set for the "Start XY" for the second slot,
consecutive I/O numbers starting from X30 are set for slot 3 and later.
5 - 12
5.
(3)
When combining an input module and output module having non-consecutive I/O
numbers on a base unit
When controlling the machine
machine (I/O numbers X200 to X23F and Y240 to X27F) with a single
programmable controller, it is desired to combine input modules and output modules
on the base unit.To achieve this operation, perform I/O assignment as follows.
(a) Loading status and I/O numbers to be set
5 - 13
6.
6-1
6.
6.1
When the FROM instruction is performed, the data read from the buffer memory is stored
in the specified device. When the TO instruction is performed, the data in the specified
device is written to the buffer memory.
REMARK
1) For details on the FROM/TO instructions, refer to the QCPU (Q mode)/
QnACPU Programming Manual (Common Instructions).
2) For details on the buffer memory of a special function module, refer to the
manual of the special function module in use.
POINT
When executing the FROM/TO instruction for the special function module
frequently in short scan time, it may cause the target special function module
operation error.
When executing the FROM/TO instruction, match the processing time and
conversion time of the special function module using timer or constant scanning.
6-2
6.
6.2
The special direct device represents the buffer memory in a special function module as the
Q2ASCPU device.
Example: U10\G10:
U10
G10
REMARK
For details on a special direct device, refer to the QnACPU Programming Manual
(Fundamentals).
The special direct device differs from the FROM/TO instruction in that the CPU
module can handle the buffer memory of a special function module as a direct
device.
This can reduce the total number of steps in the program. However, the instruction
processing speed is the same with the FROM/TO instruction.
Example: Writing data to address 0 of the buffer memory in the special function
module loaded at X/Y0, and reading the data of address 1.
(a) Using the FROM/TO instruction
6-3
6.
POINT
1.
2.
When reading data from the special function module frequently during the
programming, store the special direct device to a data register after reading in
an area of the program by using the FROM instruction rather than by using
them at each instruction.
This is because programming scan interval is added due to an access
processing to the special function module for each instruction.
When executing the instruction using a special direct device for the special
function module frequently in short scan time, it may cause the target special
function module operation error.
When performing the instruction using a special direct device, match the
processing time and conversion time of the special function module using
timer or constant scanning.
6-4
6.
6.3
6-5
7.
7.1
For MELSECNET/MINI-S3
By setting link information, I/O storage device, etc. of the MELSECNET/MINI-S3 to the
parameters, the module automatically communicates with the buffer memory area for the
batch refresh send/received data of the type A1SJ71PT32 MELSECNET/MINI-S3 master
module (abbreviated as the MINI master module hereafter).
The settings are made on the MELSECNET/MINI setting in the parameter mode of GPP
function.
Sequence programs can be created using the I/O devices allocated to send/received by
the MELSECNET/MINI-S3 setting. (The FROM/TO instructions are not required.)
7-1
7.
POINT
(1) Since up to 8 master modules can be set for auto refresh by the parameter,
auto refresh is possible for up to 8 modules.
When 9 or more modules are desired, use the FROM/TO instruction in the
sequence program from the 9th module.
(2) Since auto refresh is not possible with send/received data for the separate
refresh I/O modules and for the remote terminal units No.1 to No.14, use them
by the FROM/TO instructions.
However, the remote terminal units shown below are subject of auto refresh in
the limited area:
AJ35PTF-R2 RS-232C interface module
AJ35PT-OPB-M1-S3 mount-type tool box
AJ35PT-OPB-P1-S3 portable type tool box
(3) For the master modules set up for auto refresh, since the Q2ASCPU
automatically turns ON the link communication start signal Y(n+18) or
Y(n+28), it is not necessary to turn it on from the sequence program.
(4) Auto refresh of I/O data is performed by the batch after the Q2ASCPU
performs the END instruction.
(Auto refresh processing is performed when the CPU module is in the RUN/
PAUSE/STEP-RUN status.)
(5) The master module may perform the processing while the link communication
start signal Y(n+18) or Y(n+28) is OFF depending on the remote terminal units
connected.
For instance, if the AJ35PTF-R2 RS-232C interface unit is used without
protocol, it is necessary to write parameters to the parameter area (buffer
memory address 860 to 929) while the link communication start signal is OFF.
Since the link communication start signal becomes ON after the CPU module
enters the RUN status and one scan is performed, write the parameters
during the first 1 scan.
ON
Link communication
start signal
OFF
Y(n+28)
ON
SM402
OFF
1 scan
Set CPU module to RUN
(6) If the hardware error signal X(n+0)or X(n+20) or ROM error signal X(n+8)or
X(n+28) of a master module for which auto refresh has been set comes ON,
the Q2ASCPU does not perform auto refresh processing.
(7) When making the settings, ensure that there is no duplication between
receive data refresh devices and send data refresh devices.
7-2
7.
(1)
Parameter setting items, setting ranges and contents of auto refresh, as well as the
buffer memory address of the master module which is used for exchanging data with
the Q2ASCPU are shown below.
Set the parameters for the number of the master modules used.
I/O signal
from a
master
module
Buffer memory
address of a
master module
Number of
master
modules
0, 1 to 8 module(s)
Model
classification
of MINI/MINIS3
110
to
141
Y(n+1A)*1
Y(n+1B)*1
10
to
41
Item
Total number
of remote I/O
stations
Storage
device for
received data
*4
Send data
storage
device
Number of
retries
Setting range
Description
MINI
In I/O mode (occupies 32 points)
MINI-S3
In expansion mode (occupies 48 points)
MINI or MINI-S3
Default value
Follow the
settings
made in the
"I/O Assign"
in the
parameter
mode.*3
0 to 64 stations
X
M, L, B, T, ST, C, D, W, R, ZR,
none
(Bit device: multiples of 16)
Y
M, L, B, T, ST, C, D, W, R, ZR,
none
(Bit device: multiples of 16)
0 to 32 times
FROM/TO
response
specification
Data clear
specification
for
Retention, clear (received data)
communication
faulty station
7-3
X1000 to
X11FF
Y1000 to
Y11FF
5 times
1) Link priority
Link access by MINI-S3 has the priority.
During the link access, FROM/TO is caused to wait.
Possible to read out the received data refreshed at
the same timing.
The maximum wait time (0.3ms + 0.2ms
number
of separate refresh stations) for the FROM/TO
instruction may be generated.
2) CPU priority
The FROM/TO instructions from a CPU module are
given access priority. Even during the link access, it
interrupts and accesses.
Depending on the timing, received data in the midst
of I/O refresh may be read.
No wait time for the FROM/TO instruction.
CPU priority
Retention
Retains the received data for batch and separate
refresh.
Clear
Sets all points to OFF
Clear
7.
I/O signal
from a
master
module
Buffer memory
address of a
master module
Item
100
to
103
195
Faulty station
detection
107
196
to
203
Error No.
Line error
check setting
(Line error)
Operation at
CPU STOP
*1
*2
*3
*4
Setting range
Description
Default value
M, L, B, T, ST, C, D, W, R, ZR,
none
(Bit device: multiples of 16)
No setting
T, ST, C, D, W, R, ZR
No setting
Retention
Stop
7-4
7.
(2)
Y20
X0 to
to
Y3F
X1F
Setting of the send/received data storage devices is explained using the system
example shown below.
(Example) When the device X/Y400 and later are used as the remote I/O stations:
AJ71PT32-S3
master module
A1SY41
A1SX41
Q2ASCPU
A1S61PN
AJ35TB1-16D
Station number 5
(number of occupied
stations: 2)
MELSECNET/MINI
Sample parameter setting of the GPP function for the above system configuration is
shown below:
7-5
7.
The storage devices for the send/received data for the present system example are as
follows:
(a) Storage device for received data
Master module
Address b15
100
111
112
113
114
115
b8 b7
Station No.2
Station No.4
Station No.6
Station No.8
Station No.10
Q2ASCPU
b0
X40F
X41F
X42F
X43F
X44F
X45F
Station No.1
Station No.3
Station No.5
Station No.7
Station No.9
Station No.11
X408 X407
X418 X417
X428 X427
X438 X437
X448 X447
X458 X457
X400
X410
X420
X430
X440
X450
Input area
1) Set the device number (X400) for b0 of the station 1 as a received data
storage device.
2) The received data storage device occupies from X400 to X45F.
For the present system example, since the total number of stations is odd, it
is occupied for one extra station.
3) The device numbers of input modules connected are as follows:
Stations 1 to 4
AX41C
X400 to X41F
Stations 5 and 6
AJ35TB-16D
X420 to X42F
7-6
7.
1) Set the device number (Y400) for b0 of the station 1 as a send data storage
device.
2) The send data storage device occupies from Y400 to Y45F.
For the present system example, since the total number of stations is odd, it
is occupied for one extra station.
3) The device numbers of output modules connected are as follows:
Station 9 to 10
AX40Y50C
Y440 to Y44F
Station 11
Y450 to Y457
AJ35TJ-8R
With respect to Y400 to Y43F and Y458 to Y45F, they are simultaneously
refreshed, but are not output.
POINT
(1) If the same device type is used for the send data storage devices and
received data storage devices, make sure that there is no duplication of
device numbers.
When the received data storage device is set to B0 in the system
configuration example, it occupies B0 to B5F as the device range.
Set the send data storage device to B60 or later.
When the send data storage device is set to B60, the device range will be B60
to BBF.
(2) If a bit device is specified as the send/received data storage device, the
device number set must be a multiple of 16.
Example:
X0, X10,
X100,
M0, M16,
B0, B10,
M256,
B100,
7-7
7.
7.2
Parameter
Master station
Auto refresh
setting of
CC-Link
Remote input
(ON/OFF data)
0 step
to
Remote output
(ON/OFF data)
Remote I/O
station (input)
External
device
Remote I/O
station (output)
External
device
Remote device
station
External
device
Remote register
(RWr: Word data)
END
END
processing
Remote register
(RWw: Word data)
7-8
7.
(1)
Item
Description
Setting range
M
Number of modules
1 to 8
0000H to 0FE0H
Module type
The loaded CC-Link module type (Master station, local station, stand-by station)
is set.
M: Master station
L: Local station
T: Stand-by station
The device that stores the batch refresh received data from the remote station
is set.
When the head device number is set, the points corresponding to the specified
number of stations (Total number of stations) are obtained to refresh all areas.
The output module area is also refreshed.
The settings are made in units of 16 points.
The device that stores the batch refresh send data to the remote station is set.
When the head device number is set, the points corresponding to the specified
X, M, L, B, T, ST, C, D,
number of stations (Total number of stations) are obtained to refresh all areas.
W, R, ZR*
The input module area is also refreshed.
The settings are made in units of 16 points.
The device that stores the batch refresh received data from the remote station
is set.
When the head device number is set, the points corresponding to the specified
number of stations (Total number of stations) are obtained to refresh all areas.
The I/O module area is also refreshed.
The settings are made per point.
The device that stores the batch refresh send data to the remote station is set.
When the head device number is set, the points corresponding to the specified
M, L, B, T ,ST, C, D, W,
number of stations (Total number of stations) are obtained to refresh all areas.
R, ZR*
The I/O module area is also refreshed.
The settings are made per point.
80 to 4096
Transmission buffer
specification for transient
station
80 to 4096
X, M, L, B, T, ST, C, D,
W, R, ZR*
M, L, B, T ,ST, C, D, W,
R, ZR*
M, L, B, T ,ST, C, D, W,
R, ZR*
Only when the file register is set to "Use the designated file" with the "Parameter", R and ZR
can be used as the auto refresh devices.
When "Use same file name as program" is set, R and ZR cannot be used.
REMARK
1)
In "Setting station" in the table above, M refers to the master station, L to the
local station, and T to the stand-by station.
2)
7-9
means that
7.
Description
Setting range
M
T, ST, C, D, W, R, ZR*
128 to 4096
The last station number of the remote station connected to the master station
is set.
1 to 64
Delay timer
1 to 100
(0 is invalid.)
Number of retries
When the CPU module has stopped, continuation/stop of the data link is set.
Stop
Continue
Non-synchronization
Synchronization
Specification of reserved
station
Not reserved
Reserved
Specification of invalid
station
Invalid
Valid
Station type
Not used
Used
1 to 10
1 station
2 stations
3 stations
4 stations
Only when the file register is set to "Use the designated file" with the "Parameter",
R and ZR can be used as the auto refresh devices. When "Use same file name as program" is
set, R and ZR cannot be used.
REMARK
1)
In "Setting station" in the table above, M refers to the master station, L to the
local station, and T to the stand-by station.
2)
7 - 10
means that
7.
(2)
Precautions
(a) Auto refresh of the CC-Link is available when the Q2ASCPU and the CC-Link
module with function version "B" are used.
When either of the Q2ASCPU or the CC-Link module does not indicate function
version "B," auto refresh of the CC-Link is not available.
(b) Auto refresh can be set to up to 8 CC-Link modules.
When 9 or more CC-Link modules are used, handle with the FROM/TO
instruction of the sequence program for the 9th module or later.
(c) When both the CC-Link module and the master station module for
MELSECNET/MINI-S3 are loaded and auto refresh is not set, the default
parameter is set to the master station module for MELSECNET/MINI-S3.
(d) The COM instruction or the G(P). ZCOM instruction allows auto refresh to the
CC-Link module while performing the sequence program.
However, auto refresh to the CC-Link module cannot be performed with the
J(P).ZCOM instruction. Error code "4102" (The network number designated with
the dedicated network instruction does not exist) appears.
(e) Refresh operation for the mixture of MELSECNET (/10, /II) and MELSECNET/
MINI-S3.
Refresh is performed in the order of MELSECNET (/10, /II), CC-Link and
MELSECNET/MINI-S3.
Therefore, the input data specifying the same range is afterward overwritten
with the executed data.
The output data is output to the MELSECNET (/10, /II), CC-Link, and
MELSECNET/MINI-S3.
(f) The operation of the Q2ASCPU when the CC-Link module is in the online/offline
mode is shown in the table below:
Parameter settings
CC-Link module
status
Online
Set
The Q2ASCPU does not generate an error,
Offline
Online
Not set
Offline
(g) Auto refresh setting to the CC-Link is performed using the following peripheral
devices.
Personal computer:
GX Developer, SW2IVD-GPPQ type GPP function software package
7 - 11
7.
(3)
Setting method
Auto refresh setting to the CC-Link is set with the following procedures.
(a) When the "CC-Link" is selected in the "Parameter", the "CC-Link setting" screen
appears.
(b) Set the number of the CC-Link modules loaded on the main base unit and
extension base unit for the Q2ASCPU and selct "Execute", then the screen of
CC-Link setting list appears.
7 - 12
7.
(c) Move the cursor to the module number position for auto refresh setting and
press the
Type setting of
the CC-Link module
whose number is
specified
Device settings
for the Q2ASCPU
to be used
[CC-Link setting]
1. Module starting I/O No.
2. Module type 1. (*) M.
2. ( ) L.
Label name:
[ ]
4. Auxiliary setting....
Master station
Local station
Device
Device
Device
Device
Device
Device
Execute(Y)
5. Station information
setting....
[
[
[
[
[
[
]
]
]
]
]
]
Setting of remote
station connected to
the CC-Link module
(Refer to 1).)
Cancel(N)
Spase:Select Esc:Close
When pressing the Execute (Y) or the Esc key , the screen returns to the
screen of CC-Link setting list.
7 - 13
7.
1) When selecting the "4. Auxiliary setting....", the "Auxiliary setting" screen
appears.
When pressing the Esc key, the screen returns to the CC-Link setting
screen of (c).
2) When selecting the "5. Station information setting...", the "Station information
setting"screen appears.
When pressing the Esc key, the screen returns to the CC-Link setting
screen of (c).
[Station information setting]
Station
No.
1
2
3
4
5
6
7
8
9
10
11
12
Label name:
Station type
Number of Reserved/
invalid
occupied
station
stations
<
<
<
<
<
<
<
<
<
<
<
<
<
<
<
<
<
<
<
<
<
<
<
<
I/O >
I/O >
I/O >
I/O >
I/O >
I/O >
I/O >
I/O >
I/O >
I/O >
I/O >
I/O >
1>
1>
1>
1>
1>
1>
1>
1>
1>
1>
1>
1>
7 - 14
<
<
<
<
<
<
<
<
<
<
<
<
>
>
>
>
>
>
>
>
>
>
>
>
[
[
[
[
[
[
[
[
[
[
[
[
Receive
Auto
] [
]
[
]
] [
]
[
]
] [
]
[
]
] [
]
[
]
] [
]
[
]
] [
]
[
]
] [
]
[
]
] [
]
[
]
] [
]
[
]
] [
]
[
]
] [
]
[
]
] [
]
[
]
Spase:Select Esc:Close
8.
DEBUGGING FUNCTION
DEBUGGING FUNCTION
8.1
Function List
Q2ASCPU has a variety of convenient functions when debugging.
The following shows the debugging functions.
Item
Description
Function that reads CPU programs, device statuses from a
Monitor function
running
Step operation
Reference
Section 8.2
Section 8.3
Section 8.4
Section 8.4.1
Section 8.4.2
Section 8.4.3
Section 8.5
Section 8.6
Section 8.7
Step execution
Section 8.7.1
Partial execution
Section 8.7.2
Skip execution
Program trace function*1
Simulation function*2
Section 8.7.3
Section 8.8
Section 8.9
Section 8.10
For details on the operation for each function, refer to the GPP function Operating
Manual.
*1
*2
8-1
8.
DEBUGGING FUNCTION
8.2
Monitor Function
This function reads CPU module programs and device statuses to a peripheral device
capable of GPP functions.
Application
This function is used to set monitoring conditions for monitoring the operating
statuses of the programmable controller in accordance with a precise timing.
There are three "Monitoring Condition" as follows.
Executing a monitoring at END processing.
Setting the step number to be monitored and the step conducting status.
Setting the device status.
This function is used to retain the monitoring screen by setting "Monitor stop
condition setup" in accordance with a precise timing.
When monitoring the CPU module marked Function version B using a peripheral
device capable of GPP function, local device monitor test is executed by setting
"local device monitor".
8.2.1
Function Description
(1)
8-2
8.
DEBUGGING FUNCTION
:<
>
:<
>
:< ON >
:<OFF >
:<Always>
8-3
8.
DEBUGGING FUNCTION
REMARK
1) When Step # [ 0] is designated, the execution condition must be set as Always.
2) When "1. [ ] Device" only is specified (when "2. [ ] Step #" is not specified), the
monitor data collection timing is every scan after END processing of the
programmable controller CPU.
When the data is changed in the same scan, it cannot be detected. (Including the
low-speed program)
3) When only "1. [ ] Device" is set, either
"1. ( ) Word Device" or "2. ( ) Bit Device" can be designated.
When "1. ( ) Word Device" is designated
The collection timing of the monitor data is the scan END processing when the
current value of the specified word device becomes the specified value.
The following shows the method for designating the current value.
Decimal designation:
[K Decimal number
]
]
>
>
8-4
8.
DEBUGGING FUNCTION
POINT
In the ladder block shown below, assuming that the detailed condition is set as
follows: "Step # [100] = <
8-5
8.
DEBUGGING FUNCTION
POINT
(2) If the ladder block head other than 0 step is specified to the step number as
detailed conditions, the monitor data is collected when the instruction
execution status immediately before execution is the specified status.
When "Step # [ 2] = <ON>" is specified in the ladder below, the monitor data is
collected for OUT Y10 ON.
8-6
8.
DEBUGGING FUNCTION
(2)
ON
OFF
: Always
If "2. [ ] Calculation State" isn't set, the timing for monitor stop is such that
monitoring is stopped after CPU module END processing.
8-7
8.
DEBUGGING FUNCTION
: [K Decimal number
: [H Hexadecimal number
Space
L]
: [E Real number
(3)
In the case of devices for which index qualifications have been made, the index
qualified value is monitored.
The following shows an example of this type of monitoring.
8-8
8.
DEBUGGING FUNCTION
(4)
(5)
REMARK
To monitor devices of special function modules, set "2. Buffer Memory 1. Monitor" for
"5/Monitor Target Setting" under the ladder mode "Option" menu.
8-9
8.
DEBUGGING FUNCTION
(6)
(7)
\Y, J
\B, J
\SB, BL
\S
(8)
\X,
\G, J
\W, J
\SW
The following shows the setting device under the detailed condition.
(a) Bit device
\X, J
\Y, J
\B, J
\SB,
\S
\G, J
\W, J
\SW
The following qualifications are possible with respect to the devices listed above.
Digit designation for bit devices
Bit number designation for word devices
8 - 10
8.
DEBUGGING FUNCTION
NOTE
1) When a monitoring is performed with a monitor condition set, the file
displayed at the device running GPP function is monitored.
Make sure that the file name used with GPP function is the same as the file
name when monitoring is performed by executing "Newly from PLC".
2) When the buffer memory of a peripheral device is read by designating a
direct device, FFFFH is monitored if the peripheral device is faulty or not
connected.
3) When monitoring file registers, FFFFH is monitored if no file register
designation is made.
4) Before monitoring, make sure that the device assignment of the CPU and
GPP function agree.
5) For the local device monitor in each program file, the monitor operation
varies depending on presence of the CPU module function version B and the
GPP function model.
[Without function version B]
Detailed conditions (step number and device condition) are set for each
program file to perform monitoring.
[With function version B]
When the GX Developer and the SW2IVD-GPPQ are used, the local
device can be monitored in each program file by setting compatibility with
local device.(Refer to Section 8.2.2.)
When SW0IVD-GPPQ and SW1IVD-GPPQ are used, the local device can
be monitored with the same operation as the operation without function
version B.
6) When monitoring the buffer memory of a special function module, the scan
time is prolonged in the same way as it is when a FROM/TO instruction is
executed.
7) Several people can perform monitoring at the same time.
The following considerations apply when executing this:
High-speed monitoring can be made possible by increasing the system
area by 1k steps for each monitor for other station use when formatting the
built-in RAM.
In the monitor for other stations, 15k steps maximum can be set in the
system area and the corresponding file space for the user is reduced.
Only one person can set the detailed conditions for monitoring.
8) The detailed conditions for monitoring can only be set in ladder monitoring.
9) If the same device is designated for both a monitor condition and monitor
stop condition, also designate the "ON" or "OFF" status.
10) When the step number is specified for the monitor condition, monitor
conditions are not satisfied for no execution of the applicable step instruction
as shown below:
Applicable step instructions are skipped by CJ, SCJ and JMP instructions.
The applicable instruction is the END instruction and the FEND instruction
exists in the program.
11) Do not reset the CPU module while the monitor condition is registered.
8 - 11
8.
8.2.2
DEBUGGING FUNCTION
CPU module
Execution of program ("A"
Program: A
X0
Program: B
X10
MOVP
K2 D0
MOVP
K3 D9
X1
MOVP
MOVP
"C")
Program: C
X20
K4 D0
X11
MOVP
K3 D0
X21
K8 D9
MOVP
K6 D9
[EX]
When D0 to D10 are local devices,
D0=4 for X10 ON and D9=8 for X11
ON are displayed.
GX Developer or
SW2 -GPPQ is installed.
(1)
"B"
Peripheral device
To perform monitor test of the local devices, the following GPP function software
packages are required:
Personal computer
GX Developer, SW2IVD-GPPQ type GPP function software package
8 - 12
8.
DEBUGGING FUNCTION
(2)
8 - 13
8.
DEBUGGING FUNCTION
(3)
SW0
-GPPQ
D0 of program "C" is
SW1
-GPPQ
monitored.
When local
device is not
set
SW2
D0 of program "C" is
monitored.
D100
D100 after execution of
program "C" is
monitored.
D100 after execution of
program "C" is
monitored.
D0 of program "C" is
monitored.
D100
D100 after execution of
program "C" is
monitored.
D100 after execution of
program "C" is
monitored.
-GPPQ
When local
D0 of the displayed
device is set
program is set.
set.
REMARK
GX Developer supports functions of function version B.
(4)
Precautions
(a) The local device that can perform the monitor test in one peripheral device is
only one program.
Monitor test for multiple program local devices from one peripheral device is not
allowed.
(b) The number of programs that allows simultaneous monitor test from multiple
peripheral devices is up to 16.
When the local device of the stand-by type program is monitored, the local
device data is read/escape. The scan time is extended as follows:
Q2ASCPU(S1)
8 - 14
8.
DEBUGGING FUNCTION
8.3
CAUTION
Application
This function is used to change a program without stopping program execution.
Function Description
(1)
Write during RUN is possible from multiple peripheral devices capable of GPP
functions with respect to one file.
In order for this, designate the pointer for the programs to be written from the
peripheral devices capable of GPP functions in advance. This enables write safely
during RUN using peripheral devices capable of GPP functions.
8 - 15
8.
DEBUGGING FUNCTION
The example below shows a case where peripheral device capable of GPP functions
A performs write during RUN from P0, and peripheral device capable of GPP
functions B performs write during RUN from P1. The program enclosed in the frame
is the program subject to write during RUN.
The machining program
from P0 onward is obtained
by write during RUN.
X0 X2
X0 X2
P0
P0
Y30
X3 X4
P1
Y30
X1
X1
A1SJ71QC24
SET M10
X3 X4
P1
SET M10
X5
X5
END
END
Peripheral device
capable of GPP
function A
(2)
Peripheral device
capable of GPP
function B
It is possible to write programs from peripheral devices capable of GPP functions that
are connected to other stations in the network during the RUN.
8 - 16
8.
DEBUGGING FUNCTION
Operation Procedures
To write from the GPP function peripheral devices during RUN, the following two methods
are available:
(1)
After a ladder is created in the ladder mode, write during RUN is performed by
pressing
(2)
Shift
F4
With "4. Write/conversion setting" in "8/ Option" menu of the ladder mode, "4. Write
setting during RUN" and "7. Write method during RUN" are set.
When the F4 key is pressed for conversion of the ladder after the ladder is
created, write during RUN is performed.
The following shows the setting examples:
(a) In "4. Write setting during RUN," "1. ( ) After conversion, PLC is written during
RUN" is set.
(b) In "7. Write method during RUN," "1. ( ) Write during normal RUN" or "2. ( ) Write
during relative RUN with pointer" is selected.
NOTE
The following shows the precautions relating to write during RUN.
(1)
The only memory that can be used for write during RUN is the built-in RAM. If write
during RUN is performed during a boot operation, also write the program to the
memory card at STOP.
When the boot operation is started again without write on the memory card, the
program before write during RUN is transferred from the memory card to the built-in
RAM for execution.
(2)
The maximum number of steps that can be handled in one write during RUN
operation is 512.
The number can be changed according to how many steps of write during RUN
saved using a peripheral device capable of GPP function. The saved steps of write
during RUN can be set during the CPU module OFF. Note that the saved steps of
write during RUN decrease every time write during RUN is performed.
8 - 17
8.
DEBUGGING FUNCTION
(3)
1)
During low-speed program execution, write during RUN is started when execution of
all low-speed programs is completed. Also, execution of low-speed programs is
suspended during write during RUN.
2)
Scan execution
type program
step 0 to END
Low-speed execution
type program
step 0 to 200
3)
Scan execution
type program
step 0 to END
Low-speed execution
type program
step 201 to 320
1 scan
4)
Scan execution
type program
step 0 to END
Low-speed execution
type program
step 321 to END
1 scan
1 scan
Scan execution
type program
step 0 to END
Low-speed execution
type program
step 0 to 120
1 scan
8 - 18
8.
DEBUGGING FUNCTION
8.4
Application
This function is used to determine the influence of the processing time of each program on
the total scan time when making system adjustments.
Function Description
Execution time measurement provides the following three functions. For explanations of
each function, refer to Section 8.4.1 through Section 8.4.3.
Program monitor list
Interrupt program monitor list
Scan time measurement
8.4.1
Function Description
The scan time, execution count, and processing time for each item can be displayed for
each program.
All operations are performed using Monitor/test menu in the ladder mode.
(1)
8 - 19
8.
DEBUGGING FUNCTION
(2)
8 - 20
8.
DEBUGGING FUNCTION
F1
1) When the stop mode is set to "Output stop after stop" and stop is executed,
the program stops after execution of 1 scan-off. (The operation is the same
as the POFF instruction execution.)
When the above stop opearation is made in the stand-by program, the
program stops after 1 scan-off execution.
Therefore, the "execution count" is added by one.
2) If an error occurs with the RET/IRET instruction during 1 scan OFF execution
in the stand-by program, the "execution count" is added by one.
In this case, the execution type becomes "Scan execution".
8 - 21
8.
8.4.2
DEBUGGING FUNCTION
Application
This is used to check the execution status of interrupt programs.
Function Description
This function allows display of the execution counts of interrupt programs.
All operations are performed using the monitor/test menu in the ladder mode.
(1)
(2)
8 - 22
8.
8.4.3
DEBUGGING FUNCTION
Function Description
This function allows measurement of the execution time of section of the program in a
program file.
The function can also be used to measure times within subroutine programs and interrupt
programs.
If there is an interrupt program in the monitored section, the processing is added to the
total measurement time.
All operations are performed using "Monitor/test" menu in the ladder mode.
(1)
8 - 23
8.
DEBUGGING FUNCTION
(2)
Designate the scan time measurement range (The designated part is highlighted).
(3)
NOTE
1)
2)
3)
4)
Make sure that the start step is lower than the end step in the setting.
Times that span different program files cannot be measured.
If the measured time is less than 0.100ms, 0.000ms is displayed.
END processing time is not included in the measuring time, being included in
the measurement range.
8 - 24
8.
DEBUGGING FUNCTION
8.5
Application
This allows checking the changes in the contents of the devices used in a program in
accordance with a designated timing during debugging.
This enables debugging time to be shortened.
Function Description
(1)
Function
(a) The sampling trace function samples the contents of a designated device in a
constant time interval (the sampling cycle) and stores the trace results in a
sampling trace file in a memory card.
(b) The devices that can be traced are listed below.
1) Bit device:
2) Word device:
\Y, J
\B, J
\SB, BL
\X,
\S.......................Max. 50 points
8 - 25
8.
DEBUGGING FUNCTION
(c) The sampling trace file stores the trace condition data and trace execution data
required to execute the sampling trace. Once a GPP function starts tracing, the
number of set tracing times are executed.
CPU module
Memory card
Device
area
File
register
area
*
Data of
designated
device
1
2
3
4
5
6
n-1
n
1st data
2nd data
3rd data
4th data
5th data
6th data
1
2
3
4
5
6
Reading to
peripheral
device
Data of
designated
number of
traces is
displayed.
Monitoring of
sampling trace
data
n-1
n
(n1)th data
nth data
* When the trigger point is executed, sampling is performed for the designated number of times and then
the data of the sampling trace area is latched.
(d) The trace results show the ON/OFF statuses of bit devices, and current values of
word devices, for each sampling cycle.
NOTE
While the CPU module is STOP, trace is stopped. The trace result cannot be read.
8 - 26
8.
DEBUGGING FUNCTION
(2)
Basic operation
The basic operation for sampling trace is shown below.
The statuses during execution of the sampling trace function can be confirmed by
monitoring special relays SM800 to SM805 and SM826.
Trace execution
8 - 27
8.
DEBUGGING FUNCTION
8 - 28
8.
DEBUGGING FUNCTION
Operation Procedures
The following shows the procedures of sampling trace.
These operations are performed on the "Sampling Trace" screen of the trace menu in the
online mode.
(1)
Set the trace devices and trace conditions with GPP function.
(a) Setting the trace devices
Set the devices at "Trace Device Setting" on the "Sampling Trace" screen.
8 - 29
8.
DEBUGGING FUNCTION
Sampling the designated number of times (count after trigger) leads completion
after the trigger point execution.
8 - 30
8.
DEBUGGING FUNCTION
total count
8192
2) "Trace Point"
Set the timing for collection of trace data. Select one of the following:
Every END
: Data collected at END instruction of every
scan.
Every Interval
\X, J
\Y, J
\B, J
\SB,
BL \S
Word device
\G, J
\W,
J \SW
The following qualifications are possible with respect to the devices listed
above.
Digit designation for bit devices
Bit number designation for word devices
8 - 31
8.
DEBUGGING FUNCTION
3) "Trigger Point"
The point at which the trigger is executed is set. Select one of the following:
At Instruction Execution : When executing STRA instruction
At Request of PDT
(2)
Time
Step No.
Program Name
Write the set trace device and trace condition to the memory card.
(a) Set the trace file and storage destination.
Set the drive number and file name at "1. ( ) Execute Trace & Display Status" on
the "Sampling Trace" screen.
8 - 32
8.
DEBUGGING FUNCTION
(3)
2) Suspension
3) Display Status
4) Trigger Execution
: The drive number and sampling trace file name are set.
8 - 33
8.
DEBUGGING FUNCTION
(4)
Retrieve the trace results from the CPU module and display them.
1) Read the trace results from the CPU module by using "4. ( ) Read from PC
(Results)" on the "Sampling Trace" screen.
2) Display the trace results by using "4. ( ) Trace Results Display" on the
"Sampling Trace" screen.
POINT
Once the sampling trace has been executed, the second is not executed. To
execute the trace again, execute the STRAR instruction to reset sampling trace.
NOTE
1) Set sampling trace files in the RAM area of the memory card.
2) It is possible to execute sampling trace from another station in the network, or
from a serial communication module. However, sampling trace cannot be
executed from more than one site at the same time. With the Q2ASCPU,
sampling trace can be executed from only one site at a time.
3) Since the trace condition registered in the CPU module is latched, the
condition data is retained even when the programmable controller power is
turned OFF. The data can be cleared by performing a latch clear operation
using the RUN/STOP key switch on the Q2ASCPU.
4) The Q2ASCPU must be connected to the peripheral device capable of GPP
functions in order to execute sampling trace.
8 - 34
8.
DEBUGGING FUNCTION
8.6
Application
This function is used to retain the statuses of devices used in a program at designated
moment during debugging.
Function Description
(1)
Function
(a) Status latch stores the device statuses at designated moment in a status latch
file of a memory card.
(b) The status latch file stores the status latch condition and status latch execution
data for status latch execution.
Saving the device statuses can be executed in the following case.
When executing SLT instruction in a program
When specifying a status latch start at GPP functions
When the conditions of the set devices and step Nos. are met
(c) The status latch results show the bit device ON/OFF statuses and word devices
values at designated moment.
8 - 35
8.
DEBUGGING FUNCTION
(2)
Basic operation
The following shows the basic operation for status latch.
The statuses during execution of the status latch function can be checked by
monitoring special relays SM806 to SM809 and SM827.
(3)
8 - 36
8.
DEBUGGING FUNCTION
Operation Procedures
The following shows procedures for status latch.
All operations are performed on the "Status Latch" screen of the trace menu in the online
mode.
(1)
2) Specify Detail Range : The device types and numbers of points are set.
The following shows setting examples:
(Applicable devices)
1) Bit device
\X, J
\Y,
J \B, J \SB, BL \S
2) Word device
\G, J
\W, J
\SW
REMARK
Up to 1000 device ranges can be set including both bit devices and word devices.
The devices listed above cannot be qualified.
8 - 37
8.
DEBUGGING FUNCTION
(2)
8 - 38
8.
DEBUGGING FUNCTION
(3)
2) Suspension
3) Display Status
4) Trigger execution
: The drive number and status latch file name are set.
8 - 39
8.
DEBUGGING FUNCTION
(4)
Retrieve the status latch results from the CPU module and display them.
(a) Read the status latch results from the CPU module by using "8. ( ) Read from PC
(Results)" on "Status Latch" screen.
(b) Display the read trace results by setting "1. ( ) Monitor Target" on the "Monitor
Target Setting" screen of "Option" menu in the ladder mode to "3. ( ) Status
Latch".
NOTE
1) Set status latch files in the RAM area of the memory card.
2) It is possible to execute status latch from another station in the network, or from a
serial communication module. However, sampling trace cannot be executed from
more than one site at the same time.
With Q2ASCPU, sampling trace can be executed from only one site at a time.
3) Since the status latch conditions registered in the CPU module are latched, the
status latch data is retained even when the power is turned OFF.
The data can be cleared by performing a latch clear operation using the RUN/
STOP key switch on the Q2ASCPU.
4) Status latch is performed by connecting the Q2ASCPU with the peripheral devices
capable of GPP function.
5) When the monitor destination is set to the "status latch", set values of the timer/
counter are not displayed.
"0" is displayed for the column of the timer/counter set values.
6) When "device" is specified in the detailed condition for trigger point setting,
"device" is specified. When the condition is satisfied before execution of the
trigger, trigger cannot be executed.
REMARK
1) When the monitor destination is set to "device memory", the set values of the
timer/counter are not displayed.
"0" is displayed in the set value column of the timer/counter.
8 - 40
8.
DEBUGGING FUNCTION
8.7
Step Operation
This function runs one step or one part of a program, runs a program with a part skipped.
Application
This function is used to determine the causes of faults during debugging.
Function Description
This function can only be used when the CPU module is set to STEP-RUN.
The step operation function provides the following three functions. For explanations of
each function, refer to Section 8.7.1 through Section 8.7.3.
Step execution
Partial execution
Skip execution
8 - 41
8.
8.7.1
DEBUGGING FUNCTION
Step execution
Step execution is a sequence program execution that performs by one step at a time,
starting from the designated step.
It allows a sequence program execution while checking an execution status of the
sequence program and the contents of each device during debugging.
There are two types of step execution as described below:
(1)
(2)
8 - 42
8.
DEBUGGING FUNCTION
Operation Procedures
The following shows the procedures to perform step execution.
All operations are performed on Monitor/test screen in the ladder mode (debugging).
(1)
8 - 43
8.
8.7.2
DEBUGGING FUNCTION
Partial execution
The sequence program is executed from the start step or the step where operation is
currently stopped to a designated step (break point).
Operation Procedures
The following shows the procedures to perform partial execution.
All operations are performed on Monitor/test screen in the ladder mode (debugging).
(1)
Designate the execution start step, break condition, and execution operation with
GPP function.
(a) Setting the execution start step
Designate the step at which partial execution is started at "1. Partial Run" on the
"Partial Run" screen.
8 - 44
8.
DEBUGGING FUNCTION
2) Word device
\Y, J
\B, J
\SB, BL
\X,
\S
8 - 45
\G, J
\W, J
\SW
8.
DEBUGGING FUNCTION
Interrupt status
Description
Designates whether QnACPU executes the scan time by the actual time or by
the designated time. (Default: designated time 10ms)
Designates whether or not interrupts are prohibited during execution.
(Default: "Inhibit")
Designates whether QnACPU executes I/O refresh whenever program
Refresh
8 - 46
8.
8.7.3
DEBUGGING FUNCTION
Skip function
Skip execution or partial execution of a program whereby the program is executed with the
designated step(s) skipped.
Operation Procedures
The following shows the procedures to perform skip execution.
All operations are performed on Monitor/test screen in the ladder mode (debugging).
(1)
8 - 47
8.
DEBUGGING FUNCTION
8.8
Application
This function is used to check the execution status of any step of any program during
debugging.
This enables debugging time to shorten.
Function Description
(1)
Function
(a) The program trace function collects the execution status of the designated step
of the designated program and stores it in a program trace file in the memory
card.
(b) The devices that can be traced are listed below.
1) Bit device
2) Word device
\Y, J
\B, J
\SB, BL
\X,
\S........................Max. 50 points
8 - 48
8.
DEBUGGING FUNCTION
(2)
Basic operation
The following shows the basic operation for program trace.
The statuses during execution of the program trace function can be confirmed by
monitoring special relays SM810 to SM815 and SM828.
8 - 49
8.
DEBUGGING FUNCTION
8 - 50
8.
DEBUGGING FUNCTION
Operation Procedures
The following shows the procedures to perform program trace.
These operations are performed on the "Program Trace" screen of the trace menu in the
online mode.
Perform these operations with the CPU module setting to the STEP-RUN. (Refer to
Section 8.7.)
(1)
Set the trace devices and trace conditions with GPP function.
(a) Setting the trace devices
Set the devices at "Trace Device Setting" on the "Program Trace" screen.
8 - 51
8.
DEBUGGING FUNCTION
8 - 52
8.
DEBUGGING FUNCTION
3) "Trigger Point"
Set the point at which the trigger is executed. Select one of the following:
Upon execution of : When executing PTRA instruction
each instruction
At Request of PDI : When operating trigger using the peripheral devices
capable of GPP function.
Specify Detail
Condition
The following shows the setting device under the detailed condition.
Bit device
Word device
(Contact), C (Contact), J
\X, J
\Y, J
\B, J
\SB, BL \S
The trace execution time, program name, step and branch factor are automatically
added to the trace results.
8 - 53
8.
DEBUGGING FUNCTION
(2)
Write the set trace device and trace condition to the memory card.
(a) Set the trace file and storage destination.
Set the drive number and file name at "1. ( ) Execute Trace & Display Status" on
"Program Trace" screen.
8 - 54
8.
DEBUGGING FUNCTION
(3)
2) Suspension
3) Display Status
4) Trigger Execution :
8 - 55
8.
DEBUGGING FUNCTION
(4)
Retrieve the trace results from the CPU module and display them.
(a) Read the trace results from the CPU module by using "A. ( ) Read from PC
(Results)" on "Program Trace" screen.
(b) Display the read trace results by using "4. ( ) Trace Results Display" on "Program
Trace" screen.
POINT
Once the program trace has been executed, the second is not executed. To
execute the trace again, execute the PTRAR instruction to reset program trace.
NOTE
1) The program trace can be performed only for STEP-RUN.
2) Set program trace files in the RAM area of the memory card.
3) It is possible to execute program trace from another station in the network, or
from a serial communication module. However, sampling trace cannot be
executed from more than one site at the same time. With the Q2ASCPU,
sampling trace can be executed from only one site at a time.
4) The program trace is performed by connecting the Q2ASCPU with the
peripheral device capable of GPP function.
8 - 56
8.
DEBUGGING FUNCTION
8.9
Simulation Function
POINT
When the link memory and the buffer memory are simulated in the simulation data
file, a memory card is required.
Application
This function simulates execution of a program in step execution or partial execution, with
the input module, output module, or special function module isolated from the CPU
module.This enables QnACPU to debug a program without any effects on other modules.
Function Description
(1)
When the program is executed, data chaneges from/to external sources are isolated
by setting so that data refreshes for input/output modules are not executed.
(2)
8 - 57
8.
DEBUGGING FUNCTION
Operation Procedures
The following shows the procedures to perform simulation.
indicates a GPP function operation and
module.
Switch to STEP-RUN
(*)
(*)
Select "9. /Device Test" from the Monitor/test menu and set the
device status.
8 - 58
8.
DEBUGGING FUNCTION
(1)
The following shows details on the settings that can be made for each item:
Setting Item
Setting Option
Input Refresh
Yes/No
Output Refresh
Yes/No
Description
Select whether inputs from external sources are input
to the CPU module or not.
Select whether the operation results in the CPU
module are output to external destinations or not.
Access Unit
Link Memory/
Ignore
Buffer Memory
Depend on Simulation
Data File
8 - 59
8.
DEBUGGING FUNCTION
If "Depend on Simulation Data File" is selected for "Link Memory/Buffer Memory", the
access range for each module can be checked by checking the simulation range settings.
NOTE
1) Simulation can be performed only for STEP-RUN.
2) A memory card is required to carry out link memory/buffer memory simulation
using a simulation data file.
Set the simulation data file to the RAM area of the memory card.
3) It is possible to carry out simulation from another station in the network, or
from a serial communication module. However, simulation cannot be
executed from several sites at the same time. With the Q2ASCPU, sampling
trace can only be executed from one site at a time.
4) Simulation is performed by connecting the Q2ASCPU and the peripheral
devices capable of GPP function.
5) Note the following points when executing simulation:
If direct inputs (DX) and direct outputs (DY) are used to handle inputs/
outputs directly, the device memory is accessed rather than the actual
inputs/outputs.
No processing is performed for any special function module instruction.
When a "SP.UNIT ERROR" occurs, FFFFH is displayed in the module
number area of the common information.
If "Ignore" is set for the buffer memory access method, FFFFH is set for
access by instruction and the monitor results.
8 - 60
8.
DEBUGGING FUNCTION
Application
This function is used to simultaneously debug different files from more than one peripheral
device capable of GPP functions.
Function Description
The following shows the combinations of debugging functions that can be used
simultaneously by different operators.
Debug function from other stations
Debug function from
host
Monitor
Write during
Execution Time
Sampling Trace
RUN
Measurement
/Program Trace
Status Latch
Step
Operation
Simulation
Monitor
Write during RUN
Execution time
measurement
Sampling trace
Program trace
Status latch
Step operation
Simulation
8 - 61
8.
DEBUGGING FUNCTION
Operation Procedures
The operation for simultaneous monitoring by several people is described below.
(1)
Select "5. ( ) Format (with Option)" for "B/PC Memory Batch Processing" in the "2/
PC" menu in the online mode, and set a monitor file for another station.
The following shows setting examples:
Up to 15k steps in 1k step units can be set as the system area. The area
corresponding to one monitor file for another station is no more than 1k step.
Accordingly, a maximum of 15 monitor files can be set.
Since the built-in RAM program file area is in the same area as the monitor file for
other stations, the program file area is reduced for the area of the other station
monitor file.
(2)
8 - 62
8.
DEBUGGING FUNCTION
Operation Procedures
The following shows the procedures for simultaneous write during RUN executed by
several people.
(1)
With "4/ Write & Conversion Setting" in "8/ Option" menu of the ladder mode, "4.
Write During RUN Setting" and "7. Write Method at Write During RUN" are set.
The following shows setting examples:
(a) Set "1. ( ) Write into PC during Run state" for "4. Write During Run Setting".
(b) Select "1. ( ) Normal" or "2. ( ) Relatively using Pointer" for "7. Write Method at
Write During Run".
If more than one person is to perform a write during RUN operation with respect to
the same file, set a write during RUN pointer in advance and select "2. ( ) Relatively
using Pointer".
8 - 63
8.
DEBUGGING FUNCTION
The example below shows a case where peripheral device capable of GPP functions
A performs write during RUN from P0, and peripheral device capable of GPP
functions B performs write during RUN from P1.The program enclosed in the frame
is the program subject to write during RUN.
Writes P0 or later in the
machining program in RUN.
P0
X0 X2
P0
Y30
Y30
X1
X1
P1
X0 X2
Serial
communication
module
A1SJ71QC24
X3 X4
SET M10
P1
X3 X4
SET M10
X5
X5
END
END
Peripheral device A
capable of GPP
functions
Peripheral device B
capable of GPP
functions
NOTE
Refer to Section 8.3.
8 - 64
9.
MAINTENANCE FUNCTION
MAINTENANCE FUNCTION
9.1
Function List
The following shows the functions for maintenance.
Item
Watchdog timer
Self-diagnostics function
Error history
System protect
Keyword Registration
System display
LED indication
Description
Function that monitors watchdog errors due to CPU module
hardware or program errors.
Function whereby the Q2ASCPU itself diagnoses whether or not
there are any errors.
Function that stores the results of diagnosis in memory as a fault
history.
Function that sets whether reading/writing is enabled or disabled
for Q2ASCPU files.
Function that disables GPP function operations with respect to the
CPU module.
Function that allows monitoring of the system configuration by
connecting a peripheral device capable of GPP functions.
Function to display the CPU module operation status with the LED
located on the front of the CPU module.
Reference
Section 9.2
Section 9.3
Section 9.4
Section 9.5
Section 9.6
Section 9.7
Section 9.8
LED indication
Section 9.8.1
Priority setting
Section 9.8.2
For details of GPP function operation, refer to the GX Developer Operating Manual or the
Type SW IVD-GPPQ Software package Operating Manual (Online).
9-1
9.
MAINTENANCE FUNCTION
9.2
Watchdog Timer
(1)
REMARK
The time set for the watchdog timer can be changed using "WDT" in PC RAS setting
in the GPP function parameter mode.
The setting range is 10ms to 2000ms (in 10ms units).
(2)
REMARK
Scan time is the time taken for the execution of the sequence program, starting from
step 0 and ending at step 0.
The scan time is not the same in every scan: it differs according to the execution or
non-execution of the instructions used in the program. (Refer to Section 12.1.)
Sequence program
Scan execution
0 type program A
WDT reset
(Internal processing of a
programmable controller)
Scan execution
type program B
END
Scan time
Time measured by watchdog
timer
9-2
9.
MAINTENANCE FUNCTION
(3)
REMARK
The watchdog timer can be reset by a WDT instruction in the sequence program.
However, the scan time value is not reset and scan time is measured up to the END
instruction.
POINT
An error occurs within 0ms to 10ms in the measured time for watchdog timer.
9-3
9.
MAINTENANCE FUNCTION
9.3
Self-diagnostics Function
The self-diagnosis function is a function whereby the Q2ASCPU diagnoses its own errors.
(1)
(2)
The Q2ASCPU stores the error code of the error in the special register SD0, and
turns on the ERROR LED and displays a message.
If several errors occur, the error code of the latest error is stored in SD0.
(3)
Even if the programmable controller power is turned OFF, the latest 16 errors are
recorded with the battery backup.(Refer to 9.4?)
The PLC diagnostics mode of the GPP function can check error histories.
(4)
9-4
9.
MAINTENANCE FUNCTION
(5)
It is possible to select whether or not the following checks are performed by setting
"Yes/No" for error check in PC RAS setting in the parameter mode.
1) Battery Check
2) Fuse Blown Check
3)
(The default for all of these in the parameter settings is "Yes".)
If "No" is set for error check, error detection is not performed for these items, which
shortens the processing time for the END instruction.
Even if "Yes" for error check is set in the parameter, 1) thorugh 3), above error check,
can be canceled by turning on the special relay SM 1084.
However, if "No" is set in the parameter, turning off SM1084 is ineffective to execute
the error check.
9-5
9.
MAINTENANCE FUNCTION
Self-diagnostics list
Hardware error
Diagnosis item
RUN
ERROR
Always
Stop
OFF
Flickers
Stop
OFF
Flickers
RAM check
At power-ON or RESET
Stop
OFF
Flickers
At power-ON or RESET
Stop
OFF
Flickers
Fuse blown
Stop/Continue
OFF/ON
Flickering/ON
Stop
OFF
Flickers
(Default
stop)*1
(Default
check executed)*2
At power-ON or RESET
When executing FROM/TO instruction
Stop
OFF
Flickers
At power-ON or RESET
When executing FROM/TO instruction
Stop
OFF
Flickers
Continue
ON
OFF
Continue
ON
OFF
Stop/Continue
OFF/ON
Flickering/ON
Stop
OFF
Flickers
Stop/Continue
OFF/ON
Flickering/ON
(Default
stop)*1
Always
Always
Low battery
Handling error
LED Status
Occurrence of momentary
power interruption
check executed)*3
check executed)*2
stop)*1
No parameters
Stop
OFF
Flickers
Boot error
Stop
OFF
Flickers
Stop/Continue
OFF/ON
Flickering/ON
Stop
OFF
Flickers
Stop/Continue
OFF/ON
Flickering/ON
Stop
OFF
Flickers
stop)*1
stop)*1
Parameter errors
Diagnosis timing
Stop
OFF
Flickers
Stop
OFF
Flickers
Stop
OFF
Flickers
*1
*2
*3
9-6
9.
MAINTENANCE FUNCTION
Self-diagnostics list(Continued)
Diagnosis item
LED Status
RUN
ERROR
Stop
OFF
Flickers
No END instruction
Stop
OFF
Flickers
Stop
OFF
Flickers
Stop
OFF
Flickers
Stop/Continue
OFF/ON
Flickering/ON
FOR-NEXT instruction
configuration error
Stop
OFF
Flickers
CALL-RET instruction
configuration error
Stop
OFF
Flickers
Stop
OFF
Flickers
Stop
OFF
Flickers
Stop/Continue
OFF/ON
Flickering/ON
Operation error
(Default
Program error
Diagnosis timing
stop)*1
stop)*1
Stop
OFF
Flickers
Stop
OFF
Flickers
Stop
OFF
Flickers
Stop
OFF
Flickers
Stop/Continue
OFF/ON
Flickering/ON
Continue
ON
ON
stop)*1
Stop
OFF
Flickers
Stop
OFF
Flickers
Always
Stop
OFF
Flickers
Program timeout
Always
Continue
ON
ON
Annunciator check
Continue
ON
OFF
Continue
ON
OFF
CPU error
*1
9-7
9.
9.3.1
MAINTENANCE FUNCTION
Vacancy
UNIT VERIFY ERR.
FUSE BREAK OFF
SP.UNIT ERROR
I35
OPERATION ERROR
SFCP OPE.ERROR
SFCP EXE.ERROR
I36
ICM.OPE.ERROR
FILE.OPE.ERROR
I37
EXTEND INS.ERR.
PRG.TIME OVER
I38
I39
CHK instruction
Annunciator detect
I40 to I47
Vacancy
POINT
Interrupt pointers I32 to I39 are prohibited for execution when the PLC power is
ON or when the CPU module is reset.
To use I32 to I39, make the execution allowed with IMASK instruction.
REMARK
1) For details on interrupt pointers, refer to the QnACPU Programming Manual
(Fundamentals).
2) For the IMASK instruction, refer to the QCPU (Q mode)/QnACPU
Programming Manual (Common Instructions).
9.3.2
9-8
9.
9.3.3
MAINTENANCE FUNCTION
Resetting error
Q2ASCPU allows error resetting only for the errors that does not block the CPU module
operation.
The procedure for resetting an error is as follows.
1) Eliminate the cause of the error.
2) Store the error code to be reset in special register SD50.
3) Turn on special register SM50.
4) The error is reset.
When the CPU module is recovered from canceling the error, the special relay, special
register, and LED affected by the error are set to the state before the error occurred.
If the same error occurs again after the error reset, it is recorded in the error history again.
To reset multiple detected annunciators, only the first detected F number is reset.
POINT
When an error is reset by storing its error code in SD50, the last two digits of the
error code are ignored.
Example:
If errors with error codes 2100 and 2111 have occurred, and error code 2100 is
reset, error code 2111 is also reset.
9-9
9.
MAINTENANCE FUNCTION
9.4
Error History
Q2ASCPU can record the results detected by the self-diagnostics function with the
detection time in memory as an error history.
POINT
Since the internal clock of the Q2ASCPU is used for setting the detection time, be
sure to set the correct time before using the CPU module. (Refer to Section 10.5
for setting method of the clock.)
(1)
Storage area
(a) The latest 16 errors are stored in the error history storage memory of the CPU
module, which is latched.
(b) In the case of storing more than 16 errors, they can be stored to files in a
memory card by making the appropriate setting in the PC RAS settings in the
GPP function parameter mode.
(c) If a discrepancy arises between the parameters and memory card error history
when executing 1) or 2) below, the contents of the error history files are cleared
first, and the 16-point data of the fault history storage memory of the CPU is
transferred to the history file.
1) The number of error records in the history file as set in the parameters is
changed part way through.
2) A memory card whose capacity does not match the number of error records
set in the parameters is installed.
(d) The following shows the storage area for the error history file:
Storage area
*1
When the number of errors that can be stored is exceeded, the oldest error record is cleared
and the newest one stored in the same place.
POINT
Even if the error history file set in the parameters does not exist in the memory
card, no CPU module error occurs.
The CPU module performs only the processing that stores errors in the error
history storage file.
(2)
9 - 10
9.
MAINTENANCE FUNCTION
9.5
System protect
Q2ASCPU features a number of functions that protect against program changes ("system
protect") by restricting general data processing (access processing from GPP functions,
serial communication modules, etc.) by third parties other than designers.
The following system protect functions are available.
Target Protection
Description
Method
Valid Timing
Remark
Always
Valid for
devices
All files
All files
Always
Drive units
Parameter Program
Register password.
(Refer to Section 9.6)
Always
File units
All files
Always
"Control direction", "read/write display" and "writing" in the table above have the following
meanings:
Item
Control
instruction
Read/write
display
Write
Description
CPU module operation instruction by remote operation (Remote RUN, Remote STOP, etc.)
9 - 11
9.
MAINTENANCE FUNCTION
9.6
Password Registration
Passwords serve to prohibit reading and overwriting of data such as programs, comments,
etc., in the Q2ASCPU from a peripheral device.
In password registration, the parameter files and program files of a designated memory
(built-in RAM, memory card) are made the target of the entry code. There are two types of
registration as follows:
File names are not displayed, and read/write are prohibited.
File write is prohibited. (Read is possible).
When a password is registered, file operations from a peripheral device are not possible
without inputting the entry code registered in the CPU module.
(1)
Register Password
Entry codes are registered using the entry code registration function in the PLC menu
of the online mode of GPP function.
2) Cancel
Password : If the password matches, the registered password is
deleted from the CPU module.
3) None
: The current password is recorded in the GPP function
only and is not registered at the CPU module.
4) Change
Attribute : File read/write display or write can be prohibited in file
units.
(Operation possible even if no entry code is
registered.)
(c) Memory....... Designate the memory for which the password is to be registered.
9 - 12
9.
MAINTENANCE FUNCTION
POINT
(1) Password registration is valid for parameter files and program files only.
Invalid for other file types. Other file types can be protected by changing
attributes for each file.
(2) The keyword registered in the CPU module cannot be read from the CPU
module. If you forget the password, CPU module file operations will be
impossible. Keep a record of the password, e.g. on paper, and store it in a
safe place.
(3) When a keyword is registered, memory for 1 file is occupied.
(When a keyword is registered in the built-in RAM, 4k bytes are occupied.)
9 - 13
9.
MAINTENANCE FUNCTION
9.7
System Display
The following items can be checked by connecting a peripheral device capable of GPP
functions to the Q2ASCPU:
(1)
The following information relating to the modules actually mounted on the base unit:
(a) Type
(b) No. of Occupied Points
(c) Head X/Y number
(2)
(3)
These items can be checked using the detail HELP display and CPU module panel items
in the display menu of the GPP function PLC diagnositics mode.
9 - 14
9.
MAINTENANCE FUNCTION
9.8
LED indication
The Q2ASCPU module has LEDs on its front face that indicate the operating status of the
CPU module.
The following shows the meanings of the LED and LED indications.
9.8.1
LED indication
(1)
The following shows the meanings of the indications of each of the LEDs are given.
LED Name
Indication Detail
Indicates the operating status of the CPU module.
ON:
OFF:
RUN
Flickering:
Operating with the RUN/STOP key switch set to RUN or STEP RUN.
Operation is stopped, with the RUN/STOP key switch in the STOP, PAUSE, or STEP RUN position.
An error that stops operation has been detected.
The RUN/STOP key switch has been turned from STOP to RUN after writing a program in the STOP status.
To light, either turn the RUN/STOP key switch RUN
STOP
key switch.
Indicates the CPU module error detection status.
ERROR
ON:
A self-diagnostics error that does not stop operation, other than a battery error, has been detected.(The
operation mode at error occurrence has been set to "Resume" in PC RAS setting in the parameter mode.)
OFF:
Normal
ON:
An error has been detected by the CHK instruction, or an annunciator F has come ON.
OFF:
Normal
ON:
OFF:
9 - 15
9.
MAINTENANCE FUNCTION
(2)
The following shows how to turn OFF an LED that is currently ON.(Excluding the
reset operation.)
LED Name
Method for Turning OFF the LED
ERROR
USER
BAT.
ALARM
BOOT
: Valid
*1
: Not valid
in SD50.
SD50.......... Stores the error code of the error to be reset.
(For details on error codes, refer to Section 22.3.3.)
SM202........ When turning OFF
of SD202.
SD202........ Designates the LED to be turned OFF. (The LEDs that can be turned OFF are
the USER LED and the BOOT LED only.)
A bit setting of "1" indicates that the bit is to be turned OFF, "0" indicates that it is not to be
turned OFF.
The following shows the setting possibilities (all hexadecimal notation):
To turn both LEDs OFF: SD202 = 110H
To turn only the BOOT LED OFF: SD202 = 100H
To turn only the USER LED OFF: SD202 = 10H
(3)
Method for stopping ERROR LED, USER LED, and BAT.ALARM LED indications
ERROR LED, USER LED and BAT. ALARM LED have the same priority order as
described for LED indications in Section 9.8.2.
If an error item number is deleted from this order of priority, the LED does not light
even if the error corresponding to that error item number occurs.
(For details on the setting method, refer to the POINT in Section 9.8.2.)
9 - 16
9.
9.8.2
MAINTENANCE FUNCTION
Priority setting
If several errors occurred at a time, the indication conforms to the following conditions.
1) Stop error is indicated unconditionally.
2) Operation continue error are indicated in accordance with error item numbers
in an order of priority set by default.
Priorities can be changed. (set with special registers SD207 to SD209)
3) If several errors with the same priority occur, a first detected error is
indicated.
The following shows how to set priorities in special registers SD207 to SD209.
9 - 17
9.
MAINTENANCE FUNCTION
The following shows the details of the error item numbers and default for priorities which is
set in special registers SD207 to SD209.
Order of
priority
Error Item
No.
Description
Remark
(Hex.)
AC DOWN
Fuse blown
SP.UNIT ERROR
OPERATION ERROR
Operation error
LINK PARA.ERROR
SFCP OPE.ERROR
SFCP EXE.ERROR
ICM.OPE.ERROR
FILE OPE.ERROR
EXTEND INST.ERROR
PRG.TIME OVER
CHK instruction
Annunciator
BATTERY ERR.
10
Clock data
9 - 18
9.
MAINTENANCE FUNCTION
POINT
(1) When LED indicator is left OFF for the error occurrence above, set the factor number
area to 0, which stores the applicable factor numbers from SD207 to SD209.
Example:
To set the ERROR LED to remain OFF when a fuse blown error occurs, set
"0" in the item number setting area whose item number is "2".
Since the item number "2" is not set, the ERROR LED remains OFF even if
a fuse blown error is detected.The ERROR LED remains OFF even if
another error whose error item number is "2" is detected (I/O module verify
error, special function module verify error).
(2) Even if the LED is set to remain OFF, SM0 (the diagnostics error flag) is still turned
ON, SM1 (the self-diagnostics error flag) is still turned ON, and the error code is
stored in SD0 (CPU diagnosis error register).
9 - 19
10
OTHER FUNCTIONS
Latch function
Description
Performs a program at fixed intervals regardless of the
actual program scan time.
Retains the device data when resetting the CPU module
while the programmable controller power is OFF.
Reference
Section 10.2
Section 10.3
Section 10.4
operation).
Clock function
Section 10.5
Remote operation
Section 10.6
Remote RUN/STOP
Section 10.6.1
Remote STEP-RUN
Section 10.6.2
Remote PAUSE
Section 10.6.3
Remote RESET
Section 10.6.4
Section 10.6.5
operation and CPU module RUN/ RUN/STOP key switch setting and operation when
STOP key switch
Terminal setting
Section 10.6.6
Section 10.7
Message display
Section 10.7.1
Section 10.7.2
Section 10.8
For details of GPP function operation, refer to the GX Developer Operating Manual or the
Type SW IVD-GPPQ GPP Software package Operating Manual (Online).
For details of the Q6PU operation, refer to the Q6PU Operating Manual.
10 - 1
Constant scan
In the Q2ASCPU, the scan time varies since the processing time differs depend on
the execution status of the instructions used in the sequence program.
Constant scan is a function whereby the sequence program is repeatedly performed
while maintaining constant scan time.
Scan time when the constant scan time is set to 100ms while performing multiple programs
When the low-speed execution type program is used, either this constant scan function or
a low-speed program execution time has to be set.
(For details, refer to the QnACPU Programming Manual (Fundamentals).)
10 - 2
(2)
(b) Set constant scan time that is longer than the maximum scan time of the
sequence program. If the scan time of the sequence program is longer than the
set value for constant scan time, the Q2ASCPU detects an error code (SD0 =
5010), and the sequence program is performed in the own scan time, ignoring
the constant scan time setting.
Make sure that the constant scan time setting is shorter than the set time for
WDT (Watchdog timer). If it is longer than the set time for WDT, the Q2ASCPU
detects a WDT error and the program execution is stopped.
Set the constant scan time within the following range.
Setting time for WDT
Fig. 10.2 Operation when scan time is longer than constant scan setting time
(c) Sequence program processing is suspended in the wait time between the END
processing of the sequence program and the start of the next scan.
However, if an interrupt factor occurs after the execution of END processing, or if
there is a low-speed execution type program, the interrupt program or the lowspeed execution type program is performed.
10 - 3
The low-speed execution type program is divided and performed within surplus
time. Therefore, if one constant scan ends while performing the instruction takes
long processing time, the constant scan is completed after finishing the
processing of the instruction during execution. The time extended to complete
the execution of the instruction is the constant scan error. For details of the
instruction processing time, refer to the QCPU (Q mode)/QnACPU Programming
Manual (Common Instructions).
10 - 4
(2)
Even if a latch designation is set for a device, the device will not be latched if a
local device designation or device initial value designation is made.
(b) The latch range is set on the "Device" in the parameter mode of GPP function.
In latch range setting, it is possible to set a range within which the latch clear key
is effective (Latch (1) Start) and a range within which the key is not effective
(Latch (2) Start). For details on device latch ranges for each device, refer to the
QnACPU Programming Manual (Fundamentals).
POINT
The devices data in the latch range are retained by the battery (A6BAT) installed
in the CPU module.
(1) Even if a sequence program is written to a memory card and ROM operation
is performed, the battery is required for the latch function.
(2) If the battery connector is disconnected from the CPU module connector while
the programmable controller power is OFF, the devices data in the latch range
is lost.
10 - 5
(3)
10 - 6
10.4 Setting of the Output (Y) Status When Switching from STOP to RUN
When the RUN or other status is changed to the STOP status, the CPU module stores the
output (Y) in the RUN status into the programmable controller and turns all outputs (Y)
OFF.
In this function, whether to re-output the outputs (Y) when switching from STOP to RUN or
to output them after an operation can be set in the "PC system" in the parameter mode of
GPP function .
Fig. 10.3 Processing when a programmable controller is switched from STOP to RUN
10 - 7
The CPU module system uses the clock data for a breakdown history.When using
a CPU module, be sure to set the correct time first.
(1)
Clock data
The clock data is composed of the year, month, day, hour, minute, second, and day of
the week used by the clock element in the programmable controller CPU, as shown
below.
Data name
Description
Year
Mon
1 to 12
Sun
Hour
0 to 23 (24-hour system)
Minute
0 to 59
Second
0 to 59
(2)
Sunday
Monday
Tuesday
Wednesday
Thursday
Friday
Saturday
Accuracy
The accuracy of the clock function depends on the ambient temperature, as shown
below.
Ambient Temperature
+ 25
-1.0 to + 5.2s(TYP.+2.2S)
+ 55
-7.3 to + 2.5s(TYP.-1.9S)
10 - 8
(3)
POINT
(1) Clock data is not written to clock elements in advance.Write clock data to the
clock elements before using the Q2ASCPU.
(2) Even if partly changing the clock data, rewrite all data to the clock elements.
(3) If the nonexistent time is written to the clock elements, normal clock operation
is impossible.
Example
Setting "13" to the month.
10 - 9
(4)
Name
Description
Writes clock data to the special registers (SD210 to
SD213) and performs clock operation.
SM210
SM211
SM213
to SD213.
When SM213 is ON, the clock data is read to SD210 to
SD213 after execution of the END instruction.
10 - 10
Name
Description
The year and month are recorded as follows.The year
data is the last two digits of the year.
SD210
Clock data
(year, month)
Clock data
(day, hour)
Clock data
(minute, second)
SD213
Clock data
10 - 11
Sun Mon
Fri
Sat
(2)
(3)
10 - 12
2) When the remote RUN contact is ON, the CPU module is in STOP state.
Fig. 10.4 Time chart for RUN/STOP switching with remote RUN contact
10 - 13
Step 0
END
ON
GPP function
Serial
communication
module
Remote STOP
command
OFF
END
0
ON
OFF
Remote RUN
command
RUN
STOP
Programmable controller
CPU RUN/STOP status
STOP status
Fig. 10.5 Time chart for remote RUN/STOP switching with GPP function or a serial
communication module
(4)
Precautions
(a) Since the STOP state has a priority in the Q2ASCPU, pay attention to the
following points.
1) In the Q2ASCPU, if remote STOP is performed from any one of remote RUN
contact, GPP function, serial communication module, etc., the QnACPU will
be STOP.
2) In order to set the Q2ASCPU to RUN again after it has been set to STOP by
remote STOP, all external factors which set remote STOP (Remote RUN
contact, GPP function, serial communication module, etc.) have to be set to
RUN.
REMARK
The RUN/STOP status is defined as follows.
RUN status.............. Status in which the sequence program is repeatedly
performed from step 0 to the END instruction.
STOP status........... Status in which the sequence program operation is stopped
and all outputs (Y) are OFF.
10 - 14
(2)
10 - 15
(2)
END
0
END
0
END
END
0
OFF
ON
OFF
ON
SM204
RUN/PAUSE
status
OFF
RUN
ON when PAUSE
condition is satisfied
PAUSE
PAUSE status
Fig. 10.6 Time chart for PAUSE with remote PAUSE contact
REMARK
When the remote RUN contact is made same as the remote PAUSE contact, the
remote PAUSE contact will be invalid.
10 - 16
0
END
Remote PAUSE
command
OFF
Remote RUN
command
OFF
SM204
RUN/STOP status
0
END
ON
ON
ON
OFF
RUN
Comes ON
when the
PAUSE
condition
is satisfied
PAUSE
PAUSE status
POINT
To arrange for outputs (Y) to be turned ON or OFF when the PAUSE status is
established, provide an interlock using the PAUSE state contact (SM204).
10 - 17
POINT
(2)
10 - 18
Remote latch clear cannot be performed when the CPU module is in RUN.
(1)
(2)
1.
2.
According to the device latch ranges set in "Device" in parameter mode, there
are ranges within which latch clear is valid and ranges within which it is not
valid.Remote latch clear is only valid for devices set in the range for which
"Latch clear valid" is set.
When remote latch clear is performed, devices that are not latched are also
cleared.
10 - 19
10.6.6 Relationship between remote operation and CPU module RUN/STOP key switch
Using the combination of the remote operation and the RUN/STOP key switch of the CPU
module explained in Section 10.6.1 through Section 10.6.5, the operating status of the
Q2ASCPU is determined as follows.
Remote Operation
Key switch
RUN*1
STEP-RUN
STOP
PAUSE*2
RUN
RUN
STEP-RUN
STOP
PAUSE
STOP
STOP
STOP
STOP
STOP
*1
*2
*3
*4
RESET*3
Latch Clear
Operation is not
Operation is not
possible.*4
possible.*4
RESET
Latch Clear
If performed using a remote RUN contact, beforehand set "RUN-PAUSE contacts" in the PLC
system in parameter mode.
If performed using a remote PAUSE contact, beforehand set "RUN-PAUSE contacts" in the
PLC system in parameter mode.Furthermore, the remote PAUSE enable coil (SM206) has to
be turned ON in advance.
"Remote reset" field in the PLC system has to be set to "Allow"in parameter mode.
The operation status can be RESET if the CPU module is stopped by remote operation.
When the RUN/STOP key switch is set to RUN and multiple remote operation requests are
received, the CPU module first performs the operation with the highest priority.
Remote
operation
RUN
STEP-RUN
STOP
PAUSE
RESET
Latch Clear
Order of priority
4)
3)
1)
2)
10 - 20
List
MSG "TOSOU LINE READY"
Display
10 - 21
0 LD X0
1 MSG "TOSOU LINE READY"
Q6PU
10 - 22
Special relay
Number
Name
Description
When this relay turns from OFF to ON, the module access interval time for the
SM551
special function module specified in special register SD550 is read into special
registers SD551 to SD552.
ON : Read
OFF : Ignored
(2)
Number
Special register
Name
Description
Set the I/O number of the module whose access interval time is to be measured.
SD550
Service interval
measurement module
Set the I/O number of the peripheral device connected to the RS-422 interface of
the CPU module to FFFFH.
Also set the I/O number of the upper 2 digits in the 3-digit representation.
When SM551 is turned ON, it stores the interval time for access from the module
specified at SD550.
SD551: 1ms units (Range: 0 to 65535)
SD551 to SD552
Program example:
Program for reading the module access interval time of the special function module at
X/Y160.
POINT
To read the access interval time for access from GPP function at another station in
the network, set the I/O number of the network module.
10 - 23
REMARK
The module access interval includes a transient request interval such as a monitor,
a test and a program read/write.
The access interval via cyclic communication from a network module or a data link
module is not stored.
10 - 24
11
Function
Refer to
PLC name
Section 11.2
Drive title
Section 11.3
File title
Section 11.4
Device comment
Section 11.5
Statements/notes
Initial device value
comment
Section 11.6
Section 11.7
For details on the setting method for each function, refer to the GX Developer Operating
Manual or SW IVD-GPPQ Operating Manual (Offline).
11 - 1
Setting
Set a label for the CPU module.
Setting range
Default value
Up to 10
characters
No setting
Comment
11 - 2
Up to 64
characters
POINT
Note that creating a drive title uses an area equivalent to one file in each memory.
11 - 3
11 - 4
POINT
(1)
11 - 5
(2)
When using comments with application instructions (LEDC, PRC, etc.), if a device
comment file has been written to the CPU module, enable one of the options in the
parameter setting for the device comment file.
This setting is made at "2. Comment file used in a command" on the "PLC file" screen
in the parameter mode of GPP function.
POINT
(1) When using the QCDSET instruction, note the following points.
(a) When the above 1) or 2) has been set, the file set with the QCDSET
instruction is valid for all program files.
(b) When 3) is set, the file set with the QCDSET instruction is valid only for
the program file for which the QCDSET instruction is executed.
(2) Even if the file set with the parameter does not exist in the specified drive, no
CPU module error is generated. Since no file exists, however, the CPU
module does not display any comments.
11 - 6
11.6 Statements/Notes
Statements and notes are assigned to each program step, or to P or I pointers, in order to
facilitate program reading.
(1)
Statements or notes are set on the "Pointer statement", "Statement", or "Note" screen
displayed from the edit menu in the documentation mode of GPP function.
(2)
11 - 7
11 - 8
12
When dividing a program data into multiple programs, set "execution type" for each
program in program setting in the parameter mode of GPP function.
The Q2ASCPU executes each execution type program in order of setting.
There are four executions types: "Initial execution type", "Scan execution type", "Lowspeed execution type", and "Standby type".
Initial execution type
12 - 1
Low-speed execution type : Program that is executed only in the surplus scan time
after execution of a scan execution type program in the
constant scan setting, or only when the low-speed type
program execution time is set.
(Refer to Section 12.1.3)
Standby type
12 - 2
The following shows the flow of operation processing when a programmable controller is
powered ON, when a CPU module is reset, or when the RUN/STOP key switch of a CPU
module is switched from STOP to RUN.
POINT
12 - 3
Definition
(a) The initial execution type program is a program executed only once when a
programmable controller is powered ON, when a CPU module is reset, or when
the RUN/STOP key switch of the CPU module is switched from STOP to RUN.
(b) The execution type is set to "Init" in program setting in the parameter mode of
GPP function.
(c) Initial execution type programs can be used for applications such as the initial
processing for a special function module, where once the program has been
executed, it need not be executed from the next scan.*
(2)
12 - 4
(3)
END processing
When execution of all initial execution type programs is completed, END processing
is performed and a scan execution type program is executed from the next scan.
POINT
12 - 5
(4)
Example:
If "3" and "400" are stored in SD522 and SD523 respectively, the initial scan time
is 3.4ms.
*1
(5)
The accuracy of each scan time stored in the special registers is 0.1ms. Note that, even if a
watchdog timer (WDT) reset instruction is executed in the sequence program, measurement
of the initial scan time is continued.
POINT
12 - 6
Definition
(a) The scan execution type program is a program that is executed once for every
scan, starting from the next scan after execution of the initial execution type
program.
(b) The execution type is set to "Scan" in program setting in the parameter mode of
GPP function.
(2)
(3)
END processing
When all the scan execution type programs have been executed, END processing is
performed and then the first scan execution type program is executed again.
By inserting a COM instruction at the end of a scan execution type program, END
processing (general data processing, link refresh) can be executed for each program.
STOP
Power ON/RESET
RUN
RUN
1st scan
2nd scan
3rd scan
4th scan
END processing
Initial execution type programs
0
END
END
END
END
END
END
END
Scan time
(4)
REMARK
*1
(1) For the index register processing in the case where an interrupt program is
executed during execution of a scan execution type program, refer to the
QnACPU Programming Manual (Fundamentals).
12 - 7
(5)
Scan time
The scan time is a total of the scan execution type program execution time, the
END processing time, and either the low-speed program execution time or the
constant scan waiting time.*1
When more than one scan execution type program is executed, "the execution
time of the scan execution type program" is the time required for completing
execution of all these programs.
*1
The Q2ASCPU measures the present, minimum, and maximum values for the
scan time and stores them in special registers SD520, SD521, and SD524 to
SD527.*2
The scan time can be checked by monitoring these special registers.
Example:If "3" and "400" are stored in SD520 and SD521 respectively, the scan
time is 3.4ms.
*2
(6)
The accuracy of each scan time stored in the special registers is 0.1ms. Note that, even if
the watchdog timer (WDT) reset instruction is executed in the sequence program,
measurement of each scan time is continued.
12 - 8
Definition
(a) The low-speed execution type program is a program that is executed only in the
surplus time of constant scan operation or in the preset low-speed execution
program execution time.
When using a fixed scan time to give priority to control accuracy, set the
constant scan time in "PLC RAS" in the GPP function's parameter mode.
(Setting range: 5 to 2000ms; Unit: 5ms)
To ensure the execution time for low-speed execution type programs in each
scan and to make these programs operate properly, set the low-speed
program execution time in "PLC RAS" in the parameter mode.
(Setting range: 1 to 2000ms; Unit: 1ms)
In order to execute low-speed execution type programs, either the constant
scan time or the low-speed program execution time must be set.
(b) Set "Slow" as the execution type in program setting in the parameter mode.
(c) This execution type is used for programs that do not have to be executed every
scan, such as a program for printer output.
(2)
12 - 9
(3)
Execution time for low-speed execution type program executed in one scan
(a) When operation of all low-speed execution type programs is completed within
one scan and there is surplus time, the subsequent processing varies depending
on the setting status of special relay SM330 and the execution condition for the
low-speed execution type programs.
Non-synchronization
method (SM330 = OFF)
Synchronization method
(SM330 = ON)
: Even if there is surplus time, operation of a lowspeed execution type program is not executed
and another operation starts from the next
scan.
Operation method
of low-speed execution
type program
method
Synchronization method
*2
*3
status of
SM330
Non-synchronization
*1
Setting
OFF
ON
Re-executes low-speed
*1
time occurred*3
program operation.*4
When the constant scan time is set, the low-speed execution type program is repeatedly
executed for the surplus time of the constant scan.
Accordingly, the execution time of the low-speed execution type program is different at each
scan. If surplus time in constant scan is less than 2ms, the low-speed execution type program
is not executable.
When using a low-speed execution type program, set a proper constant scan time so that
surplus time will be 2ms or longer.
When the low-speed program execution time is set, a low-speed execution type program is
repeatedly executed for the set time duration.
Accordingly, the scan time is different at each scan.
When the constant scan time is set, surplus time after completion of the low-speed END
processing is used as wait time. When the set constant scan time is reached, the scan
execution type program is executed.
Wait time for constant scan
= (Set constant scan time) - (Scan time) - (Low-speed scan time)
*4
12 - 10
(b) If the low-speed execution type program is not processed within surplus time of
the constant scan time or within the low-speed program execution time, the
program execution is interrupted and is resumed in the next scan.
POINT
(1) For the index register processing in the case where a scan execution type
program is switched to a low-speed execution type program, refer to the
QnACPU Programming Manual (Fundamentals).
(2) For the index register processing in the case where an interrupt program is
executed during execution of a low-speed execution type program, refer to the
QnACPU Programming Manual (Fundamentals).
(3) Set a proper low-speed program execution time so that the value obtained by
adding it to the scan time is smaller than the set WDT value.
(4) The COM instruction cannot be used in the low-speed program.
(5) When "Constant scan time" and "Low-speed program execution time" are set,
PRG. TIME OVER (Error code: 5010) occurs in the case of (Surplus time of
constant scan)
(Low-speed program execution time)
Execute the low-speed execution type program either in the constant scan
time or in low-speed program execution time.
12 - 11
12 - 12
12 - 13
(4)
END processing
When all of the low-speed execution type program has been completed, low-speed
END processing is executed.
The following processing is performed in low-speed END processing:
Setting of special relays/special registers for the low-speed execution type
program
Writing the low-speed execution type program during RUN
Measurement of the low-speed scan time
Resetting the watchdog timer for the low-speed execution type program
When low-speed END processing is completed, the low-speed execution type
program is executed again from the beginning.
POINT
In execution of a low-speed execution type program, the constant scan time may
be extended by a time equivalent to the maximum processing time for the
instructions executed plus the low-speed END processing time.
(5)
Example:
If "3" and "400" are stored in SD528 and SD529 respectively, the scan time is
3.4ms.
*1
The accuracy of each scan time stored in the special registers is 0.1ms. Note that, even if a
watchdog timer (WDT) reset instruction is executed in the sequence program, measurement
of each scan time is continued.
12 - 14
(6)
12 - 15
Definition
(a) The standby type program is a program that is executed only in response to an
execution request.
(b) The standby type program has the following applications:
1) Program library
Subroutine programs and interrupt programs are set as standby type
programs and controlled separately from the main program.
2) Set-up of programs
The main routine program is registered to the standby type program and
programs required for control are changed to the scan execution type
programs. Programs not used for control are changed to the standby type
programs.
(2)
Program library
(a) Library creation of program
1) Program library is used to control subroutine programs and interrupt
programs separately from the main routine program.
It is possible to create multiple subroutine programs and interrupt programs
as one standby type program.
12 - 16
POINT
(1) Timers are not to be used in standby type programs because they update
present values and turn ON/OFF the contacts when the OUT T instruction is
executed.
(2) When setting a subroutine program as a standby type program, use a common
pointer.
Standby type programs that use local pointers are not executable.
For details on common and local pointers, refer to the QnACPU Programming
Manual (Fundamentals).
(b) When grouping several subroutine programs into one
1) Create subroutine programs in order starting from step 0 in the standby type
program.
An END instruction is required at the end of the subroutine programs.
2) Since there are no restrictions on the order of creation of subroutine
programs, there is no need to arrange pointers in ascending order of pointer
numbers when creating multiple subroutine programs.
3) Use common pointers. *
Subroutine programs using common pointers can be called from all the
programs that are being executed by the Q2ASCPU.
Q2ASCPU
Program A
Memory card/
internal RAM
Main routine program
Write
Program B
P500
Y10
Program A
Write
RET
P508
Y11
RET
Y12
P501
RET
END
Use a common pointer.*
(Pointers do not have to be set in ascending order.)
REMARK
*
For details on common pointers, refer to the QnACPU Programming Manual (Fundamentals).
12 - 17
Program A
IC Memory card/
internal RAM
Program B
I0
Y10
Program A
Write
RET
Interrupt
program
I32
Y11
RET
Y12
I28
RET
END
Use an interrupt pointer.
(Pointers do not have to be set in ascending order.)
REMARK
For details on interrupt pointers, refer to the QnACPU Programming Manual
(Fundamentals).
12 - 18
(3)
Set-up of programs
(a) Programs corresponding to all of the systems can be created in advance, and
thereby necessary programs only can be executed.
Programs set as the standby type with parameters can be changed to the scan
type programs in the sequence program for execution.
Use the following instructions to change the execution type in the Q2ASCPU:
1) PSCAN instruction : Changes the program type from the standby type to the
scan execution type.
2) PLOW instruction : Changes the program type from the standby type to the
low-speed execution type.
3) PSTOP instruction : Changes the program type from the scan execution/lowspeed execution type to the standby type.
(b) The following methods are available to switch programs for execution:
1) When selecting programs to be executed in a control program:
Defining the scan execution type program as the control program, the
QnACPU switches between the standby type program and the scan
execution type program according to the set conditions to control the
program to be executed.
The following shows how the excution types of standby programs, "ABC,"
"DEF," "GHI" and "JKL" are changed in the control program.
12 - 19
2) When changing the execution type of another program from the scan
execution type program:
In the scan execution type program in execution, the type of the program to
be executed next is changed from the standby type to the scan execution
type.
The following shows the operation that the QnACPU switches the standby
type program "DEF" to the scan execution type, and the scan execution
program "ABC" to the standby type program when M0 in program "ABC"
turns on.
[Before execution of PSCAN and PSTOP instructions]
12 - 20
(c) The program execution type is changed by the PSCAN or PSTOP instruction in
the END processing.
Therefore, it is not changed during program execution.
REMARK
*
The "GHI" and "DEF" programs are executed in the sequence set with parameters in the
program setting.
12 - 21
STOP
At RESET
RUN
Status*1
: Executed
*1
: Not executed
Indicates the case that the CPU enters RUN status without being reset after changing a
parameter or program in STOP status.
(The RUN/STOP key switch is operated as follows: STOP
flickering.)
STOP
RUN
(RUN LED is
RUN.)
Note that the instructions for conversion into pulse (PLS, P) may not function properly since
the previous information may not be retained depending on the program change (write during
RUN in STOP status, or write to PLC).
12 - 22
(1) If the constant scan function (see Section 10.2) is set, the END processing
time result is retained during the period between completion of END
processing and start of the next scan.
(2) If a low-speed execution type program (see Section 12.1.3) is executed, lowspeed END processing is performed separately from normal END processing.
In low-speed END processing, the special relays and special registers for lowspeed execution programs are set.
12 - 23
(2)
(3)
(4)
12 - 24
(5)
RUN/STOP state
Operation processing of
sequence program
RUN
STOP
Data memory
External output
Depends on the
STOP
RUN
Remark
M, L, S, T, C, D
RUN.
Y
OS saves the output
status, and sets all the
output points to OFF.
Depends on the
output mode set by
the parameter for
STOP
RUN.
POINT
The Q2ASCPU executes the following processing in any of RUN state, STOP
state, or PAUSE status.
Refresh processing of I/O modules
Data communication with peripheral devices, computer link modules, and/or
serial communication modules.
Link refresh processing.
Thus, even in the STOP state or PAUSE state, I/O monitoring and test operations
using a peripheral device, reading/writing from computer link modules or serial
communication modules, and communication with other stations via MELSECNET
can be performed.
12 - 25
When an instantaneous power failure shorter than the allowable momentary power
failure period occurred:
(a) When an instantaneous power failure occurs, the output statuses are held and
the operation processing is suspended after the name of the currently accessing
file and error history have been stored.
(The timer count continues.)
(b) If there is an SFC continuous operation designation, system save processing is
executed.
(c) When power is restored, the operation processing will be continued.
(d) While the operation is interrupted due to an instantaneous power failure,
measurement of the watchdog timer (WDT) continues. For example, if 200ms is
set for the WDT parameter setting, power failure of 15ms in the scan time of
190ms will cause a watchdog timer error.
Occurrence of
instantaneous
power failure
END 0
Power supply
recovered
END
END
(2)
When power failure longer than the allowable momentary power failure period
occurred:
The Q2ASCPU starts from the first.
The operation processing is the same as that performed at programmable controller
power-up or at CPU module reset by the RUN/STOP key switch.
12 - 26
specification)*1
Data in the memory card
Data of latch-specified devices(Latch clear key enabled)
Data of latch-specified devices(Latch clear key disabled)
File register data
Local device data
Fault history data
*1
For the boot specification, refer to the QnACPU Programming Manual (Fundamentals).
Data given in (c) and (g) are cleared by latch clear operation using the RUN/STOP key
switch (Refer to Section 15.3.) or by remote latch clear operation from GPP function (Refer
to Section 10.6.5.)
The latch range is specified for each device on the "Device" screen in the parameter mode
of GPP function. There are the following two latch range setting options.
1) Latch clear key enabled : Used to set a latch range which can be cleared by
the latch clear operation using the RUN/STOP key
switch.
2) Latch clear key disabled: Used to set a latch range which cannot be cleared
by the latch clear operation using the RUN/STOP
key switch.
Devices for which the latch clear key is disabled can be cleared by an instruction or by the
clear operation of GPP function.
1) Clearing by an instruction
For details on device latch ranges, refer to the QnACPU Programming Manual
(Fundamentals).
For details on the operation method of GPP function, refer to the GX Developer Operating
Manual or Type SW IVD-GPPQ Software Package Operating Manual (Online)/(Offline).
POINT
To clear file registers or local devices, reset them with the RST instruction or
transfer KO with the MOV instruction.
12 - 27
MEMO
12 - 28
13
PARAMETER LIST
The parameters set for the Q2ASCPU are listed in the table below.
For details on each parameter, refer to the section or reference manual indicated.
Item
Parameter No.
Description
module.
This setting does not affect CPU module operation.
Label
0000H
Comment
0001H
PLC system
Make various settings that are required for the CPU module
system.
Low-speed timer
1000H
RUN-PAUSE contacts
1000H
Remote reset
1002H
1003H
1005H
1006H
1007H
Output at STOP
RUN
Set the number of modules that are processed in one general data
processing.
Set the number of points occupied by empty slots.
Interrupt counter
System interrupt
1008H
Fixed scan interval
PLC file
Set the first interrupt counter number, and the fixed scan interval for
the interrupt pointer.
File register
1100H
1101H
1102H
1103H
13 - 1
Setting
Reference Section/Reference Manual
Default value
Setting range
No setting
Up to 10 characters
No setting
Up to 64 characters
100ms
10ms
No setting
X0 to X1FFF
Disabled
Enabled/disabled
Section 10.6.4
Before operation
Section 10.4
No setting
P0 to P4095
1 module
1 to 6 modules
Section 6.3
16 points
Section 5.3
No setting
C0 to C65535
Section 11.2
I28
100ms
I29
40ms
I30
20ms
I31
10ms
Not used
Not used
Section 11.5
Not used
Not used
Use the same file name as the program.
13 - 2
Item
Device
Parameter No.
Description
Set the number of points, latch range, etc., for each device.
Device points
2000H
2001H
Set the latch range for which latch clear key operation is enabled.
2002H
Set the latch range for which latch clear key operation is disabled.
Local device
2003H
PLC RAS
WDT setting
Initial execution
WDT setup
3000H
Error check
3001H
3002H
Constant scan
3003H
monitoring time
Low speed execution
monitoring time
Set the operation mode in which the CPU module enters when an
error is detected.
Set the constant scan time.
Display F No.
Annunciator
display mode
Comment display
3004H
Time of occurrence
Breakdown history
3005H
3006H
13 - 3
Setting
Reference Section/Reference Manual
Default value
Setting range
8k points
8k points
8k points
8k points
8k points
2k points
SB
2k points
2k points
8k points
2k points
ST
C
0k point
1k point
12k points
8k points
SW
2k points
No setting
Section 10.3
No setting
Section 10.3
No setting
200ms
Section 9.2
No setting
Section 12.1.1
No setting
Section 12.1.3
Checked
Error checked
Section 9.3
Stop
Stop/Continue
Section 9.3
No setting
Section 10.2
Displayed
Displayed/Not displayed
Not displayed
Displayed/Not displayed
Not displayed
Displayed/Not displayed
Section 9.4
No setting
13 - 4
Section 9.8.2
Item
Parameter No.
I/O Assign
Description
Classification
Number of points
Slot setting
4000H
Set the module type, number of points, head I/O No., etc.
Start XY
Model Name
Set model names of a power supply module and/or extension
cables.
4001H
Extension cable
MELSECNET/Ethernet setting
Unit count
Valid module for
access to other station
Inter-device transfer
parameters
MELSECNET (II)
and MELSECNET/
10 network setting
5000H
5001H
5002H
5003H
Network setting
5NM0H
Set link parameters for the MELSECNET (II) data link system,
network parameters for the MELSECNET/10 network system or
Network refresh
parameter
Station inherent
parameter
I/O assignment
setting
Routing parameter
Common parameter
Ethernet network
5NM1H
Ethernet parameters.
5NM2H
5NM3H
5NM4H
Group No.
9N00H
IP address
13 - 5
Setting
Reference Section/Reference Manual
Default value
Setting range
No setting
Empty/Input/Output/Special
No setting
No setting
No setting
Up to 16 characters
No setting
Up to 16 characters
Section 5.3
Section 5.3
Reference Manual
Network type
Network type
0H
MELSECNET/10 (Default)
7H
1H
8H
2H
9H
3H
4H
5H
6H
13 - 6
Network type
Item
Parameter No.
MELSECNET/MINI setting
6000H
Description
communication errors
FROM/TO instruction
600NH*
access priority
Receive data clear
at communication error
Faulty station detection
bit data
Error No.
MINI link operation
when CPU stopped
Circuit error check
Perform various settings required when multiple programs are
Supplementary settings
used.
7000H
Program setting
Boot file setting
SFC
8002H
Start condition
8003H
8005H
Acknowledge XY assignment
N means the number of the master module counting from the first. (N: 1 to 8)
13 - 7
Setting
Reference Section/Reference Manual
Default value
Setting range
0 to 8
No setting
MINIS3
MINIS3/MINI( ) stations
X1000 to 200H
Y1000 to 200H
5 times
0 to 32 times
CPU
CPU/Link
Clear
Clear/Hold
No setting
No setting
D, W, T, ST, C, R, ZR
Stop
Continue/Stop
Latch data
No setting
Program name/Scan/Low-speed/Initial/Standby
No setting
Chapter 7
Manual (SFC)
(SFC)
SW
Manual (Offline)
13 - 8
Item
Network parametars Setting the CC-Link
Number of CC-Link
Parameter No
C000H
Description
Make the settings for automatic refresh of the CC-Link system.
Set the number of CC-Link master modules to be used.
CNM2H
Module type
Receiving data batch refresh
bit device
(Input data)
Transmission data batch
refresh bit device
(Output data)
Receiving data batch refresh
word device
CNM1H
detailed
refresh device
settings
special relay
CNM2H
Station type
Station
information
setting
13 - 9
Setting
Default value
Setting range
1 to 8
0000H to 0FE0H
T: Stand-by station
X,M,L,B,T,ST,C,D,W,R,ZR
Y,M,L,B,T,ST,C,D,W,R,ZR
M,L,B,T,ST,C,D,W,R,ZR
M,L,B,T,ST,C,D,W,R,ZR
M,L,B,T,ST,C,D,W,R,ZR
T,ST,C,D,W,R,ZR
1 to 7
1 to 10
Not reserved/Reserved
Continue/Stop
Synchronization/Non-synchronization
Chapter 7
1 to 100
(0 is invalid.)
Remote I/O station/Remote device station
of invalid station
*
Network type
0H
Master station)
4H
1H
Local station)
5H
2H
6H
3H
MELSECNET/10
(Remote master station)
13 - 10
14
(112k bytes)
(240k bytes)
(112k bytes)
Q2ASHCPU-S1............60k steps
(240k bytes)
14 - 1
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
To execute programs of the maximum number of steps available for the Q2ASCPU.
When a program of the maximum capacity is stored in the built-in RAM, the
parameter files and initial device values must be stored in a memory card.
They will be read-only in programs if they are set in the ROM area of the memory card.
Can only be set in the RAM area of the memory card.
14 - 2
Drive title
64
Keyword
72
Parameters*3
330
Boot file
(Number of files
Sequence program*3
(Number of steps
18) + 67
4) + 122
10250
a + 40
b + 10 (Quotient of (No. of devices / 256) is substituted for a and the remainder for b.)
Setting with SW
IVD-GPPQ
Although the size varies depending on EMS capacity, it is equivalent to or less than the size obtained in the above DX
Developer case.
Initial device value*3
2) + (device types*1
File register
Local device
(72 + (6
44) + 66
2 bytes
Round-up
Simulation data
Rounded up
362 + (No. of word device points + No. of bit device points)
2 + (No. of
8) + 352
Rounded up
Program Trace Data
54
*1
*2
*3
*4
*5
14 - 3
POINT
Note that the capacity may be rounded up as follws depending on the memory
area used for storage:
Built-in RAM.................. 4096 bytes (1k step) units
Memory card................. 512 bytes units
Note that, when a file is transferred from the memory card to the built-in RAM in
boot operation, the reserved capacity is changed after transfer.
14 - 4
15
15.1 SPECIFICATIONS
The general specification common to various modules is shown.
Specifications
Item
Specifications
Operating ambient
0 to 55
temperature
Storage ambient
-20 to 75
temperature
Operating ambient humidity
10 to 90 % RH, No-condensing
10 to 90 % RH, No-condensing
Under
Conforming to
Vibration resistance
JIS B 3502,
Frequency
Acceleration
10 to 57Hz
0.075mm
(0.003 inch)
intermittent
vibration
57 to 150Hz
9.8m/s
10 to 57Hz
IEC 61131-2
Under
57 to 150Hz
Sweep count
10 times each
in X, Y, Z
directions
0.035mm
(0.001inch)
continuous
vibration
Amplitude
4.9m/s
Conforming to JIS B 3502, IEC 61131-2 (147m/s2 , 3 times in each of 3 directions XYZ)
Shock resistance
Operation ambiance
No corrosive gasses
Operating elevation*3
Installation location
Control panel
Overvoltage category*1
II or lower
Pollution degree*2
2 or lower
Equipment category
Class I
*1
*2
*3
This indicates that the equipment is assumed to be connected to which power distributer in
the area from the public electrical power distribution network to machinery in the premises.
Category II applies to equipment to which electrical power is supplied from fixed facilities.
The surge voltage withstand level for up to the rated voltage of 300V is 2500V.
This index indicates the degree of conductive material generation in the environment where
the equipment is used.
In Pollution degree 2, only non-conductive pollution occurs. Occasionally, however, temporary
conductivity caused by condensation can be expected.
Do not use or store the programmable controller in the environment where the pressure is
higher than the atmospheric pressure at sea level. Otherwise, malfunction may result.
To use the programmable controller in high-pressure environment, please contact your local
Mitsubishi representative.
15 - 1
Q2ASHCPU
1)
2)
3)
4)
5)
STOP
6)
L.CLR
RESET
RUN
RESET
7)
9)
8)
12)
10)
14)
13)
11)
No.
Name
Application
Indicates the operating status of the CPU module.
1)
RUN LED
ON:
OFF:
Operating with the RUN/STOP key switch set to RUN or STEP RUN.
Stopped with the RUN/STOP key switch set to STOP, PAUSE, or STEP RUN.
Or, an error that stops operation was detected.
Flickering:
The RUN/STOP key switch was shifted from STOP to RUN after writing a program in the STOP state.
The CPU module is not in the RUN state.To actually put the CPU module in the RUN state, either move
the switch one more time from "RUN"
"STOP"
A self-diagnostics error that does not stop operation, other than a battery error, has been detected.
(When the parameter setting is made for operation to continue when an error occurs.)
Normal
An error that stops operation has been detected.
USER LED
ON:
OFF:
Flickering:
An error has been detected by the CHK instruction, or an annunciator F has come ON.
Normal
When latch clear is performed.
4)
BAT.ALARM LED
ON:
OFF:
A battery error occurred due to low battery voltage in the CPU module or memory card.
Normal
5)
BOOT LED
ON:
OFF:
2)
ERROR LED
3)
L.CLR:
Clears all data in the latch area (to "OFF" or "0") which is set with parameters.
Clears sampling trace and status latch registrations.
RESET: Resets the hardware. Resets and initializes operation when an operation error occurred.
15 - 2
No.
Name
Application
7)
Battery (A6BAT)
Backup battery for the built-in RAM and the power failure compensation function.
8)
9)
Used to eject the memory card from the CPU module.(Refer to Section 18.7)
10)
Used to enable/disable memory card installation or removal while the power is ON.Factory-set to OFF.
11)
ON:
OFF:
Refer to Section 15.3 (3) and (4) for installation or removal of a memory card.
Settings required to operate the CPU module are made.All switches are set to OFF before shipping.
SW5:
ON:
Boot operation
OFF:
ON
5
4
3
12)
Memory card
Built-in RAM
RAM
ROM
SW4
OFF
ON
OFF
SW3
OFF
OFF
ON
SW2
OFF
OFF
OFF
SW1:
System protectProhibition of all writing and control directions to the CPU module.
ON:
OFF:
Settings required to operate the CPU module are made.All switches are set to OFF before shipping.
SW2: Not used. (Fixed to OFF.)
ON
13)
SW1:
Peripheral protocol.Select the type of the peripheral device connected to the peripheral interface of the CPU
module.
(When accessing an ACPU on another station from a peripheral device for ACPU, set this switch to ON. The
setting becomes valid immediately after switching.)
ON:
14)
RS-422 connector
15 - 3
:OFF
:OFF
:ON
RUN
POINT
(1) For the Q2ASCPU, after writing a program (except for writing to PLC during
RUN), set the CPU module to RESET and then to RUN.
(2) If the key switch is set to RUN without resetting, the CPU module will remain
in STOP state displaying as follows:
RUN LED
:Flickers
*1
After this occurs, the CPU can be placed into RUN state by setting the RUN/
STOP key switch to RESET.
In this case, internal CPU module data such device data are cleared.
(3) To prevent the internal CPU module information from being cleared, switch
the RUN/STOP key switch STOP RUN again without resetting.
*1
If Remote STOP RUN is performed for the CPU module, the CPU will be in RUN status, not
in "PROG.CHECK" status.
15 - 4
(2)
POINT
(1) The latch clear operation can be set enabled or disabled for each device in
the device setting in the parameter mode.
(2) Remote latch clear executed by the GPP function is an alternative method
other than using the RUN/STOP key switch.(Refer to Section 10.6.5)
(3)
POINT
(1) The LED in the in/out switch may not come OFF if the memory card is being
used for a CPU module system function (sampling trace, status latch, etc.) or
by a program. In such a case, stop the function or program using the memory
card. After aborting it, confirm that the LED in the in/out switch has gone OFF,
then remove the memory card.
(2) When a file register, local device or breakdown history set with parameters is
present, the memory card cannot be removed.
Even if the memory card in/out switch is turned OFF, its built-in LED does not
turn OFF. When the file register is set to "Not used" with the QDRSET (P)
instruction, the memory card can be removed.
(3) After removing the memory card, do not turn on the memory card insertion/
disconnection switch for preventing an error.
15 - 5
(4)
POINT
(1) After installing the memory card, set the memory card in/out switch to ON. If it
is not set to ON, the memory card cannot be used.
(2) During one scan after the memory card installation, mounting processing is
performed again. Note that the scan time may be increased by 10ms at
maximum.
15 - 6
16
This section describes the specifications and selection of power supply modules.
16.1 Specifications
16.1.1 Power supply module specifications
(1)
Item
A1S61PN
A1S62PN
Slot position
A1S63P
+30%
(85 to 264VAC)
(15.6 to 31.2VAC)
50/60Hz 5
105VA
41W
Input frequency
Input voltage distortion
24VDC -35%
5VDC
5A
3A
5A
current
24VDC
0.6A
5VDC
5.5A or higher
3.3A or higher
5.5A or higher
24VDC
0.66A or higher
Overcurrent
protection
*1
Overvoltage
5VDC
5.5 to 6.5V
protection*2
24VDC
Efficiency
65% or higher
10ms or lower
20ms or less
*3
(24VDC or higher)
Between primary
and 5VDC
500VAC
Insulation resistance
Checked by noise simulator of noise voltage 1500Vpp, noise width 1 , and noise frequency 25 to 60Hz
Noise durability
Power indicator
Fuse
and 24VDC
Checked by noise
simulator of noise voltage
1500Vp-p, noise width
1 , and noise frequency
25 to 60Hz
16 - 1
Performance specifications
Item
A1S61PN
A1S62PN
M3.5 7
0.75 to 2mm2
A1S63P
59 to 88N cm
External dimensions
Weight
0.60kg
0.60kg
0.50kg
REMARK
1) The number of occupied slots for the A66P is 1.
POINT
*1 Overcurrent protection
(a) The overcurrent proctector shuts off the 5VDC and/or 24VDC circuit(s)
and stops the system if the current exceeding the specified value flows
in the circuit(s).
As this results in voltage drop, the power supply module LED turns
OFF or is dimly lit.
(b) When this device is activated, eliminate probable causes such as
insufficient current capacity or short circuit, and then start the system.
When the current has reached the normal value, the system will start
from the first.
*2 Overvoltage protection
The overvoltage protector shuts off the 5VDC circuit and stops the system if
overvoltage of 5.5 to 6.5V is applied to the circuit.
The power supply module LED turns OFF. When restarting the system,
switch the input power OFF, then back ON. The system is started up with
an initial start. If the system is not booted and the LED remains off, this
means that the power supply module has to be replaced.
*3 Allowable momentary power failure period
The allowable momentary power failure period of programmable controller
CPUs varies depending on the power supply module used.
In the system using the A1S63P, it is the time from when the primary side of
the stabilized power supply supplying 24VDC to the A1S63P turns OFF
until the voltage (secondary side) has dropped from 24VDC to the specified
value (15.6VDC) or less.
*4 Inrush current
If power is reapplied immediately after power OFF (within 5 seconds), an
inrush current exceeding the specified value may flow (for 2ms or less).
Therefore, before reapplying power, make sure that 5 seconds have
elapsed after power off.
When selecting a fuse or breaker for an external circuit, consider the above
as well as meltdown and detection characteristics.
16 - 2
A power supply module is selected based on to the total current consumption of I/O
modules, special function modules and peripheral devices to which power is supplied by
the power supply module. Remember that when an extension base module such as
A1S52B(S1), A1S55B(S1), A1S58B(S1), A52B, A55B or A58B are used, power is
supplied by the main base.
For 5VDC current consumption of I/O modules, special function modules and peripheral
devices, refer to Section 3.3.
Power-supply
module
Peripheral devices
Q6PU, converter/cable (for connection of
CPU module and personal computer), etc
CPU module
Peripheral
device, AD71TU
(2)
16 - 3
Do not drop the power supply module or give it hard shock since its case, terminal
block connectors and pin connectors are made of resin.
(2)
(M3 screw)
(M4 screw)
(3)
(M4 screw)
39 to 59N
cm
98 to 137N
cm
78 to 118N
cm
When installing the module to the base unit, press the module completely so that its
hook is locked into the base. When dismounting the module, press the hooks until
they come off the base completely, and then pull the module toward you. (See
Section 19.5.)
16 - 4
(1) A1S61PN
No.
(2) A1S62PN
Name
Application
1)
POWER LED
2)
24 V and 24 G terminals
3)
FG terminal
The grounding terminal connected to the shield pattern of the printed circuit board.
4)
LG terminal
Grounding for the power supply filter. The potential of A1S61P or A1S62P terminal
is 1/2 of the input voltage.
16 - 5
(3) A1S63P
No.
Name
Application
5)
6)
Power supply input terminals Used to connect 100VAC to 200VAC power supply.
7)
Terminal screw
M3.5 7
8)
Terminal cover
9)
POINT
(1) Do not cable to the unused terminals such as FG and LG on the terminal
block (terminals whose name is not printed on the terminal cover).
(2) Be sure to ground the terminal LG to the protective ground conductor.
16 - 6
17
Item
I/O module
installation range
A1S32B
A1S33B
A1S35B
A1S38B
A1S38HB
2 modules can be
installed.
3 modules can be
installed.
5 modules can be
installed.
8 modules can be
installed.
8 modules can be
installed.
Extension
possibility
Extendable
Installation hole
size
220mm (3.3inch)
External
dimensions
Weight
325mm (3.3inch)
130mm (2.1inch)
130mm (2.1inch)
130mm (2.1inch)
28mm (0.1inch)
28mm (0.1inch)
28mm (0.1inch)
0.52kg
0.65kg
430mm (3.3inch)
0.75kg
Accessory
130mm (2.1inch)
28mm (0.1inch)
0.97kg
1.0kg
(2)
Item
I/O module
installation range
Power supply
module loading
necessity
A1S65BS1
A1S65B
5 modules can be
installed.
A1S68BS1
A1S68B
8 modules can be
installed.
A1S52B
A1S52BS1
2 modules can be
installed.
A1S55B
A1S55BS1
5 modules can be
installed.
M4 6(FG terminal)
0.75 to 2mm2
Applicable
solderless terminal
315mm (3.3inch)
420mm (3.3inch)
Accessory
8 modules can be
installed.
Weight
A1S58BS1
Installation hole
size
External
dimensions
A1S58B
260mm (3.3inch)
cm
365mm (3.3inch)
130mm (2.1inch)
130mm (2.1inch)
130mm (2.1inch)
130mm (2.1inch)
130mm (2.1inch)
28mm (0.1inch)
28mm (0.1inch)
28mm (0.1inch)
28mm (0.1inch)
28mm (0.1inch)
0.71kg
0.95kg
0.38kg
0.61kg
*1
*1
0.87kg
POINT
(2)
When using the simulation module A6SIM-X64Y64, set its base unit specification to
"1" or later.
If "0" is set, the A6SIM-X64Y64 does not operate normally.
When "0" is to be set for the base unit specification of the A6SIM-X64Y64, replace
the base unit with the A38B.
17 - 2
A1SC03B
A1SC07B
A1SC12B
A1SC30B
A1SC60B
Cable length
Item
0.055m
0.33m
0.7 (2.30)
1.2 (3.94)
3.0 (9.84)
6.0 (19.69)
0.45 (1.48)
Resistance value of
5VDC supply line
0.02
0.02
(at 55
0.06
0.12
0.18
0.04
0.05
3.0 (9.84)
0.12
5 (16.43)
0.18
Application
Weight
0.04
0.7 (2.30)
CAUTION
0.10
0.14
0.20
B(S1)/A1S6
0.40
B(S1)
0.65
0.22
0.40
B/A6
0.56
Connect the extension cable to the connector of the base unit or module.
After that, check for incomplete insertion.
Poor electrical contact may cause incorrect inputs and/or outputs.
When using extension cables, keep them away from the main circuit cables (high
voltage, large current).
17 - 3
17.3 Application Standards of Extension Base Unit (A1S52B(S1), A1S55B(S1), A1S58B(S1), A52B, A55B,
A58B)
To the A1S52B(S1), A1S55B(S1), A1S58B(S1), A52B, A55B and A58B extension base
units, 5VDC is supplied from the power supply module on the main base unit. (Power is
not supplied from any power supply module on the A62B, A65B and A68B.)
Therefore, if a voltage drop occurs on an extension cable, the specified voltage may not
supplied to the receiving end, resulting in erroneous inputs and outputs.
It is recommended to connect the A1S52B(S1), A1S55B(S1), A1S58B(S1), A52B, A55B
and/or A58B after a main base unit to minimize a voltage drop.
Determine applicability of the A1S52B(S1), A1S55B(S1), A1S58B(S1), A52B, A55B and
A58B by the following calculation method.
(1)
Selection condition
The voltage received by the module installed in the last slot of an extension base unit
A1S52B(S1), A1S55B(S1), A1S58B(S1), A52B, A55B or A58B must be 4.75 V or
above.
Since the output voltage of the power supply module is set at 5.1 V or above, the
voltage drop must be 0.35 V or less.
(2)
Extension cable connected to the left Extension cable connected to the right side of main
side of main base unit (serial)
A1S52B(S1), A1S55B(S1) or
A1S58B(S1) extension base
A1S3 B
unit is used
A1S3 B
(c)
(a)
A1S5 B(S1)
(b)
17 - 4
A1S5 B(S1)
(c)
(b)
Extension cable connected to the left Extension cable connected to the right side of main
side of main base unit (serial)
A1S3 B
A1S3 B
(c)
(a)
A5 B
(c)
A5 B
17 - 5
CAUTION
17 - 6
1)
4)
1)
OUT
OUT
CPU
2)
No.
1)
2)
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
POWER
I/O 6
I/O 7
A1S38B
6)
3)
Name
2)
Application
3)
Module connector
Connector to load the power supply module, CPU module, I/O module and
specialfunction module.
To prevent dust accumulation, load the attached connector cover, blank cover
(A1SG60) or a dummy module (A1SG62) to reserved space connector not loaded
a module.
4)
5)
Screws to attach the module to the bases. Screw size: for M4 screw
Mounting hole to attach the base module to the panel of the control panels, etc.
(For M5 screw)
6)
IMPORTANT
Only one extension base module can be connected to a main base module.
Connecting two extension connectors of the main base module to extension base
modules may result in input and/or output errors.
17 - 7
(2)
4)
2)
A1S65B, A1S68B,
A1S65B-S1,
A1S68B-S1
POWER
1)
A1S68B
3)
6)
5)
4)
2)
A1S58B-S1
A1S58B
1)
7)
No.
1)
6)
Name
Extension cable connector
3)
Application
Connects an extension cable using a signal-communication connector for the
extension base module.
Connect the extension cable after removing the connector cover.
2)
Base cover
3)
Module connector
4)
Screws to attach the module to the bases. Screw size: for M4 screw
5)
Mounting hole to attach the base module to the panel of the control panels, etc.
(For M5 screw)
17 - 8
No.
6)
Name
DIN rail hook
Application
Attachment hook for DIN rail
One piece each for A1S52B, A1S55B, A1S52B-S1 and A1S55B-S1.
Two pieces each for A1S65B, A1S68B, A1S58B, A1S65B-S1,
A1S68B-S1 and A1S58B-S1.
7)
FG terminal
The grounding terminal connected to the shield pattern of the printed circuit board.
17 - 9
18
Item
Q1MEM-64S
Q1MEM-128S
Q1MEM-256S
Q1MEM-512S
Q1MEM-1MS
Q1MEM-2MS
64k bytes
128k bytes
256k bytes
512k bytes
1M bytes
2M bytes
59k bytes
123k bytes
250.5k bytes
506k bytes
1016.5k bytes
2036k bytes
SRAM memory
capacity before
formatting
SRAM memory
capacity after
formatting
Number of storable
118
files
128
Insertion/removal
256
5000 times
limit
External dimensions
85.6mm (3.3inch)
54mm (2.1inch)
Weight
3.3mm (0.1inch)
0.04kg
(2)
Item
Q1MEM-64SE
Q1MEM-128SE
Q1MEM-256SE
Q1MEM-512SE
Q1MEM-1MSE
32k bytes
64k bytes
128k bytes
256k bytes
512k bytes
32k bytes
64k bytes
128k bytes
256k bytes
512k bytes
28.5k bytes
58.5k bytes
122.5k bytes
250k bytes
505.5k bytes
29k bytes
59k bytes
123k bytes
250.5k bytes
506k bytes
57
117
128
58
118
128
10,000 times
18 - 1
(2)
Item
Q1MEM-64SE
Q1MEM-128SE
Insertion/removal limit
External dimensions
Q1MEM-256SE
Q1MEM-512SE
5000 times
85.6mm (3.3inch)
Weight
54mm (2.1inch)
0.04kg
18 - 2
3.3mm (0.1inch)
Q1MEM-1MSE
(2)
The battery installed in the CPU module does not back up RAM memories of
memory cards.
Also, a battery installed in a memory card does not back up the internal RAM of a
CPU module.
(3)
18 - 3
Type
Initial voltage
3.6VDC
5 years
Lithium content
0.48g
Application
External dimensions
16
30mm [0.6
1.2 inch]
REMARK
For the battery directive in EU member states, refer to Appendix 11.
(2)
Type
Initial voltage
3.0VDC
5 years
Lithium content
0.05g
Application
18 - 4
(1)
Memory card
(a) Do not drop, bend or apply any strong impact to the memory card.
(b) Do not expose the memory card to water.
(c) Do not expose the memory card to direct sunlight or leave it near a heat source.
(d) Be careful to prevent dust from entering the connector.
(e) Do not store the memory card in high temperature or high humidity areas.
(f) To protect the memory card from static electricity, always enclose it in a plastic
case before transporting or storing.
(g) Do not touch the terminals of the memory card.
Insert the memory card and fully press it to the memory card connector.Check for
incomplete connection after installing it.
Poor electrical contact may cause malfunctions.
CAUTION
(2)
Battery
(a) Do not short the battery.
(b) Do not disassemble the battery.
(c) Do not put it into a fire.
(d) Do not heat it.
(e) Do not apply solder to the battery poles.
18 - 5
No.
Name
Description
(1) Connector
Remark
18 - 6
Since the CPU module battery is shipped with its battery connector disconnected,
connect the connector according to the procedure indicated below.
Open the cover of the Q2ASHCPU.
Q2ASH CPU
STOP
L.CLR
RESET
RUN
RESET
Completion
(2)
Since the memory card battery is removed from the battery holder before shipping,
set it in the battery holder before use of the RAM.
POINT
Firmly push the battery connector all the way in to the connector pin.
18 - 7
CPU main
module
Memory card
Insert it in
this direction
"Precartions"
on this side
Insert the memory card and fully press it to the memory card connector. After that,
check for incomplete insertion. Poor electrical contact may cause malfunctions.
CAUTION
(2)
Memory card
POINT
(1) When a memory card is installed, the scan time will increase by 10ms at
maximum. The scan time increases only in 1 scan during which the
Q2ASCPU performs mount processing.
(2) If the memory card in/out switch is turned OFF while the system or a program
is using the memory card, it may take a while for the LED on the switch to go
OFF.
(3) Installing or removing a memory card with the memory card in/out switch set
ON while the power is ON will destroy the contents of the memory card.
18 - 8
(3)
OFF
(Removal/Insertion Prohibited)
(Removal/Insertion Permitted)
ON (removal/insertion prohibited)
Removal/insertion prohibited
Removal/insertion prohibited
Removal/insertion prohibited
Removal/insertion permitted
prohibit flag
18 - 9
19
19 - 1
(1)
AC system
AC/DC system
Power supply
Power supply
Transformer
Fuse
CPU module
SM52
Ym
SM403
XM
Start
switch
MC
Yn
Y1
DC power supply
established signal
input
Transformer
Start/stop circuit
Can be started
by turning ON of
RA1, which is the
programmable
controllers's RUN
output.
CPU module
Fuse
SM52
SM403
XM
Fuse
The setting for TM
is the time taken
to establish the
DC input signal.
SM1084
MC1 N0 M10
N0
Start
switch
MC
Input unit
RA2
( - )( + )
TM
SM1084
RA1
Yn
TM
TM
Program
Stop
switch
DC power
supply
Ym
MC
XM
Output unit
Ym
L
Stop
switch
RA2
Turned ON in RUN
status by M9039
RA1
Program
RA1
Yn
M10
MC
Input unit
XM
Voltage relay
recommended
RA2
Output unit
Ym
Output unit
MC
MC 2
MC 1
MC
MC1
MC2
Y1
RA2
Yn
RA1
Output unit
19 - 2
Turned ON in RUN
status by SM403
MC
MC2
MC1
MC1
MC2
MC
Switches the power
supply to output
devices OFF when
the system stops:
At emergency stops
at stops on reaching
a limit
The procedures used to switch on the power supply are indicated below.
AC system
AC/DC system
19 - 3
(2)
System example
Power
Input
CPU
supply
16
module
module
points
Input
16
points
Input
16
points
Output
16
Power Output Output Output
16
16
16
points Empty
supply
points
points
points
module
YB0
to
YBF
*1
The output module for fail safe purpose should be mounted on the last slot of the
system.(YB0 to YBF in the above system.)
T1
YB0
1s
Off delay timer *3
SM412
YB0
T2
1s
External load
YB0
0.5s
0.5s
YB1
to
to
YBF
MC
24V
- +
0V
CPU module
Output module
*2
24VDC
T1
T2
MC
*2
*3
Since YB0 turns ON and OFF alternatively at 0.5 second intervals, use a contactless output
module (a transistor is used in the above example).
If an off delay timer (especially miniature timer) is not available, construct a fail safe circuit
using an on delay timer shown on the next page.
19 - 4
YB0
T1
SM412
1s
*4
YB0
M1
On delay timer
M1
T2
1s
M1
M2
YB0
M2
0.5s
T2
0.5s
Externai load
YB1
to
to
YBF
MC
24V
- +
0V
CPU module
output module
24VDC
T1
M2
MC
*4
19 - 5
(2)
(3)
(4)
(5)
A lot of conductive powdery substance such as dust or iron powder, oil mist, salt, or
organic solvent exists.
(6)
(7)
(8)
19 - 6
(1)
I15V : Current consumption of 15VDC external power supply part of special function
module
I24V : Average current consumption of 24VDC power supply for output module's
internal consumption
(Current consumption equivalent to the points simultaneously ON)
...... Not applicable to a system where 24VDC is supplied externally and a
power supply module with no 24VDC output is used.
(2)
19 - 7
(3)
Total 24VDC average power consumption of the output module (power consumption
equivalent to the points simultaneously ON)
The average 24VDC output circuit power of the power supply module is regarded as
the total power consumption of each module.
W24V=I24V 24 (W)
(4)
Average power consumption due to output voltage drop of the output modules
(power consumption equivalent to the points simultaneously ON)
WOUT=IOUT Vdrop
IOUT
Output points
Input points
Power consumption of the external power supply part of the special function module
WS=I+15V 15+I-15V 15+I24V 24 (W)
The total of the power consumption values obtained for each block is power
consumption of the entire programmable controller system.
W=Wpw+W5V+W24V+WOUT+WIN+WS (W)
Using this value (W), calculate the amount of heat generation and temperature rise
inside the panel.
The calculation formula to obtain the temperature rise inside a panel is shown as:
T=
W [
UA
........... 6
................................................ 4
POINT
If the temperature inside the panel can exceed the specified range, it is
recommended to install a heat exchanger to the panel to lower the inside
temperature.
If a ordinary ventilation fan is used, it sucks dust together with the outside air and it
may affect the performance of the programmable controller.
19 - 8
To improve the ventilation and to facilitate the exchange of the module, provide at
least 30mm (1.18in.) of distance between the top part of the module and any
structure or part.
However, when A52B, A55B, A58B, A62B, A65B or A68B extension base unit is
used, provide at least 80mm (3.15in.) of distance between the top of the unit and any
structural part.
(2)
(3)
If the base unit is installed to the surface which is not flat or is distorted, an excessive
force is applied to the printed-circuit board and it may cause a fault. Be sure to install
it to a flat surface.
(4)
Avoid sharing the same panel with any source of vibration such as a large-sized
magnetic contactor or no-fuse breaker, and install to a separate panel or away from
such devices.
(5)
(6)
If any device is installed in front of the programmable controller (i.e. installed in the
back of the door), position it to secure at least 100mm (3.94inch) of distance to avoid
the effects of radiated noise and heat.
Also, place the base unit at least 50mm (1.97inch) away from any other equipment
on the right or left.
(7)
When installing the base unit to DIN rail in an environment with large vibration, use a
vibration-proofing bracket (A1S-PLT-D). Mounting the vibration-proofing bracket
(A1S-PLT-D) enhances the resistance to vibration.
Depending on the environment to set up the base unit, it is also recommended to fix
the base unit to the control panel directly.
19 - 9
19.4.2 Installation
Installation location of the main base unit and the extension base unit is shown below.
Indicates the location of ceiling of
the panel, wiring duct or other part.
30mm (1.18inch)
or more
30mm (1.18inch)
or more
At least 30mm
(1.18 inch)
B, A1S38HB, A38HBEU)
At least 30mm
(1.18 inch)
At least 30mm
(1.18 inch)
At least 30mm
(1.18 inch)
Extension base(A1S5 B(S1), A1S6 B(S1))
At least 30mm
(1.18 inch)
At least 80mm
(3.15 inch)
Duct
(maximum height:
50mm (1.97 inch))
At least 30mm
(1.18 inch)
At least 80mm
(3.15 inch)
Panel, etc.
Programmable
controller
Door
Contactor
relay, etc.
19 - 10
(1)
Module installation
The procedure for mounting a module is described below.
Base unit
Module
Module
connector
Projection
for fixing
the module
Module fixing hole
Complete
19 - 11
(2)
Removing a module
The procedure for removing a module is explained here.
Base unit
Module
Complete
POINT
To dismount the module, be sure to disengage the hook from the module fixing
hole and then remove the module fixing projection from the module fixing hole.If
the module is forcibly removed, the hook or module fixing projection will be
damaged.
19 - 12
Installation
I/O module
Dust-proof cover
Insert the dustproof cover into the connector- or terminal-side groove of the I/O
module first as shown in the figure, and then push the dustproof cover.
19 - 13
(2)
Removal
I/O module
Dust-proof cover
To remove the dustproof cover from the I/O module, insert the tip of a flat-head
screwdriver into the hole as shown in the figure, then pry the tab of the cover out from
the hole using the screwdriver.
19 - 14
19.7 Wiring
19.7.1 Wiring instructions
Instructions for wiring of power cables or I/O cables are given in this section.
(1)
Programmable
controller
(b) Use a power supply which generates minimal noise between wires and between
the programmable controller and ground.
If excessive noise is generated, connect an isolating transformer.
I/O
equipment
Programmable
controller
Insulation
transformer
Insulation
transformer
Transformer
Module
Capacity
A1S61PN
110VA n
A1S62PN
110VA n
(d) Separate the programmable controller's power supply line from the lines for I/O
devices and power devices as shown below.
When there is much noise, connect an isolating transformer.
(e) Taking rated current or inrush current into consideration when wiring the power
supply, be sure to connect a breaker or an external fuse that have proper blown
and detection.
When using a single programmable controller, a 10A breaker or an external fuse
are recommended for wiring protection.
Main
power supply
Programmable
controller
power supply
Insulation
Transformer
Programmable
controller
200VAC
Relay
terminal block
T1
19 - 15
(f)
(g) Twist the 100VAC, 200VAC or 24VDC wires as tightly as possible, and use the
minimum length to make connection between modules.
Also, use a thick wire (max. 2 mm2) to minimize voltage drop.
(h) Do not install 100VAC and 24VDC wires together with main circuit wires (high
voltage and large current) or I/O signal lines (including common line). Provide a
distance of 100mm (3.94inch) or more between them if possible.
(i)
Programmable
controller
I/O devices
AC
E1
E1
E1
E2
POINT
(1) Ground the lightning surge absorber (E1) and the programmable controller
(E2) separately from each other.
(2) Select a lightning surge absorber whose voltage does not exceed the
maximum allowable circuit voltage even when line voltage reaches the
maximum.
19 - 16
(2)
(e) When ducts are used for wiring, securely ground them.
(f) Separate the 24VDC I/O cables from the 100VAC and 200VAC cables.
(g) In a long distance wiring of 200m (656.2ft.) or longer, leak current due to
capacitance may cause failure.
(h) As protective measures against lightning surges, separate the AC wiring from
the DC wiring and connect a lightning surge absorber as shown in (1) (i).
Failure to do so increases the risk of I/O equipment failure due to lightning.
(3)
Programmable
controller
Grounding
(a) Carry out the independent grounding if possible.
(b)
Other device
Programmable
controller
Other device
Programmable
controller
Other device
19 - 17
A1S61PN
CPU
A1S62PN
CPU
AC
AC
Fuse
NC
NC
(FG)
AC
DC
AC
DC
(LG)
24VDC
+24V
24G
Fuse
(FG)
24VDC
24VDC
(LG)
INPUT
100-240VAC
INPUT
100-240VAC
I/O
A1S62PN
Extension cable
I/O
Extension cable
+24V
24G
(FG)
(LG)
100/240VAC
INPUT
100-240VAC
FG
Grounding wire
Grounding wire
Ground
Ground
POINT
(1) Use the thickest possible (max. 2 mm2 (14 AWG)) wires for the 100/200 VAC
and 24 VDC power cables. Be sure to twist these wires starting at the
connection terminals. For wiring a terminal block, be sure to use a solderless
terminal. To prevent short-circuit due to loosening screws, use the solderless
terminals with insulation sleeves of 0.8 mm (0.03 inch) or less thick. The
number of the solderless terminals to be connected for one terminal block are
limited to 2
Solderless terminals
with insulation sleeves
Terminal block
The FW-F series UPS whose serial number starts with the letter "P" or later, or ends with the
letters "HE" is applicable.
19 - 19
20
Test description
CISPR16-2-3
Radiated emission
*2
measured.
measurement range) *1
230M-1000MHz
QP: 47dB V/m (10m in
EN61131-2:2007
measurement range)
150k-500kHz
CISPR16-2-1, CISPR16-1-2
Conducted emission *2
line is measured.
*1
*2
20 - 1
(2)
Standard
Test item
Test description
Immunity test in which electrostatic
EN61000-4-2
Electrostatic discharge immunity *1
EN61000-4-3
Radiated, radio-frequency,
electromagnetic field immunity *1
80M-1000MHz: 10V/m
1.4G-2.0GHz: 3V/m
2.0G-2.7GHz: 1V/m
EN61000-4-4
immunity *1
line.
EN61000-4-5
EN61131-2:2007
Surge immunity *1
EN61000-4-6
Immunity to conducted
disturbances, induced by radiofrequency fields *1
EN61000-4-8
immunity *1
field.
0.15M-80MHz, 80% AM
modulation@1kHz, 10Vrms
50Hz/60Hz, 30A/m
Apply at 0%, 0.5 cycles and zero-
EN61000-4-11
Voltage dips and interruption
immunity *1
cross point
0%, 250/300 cycles (50/60Hz)
40%, 10/12 cycles (50/60Hz)
70%, 25/30 cycles (50/60Hz)
*1
Programmable controllers are open-type devices (devices designed to be housed inside other
equipment) and must be installed inside a conductive control panel. The corresponding tests
were conducted with the programmable controller installed inside a control panel.
20 - 2
Each network remote station also needs to be installed inside the control panel.
However, waterproof type remote stations can be installed outside the control panel.
(1)
Control panel
(a) Use a conductive control panel.
(b) When attaching the control panel's top plate or base plate, mask painting and
weld so that good surface contact can be made between the panel and the bolt.
(c) To ensure an electrical contact with the control panel, mask the bolt areas of the
inner plates when painting to allow conductivity over the widest possible area.
(d) Ground the control panel with a thick wire so that a low impedance can be
ensured even at high frequencies.
(e) Holes made in the control panel must be 10 cm (3.94 inch) diameter or less. If
the diameter is more than 10cm (3.94 inch), radio waves can be leaked.
(f) Lock the control panel so that only those who are trained and have
acquiredenough knowledge of electric facilities can open the control panel.
(2)
20 - 3
20.1.3 Cables
The cables extracted from the control panel contain a high frequency noise component.
On the outside of the control panel, therefore, they serve as antennas to emit noise. To
prevent noise emission, use shielded cables for the cables which are connected to the I/O
modules and intelligent function modules and may be extracted to the outside of the
control panel.
The use of a shielded cable also increases noise resistance.
The signal lines (including common line) of the programmable controller, which are
connected to I/O modules, intelligent function modules and/or extension cables, have
noise durability in the condition of grounding their shields by using the shielded cables. If a
shielded cable is not used or not grounded correctly, the noise resistance will not meet the
specified requirements.
(1)
20 - 4
(2)
Ethernet module
Precautions to be followed when AUI cables*1, twisted pair cables and coaxial cables
are used are described below.
(a) Be sure to ground the AUI cables*1 connected to the 10BASE5 connectors.
Because the AUI cable is of the shielded type, as shown in the figure below,
partly remove the outer sheath, and ground the exposed shield section to the
widest possible surface.
20 - 5
(c) Always use double-shielded coaxial cables as the coaxial cables*2 connected to
the 10BASE2 connectors. Ground the double-shielded coaxial cable by
connecting its outer shield to the ground.
(4)
(5)
Positioning modules
Precautions for configuring machinery compliant with the EMC Directives using the
A1SD75P -S3 are described below.
(a) When using a cable of 2m (6.56ft.) or less
Ground the shield section of the external wiring cable with a cable clamp.
C P U module
Powersupply
module
(Ground the shield at the closest location to the A1SD75 -S3 external wiring
connector.)
Connect the external wiring cable to a drive unit or an external device in the
shortest distance.
Install the drive unit in the same panel.
External wiring connector
A1
SD
75
Cable clamp
Drive unit
20 - 6
(b) When connecting a cable longer than 2m (6.56ft.), but not exceeding 10m
(32.81ft.)
Ground the shield section of the external wiring cable with a cable clamp.
C P U module
Powersupply
module
(Ground the shield at the closest location to the A1SD75 -S3 external wiring
connector.)
Install a ferrite core.
Connect the external wiring cable to a drive unit or an external device in the
shortest distance.
External wiring connector
A1
SD
75
Ferrite core
Cable clamp
External wiring cable (2m to 10m (6.56ft. to 32.81f
Drive unit
(c) Models and required quantities of the ferrite core and cable clamp
Cable clamp
Model: AD75CK (Manufactured by Mitsubishi Electric)
Ferrite core
Model: ZCAT3035-1330 (TDK ferrite core)
Contact: TDK Corporation
Required quantity
Cable length
Optional part
Required quantity
1 axis
2 axes
Within 2m (6.56ft.)
AD75CK
2m (6.56ft.) to 10m
AD75CK
ZCAT3035-1330
(32.81ft.)
20 to 30cm
(7.87 to 11.81inch)
AD75CK
20 - 7
3 axes
(6)
CC-Link module
(a) Be sure to ground the shield of the cable that is connected to a CC-Link module
close to the exit of the control panel or to any of CC-Link stations within 30cm
(11.81inch) from the module or stations.
The CC-Link dedicated cables are shielded cables. As shown in the illustration
below, remove a part of the outer sheath and ground it to the widest possible
area.
(d) Each power line connecting to the external power supply terminal or module
power supply terminal must be 30m (98.43 ft) or less.
(e) Install a noise filter to the external power supply. Use a noise filter with an
attenuation characteristic equivalent to that of the MA1206 (TDK-Lambda
Corporation). Note that a noise filter is not required when the module is used in
Zone A defined in EN61131-2.
(f) Keep the length of signal cables connected to the analog input terminals of the
following modules to 30m or less.
Wire cables connected to the external power supply and module power supply
terminal in the control panel where the module is installed.
AJ65BT-64RD3
AJ65BT-64RD4
AJ65BT-68TD
(g) For the cable connected to the power supply terminal of the AJ65SBT-RPS or
AJ65BT-68TD, attach a ferrite core with an attenuation characteristic equivalent
to that of the ZCAT3035-1330 from TDK Corporation. Twist the cable around the
ferrite core by one as shown below.
20 - 8
(7)
CC-Link/LT module
To supply the CL2DA2-B and CL2AD4-B with 24VDC power using the CL1PAD1,
keep the length of the power cable from the CL1PAD1 to the 24VDC power supply to
30m or less.
(8)
Model Name
A1S61PN, A1S62PN
Make sure to short the LG and FG terminals with a cable of 6 to 7cm and
ground the cable.
A1S63P*1
A1SJHCPU(S8)
*1
Filter attachment to the power cable is not required for the A1S63P product with the version
(F) and later. However, use the 24VDC panel power equipment that conforms to the CE.
Make sure to attach two ferrite cores to the power line.
Attach them as close to the power supply module as possible.
Use a ferrite core whose damping characteristic is equivalent to that of the RFC-H13
produced by Kitagawa Industries Company, LTD.
*2
Model Name
A1S38HBEU
Applicable
A1S3
B, A1S38HB
A1S5
B, A1S6
20 - 9
Applicability
N/A
Applicable
20 - 10
FN343-3/01
FN660-6/06
ZHC2203-11
Manufacturer
SCHAFFNER
SCHAFFNER
TDK
Rated current
3A
6A
3A
Rated voltage
250V
The precautions required when installing a noise filter are described below.
(1)
Do not bundle the wires on the input side and output side of the noise filter. When
bundled, the output side noise will be induced into the input side wires from which
noise has been filtered out.
(a) The noise will be induced when the input and output
wires are installed together.
(2)
Ground the noise filter ground terminal to the control panel with the shortest wire
possible (approx. 10cm (3.94in.)).
20 - 11
Use a CE-marked AC/DC power supply for an external power supply of the modules,
and the power cable length needs to be less than 30m (98.43 ft.).*1
*1
The power cable length for the A1SJ71QE71N-B5 needs to be less than 3m (9.84 ft.).
(2)
Use a CE-marked AC/DC power supply for an external power supply of the
A1SJ71QLP21S.
(3)
Install noise filters to external supply power terminals of the I/O module and the
modules below.
Use noise filters whose damping characteristic is equivalent to that of the MA1206
produced by TDK Lambda Corporation.
Analog-digital converter module
Digital-analog converter module
Analog I/O module
Temperature input module
Temperature control module
Pulse input module
High-speed counter module
Positioning module
20.1.9 Installation environment of the CC-Link/LT module and the AS-i module
(1)
CC-Link/LT module
Use the module under the environment of Zone A*1.
For the categories of the following products, refer to the manual came with each
product.
CL1Y4-R1B1
CL1Y4-R1B2
CL1XY4-DR1B2
CL1XY8-DR1B2
CL1PSU-2A
(2)
AS-i module
Use the module under the environment of Zone A*1.
*1
Zone defines categories according to industrial environment, specified in the EMC and Low
Voltage Directives, EN61131-2.
Zone C: Factory mains (isolated from public mains by dedicated transformer)
Zone B: Dedicated power distribution, secondary surge protection (rated voltage:300V or
less)
Zone A: Local power distribution, protected from dedicated power distribution by AC/DC
converter and insulation transformer (rated voltage: 120V or less)
20 - 12
(2)
I/O module
Since an I/O module with the rated input voltage of 100/200VAC has a potentially
hazardous voltage area, select a model in which reinforced insulation is provided
between the primary and secondary sides.
For those of 24VDC rated input, conventional models can be used.
(3)
(4)
(5)
Display
Use the CE-marked product.
20 - 13
Category IV
Category III
Category II
Category
Category II indicates a power supply whose voltage has been reduced by two or more
levels of isolating transformers from the public power distribution.
20 - 14
Also, each network remote station needs to be installed inside the control panel.However, the
waterproof type remote station can be installed outside the control panel.
(1)
Shock protection
To prevent personnel such as operators who are not familiar with electricity from
electric shocks, the control panel must be handled as follows:
(a) Lock the control panel so that only the qualified personnel can open it.
(b) Provide a mechanism so that opening the control panel will automatically stop
the power supply.
(c) For electric shock protection, use IP20 or greater control panel.
(2)
20 - 15
20.2.6 Grounding
There are two kinds of ground terminals as shown below.Either ground terminal must be
used grounded.
Be sure to perform protective grounding to ensure the safety.
Protective grounding
Functional grounding
(2)
External devices
When a device with a hazardous voltage circuit is externally connected to the
programmable controller, use a model whose circuit section of the interface to the
programmable controller is intensively insulated from the hazardous voltage circuit.
(3)
Reinforced insulation
Reinforced insulation refers to the insulation with the dielectric withstand voltage
shown in Table 1.
150VAC or less
2500V
300VAC or less
4000V
20 - 16
21
Check item
Installation condition of
the base unit
Content of inspection
It is installed securely.
Installation condition of
module should be
hook.
engaged.
positively mounted.
screw
Connection conditions
MODULE
There is an appropriate
terminals.
distance.
Connector areas of
No loosening at
Retighten the
extension cable
connectors.
Confirm it is ON.
POWER LED
No loosening.
Proximity of solderless
POWER SUPPLY
Action
Confirm if installation
Loosening of terminal
Judgement
CPU module
Confirm it is ON in the
"RUN" LED
"RUN" state.
(Faulty if it is OFF.)
CPU module
"ERROR" LED
OFF.
CPU module
OFF
OFF.
(Faulty if it is ON.)
Refer to
Section 22.2.3
Section 22.2.4
OFF
(Faulty if it is ON or
flickering.)
Refer to Section 22.2.7
Confirm if it correctly
LED
Output module
Confirm if it correctly
LED
21 - 1
Check item
Ambient environment
Item
Ambient temperature
Ambient humidity
Atmosphere
Content of inspection
Measure with
Judgement
0 to 55
There is no corrosive
corrosive gases.
gas present.
100/200VAC
2
Corrective action
85 to 264VAC
100/200VAC terminals.
Connection conditions
Installation condition
Must be installed
module.
solidly.
Adhesion of dirt or
foreign matters
Visual inspection
Loosening of terminal
Retighten with a
screw
screwdriver.
Proximity of
solderless terminals
Loosening of
connector
Visual inspection
loosened, secure it
No adhesion.
No loosening.
Retighten.
There is an
appropriate distance.
Battery
Visual inspection
No loosening.
connector fixing
screw.
Even when there is no
(Preventive
low-battery display,
maintenance)
mode.
WARNING
power supply, if
with screws.
is exceeded.
Be sure to shut off all phases of the external power supply used by the system
before cleaning or retightening the terminal screws or module mounting screws.
Failure to do so may result in an electric shock.
If they are too loose, it may cause a short circuit or malfunctions.
If too tight, it may cause damage to the screws and/or module, resulting in an
accidental drop of the module, short circuit or malfunctions.
21 - 2
SM51 is a battery voltage drop alarm, and it remains ON once turning it ON even if
the battery voltage returns to normal.
SM52 is a battery voltage drop alarm, and after turning ON, it goes OFF when the
battery voltage returns to normal.
After SM51 and SM52 have turned ON, immediately replace the battery.
SM51 is a battery voltage drop alarm, and it remains ON once turning it ON even if the
battery voltage returns to normal.
In order to determine which of these memory's battery has sustained the voltage drop,
check the contents of special relay SD51 and SD52.
When the voltage of any memory's battery drops, the bit in SD51 and SD52 that
corresponds to each memory turns ON.
SD51, SD52 bit No.
Corresponding memory
Bit 0
Built-in RAM
Bit 1, 2
Memory card
21 - 3
POINT
The relationship of back up between the status of the batteries installed in the
CPU module and memory cards is explained below.
The following two points are applied.
1) The battery installed in the CPU module does not back up the RAM memories
of the memory cards.
2) The batteries installed in the memory cards do not back up the built-in RAM of
the CPU module.
CPU module
AC power supply for CPU
module
CPU module
CPU module battery
Memory card
memory
Battery
CPU module
CPU module
memory
Memory card
memory
Memory
ON
ON
OFF
ON
ON
OFF
OFF
ON
ON
OFF
OFF
ON
OFF
OFF
: Back up is possible.
: Back up is not possible.
The battery life guideline and the replacement procedures are explained on the following
pages.
21 - 4
Power-on time
ratio
*1
Guaranteed value*2
ambient
0%
30%
(Referencevalue)*3
ON
(Backup power time after
ambient
an alarm*4)
temperature 40
temperature 25
1,800 hours
22,000 hours
43,800 hours
48 hours
0.2 years
2.5 years
5 years
2.0 days
2,570 hours
31,400 hours
43,800 hours
48 hours
0.3 years
3.6 years
5 years
2.0 days
3,600 hours
43,800 hours
43,800 hours
48 hours
0.4 years
5 years
5 years
2.0 days
43,800 hours
43,800 hours
43,800 hours
48 hours
5 years
5 years
5 years
2.0 days
1,150 hours
22,000 hours
43,800 hours
27 hours
0.1 years
2.5 years
5 years
1.0 days
1,640 hours
31,400 hours
43,800 hours
27 hours
0.2 years
3.6 years
5 years
1.0 days
2,300 hours
43,800 hours
43,800 hours
27 hours
0.3 years
5 years
5 years
1.0 days
43,800 hours
43,800 hours
43,800 hours
27 hours
5 years
5 years
5 years
1.0 days
Q2ASCPU
50%
100%
0%
30%
Q2ASCPU-S1
50%
100%
*1
The power time ratio indicates the percentage of power-on time per day (24 hours).
(The power-on time ratio is 50% when the total power-on time is 12 hours and the total poweroff time is 12 hours.)
*2
*3
of 0 to 55 ).
The actual service value (reference value) represents a battery life that is calculated based on
*4
*5
21 - 5
(1) Use the battery within the time shown by the guaranteed value of the battery
life.
(2) If the battery may be used exceeding the guaranteed time, perform ROM
operation to protect data in case that the battery will be exhausted during
power-off of the programmable controller. Or, after SM51 turns on, back up
data within the backup power time.
(3) When the battery (A6BAT) is not connected to the CPU module, its service
life is five years.
(4) When the battery-low special relay SM51 turns on, immediately change the
battery.
Even if an alarm has not yet occurred, it is recommended to replace the
battery periodically according to the operating condition.
21 - 6
Power-on time
ratio
*1
Guaranteed value*2
ambient
0%
30%
value)*3
ON
(Backup power time after
ambient
an alarm*4)
temperature 40
temperature 25
1,050 hours
8,800 hours
43,800 hours
24 hours
0.1 years
1years
5 years
1.0 days
1,500 hours
12,570 hours
43,800 hours
24 hours
0.2 years
1.4 years
5 years
1.0 days
2,100 hours
17,600 hours
43,800 hours
24 hours
0.2 years
2 years
5 years
1.0 days
43,800 hours
43,800 hours
43,800 hours
24 hours
5 years
5 years
5 years
1.0 days
860 hours
7,600 hours
40,000 hours
19 hours
0.1 years
0.9 years
4.6 years
1.0 days
1,220 hours
10,860 hours
43,800 hours
19 hours
0.1 years
1.2 years
5 years
1.0 days
1,720 hours
15,200 hours
43,800 hours
19 hours
0.2 years
1.7 years
5 years
1.0 days
43,800 hours
43,800 hours
43,800 hours
19 hours
5 years
5 years
5 years
1.0 days
Q2ASHCPU
50%
100%
0%
30%
Q2ASHCPU-S1
50%
100%
*1
The power time ratio indicates the percentage of power-on time per day (24 hours).
(The power-on time ratio is 50% when the total power-on time is 12 hours and the total poweroff time is 12 hours.)
*2
*3
of 0 to 55 ).
The actual service value (reference value) represents a battery life that is calculated based on
*4
*5
POINT
(1) Use the battery within the time shown by the guaranteed value of the battery
life.
(2) If the battery may be used exceeding the guaranteed time, perform ROM
operation to protect data in case that the battery will be exhausted during
power-off of the programmable controller. Or, after SM51 turns on, back up
data within the backup power time.
(3) When the battery (A6BAT) is not connected to the CPU module, its service life
is five years.
(4) When the battery-low special relay SM51 turns on, immediately change the
battery.
Even if an alarm has not yet occurred, it is recommended to replace the
battery periodically according to the operating condition.
2) Table 21.5 shows battery lives when the Q2ASHCPU and Q2ASHCPU-S1
of hardware version H or later are used. For hardware versions, refer to
Section 15.2.
Table 21.5 Battery lives when the Q2ASHCPU and Q2ASHCPU-S1 of hardware version H or later are used
Battery life*5
Power-on time
ratio*1
value)*3
0%
30%
ON
Guaranteed value*2
ambient
ambient
temperature 40
temperature 25
1,050 hours
3,400 hours
4,000 hours
24 hours
0.1 years
0.4 years
0.5 years
1.0 days
1,500 hours
4,800 hours
5,700 hours
24 hours
0.2 years
0.5 years
0.7 years
1.0 days
2,100 hours
6,800 hours
8,000 hours
24 hours
0.2 years
0.8 years
0.9 years
1.0 days
43,800 hours
43,800 hours
43,800 hours
24 hours
5 years
5 years
5 years
1.0 days
860 hours
3,400 hours
4,000 hours
19 hours
0.1 years
0.4 years
0.5 years
1.0 days
1,220 hours
4,800 hours
5,700 hours
19 hours
0.1 years
0.5 years
0.7 years
1.0 days
1,720 hours
6,800 hours
8,000 hours
19 hours
0.2 years
0.8 years
0.9 years
1.0 days
43,800 hours
43,800 hours
43,800 hours
19 hours
5 years
5 years
5 years
1.0 days
Q2ASHCPU
50%
100%
0%
30%
Q2ASHCPU-S1
50%
100%
21 - 8
*1
The power time ratio indicates the percentage of power-on time per day (24 hours).
(The power-on time ratio is 50% when the total power-on time is 12 hours and the total poweroff time is 12 hours.)
*2
*3
of 0 to 55 ).
The actual service value (reference value) represents a battery life that is calculated based on
*4
*5
(1) Use the battery within the time shown by the guaranteed value of the battery
life.
(2) If the battery may be used exceeding the guaranteed time, perform ROM
operation to protect data in case that the battery will be exhausted during
power-off of the programmable controller. Or, after SM51 turns on, back up
data within the backup power time.
(3) When the battery (A6BAT) is not connected to the CPU module, its service life
is five years.
(4) When the battery-low special relay SM51 turns on, immediately change the
battery.
Even if an alarm has not yet occurred, it is recommended to replace the
battery periodically according to the operating condition.
21 - 9
(2)
Q1MEM-64S
5256
23652
Q1MEM-128S
2628
12264
Q1MEM-256S
5256
23652
Q1MEM-512S
2628
12264
Q1MEM-1MS
7008
23652
Q1MEM-2MS
2628
12264
Q1MEM-64SE
5256
23652
Q1MEM-128SE
5256
23652
Q1MEM-256SE
5256
23652
Q1MEM-512SE
5256
23652
Q1MEM-1MSE
2628
12264
Actual value indicates a rough average value and guaranteed value indicates the minimum
value.
21 - 10
WARNING
(1)
21 - 11
21 - 12
POINT
After replacing a battery, write the date for next battery replacement on the sticker
on the back side of the front cover.
Write the proper date by checking the battery life. (Refer to Section 21.3.1)
(2)
21 - 13
21 - 14
21.4 When Reoperating a programmable controller After Storing it with a Battery Unconnected
When reoperating after a battery is uncounted and the programmable controller is stored,
the memory contents of a CPU module and memory card may be undefined.
Therefore, when resuming the operation, clear the CPU module memory and format the
memory in the CPU module by peripheral device.
Afeter doing so, write the memory contents backed up before saving to each memory.
The relationship between the backed-up memory and the batteries is explained below.
Battery
Memory
A6BAT installed in a CPU module
Built-in RAM
CPU module
Device*
SRAM type
Memory card
SRAM
SRAM + E2PROM
type
E2PROM
Before resuming the operation, clear/format the memory for which a battery is backed up
in the table above with a peripheral device.
For memory clear/format operations, refer to the following manuals.
Type SW IVD-GPPQ GPP Software package Operating Manual (Online)
GX Developer Operating Manual
POINT
(1) Make sure to back up each memory contents before storing the
programmable controller.
When a programmable controller power supply is ON or CPU module reset is
cancelled, a CPU module reviews the status of data below, and initializes all
the data if detecting an error.
RAM data in built-in RAM
Breakdown history
Latch data (Latch relay (L), latch setting range device set in a parameter),
special relay SM900 to SM999, special register SD900 to SD999)
Sampling trace data
21 - 15
21.5 When a programmable controller is Reoperated After Stored with the Battery Over the Battery Life
If a battery exceeded its guaranteed life is stored and reoperated, the memory contents of
CPU module and memory card may be undefined.
Therefore, when resuming the operation, clear the CPU module memory and format the
memory in the CPU module by peripheral device.
Afeter doing so, write the memory contents backed up before saving to each memory.
The relationship between the backed-up memory and the batteries is explained below.
Battery
Memory
A6BAT installed in a CPU module
Built-in RAM
CPU module
Device*
SRAM type
Memory card
SRAM + E2PROM
type
SRAM
E2PROM
Before resuming the operation, clear/format the memory for which a battery is backed up
in the table above with a peripheral device.
For memory clear/format operations, refer to the following manuals.
Type SW IVD-GPPQ GPP Software package Operating Manual (Online)
GX Developer Operating Manual
POINT
(1) Make sure to back up each memory contents before storing a programmable
controller.
(2) When a programmable controller power supply is ON or CPU module reset is
cancelled, a CPU module reviews the status of data below, and initializes all
the data if detecting an error.
RAM data in built-in RAM
Breakdown history
Latch data (Latch relay (L), latch setting range device set in a parameter),
special relay SM900 to SM999, special register SD900 to SD999)
Sampling trace data
21 - 16
22. TROUBLESHOOTING
22
TROUBLESHOOTING
The description, cause determination, and corrective actions of each error which may
occur during system usage are described.
(1)
Visual confirmation
Confirm the following points:
1) Machine operation (stop status and operation status)
2) Power supply ON/OFF
3) I/O equipment status
4) Wiring status (I/O wires and cable)
5) Display status of each display indicator (POWER LED, RUN LED, ERROR LED,
I/O LED, etc.)
6) Status of each setting switch (extension base, power failure compensation, etc.)
After confirming 1) to 6), connect a peripheral device and observe the operation
status of the programmable controller and program contents.
(2)
Error confirmation
Observe how the error changes by performing the following operations:
1) Set the RUN/STOP key switch to "STOP".
2) Reset using the RUN/STOP key switch.
3) Turn ON/OFF the power supply.
(3)
22 - 1
22. TROUBLESHOOTING
22.2 Troubleshooting
The error definition determination method, error definition corresponding to the error code,
and corrective actions are described.
22.2.1 Troubleshooting flowchart
The error definitions are described by events.
Section 22.2.2
Section 22.2.3
Section 22.2.3
Section 22.2.5
Section 22.2.6
Section 22.2.7
Section 22.2.8
Section 22.2.9
Section 22.2.10
Section 22.2.11
22 - 2
22. TROUBLESHOOTING
22.2.2 Flow for actions when the "POWER" LED is turned OFF
The flow when the programmable controller power is ON or when the "POWER" LED of
the power supply module is ON during operation is described.
"POWER" LED is turned off
Is there a power
supply?
NO
Supply power.
YES
NO
Is the
supply voltage is
reaching 85 to 132VAC
or 170 to 264VAC?
NO
Can "POWER"
LED be turned
YES
YES
NO
Is the powersupply
unit fixed?
NO
Can "POWER"
LED be turned
YES
YES
NO
Is overcurrent
protection and overvoltage
protection working?
Can "POWER"
LED be turned
YES
YES
NO
NO
Can "POWER"
LED be turned
YES
End
22 - 3
22. TROUBLESHOOTING
22.2.3 Flow for actions when the "RUN" LED is turned OFF
The flow when the "POWER" LED of the CPU module turns OFF during operation is
described.
Section 22.2.5
22 - 4
22. TROUBLESHOOTING
22 - 5
22. TROUBLESHOOTING
22.2.5 Flow for actions when the "ERROR LED" is turned ON/flashing
The flow when the programmable controller power is ON, when the operation is started or
when the "ERROR" LED of the CPU module is ON/blinking during operation is described.
Section 22.3)
Section 22.3)
22 - 6
22. TROUBLESHOOTING
REMARK
When the RUN/STOP key switch is turned to "L.CLR" several times in a latch clear
operation, the "USER" LED flashes to indicate that latch clear processing is in
progress.
When the RUN/STOP key switch is turned once more to "L.CLR" while the "USER"
LED is flashing, the "USER" LED goes OFF and latch clear processing is ended.
22.2.7 Flow for actions when the "BAT.ARM" LED is turned ON
This section describes the case when the "BAT.ARM" LED of CPU module is turned on.
With the Q2ASCPU, the "BAT.ARM" LED turns ON when the voltage of the battery for a
CPU module or a memory card drops.
When the "BAT.ARM" LED turns ON, monitor the special relays (SM51 and SM52) and
special registers (SD51 and SD52) in the peripheral device monitor mode, and check if
there has been a voltage drop at either of the battery for a CPU module or a memory card.
After monitoring and replacing the battery by a new one, the "BAT.ALM" LED can be
turned OFF by resetting the RUN/STOP key switch or performing the LEDR instruction.
22 - 7
22. TROUBLESHOOTING
22.2.8 Flow for actions when the output module's output load does not turn ON
The flow when the output load of the output module is not turned ON during operation is
described.
POINT
For problems when the input signal does not turn off or ourput load does not turn
off, perform troubleshooting by referring to the fault examples for the I/O modules
in Section 22.5.
22 - 8
22. TROUBLESHOOTING
SW1
SW1
22 - 9
22. TROUBLESHOOTING
(2)
Check if the in/out switch
of the memory card is ON.
Check if the write protect
switch is OFF.
Check if the memory is
formatted.
Check the designation
for the write destination.
Can program be
written?
NO
(1)
22 - 10
YES
(3)
22. TROUBLESHOOTING
22.2.10 Flow for actions when booting from a memory card is not possible
The flow when the CPU module cannot be booted from a memory card is described.
22 - 11
22. TROUBLESHOOTING
22 - 12
22. TROUBLESHOOTING
22.2.11 Flow chart used when the CPU module is not started up
The following shows the flow when the CPU module is not started up.
The CPU module is not started up.
NO
YES
Are all the power of the power
supply modules ON? Is the power supply
module wired correctly?
NO
NO
YES
YES
Is it available
to communicate with
the peripheral device?
YES
NO
Is the extension cable
connected to the incorrect
direction? (Connected IN and
IN, or OUT and OUT?)
YES
NO
NO
at RESET
Not at RESET
YES
NO
YES
YES
NO
22 - 13
Completed
22. TROUBLESHOOTING
MEMO
22 - 14
22. TROUBLESHOOTING
Q00J/Q00/Q01
Qn(H)
QnPH
QnPRH
QnA
Rem
22 - 15
22. TROUBLESHOOTING
Error Code
CPU module
4000H to 4FFFH
Appendix 5
Serial communication
7000H to 7FFFH
CC-Link module
B000H to BFFFH
Ethernet module
C000H to CFFFH
Detection while
communicating with
the CPU module
MELSECNET/10 network
module
*1
F000H to FFFFH
The error codes of the CPU module are categorizes according to minor errors, moderate
errors and major errors.
Minor error:
Errors that CPU module such as a battery error continues the operation
(Error code: 1300 to 10000)
Moderate error: Errors that CPU module such as a WDT error stops the operation
(Error code: 1300 to 10000)
Minor error:
Errors that CPU module such as a RAM error stops the operation
(Error code: 1000 to 1299)
"The error that the QnACPU continues operation" and "the error that QnACPU stops
operation" are determined by "CPU operation status" of the error code list.
22 - 16
Corrective Action
1000
1010
1101
[RAM ERROR]
The sequence program storing built-in RAM/
program memory in the CPU module is faulty.
Collateral informationmmon
Common Information:
Individual Information:
Diagnostic Timing
At power ON/ At reset/ When an END instruction
executed
1102
[RAM ERROR]
The work area RAM in the CPU module is faulty.
The standard RAM and extended RAM in the
CPU module are faulty.
Collateral informationmmon
Common Information:
Individual Information:
Diagnostic Timing
At power ON/ At reset/ When an END instruction
executed
1103
[RAM ERROR]
The device memory in the CPU module is faulty.
Collateral informationmmon
Common Information:
Individual Information:
Diagnostic Timing
At power ON/At reset
1104
[RAM ERROR]
The address RAM in the CPU module is faulty.
Collateral informationmmon
Common Information:
Individual Information:
Diagnostic Timing
At power ON/At reset
LED Status
CPU Status
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
22 - 17
Corresponding
CPU
QnA
Error
Code
1105
[RAM ERROR]
The system RAM in the CPU module is faulty.
Collateral informationmmon
Common Information:
Individual Information:
Diagnostic Timing
At power ON/At reset
1200
1201
1202
1203
1204
1205
Corrective Action
LED Status
CPU Status
Corresponding
CPU
Q4AR
QnA
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
Q4AR
QnA
22 - 18
Error
Code
1206
1401
*1
*2
LED Status
CPU Status
RUN:
Off
ERR.:
Flicker
Corresponding
CPU
Q4AR
CPU Status:
Stop
Check ERR. LED of the output modules and
replace the fuse of the module whose LED is lit.
Read the common information of the error using the
peripheral device and replace the fuse at the output
module corresponding to the numerical value
(module No.) reading.
Alternatively, monitor special registers SD1300 to
SD1331 with the peripheral device and change
the fuse of the output module whose bit has a
value of "1".
When a GOT is bus-connected to the main base
unit or extension base unit, check the connection
status of the extension cable and the grounding
status of the GOT.
1300
1310
Corrective Action
QnA
Q4AR
RUN:
Off/On
ERR.:
Flicker/On
CPU Status:
Stop/
Continue*1
Q2AS
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
QnA
The CPU module, base unit and/or the special
function module that was accessed is experiencing
a hardware fault. (Contact your local Mitsubishi
representative.)
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop*2
CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
The BAT.ALM LED turns on at BATTERY ERROR.
22 - 19
Error
Code
Corrective Action
1402
1411
[CONTROL-BUS. ERR.]
When performing a parameter I/O allocation the
intelligent function module/special function module
could not be accessed during initial
communications.
(On error occurring, the head I/O number of the
corresponding intelligent function module/special
function module is stored in the common
information.)
Collateral informationmmon
Common Information:Module No.(Slot No.)
Individual Information:
Diagnostic Timing
At power ON / At reset
1412
[CONTROL-BUS. ERR.]
The FROM/TO instruction is not executable, due to
a control bus error with the intelligent function
module/special function module.
(On error occurring, the program error location is
stored in the individual information.)
Collateral informationmmon
Common Information:Module No.(Slot No.)
Individual Information:Program error location
Diagnostic Timing
During execution of FROM/TO instruction set
1421
1500
[AC/DC DOWN]
A momentary power supply interruption has
occurred.
The power supply went off.
Collateral informationmmon
Common Information:
Individual Information:
Diagnostic Timing
Always
LED Status
CPU Status
Corresponding
CPU
QnA
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
Q4AR
RUN:
On
ERR.:
Off
CPU Status:
Continue
22 - 20
QnA
Error
Code
1510
1520
1530
1600
1601
[BATTERY ERROR*2]
Voltage of the battery on memory card 1 has
dropped below stipulated level.
Collateral informationmmon
Common Information:Drive Name
Individual Information:
Diagnostic Timing
Always
1602
[BATTERY ERROR*2]
Voltage of the battery on memory card 2 has
dropped below stipulated level.
Collateral informationmmon
Common Information:Drive Name
Individual Information:
Diagnostic Timing
Always
*2
Corrective Action
LED Status
CPU Status
Corresponding
CPU
RUN:
On
ERR.:
On
CPU Status:
Continue
RUN:
Off
ERR.:
Flicker
Q4AR
CPU Status:
Stop
RUN:
On
ERR.:
On
CPU Status:
Continue
RUN:
On
ERR.:
Off
CPU Status:
Continue
QnA
RUN:
On
ERR.:
On
CPU Status:
Continue
22 - 21
2000
Corrective Action
Read the common information of the error using
the peripheral device, and check and/or change
the module that corresponds to the numerical
value (module number) there.
Alternatively, monitor the special registers
SD1400 to SD1431 at a peripheral device, and
change the fuse at the output module whose bit
has a value of "1".
When a GOT is bus-connected to the main base
unit or extension base unit, check the connection
status of the extension cable and the grounding
status of the GOT.
2100
2101
2102
2103
*1
LED Status
CPU Status
Corresponding
CPU
RUN:
Off/On
ERR.:
Flicker/On
CPU Status:
Stop/
Continue*1
QnA
Keep the number of special function modules that
can initiate an interrupt (with the exception of the
A(1S)I61 module) to 12 or fewer.
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
22 - 22
Error
Code
2104
Corrective Action
LED Status
CPU Status
Corresponding
CPU
2105
(AD59
(AD57(S1)/AD58
(AJ71C24(S3/S6/S8)
(AJ71UC24
(AJ71C21(S1)
(AJ71PT32-S3/AJ71T32-S3
(AJ71QC24(R2,R4)
(AJ71ID1(2)-R4
+(AD75
modules installed
modules installed
modules installed
modules installed
modules installed
modules installed
modules installed
modules installed
modules installed
total
5)
8)
10)
10)
29)
125)
29)
8)
12)
1344
2106
2107
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
22 - 23
QnA
Error
Code
2108
2109
2110
Corrective Action
2111
2112
*1
*2
LED Status
CPU Status
RUN:
Off
ERR.:
Flicker
Corresponding
CPU
QnA
CPU Status:
Stop
RUN:
Off
ERR.:
Flicker
Q4AR
CPU Status:
Stop/
Continue*2
RUN:
Off/On
ERR.:
Flicker/On
CPU Status:
Stop/
Continue*1
RUN
CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
The BAT.ALM LED turns on at BATTERY ERROR.
22 - 24
QnA
Error
Code
2113
2210
Corrective Action
2302
2400
2300
2301
*1
Corresponding
CPU
RUN:
Off/On
ERR.:
Flicker/On
RUN
[BOOT ERROR]
There is no boot file in the drive designated by the
parameter enabled drive switch even though the
Boot DIP switch is ON.
Collateral informationmmon
Common Information:Drive name
Individual Information:
Diagnostic Timing
At power ON/At reset
LED Status
CPU Status
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
RUN:
Off/On
ERR.:
Flicker/On
CPU Status:
Stop/
Continue*1
CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
22 - 25
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
QnA
Error
Code
2401
Corrective Action
Read the individual information of the error using
the peripheral device, check to be sure that the
parameter drive name and file name correspond
to the numerical values there (parameter
number), and correct.
Check the space remaining in the memory card.
2402
2410
2411
2412
2413
*1
LED Status
CPU Status
Corresponding
CPU
QnA
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
Q4AR
RUN:
Off/On
ERR.:
Flicker/On
CPU Status:
Stop/
Continue*1
CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
22 - 26
QnA
Error
Code
Corrective Action
2500
2501
2502
2503
2504
LED Status
CPU Status
Corresponding
CPU
RUN:
Off
ERR.:
Flicker
Check whether the program version
is
.QPG, and check the file contents to be
sure they are for a sequence program.
22 - 27
CPU Status:
Stop
QnA
3000
RUN/
Corrective Action
RUN/
LED Status
CPU Status
RUN:
Off
ERR.:
Flicker
3001
CPU Status:
Stop
[PARAMETER ERROR]
The parameter settings are corrupted.
Collateral informationmmon
Common Information:File name/Drive name
Individual Information:Parameter number
Diagnostic Timing
At power ON/At reset/STOP
RUN/
3002
[PARAMETER ERROR]
When "Use the following file" is selected for the file
register in the PLC file setting of the PLC parameter
dialog box, the specified file does not exist although
the file register capacity has been set.
Collateral informationmmon
Common Information:File name/Drive name
Individual Information:Parameter number
Diagnostic Timing
At power ON/At reset/STOP
RUN/
22 - 28
Corresponding
CPU
QnA
Error
Code
3003
[PARAMETER ERROR]
The number of devices set at the PLC parameter
device settings exceeds the possible CPU module
range.
Collateral informationmmon
Common Information:File name/Drive name
Individual Information:Parameter number
Diagnostic Timing
At power-On/At reset/STOP
Corrective Action
LED Status
CPU Status
Corresponding
CPU
RUN/
3004
[PARAMETER ERROR]
The parameter file is incorrect.
Alternatively, the contents of the file are not
parameters.
Collateral informationmmon
Common Information:File name/Drive name
Individual Information:Parameter number
Diagnostic Timing
At power-On/At reset/STOP
RUN/
3100
3101
3102
RUN
RUN
RUN*3
22 - 29
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
QnA
Error
Code
Corrective Action
LED Status
CPU Status
Corresponding
CPU
3104
RUN
RUN:
Off
ERR.:
Flicker
RUN
CPU Status:
Stop
RUN
3107
3105
RUN
RUN
22 - 30
QnA
Error
Code
3200
RUN
3203
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
RUN
*3
Corresponding
CPU
RUN
3202
LED Status
CPU Status
3201
Corrective Action
RUN
The diagnostic timing of CPU modules except for Universal QCPU can be performed only when switching the CPU modules to run.
22 - 31
QnA
4000
Corrective Action
LED Status
CPU Status
Corresponding
CPU
RUN
4001
RUN
4002
RUN
4003
RUN
4004
RUN
22 - 32
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
QnA
Error
Code
4010
RUN
[CAN'T SET(P)]
The common pointer Nos. assigned to files
overlap.
The local pointer Nos. assigned to files overlap.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
At power ON/At reset/STOP
4030
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
RUN
[CAN'T SET(I)]
The allocation pointer Nos. assigned by files
overlap.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
At power ON/At reset/STOP
QnA
RUN
4100
[OPERATION ERROR]
The instruction cannot process the contained data.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
When instruction executed
4101
[OPERATION ERROR]
The number of setting data dealt with the
instruction exceeds the applicable range.
The storage data and constant of the device
specified by the instruction exceeds the
applicable range.
When writing to the host CPU shared memory,
the write prohibited area is specified for the write
destination address.
The range of storage data of the device specified
by the instruction is duplicated.
The device specified by the instruction exceeds
the range of the number of device points.
The interrupt pointer No. specified by the
instruction exceeds the applicable range.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
When instruction executed
*1
Corresponding
CPU
RUN
[CAN'T SET(P)]
The total number of internal file pointers used by
the program exceeds the number of internal file
pointers set in the parameters.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
At power ON/At reset/STOP
4021
LED Status
CPU Status
4020
Corrective Action
RUN:
Off/On
ERR.:
Flicker/On
CPU Status:
Stop/
Continue*1
CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
22 - 33
Error
Code
Corrective Action
LED Status
CPU Status
Corresponding
CPU
[OPERATION ERROR]
The network No. or station No. specified for the
dedicated instruction is wrong.
The link direct device (J \ ) setting is incorrect.
4102
4103
[OPERATION ERROR]
The configuration of the PID dedicated instruction
is incorrect.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
When instruction executed
RUN:
Off/On
ERR.:
Flicker/On
[OPERATION ERROR]
The number of settings is beyond the range.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
When instruction executed
4107
[OPERATION ERROR]
Numbers of execution to the CC-Link instruction
are beyond 32.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
When instruction executed
4108
[OPERATION ERROR]
The CC-Link parameter is not set when the CCLink instruction is executed.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
When instruction executed
4104
4200
*1
QnA
CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
22 - 34
CPU Status:
Stop/
Q4AR
*1
Continue
QnA
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
Error
Code
Corrective Action
4201
4202
4203
4210
[CAN'T EXECUTE(P)]
The CALL instruction is executed, but there is no
subroutine at the specified pointer.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
When instruction executed
4211
[CAN'T EXECUTE(P)]
There was no RET instruction in the executed
subroutine program.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
When instruction executed
4212
[CAN'T EXECUTE(P)]
The RET instruction exists before the FEND
instruction of the main routine program.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
When instruction executed
4213
[CAN'T EXECUTE(P)]
More than 16 nesting levels are programmed.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
When instruction executed
LED Status
CPU Status
RUN:
Off
ERR.:
Flicker
22 - 35
CPU Status:
Stop
Corresponding
CPU
QnA
Error
Code
4220
[CAN'T EXECUTE(I)]
Though an interrupt input occurred, the
corresponding interrupt pointer does not exist.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
When instruction executed
4221
[CAN'T EXECUTE(I)]
An IRET instruction does not exist in the executed
interrupt program.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
When instruction executed
4223
[CAN'T EXECUTE(I)]
The IRET instruction exists before the FEND
instruction of the main routine program.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
When instruction executed
4230
4231
4235
4300
*1
Corrective Action
LED Status
CPU Status
Corresponding
CPU
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
QnA
RUN:
Off/On
ERR.:
Flicker/On
CPU Status:
Stop/
Continue*1
CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
22 - 36
Error
Code
4301
4400
CPU Status:
Stop/
Write the program to the CPU module again using
GX Developer.
RUN
RUN
[CAN'T SET(S)]
Step number designations overlap in SFC program.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
STOP
*1
RUN
RUN:
Off/On
ERR.:
Flicker/On
[CAN'T SET(S)]
Total number of steps in all SFC programs exceed
the maximum.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
STOP
4422
RUN
[CAN'T SET(S)]
A step number designated in an SFC program
exceeds the range.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
STOP
4421
RUN
[CAN'T SET(BL)]
Block number designations overlap in SFC
program.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
STOP
4420
Corresponding
CPU
[CAN'T SET(BL)]
The block number designated by the SFC program
exceeds the range.
Collateral informationmmon
Common Information:Program error location
Individual Information:
Diagnostic Timing
STOP
4411
LED Status
CPU Status
4410
Corrective Action
RUN
CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
22 - 37
Continue*1
QnA
Error
Code
4500
*1
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
RUN
QnA
Write the program to the CPU module again
using GX Developer.
Read the common information of the error using
GX Developer, and check and correct the error
step corresponding to that value (program error
location).
RUN
4600
RUN
4504
4503
Corresponding
CPU
RUN
4502
LED Status
CPU Status
4501
Corrective Action
RUN
RUN:
Off/On
ERR.:
Flicker/On
CPU Status:
Stop/
Continue*1
CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
22 - 38
Error
Code
4601
4602
4610
4611
STOP
4620
4621
*1
RUN
Corrective Action
LED Status
CPU Status
RUN:
Off/On
ERR.:
Flicker/On
CPU Status:
Stop/
Continue*1
RUN:
On
ERR.:
On
CPU Status:
Continue
RUN
Corresponding
CPU
CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
22 - 39
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
QnA
Error
Code
4630
4631
4632
4633
Corrective Action
LED Status
CPU Status
Corresponding
CPU
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
22 - 40
QnA
5000
5001
5010
5011
Corrective Action
[WDT ERROR]
The scan time of the initial execution type
program exceeded the initial execution
monitoring time specified in the PLC RAS setting
of the PLC parameter.
Collateral informationmmon
Common Information:Time (value set)
Individual Information:Time (value actually
measured)
Diagnostic Timing
Always
[WDT ERROR]
The scan time of the program exceeded the
WDT value specified in the PLC RAS setting of
the PLC parameter.
Collateral informationmmon
Common Information:Time (value set)
Individual Information:Time (value actually
measured)
Diagnostic Timing
Always
LED Status
CPU Status
Corresponding
CPU
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
QnA
RUN:
On
ERR.:
On
CPU Status:
Continue
22 - 41
6000
6010
6100
Corrective Action
[TRUCKINERR.]
A CPU module tracking memory error was detected
during initial.
(This can be detected from the control system or
standby system of the redundant system.)
Collateral informationmmon
Common Information:
Individual Information:
Diagnostic Timing
At power ON/At reset/STOP
LED Status
CPU Status
RUN:
Off
ERR.:
Flicker
CPU Status:
Stop
RUN:
On
ERR.:
On
CPU Status:
Continue
RUN
6101
[TRUCKIN ERR.]
The CPU module detected an error during the
handshake for tracking.
(This can be detected from the control system or
standby system of the redundant system.)
Collateral informationmmon
Common Information:
Individual Information:
Diagnostic Timing
When an END instruction executed
6200
[CONTROL EXE.]
The standby system in a redundant system is
switched to the control system.
(This can be detected from the standby system of
the redundant system.)
Collateral informationmmon
Common Information:Reason(s) for system
switching
Individual Information:
Diagnostic Timing
Always
Corresponding
CPU
RUN:
On
ERR.:
Off
CPU Status:
Continue
22 - 42
Q4AR
Error
Code
6210
6220
Corrective Action
[CONTROL WAIT ]
The control system in a redundant system is
switched to the standby system.
(This can be detected from the standby system of
the redundant system.)
Collateral informationmmon
Common Information:Reason(s) for system
switching
Individual Information:
Diagnostic Timing
Always
LED Status
CPU Status
Corresponding
CPU
RUN:
On
ERR.:
Off
CPU Status:
Continue
Q4AR
RUN:
On
ERR.:
On
6221
6230
CPU Status:
Continue
22 - 43
Corrective Action
LED Status
CPU Status
Corresponding
CPU
RUN:
On
ERR.:
9000
[F**** ]
Annunciator (F) was set ON
Collateral informationmmon
Common Information:Program error location
Individual Information:Annunciator number
Diagnostic Timing
When instruction executed
On/Off *2
Read the individual information of the error using
the peripheral device, and check the program
corresponding to the numerical value (annunciator
number).
CPU Status:
Continue
RUN:
USER LED On
ERR.:
USER LED On
CPU Status:
Continue
9010
[<CHK>ERR ***-***]
Error detected by the CHK instruction.
Collateral informationmmon
Common Information:Program error location
Individual Information:Failure No.
Diagnostic Timing
When instruction executed
RUN:
On
ERR.:
Off
Read the individual information of the error using
the peripheral device, and check the program
corresponding to the numerical value (error
number) there.
QnA
CPU Status:
Continue
RUN:
USER LED On
ERR.:
USER LED On
CPU Status:
Continue
*2
For the Basic model QCPU, the special register (SD207 to DS209) for LED indication priority can turn off the indication. (The LED indication is always OFF
for the High Performance model QCPU, Process CPU, Redundant CPU, and Universal model QCPU.)
22 - 44
POINT
(1) When the error is canceled with the error code to be canceled stored in the SD50,
the lower one digit of the code is neglected.
(Example)
If error codes 2100 and 2101 occur, and error code 2100 to cancel error code 2101.
If error codes 2100 and 2111 occur, error code 2111 is not canceled even if error
code 2100 is canceled.
(2) Errors developed due to trouble in other than the CPU module are not canceled
even if the special relay (SM50) and special register (SD50) are used to cancel the
error.
(Example)
Since "SP. UNIT DOWN" is the error that occurred in the base unit (including the
extension cable), intelligent function module, etc. the error cause cannot be
removed even if the error is canceled by the special relay (SM50) and special
register (SD50).
Refer to the error code list and remove the error cause.
22 - 45
22. TROUBLESHOOTING
When storing the error code to be reset in SD50 at error reset, the lower one digit
of the code number is ignored.
Example:
When error codes 2100 and 2101 occurred, resetting of error code 2100 results in
also resetting of error code 2101.
When error codes 2100 and 2111 occurred, resetting of error code 2100 does not
result in resetting of error code 2111.
22 - 46
22. TROUBLESHOOTING
Table 22.2 Faults with the input circuit and the corrective actions
Situation
Cause
Countermeasure
AC input
AC input
Leakage
current
Input
module
Recommend
Power supply
Input
module
(1/2W) for
CRs constant.
AC input
Example The input signal does
2
Leakage
current
Input
module
Power supply
Line capacity C of the leak current
twisted pair cable due to line capacity
of the wiring cable is about 100PF/m.
Example The input signal does
3
AC input
AC input
Leakage
current
Input
module
Power supply
Input
module
Power supply
DC input (sink)
DC input (sink)
Leakage current
Input
module
Resister
Input
module
22 - 47
22. TROUBLESHOOTING
Table 22.2 Faults with the input circuit and the corrective actions
Situation
Cause
Countermeasure
Use only one power supply.
supplies.
(figure below).
DC input
Example The input signal does
5
DC input
E1
Input
module
E2
E1
E1
E2
Input
module
E2
Input module
24VDC
(1)
1mA or less OFF current of the A1SX40 is not satisfied. Hence, connect a resistor as
shown below.
A1SX40
3mA
IR=2mA
IZ=1mA
Input impedance
3.3k
24VDC
(2)
IZ
IR
Z(Input impedance)
1.0
2.0
voltage)2/R
26.42/1500
3.3 1.65[k ]
, the power capacity W of resistor R is:
= 0.465 [W]
(3)
Connect a resistor of 1.5(k ) and 2 to 3(W) to a terminal which may cause an error,
since the power capacity of a resistor is selected so that it will be 3 to 5 times greater
than the actual power consumption.
(4)
1
1
1
+
1.5[k ]
3.3[k ]
3[mA] = 3.09[V]
22. TROUBLESHOOTING
Cause
Countermeasure
rectification inside
(Solenoids have these types.)
several hundred of k
to
the load.
A1SY22
Output module
[1]
D1
An excessive voltage is
Example applied to the load when
1
Load
output is off.
[2]
(Triac output)
A1SY22
Output module
load.
If the wire distance from the output module to the
load is great, then it may have leakage current by
line capacity. It is necessary to take precautions.
Load
(Triac output)
Leakage current
22 - 49
22. TROUBLESHOOTING
Cause
Countermeasure
Surge suppressor
A1SY22
Output module
Resistor
Phototriac
Load
Control
circuit
Example
3
Load
the load.
resistance.
Example
4
R
High-frequency
current
A1SY22
Output module
Resistance
Load
Guideline of resistance.
For 100VAC
5 to 10K , 5 to 3W
For 200VAC
10 to 20K , 15 to 10W
A1SY22
Output module
CR
timer
Leakage current
fluctuates.
(Triac output)
The constant value
of resistor should be
calculated
according to the
load.
22 - 50
22. TROUBLESHOOTING
Cause
Countermeasure
Use only one power supply.
supplies.
A1SY40,41,42
Transistor
output with
Output module
12/24V
Load
E1
clamp diode
E2
0V
E2.
PB.
external switch.
OFF:
flowing.)
22 - 51
22. TROUBLESHOOTING
Cause
Countermeasure
photocoupler
Photocoupler
C
Tr1
IC
Y0
Y0
CTL+
Constant
voltage circuit
24V
SW
COM-
R1
CTL+
COM-
24V
*1
R1: Number +
Power capacity
about 500 s.
SW
C1
*2
Resistive value (3 to 5)
C1: Several hundreds of
F, 50 mV
, C1 = 300
R1
= 300
10-6
= 12
10-3S
=12ms
22 - 52
40
22. TROUBLESHOOTING
Cause
Countermeasure
Output module,
ombined module
[3]
Back electromotive
force
Source output
ON
Source output
[3]
Load
TB1 ON
Back electromotive
force
[2]
TB2 OFF
Load
OFF
[1]
Shut off
Load
Sink output
[3]
COM+
CTL-
off.
Back electromotive
force
(Transistor output)
Load
Output module,
ombined module
[3]
Back electromotive
force
Sink output
ON
Load
TB1 ON
[2]
TB2 OFF
OFF
Load
[1]
Shut off
COMCTL+
22 - 53
APPENDICES
APPENDICES
APPENDIX 1 INSTRUCTION LIST
For details on SFC-related instructions, refer to the QnACPU Programming Manual (SFC).
Appendix 1.1
Sequence Instructions
(1)
Classification
Contact instructions
Symbol
Description
App - 1
APPENDICES
(2)
Classification
Association commands
Symbol
Description
App - 2
APPENDICES
(3)
Output instructions
Classification
Symbol
Description
Device output
Sets a device.*
Resets a device.
Output
signal.
Generates one-program cycle pulse at the falling edge of an input
signal.
(4)
Classification
When specifying input (X) for the target device, specify the device number out of the actual
input (X) range.
Shift instructions
Symbol
Shift
Description
(5)
Classification
Description
App - 3
APPENDICES
(6)
Classification
End instructions
Symbol
Description
(7)
Classification
Other instructions
Symbol
Description
Stops sequence operation when the input condition is met.
Stop
No processing
No processing
(for managing the rest of the program as starting from step 0 of page
"n")
App - 4
APPENDICES
Appendix 1.2
Basic Instructions
(1)
Classification
Description
Conductive status when (S1) = (S2)
Non-conductive status when (S1)
Conductive status when (S1)
(S2)
(S2)
(S2)
16-bit data
comparison
(S2)
(S2)
(S2)
(S2)
(S2)
(S2)
(S2)
(S2 + 1, S2)
(S2 + 1, S2)
(S2 + 1, S2)
32-bit data
comparison
(S2 + 1, S2)
(S2 + 1, S2)
(S2 + 1, S2)
App - 5
(S2 + 1, S2)
(S2 + 1, S2)
(S2 + 1, S2)
(S2 + 1, S2)
APPENDICES
Classification
Symbol
Description
Conductive status when (S1 + 1, S1) = (S2 + 1, S2)
Non-conductive status when (S1 + 1, S1)
Conductive status when (S1 + 1, S1)
(S2 + 1, S2)
(S2 + 1, S2)
(S2 + 1, S2)
(S2 + 1, S2)
(S2 + 1, S2)
(S2 + 1, S2)
App - 6
(S2 + 1, S2)
(S2 + 1, S2)
(S2 + 1, S2)
(S2 + 1, S2)
APPENDICES
Classification
Symbol
Description
Compares character strings (S1) and (S2) character by character.
Condition for "match":
Character string in which all characters match
Condition for "larger character string":
Character string that includes characters with larger character
codes, or the longer character string
Condition for "smaller character string":
Character string that includes characters with smaller character
codes, or the shorter character string
Conductive status when (character string S1) = (character
string S2)
Non-conductive status when (character string
S1)
(S2 + 1, S2)
(character
string S2)
Non-conductive status when (character string
S1)
(character
string S2)
Non-conductive status when (character string
S1)
(character
string S2)
Non-conductive status when (character string
S1)
App - 7
(character
APPENDICES
Classification
Block data
comparison
Symbol
Description
Compares n points of data from (S1) with n points of data from (S2) in
1 word units, and stores the comparison result in the n points starting
from the bit device specified by (D).
App - 8
APPENDICES
(2)
Classification
Description
(D) + (S)
(S1) + (S2)
(D)
(D)
(S1) - (S2)
(D)
(D)
(D+1, D) + (S+1, S)
(D+1, D)
(D+1, D)
(D+1, D)
(S1)
(S2)
(D+1, D)
(D+1, D)
BIN 16-bit
multiplication/division
(S1)/(S2)
(S1+1, S1)
(S2+1, S2)
BIN 32-bit
multiplication/division
(S1+1, S1)/(S2+1, S2)
App - 9
APPENDICES
Classification
Symbol
Description
(D) + (S)
(S1) + (S2)
(D)
(D)
(S1) - (S2)
(D)
(D)
(D+1, D) + (S+1, S)
(D+1, D)
(D+1, D)
(D+1, D)
(S1)
(S2)
(D+1, D)
(D+1, D)
BCD 4-digit
multiplication/division
(S1)/(S2)
(S1+1, S1)
(S2+1, S2)
BCD 8-digit
multiplication/division
(S1+1, S1)/(S2+1, S2)
(D+1, D) + (S+1, S)
(D+1, D)
(D+1, D)
(D+1, D)
App - 10
(D+1, D)
APPENDICES
Classification
Symbol
Description
(S1+1, S1)
(S2+1, S2)
(D+1, D)
quotient (D+1, D)
Adds n points of data from (S1) and n points of data from (S2) in a
batch and stores the result to devices starting from (D).
(D) + 1
(D)
(D) 1
(D)
(D)
App - 11
(D)
APPENDICES
(3)
Classification
Description
BCD conversion
BIN conversion
Floating point
BIN conversion
BIN
floating point
conversion
BIN 16-bit
32-bit conversion
BIN
gray code
conversion
App - 12
APPENDICES
Classification
Symbol
Description
Gray code
BIN conversion
2's complement
Converts n points of BIN data from (S) to BCD data in a batch and
stores the result to devices starting from (D).
Block conversion
Converts n points of BCD data from (S) to BIN data in a batch and
stores the result to devices starting from (D).
App - 13
APPENDICES
(4)
Classification
Description
(S)
(D)
(S+1, S)
(D+1, D)
(S+1, S)
(D+1, D)
Floating point
data transfer
Character string
data transfer
16-bit data
(S)
(D)
(S+1, S)
(D+1, D)
(S)
(D)
(S+1, S)
(D+1, D)
negation transfer
32-bit data
negation transfer
Same data
block transfer
Upper/lower byte
swap
App - 14
APPENDICES
(5)
Classification
Description
Causes a jump to Pn beginning with the scan after the one in which
the input condition is met.
Jump
Causes a jump to Pn unconditionally.
(6)
Classification
Description
Interrupt disable
Interrupt enable
Interrupt disable/
enable setting
Return
(7)
Classification
I/O refresh
Description
App - 15
APPENDICES
(8)
Classification
Description
Up/down counter
Teaching timer
Four bit devices starting with the bit device specified at (D) perform
the following operations in accordance with the ON/OFF status of the
STMR instruction.
Special timer
Ramp signal
Pulse density
Pulse output
(n1)Hz
(D)
Outputs "n2" times.
Pulse width
modulation
the device specified at (S1) and stores it in devices starting from the
device specified at (D2).
App - 16
APPENDICES
Appendix 1.3
Application Instructions
(1)
Classification
Description
(D)
(S1)
Logical product
(S)
(S2)
(D+1, D)
(S1+1, S1)
(D)
(S1)
Logical sum
(S)
(S2)
(D+1, D)
(S1+1, S1)
App - 17
(D)
(D)
(S+1, S)
(D+1, D)
(S2+1, S2)
(D+1, D)
(D)
(D)
(S+1, S)
(D+1, D)
(S2+1, S2)
(D+1, D)
APPENDICES
Classification
Symbol
Description
(D)
(S1)
(S)
(D)
(S2)
(D+1, D)
(D)
(S+1, S)
(S1+1, S1)
(D)
(S1)
(S)
(S2)
(D+1, D)
(D+1, D)
(S2+1, S2)
(D+1, D)
(D)
(D)
(S+1, S)
(D+1, D)
sum
(S1+1, S1)
App - 18
(S2+1, S2)
(D+1, D)
APPENDICES
(2)
Classification
Rotation instructions
Symbol
Description
Right rotation
Left rotation
Right rotation
Left rotation
App - 19
APPENDICES
(3)
Classification
Shift instructions
Symbol
Description
n bit shift
1 bit shift
1 word shift
App - 20
APPENDICES
(4)
Classification
Description
Bit set/reset
Bit test
App - 21
APPENDICES
(5)
Classification
Description
Data search
Bit check
Decode
Encode
7-segment decode
App - 22
APPENDICES
Classification
Symbol
Description
Dissociates the 16-bit data specified at (S) into 4-bit units, and stores
these data in the least significant four bits of n devices starting with
the one specified at (D). (n
4)
4)
Dissociates data of the devices starting with the one specified at (S1)
into the specified bits starting with the one specified by (S2), and
stores this data in sequence starting at the device specified at (D).
Dissociation/
Association
Associates each of the data starting from the one specified at (S1) to
the data of the devices starting from the one specified by (S2) and
stores the data to the devices in equence starting at the device
specified at (D).
Dissociates the 16-bit data that starts from the device specified at (S)
into 8-bit units, and stores the n points of data to the devices in
sequence starting from the one specified at (D).
Associates the lower 8 bits of 16-bit data for n points starting from the
one specified at (S) to give 16-bit data, and stores the data to the
devices in sequence starting from the one specified at (D).
Searches the n points of data starting from the device specified at (S)
in 16-bit units, and stores the maximum value to the device specified
at (D).
Searches the n points of data starting from the device specified at (S)
in 16-bit units, and stores the minimum value to the device specified
at (D).
Search
Searches the 2
(S) in 32-bit units, and stores the maximum value to the device
specified at (D).
Searches the 2
(S) in 32-bit units, and stores the minimum value in the device
specified at (D).
Sorts n points of data starting from the device specified at (S1) in 16bit units.
[Max. number of scans required: {n
(n 1)}/2 scans]
Sort
Sorts 2
32-bit units.
[Max. number of scans required: {n
App - 23
(n 1)}/2 scans]
APPENDICES
(6)
Classification
Description
5)
5)
Ladder indexing
App - 24
APPENDICES
(7)
Classification
Description
Table processing
(8)
Classification
Description
App - 25
APPENDICES
(9)
Classification
Display instructions
Symbol
Description
Outputs ASCII codes in the 8 points of devices (16 characters)
starting from the one specified at (S) to an output module.
ASCII print
Outputs ASCII codes in the devices starting from the one specified at
(S) and ending at 00H, to an output module.
Converts the device comment specified at (S) to ASCII codes and
outputs the result to an output module.
Displays ASCII codes in the 8 points of devices (corresponding to 16
characters) starting from the one specified at (S) on the LED
Display
indicator.
Displays the comment of the device specified at (S) on the LED
indicator.
Reset
App - 26
APPENDICES
Symbol
Description
Executes the CHK instruction when it is executed.
Causes a jump to the step following the step of the CHK instruction
when it is not executed.
When normal
When abnormal
Error check
Indicates the start of ladder pattern change for the ladders to be
checked with the CHK instruction.
Indicates the end of ladder pattern change for the ladders to be
checked with the CHK instruction.
Program trace
App - 27
APPENDICES
Symbol
Description
Converts the 1-word BIN data specified at (S) into 5-digit decimal
BIN
Decimal ASCII
ASCII values, and stores them to the word devices starting from the
one specified at (D).
Converts the 2-word BIN data specified at (S) into 10-digit decimal
ASCII values, and stores them to the word devices starting from the
one specified at (D).
Converts the 1-word BIN data specified at (S) into 4-digit
hexadecimal ASCII values, and stores them to the word devices
BIN
Hexadecimal ASCII
BCD
ASCII
Decimal ASCII
BIN
BIN value, and stores this to the word device specified at (D).
Converts the 10-digit decimal ASCII values specified at (S) to a 2word BIN value, and stores this to the word device specified at (D).
Converts the 4-digit hexadecimal ASCII values specified at (S) to a 1-
Hexadecimal ASCII
BIN
word BIN value, and stores this to the word device specified at (D).
Converts the 8-digit decimal ASCII values designated at (S) to a 2word BIN value, and stores this at the word device number
designated at (D).
Converts the 4-digit decimal ASCII values specified at (S) to a 1-word
ASCII
BCD
BCD value, and stores this to the word device specified at (D).
Converts the 8-digit decimal ASCII values specified at (S) to a 2-word
BCD value, and stores this to the word devices specified at (D).
Device comment
read
Stores the comment data of the device specified at (S) to the device
specified at (D).
Stores the length of the character string data (number of characters)
that is stored in the device specified at (S) to the device specified at
(D).
App - 28
APPENDICES
Classification
Symbol
Description
Converts the 1-word BIN value specified at (S2) into a decimal
character string with the total number of digits and number of fraction
part digits specified at (S1), and stores it in the device specified at
BIN
Decimal text string
(D).
Converts the 2-word BIN value specified at (S2) into a decimal
character string with the total number of digits and number of fraction
part digits specified at (S1), and stores it in the device specified at
(D).
Converts the character string that includes a decimal point specified
at (S) to a 1-word BIN value and the number of fraction part digits,
Floating point
Character string
Character string
Floating decimal point
Hexadecimal BIN
ASCII
word devices starting from the one specified at (D) for n characters.
ASCII
Converts the hexadecimal ASCII data in the devices starting from the
one specified at (S) to BIN values for n characters, and stores them
Hexadecimal BIN
Character string
processing
specified at (D).
Stores the character string specified at (S1) for the specified number
of characters to the position specified at (S2) of the devices specified
at (D).
Searches for the character string specified at (S1) from the nth
character of the character string specified at (S2) and stores the
position where a match is found to (D).
Converts the floating point data specified at (S1) to a BCD data with
the number of fraction part digits specified at (S2), and stores this
BCD resolution
App - 29
APPENDICES
Classification
BCD
Symbol
Description
Converts the BCD data specified at (S1) to a floating point data with
the number of fraction part digits specified at (S2) and stores this
App - 30
APPENDICES
Symbol
Description
Sin(S+1, S)
(D+1, D)
Cos(S+1, S)
(D+1, D)
Tan(S+1, S)
(D+1, D)
Trigonometric function
(floating point data)
Sin1(S+1, S)
Cos1(S+1, S)
(D+1, D)
Tan1(S+1, S)
(D+1, D)
Degree
radian
(D+1, D)
conversion
Exponent operation
Natural logarithm
Square root
App - 31
APPENDICES
Classification
Symbol
Description
Trigonometric function
App - 32
APPENDICES
Symbol
Description
Processes the value specified at (S3) to a data in the range defined
by the upper and lower limits set at (S1) and (S2), and stores it to the
word device specified at (D).
When S3
Upper/lower limit
control
S1
When S1
S3
When S2
S3
(S1+1, S1)
The value at (S1+1, S1) is stored to (D+1, D).
(S3+1, S3)
(S2+1, S2)
(S3, S3+1)
The value at (S2+1, S2) is stored to (D+1, D).
Taking the area set by (S1) and (S2) as the dead band, if the input
value specified at (S3) is within the dead band, "0" is stored to the
word device specified at (D) and if it is outside the dead band, the
value obtained by subtracting the dead band upper/lower limit value
from the input value is stored to the word device specified at (D).
When S1
S3
S2
When S3
S1
S3 S1
When S3
S2
S3 S2
Taking the area set by (S1+1, S1) and (S2+1, S2) as the dead band,
Dead zone control
if the input value specified at (S3+1, S3) is within the dead band, "0"
is stored to the word device specified at (D) and if it is outside the
dead band, the value obtained by subtracting the dead band upper/
lower limit value from the input value is stored to the word device
specified at (D).
When (S1+1, S1)
(S3+1, S3)
(S1+1, S1)
(S2+1, S2)
(S2+1, S2)
0
(D+1, D)
(D+1, D)
App - 33
(D+1, D)
APPENDICES
Classification
Symbol
Description
By setting positive and negative bias values for the input value
specified at (S3) with (S1) and (S2), calculates the value for S1 +
bias, and stores it to the word device specified at (D).
When S3 = 0
When S3
S3 + S2
When S3
S3 S1
By setting positive and negative bias values for the input value
specified at (S3+1, S3) with (S1+1, S1) and (S2+1, S2), calculates
Zone control
the value for S1 + bias, and stores it to the word device specified at
(D+1, D).
When (S3+1, S3) = 0
When (S3+1, S3)
(D+1, D)
(D+1, D)
(D+1, D)
Symbol
Description
Changes the block No. of an extension file register to the number
specified at (S).
App - 34
APPENDICES
Symbol
Description
App - 35
APPENDICES
Symbol
Description
Stores the message specified at (S) to the QnACPU.
This message is displayed at the peripheral device.
Input/output to
peripheral device
Stores the data input from a peripheral device to the device specified
at (D).
Symbol
Description
Turns OFF the coil of the specified program's OUT instruction and
Program execution
status switch
Registers the specified program as a scan execution type program.
App - 36
APPENDICES
WDT reset
Symbol
Description
Timing clock
Direct read/write
in 1 byte unit
Fetches ASCII data to the input module specified at (S) for 8 points,
converts the data to hexadecimal values, and stores them in the
devices starting with the one specified at (D1).
App - 37
APPENDICES
Appendix 1.4
(1)
Classification
Description
Performs link refresh for the network module corresponding to the
Specified network
refresh
App - 38
APPENDICES
(2)
Classification
Symbol
Description
Data read/write
from/to other stations
Data send/receive
to/from other stations
Processing request to
other stations
(The GP. *** instructions can also be used for the AJ71QC24N)
App - 39
APPENDICES
(3)
Classification
to specified station
Reads data from the special function module installed at a remote I/O
Data read/write
from a special
function module
(4)
Classification
Routing information
read
Routing information
registration
Description
Description
Reads the data of the transfer destination network with the number
specified by n in the routing parameters and stores the data to the
devices starting from (D).
Registers the routing data in the devices starting from (S) to the area
for the transfer destination network with the number specified by n in
the parameters.
App - 40
APPENDICES
Appendix 1.5
Classification
Symbol
Description
Registers the PID control data in the devices starting from the one
specified at (S) to the PLC CPU.
Performs PID operation on the basis of the set value (SV) and process
value (PV) set in the devices starting from the one specified at (S), and
stores the operation result in the manipulated value (MV) area.
Displays, in the form of a bar graph, the PID control status of the loop
with the number specified at (S1) on the display for the AD57 specified
at n. At the start of execution of PID control monitor, static image
elements of other than the bar graph and numerical data are displayed
by issuing the initial screen display request specified at (S2).
Specified loop
operation stop
Specified loop
operation start
Specified loop
parameter change
App - 41
APPENDICES
Appendix 1.6
Function
Preset data setting
printer
instruction
PVRD1, PVRD2
PRN
PR
PUT
AJ71C21(S1) control
SVWR1, SVWR2
GET
in no-protocol mode
instruction
RVWR1, PVWR2
Instruction Symbol
mode
PRN
PR
INPUT
SPBUSY
SPCLR
PRN2, PRN4
PR2, PR4
Data receive
INPUT2, INPUT4
GET
PUT
App - 42
APPENDICES
Classification
Function
Key input from operation box
Data send for the specified number of bytes in
no-protocol mode
Data send up to the 00H code in no-protocol
mode
AJ71PT32-S3 control
Instruction Symbol
INPUT
PRN
PR
INPUT
instruction
Communications with remote terminal
modules
MINI, MINIEND
MINIERR
SPBUSY
App - 43
APPENDICES
Classification
Function
Display mode setting
CMODE
CPS1
CPS2
CMOV
CLS
CLV
Screen scrolling
CSCRU, CSCRD
Cursor display
CON1, CON2
Cursor erase
COFF
LOCATE
Instruction Symbol
CNOR, CREV
CRDSP, SRDSPV
COLOR
CCDSP, CCDSPV
PR, PRN
PRV, PRNV
Character display
EPR, EPRN
EPRV, EPRNV
- (minus) display
CINMP
- (hyphen) display
CINHP
CINPT
CIN0 to CIN9
CINA to CINZ
Space display
CINSP
CINCLR
INPUT
GET
PUT
STAT
App - 44
APPENDICES
Classification
AJ71ID
-R4 control
instruction
Function
ID controller initial setting
IDINIT1, IDINIT2
IDRD1, IDRD2
IDWD1, IDWD2
IDARD1, IDARD2
IDAWD1, IDAWD2
IDCMP1, IDCMP2
IDFILL1, IDFILL2
IDCOPY1, IDCOPY2
IDCLR1, IDCLR2
IDOFF1, IDOFF2
IDON1, IDON2
PUTE
GETE
ONDEMAND
OUTPUT
PRR
INPUT
BIDOUT
BIDIN
SPBUSY
READ
SWRITE
SEND
RECV
Instruction Symbol
REQ
The AJ71QC24N can be used with QnA link instructions designated for use with special
function modules (G(P). ***).
App - 45
APPENDICES
(2)
Function
Comparison read from ID data carrier
IDCRD1, IDCRD2
IDCWD1, IDCWD2
-R4 control
instruction
Instruction Symbol
carrier
IDSRD1, IDSRD2
IDFRD1, IDFRD2
RIRD
RIWT
RISEND
RIRCV
RIFR
RITO
CCL, CCLEND
SPCBUSY
SPCCLR
RDGET
RDPUT
RDMON
App - 46
APPENDICES
Classification
Function
1 axis positioning start
PSTART
PHOSTA
OPR start
PZPR
PADCH
PJOG+
PJOG-
Instruction Symbol
PMPG
PSPCH
PERRST
PBPSET
PEPSET
POPSET
PPOSET
PSDSET
PSPSET
PCTSET
PEWR
PMDRD
PIFSET
Parameter setting
EPRSET
QnA compatible
transmission/
receiving instruction
AJ71QE71 control instruction
READ
read
SREAD
WRITE
write
SWRITE
Data send
SEND
Data receive
RECV
read
Other station device
write
App - 47
REQ
ZNRD
ZNWR
APPENDICES
Function of Item
Indicates special register number
Name
Meaning
Explanation
: Set by system
S/U
<When set>
Set by
(When set)
Initial
: Set only during initial processing (when power supply is turned ON, or when going from STOP
Status change
Error
to RUN)
Corresponding
ACPU M9
Corresponding
CPU
Request
System switching
) of the ACPU.
format change.)
Each CPU module model name: Indicates the relevant specific CPU module. (Example: Q4AR, Q2AS)
App - 48
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
M9
Diagnostic errors
OFF : No error
ON : Error
SM1
Self-diagnostic error
OFF : No self-diagnosis
errors
ON : Self-diagnosis
S (Error)
M9008
QnA
SM5
Error common
information
S (Error)
New
QnA
SM16
Error individual
information
S (Error)
New
QnA
SM50
Error reset
OFF
SM0
SM51
OFF : Normal
ON : Battery low
SM52
Battery low
OFF : Normal
ON : Battery low
SM53
AC/DC DOWN
detection
S (Error)
New
QnA
New
QnA
S (Error)
M9007
QnA
S (Error)
M9006
QnA
QnA
S (Error)
M9005
QnA
SM54
OFF : Normal
ON : Error
S (Error)
M9004
QnA
SM56
Operation error
OFF : Normal
ON : Operation error
S (Error)
M9011
QnA
OFF : Normal
ON : Module with blown
fuse
S (Error)
M9000
QnA
S (Error)
M9002
QnA
SM60
SM61
OFF : Normal
ON : Error
SM62
Annunciator detection
S (Instruction
execution)
M9009
QnA
SM80
CHK detection
S (Instruction
execution)
New
QnA
App - 49
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
M9
SM90
Corresponds
to SD90
M9108
SM91
Corresponds
to SD91
M9109
SM92
Corresponds
to SD92
M9110
SM93
Corresponds
to SD93
SM94
SM95
Startup of monitoring
OFF : Not started(monitoring
timer for step transition
timer reset)
(Enabled only when
ON : Started(monitoring
SFC program exists)
timer started)
Corresponds
to SD94
Corresponds
to SD95
M9111
Goes ON when measurement of
step transition monitoring timer is
commenced.
Resets step transition monitoring
timer when it goes OFF.
M9112
U
QnA
M9113
SM96
Corresponds
to SD96
M9114
SM97
Corresponds
to SD97
New
SM98
Corresponds
to SD98
New
SM99
Corresponds
to SD99
New
App - 50
APPENDICES
Number
Name
Meaning
Explanation
ON : LED OFF
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
M9
SM202
OFF
New
QnA
SM203
STOP contact
STOP status
S (Status change)
M9042
QnA
SM204
PAUSE contact
PAUSE status
S (Status change)
M9041
QnA
SM205
STEP-RUN contact
STEP-RUN status
S (Status change)
M9054
QnA
M9040
QnA
M9025
QnA
SM206
SM210
OFF : Ignored
ON : Set request
SM211
OFF : No error
ON : Error
S (Request)
M9026
QnA
SM212
OFF : Ignored
ON : Display
M9027
Q3A
Q4A
Q4AR
SM213
OFF : Ignored
ON : Read request
M9028
QnA
SM250
OFF : Ignored
ON : Read
New
QnA
M9094
Q2A(S1)
Q3A
Q4A
Q4AR
SM251
OFF : No replacement
ON : Replacement
SM252
I/O change OK
OFF : Replacement
prohibited
ON : Replacement enabled
S (END)
New
S (Initial)
New
OFF : Reads
ON : Does not read
New
SM257
OFF : Writes
ON : Does not write
New
SM260
S (Initial)
New
OFF : Reads
ON : Does not read
New
OFF : Writes
ON : Does not write
New
S (Initial)
New
OFF : Reads
ON : Does not read
New
OFF : Writes
ON : Does not write
New
S (Initial)
New
OFF : Reads
ON : Does not read
New
OFF : Writes
ON : Does not write
New
OFF : Normal
ON : Error
S (Error)
New
SM255
SM256
SM261
MELSECNET/10
module 1 information
MELSECNET/10
module 2 information
SM262
SM265
SM266
MELSECNET/10
module 3 information
SM267
SM270
SM271
MELSECNET/10
module 4 information
SM272
SM280
CC-Link error
App - 51
QnA
QnA
QnA
QnA
QnA
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
M9
Presence/absence of
SFC program
SM321
Start/stop SFC
program
SM322
SM323
Presence/absence of
continuous transition
for entire block
SM324
Continuous transition
prevention flag
SM320
S (Initial)
M9100
QnA
S (Initial)/U
M9101form
at change
QnA
S (Initial)/U
M9102form
at change
QnA
M9103
QnA
S (Instruction
execution)
M9104
QnA
S (Status change)
New
QnA
S (Initial)/U
M9196
QnA
SM325
OFF : OFF
ON : Preserves
SM326
New
QnA
SM327
S (Initial)/U
New
QnA
New
QnA
SM330
App - 52
APPENDICES
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
M9
SM400
Always ON
ON
OFF
Normally is ON
S (Every END
processing)
M9036
QnA
SM401
Always OFF
ON
OFF
Normally is OFF
S (Every END
processing)
M9037
QnA
S (Every END
processing)
M9038
QnA
S (Every END
processing)
M9039
QnA
SM402
ON
OFF
1 scan
ON
OFF
SM403
ON
OFF
1 scan
Initial
execution
type program
1 scan of scan
execution type
program
ON
OFF
Initial
execution
type program
1 scan of scan
execution type
program
SM404
ON
OFF
1 scan
S (Every END
processing)
New
QnA
SM405
ON
OFF
1 scan
S (Every END
processing)
New
QnA
SM410
0.05s
M9030
QnA
M9031
QnA
M9032
QnA
M9033
QnA
M9034form
at change
QnA
SM411
0.05s
0.1s
0.1s
SM412
1 second clock
0.5s
SM413
2 second clock
1s
SM414
2n second clock
SM420
SM421
SM422
SM423
SM424
SM430
SM431
SM432
SM433
SM434
0.5s
S (Status change)
1s
This relay alternates between ON and OFF at
intervals of the time (unit: s) specified in SD414.
When PLC power supply is turned OFF or a CPU
module reset is performed, goes from OFF to start.
(Note that the ON-OFF status changes when the
designated time has elapsed during the execution of
the program.)
ns
ns
n2 scan
n1 scan
DUTY
n1
n2
S (Status change)
M9020
M9021
S (Every END
processing)
SM420
App - 53
QnA
M9023
M9022
M9024
S (Every END
processing)
New
QnA
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
M9
SM510
SM551
OFF : Ignored
ON : Read
App - 54
S (Every END
processing)
New
QnA
New
QnA
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
M9
SM600
OFF : Unusable
ON : Use enabled
S (Status change)
New
QnA
SM601
OFF : No protect
ON : Protect
S (Status change)
New
QnA
Drive 1 flag
OFF : No drive 1
ON : Drive 1 present
S (Status change)
New
QnA
SM603
Drive 2 flag
OFF : No drive 2
ON : Drive 2 present
S (Status change)
New
QnA
SM604
S (Status change)
New
QnA
SM605
OFF : Remove/insert
enabled
ON : Remove/insert
prohibited
New
QnA
SM620
OFF : Unusable
ON : Use enabled
S (Initial)
New
Q2A(S1)
Q3A
Q4A
Q4AR
SM621
OFF : No protect
ON : Protect
S (Initial)
New
Q2A(S1)
Q3A
Q4A
Q4AR
SM622
Drive 3 flag
OFF : No drive 3
ON : Drive 3 present
S (Initial)
New
Q2A(S1)
Q3A
Q4A
Q4AR
SM623
Drive 4 flag
OFF : No drive 4
ON : Drive 4 present
S (Initial)
New
Q2A(S1)
Q3A
Q4A
Q4AR
SM624
S (Status change)
New
Q2A(S1)
Q3A
Q4A
Q4AR
SM625
Memory card B
remove/insert prohibit
flag
OFF : Remove/insert
enabled
ON : Remove/insert
prohibited
New
Q2A(S1)
Q3A
Q4A
Q4AR
SM640
S (Status change)
New
QnA
SM650
Comment use
S (Status change)
New
QnA
SM660
Boot operation
S (Status change)
New
QnA
SM672
S/U
New
QnA
SM673
S/U
New
Q2A(S1)
Q3A
Q4A
Q4AR
SM602
App - 55
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
M9
SM700
Carry flag
SM701
Number of output
characters selection
SM702
Search method
SM703
Sort order
SM704
Block comparison
S (Instruction
execution)
M9012
QnA
M9049
QnA
Qn(H)
QnPH
QnPRH
QnU
New
QnA
New
QnA
S (Instruction
execution)
New
QnA
New
Q4AR
SM707
Selection of real
number instruction
processing type
SM710
CHK instruction
priority ranking flag
S (Instruction
execution)
New
QnA
SM711
Divided transmission
status
S (Instruction
execution)
M9065
QnA
SM712
Transmission
processing selection
S (Instruction
execution)
M9066
QnA
SM714
Communication
request registration
area BUSY signal
OFF : Communication
request to remote
terminal module
enabled
ON : Communication
request to remote
terminal module
disabled
S (Instruction
execution)
M9081
QnA
SM715
EI flag
OFF : During DI
ON : During EI
S (Instruction
execution)
New
QnA
SM736
PKEY instruction
execution in progress
flag
S (Instruction
execution)
New
QnA
SM737
Keyboard input
reception flag for
PKEY instruction
S (Instruction
execution)
New
QnA
SM738
MSG instruction
reception flag
S (Instruction
execution)
New
QnA
SM774
PID bumpless
processing
(for complete
derivative)
OFF : Matched
ON : Not matched
New
QnA
SM775
Selection of refresh
processing during
COM instruction
execution
New
QnA
SM776
Enable/disable local
device at CALL
New
QnA
SM777
Enable/disable local
device in interrupt
program
New
QnA
SM780
CC-Link dedicated
instruction executable
New
QnA
App - 56
APPENDICES
(7) Debug
Table App. 2.8. Special relay
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
M9
OFF : Not ready
SM800
Sampling trace
preparation
SM801
OFF : Suspend
ON : Start
SM802
Sampling trace
execution in progress
OFF : Suspend
ON : Start
ON : Ready
S (Status change)
New
QnA
M9047
QnA
S (Status change)
M9046
QnA
New
QnA
S (Status change)
New
QnA
S (Status change)
M9043
QnA
S (Status change)
New
QnA
New
QnA
S (Status change)
M9055
QnA
New
QnA
SM803
OFF
SM804
SM805
Sampling trace
completed
SM806
Status latch
preparation
SM807
OFF
ON: Start
ON : After trigger
ON : End
ON: Latch
SM808
Status latch
completion
SM809
OFF
SM810
Program trace
preparation
S (Status change)
New
QnA
SM811
OFF : Suspend
ON : Start
S (Status change)
New
QnA
SM812
Program trace
execution under way
OFF : Suspend
ON : Start
New
QnA
SM813
OFF
S (Status change)
New
QnA
SM814
S (Status change)
New
QnA
SM815
Program trace
completion
S (Status change)
New
QnA
SM820
S (Status change)
New
QnA
SM821
OFF : Suspend
ON : Start
M9182form
at change
QnA
SM822
OFF : Suspend
ON : Start
S (Status change)
M9181
QnA
S (Status change)
New
QnA
ON: Clear
ON: Start
SM823
SM824
S (Status change)
New
QnA
SM825
S (Status change)
M9180
QnA
SM826
OFF : Normal
ON : Errors
S (Status change)
New
QnA
OFF : Normal
ON : Errors
S (Status change)
New
QnA
OFF : Normal
ON : Errors
S (Status change)
New
QnA
SM827
SM828
App - 57
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
M9
SM900
SM910
App - 58
S (Status change)/
U
New
QnA
S (Instruction
execution)
New
QnA
APPENDICES
is provided, the converted special relay can be used for the device
is provided, the device number does not work with QnACPU.
Table App. 2.10. Special relay
ACPU
Special
Relay
M9000
Special
Special
Relay after
Relay for
Conversion Modification
SM1000
Name
Fuse blown
Details
Corresponding
CPU
OFF : Normal
ON : Module with blown
fuse
QnA
QnA
Meaning
M9002
SM1002
OFF : Normal
ON : Error
M9004
SM1004
OFF : Normal
ON : Error
QnA
QnA
AC DOWN
detection
QnA
M9005
SM1005
M9006
SM1006
Battery low
OFF : Normal
ON : Battery low
QnA
M9007
SM1007
OFF : Normal
ON : Battery low
QnA
M9008
SM1008
SM1
Self-diagnosis
error
OFF : No error
ON : Error
QnA
QnA
M9009
SM1009
SM62
Annunciator
detection
App - 59
APPENDICES
Special
Special
Relay after
Relay for
Conversion Modification
Name
Meaning
Details
Corresponding
CPU
M9011
SM1011
SM56
Operation error
flag
OFF : No error
ON : Error
QnA
M9012
SM1012
SM700
Carry flag
QnA
M9016
SM1016
OFF : lgnored
ON : Output claered
M9017
SM1017
OFF : lgnored
ON : Output claered
M9020
SM1020
M9021
M9022
SM1021
SM1022
M9023
SM1023
M9024
SM1024
n2 scan
n2 scan
n1 scan
DUTY n1 n2 SM1020
n1: ON scan interval
n2: OFF scan interval
M9025
SM1025
OFF : Ignored
ON : Set request present
used
M9026
SM1026
OFF : No error
ON : Error
M9027
SM1027
OFF : Ignored
ON : Display
M9028
SM1028
OFF : Ignored
ON : Read request
Batch processing
of data
communications
requests
M9029
SM1029
M9030
SM1030
0.05s
M9031
SM1031
0.1s
M9032
SM1032
1 second clock
0.5s
M9033
SM1033
2 second clock
1s
QnA
QnA
QnA
QnA
QnA
QnA
QnA
Q3A
Q4A
Q4AR
QnA
0.05s
0.1s
0.5s
QnA
QnA
QnA
1s
M9034
SM1034
2n minute clock(1
minute clock)*
ns
M9036
SM1036
Always ON
ON
OFF
M9037
SM1037
Always OFF
ON
OFF
M9038
SM1038
ON
OFF
1 scan
M9039
SM1039
RUN flag(After
RUN, OFF for 1
scan only)
ON
OFF
1 scan
ns
App - 60
APPENDICES
Special
Special
Relay after
Relay for
Conversion Modification
SM1040
Name
Meaning
SM206
M9041
SM1041
SM204
PAUSE status
contact
M9042
SM1042
SM203
STOP status
contact
SM805
Sampling trace
completed
M9043
SM1043
M9045
SM1045
M9046
SM1046
SM802
Details
Corresponding
CPU
QnA
QnA
QnA
Watchdog timer
(WDT) reset
Sampling trace
QnA
QnA
QnA
M9047
SM1047
SM801
Sampling trace
preparations
M9049
SM1049
SM701
Switching the
number of output
characters
M9051
SM1051
CHG instruction
execution disable
OFF : Enabled
ON : Disable
M9052
SM1052
SEG instruction
switch
M9054
SM1054
SM205
QnA
M9055
SM1055
SM808
Status latch
completion flag
QnA
M9056
SM1056
M9057
SM1057
M9058
SM1058
Momentarily ON at P, I set
completion
M9059
SM1059
Sub program P, I
set completion
Momentarily ON at P, I set
completion
M9060
SM1060
Sub program 2 P, I
set request
M9061
SM1061
Sub program 3 P, I
set request
*: 1 minute clock indicates the name of the special relay (M9034) of the ACPU.
App - 61
APPENDICES
Special
Special
Relay after
Relay for
Conversion Modification
Name
Meaning
Details
Corresponding
CPU
M9065
SM1065
SM711
Divided transfer
status
QnA
M9066
SM1066
SM712
Transfer
processing switch
QnA
M9070
SM1070
A8UPU/
A8PUJrequired
search time*2
Communication
request
registration area
BUSY signal
QnA
M9081
SM1081
SM714
M9084
SM1084
Error check
M9091
SM1091
Operation error
details flag
OFF : No error
ON : Error
QnA
M9094
SM1094
SM251
OFF : Exchanged
ON : Not exchanged
M9100
SM1100
SM320
Presence/absence
of SFC program
QnA
QnA
M9101
SM1101
SM321
Start/stop SFC
program
M9102
SM1102
SM322
App - 62
QnA
APPENDICES
Special
Special
Relay after
Relay for
Conversion Modification
SM1103
Name
Meaning
Details
Corresponding
CPU
SM323
Presence/absence
of continuous
transition
QnA
QnA
QnA
M9104
SM1104
SM324
Continuous
transition
suspension flag
M9108
SM1108
SM90
Step transition
monitoring timer
start (equivalent of
SD90)
M9109
SM1109
SM91
Step transition
monitoring timer
start (equivalent of
SD91)
M9110
SM1110
SM92
Step transition
monitoring timer
start (equivalent of
SD92)
M9111
SM1111
SM93
Step transition
monitoring timer
start (equivalent of
SD93)
M9112
SM1112
SM94
Step transition
monitoring timer
start (equivalent of
SD94)
M9113
SM1113
SM95
Step transition
monitoring timer
start (equivalent of
SD95)
M9114
SM1114
SM96
Step transition
monitoring timer
start (equivalent of
SD96)
M9180
SM1180
SM825
Active step
sampling trace
completion flag
QnA
M9181
SM1181
SM822
Active step
sampling trace
execution flag
QnA
M9182
SM1182
SM821
Active step
sampling trace
permission
QnA
QnA
M9196
SM1196
SM325
Operation output
at block stop
SM
1198
I/O numbers
to be
displayed
OFF
OFF
X/Y0 to 7F0
ON
OFF
X/Y800 to
FF0
OFF
ON
X/Y1000 to
17F0
ON
ON
X/Y1800 to
1FF0
SM
1197
M9197
SM1197
Switch between
blown fuse and I/O
verify error display
M9198
M9199
SM1198
SM1199
Data recovery of
online sampling
trace/status latch
App - 63
APPENDICES
M9200
M9201
M9202
M9203
M9204
Special
Special
Relay after
Relay for
Conversion Modification
SM1200
SM1201
SM1202
SM1203
SM1204
Name
QnA
ZNRD instruction
(LRDP instruction
for ACPU)
completion (for
master station)
QnA
ZNWR instruction
(LWTP instruction
for ACPU)
reception (for
master station)
QnA
ZNWR instruction
(LWTP instruction
for ACPU)
completion (for
master station)
QnA
ZNRD instruction
(LRDP instruction
for ACPU)
reception (for local
station)
QnA
QnA
OFF : Normal
ON : Abnormal
QnA
OFF
ON
QnA
QnA
QnA
SM1205
M9206
SM1206
M9208
SM1208
Corresponding
CPU
M9205
SM1207
Details
ZNRD instruction
(LRDP instruction
for ACPU)
reception (for
master station)
ZNWR instruction
(LWTP instruction
for ACPU) reception (for local
station)
M9207
Meaning
Link parameter
check results
: Match
: Mismatch
Sets master
station B and W
transmission range
(for lower link
master stations
only)
M9209
SM1209
Link parameter
check command
(for lower link
master stations
only)
M9210
SM1210
OFF : Normal
ON : Abnormal
QnA
M9211
SM1211
OFF : Normal
ON : Abnormal
QnA
M9224
SM1224
Link status
OFF : Online
ON : Offline,station-tostation test, or selfloopback test
QnA
M9225
SM1225
OFF : Normal
ON : Abnormal
QnA
M9226
SM1226
OFF : Normal
ON : Abnormal
QnA
QnA
M9227
SM1227
M9232
SM1232
Local station
operation status
QnA
M9233
SM1233
OFF : No errors
ON : Error detection
QnA
App - 64
APPENDICES
Special
Special
Relay after
Relay for
Conversion Modification
SM1235
Name
Meaning
Details
Corresponding
CPU
Local station,
remote I/O station
parameter error
detect status
OFF : No errors
ON : Error detection
QnA
OFF : No communications
ON : Communications
underway
QnA
M9236
SM1236
Local station,
remote I/O station
initial
communications
status
M9237
SM1237
Local station,
remote I/O station
error
OFF : Normal
ON : Abnormal
QnA
M9238
SM1238
Local station,
remote I/O station
forward or reverse
loop error
OFF : Normal
ON : Abnormal
QnA
M9240
SM1240
Link status
OFF : Online
ON : Offline, station-tostationtest, or selfloopback test
QnA
M9241
SM1241
OFF : Normal
ON : Abnormal
QnA
M9242
SM1242
OFF : Normal
ON : Abnormal
QnA
M9243
SM1243
Loopback
implementation
QnA
M9246
SM1246
OFF : Reception
ON : No reception
QnA
M9247
SM1247
OFF : Reception
ON : No reception
QnA
M9250
SM1250
Parameters not
received
OFF : Reception
ON : No reception
QnA
QnA
M9251
SM1251
Link relay
OFF : Normal
ON : Abnormal
M9252
SM1252
QnA
M9253
SM1253
Master station
operation status
QnA
M9254
SM1254
QnA
M9255
SM1255
OFF : Normal
ON : Abnormal
QnA
App - 65
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
M9
SM1500
Hold mode
OFF : No-hold
ON : Hold
SM1501
Hold mode
OFF : No-hold
ON : Hold
New
Q4AR
New
Q4AR
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
M9
SM1510
Operation mode
SM1511
SM1512
SM1513
S (Each END)
New
Q4AR
S (Initial)
New
Q4AR
S (Initial)
New
Q4AR
S (Initial)
New
Q4AR
SM1514
Operation mode at
CPU module change
S (Initial)
New
Q4AR
SM1515
S (Each END)
New
Q4AR
SM1516
Operation system
status
S (Status change)
New
Q4AR
App - 66
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
M9
SM1517
SM1518
Tracking execution
mode
S (Status change)/
U
New
Q4AR
New
Q4AR
New
Q4AR
SM1520
SM1520
Block 1
SM1521
SM1521
Block 2
SM1522
SM1522
Block 3
SM1523
SM1523
Block 4
SM1524
SM1524
Block 5
SM1525
SM1525
Block 6
SM1526
SM1526
Block 7
SM1527
SM1527
Block 8
SM1528
SM1528
Block 9
SM1529
SM1529
Block 10
SM1530
SM1530
Block 11
SM1531
SM1531
Block 12
SM1532
SM1532
Block 13
SM1533
SM1533
Block 14
SM1534
Block 15
SM1535
Block 16
SM1536
SM1536
Block 17
SM1537
SM1537
Block 18
SM1538
SM1538
Block 19
SM1539
SM1539
Block 20
SM1540
SM1540
Block 21
SM1541
SM1541
Block 22
SM1542
SM1542
Block 23
SM1543
SM1543
Block 24
SM1544
SM1544
Block 25
SM1545
SM1545
Block 26
SM1546
SM1546
Block 27
SM1547
SM1547
Block 28
SM1548
SM1548
Block 29
SM1534
SM1535
OFF : No trigger
ON : Trigger
App - 67
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
M9
SM1549
SM1549
Block 30
SM1550
SM1550
Block 31
SM1551
SM1551
Block 32
SM1552
SM1552
Block 33
SM1553
SM1553
Block 34
SM1554
SM1554
Block 35
SM1555
SM1555
Block 36
SM1556
SM1556
Block 37
SM1557
SM1557
Block 38
SM1558
SM1558
Block 39
SM1559
SM1559
Block 40
SM1560
SM1560
Block 41
SM1561
SM1561
Block 42
SM1562
SM1562
Block 43
SM1563
SM1563
Block 44
SM1564
SM1564
Block 45
SM1565
SM1565
Block 46
SM1566
Block 47
SM1567
Block 48
SM1568
SM1568
Block 49
SM1569
SM1569
Block 50
SM1570
SM1570
Block 51
SM1571
SM1571
Block 52
SM1572
SM1572
Block 53
SM1573
SM1573
Block 54
SM1574
SM1574
Block 55
SM1575
SM1575
Block 56
SM1576
SM1576
Block 57
SM1577
SM1577
Block 58
SM1578
SM1578
Block 59
SM1579
SM1579
Block 60
SM1580
SM1580
Block 61
SM1581
SM1581
Block 62
SM1582
SM1582
Block 63
SM1583
SM1583
Block 64
SM1590
SM1566
SM1567
Data tracking
transmission link
specification
OFF : No trigger
ON : Trigger
OFF : Normal
ON : Switching
unsuccessful
App - 68
New
Q4AR
S (Error ocurrs)
New
Q4AR
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresp
onding
Host
SM
*2
Corresponding
CPU
SM1600
Diagnosis error
OFF : No error
ON : Error
S (Each END)
SM0
Q4AR
SM1601
S (Each END)
SM1
Q4AR
SM1605
Error common
information
S (Each END)
SM5
Q4AR
SM1616
Error individual
information
S (Each END)
SM16
Q4AR
SM1653
STOP contact
STOP status
S (Each END)
SM203
Q4AR
SM1654
PAUSE contact
PAUSE status
S (Each END)
SM204
Q4AR
SM1655
STEP-RUN contact
STEP-RUN status
S (Each END)
SM205
Q4AR
App - 69
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
M9
SM1700
Tracking execution
flag
SM1712
SM1712
Block 1
SM1713
SM1713
Block 2
SM1714
SM1714
Block 3
SM1715
SM1715
Block 4
SM1716
SM1716
Block 5
SM1717
SM1717
Block 6
SM1718
SM1718
Block 7
SM1719
SM1719
Block 8
SM1720
SM1720
Block 9
SM1721
SM1721
Block 10
SM1722
SM1722
Block 11
SM1723
SM1723
Block 12
SM1724
SM1724
Block 13
SM1725
SM1725
Block 14
SM1726
SM1726
Block 15
SM1727
SM1727
Block 16
SM1728
SM1728
Block 17
SM1729
SM1729
Block 18
SM1730
SM1730
Block 19
SM1731
SM1731
Block 20
SM1732
SM1732
Block 21
SM1733
SM1733
Block 22
SM1734
SM1734
Block 23
SM1735
Block 24
SM1735
SM1736
Transfer trigger
completion flag
SM1736
Block 25
SM1737
SM1737
Block 26
SM1738
SM1738
Block 27
SM1739
SM1739
Block 28
SM1740
SM1740
Block 29
SM1741
SM1741
Block 30
SM1742
SM1742
Block 31
SM1743
SM1743
Block 32
SM1744
SM1744
Block 33
SM1745
SM1745
Block 34
SM1746
SM1746
Block 35
SM1747
SM1747
Block 36
SM1748
SM1748
Block 37
SM1749
SM1749
Block 38
SM1750
SM1750
Block 39
SM1751
SM1751
Block 40
SM1752
SM1752
Block 41
SM1753
SM1753
Block 42
SM1754
SM1754
Block 43
SM1755
SM1755
Block 44
SM1756
SM1756
Block 45
SM1757
SM1757
Block 46
SM1758
SM1758
Block 47
SM1759
SM1759
Block 48
App - 70
S (status change)
New
Q4AR
S (status change)
New
Q4AR
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
M9
SM1760
SM1760
Block 49
SM1761
SM1761
Block 50
SM1762
SM1762
Block 51
SM1763
SM1763
Block 52
SM1764
SM1764
Block 53
SM1765
SM1765
Block 54
SM1766
SM1766
Block 55
SM1767
Block 56
SM1768
Block 57
SM1769
SM1769
Block 58
SM1770
SM1770
Block 59
SM1771
SM1771
Block 60
SM1772
SM1772
Block 61
SM1773
SM1773
Block 62
SM1774
SM1774
Block 63
SM1775
SM1775
Block 64
SM1767
SM1768
Transmission trigger
end flag
OFF : Transmission
uncompleted
ON : Transmission end
App - 71
S (status change)
New
Q4AR
APPENDICES
Function of Item
Number
Name
Meaning
Explanation
Set by
(When set)
Corresponding ACPU
M9
Corresponding CPU
Indicates whether the relay is set by the system or user, and, if it is set by the system, when setting is performed.
<Set by>
S
: Set by system
U
: Set by user (sequence programs or test operations from GX Developer)
S/U
: Set by both system and user
<When set>
Indicated only for registers set by system
Each END
: Set during each END processing
Initial
: Set only during initial processing (when power supply is turned ON, or when going from STOP to RUN)
Status change
: Set only when there is a change in status
Error
: Set when error occurs
Instruction execution
: Set when instruction is executed
Request
: Set only when there is a user request (through SM, etc.)
System switching
: Set when system switching is executed.
Indicates corresponding special register in ACPU
(When the contents are changed, the special register is represented D9
New indicates the special register newly added to the QnACPU.
format change.)
SFC
App - 72
APPENDICES
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
D9
SD0
Diagnostic
errors
Diagnosis error
code
Error codes for errors found by diagnosis are stored as BIN data.
Contents identical to latest fault history information.
S (Error)
D9008
format
change
QnA
Year (last two digits) and month that SD0 data was updated is stored as
BCD 2-digit code.
SD1
SD2
b15 to
b8 b7 to
b0
Year (0 to 99) Month (1 to 12)
Clock time for
diagnosis error
occurrence
QnA
The day and hour that SD0 was updated is stored as BCD 2-digit code.
b15 to
b8 b7 to
b0
Day (1 to 31) Hour (0 to 23)
S (Error)
New
QnA
The minute and second that SD0 data was updated is stored as BCD 2digit code.
SD3
b15
to
b8 b7
to
b0
Minutes (0 to 59) Seconds (0 to 59)
QnA
b15
b8 b7
b0
to
to
Individual information Common information
category codes
category codes
SD4
Error
information
categories
Error information
category code
App - 73
S (Error)
New
QnA
APPENDICES
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
D9
Common information corresponding to the error codes (SD0) is stored
here.
The following five types of information are stored here:
The error common information type can be judged by the "common
information category code" in SD4. (The values of the "common
information category code" stored in SD4 correspond to following 1) to 5).)
1)
Slot No.
SD5
SD6
Number
SD5
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
Error common
information
Error common
information
Meaning
Slot No. 1
I/O No. 2
(Empty)
App - 74
S (Error)
New
QnA
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
D9
3)
Number
SD5
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
SD5
SD6
4)
SD7
Meaning
Time : 1 s units (0 to 999 s)
Time : 1ms units (0 to 65535ms)
(Empty)
Meaning
Number
SD5
File name
SD6
(ASCII code: 8 characters)
SD7
SD8
2EH(.)
SD9 Extension 3
(ASCII code: 3 characters)
SD10
SD11
Pattern 4
SD12
Block No.
SD13
Step No./transition condition
Sequence
step No. (L)
SD14
Sequence step No. (H)
SD15
SD8
SD9
S (Error)
New
QnA
S (Error)
New
Q4AR
15 14
0 0
to
to
4 3 2 1 0
0 0
(Not used)
SD10
Error common
information
(Bit number)
Error common
information
Number
Meaning
System switching condition
(0: automatic system switching/
1: manual system switching)
System switching direction
(0:standby system to control system/
1: control system to standby system)
Tracking flag 5
SD5
SD6
SD12
SD13
SD14
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
(Empty)
15 14
0 0
to
to
4 3 2 1 0
0 0
(Not used)
SD15
(Bit number)
Initial work data
invalid (0)/valid (1)
System data
(SFC active step information)
invalid (0)/valid (1)
System switching condition
invalid (0)/valid(1)
App - 75
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
D9
Individual information corresponding to error codes (SD0) is stored here.
There are the following seven different types of information are stored.
The error individual information type can be judged by the "individual
information category code" in SD4. (The values of the "individual
information category code" stored in SD4 correspond to following 1) to
7).)
SD16
1)
(Empty)
2)
SD17
Number
Meaning
SD16
Drive
SD17
File name
SD18
SD19 (ASCII code: 8 characters)
SD20
2EH(.)
SD21 Extension 3
SD22 (ASCII code: 3 characters)
SD23
SD24
(Empty)
SD25
SD26
SD18
3)
SD19
4)
SD21
SD22
Number
SD16
SD17
SD18
SD19
SD20
SD21
SD22
SD23
SD24
SD25
SD26
SD20
Error common
information
Error common
information
Meaning
Time : 1 s units (0 to 999 s)
Time : 1ms units (0 to 65535ms)
(Empty)
Number
Meaning
SD16
SD17
File name
SD18
(ASCII code: 8 characters)
SD19
2EH(.)
SD20 Extension 3
(ASCII code: 3 characters)
SD21
SD22
Pattern 6
SD23
Block No.
SD24
Step No./transition No.
Sequence step No. (L)
SD25
Sequence step No. (H)
SD26
*6 : Contents of pattern data
SD23
15 14
0 0
to
to
4 3 2 1 0
0 0
(Bit number)
(Not used)
SD26
Number
Meaning
SD16 Parameter No. 7
SD17
SD18
SD19
SD20
SD21
(Empty)
SD22
SD23
SD24
SD25
SD26
Number
SD16
SD17
SD18
SD19
SD20
SD21
SD22
SD23
SD24
SD25
SD26
Meaning
No.
(Empty)
*7: For details of the parameter No., refer to the User's Manual of the
CPU module used.
App - 76
S (Error)
New
QnA
APPENDICES
SDn+1
Extension
Higher 8 bits
Lower 8 bits
Higher 8 bits
Name
51H
50H
41H
QPA
51H
50H
47H
QPG
51H
43H
44H
QCD
File Type
Parameters
Sequence program
SFC program
Device comment
51H
44H
49H
QDI
51H
44H
52H
QDR
File register
51H
44H
53H
QDS
Simulation data
51H
44H
4CH
QDL
Local device
51H
54H
44H
QTD
51H
54H
4CH
QTL
51H
54H
50H
QTP
51H
54H
52H
QTR
51H
46H
44H
QFD
App - 77
APPENDICES
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
D9
SD50
Error reset
New
QnA
S (Error)
New
QnA
SD51
Battery low
latch
b5 b4 b3 b2 b1 b0
to
0
b15
Bit pattern
indicating where
battery voltage
drop occurred
CPU error
Memory card A alarm
Memory card A error
Memory card B alarm
Memory card B error
In the alarm, data can be held within the time specified for battery low.
The error indicates the complete discharge of the battery.
SD52
Battery low
Bit pattern
indicating where
battery voltage
drop occurred
S (Error)
New
QnA
SD53
AC/DC DOWN
detection
Number of times
for AC/DC DOWN
detection
Every time the input voltage falls to or below 85% (AC power)/65% (DC
power) of the rating during operation of the CPU module, the value is
incremented by 1 and stored in BIN code.
S (Error)
D9005
QnA
S (Error)
QnA
1)
2)
SD54
Error detection
state
b15
to
8th
module
b9 b8
to
1st
8th
module module
Information of 2)
b0
1st
module
Information of 1)
SD60
Number of
module with
blown fuse
Number of module
with blown fuse
Value stored here is the lowest station I/O number of the module with the blown fuse.
S (Error)
QnA
SD61
I/O module
verify error
number
The lowest I/O number of the module where the I/O module verification number took place.
S (Error)
QnA
App - 78
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
D9
SD62
Annunciator
number
Annunciator
number
S (Instruction
execution)
D9009
QnA
SD63
Number of
annunciators
Number of
annunciators
S (Instruction
execution)
D9124
QnA
SD64
SD65
SD68
SD69
SD71
Table of
detected
annunciator
numbers
Annunciator
detection number
SD75
SD76
SD77
SD78
SD79
CHK number
CHK number
SD90
SD91
SD92
SD93
SD94
SD95
SD96
SD97
SD98
SD99
Step transition
monitoring timer
setting value
(Enabled only
when SFC
program exists)
D9129
D9130
D9131
SD62 0 50 50 50 50 50 50 50 50 50 50 50 99 (Number
detected)
D9132
SD63 0
SD64
SD65
SD66
SD67
SD68
SD69
SD70
SD71
SD72
SD73
SD74
SD75
SD76
SD77
SD78
SD79
SD74
D9128
SET SET SET RST SET SET SET SET SET SET SET
F50 F25 F99 F25 F15 F70 F65 F38 F110 F151 F210 LEDR
SD70
SD80
D9127
SD67
SD73
D9126
The F numbers turned OFF by RST F are deleted from SD64 - SD79,
and the F numbers stored after the deleted F numbers are shifted to the
preceding registers.
SD66
SD72
D9125
8 (Number of
annunciators
detected)
0 50 50 50 50 50 50 50 50 50 50 50 99
0 0 25 25 99 99 99 99 99 99 99 99 15
0 0 0 99 0 15 15 15 15 15 15 15 70
0 0 0 0 0 0 70 70 70 70 70 70 65
0 0 0 0 0 0 0 65 65 65 65 65 38
0 0 0 0 0 0 0 0 38 38 38 38 110
0 0 0 0 0 0 0 0 0 110 110 110 151
0 0 0 0 0 0 0 0 0 0 151 151 210
0 0 0 0 0 0 0 0 0 0 0 210 0
0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0
New
QnA
New
New
New
New
(Number
detected)
New
New
New
Error codes detected by the CHK instruction are stored as BCD code.
Corresponds to
SM90
Corresponds to
SM91
Corresponds to
SM92
Corresponds to
SM93
Corresponds to
SM94
Corresponds to
SM95
Corresponds to
SM96
Corresponds to
SM97
Corresponds to
SM98
Corresponds to
SM99
S (Instruction
execution)
S (Instruction
execution)
New
QnA
D9108
D9109
D9110
b15
to
b8 b7
to
b0
D9111
D9112
F number setting
(0 to 255)
App - 79
QnA
D9113
D9114
New
New
New
APPENDICES
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
D9
The CPU switch status is stored in the following format:
b15
to
b12 b11 to
b8 b7
3)
Status of switch
Status of CPU
switch
b4 b3
2)
Empty
to
b0
1)
0: RUN
1: STOP
2: L.CLR
SD200
to
S (Every END
processing)
New
QnA
S (Status
change)
New
QnA
S (Every END
processing)
D9015
format
change
QnA
The following bit patterns store the status of the LEDs on the CPU
module:
0 is off, 1 is on, and 2 is flicker
b15
SD201
LED status
Status of
CPU-LED
to
8)
b12b11
7)
to
b8 b7
6)
5)
to
4)
b4 b3
3)
to
2)
b0
1)
b15
to
b12 b11
to
b8 b7
to
2)
Operating
status of CPU
Operating status
of CPU
0:
1:
2:
3:
b4 b3
to
b0
1)
RUN
STEP-RUN
STOP
PAUSE
2): STOP/PAUSE
cause
Note: Priority is
earliest first
4: Error
App - 80
APPENDICES
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
D9
SD207
SD208
Priorities 1 to 4
LED display
priority ranking
SD209
Priorities 5 to 8
Priorities 9 to 10
b7 to b4 b3 to b0
Priority 1
Priority 2
Priority 5
Priority 6
Priority 10 Priority 9
D9038
Default Value
SD207 = 4321H
SD208 = 8765H
(0765H for Redundant CPU)
SD209 = 00A9H
No display is made if "0" is set.
D9039
format
change
QnA
New
The year (last two digits) and month are stored as BCD code as shown
below:
SD210
Clock data
b8 b7 to
b4 b3 to
b0 Example:
D9025
July, 1993
9307H
Year
Month
The day and hour are stored as BCD code as shown below:
Clock data
b8 b7 to
b4 b3 to
b0 Example:
31st, 10 a.m.
3110H
Day
S (Request)/U
D9026
QnA
Hour
The minutes and seconds (after the hour) are stored as BCD code as
shown below:
SD212
Clock data
Clock data
(minute, second)
b8 b7
to
b4 b3
to
b0 Example:
D9027
35 min, 48 s
3548H
Minute
Second
b15
to b12 b11
to
b8 b7
to b4 b3 to
b0 Example:
Friday
0005H
SD213
Clock data
Clock data
(day of week)
App - 81
S (Request)/U
D9028
QnA
APPENDICES
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
D9
LED display ASCII data (16 characters) stored here.
SD220
b15
SD221
SD220
SD222
SD221
SD223
SD224
LED display
data
SD222
LED display data
SD223
SD224
SD225
SD225
SD226
SD226
SD227
SD227
to
b8 b7
to
b0
SD251
Head I/O
number for
replacement
Stores the upper two digits of the head I/O number of an I/O module that
is removed/replaced in the online status (with power on). (Default value:
100H).
SD253
RS422
transmission
speed
RS422
transmission
speed
App - 82
S (When
changed)
New
QnA
D9094
Q2A(S1)
Q3A
Q4A
Q4AR
S (When
changed)
New
QnA
APPENDICES
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
D9
SD254
SD255
SD256
SD257
SD258
SD259
MELSECNET/
10
information
Number of
modules installed
I/O No.
Network
No.
Group
number
Station No.
Standby
information
SD260
to
SD264
Information from
2nd module
SD265
to
SD269
Information from
3rd module
SD270
to
SD274
Information from
4th module
SD280
CC-Link error
Error
dete
ction
statu
s
When Xn0 of the mounted CC-Link module turns ON, the bit of the
corresponding station turns to 1 (ON).
When either Xn1 or XnF of the mounted CC-Link module turns OFF, the
bit of the corresponding station turns to 1 (ON).
Turns to 1 (ON) when communication between the mounted CC-Link
module and CPU module cannot be made.
b15
8th
module
to
b9 b8
1st 8th
module module
Information of 2)
to
SD290
SD291
Number of points
assigned for Y
SD292
Number of points
assigned for M
SD293
Number of points
assigned for L
SD294
Number of points
assigned for B
SD295
Number of points
assigned for F
Number of points
assigned for SB
Number of points
assigned for V
Number of points
assigned for S
SD299
Number of points
assigned for T
SD300
Number of points
assigned for ST
SD301
Number of points
assigned for C
SD302
Number of points
assigned for D
SD303
Number of points
assigned for W
SD304
Number of points
assigned for SW
SD297
SD298
Device
assignment
(Same as
parameter
contents)
New
QnA
S (Error)
New
QnA
S (Initial)
New
QnA
b0
1st
module
Information of 1)
Number of points
assigned for X
SD296
S (Initial)
App - 83
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
D9
SD341
I/O No.
Network
No.
Group No.
Station No.
IP address
Error code
SD342
SD343
SD344
SD345
to
SD346
SD347
Ethernet
information
SD340
No. of modules
installed
SD348
to
SD354
Information from
2nd module
SD355
to
SD361
Information from
3rd module
SD362
to
SD368
Information from
4th module
SD380
Ethernet
instruction
reception status
Instruction
reception status of
1st module
b15 to b8 b7 b6 b5 b4 b3 b2 b1 b0
0
Not used
Instruction reception
status of channel 1
Instruction reception
status of channel 2
Instruction reception
status of channel 3
Instruction reception
status of channel 4
Instruction reception
status of channel 5
Instruction reception
status of channel 6
Instruction reception
status of channel 7
Instruction reception
status of channel 8
S (Initial)
New
QnA
S (Initial)
New
QnA
S (Initial)
D9060
QnA
SD392
Software
version
Internal system
software version
App - 84
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
D9
SD412
1 second
counter
Number of counts
in 1-second units
SD414
2n second clock
setting
2n second clock
units
SD420
Scan counter
Number of counts
in each scan
SD430
Number of counts
in each scan
S (Status
change)
D9022
QnA
New
QnA
Incremented by 1 for each scan execution after the CPU module is set to
RUN.
(Not counted by the scan in an initial execution type program.)
Count repeats from 0 to 32767 to -32768 to 0
S (Every END
processing)
New
QnA
Incremented by 1 for each scan execution after the CPU module is set to
RUN.
Count repeats from 0 to 32767 to -32768 to 0
Used only for low speed execution type programs
S (Every END
processing)
New
QnA
App - 85
APPENDICES
Number
Name
Meaning
Corresponding
ACPU
Explanation
Set by
(When Set)
Corresponding
CPU
S (Status
change)
New
QnA
S (Every END
processing)
New
QnA
S (Every END
processing)
D9017
format
change
D9
SD500
Execution
program No.
Program No. in
execution
SD510
Low speed
excution type
program No.
Low speed
execution type
program No. in
execution
SD520
Current scan
time
SD521
SD522
SD523
SD524
Minimum scan
time (in 1 ms
units)
Minimum scan
time
SD525
Minimum scan
time (in 100 s
units)
SD526
Maximum scan
time (in 1 ms
units)
Maximum scan
time
SD527
SD528
SD529
SD532
SD533
SD534
SD535
Current scan
time for low
speed execution
type programs
Minimum scan
time for low
speed execution
type programs
Maximum scan
time for low
speed execution
type programs
SD540
END processing
time
Maximum scan
time (in 100 s
units)
Current scan time
(in 1 ms units)
Current scan time
(in 100 s units)
Minimum scan
time (in 1 ms
units)
Minimum scan
time (in 100 s
units)
Maximum scan
time (in 1 ms
units)
Maximum scan
time (in 100 s
units)
END processing
time (in 1 ms
units)
SD541
END processing
time (in 100 s
units)
SD542
Constant scan
wait time (in 1 ms
units)
Constant scan
wait time
SD543
Constant scan
wait time (in 100
s units)
QnA
S (Every END
processing)
New
S (First END
processing)
New
S (Every END
processing)
D9018
format
change
S (Every END
processing)
New
D9019
format
change
QnA
QnA
Stores the maximum value of the scan time except that of an initial
execution type program into SD526 and SD527. (Measurement is made
in 100 s units.)
SD526: Stores the ms place. (Storage range: 0 to 65535)
SD527: Stores the s place.
S (Every END
processing)
Stores the current scan time of a low speed execution type program into
SD528 and SD529.
(Measurement is made in 100 s units.)
SD528: Stores the ms place. (Storage range: 0 to 65535)
SD529: Stores the s place. (Storage range: 0 to 900)
S (Every END
processing)
New
QnA
Stores the minimum value of the scan time of a low speed execution
type program into SD532 and SD533.
(Measurement is made in 100 s units.)
SD532: Stores the ms place. (Storage range: 0 to 65535)
SD533: Stores the s place. (Storage range: 0 to 900)
S (Every END
processing)
New
QnA
Stores the maximum value of the scan time except that of the first scan
of a low speed execution type program into SD534 and SD535.
(Measurement is made in 100 s units.)
SD534: Stores the ms place. (Storage range: 0 to 65535)
SD535: Stores the s place. (Storage range: 0 to 900)
S (Every END
processing)
New
QnA
Stores the time from the end of a scan execution type program to the
start of the next scan into SD540 and SD541.
(Measurement is made in 100 s units.)
SD540: Stores the ms place. (Storage range: 0 to 65535)
SD541: Stores the s place. (Storage range: 0 to 900) (Storage range: 0
to 900)
S (Every END
processing)
New
QnA
Stores the wait time for constant scan setting into SD542 and SD543.
(Measurement is made in 100 s units. (For the Universal model QCPU,
in 1 s units.))
SD542: Stores the ms place. (Storage range: 0 to 65535)
SD543: Stores the s place. (Storage range: 0 to 900 (For the Universal
model QCPU, storage range is 0 to 999))
S (Every END
processing)
New
QnA
App - 86
QnA
New
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
D9
SD544
Cumulative
execution time
for low speed
execution type
programs
Cumulative
execution time for
low speed
execution type
programs
(in 1 ms units)
SD545
Cumulative
execution time for
low speed
execution type
programs
(in 100 s units)
SD546
Execution time
for low speed
execution type
programs
SD547
SD548
Scan execution
type program
execution time (in
1 ms units)
Scan execution
type program
execution time
SD549
SD550
Service interval
measurement
module
SD551
Service interval
time
SD552
Scan execution
type program
execution time (in
100 s units)
Unit/module No.
Module service
interval
(in 1 ms units)
Module service
interval
(in 100 s units)
S (Every END
processing)
New
QnA
Stores the execution time of a low speed execution type program during
one scan into SD546 and SD547.
(Measurement is made in 100 s units.)
SD546: Stores the ms place. (Storage range: 0 to 65535)
SD547: Stores the s place. (Storage range: 0 to 900)
Stored every scan.
S (Every END
processing)
New
QnA
Stores the execution time of a scan execution type program during one
scan into SD548 and SD549.
(Measurement is made in 100 s units.)
SD548: Stores the ms place. (Storage range: 0 to 65535)
SD549: Stores the s place. (Storage range: 0 to 900)
Stored every scan.
S (Every END
processing)
New
QnA
New
QnA
S (Request)
New
QnA
Stores the service interval for the module specified in SD550 into SD551
and SD552 when SM551 is turned ON.
(Measurement is made in 100 s units.)
SD551: Stores the ms place. (Storage range: 0 to 65535)
SD552: Stores the s place. (Storage range: 0 to 900)
App - 87
APPENDICES
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
D9
Indicates the type of memory card A installed.
b15
to
b8 b7
to
b4 b3
to
b0
SD600
Memory card A
typs
Drive 1
(RAM) type
Memory card A
typs
S (Initial and
card removal)
New
QnA
Drive 2
2: E 2 PROM
3: Flash ROM
(ROM) type
SD602
Drive 1
(Memory card
RAM) capacity
Drive 1 capacity
S (Initial and
card removal)
New
QnA
SD603
Drive 2
(Memory card
ROM) capacity
Drive 2 capacity
S (Initial and
card removal)
New
QnA
S (Status
change)
New
QnA
S (Initial/Card
installation and
removal)
New
Q2A(S1)
Q3A
Q4A
Q4AR
The use conditions for memory card A are stored as bit patterns.
(In use when ON)
The significance of these bit patterns is indicated below:
SD604
Memory card A
use conditions
Memory card A
use conditions
b1 : Parameters (QPA)
SD620
Memory card B
typs
to
0
b8 b7
to
b4 b3
Memory card B
typs
to
b0
Drive 3
(RAM)
Drive 4
(ROM)
SD622
Drive 3
(Standard RAM)
capacity
Drive 3 capacity
S (Initial/Card
installation and
removal)
New
Q2A(S1)
Q3A
Q4A
Q4AR
SD623
Drive 4
(Standard ROM)
capacity
Drive 4 capacity
S (Initial/Card
installation and
removal)
New
Q2A(S1)
Q3A
Q4A
Q4AR
S (Status
change)
New
Q2A(S1)
Q3A
Q4A
Q4AR
S (Status
change) *10
New
QnA
The use conditions for memory card B are stored as bit patterns.
(In use when ON)
The significance of these bit patterns is indicated below:
SD624
SD640
Memory card B
use conditions
File register
drive
Memory card B
use conditions
Drive number:
b1 : Parameters (QPA)
App - 88
APPENDICES
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
D9
Stores file register file name (with extension) selected at parameters or
by use of QDRSET instruction as ASCII code.
SD641
SD642
SD643
SD644
SD645
b15
b8
to
2nd character
4th character
6th character
8th character
1st character of
SD645
extension
SD641
SD642
SD643
SD644
SD646
3rd character of
the extension
b7
b0
to
1st character
3rd character
5th character
7th character
S (Status
change)
New
QnA
2EH(.)
2nd character of
the extension
SD647
File register
capacity
File register
capacity
Stores the data capacity of the currently selected file register in 1 k word
units.
S (Status
change)
New
QnA
SD648
File register
block number
S (Status
change)
D9035
QnA
Comment drive
Comment drive
number
S (Status
change)
New
QnA
S (Status
change)
New
QnA
S (Initial)
New
QnA
S (Initial)
New
QnA
SD650
SD651
SD652
SD653
SD654
SD655
Comment file
name
Comment file
name
SD656
Boot designation
file drive number
SD660
SD662
SD664
SD665
SD666
b7
b0
to
1st character
3rd character
5th character
7th character
2EH(.)
2nd character of
the extension
Stores the drive number where the boot designation file (*.QBT) is being
stored.
Stores the file name of the boot designation file (*.QBT).
SD661
SD663
b15
b8
to
2nd character
4th character
6th character
8th character
1st character of
SD655
the extension
3rd character of
SD656
the extension
SD651
SD652
SD653
SD654
Boot operation
designation file
b15
b8
to
2nd character
4th character
6th character
8th character
1st character of
SD665
the extension
3rd character of
SD666
the extension
SD661
SD662
SD663
SD664
b7
b0
to
1st character
3rd character
5th character
7th character
2EH(.)
2nd character of
the extension
App - 89
APPENDICES
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
D9
Mask pattern
Mask pattern
Number of
empty
communication
request
registration
areas
0 to 32
SD705
SD706
SD714
New
QnA
S (During
execution)
D9081
QnA
S (During
execution)
New
QnA
S/U
New
QnA
SD715
SD716
IMASK
instruction mask
pattern
b1
b0
SD715 l15
to
l1
l0
SD716 l31
to
l17
l16
SD717 l47
to
l33
l32
b15
Mask pattern
SD717
SD718
Accumulator
Accumulator
SD730
No. of empty
areas for CCLink
communication
reguest register
area
0 to 32
Stores the number of empty registration area for the request for
communication with the intelligent device station connected to
A(1S)J61QBT61.
S (During
execution)
New
QnA
SD736
PKEY input
PKEY input
S (During
execution)
New
QnA
SD719
App - 90
APPENDICES
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
D9
SD738
SD739
SD740
SD741
SD742
SD743
SD744
SD745
SD746
SD747
SD748
SD749
SD750
SD751
SD752
SD753
SD754
Message
storage
Message storage
Remaining No.
of simultaneous
execution of
CC-Link
dedicated
instruction
0 to 32
SD755
SD756
SD757
SD758
SD759
SD760
SD761
SD762
SD763
SD764
SD765
SD766
SD767
SD768
SD738
SD739
SD740
SD741
SD742
SD743
SD744
SD745
SD746
SD747
SD748
SD749
SD750
SD751
SD752
SD753
SD754
SD755
SD756
SD757
SD758
SD759
SD760
SD761
SD762
SD763
SD764
SD765
SD766
SD767
SD768
SD769
b15
b8
to
2nd character
4th character
6th character
8th character
10th character
12th character
14th character
16th character
18th character
20th character
22nd character
24th character
26th character
28th character
30th character
32nd character
34th character
36th character
38th character
40th character
42nd character
44th character
46th character
48th character
50th character
52nd character
54th character
56th character
58th character
60th character
62nd character
64th character
b7
b0
to
1st character
3rd character
5th character
7th character
9th character
11th character
13th character
15th character
17th character
19th character
21st character
23rd character
25th character
27th character
29th character
31st character
33rd character
35th character
37th character
39th character
41st character
43rd character
45th character
47th character
49th character
51st character
53rd character
55th character
57th character
59th character
61st character
63rd character
S (During
execution)
New
QnA
New
QnA
SD769
SD780
App - 91
APPENDICES
(7) Debug
Table App. 3.9. Special register
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
D9
Stores file name (with extension) from point in time when status latch
was conducted as ASCII code.
SD806
SD807
b15
SD808
SD809
SD810
SD811
b8
to
b7
to
b0
SD806
SD807
SD808
SD809
2nd character
4th character
6th character
8th character
1st character
3rd character
5th character
7th character
SD810
1st character of
the extension
2EH(.)
SD811
3rd character of
the extension
2nd character of
the extension
S (During
execution)
New
QnA
S (During
execution)
D9055
format
change
QnA
Stores step number from point in time when status latch was conducted.
SD812
Pattern 1
SD812
SD813
Block No.
SD814 Step No./transition condition No.
SD815
Sequence step No. (L)
SD816
Sequence step No. (H)
SD813
SD814
SD815
Status latch
step
15 14
0 0
to
to
4 3 2 1 0
0 0
(Not used)
SD816
(Bit number)
App - 92
APPENDICES
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
D9
SD900
Drive where
power was
interrupted
SD902
SD904
SD905
SD906
SD910
b15
b8
to
2nd character
4th character
6th character
8th character
1st character of
SD905
the extension
3rd character of
SD906
the extension
SD901
SD902
SD903
SD904
SD912
SD913
SD914
SD915
SD916
SD918
SD919
SD920
SD921
SD922
SD923
SD924
SD925
New
QnA
S (Status
change)
New
QnA
S (During
execution)
New
QnA
b7
b0
to
1st character
3rd character
5th character
7th character
2EH(.)
2nd character of
the extension
SD911
SD917
S (Status
change)
Stores file name (with extension) in ASCII code if file was being
accessed during power loss.
SD901
SD903
Stores drive number if file was being accessed during power loss.
RKEY input
RKEY input
SD910
SD911
SD912
SD913
SD914
SD915
SD916
SD917
SD918
SD919
SD920
SD921
SD922
SD923
SD924
SD925
b15
b8
to
2nd character
4th character
6th character
8th character
10th character
12th character
14th character
16th character
18th character
20th character
22nd character
24th character
26th character
28th character
30th character
32nd character
b7
b0
to
1st character
3rd character
5th character
7th character
9th character
11th character
13th character
15th character
17th character
19th character
21st character
23rd character
25th character
27th character
29th character
31st character
App - 93
APPENDICES
App - 94
APPENDICES
D9000
Special
Register
after
Conversion
Special
Register for
Modification
SD1000
Name
Fuse blown
Details
Corresponding
CPU
When fuse blown modules are detected, the first I/O number of the
lowest number of the detected modules is stored in hexadecimal.
(Example: When fuses of Y50 to 6F output modules have blown,
"50" is stored in hexadecimal)
To monitor the number by peripheral devices, perform monitor
operation given in hexadecimal.
(Cleared when all contents of SD1100 to SD1107 are reset to 0.)
Fuse blow check is executed also to the output modules of remote
I/O stations.
QnA
Meaning
Number of module
with blown fuse
D9001
SD1001
Fuse blown
Setting
switch
Stored
data
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Number of module
with blown fuse
Base unit
slot No.
0
1
2
3
4
5
6
7
QnA
For the remote I/O station, the value of (module I/O No./10H) + 1 is
stored.
D9002
SD1002
I/O module
verify error
If I/O modules, of which data are different from data entered, are
detected when the power is turned on, the first I/O number of the
lowest number unit among the detected units is stored in
hexadecimal. (Storing method is the same as that of SD1000.)
To monitor the number by peripheral devices, perform monitor
operation given in hexadecimal.
(Cleared when all contents of SD1116 to SD1123 are reset to 0.)
I/O module verify check is executed also to the modules of remote
I/O terminals.
QnA
b15
to
b8
b7
to
b0
8th 7th 6th 5th 4th 3rd2nd1st 8th 7th 6th 5th 4th 3rd 2nd1st
D9004
D9005
D9008
SD1004
SD1005
SD1008
SD0
MINI link
master module
errors
AC DOWN
counter
Self-diaghostic
error
Self-diaghostic error
number
QnA
QnA
QnA
QnA
App - 95
APPENDICES
Special
Register
after
Conversion
Special
Register for
Modification
Name
Meaning
Corresponding
CPU
Details
D9009
SD1009
SD62
Annunciator
detection
F number at which
external failure has
occurred
Q2AS
Q2A
Q3A
Q4A
Q4AR
Remote RUN/STOP
by computer
D9015
SD1015
SD203
Operating
status of CPU
Operating status of
CPU
RUN
STOP
PAUSE 1
Status in program
*1:
D9016
Program
number
SD1016
0: Main program
(ROM)
1: Main program
(RAM)
2: Subprogram 1
(RAM)
3: Subprogram 2
(RAM)
4: Subprogram 3
(RAM)
5: Subprogram 1
(ROM)
6: Subprogram 2
(ROM)
7: Subprogram 3
(ROM)
8: Main program
Except below
STOP
Instruction
execution
b8 b7
to
b4 b3
to
b0
RUN
STOP
PAUSE 1
STEP RUN
QnA
RUN
STOP
PAUSE 1
When the CPU mdoule is in RUN mode and SM1040 is off, the
CPU module remains in RUN mode if changed to PAUSE
mode.
(E2PROM)
9: Subprogram 1
(E2PROM)
A: Subprogram 2
(E2PROM)
B: Subprogram 3
(E2PROM)
D9017
SD1017
SD520
Scan time
QnA
D9018
SD1018
SD524
Scan time
Scan time
(10 ms units)
At every END, the scan time is stored in BIN code and always
rewritten.
QnA
If scan time is larger than the content of SD526, the value is newly
stored at each END. Namely, the maximum value of scan time is
stored into SD526 in BIN code.
QnA
D9019
SD1019
SD526
Scan time
App - 96
APPENDICES
Special
Register
after
Conversion
D9020
SD1020
D9021
SD1021
D9022
SD1022
Special
Register for
Modification
Details
Corresponding
CPU
Constant scan
Scan time
Scan time
(1 ms units)
At every END, the scan time is stored in BIN code and always
rewritten.
QnA
QnA
Name
1 second
counter
SD412
Meaning
The year (last two digits) and month are stored as BCD code as
shown below.
D9025
SD1025
Clock data
Clock data
(year, month)
b8 b7 to
b0 Example:
b4 b3 to
1987, July
H8707
Year
QnA
Month
The day and hour are stored as BCD code as shown below.
SD1026
Clock data
b8 b7 to
b4 b3 to b0
Clock data
(day, hour)
Day
Example:
31st, 10 a.m.
H3110
QnA
Hour
The minute and second are stored as BCD code as shown below.
SD1027
Clock data
b4 b3 to b0 Example:
b8 b7 to
Clock data
(minute, second)
35 min, 48 sec.
H3548
Minute
QnA
Second
D9028
D9035
D9036
SD1028
SD1035
SD648
Clock data
Extension file
register
to
b8 b7
to
b4 b3
to
b0
Example:
Friday
H0005
Day of the week
Clock data
(day of week)
Sunday
Monday
Tuesday
Wednesday
Thursday
Friday
Saturday
Stores the block No. of the extension file register being used in
BCD code.
SD1036
SD1037
b12 b11
Designate the device number for the extension file register for
direct read and write in 2 words at SD1036 and SD1037 in BIN
data.
Use consecutive numbers beginning with R0 of block No. 1 to
designate device numbers.
Extension file
registerfor
designation of
device number
D9037
to
QnA
QnA
SD1037,SD1036
Device No. (BIN data)
16384
to
to
App - 97
Block No.2
area
APPENDICES
D9038
Special
Register
after
Conversion
Special
Register for
Modification
SD1038
SD207
Name
Meaning
Priorities 1 to 4
LED display
priority ranking
SD207
SD1039
SD208
Priorities 5 to 7
QnA
Priority 7
SD208
D9039
Corresponding
CPU
Details
Priority 6
Priority 5
For details, refer to the applicable CPUs User's Manual and the
ACPU Programming manual (Fundamentals).
QnA
D9044
D9049
SD1044
For sampling
trace
SD1049
Block number of
extension file register
D9050
SD1050
SFC program
error number
D9051
SD1051
Error block
D9052
SD1052
Error step
D9053
SD1053
Error transition
Transition condition
number where error
occurred
D9054
SD1054
Error sequence
step
Sequence step
number where error
occurred
D9055
SD1055
SD812
Status latch
execution step
number
Block No.
(BIN)
Upper 8 bits
QnA
Step No.
(BIN)
Lower 8 bits
Upper byte
D9060
SD1060
SD392
Software
version
Software version of
internal software
QnA
Note: The software version of the initial system may differ from the
version indicated by the version information printed on the rear
of the case.
D9072
D9081
SD1072
PLC
communication
check
SD1081
Number of
empty blocks in
communications
request
registrtion area
Number of empty
blocks in
communications
request registration
area
QnA
SD714
App - 98
APPENDICES
Special
Register
after
Conversion
Special
Register for
Modification
Name
Meaning
Corresponding
CPU
Details
1 s to 65535 s
Sets the time check time of the data link instructions (ZNRD,
ZNWR) for the MELSECNET/10.
Setting range : 1 s to 65535 s (1 to 65535)
Setting unit: 1 s
Default value : 10 s (If 0 has been set, default 10 s is applied)
D9085
SD1085
Register for
setting time
check value
D9090
SD1090
Number of
special
functions
modules over
Number of special
functions modules
over
D9091
SD1091
Detailed error
code
Self-diagnosis
detailed error code
D9094
SD1094
Head I/O
number of I/O
module to be
replaced
Stores the first two digits of the head I/O number of the I/O module,
which will be dismounted/mounted online (with power on), in BIN
value.
Example) Input module X2F0 H2F
D9100
SD1100
D9101
SD1101
D9102
SD1102
D9103
SD251
b15 b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
SD1103
D9104
SD1104
D9105
SD1105
D9106
SD1106
D9107
SD1107
D9108
SD1108
D9109
SD1109
D9110
SD1110
D9111
SD1111
D9112
Fuse blown
module
SD1100 0
SD1101 0
SD1107 0
1
(YC0)
Y7
B0
1
(Y80)
0
0
Y7
30
SD1113
D9114
SD1114
QnA
Set the value of the step transition monitoring timer and the
annunciator number (F number) that will be turned ON when the
monitoring timer times out.
b15
Step transfer
monitoring timer
setting
to
b8 b7
to
b0
QnA
F number setting
(02 to 255)
SD1112
D9113
QnA
App - 99
APPENDICES
Special
Register
after
Conversion
D9116
SD1116
D9117
SD1117
D9118
SD1118
Special
Register for
Modification
Name
Meaning
Corresponding
CPU
Details
When I/O modules, of which data are different from those entered
at power-ON, have been detected, the I/O module numbers (in
units of 16 points) are entered in bit pattern. (Preset I/O module
numbers set in parmeters when parameter setting has been
performed.)
b15 b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 XY
SD1116 0
D9119
SD1119
D9120
SD1120
D9121
SD1121
D9122
SD1122
D9123
SD1123
I/O module
verification error
SD1117 0
SD1123 0
XY
7B0
XY
190
QnA
D9124
SD1124
SD63
Number of
annuciator
detections
Number of annuciator
detections
QnA
D9125
SD1125
SD64
D9126
SD1126
SD65
D9127
SD1127
SD66
D9128
SD1128
SD67
D9129
D9130
D9131
D9132
SD1129
SD1130
SD1131
SD1132
SD68
SD69
SD70
SD71
Annunciator
detection
number
Annunciator detection
number
SD62
50 50 50 50 50 50 50 50 50 50 50 99
SD63
SD64
50 50 50 50 50 50 50 50 50 50 50 99
SD65
25 25 99 99 99 99 99 99 99 99 15
SD66
99
15 15 15 15 15 15 15 70
SD67
70 70 70 70 70 70 65
SD68
65 65 65 65 65 38
SD69
38 38 38 38 110
SD70
SD71
App - 100
QnA
APPENDICES
Special
Register
after
Conversion
Special
Register for
Modification
Name
0:
2:
D9200
SD1200
ZNRD
instruction
processing
result
(LRDP for
ACPU)
3:
4:
0:
2:
D9201
D9202
SD1201
SD1202
ZNWR
instruction
processing
result
(LWTP for
ACPU)
Details
Corresponding
CPU
Normal end
ZNRD
instruction
setting fault
Error at
relevant station
Relevant
station ZNRD
execution
disabled
QnA
Normal end
ZNWR
instruction
setting fault
Error at
relevant station
Relevant
station ZNWR
execution
disabled
QnA
Meaning
3:
4:
QnA
Bit
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Local station
link type
SD1203 L32 L31 L30 L29 L28 L27 L26 L25 L24 L23 L22 L21 L20 L19 L18 L17
SD1241 L48 L47 L46 L45 L44 L43 L42 L41 L40 L39 L38 L37 L36 L35 L34 L33
SD1242 L64 L63 L62 L61 L60 L59 L58 L57 L56 L55 L54 L53 L52 L51 L50 L49
D9203
SD1203
QnA
Master
station
0:
1:
2:
D9204
SD1204
Link status
3:
4:
5:
Forward loop,
during data link
Reverse loop,
during data link
Loopback
implemented in
forward/
reverse
directions
Loopback
implemented
only in forward
direction
Loopback
implemented
only in reverse
direction
Data link
disabled
Station
No.1
Station
No.2
Forward loop
Station n
Reverse loop
Master
station
Station
No.1
Forward loop
Station
No.2
Station n
Reverse loop
Master
station
Station
No.1
Forward loopback
App - 101
Station
No.2
Station
No.3
Reverse loopback
Station n
QnA
APPENDICES
Special
Register
after
Conversion
Special
Register for
Modification
Name
Meaning
0:
1:
2:
D9204
SD1204
Link status
3:
4:
5:
Forward loop,
during data link
Reverse loop,
during data link
Loopback
implemented in
forward/
reverse
directions
Loopback
implemented
only in forward
direction
Loopback
implemented
only in reverse
direction
Data link
disabled
Corresponding
CPU
Details
QnA
Master
station
Station
No.1
Station
No.2
Station
No.3
Station n
Forward loopback
QnA
Master
station
Station
No.1
Station
No.2
Station
No.3
Station n
Reverse loopback
Stores the local or remote I/O station number at which loopback is
being executed.
D9205
SD1205
Station
implementing
loopback
Station that
implemented forward
loopback
Station that
implemented reverse
loopback
Master
station
Station
No.1
Forward loopback
Station
No.2
Station
No.3
Station n
QnA
Reverse loopback
D9206
SD1206
Station
implementing
loopback
D9210
SD1210
Number of
retries
Stored as cumulative
value
QnA
D9211
SD1211
Number of
times loop
selected
Stored as cumulative
value
Stores the number of times the loop line has been switched to reverse
loop or loopback.
Count stops at maximum of "FFFFH".
To return the value to "0", perform reset operation.
QnA
D9212
SD1212
Local station
operation status
Stores the local station numbers which are in STOP or PAUSE mode.
Local station
operation status
Device
number
D9213
SD1213
D9214
SD1214
Local station
operation status
D9215
SD1215
Local station
operation status
D9216
SD1216
Local station
error detect
status
D9217
SD1217
Local station
error detect
status
Bit
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
D9218
SD1218
D9219
SD1219
Local station
error detect
status
QnA
Bit
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Local station
error detect
status
QnA
App - 102
QnA
APPENDICES
D9220
D9221
D9222
D9223
D9224
D9225
D9226
Special
Register
after
Conversion
SD1220
SD1221
SD1222
SD1223
SD1224
SD1225
SD1226
Special
Register for
Modification
Name
Meaning
Local station
parameters
non-conforming;
remote I/O
station I/O
assignment
error
Local station
parameters
non-conforming;
remote I/O
station I/O
assignment
error
Local station
parameters
non-conforming;
remote I/O
station I/O
assignment
error
Local station
parameters
non-conforming;
remote I/O
station I/O
assignment
error
Local station
and remote I/O
station initial
communications
underway
Local station
and remote I/O
station initial
communications
underway
Local station
and remote I/O
station initial
communications
underway
D9227
SD1227
Local station
and remote I/O
station initial
communications
underway
D9228
SD1228
Local station
and remote I/O
station error
D9229
SD1229
SD1226
SD1230
D9231
SD1231
Local station
and remote I/O
station error
L/R
14
L/R
30
L/R L/R L/R
48 47 46
L/R L/R L/R
64 63 62
L/R
13
L/R
29
L/R
45
L/R
61
L/R
12
L/R
28
L/R
44
L/R
60
L/R
11
L/R
27
L/R
43
L/R
59
L/R
10
L/R
26
L/R
42
L/R
58
L/R
9
L/R
25
L/R
41
L/R
57
L/R
8
L/R
24
L/R
40
L/R
56
L/R
7
L/R
23
L/R
39
L/R
55
L/R
6
L/R
22
L/R
38
L/R
54
L/R
5
L/R
21
L/R
37
L/R
53
L/R
4
L/R
20
L/R
36
L/R
52
L/R
3
L/R
19
L/R
35
L/R
51
L/R
2
L/R
18
L/R
34
L/R
50
L/R
1
L/R
17
L/R
33
L/R
49
QnA
D9230
QnA
SD1227
Local station
and remote I/O
station error
Local station
and remote I/O
station error
Corresponding
CPU
Details
L/R
16
L/R
32
L/R
48
L/R
64
L/R
15
L/R
31
L/R
47
L/R
63
L/R
14
L/R
30
L/R
46
L/R
62
L/R
13
L/R
29
L/R
45
L/R
61
L/R
12
L/R
28
L/R
44
L/R
60
L/R
11
L/R
27
L/R
43
L/R
59
L/R
10
L/R
26
L/R
42
L/R
58
Bit
b8
L/R
9
L/R
25
L/R
41
L/R
57
b7
L/R
8
L/R
24
L/R
40
L/R
56
b6
L/R
7
L/R
23
L/R
39
L/R
55
b5
L/R
6
L/R
22
L/R
38
L/R
54
b4
L/R
5
L/R
21
L/R
37
L/R
53
b3
L/R
4
L/R
20
L/R
36
L/R
52
b2
L/R
3
L/R
19
L/R
35
L/R
51
b1
L/R
2
L/R
18
L/R
34
L/R
50
b0
L/R
1
L/R
17
L/R
33
L/R
49
The bit corresponding to the station number with the error becomes
"1" .
Example: When local station 3 and remote I/O station 14 have an
error, b2 and b13 of SD1228 become "1", and when
SD1228 is monitored, its value is "8196 (2004H)".
App - 103
QnA
APPENDICES
D9232
D9233
D9234
D9235
D9236
D9237
Special
Register
after
Conversion
SD1232
SD1233
SD1234
SD1235
SD1236
SD1237
Special
Register for
Modification
Name
Meaning
Local station
and remote I/O
station loop
error
Local station
and remote I/O
station loop
error
Local station
and remote I/O
station loop
error
Local station
and remote I/O
station loop
error
Local station
and remote I/O
station loop
error
SD1237
Local station
and remote I/O
station loop
error
SD1239
Local station
and remote I/O
station loop
error
D9239
SD1239
Local station
and remote I/O
station loop
error
Number of
times
communications
errors detected
Stores cumulative
total of receive errors
D9241
SD1233
SD1234
SD1238
SD1240
Device
number
SD1232
D9238
D9240
SD1241
Corresponding
CPU
Details
SD1235
SD1236
SD1238
Bit
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
R
L/R8
R
L/R7
R
L/R6
R
L/R5
R
L/R4
R
L/R3
R
L/R2
R
L/R16
L/R15
L/R14
L/R13
L/R12
L/R11
L/R10
L/R1
R
L/R9
R
L/R24
L/R23
L/R22
L/R21
L/R20
L/R19
L/R18
L/R17
L/R32
L/R31
L/R30
L/R29
L/R28
L/R27
L/R26
L/R25
L/R40
L/R39
L/R38
L/R37
L/R36
L/R35
L/R34
L/R33
L/R47
L/R46
L/R45
L/R44
L/R43
L/R42
L/R41
L/R56
L/R55
L/R54
L/R53
L/R52
L/R51
L/R50
L/R49
L/R64
L/R63
L/R62
L/R61
L/R60
L/R59
L/R58
QnA
L/R48
L/R57
"F" in the above table indicates a forward loop line, and "R" a reverse
loop line. The bit of the device number corresponding to the station
number of the local station or remote I/O station that has a forward
loop line or reverse loop line error.
Example: When the forward loop line of station 5 has an error, b8 of
SD1232 become "1", and when SD1232 is monitored, its
value is "256 (100H)".
QnA
Bit
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
SD1203 L32 L31 L30 L29 L28 L27 L26 L25 L24 L23 L22 L21 L20 L19 L18 L17
Local station
link type
SD1241 L48 L47 L46 L45 L44 L43 L42 L41 L40 L39 L38 L37 L36 L35 L34 L33
QnA
SD1242 L64 L63 L62 L61 L60 L59 L58 L57 L56 L55 L54 L53 L52 L51 L50 L49
D9242
SD1242
D9243
SD1243
Station number
information for
host station
Stores station
number (0 to 64)
QnA
D9244
SD1244
Number of link
device stations
Stores number of
slave stations
QnA
D9245
SD1245
Receive error
detection count
Stores cumulative
total of receive errors
QnA
App - 104
APPENDICES
D9248
D9249
Special
Register
after
Conversion
SD1248
SD1249
Special
Register for
Modification
Name
Meaning
Local station
operation status
Local station
operation status
Corresponding
CPU
Details
Device
number
D9250
SD1250
Local station
operation status
D9251
SD1251
Local station
operation status
D9252
SD1252
Local station
error conditions
D9253
SD1253
Local station
error conditions
D9254
SD1254
Local station
error conditions
D9255
SD1255
Local station
error conditions
QnA
Stores the local station number other than the host, which is in error.
Bit
Device
number
QnA
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
D9
SD1300
SD1301
SD1302
SD1303
SD1304
SD1305
SD1306
SD1307
SD1308
SD1309
to
SD1330
SD1331
D9100
The numbers of output modules whose fuses have blown are input as a
bit pattern (in units of 16 points).
(If the module numbers are set by parameter, the parameter-set
numbers are stored.)
Also detects blown fuse condition at remote station output modules
Fuse blown
module
SD1300
D9101
D9102
SD1301
(Y1F0)
SD1331
Y1F
B0
1
(Y1A0)
Y1F
30
App - 105
D9103
D9104
S (Error)
D9105
D9106
D9107
New
New
New
QnA
APPENDICES
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
D9
SD1400
SD1401
SD1402
SD1403
SD1404
SD1405
D9116
When the I/O modules whose I/O module information differs from that
registered at power-ON are detected, the numbers of those I/O modules
are entered in bit pattern.
(If the I/O numbers are set by parameter, the parameter-set numbers are
stored.)
Also detects I/O module information.
I/O module
verify error
SD1406
SD1407
SD1408
SD1409
to
SD1430
SD1400
D9117
D9118
D9119
SD1401
SD1431
XY
1FE0
XY
190
D9120
S (Error)
D9121
D9123
For a module whose number of I/O points exceeds 16 points, all bits
corresponding to I/O module numbers within the number of I/O points
occupied by the module (in increments of 16 points) turn on.
(Example) When a 64-point module is mounted on the slot 0, b0 to b3
turn on when an error is detected.
New
New
Not cleared even if the blown fuse is replaced with a new one.
This flag is cleared by error resetting operation.
SD1431
QnA
D9122
New
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
Corresponding
CPU
D9
SD1500
SD1501
Basic period
SD1502
Process control
instruction detail
error code
Process control
instruction detail
error code
SD1503
Process control
instruction
generated error
location
Process control
instruction
generated error
location
Set the basic period (1 second units) use for the process control
instruction using floating point data.
New
Q4AR
Shows the detailed error contents for the error that occurred in the
process control instruction.
S (Error)
New
Q4AR
Shows the error process block that occurred in the process control
instruction.
S (Error)
New
Q4AR
SD1501
App - 106
SD1500
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
D9
SD1512
Operation mode
during CPU
module start up
Shows the power out time (S) during the automatic switch from hot start
to initial start in the operation mode when the CPU module is started up.
S (Initial)
New
Q4AR
SD1590
Switch request
network No.
Request source
network No.
Stores the request source at work No. when the SM1590 is turned on.
S (Error)
New
Q4AR
App - 107
APPENDICES
Number
Name
Meaning
Set by
(When Set)
Explanation
Corresponding
ACPU
SD
Corresponding
CPU
*2
Diagnosis error
Diagnosis error
No.
Stores as BIN code the error No. of the error that occurred during the
other system CPU module diagnosis.
Stores the latest error currently occurring.
Diagnosis error
occurrence time
Diagnosis error
occurrence time
S (Each END)
SD1 to
SD3
Q4AR
Error
information
classification
Error information
classification
S (Each END)
SD4
Q4AR
Error common
information
Error common
information
S (Each END)
SD5 to
SD15
Q4AR
Error individual
information
Error individual
information
S (Each END)
SD16 to
SD26
Q4AR
Switch status
CPU module
switch status
S (Each END)
SD200
Q4AR
SD1651
LED status
S (Each END)
SD201
Q4AR
SD1653
CPU module
operation status
CPU module
operation status
S (Each END)
SD203
Q4AR
SD1600
SD1601
SD1602
SD1603
SD1604
S (Each END)
SD0
Q4AR
SD1605
SD1606
SD1607
SD1608
SD1609
SD1610
SD1611
SD1612
SD1613
SD1614
SD1615
SD1616
SD1617
SD1618
SD1619
SD1620
SD1621
SD1622
SD1623
SD1622,
SD1626)
SD1624
SD1625
SD1626
SD1650
*1 : Stores other system CPU module diagnostics information and system information.
*2 : Shows the special register (SD
App - 108
APPENDICES
Number
Name
Meaning
Explanation
Set by
(When Set)
Corresponding
ACPU
Corresponding
CPU
D9
SD1700
Tracking error
detection count
Tracking error
detection count
App - 109
S(Error)
New
Q4AR
APPENDICES
Instructions
An
CPU Instruction
Instruction after A
Conversion
QnA
Corrective Action
Modify the instruction to a BMOV
BMOVR instruction
instruction.
Program example:
LEDA BMOVR
OUT SM1255
LEDC D10
LEDC D10
LEDC D100
LEDC D100
SUB K10
OUT SM1255
LEDR
LEDR
BXCHR instruction
instruction.
Program example:
LEDA BXCHR
OUT SM1255
LEDC D10
LEDC D10
LEDC D100
LEDC D100
SUB K10
OUT SM1255
LEDR
LEDR
OUT SM1255
CHK instruction
Program example:
CHK M10 X100
CLC instruction
Program example:
CLC
App - 110
RST SM700
APPENDICES
An
Instruction after A
CPU Instruction
QnA
Corrective Action
Conversion
OUT SM1255
LEDA instruction
instruction.
AnACPU, AnUCPU)
Program example:
$MOV "ABCDEFGH" D0
LEDA ABCDEFGH
OUT SM1255
LEDB instruction
D0 D10 D20
LED D20
Program example:
LEDB IJKLMNOP
OUT SM1255
LRDP instruction
instruction.
Program example:
LRDP K3 D10 D100 K10
OUT SM1255
LWTP instruction
instruction.
Program example:
LWTP K3 D10 D100 K10
OUT SM1255
OUT instruction
Program example:
The number of counter points or the
device by which the set value is used
is set by parameter.
interrupt counter.
OUT C0
K10
OUT C0 K10
OUT C256 D3000
Modify the instruction to an RFRP
RFRP instruction
Program example:
RFRP H100 K10 W100 K10
OUT SM1255
RTOP instruction
Program example:
RTOP H100 K10 W100 K10
OUT SM1255
SCMP instruction
Program example:
LEDA SCAP
OUT SM1255
LEDC D10
LEDC D10
LEDC D100
LEDC D100
AND$= D0 D100
LEDC M0
LEDC M0
OUT M0
LEDR
App - 111
instructions.
APPENDICES
An
CPU Instruction
Instruction after A
Conversion
SEG instruction
QnA
Corrective Action
Modify the instruction to an RFS
instruction.
SET SM1052
STC instruction
Program example:
STC
RFS Y10 H8
SET SM700
As the Q2ASCPU cannot store
any microcomputer program, it
has no SUB instructions.
Delete OUT SM1255 as it is not
necessary.
SUB instruction
OUT SM1255
ZRRD instruction
Program example:
DMOV K8000 D9036
LEDA ZRRD
OUT SM1255
ZRWR instruction
instruction.
Program example:
DMOV K8000 D9036
LEDA ZRWR
OUT SM1255
App - 112
APPENDICES
CPU Instruction
Instruction after A
QnA Conversion
ASC instruction
Program example:
ASC ABCDEFGH D10
DFLOAT instruction
Program example:
LEDA DFLOAT
LEDC D10
LEDC D100
LEDR
DOUT instruction
Program example:
LEDA DOUT
OUT DY10
LEDC Y10
LEDR
DRCL instruction
Program example:
DRCL SD718 K8
DRCL K8
DRCR instruction
Program example:
DRCR SD718 K8
DRCR K8
DROL instruction
Program example:
DROL SD718 K8
DROL K8
DROR instruction
Program example:
DROR SD718 K8
DROR K8
DRST instruction
Program example:
LEDA DRST
RST DY10
LEDC Y10
LEDR
App - 113
APPENDICES
An
CPU Instruction
Instruction after A
QnA Conversion
DSUM instruction
Program example:
DSUM D10
DSET instruction
Program example:
LEDA DSET
SET DY10
LEDC Y10
LEDR
FLOAT instruction
Program example:
LEDA FLOAT
LEDC D10
LEDC D100
LEDR
OUT instruction
Program example:
Set head numbers with parameters.
Low speed : 0
High speed: 200
Retentive : 224
Extension timer
Low speed : 256
High speed: 512
Retentive : 768
Setting val. stored dev. start: D5000
OUT T0
OUT T0 K10
K10
RCL instruction
Program example:
RCL K8
RCL SD718 K8
SD718 is the device resulting from converting
accumulator A0.
RCR instruction
Program example:
RCR K8
RCR SD718 K8
SD718 is the device resulting from converting
accumulator A0.
ROL instruction
Program example:
ROL K8
ROL SD718 K8
SD718 is the device resulting from converting
accumulator A0.
App - 114
APPENDICES
An
CPU Instruction
Instruction after A
QnA Conversion
ROR instruction
Program example:
ROR K8
ROR SD718 K8
SD718 is the device resulting from converting
accumulator A0.
SADD instruction
Program example:
LEDA SADD
LEDC D10
LEDC D100
LEDC D200
LEDR
SER instruction
Program example:
SER D10 D100 K5
SMOV instruction
Program example:
$MOV D10 D100
LEDA SMOV
LEDC D10
LEDC D100
LEDR
SUM instruction
Program example:
SUM D10
ZRRDB instruction
Program example:
DMOV K8000 D9036
LEDA ZRRDB
ZRWRB instruction
Program example:
DMOV K8000 D9036
LEDA ZRWRB
App - 115
APPENDICES
An
CPU Instruction
Instruction after A
QnA Conversion
... ...
SUB/LEDC device n
LEDR
Program example 1: SIN instruction
LEDA SIN
LEDC D10
LEDC D100
LEDR
Program example 2: DSER instruction
LEDA DSER
LEDC D10
accumulator A0.
LEDC D100
SUB K5
LEDR
AnA/AnUCPU special function module
dedicated instruction
LEDA/LEDB instruction name
SUB/LEDC device 1
... ...
SUB/LEDC device n
LEDR
Program example:
G.SVWR1 U2 D10
LEDA SVWR1
SUB H2
LEDC D10
LEDR
AnA/AnUCPU data link dedicated instruction
LEDA/LEDB instruction name
SUB/LEDC device 1
Network for using MELSECNET II
... ...
SUB/LEDC device n
LEDR
Program example:
LEDA LRDP
OUT SM1255
SUB K12
LEDC D10
LEDC D100
SUB K5
LEDC M0
LEDR
App - 116
APPENDICES
An
Instruction after A
CPU Instruction
QnA Conversion
Index register
Z, Z1 to Z6, V, V1 to V6
Z0
Z1 to Z6
V
Z1 to Z6
Z7
V1 to V6
Z8 to Z13
App - 117
APPENDICES
Appendix 4.2
Device
(a) Only devices within the Q2ASCPU range are converted.
An
Device after A
CPU Device
Same as to left
Same as to left
QnA Conversion
Same as to left
M
M/L/S is determined by the
parameter settings.
Same as to left
M9000 to M9255
SM1000 to SM1255
Same as to left
T (low-speed timer)
T (high-speed timer)
T (retentive timer)
Low-speed/high-speed/
retentive is determined by
parameter setting.
Same as to left
Same as to left
ST
Same as to left
Same as to left
Same as to left
D9000 to D9255
SD1000 to SD1255
Same as to left
Same as to left
.)
Z0
Z1 to Z6
Z1 to Z6
Z7
V1 to V6
Z8 to Z13
A0,A1
SD718,SD719
Same as to left*
Same as to left
Same as to left
Same as to left
Same as to left
REMARK
*
When P254 is used as the CHK instruction pointer, P254 can be converted to P254 as is.
(Refer to Appendix 4.12)
App - 118
APPENDICES
(b) Devices that are outside the Q2ASCPU range are converted to SM1255 if they
are bit devices and to SD1255 if they are word devices.
App - 119
APPENDICES
Appendix 4.3
Parameters
The following parameter settings only are converted to Q2ASCPU use.
Latch range setting
Converted to the "latch clear key valid" range.
The latch clear key invalid range is made blank (no setting).
MELSECNET (II, /10) setting
For the MELSECNET setting when the ACPU is an AnN or AnA, the number of
modules are stored after conversion, but the network refresh parameters are not
converted.
I/O assignment
Only the head I/O No. is made blank; all other items are converted.
MELSECNET/MINI auto refresh setting
If only I/O assignment was set in the parameters and MELSECNET/MINI auto refresh
settings have not been made, the MELSECNET/MINI data link operates with the
default values.
The following items are set for the Q2ASCPU default. If settings have been made, make
the settings again.
RUN-PAUSE contacts
:No setting
Output at STOP
:Before operation
RUN
:No setting
WDT setting
:200ms
App - 120
APPENDICES
Appendix 4.4
Timer
(a) The ACPU turns timer coils ON/OFF on execution of the OUT instruction, and
updates timer current values and turns contacts ON/OFF on execution of the
END instruction. In contrast, the Q2ASCPU turns timer coils ON/OFF, updates
current values, and turns contacts ON/OFF on execution of the OUT instruction.
Note that after conversion, the turning of contacts ON/OFF may be up to one
scan faster.
Example: Timing for turning contact ON
In the case of ACPU, a timer contact will turn ON quickly if it is located in the first
step.In the case of Q2ASCPU, it will turn ON quickly if it is located in the step
following OUT T.
(b) Note that processing differs as follows when the set value of a timer is set to K0:
For ACPU, count is in infinite units (timer does not count up).
For Q2ASCPU, the timer counts up instantaneously.
(2)
Interrupt counter
Interrupt counters for Q2ASCPU count the number of interrupt occurrences.However,
the counter contact does not turn ON even when the count has reached the set
value.
The operation of interrupt counters for ACPU differs according to the CPU type.
(a) Interrupt counters for A3HCPU, AnACPU, or AnUCPU count the number of
interrupts occurrences.When the count reaches the set value, the counter
contact turns ON.
In order to achieve the same operation as with interrupt counters for A3HCPU,
AnACPU, and AnUCPU when using a Q2ASCPU, the program must be modified
after conversion.
An example modification is shown below.
(b) Interrupt counters for AnCPU and AnNCPU operate as counters used in interrupt
programs.
To achieve the same operation as with interrupt counters for AnCPU or AnNCPU
when using a Q2ASCPU, the program modification is not needed after
conversion.
When ordinary counters are used in an interrupt program with Q2ASCPU, they
operate in the same way as with AnNCPU.
App - 121
APPENDICES
Appendix 4.5
Subsequence program
App - 122
APPENDICES
(b) To execute the main sequence program and subsequence program serially as
one program, modify the parameters and program as follows.
1) Modification of parameters
Set the file names in the order of main sequence program and subsequence
program in program setting in "Auxiliary setting" in the parameter mode.
Select scan execution as the execution type for both the main sequence
program and the subsequence program.
2) Modification of the sequence program
The CHG instruction that switches between main sequence and
subsequence programs is converted to OUT SM1255 after A QnA
conversion.Delete it as it is not required for Q2ASCPU.
If the same interrupt program or pointer is used for the main sequence
program or subsequence program, use only one interrupt program or
pointer.
REMARK
AnACPU executes END processing on switching from execution of the main
sequence program to execution of the subsequence program, and also executes
END processing after execution of the subsequence program.
Note that END processing is executed only after execution of the second program
when a Q2ASCPU executes two programs consecutively.
Statements and notes are entered in the sequence program file after A
conversion.
No modification is required after conversion.
App - 123
QnA
APPENDICES
Appendix 4.6
Microcomputer programs
Microcomputer programs and utility software packages cannot be converted as the
Q2ASCPU has no microcomputer mode.
When a microcomputer program or utility software package is used with the ACPU, a SUB
instruction (microcomputer program call instruction) is written in the sequence program to
execute it.The SUB instruction is converted to OUT SM1255 after A QnA conversion;
delete it as it is not necessary.
In the case of user-created microcomputer programs, convert processing contents of the
microcomputer programs to sequence programs using operation instructions added for
Q2ASCPU.
When using a utility software package of the following, convert processing contents of the
utility software package to a sequence program using operation instructions added for
Q2ASCPU.
SW
-AD57P
SW
-UTLP-FN0
SW
-UTLP-FN1
SW
-UTLP-PID
SW
-SIMA
SW
-UTLP-FD1
SW
-SAPA
Unusable
App - 124
APPENDICES
Appendix 4.7
Comments
Conversions are made for the device range of Q2ASCPU. Devices outside the range are
not converted.
App - 125
APPENDICES
Appendix 4.8
App - 126
APPENDICES
Appendix 4.9
App - 127
APPENDICES
App - 128
APPENDICES
Appendix 4.11
App - 129
APPENDICES
CHK instruction
The CHK instruction operates as a fault check instruction for Q2ASCPU.
For ACPU, there are two types of processing depending on the CPU type.
Fault check............................. AnCPU, AnNCPU (direct I/O control mode),
A3HCPU, AnACPU, AnUCPU
Bit device output inversion..... AnNCPU (refresh I/O control mode)
After conversion, program modification is required for each processing.
[For fault check]
Modify the CJ instruction in the step before the CHK instruction to a CHKST
instruction.
The CHK instruction pointer (P254) and the CJ instruction destination pointer
are converted to pointers with the same number. As the above pointers are
not used for Q2ASCPU, delete them.
(2)
IX instruction
The IX instruction is converted, but not executed. Modify the program so that all the
devices that are objects of the IX instruction are subject to indexing.
App - 130
APPENDICES
App - 131
APPENDICES
Since this error code is not an error detected by the Q2ASCPU self-diagnostics
function, it is not stored to special relay SD0.
If the request source is a peripheral device, the message or the error code is
displayed.
If the request source is a special function module or a network system, the error
code corresponding to the requested processing is returned.
Appendix 5.1
Error Codes
The error code's numbers depends on the location where the error has been detected.
The correspondences between the locations where errors are detected and the error
codes are indicated in the table below.
Location Where an Error is
Detected
CPU module
Serial communication module,
etc.
Error Code
4000H to 4FFFH
7000H to 7FFFH
CC-Link module
B000H to BFFFH
Ethernet module
C000H to CFFFH
MELSECNET/10 network
module
F000H to FFFFH
App - 132
APPENDICES
Appendix 5.2
Error Contents of Error Codes Detected by the CPU Module (4000H to 4FFFH)
The error contents of error codes detected by the CPU module (4000H to 4FFFH), and the
messages displayed on the peripheral device are indicated in the table below.
Error Code
(Hexadecimal)
Error
Message Displayed
Error Contents
Corrective Action
at Peripheral Device
4001H
4002H
capacity.
performed.
4004H
CPU
module-
related error
cannot be performed.
4005H
4006H
4007H
4010H
4011H
CPU
module
mode error
4012H
cancelled.
Message (1) is displayed.
Q2ASCPU data.
4008H
in RUN mode.
RUN of PLC.
App - 133
APPENDICES
Error Code
(Hexadecimal)
Error
4021H
fault.
4023H
4024H
4025H
4026H
CPU
module
file-related
error
The same file has already existed. Alert (2) is displayed.
4028H
Corrective Action
at Peripheral Device
4022H
4027H
Message Displayed
Error Contents
4029H
is not secured.
designated file.
Or sort the designated drive
memory and re-perform.
Check the designated cluster No.,
402AH
not exist.
402BH
drive memory.
currently performed.
The designated device name
4030H
4031H
CPU
device
designation
error
Device is invalid.
cannot be handled.
module
4032H
drive memory.
402CH
Device is invalid.
device qualification.
The designated device is for
4033H
Device is invalid.
to.
App - 134
APPENDICES
Error Code
(Hexadecimal)
Error
Message Displayed
Error Contents
The designated special function
4040H
request contents.
4042H
Special
faulty.
module
designation
Data error
4046H
4045H
error
4044H
function
4043H
Corrective Action
at Peripheral Device
16-point units.
Request contents cannot be
4050H
is ON.
Check the following and take
The designated device memory
4051H
cannot be accessed.
corrective action.
Wrong ROM
Protect error
Write is prohibited.
designated file.
memory.
ROM.
memory.
Cannot erase ROM correctly.
memory.
App - 135
APPENDICES
Error Code
(Hexadecimal)
Error
Message Displayed
Error Contents
Corrective Action
at Peripheral Device
4060H
Communications failed.
4061H
Not registered.
Re-perform communications.
Do not use the detailed condition
for monitoring from the designated
monitoring.
device.
Or cancel the monitoring detailed
condition for other device and
perform the monitoring again.
4063H
4064H
4065H
Setting is incorrect.
parameters.
parameter.
4066H
4067H
4068H
is in execution.
Condition has already satisfied at
4069H
device.
4070H
been designated.
Ladder
verification
perform monitoring.
Re-perform the command after
requests from other devices has
been completed.
Check the monitor condition.
Setting is incorrect.
406AH
program.
App - 136
APPENDICES
Error Code
(Hexadecimal)
Error
4080H
Message Displayed
Error Contents
Data error
Data is faulty.
4081H
detected.
The designated command cannot
4082H
be performed since it is in
execution.
An attempt was made to perform a
program not registered in the
4083H
Not registered.
parameters.
The designated pointer P, I cannot
4084H
be detected.
Not registered.
4086H
existed.
4087H
4088H
No pointer exists.
Setting is incorrect.
contents.
Check the data to be searched.
Re-perform the command after
requests from other devices has
been completed.
Register the program to be
performed to the parameters.
Corrective Action
at Peripheral Device
during RUN.
408BH
App - 137
APPENDICES
Error Code
(Hexadecimal)
Error
Message Displayed
Error Contents
at Peripheral Device
4090H
4091H
4092H
4093H
4094H
processing.
An attempt was made to perform a
4095H
4096H
processing.
An attempt was made to perform a
request during step forced
4097H
execution processing.
Corrective Action
going process.
going process.
going process.
going process.
going process.
going process.
going process.
going process.
going process.
Online
4098H
registration
error during
SFC STEP
continuous processing.
RUN
4099H
409AH
409BH
409CH
409DH
Setting is incorrect.
been designated.
409EH
409FH
Setting is incorrect.
App - 138
APPENDICES
Error Code
(Hexadecimal)
Error
Setting is incorrect.
designated.
Designation exceeds the range for
40A1H
40A2H
SFC device
designation
number of steps.
error
40A5H
Setting is incorrect.
designated.
40A4H
range.
Setting is incorrect.
Setting is incorrect.
incorrect.
The designated drive is incorrect.
40B0H
40B1H
Corrective Action
at Peripheral Device
40A0H
40A3H
Message Displayed
Error Contents
exist.
Setting is incorrect.
SFC file40B2H
related error
40B3H
Setting is incorrect.
area.
The designated station cannot be
4A00H
exist.
relevant station.
4A01H
Link-related
error
exist.
4A02H
station.
4B00H
Target-
related error
faulty.
App - 139
APPENDICES
REMARK
(1) Message (1)
App - 140
APPENDICES
Q2AS(H)CPU(S1) module
Q2ASHCPU
STOP
L.CLR
RESET
RUN
RESET
RUN
ERROR
USER
BAT.ALM
BOOT
NP
130 (5.12)
MITSUBISHI
PULL
6.5
(0.26)
110 (4.33)
54.5 (2.15)
Unit : mm (inch)
App - 141
APPENDICES
Appendix 6.2
A 1S61PN
POWER
NP
6.5
(0.25)
OUTPUT
DC 5V 5A
130 (5.11)
INPUT
AC 85 132V
AC170 264V
50 / 60Hz
93.6 (3.68)
54.5 (2.14)
App - 142
APPENDICES
OUT
CPU
I/O0
I/O1
POWER
A1S32B
130 (5.11)
OUT
110 (4.33)
200 (7.87)
220 (8.66)
16.4
(0.64)
28
(1.10)
Unit: mm (inch)
(2)
OUT
CPU
POWER
I/O0
I/O1
I/O2
130 (5.11)
OUT
110 (4.33)
Appendix 6.3
235 (9.25)
255 (10.03)
28
16.4
(0.64)
(1.10)
Unit: mm (inch)
App - 143
APPENDICES
(3)
I/O0
CPU
I/O1
POWER
I/O2
I/O3
I/O4
BD626E680G52
MADE IN JAPAN
E.S.D
A1S35B
130 (5.11)
OUT
110 (4.33)
OUT
16.4
305 (12.00)
(0.64)
28
325 (12.79)
(1.10)
Unit: mm (inch)
(4)
CPU
POWER
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
BD626E680G52
MADE IN JAPAN
E.S.D
A1S38B
130 (5.11)
OUT
110 (4.33)
OUT
410 (16.14)
430 (16.93)
28
16.4
(0.64)
(1.10)
Unit: mm (inch)
App - 144
APPENDICES
Appendix 6.4
I/O1
I/O2
I/O3
I/O4
A1S65B
130 (5.11)
I/O0
POWER
FG
110 (4.33)
IN
295 (11.61)
315 (12.40)
16.4
(0.64)
28
(1.10)
Unit: mm (inch)
(2)
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
BD626E680G52
A1S68B
MADE IN JAPAN
E.S.D
130 (5.11)
I/O0
POWER
110 (4.33)
IN
16.4
28 (0.64)
(1.10)
400 (15.74)
420 (16.53)
Unit: mm (inch)
App - 145
APPENDICES
(3)
I/O1
FG
A1S52B
130 (5.11)
I/O0
110 (4.33)
IN
135 (5.31)
155 (6.10)
16.4
(0.64)
28
(1.10)
Unit: mm (inch)
(4)
I/O1
I/O2
I/O3
I/O4
A1S55B
130 (5.11)
I/O0
FG
110 (4.33)
IN
240 (9.44)
260 (10.23)
28
16.4
(0.64)
(1.10)
Unit: mm (inch)
App - 146
APPENDICES
(5)
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
A1S58B
130 (5.11)
I/O0
FG
110 (4.33)
IN
345 (13.58)
16.4
365 (14.37)
(0.64)
28
(1.10)
Unit: mm (inch)
App - 147
APPENDICES
(6)
IN
OUT
OUT
110 (14.33)
1
2
3
I/O 3
POWER
I/O 4
I/O 5
I/O 6
130 (15.12)
I/O 7
16.4(0.65)
295 (11.61)
315 (12.40)
28
(1.10)
Unit: mm (inch)
(7)
OUT
OUT
1
2
3
I/O 0
POWER
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
400 (15.75)
420 (16.54)
App - 148
I/O 6
I/O 7
110 (4.33)
IN
130 (5.12)
16.4(0.65)
28
(1.10)
APPENDICES
IN
OUT
OUT
1
2
3
I/O 0
I/O 1
110 (4.33)
130 (5.12)
(8)
FG
135 (5.31)
16.4(0.65)
155 (6.10)
28 (1.10)
Unit: mm (inch)
App - 149
APPENDICES
(9)
IN
OUT
OUT
110 (4.33)
1
2
3
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
130 (5.12)
16.4(0.65)
240 (9.45)
260 (10.24)
28 (1.10)
Unit: mm (inch)
OUT
OUT
1
2
3
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
110 (4.33)
130 (5.12)
IN
16.4(0.65)
345 (13.58)
365 (14.37)
28 (1.10)
Unit: mm (inch)
App - 150
APPENDICES
: SM776
Interrupt program
: SM777
(1)
OFF
ON
App - 151
SM777
Operation is performed at the local device of
the file executed before execution of the
interrupt program.
Operation is performed at the local device of
the file where the interrupt program is stored.
APPENDICES
App - 152
APPENDICES
App - 153
APPENDICES
(2)
Precautions
(a) When the SM776 is ON, the local device data can be read while the subroutine
program is called. Furthermore, the data will be escaped after performing the
RET instruction.
When the SM777 is ON, the local device data is read before performing the
interrupt program. The data will be escaped after performing the IRET
instruction.
Therefore, when SM776 and SM777 are ON, the scan time is extended by the
time below after the subroutine program/interrupt program is executed once.
Q2ASCPU(S1)
Q2ASHCPU(S1)
(b) ON/OFF of SM776 and SM777 is set for each CPU module.
It cannot be set for each file.
(c) When ON/OFF of SM776 and SM777 is changed during execution of the
sequence program, the control is performed with the changed information.
App - 154
APPENDICES
Access range
Table 8.1 shows the access range of the network relay ftom the computer/peripheral
device with the system:
Ethernet
A1SJ71QE71
A1SJ71QBR11
Q2ASCPU(B)
A1SJ71QE71
Q2ASCPU(C)
Ethernet
App - 155
A1SJ71QE71
MELSECNET/10
Q2ASCPU(D)
A1SJ71QBR11
A1SJ71QE71
A1SJ71QE71
Peripheral device
(GX Developer
SW VD-GPPQ)
Q2ASCPU(A)
Computer
APPENDICES
Access to
Route
Q2ASCPU
Q2ASCPU
A
Host access
Other station access in host network
(MELSECNET/10)
Other station access of other network
(From MELSECNET/10 to Ethernet)
Other station access in host network
(Ethernet)
(Computer)
Q2ASCPU(A)
(Computer)
Q2ASCPU(B)
(Computer)
Q2ASCPU(C)
(Computer)
Q2ASCPU(D)
(Peripheral device)
Host access
Q2ASCPU(A)
(Peripheral device)
Q2ASCPU(B)
(Peripheral device)
Q2ASCPU(C)
(Peripheral device)
(Ethernet)
Q2ASCPU(D)
(2)
Precautions
(a) With combination of Ethernet module and MELSECNET/10, maximum 7 relays
can be performed.
(b) The following shows other station access with or without setting for other station
access:
When other station access valid module is set, the set module is used for
relay.
When other station access valid module is not set, the relay is as follows:
When MELSECNET/10 is available: 1st of MELSECNET/10 is relayed.
When MELSECNET/10 is not available: 1st of Ethernet is relayed.
(c) When parameters are not registered in the Ethernet module, the Q2ASCPU
stores the default parameters in all AJ71QE71.
When multiple Ethernet modules are installed, settings are made in the order of
1st station and 2nd station and so on counting from the Q2ASCPU side.
App - 156
APPENDICES
(d) Table 8.2 shows operation of the Q2ASCPU for online/offline of the Ethernet
module.
Table 8.2 Operation of Q2ASCPU for online/offline of Ethernet module
Ethernet
Ethernet Module
Parameter
Status
Online
Q2ASCPUOperation
Communication with external device is performed with
the specified parameter.
With
Offline
Online
Without
Offline
(e) Set the Ethernet module and MELSECNET/10 not to overlap their Network No.s
each other.Same network No. cannot be set for them.
The following shows the number of the Ethernet modules and the
MELSECNET(/10, /II) modules that can be mounted on one Q2ASCPU:
(Ethernet module)
[(MELSECNET/10) + (MELSECNET/II)]
(f)
When the Ethernet parameters are set for the Ethernet module without function
version B, error code "3103" (No Ethernet module in the I/O number set with the
parameter) appears and the system stops due to an error.
App - 157
APPENDICES
N1
16) N2
N2
Q2ASCPU(S1)
5.2
5.0
Q2ASHCPU(S1)
4.4
4.3
(2)
(3)
END processing
(a) The Q2AS(H)CPU(S1) common processing time except for above (1) ,(2).
(b) The following table shows values of the END processing time.
CPU module
With error check
(SM1084 = OFF)
Without error check
(SM1084 = ON)
Q2ASCPU(S1)
1.7ms
Q2ASHCPU(S1)
0.7ms
Q2ASCPU(S1)
1.2ms
Q2ASHCPU(S1)
0.5ms
App - 158
APPENDICES
Appendix 9.2
MELSECNET/10 refresh
Refresh time between the Q2AS(H)CPU(S1) and MELSECNET/10 network module.
For MELSECNET/10 refresh time, refer to the following manual.
QnA/Q4AR MELSECNET/10 Network System Reference Manual
(2)
MELSECNET/MINI-S3 refresh
Refresh time between the Q2AS(H)CPU(S1) and MELSECNET/MINI(S3) network
module.
For MELSECNET/MINI (S3) refresh time, refer to the following manual.
MELSECNET/MINI-S3 Master Module User's Manual
(3)
(4)
Sampling trace
(a) Processing time in the case of sampling trace execution
Sampling trace data are set using GX Developer, and the processing time is
added when the sampling trace is executed.
(b) The following table shows the processing time when internal relay 50 points as a
bit device, data register 50 points as a word device are set for sampling trace
data.
CPU module
Processing Time
Q2ASCPU(S1)
3.2ms
Q2ASHCPU(S1)
1.2ms
App - 159
APPENDICES
(5)
Processing Time
Q2ASCPU(S1)
0.46ms
Q2ASHCPU(S1)
0.18ms
(b) The following shows the processing time when monitor conditions are set.
Processing Time
CPU module
(6)
Agreement in
Agreement in
Designated Step
Designated Device
Q2ASCPU(S1)
0.38ms
0.38ms
Q2ASHCPU(S1)
0.15ms
0.15ms
Local device
Processing time when the local device is used
The processing time is added when the local device is used.
CPU module
Processing Time
Q2ASCPU(S1)
3.0 (n - 1) + 2.8ms
Q2ASHCPU(S1)
1.1 (n - 1) + 1.1ms
Processing Time
Q2ASCPU(S1)
0.21 n ms
Q2ASHCPU(S1)
0.08 n ms
App - 160
APPENDICES
(8)
File register
Processing time when the file register is used
The processing time is added when the file register is used.
CPU module
Processing Time
Q2ASCPU(S1)
0.87 (n - 1) + 0.74ms
Q2ASHCPU(S1)
0.32 (n - 1) + 0.28ms
App - 161
APPENDICES
Model Name
A6BAT
Description
Handled as
Q1MEM-128S,
Q1MEM-128SE,
Q1MEM-1MS,
Q1MEM-1MSE,
Q1MEM-256S,
QnA series memory card
Q1MEM-256SE,
Q1MEM-2MS,
Q1MEM-512S,
Q1MEM-512SE,
Q1MEM-64S,
Q1MEM-64SE
App - 162
Non-dangerous goods
APPENDICES
App - 163
APPENDICES
Disposal precautions
In EU countries, there is a separate collection system for used batteries. Dispose of
batteries properly at the local community waste collection/recycling center.
The following symbol is printed on the batteries and packaging of batteries and devices
with built-in batteries used for Mitsubishi programmable controllers.
Symbol mark
App - 164
APPENDICES
Appendix 11.2
Exportation precautions
In accordance with the enforcement of the new EU Battery Directive (2006/66/EC), the
following must be required when marketing or exporting batteries and/or devices with
builtin batteries to EU coutries.
To print the symbol mark on batteries, devices, or their packaging
To explain the symbol mark in the manuals of the products
(1)
(2)
POINT
The requirements apply to batteries and/or devices with built-in batteries
manufactured before the enforcement date of the new EU Battery Directive.
App - 165
INDEX
[A]
Accessing File Register R with Instructions
.................................................................. App-131
Accuracy of scan time .................. 12-6,12-8,12-14
Additional Functions of Q2ASCPU ................... 2-5
Allowable period of momentary power failure... 4-3
Annunciator [F] ......................................... 3-20,4-2
Application instructions............................... App-17
Application standards of extension base modules
........................................................................ 17-4
Applications of Memory Cards........................ 14-2
Auto refresh ...................................................... 7-1
Auto Refresh Setting of CC-Link ...................... 7-8
[B]
Base Unit
Base unit allocation....................................... 5-2
External dimensions of installing base unit
.............................................................. App-143
Installation and Removal of Modules ........ 19-11
Installing the Base Units ............................. 19-9
Parts names................................................ 17-7
Basic instructions.......................................... App-5
Battery
Battery Replacement .................................. 21-3
Battery replacement procedure................. 21-11
Battery replacement timing ................. 21-3,21-5
Battery Specifications (CPU Module and Memory
Card Batteries)............................................ 18-4
Installing Batteries (CPU Module and Memory
Card Batteries)............................................ 18-7
Battery life ................................................... 21-5
When a PLC is Reoperated After Stored with the
Battery Over the Battery Life..................... 21-16
When Reoperating a PLC After Storing it with a
Battery Unconnected ................................ 21-15
Battery transportation ............................... App-162
Boot file setting ............................................... 13-7
Boot operation ...................................... 14-2,22-11
[C]
Calculation of Heat ......................................... 19-7
Category II .................................................... 20-14
Causes of Increasing Scan Time.............. App-159
CHK Instruction, IX Instruction ................. App-130
Circuit
Fail-Safe Circuit .................................. 19-4,19-5
System design circuit example ....................19-2
Clearing file register ......................................12-27
Clock data read .............................................10-10
Clock Function ................................................10-8
Comments ................................................ App-125
COMMENTS THAT CAN BE STORED IN
Q2ASCPU .......................................................11-1
Common pointer................................... 12-17,13-1
Constant Scan.................................................10-2
Constant scan ...................................................4-1
Constant Scan Function, Error Check Function
................................................................. App-126
Control Method..................................................4-1
Counter [C] ........................................................4-2
CPU module
External Dimensions............................. App-141
Installation and Removal ...........................19-11
Performance specifications............................4-1
Current consumption .........................................4-3
[D]
Dairy Inspection ..............................................21-1
Data Clear Processing ..................................12-27
Data link instructions .................................. App-38
Data Link Systems ................................... App-128
Data register [D] ................................................4-2
Debugging by several people..........................8-61
DEBUGGING FUNCTION
Debugging by several people ......................8-61
Simultaneous execution of write during RUN by
several people .............................................8-63
Simultaneous monitoring by several people
.....................................................................8-62
Device
Annunciator [F] ..............................................4-2
Counter [C] ....................................................4-2
Data register [D].............................................4-2
Edge relay [V] ................................................4-2
File register [R, ZR]........................................4-2
Function input [FX].........................................4-2
Function output [FY] ......................................4-2
Function register [FD] ....................................4-2
Index register [Z]............................................4-2
Index - 1
Index - 2
Interrupt
Interrupt counter.................................... App-121
Interrupt module.......................................... 3-19
Interrupt pointer [I]......................................... 4-2
Interruption due to error detection................. 9-8
I/O assignment ................................................. 5-4
I/O control mode .................................4-1,App-127
I/O module
Refresh processing of I/O module ............ 12-22
I/O number
Example of I/O Number Assignment............. 5-9
I/O number assignment................................. 5-2
I/O signal
About I/O Numbers ....................................... 5-1
[K]
Key input operation....................................... 10-22
Keyword Registration ..................................... 9-12
[L]
Latch clear operation ...................................... 15-5
Latch Function ................................................ 10-5
Latch relay [L] ................................................... 4-2
Latch (power failure compensation) range ....... 4-3
LED
When the "RUN" LED is flashing ................ 22-5
Flow chart used when "ERROR" LED is ON or
flashing........................................................ 22-6
Flow for actions when the "BAT.ARM" LED is
turned ON ................................................... 22-7
Flow for actions when the "POWER" LED is
turned OFF.................................................. 22-3
Flow for actions when the "RUN" LED is turned
OFF............................................................. 22-4
LED Name .................................................. 16-5
When the "USER" LED is ON ..................... 22-7
LED indication ................................................ 9-15
Lightning surge absorber.............................. 19-16
Link direct device.............................................. 4-2
Link register [W]................................................ 4-2
Link relay [B]..................................................... 4-2
Local device
Data clear of local device.......................... 12-27
Monitor test of local device (function version B or
later)............................................................ 8-12
Use of local device (Function version B or later)
.............................................................. App-151
Local pointer ................................................. 12-17
LOW VOLTAGE DIRECTIVES ............. 20-1,20-13
Index - 3
[P]
Parameter.........................................13-1,App-120
Partial execution ............................................. 8-44
Part Names..................................................... 15-2
Parts names................................ 15-2,16-5,17-7
PAUSE status operation processing ............ 12-24
Periodic inspection ......................................... 21-2
PID Control Instructions.............................. App-41
PLC name....................................................... 11-1
Pointer [P]......................................................... 4-2
Common pointer [P] .......................... 12-17,13-1
Interrupt pointer [I]......................... 4-2,9-8,12-18
Local pointer [P] ........................................ 12-17
POWER SUPPLY MODULE
External dimensions of power supply module
............................................... App-141,App-142
Parts names................................................ 16-5
Power supply module selection .................. 16-3
Precautions
CPU module handling precautions ............. 16-4
DESIGN PRECAUTIONS ............................. A-1
DISPOSAL PRECAUTIONS ......................... A-7
Installation precautions ............................... 19-9
Precautions for using coaxial cables........... 20-5
PRECAUTIONS FOR UTILIZING THE EXISTING
MELSEC-A SERIES PROGRAM FOR
Q2ASCPU............................................. App-110
Precautions when configuring the system .. 3-19
Precautions When Connecting Uninterruptible
Power Supply Module (UPS) .................... 19-19
Precautions when using the MELSEC-AnS series
PLC ........................................................... 20-13
STARTUP AND MAINTENANCE
PRECAUTIONS ............................................ A-5
Transportation Precautions................... App-162
USER PRECAUTONS ................................ A-20
WIRING PRECAUTIONS....................A-4,19-15
Priority setting................................................. 9-17
Processing speed ............................................. 4-1
Processing Time....................................... App-158
Program capacity.............................................. 4-1
Program Execution Types .............................. 12-1
Program monitor list ....................................... 8-19
Program setting .............................................. 12-1
Program Trace Function................................. 8-48
Programming language .................................... 4-1
[Q]
QnAS(H)CPU(S1) Processing Time......... App-158
Index - 4
Special module
Processing for Data Communication Requests
from a Special Function Module ................... 6-5
Special Function Module Instructions ..... App-42
Special register [SD]......................................... 4-2
Special relay [SM]............................................. 4-2
SPECIFICATIONS.......................................... 15-1
Specifications
Battery Specifications (CPU Module and Memory
Card Batteries)............................................ 18-4
Extension cable specifications .................... 17-3
Memory card battery specifications ............ 18-4
Memory Card Specifications ....................... 18-1
Performance specifications........................... 4-1
SPECIFICATIONS ...................................... 15-1
Standards
LOW VOLTAGE DIRECTIVES ......... 20-1,20-13
Standby type program .................................. 12-16
Statements/notes............................................ 11-7
Status Latch Function..................................... 8-35
Step execution................................................ 8-42
Step operation ................................................ 8-41
Step relay [S] .................................................... 4-2
STEP-RUN status operation processing ...... 12-24
STOP status operation processing............... 12-24
Structured programs......................................... 2-2
System area ........................................... 8-11,8-62
SYSTEM CONFIGURATION............................ 3-1
Equipment configuration in an independent
system........................................................... 3-1
Precautions when configuring the system .. 3-19
Q2ASCPU memory block diagram ............. 3-23
System Configuration Overview.................... 3-3
System display ............................................... 9-14
System Equipment ........................................... 3-5
System interrupt ............................................. 13-1
System protect................................................ 9-11
[T]
Terminal Operation....................................... 10-21
Timer and Interrupt Counter Operations... App-121
Timer limit setting ........................................... 13-1
Timer [T] ........................................................... 4-2
Transportation Guidelines ........................ App-163
TROUBLESHOOTING ................................... 22-2
Troubleshooting flowchart
When the "RUN" LED is flashing ................ 22-5
Flow for actions when booting from a memory
card is not possible ................................... 22-11
Index - 5
WARRANTY
Please confirm the following product warranty details before using this product.
3. Overseas service
Overseas, repairs shall be accepted by Mitsubishi's local overseas FA Center. Note that the repair conditions at
each FA Center may differ.
SH(NA)-3599-K