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This document provides a lecture plan for a Digital Principles and Systems Design course. It includes: 1) An overview of the course including the aim, objectives, textbooks, faculty details and semester. 2) A table listing the topics to be covered across 5 units, the number of hours allotted to each topic, and the cumulative hours. 3) An assignment schedule assigning topics for submission throughout the semester. 4) A table outlining which units will be covered on each periodic test.

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485 views2 pages

Digital

This document provides a lecture plan for a Digital Principles and Systems Design course. It includes: 1) An overview of the course including the aim, objectives, textbooks, faculty details and semester. 2) A table listing the topics to be covered across 5 units, the number of hours allotted to each topic, and the cumulative hours. 3) An assignment schedule assigning topics for submission throughout the semester. 4) A table outlining which units will be covered on each periodic test.

Uploaded by

sureshsullan
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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MRK INSTITUTE OF TECHNOLOGY

Nattarmangalam, Kattumannarkoil

LECTURE PLAN

Faculty Name : P.VANCHIMALAR Year : II


Subject Name : DIGITAL PRINCIPLES AND Sub. Code :
SYSTEMS DESIGN
Degree & Branch : B.E- CSE Semester : III

Aim:
To provide an awareness to logic circuits.

Objectives:
• To Know the basic Logic components and HDL.
• To learn to fundamentals of Digital design.

TEXT BOOK(S):

1. M.Morris Mano, “Digital Design”, 3rd edition, Pearson Education, 2007


2. P.S. Manoharan, “Digital Electronics”, 2nd edition, Charulatha Publications.

LECTURE PLAN

S.NO TOPICS COVERED BOOKS HOURS CUMULATIVE


REFERED HOURS

UNIT-I BOOLEAN ALGEBRA


1. Binary number systems. TB2 2 2
2. Binary Arithmetic. TB2 2 4
3. Binary codes. TB2 2 6
4. Boolean Algebra and Theorems. TB2 2 8
5. Boolean Functions. TB2 2 10
6. Simplification of Boolean Functions using TB1 4 14
Karnaugh Map and Tabulation Methods.
7. Implementation of functions using Logic TB1 2 16
Gates
UNIT-II COMBINATIONAL LOGIC
8 Combinational circuits TB2 2 18
9 Analysis and design procedures TB2 1 19
10 Circuits for Arithmetic Operations TB2 2 21
11 Code Conversion TB2 2 23
12 Hardware Description Language TB2 1 24
UNIT III DESIGN WITH MSI DEVICES
13 Decoders and Encoders TB2 2 26
14 Multiplexers and Demultiplexers TB2 2 28
16 Memory and Programmable Logic TB2 2 30
17 HDL for Combinational Logic TB2 2 32
UNIT IV SYNCHRONOUS SEQUENTIAL LOGIC
18 Sequential circuits TB2 2 34
19 Flip flop TB2 2 36
20 Analysis and design procedures TB2 2 38
21 State reduction and State Assignment TB2 4 42
22 Shift registers TB2 2 44
23 Counters TB2 2 46
24 HDL for Sequential circuits TB2 4 50
UNIT V ASYNCHRONOUS SEQUENTIAL LOGIC
25 Analysis and design of Asynchronous TB2 2 52
Sequential Circuits
26 Reduction of State and Flow Tables TB2 4 56
27 Race free Assignment TB2 2 58
28 Hazards TB2 4 62
29 ASM Chart TB2 4 66

Allotted University hours:60 Total hours: 66

ASSIGNMENT:

S.NO TOPICS Submission


1 Boolean functions July lastweek
2 Karnaugh map August 1st week
3 Code conversion August 3rd week
4 HDL for Combinational Circuits September 2nd week
5 HDL for Sequential Circuits, October 1st week
ASM Charts, State Assignment and State
Reduction.

PERIODICAL TEST PORTIONS:

S.NO Units Periodical Test


1. Unit – I & Unit - II Periodical Test – I
2. Unit – III & Unit - IV Periodical Test – II
3. Unit – V Periodical Test - III
4. All units Model Exam

Signature of the Staff Signature of the H.O.D

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