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Traditional (CISC) Machines

This document summarizes key aspects of the VAX (Virtual Address Extension) architecture. It describes VAX as having a complicated instruction set with variable-length instructions and various addressing modes. The VAX uses a 32-bit virtual address space and has 16 general purpose 32-bit registers including the program counter, stack pointer, and frame pointer. Data formats include integers, floating-point numbers, and packed decimal values. Instructions support different data types and operands. I/O is handled through device controllers with control/status and data registers.

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Divya Vij
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167 views8 pages

Traditional (CISC) Machines

This document summarizes key aspects of the VAX (Virtual Address Extension) architecture. It describes VAX as having a complicated instruction set with variable-length instructions and various addressing modes. The VAX uses a 32-bit virtual address space and has 16 general purpose 32-bit registers including the program counter, stack pointer, and frame pointer. Data formats include integers, floating-point numbers, and packed decimal values. Instructions support different data types and operands. I/O is handled through device controllers with control/status and data registers.

Uploaded by

Divya Vij
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Traditional (CISC) Machines

Complex Instruction Set Computers (CISC)

• complicated instruction set


• different instruction formats and lengths
• different addressing modes
• e.gVAX or PDP-11 from DEC
• e.g. Intel x86 family

1
VAX Architecture
Virtual Address Extension

Memory: All addresses are byte address


• word (2bytes)
• longword (4bytes)
• quadworad (8bytes)
• octaword (16bytes)
All VAX programs operate in a virtual address space of 232

bytes

2
VAX Architecture
Registers
16 general purpose registers: R0~R15
• each register is 32-bit long
• R15 (PC): Program Counter
• R14 (SP): Stack Pointer
• R13 (FP): Frame Pointer
• R12 (AP): Argument Pointer
• R6~R11: general
• R0~R5: are used by some instructions
3
VAX Architecture
Data Formats
• Integers: byte, word, longword, quadword, or
octaword
• Negative integers: 2’s complement representation
• Floating-point: 4~16bytes
• packed decimal: (C:positive, D:negative,
F:unsigned)

4
VAX Architecture
Instruction Formats
• variable -length instruction format

Addressing Modes
• register mode
• register deferred mode
• autoincrement and autodecrement modes
• several base relative addressing modes

5
VAX Architecture
Instruction Set
The instruction mnemonics are formed by
• a prefix that specifies the type of operation
• a suffix that specifies the data type of the
operands
• a modifier that gives the number of operands
involved
• e.g. ADDW2, MULL3, CVTWL

6
VAX Architecture
A single instruction
• saves a designated set of registers
• passes a list of arguments to the procedure
• maintains the stack, frame, and argument
pointers
• sets a mask to enable error traps for arithmetic
operations

7
VAX Architecture
Input and Output

• I/O device controllers


• Each controller has a set of control/status and data
registers,
• No special instructions required

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