D - ETCE - Parts - II - &-III
D - ETCE - Parts - II - &-III
ETCE
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WBSCTE
FOREWARD
The West Bengal State Council of Technical Education is presently offering twenty-five full-time diploma courses in 43 polytechnics affiliated to it, 42 in West Bengal and 1 in Tripura. The courses being:
(i) (ii) (iii) (iv) (v) (vi) (vii) (viii) (ix) (x) (xi) (xii) (xiii) (xiv) (xv) (xvi) (xvii) (xviii) (xix) (xx) (xxi) (xxii) (xxiii) (xxiv) (xxv)
Architecture, Automobile Engineering, Chemical Engineering, Civil Engineering, Computer Science & Technology, Computer Software Technology, Electrical Engineering, Electronics & Tele-Communication Engineering, Food Processing Technology, Foot Wear Technology, Information Technology, Instrumentation Technology, Interior Decoration, Handicrafts & Furniture Design, Marine Engineering, Mechanical Engineering, Medical Laboratory Technology, Metallurgical Engineering, Mine Surveying, Mining Engineering, Modern Office Practice & Management, Photography, Pharmacy, Printing Technology, Production Engineering, and, Survey Engineering.
The students coming out of these institutions find employment in the organised and unorganised sectors and forms backbone of the world of work. They find employment in the functional areas. However, the most important job functions include: production, quality control, installation, maintenance, servicing, marketing etc. In order to train manpower of desired quality and standards, it is essential to provide appropriate learning experiences to the students for developing requisite competencies in the respective disciplines. The Curricular Structure and the relevant syllabi for the above mentioned disciplines were last revised in 2002. Development in the field of Science & Technology warranties revision and upgradation of the curriculum at all the three levels of Engineering & Technology Education, viz. the Degree level, the Diploma level and the ITI level. It is in this background that the West Bengal State Council of Technical Education took the decision in early 2002 to update the existing curricular structure and syllabi of the different full-time diploma programmes in vogue. Accordingly the Board of Studies of the Council took initiative. Upon the recommendation of the Board of Studies, the State Council in its meeting held on 9th August 2006 adopted Curricular Structures for the Diploma Programmes in Engineering & Technology, Applied Arts & Crafts and Other Disciplines, to be implemented from the 2002-2003 academic session. These are in accordance to the NORMS AND STANDARDS of the All India Council of Technical Education. MODE OF CURRICULAR PROGRAMME A FIXED & LINEAR SEMESTER MODE is introduced in lieu of the FIXED & LINEAR ANNUAL MODE. The new Curricular Programme consists of three parts, each part consisting of two semesters. Each semester consists of at least 15 contact weeks excluding internal assessments, end-semester examinations, preparatory and other holidays.
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Weekly Work Schedule Instead of the present practice of 7 periods per full working day and 4 periods per Saturday @ 45 minutes per period, 8 periods per full working day and 4 periods per Saturday @ 50 minutes per period with the following schedule are introduced. The last two periods of every working day will be of 45 minutes duration. FULL WORKING DAY
1st Period 10:30 11:15 2nd Period 11: 15 12:00 3rd Period 12:00 12:45 4th Period 12:45 1:30 Recess 1:30 1:50 5th Period 1:50 2:35 6th Period 2:35 3:20 7th Period 3:20 4:05 8th Period 4:05 4:50
SATURDAY
1st Period 10:30 11:15 2nd Period 11: 15 12:00 3rd Period 12:00 12:45 4th Period 12:45 1:30
TABLE 1 (a) & (b): WEEKLY PERIOD SCHEDULE In the Part I First Semester & Second Semesters, 36 & 40 periods are respectively allocated for students instruction and 8 & 4 periods are respectively allocated for student centred activities; and, in each of the other four semesters, out of the total 44 periods in a week, 39 periods are allocated for student contact and 5 periods for student centred activities. This leads to the present 2900 instructional contact hours per three-year full-time diploma course instead of the old 2430 instructional contact hours per three year.
Item Total Institutional Hours per week Student Contact Hours in Formal Training per week Student Centred Activities (Library, Guided Studies etc.) per week Present Semester System 38 hours 30 32 hours 4 - 6 hours Past Annual System 31 hours 27 hours 2 hours AICTE Recommendations 40 hours 33 36 hours 08 10 hours
TABLE 2: COMPARISON OF WEEKLY WORK SCHEDULE Generally, it is recommended that the sessional classes be scheduled in the second half of a day, allocating the theoretical classes in the first half. DURATION OF PROGRAMME & ENTRY QUALIFICATION The minimum duration of the full-time diploma programme will be three years after 10+ or entry qualifications as approved by the AICTE from time to time. CURRICULAR COMPONENTS OF THE DIPLOMA PROGRAMMES IN ENGINEERING & TECHNOLOGY The Diploma Programmes in Engineering & Technology shall consist of curricular component comprising courses in General Studies, Applied Sciences, Basic Courses in Engineering & Technology, Interdisciplinary Courses in Engineering & Technology, Applied Courses in Engineering & Technology (Departmental Core), and, Specialised Courses in Engineering & Technology (Electives). General Studies All disciplines shall contain courses in general studies and communication. These are related to supervisory/management skills. Further, development of communication skills appropriate to functions of technicians and also complementary to the main theme or disciplines of the respective programmes is considered. In addition, courses offered include areas of social and economic concern like environmental protection, energy conservation, productivity and quality, safety and entrepreneurial development. A general course on computer literacy and computer applications is essentially included.
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WBSCTE
Applied Sciences Courses under Applied Sciences include Mathematics, Physics and Chemistry. Topics for these courses are chosen depending on their requirement for study of the Basic, Interdisciplinary and Applied Courses in Engineering & Technology, as well as to help the students to pursue higher level of studies in chosen areas. Basic Courses in Engineering & Technology Courses in basic Engineering & Technology include Engineering Drawing, Workshop Practice, Engineering Mechanics and Strength of Materials. These are necessary for all the disciplines as this will help in the study of the Interdisciplinary and Applied Courses in Engineering & Technology. Interdisciplinary Courses in Engineering & Technology Though not included in the recommendations of the AICTE, the State Council, on the recommendation of the Board of Studies, included this component, viz. the Interdisciplinary Courses in Engineering & Technology. In the present time, no discipline of Engineering & Technology can develop of its own, but with the knowledge & skill taken from allied disciplines. Even there are disciplines, which are itself interdisciplinary in nature, like Medical Laboratory Technology where knowledge of Medical Science is amalgamated with that of Electronics. This component is introduced to expose the students to these areas of interdependence. Examples of such courses are Elements of Electrical Engineering (Mechanical), Principles & Applications of Digital Electronics (Electrical), Design of Structure (Architecture), Computer Oriented Numerical Methods (Chemical), Instrumentation, Automatic Control & Microprocessor Application (Production) etc. Applied Courses in Engineering & Technology (Departmental Core) These form the core studies relevant to the specific discipline and are meant to develop competencies required by the profession. One of the courses would be essentially Project work, which is intended to provide opportunity for students to develop understanding of the interrelationship between courses and to apply the knowledge gained in a way that enables them to develop and demonstrate higher order skills. Project work has been given due weightage in terms of time and credit allocation. Industry-Institution-Interaction should be an integral component of curriculum wherever possible. Specialised Courses in Engineering & Technology (Electives) Courses under electives are offered to provide an avenue for limited specialisation in an area of the students choice and should cover new and emerging areas. Examples of such courses are CAD CAM (Mechanical), Process Control & Instrumentation (Electrical), Water Resource Engineering (Civil), Alternative Building Technology (Architecture), PC Hardware Maintenance (Electronics & Tele-Communication Engineering) etc. A summary of the new curricular structure for the Diploma Programmes in Engineering & Technology is illustrated below:
60.00% Basic Engg /Tech 22.51% Core Engg. 50.22% 50.00% 40.00% 30.00% 20.00% Applied Science 12.12% Interdisciplinary 3.90% 10.00% 0.00%
Proposed AICTE
Core Engg.
Elective 4.33%
Fig. 4 : Comparison of Time Distribution of Different Components of the New Curriculum with that of the AICTE
ETCE
COMPONENTS OF STUDY GENERAL STUDIES APPLIED SCIENCE BASIC ENGINEERING APPLIED ENGINEERING (DEPT. CORE) INTERDISCIPLINARY SPECIALISED COURSES (ELECTIVE) TOTAL
TOTAL (%) 17 (07.36%) 28 (12.12%) 52 (22.51 %) 116 (50.22%) 08 (03.46%) 10 (04.33%) 231 (100.00%)
AICTE RECOMMENDATIONS 5 10 % 10 15 % 20 30 % 40 55 % 5 10 %
TABLE 5: SEMESTER WISE PERIOD ALLOCATION OF DIFFERENT COMPONENTS OF THE CURRICULAR STRUCTURE Distribution of Marks Taking the two semesters of each part together, the distribution of marks in the three parts for the theoretical and sessional papers will be as follows:
PART I II III TOTAL THEORETICAL 950 1050 950 2950 SESSIONAL 650 950 1050 2650 TOTAL 1600 2000 2000 5600
TOTAL THEORETICAL MARKS : TOTAL SESSIONAL MARKS = 52.68 : 47.32 COMPONENTS OF THE CURRICULAR STRUCTURES FOR THE COURSES IN APPLIED ARTS & CRAFTS AND OTHER DISCIPLINES DIPLOMA
The curricular structures for the disciplines belonging to the Applied Arts & Crafts and Other Disciplines categories will have the same Mode of Curricular Programme and similar Distribution of Marks as those of the Engineering & Technology disciplines. But as per the AICTE Norms and Standards, the difference of the Curricular Structures will occur only in the percentage of time allocated towards the different curriculum components. These are illustrated in the detailed Curricular Structures of the respective disciplines. THE METHODOLOGY OF REVISION & UPDATION At the onset, the Board of Studies made the following policy decisions regarding formation of the syllabus subcommittees for preparation of the detailed curricular structure & syllabi of each discipline:
(i) (ii)
(iii) (iv)
the convenors of each syllabus sub-committee are normally to be appointed from within the polytechnic system with certain exception; on receiving recommendations from each convenor, the other members of the syllabus sub-committees are to be appointed and it has to be guaranteed that each syllabus sub-committee consisted of academicians from the universities / degree institutions, representatives from the concerned industries and the statutory councils (if any); the syllabus sub-committees should first prepare the curricular structures and then they should prepare the detailed syllabi of the different courses; along with the curriculum, the syllabus sub-committees should also mention the equipments and the technical personnel required for properly running the different Sessional classes (Drawing, Workshop, Laboratory, Project & Elective).
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WBSCTE
Upon scrutiny of the curriculum submitted by the different syllabus sub-committees and making modifications wherever necessary, the Board of Studies recommended the same to the West Bengal State Council of Technical Education for its consideration and formal adoption.
1. SYLLABUS SUB-COMMITTEE FOR THE DISCIPLINE OF ELECTRONICS & TELE-COMMUNICATION ENGINEERING AND THE COMMON SUBJECT BASIC ELECTRONICS: (i) MEMBER CONVENOR: SHRI PIJUSH KANTI CHAKRABARTY, Lecturer in Electronics & Tele-Communication Engg., Womens Polytechnic, Jodhpur Park; (ii) MEMBER: SHRI SANDIP KUNDU, COE, WBSCTE; (iii) MEMBER: SHRI SUJIT CHATTERJEE, Dy. General Manager, Transmission Maintenance, BSNL; (iv) MEMBER: SHRI JAYANTA MUKHOPADHYAY, Sr. Executive Engineer, Power Electronics Division, APLAB Limited; (v) MEMBER: DR. BHASKAR GUPTA, Reader, Dept. of Electronics & Tele-Communication Engg., J.U.; (vi) MEMBER: DR. (SM.) BIJITA BISWAS, Lecturer in Electronics & Tele-Communication Engg., Womens Polytechnic, Jodhpur Park; (vii) MEMBER: SHRI NABENDU SENGUPTA, Dy. Secretary, WBSCVET; (viii) MEMBER: DR. (SM.) MERINA DAN, Lecturer in Electronics & Tele-Communication Engg., EIJE, Dalalpukur, Howrah; (ix) MEMBER: SM. MANIDIPA ROY, Principal, Women's Polytechnic, Chandannagore Polytechnic. 2. SYLLABUS SUB-COMMITTEE FOR COMMUNICATION SKILLS (JOB): (i) MEMBER CONVENOR: SHRI SANKAR NATH GHOSH, formerly, Head of the Dept. & Lecturer in Humanities, Hooghly Institute of Technology; (ii) MEMBER: SHRI AMARESH KUMAR MUKHERJEE, formerly, Head of the Dept. & Lecturer in Humanities, Regional Institute of Printing Technology; (iii) MEMBER: SHRI PRABIR KUMAR GHOSH, Lecturer in Humanities, Central Calcutta Polytechnic; (iv) MEMBER: SM. PURNA BISWAS, Lecturer in Humanities, Women's Polytechnic, Jodhpur Park; (v) MEMBER: SHRI SANTANU MITRA, Lecturer in Humanities, J.C. Ghosh Polytechnic; (vi) MEMBER: SHRI HEMADRI CHATTERJEE, Lecturer in Humanities, R. K. Mission Silpapith, Belghoria; (vii) MEMBER: SM. SUKLA MITRA, formerly, English Studies Officer, British Council Division, Kolkata; and, (viii) MEMBER: SHRI SANTANU GOSWAMI, Manager Personnel & Industrial Relation Faculty, Exide Industries. 3. SYLLABUS SUB-COMMITTEE FOR INDUSTRIAL MANAGEMENT: (i) MEMBER CONVENOR : SHRI SUMON KUMAR ROY, Lecturer in Mechanical Engg., A.P.C. Roy Polytechnic, Kolkata; (ii) MEMBER: DR. P.K. DAN, Asst. Professor, IISWBM, Kolkata; (iii) MEMBER: SHRI APARESH C. BHATTACHARYYA, Member-Convenor, Syllabus Sub-Committee for the Discipline of Mechanical Engg., and, formerly, Sr. Manager (Pers. & Admn.), Jessop & Co. Ltd.; (iv) MEMBER: SHRI A.C. MAJUMDAR, IISWBM, Kolkata. 4. (A) RESOURCE PERSON FOR INDUSTRIAL MANAGEMENT: DR. NIKHIL RANJAN BANERJEA, Vice-Chancellor, BESU.
5. RESOURCE PERSONS FOR ENVIRONMENTAL ENGINEERING: (i) DR. NIKHIL RANJAN BANERJEA, Vice-Chancellor, BESU; and, (ii) SHRI RABINDRA CHANDRA BHATTACHARYA, Vice-Chairman, WBSCTE.
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6. RESOURCE PERSON FOR C PROGRAMMING & ELECTRICAL ENGINEERING: SHRI PIJUSH KANTI CHAKRABARTY, Lecturer in Electronics & Tele-Communication Engg., Womens Polytechnic, Jodhpur Park. 7. RESOURCE PERSON FOR COMPUTER NETWORK & PC HARDWARE MAINTENANCE: SRI GAUTAM MAHAPATRA, Sr. Lecturer & Head, Dept. of Computer Science, Asutosh College, University of Calcutta. 8. RESOURCE PERSON FOR MEDICAL ELECTRONICS: SRI BAIDYA NATH PANDIT, Lecturer & Head, Dept. of Medical Electronics, Central Calcutta Polytechnic. THE BOARD OF STUDIES The members of the Board of Studies, under whose supervision and guidance the work of syllabus revision took place, are as follows:
1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14.
Chairman: MemberSecretary: Member: Member: Member: Member: Member: Member: Member: Member: Member: Member: Member: Member:
DR. NIKHIL RANJAN BANERJEA, Vice-Chancellor, BESU and Member, WBSCTE SHRI GAUTAM BANDYOPADHYAY, Secretary, and Member, WBSCTE SHRI SAIBAL MUKHOPADHYAY, JOINT Director, Directorate of Technical Education & Training, Govt. of West Bengal DR. RANJAN DASGUPTA, Professor National Institute of Technical Teachers Training & Research (Eastern Region) PROF. P.K. DAS PODDER, PROFESSOR OF CHEMICAL TECHNOLOGY , University of Calcutta and Member, WBSCTE DR. SIDDHARTA KUMAR DUTTA, Pro-Vice Chancellor., J.U. and Member, WBSCTE DR. J.N. MAITI, General Manager (Project), WEBEL SHRI UJJWAL GHATAK, Confederation of Indian Industries (Eastern Region) PROF. (DR.) R.N. BANERJEE, Institution of Engineers (India), West Bengal Chapter DR. NIL RATAN BANDOPADHYAY, Endowment Scientist, Dr. M. N. Dastur School of Material Science, B.E. College (D.U.) SHRI MRINAL KANTI BASAK, Indian Society for Technical Education (West Bengal Chapter) SHRI DIPTENDU CHOWDHURY, Principal, Regional Institute of Printing Tech., Kolkata SM. LAHARI GHOSH, Principal, Birla Institute of Technology, Kolkata SHRI ASHOK DEB, Lecturer in Civil Engg., North Calcutta Polytechnic
THE WEST BENGAL STATE COUNCIL OF TECHNICAL EDUCATION The members of the West Bengal State Council of Technical Education are as follows:
1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12.
Chairman: Vice-Chairman: Member Secretary: Member: Member: Member: Member: Member: Member: Member: Member: Member:
SHRI CHAKRADHAR MAIKAP, MIC, Dept. of Technical Education & Training, Govt. of West Bengal RABINDRA CHANDRA BHATTACHARYA, VICE-CHAIRMAN, WBSCTE SHRI GAUTAM BANDYOPADHYAYA, SECRETARY, WBSCTE SHRI S. C. TEWARI, IAS, Secretary, Dept. of Technical Education & Training, Govt. of West Bengal SHRI S. DEY, Dy. Secretary, Dept. of Finance, Govt. of West Bengal DR. N R BANERJEA, Vice-Chancellor, BESU DR. S. ROY. Director, National Institute of Technical Teachers Training & Research (Eastern Region) DR. P DEY, Director, Directorate of Technical Education & Training, Govt. of West Bengal SHRI ARDHENDU SHEKHAR BISWAS, Director of School Education, Govt. of West Bengal PROF. P.K. DAS PODDER, Professor, Dept. of Chem. Technology, University of Calcutta DR. SIDDHARTA DUTTA, Pro-Vice-Chancellor, J.U. DR. MADHUSUDAN BHATTACHARYYA, INDIAN SOCIETY FOR TECHNICAL EDUCATION
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DR. SAMIRAN CHOWDHURY, Institution of Engineers (India) DR. SUJAN CHAKRABORTY, Member, Pharmacy Council of India SHRI GAUTAM ROY, DY. GENERAL MANAGER, CESC SHRI PIJUSH KANTI CHARABORTY, Lecturer in Electronics & Tele-Communication Engg., Womens Polytechnic, Jodhpur Park SHRI PRABIR KUMAR GHOSH, Lecturer in Humanities, Central Calcutta Polytechnic SHRI SANKAR PRASAD DEY, JR. LECTURER, CALCUTTA TECHNICAL SCHOOL SMT. KANIKA GANGULY, Member of the Legislative Assembly, West Bengal Sd/GAUTAM BANDYOPADHYAY SECRETARY
30th
April, 2007
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WBSCTE
CONTENTS
DETAILED CURRICULAR STRUCTURE OF THREE-YEAR FULL-TIME DIPLOMA COURSE IN ELECTRONICS & TELE-COMMUNICARTION ENGINEERING 1.1 CURRICULAR STRUCTURE FOR PART I OF THE FULL-TIME DIPLOMA COURSE IN ELECTRONICS & TELE- 2 COMMUNICATION ENGINEERING 1.2 CURRICULAR STRUCTURE FOR PART II OF THE FULL-TIME DIPLOMA COURSE IN ELECTRONICS & TELE- 3 COMMUNICATION ENGINEERING 1.3 CURRICULAR STRUCTURE FOR PART III OF THE FULL-TIME DIPLOMA COURSE IN ELECTRONICS & TELE- 4 COMMUNICATION ENGINEERING 1.0 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 2.10 2.11 2.12 2.13 2.14 2.15 2.16 2.17 2.18 2.19 2.20 2.21 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 DETAILED SYLLABI OF DIFFERENT SUBJECTS OFFERED IN THE PART II FIRST & SECOND SEMESTERS ENVIRONMENTAL ENGINEERING 7 C PROGRAMMING 9 ELECTRICAL ENGINEERING 11 NETWORK ANALYSIS 13 ANALOG ELECTRONICS I 14 DIGITAL ELECTRONICS 16 C PROGRAMMING LAB 18 ELECTRICAL ENGINEERING LAB 19 NETWORK ANALYSIS LAB 19 ANALOG ELECTRONICS LAB I 20 DIGITAL ELECTRONICS LAB . 21 COMMUNICATION SKILLS (JOB) 22 COMMUNICATION ENGINEERING I 23 ANALOG ELECTRONICS II 25 CONSUMER ELECTRONICS 27 MICROPROCESSOR I 28 COMMUNICATION SKILLS (JOB) LAB 31 COMMUNICATION ENGINEERING LAB I 32 ANALOG ELECTRONICS LAB II 32 CONSUMER ELECTRONICS LAB 33 MICROPROCESSOR LAB I 34 DETAILED SYLLABI OF DIFFERENT SUBJECTS OFFERED IN THE PART III FIRST & SECOND SEMESTERS INDUSTRIAL MANAGEMENT 37 ELECTRONIC MEASUREMENT 38 COMMUNICATION ENGINEERING II 40 INDUSTRIAL ELECTRONICS I 42 MICROPROCESSOR II 43 COMMUNICATION ENGINEERING LAB II 45 INDUSTRIAL ELECTRONICS LAB I 46 MICROPROCESSOR LAB II 46 COMMUNICATION ENGINEERING III 47 INDUSTRIAL ELECTRONICS - II 48 INSTRUMENTATION & CONTROL 50
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ETCE
ELECTRONIC MEASUREMENT LAB COMMUNICATION ENGINEERING LAB III INDUSTRIAL ELECTRONICS LAB - II COMPUTER NETWORK (ELECTIVE) MEDICAL ELECTRONICS (ELECTIVE ) PC HARDWARE MAINTENANCE (ELECTIVE) ETCE PROJECT WORK SEMINAR ON ETCE PROJECT WORK GENERAL VIVA-VOCE
52 52 53 54 56 59 62 62 64
DETAILED CURRICULAR STRUCTURE OF THE THREE-YEAR FULL-TIME DIPLOMA COURSE IN ELECTRONICS & TELECOMMUNICATION ENGINEERING
CURRICULAR STRUCTURE FOR PART I FIRST SEMESTER OF THE FULL-TIME DIPLOMA COURSES IN ENGINEERING & TECHNOLOGY
S L. NO. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. SUBJECT OF STUDY SUBJECT CODE * / 1 / T1 / CSS * / 1 / T2 / PHY1 * / 1 / T3 / CHM1 * / 1 / T4 / MTHS * / 1 / T5 / EMK * / 1 / T6 / TD * / 1 & 2 / S1 / LPHY * / 1 & 2 / S2 / LCHM * / 1 & 2 / S3 / STD * / 1 & 2 / S4 / WSPR * Code for discipline THEORETICAL PAPERS COMMUNICATION SKILLS (STUDIES) PHYSICS I CHEMISTRY I MATHEMATICS ENGINEERING MECHANICS TECHNICAL DRAWING (4 HRS EXAM) SESSIONAL PAPERS PHYSICS LAB (GROUP A) CHEMISTRY LAB (GROUP A) TECHNICAL DRAWING (S) WORKSHOP PRACTICE TOTAL LECTURE 2 3 2 5 3 LECTURE 15 TUTORIAL 1 1 1 TUTORIAL 3 SESSIONAL SESSIONAL 3 3 6 6 18 CONTACT PERIODS / WEEK EXAMINATION SCHEME INTERNAL EXTERNAL ASSESSMENT ATTENDANCE OBJECTIVE SUBJECTIVE 10 2 38 10 2 13 25 10 2 13 25 20 5 25 50 20 5 25 50 20 5 25 50 INTERNAL EXTERNAL 12.5 12.5 50 50 50 FULL MARKS TH. SES. 50 50 50 100 100 100 TH. SES. 100 450 100 PAGE NO.
CURRICULAR STRUCTURE FOR PART I SECOND SEMESTER OF THE FULL-TIME DIPLOMA COURSES IN ENGINEERING & TECHNOLOGY
S L. NO. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. SUBJECT OF STUDY SUBJECT CODE * / 2 / T1 / BEA * / 2 / T2 / PHY2 * / 2 / T3 / CHM2 * / 2 / T4 / CAP * / 2 / T5 / EMTH * / 2 / T6 / SOM * / 2 / T7 / ETK * / 2 / T8 / FETC * / 1 & 2 / S1 / LPHY * / 1 & 2 / S2 / LCHM * / 1 & 2 / S3 / WSPR * / 2 / S4 / LCAP * / 2 / S5 / LETK * Code for discipline THEORETICAL PAPERS BUSINESS ECONOMICS & ACCOUNTANCY PHYSICS II CHEMISTRY II COMPUTER APPLICATIONS & PROGRAMMING ENGINEERING MATHEMATICS STRENGTH OF MATERIALS ELECTRICAL TECHNOLOGY FUNDAMENTALS OF ELECTRONICS SESSIONAL PAPERS PHYSICS LAB (GROUP B) CHEMISTRY LAB (GROUP B) WORKSHOP PRACTICE COMPUTER APPLICATIONS & PROGRAMMING LAB ELECTRICAL TECHNOLOGY LAB TOTAL LECTURE 4 2 2 3 3 3 2 4 LECTURE 19 TUTORIAL 2 TUTORIAL SESSIONAL SESSIONAL 2 2 6 3 2 21 CONTACT PERIODS / WEEK EXAMINATION SCHEME INTERNAL EXTERNAL ASSESSMENT ATTENDANCE OBJECTIVE SUBJECTIVE 20 5 25 50 10 2 13 25 10 2 13 25 10 2 13 25 20 5 25 50 20 5 25 50 10 2 13 25 20 5 25 50 INTERNAL EXTERNAL 12.5 25 12.5 25 50 100 50 50 25 25 FULL MARKS TH. SES. 100 50 50 50 100 100 50 100 TH. SES. 50 50 200 100 600 50 450 PAGE NO.
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CURRICULAR STRUCTURE FOR PART II FIRST SEMESTER OF THE FULL-TIME DIPLOMA IN ELECTRONICS & TELE-COMMUNICATION ENGINEERING
S L. NO. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. SUBJECT CODE ETCE / 3 / T1 / ENVE ETCE / 3 / T2 / CPG ETCE / 3 / T3 / EE ETCE / 3 / T4 / NWA ETCE / 3 / T5 / AE1 ETCE / 3 / T6 / DE ETCE / 3 / S1 / LCPG ETCE / 3 / S2 / LEE ETCE / 3 / S3 / LNWA ETCE / 3 / S4 / LAE1 ETCE / 3 / S5 / LDE SUBJECT OF STUDY THEORETICAL PAPERS ENVIRONMENTAL ENGINEERING C PROGRAMMING ELECTRICAL ENGINEERING NETWORK ANALYSIS ANALOG ELECTRONICS I DIGITAL ELECTRONICS SESSIONAL PAPERS C PROGRAMMING LAB ELECTRICAL ENGINEERING LAB NETWORK ANALYSIS LAB ANALOG ELECTRONICS LAB I DIGITAL ELECTRONICS LAB TOTAL CONTACT PERIODS PER WEEK LECTURE 3 4 3 4 3 4 LECTURE 21 SESSIONAL SESSIONAL 4 3 4 3 4 18 EXAMINATION SCHEME INTERNAL EXTERNAL ASSESSMENT ATTENDANCE OBJECTIVE SUBJECTIVE 25 50 20 5 25 50 20 5 25 50 20 5 25 50 20 5 25 50 20 5 25 50 20 5 INTERNAL 50 50 50 50 50 EXTERNAL 50 50 50 50 50 FULL MARKS TH. SES. 100 100 100 100 100 100 TH. SES. 100 100 100 100 100 600 500 PAGE NO. 7 9 11 13 14 16 18 19 19 20 21
CURRICULAR STRUCTURE FOR PART II SECOND SEMESTER OF THE FULL-TIME DIPLOMA IN ELECTRONICS & TELE-COMMUNICATION ENGINEERING
S L. NO. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. SUBJECT CODE ETCE / 4 / T1/ CSJ ETCE / 4 / T2 / CE1 ETCE / 4 / T3 / AE2 ETCE / 4 / T4 / CNE ETCE / 4 / T5 / MP1 ETCE / 4 / S1/ LCSJ ETCE / 4 / S2 / LCE1 ETCE / 4 / S3 / LAE2 ETCE / 4 / S4 / LCNE ETCE / 4 / S5 / LMP1 SUBJECT OF STUDY THEORETICAL PAPERS COMMUNICATION SKILLS (JOB) COMMUNICATION ENGINEERING I ANALOG ELECTRONICS II CONSUMER ELECTRONICS MICROPROCESSOR I SESSIONAL PAPERS COMMUNICATION SKILLS (JOB) LAB COMMUNICATION ENGINEERING LAB I ANALOG ELECTRONICS LAB II CONSUMER ELECTRONICS LAB MICROPROCESSOR LAB I TOTAL CONTACT PERIODS / WEEK LECTURE 2 5 5 5 4 LECTURE 21 SESSIONAL SESSIONAL 2 4 4 4 4 18 EXAMINATION SCHEME INTERNAL EXTERNAL ASSESSMENT ATTENDANCE OBJECTIVE SUBJECTIVE 10 2 38 25 50 20 5 25 50 20 5 25 50 20 5 25 50 20 5 INTERNAL 25 50 50 50 50 EXTERNAL 25 50 50 50 50 FULL MARKS TH. SES. 50 100 100 100 100 TH. SES. 50 100 100 100 100 450 450 PAGE NO. 22 23 25 27 28 31 32 32 33 34
Each of Part II 1st & 2nd semester is of 17 weeks duration of which 15 weeks are scheduled as contact weeks and 2 weeks are scheduled for holding two Centralised Internal Assessments. Each of Part II 1st & 2nd semester consists of 39 contact periods per week and 5 periods per week are allocated for Student Centred Activities like Library Studies, Guidance & Counselling etc. Marks distribution in Part I I : Theoretical 1050, Sessional 950; Total 2000.
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CURRICULAR STRUCTURE FOR PART III FIRST SEMESTER OF THE FULL-TIME DIPLOMA IN ELECTRONICS & TELE-COMMUNICATION ENGINEERING
S L. NO. SUBJECT CODE ETCE / 5 / T1 / IMNT ETCE / 5 / T2 / EMN ETCE / 5 / T3 / CE2 ETCE / 5 / T4 / IE1 ETCE / 5 / T5 / MP2 ETCE / 5 / *T6 / CN1 ETCE / 5 / *T7 / ME1 ETCE / 5 / *T8 / PHM1 ETCE / 5 / S1 / LCE2 ETCE / 5 / S2 / LIE1 ETCE / 5 / S3 / LMP2 ETCE / 5 & 6 / S4 / ETPW SUBJECT OF STUDY THEORETICAL PAPERS INDUSTRIAL MANAGEMENT ELECTRONIC MEASUREMENT COMMUNICATION ENGINEERING II INDUSTRIAL ELECTRONICS I MICROPROCESSOR II COMPUTER NETWORK I MEDICAL ELECTRONICS I PC HARDWARE MAINTENANCE I SESSIONAL PAPERS COMMUNICATION ENGINEERING LAB II INDUSTRIAL ELECTRONICS LAB I MICROPROCESSOR LAB II ETCE PROJECT WORK (GROUP A) TOTAL CONTACT PERIODS PER WEEK LECTURE 3 4 4 3 4 3 LECTURE 21 SESSIONAL SESSIONAL 4 4 4 6 18 EXAMINATION SCHEME INTERNAL EXTERNAL ASSESSMENT ATTENDANCE OBJECTIVE SUBJECTIVE 20 5 25 50 20 5 25 50 20 5 25 50 20 5 25 50 20 5 25 50 20 INTERNAL 50 50 50 50 5 25 EXTERNAL 50 50 50 50 FULL MARKS TH. SES. 100 100 100 100 100 100 TH. 600 SES. 100 100 100 300 PAGE NO. 37 38 40 42 43 54 56 59 45 46 46 62
CURRICULAR STRUCTURE FOR PART III SECOND SEMESTER OF THE FULL-TIME DIPLOMA IN ELECTRONICS & TELE-COMMUNICATION ENGINEERING
S L. NO. SUBJECT CODE ETCE / 6 / T1 / CE3 ETCE / 6 / T2 / IE2 ETCE / 6 / T3 / INTC ETCE / 6 / *T4 / CN2 ETCE / 6 / *T5 / ME2 ETCE / 6 / *T6 / PHM2 ETCE / 6 / S1 / LEMN ETCE / 6 / S2 / LCE3 ETCE / 6 / S3 / LIE2 ETCE / 5 & 6 / S4 / ETPW ETCE / 6 / S5 / SMNR ETCE / 6 / *S6 / LCN ETCE / 6 / *S7 / LME ETCE / 6 / *S8 / LPHM ETCE / 6 / S9 / GVV SUBJECT OF STUDY THEORETICAL PAPERS COMMUNICATION ENGINEERING III INDUSTRIAL ELECTRONICS II INSTRUMENTATION & CONTROL COMPUTER NETWORK II MEDICAL ELECTRONICS II PC HARDWARE MAINTENANCE II SESSIONAL PAPERS ELECTRONIC MEASUREMENT LAB COMMUNICATION ENGINEERING LAB III INDUSTRIAL ELECTRONICS LAB II ETCE PROJECT WORK (GROUP B) SEMINAR ON ETCE PROJECT WORK COMPUTER NETWORK LAB MEDICAL ELECTRONICS LAB PC HARDWARE MAINTENANCE LAB FINAL VIVA-VOCE TOTAL CONTACT PERIODS / WEEK LECTURE 4 4 4 2 LECTURE 14 SESSIONAL SESSIONAL 4 4 4 6 1 6 25 EXAMINATION SCHEME INTERNAL EXTERNAL ASSESSMENT ATTENDANCE OBJECTIVE SUBJECTIVE 20 5 25 50 20 5 25 50 20 5 25 50 10 INTERNAL 50 50 50 50 25 50 50 2 13 EXTERNAL 50 50 50 100 25 50 50 25 FULL MARKS TH. SES. 100 100 100 50 TH. 350 SES. 100 100 100 200 50 100 100 750 PAGE NO. 47 48 50 55 57 60 52 52 53 62 62 56 58 61 64
* Each student is required to opt for any one of the following three elective papers offered: (a) COMPUTER NETWORK (CN1, CN2 & SCN); (b) MEDICAL ELECTRONICS (ME1, ME2 & SME); (c) PC HARDWARE MAINTENANCE (PHM1, PHM2 & SPHM). Each of Part III 1st & 2nd semester is of 17 weeks duration of which 15 weeks are scheduled as contact weeks and 2 weeks are scheduled for holding two Centralised Internal Assessments. Each of Part III 1st & 2nd semester consists of 39 contact periods per week and 5 periods per week are allocated for Student Centred Activities like Library, Guided Studies etc. Marks distribution in Part III : Theoretical 950, Sessional 1050; Total 2000.
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DETAILED SYLLABI OF THE DIFFERENT COURSES OFFERED IN PART II FIRST & SECOND SEMESTERS
WBSCTE
ENVIRONMENTAL ENGINEERING
Subject Code ETCE / 3 / T1 / ENVE Course offered in Part II First Semester Course Duration 17 weeks 3 lecture contact periods per week Full Marks 75
OBJECTIVE
Since the Rio-declaration, eco-friendly and sustainable development has become order of the day. Any individual involved with developmental work is expected to be aware of the environment and its related facets. The present course on Environmental Engineering is aimed at giving the students a comprehensive idea regarding the different interfaces of environmental pollution, which are air, water, soil and noise pollution. On successful completion of the course they will also be aware of the different aspects of environmental management, viz. environmental legislations, authorities and systems.
CONTACT PERIODS: 45
EXAMINATION SCHEME
GROUP MODULE TO BE SET 15 7 5 6 ANY 25 ONE OBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION TOTAL MARKS TO BE SET FOUR TWO ONE ONE SUBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION FIVE, TAKING AT LEAST ONE FROM EACH OF THE GROUPS A & B, TEN AND, AT LEAST ONE FROM THE GROUPS C & D TAKEN TOGETHER TOTAL MARKS
A B C D
1, 2, 3, 4, 5 6, 7, 8 9, 10 11, 12
1 x 25 = 25
10 X 5 = 50
Module 1 INTRODUCTION 2 Man & Environment: Overview (socio-economic structure & occupational exposures) Scope of Environmental Engineering pollution problem due to urbanisation & industrialisation Module 2 AIR POLLUTION 3 Causes of air pollution types & sources of air pollutants Climatic & Meteorological effect on air pollution concentration formation of smog & fumigation Module 3 ANALYSIS OF AIR POLLUTANTS 3 Collection of Gaseous Air Pollutants Collection of Particulate Pollutants Analysis of Air Pollutants like: Sulphur dioxide Nitrogen oxide Carbon monoxide Oxidants & Ozone Hydrocarbons Particulate Matter -7-
PART II ETCE
Module 4
Control of Particulate Emission Control of Gaseous Emission Flue Gas Treatment Methods: Stacks Gravitational and Inertial Separation, Settling Chambers, Dynamic Separators, Cyclones, Filtration, Liquid Scrubbing, Spray Chambers, Packed Towers, Orifice and Venturi Scrubbers, Electrostatic Precipitators, Gas/solid Adsorption, Thermal Decomposition Module 5 METHODS & APPROACH OF AIR POLLUTION CONTROL 6 Controlling smoke nuisance Develop air quality criteria and practical emission standards creating zones suitable for industry based on micrometeorology of air area Introducing artificial methods of removal of particulate and matters of waste before discharging to open atmosphere
GROUP B
Module 6 Module 7
10 PERIODS
2 6
Origin of wastewater Type of water pollutants and their effects Biological Pollution (point & non-point sources) Chemical Pollutants: Toxic Organic & Inorganic Chemicals Oxygen demanding substances Physical Pollutants: Thermal Waste Radioactive waste Physiological Pollutants: Taste affecting substances other forming substances Module 8 WATER POLLUTION & ITS CONTROL 2 Adverse effects on: Human Health & Environment, Aquatic life, Animal life, Plant life Water Pollution Measurement Techniques Water Pollution Control Equipments & Instruments Indian Standards for Water Pollution Control
GROUP C
Module 9
7 PERIODS
3
Liquid & Solid Wastes Domestic & Industrial Wastes Pesticides Toxic: Inorganic & Organic Pollutants Soil Deterioration Poor Fertility, Septicity, Ground Water Pollution, Concentration of Infecting Agents in Soil Module 10 SOLID WASTE DISPOSAL 4 Dumping domestic & Industrial Solid Wastes: Advantages & Disadvantages Incineration: Advantages & Disadvantages Sanitary Land Field: Advantages & Disadvantages Management of Careful & Sanitary Disposal of Solid Wastes
GROUP D
Module 11
8 PERIODS
2
Noise Pollution: Intensity, Duration Types of Industrial Noise Ill effects of Noise Noise Measuring & Control Permissible Noise Limits Module 12 ENVIRONMENTAL LEGISLATIONS, AUTHORITIES & SYSTEMS 6 Air & Water Pollution Control Acts & Rules (Salient Features only) Functions of State / Central Pollution Control Boards Environmental Management System: ISO 14 000 (Salient Features only)
REFERENCE BOOKS
1. 2. 3. 4. 5. 6. Concept of Ecology / Kormondy / Prentice Hall of India, New Delhi Fundamental of Ecology / Odum Environmental Science / J. Turk & A. Turk Human Rights A Source Book Eds. / R. Dev & S. Das / NCERT Environmental Pollution / Dix Pollution Control Acts, Rules and Notification / Central Pollution Control Board, New Delhi
_______
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WBSCTE
C PROGRAMMING
Subject Code ETCE / 3 / T2 / CPG Course offered in Part II First Semester Course Duration 17 weeks 4 lecture contact periods per week Full Marks 75
OBJECTIVE
This course is intended for the students in the three-year electronic and telecommunication diploma program. This course is designed to have the students become competent in writing C program. Upon successful completion of this course the students will be able to: 1. use data types, operators and expressions in writing C program; 2. use function, external variables, multiple source files and also pre-processing; 3. employ the standard library in developing C program; 4. use arrays, structure, unions and pointers and organize data; 5. use file accessing functions comfortably; 6. use ROM BIOS functions for controlling hardware.
CONTACT PERIODS: 60
EXAMINATION SCHEME
GROUP MODULE TO BE SET 12 18 6 OBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION ANY 25 1 TOTAL MARKS 1 X 25 = 25 TO BE SET THREE FOUR TWO SUBJECTIVE QUESTIONS TO BE ANSWERED MARKS PER QUESTION FIVE, TAKING AT LEAST ONE FROM 10 EACH GROUP TOTAL MARKS 10 X 5 = 50
A B C
1, 2, 3, 4, 5 6, 7, 8, 9, 10 11, 12
20 PERIODS
2
STEPS IN PROGRAM DEVELOPMENT: Problem identification Task analysis Data analysis inputs and outputs Use of flow chart, program coding, testing, debugging and executing Place of C in computer language DATA TYPES & VARIABLES 4 DATA TYPES: Constants Variables Variable declaration STORAGE CLASS SPECIFICATION: Auto Static Extern Register Type modifiers
Module 2
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PART II ETCE
Module 3 3.1 3.2 3.3 3.4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 5.1 5.2
OPERATORS: Arithmetic Increment Decrement Relational Logical Conditional Bit Wise Precedence of operators Expressions and type conversion in expressions Type casting Assignment statements CONTROL STATEMENTS 6 If Nested if The if-else-if ladder The ? operator as an alternative to if Loop Control Structure: while for do-while Nesting of loops Switch Break and continue statements Exit( ) function goto. CONSOLE I / O 4 UNFORMATTED CONSOLE I / O FUNCTIONS: getchar ( ) getch ( ) getche ( ) putchar ( ) putch ( ) gets ( ) puts ( ) FORMATTED CONSOLE I / O: printf ( ) sprintf ( ) scanf ( ) sscanf ( ).
Module 4
Module 5
GROUP B
Module 6 6.1 6.2 7.1 7.2 7.3 7.4 7.5 8.1 8.2 8.3 8.4 8.5 8.6 9.1 9.2 9.3 9.4 9.5 9.6 9.7 10.1 10.2 10.3 ARRAYS Declaration and initialisation One-dimensional Two dimensional Array element access and display FUNCTIONS
30 PERIODS
4
Module 7
Utility of function Declaration and prototypes Function arguments The return statement FUNCTION CALL: Call by value Call by reference Recursive function Scope rules of functions POINTERS 6 & and * operators Pointer expressions Pointer assignments Pointer arithmetic DYNAMIC ALLOCATION FUNCTIONS: Malloc and Calloc Pointer versus Array Arrays of pointers Pointers to pointers. STRUCTURES, UNIONS & USER DEFINED VARIABLES 6 BASICS OF STRUCTURE: Declaring a structure Referring structure elements Array of structure Passing a structure to a function Structure within structure Structure pointers UNION BASICS: Declaration Referring union elements Uses of structure and unions Enumerated data type and type definition Function returning pointer FILE HANDLING 8 File pointer FILE ACCESSING FUNCTIONS: fopen ( ) fclose ( ) fputc ( ) fgetc ( ) feof ( ) ferror ( ) fprintf ( ) fscanf ( ) fgets ( ) fputs ( ) fflush ( ). fseek ( ) ftell ( ). - 10 -
Module 8
Module 9
Module 10
WBSCTE
GROUP C
Module 11 11.1 11.2 11.3 12.1 12.2 12.3 12.4 C PRE-PROCESSOR Macro directives Inclusive directives Conditional compilation directives: #ifdef #ifndef #else #endif #if #elif C STANDARD LIBRARY & HEADER FILES
10 PERIODS
4
Module 12
HEADER FILES: stdio.h ctype.h string.h math.h stdlib.h stdarg.h conio.h (uses of these files) Standard library functions (names of the categories and utilities) MATHEMATICAL FUNCTIONS: abs ( ) cos ( ) sin ( ) exp ( ) log ( ) pow ( ) sqrt ( ) tan ( ). STRING FUNCTIONS: strcat ( ) strcmp ( ) strcpy ( ) strlen ( ) strstr ( ) strrev ( ) strset ( ) strupr ( ) strlwr ( ).
REFERENCE BOOKS
1. 2. 3. 4. 5. 6. The C Programming Language / Kernigham & Ritchie / McGraw-Hill C Programming and Practices / Tim Grady / McGraw-Hill Let us C / Y.T. Kanetkar / BPB C Made Easy / H. Schieldt / McGraw Hill A first course in programming with C / T. Jeyapoovan / Vikash Publishing House Programming in ANSI C (edition 2.1) / E Balaguruswamy / Tata McGraw-Hill
_______
ELECTRICAL ENGINEERING
Subject Code ETCE / 3 / T3 / EE Course offered in Part II First Semester Course Duration 17 weeks 3 lecture contact periods per week Full Marks 75
CONTACT PERIODS: 45
EXAMINATION SCHEME
GROUP MODULE TO BE SET 12 14 8 OBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION ANY 25 ONE TOTAL MARKS 1 x 25 = 25 TO BE SET THREE THREE THREE SUBJECTIVE QUESTIONS TO BE ANSWERED MARKS PER QUESTION FIVE, TAKING AT LEAST ONE FROM TEN EACH GROUP TOTAL MARKS 10 X 5 = 50
A B C
1, 2 3, 4 5
16 PERIODS
6
PART II ETCE
2.2 Elementary theory of an ideal transformer, EMF equation of a transformer, Voltage transformation ratio (K). 2.3 Equivalent circuit of transformer 2.4 Transformer tests: Open circuit or no load test, Short circuit or impedance test. 2.5 Voltage regulation in a transformer, 2.6 Losses in a transformer, efficiency of a transformer, condition for maximum efficiency. 2.7 Auto transformer: Principle of operation, Output rating, Limitations of auto transformer, Application of auto transformer. 2.8 Current transformers, 2.9 Isolation transformers, 2.10 3 phase transformers.
GROUP B
Module 3 DC GENERATOR CHARACTERISTICS
19 PERIODS
6
3.1 No load, internal and external characteristics of separately excited generator and self excited shunt series and compound generator. 3.2 Efficiency of DC generator, Losses in a generator, Condition for maximum efficiency Module 4 DIRECT CURRENT MOTOR 13 4.1 Motor principle: Comparison of generator and motor action 4.2 Significance of back EMF and voltage equation of a motor 4.3 Motor characteristics: Torque Vs Armature current, Speed Vs Torque of a series, Shunt and compound motor. 4.4 Losses and efficiency of a DC motor 4.5 Various methods adopted to control speed of a DC motor: Electric braking of a shunt motor, Electric braking of series motor 4.6 Testing of DC machines
GROUP C
Module 5 THREE PHASE INDUCTION MOTOR
10 PERIODS
5.1 Construction of motor: Principle of operation, Production of rating magnetic field, Reversal of direction of rotation of the magnetic flux produced by three phase currents. 5.2 Slip frequency of rotor current, factors determining the torque. 5.3 Starting torque of a squirrel cage motor, starting torque of a slip ring motor. 5.4 Condition for maximum starting torque, Variation of torque with change in supply voltage, Rotor EMF and reactance under running condition. 5.5 Torque under running condition, condition for maximum torque under running condition, Relationship between torque and slip power stages in an induction motor, speed control of induction motor. 5.6 Different methods adopted for braking of induction motor: (a) Dynamic braking, (b) Plugging Single Phase Motor 5.7 Construction of a single phase induction motor, making single phase motor self starting, torque speed characteristics.
_______
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WBSCTE
NETWORK ANALYSIS
Subject Code ETCE / 3 / T4 / NWA Course offered in Part II First Semester Course Duration 17 weeks 4 lecture contact periods per week Full Marks 75
OBJECTIVE
This subject introduces the operations of basic electrical circuits that are the fundamental circuits for implementation of electronic instruments and electronic communication systems. Upon successful completion of this course the students will be able to: 1. know the characteristics of two port networks; 2. be familiar with coupled circuit, filter circuits, attenuator, equalizer and transmission line; 3. understand the switching and steady state response of R-L-C circuits.
CONTACT PERIODS: 60
EXAMINATION SCHEME
GROUP MODULE TO BE SET 10 10 13 OBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION ANY 25 1 TOTAL MARKS 1 x 25 = 25 TO BE SET THREE THREE THREE SUBJECTIVE QUESTIONS TO BE ANSWERED MARKS PER QUESTION FIVE, TAKING AT LEAST ONE FROM 10 EACH GROUP TOTAL MARKS 10 X 5 = 50
A B C
1, 2 3, 4 5, 6
18 PERIODS
10
Active and passive network Balanced and unbalanced network Symmetrical and asymmetrical network T and network and their conversion Simple problems Characteristic impedance Propagation constant and image impedance Open and short circuit impedance and their relation to characteristic impedance Thevenins theorem Nortons theorem Maximum Power Transform theorem Superposition theorem Simple problems COUPLED CIRCUITS 8 Idea of resonance Series and parallel resonant circuits Q-value, selectivity, bandwidth Principle of coupling Self-inductance & mutual inductance and their relationship Co-efficient of coupling Analysis of single tuned and double tuned circuits
GROUP B
Module 3 3.1 3.2 3.3 FILTER CIRCUITS
18 PERIODS
12
Definition and relationship between neper and decibel Basic idea of passive filter Definitions of pass band, stop band and cut-off frequency CONSTANT-K PROTOTYPE FILTERS: a) Low pass filter, b) High pass filter, c) Band pass filter, and, d) Band stop filter
- 13 -
PART II ETCE
Basic idea of attenuator Difference between attenuator and filter Symmetrical T and attenuator Field of application of attenuators Concept of equalizer Purpose of equalizer and its classification Difference between series & shunt equalizer and their field of applications
GROUP C
24 PERIODS
Module 5 TRANSMISSION LINES 12 5.1 Types of transmission lines: Parallel wire and coaxial cable 5.2 Primary and secondary constants of transmission lines 5.3 Characteristic impedance Reflection co-efficient Standing wave ratio and their relationship 5.4 Simple matching methods, single and double stub match for transmission lines 5.5 Losses in transmission lines 5.6 Distortion in transmission line Causes of distortion and condition for distortionless transmission Practical feasibility for distortionless transmission Module 6 6.1 6.2 TRANSIENT RESPONSE IN ELECTRICAL NETWORK 12 LAPLACE TRANSFORM: Definition Condition of existence - Transforms of some elementary functions Linearity property First shifting property Change of scale property Inverse Laplace Transform Transient response in electrical networks with sinusoidal and step function Analysis with RL, RC, RLC circuits, time constant
REFERENCE BOOKS
1. 2. 3. 4. 5. 6. 7. Network, Filters and Transmission Lines / Jain & Kaur / Tata McGraw-Hill Circuit and networks / Sudhakar / Tata McGraw-Hill Introduction to network, Filters and Transmission Lines / A. K. Chakraborty / Dhanpat Rai & Sons Network Analysis / V. Valkenburg / Prentice Hall of India, N. Delhi Engineering Circuit Analysis / Hayt / Tata McGraw-Hill Electric Circuits / Edminister / Tata McGraw-Hill Network, Lines and Fields / Ryder / Prentice Hall of India, N. Delhi
_______
ANALOG ELECTRONICS I
Subject Code ETCE / 3 / T5 / AE1 Course offered in Part II First Semester Course Duration 17 weeks 3 lecture contact periods per week Full Marks 75
OBJECTIVE
This course introduces the basic concepts and characteristics of electronic devices, primarily from a static current viewpoint. The establishment of stable quiescent points of operation of the most popular electronic devices is analysed from both mathematical and graphical perspectives. Upon successful completion of this subject the students will be able to: 1. 2. 3. 4. 5. describe the operation of some of the most basic electronic devices; practice proper laboratory procedures; use basic instruments in the performance of specific tasks; set operating conditions; describe and analyse the basic building blocks of a practical power supply.
- 14 -
WBSCTE
EXAMINATION SCHEME
GROUP MODULE TO BE SET 10 10 13 OBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION ANY 25 1 TOTAL MARKS 1 x 25 = 25 TO BE SET THREE THREE THREE SUBJECTIVE QUESTIONS TO BE ANSWERED MARKS PER QUESTION FIVE, TAKING AT LEAST ONE FROM 10 EACH GROUP TOTAL MARKS 10 X 5 = 50
A B C
1, 2 3, 4 5, 6, 7
21 PERIODS
5
GENERAL FEATURES OF: Varactor diode Pin diode Tunnel diode Schottky diode Their field of applications
Module 3 TRANSISTOR 3.1 Construction & operation of NPN & PNP transistors, 12
off regions CE, CB, CC configuration and their differences. 3.3 Definitions of & and their relationship
3.2 3.4 Concept of Q-point, AC and DC load lines 3.5 Stabilization and stability factor 3.6 BIASING: Base bias Collector feedback bias Emitter feedback bias Potential
divider bias. 3.7 Bias compensation circuits using diode and thermistors
3.8 Cosntruction, operation &
V.I. Characteristics of JFET, pinch off voltage, drain resistance, transconductance, amplification factor and their relationship
GROUP B
11 PERIODS
Module 4 SMALL SIGNAL TRANSISTOR AMPLIFIERS 6 3.1 Hybrid model and h-parameters of CB, CE & CC mode transistor amplifiers Calculation of voltage gain, current gain, power gain, input and output impedance in terms of h-parameters Comparison of the three configurations. - 15 -
PART II ETCE
Small signal FET equivalent circuits Common source and common drain amplifier FET application as VVR, constant current source etc. Module 5 MULTISTAGE AMPLIFIER 5 3.2
COUPLING: RC coupled Direct coupled Transformer-coupled amplifiers Effect on Gain & Bandwidth and Frequency response for cascading Comparison of different types of cascading GROUP C
Module 6 POWER AMPLIFIER
13 PERIODS
6
6.1 Characteristics of Class A, Class B, Class C and Class AB amplifier 6.2 Difference between Voltage and Power Amplifier 6.3 TRANSFORMER COUPLED CLASS A POWER AMPLIFIER: Circuit operation Calculation of power, efficiency & distortion 6.4 CLASS B PUSH PULL AMPLIFIER: Circuit operation Calculation of power, efficiency & distortion Crossover distortion Advantages and disadvantages Complementary symmetry and quasi-complementary symmetry Class B Push Pull Amplifier
Module 7 RECTIFIER AND POWER SUPPLY 6 7.1 HALF WAVE AND FULL WAVE RECTIFIERS: Average voltage rms voltage, efficiency and
ripple factor Percentage voltage regulation 7.2 Function of filter circuits Capacitor input filter Inductive filter type filter Calculation of ripple factor and average output voltage Function of bleeder resistor 7.3 Series and shunt regulator using transistor IC Voltage Regulators: Positive & Negative, their specifications
Module 8 VOLTAGE MULTIPLIER 1
_______
DIGITAL ELECTRONICS
Subject Code ETCE / 3 / T6 / DE Course offered in Part II First Semester Course Duration 17 weeks 4 lecture contact periods per week Full Marks 75
OBJECTIVE
This course features the principles of digital techniques as applied to control and communication systems. Upon successful completion of this unit the students will be able to: 1. 2. 3. use digital integrated circuit logic family chips; perform computational and digital activities related to digital technology; analyse, explain and connect both combinational and sequential logic circuits.
- 16 -
WBSCTE
5 C 6 7
12 6 8 TOTAL PERIODS: 68
CONTACT PERIODS: 60
EXAMINATION SCHEME
GROUP MODULE TO BE SET 12 13 8 OBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION ANY 25 ONE TOTAL MARKS 1 x 25 = 25 TO BE SET THREE THREE TWO SUBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION TWO 10 TWO 10 ONE 10 TOTAL MARKS 70
A B C
1, 2, 3 4, 5 6, 7
22 PERIODS
2
Symbolic representation and truth table for logic gates: BUFFER NOT OR AND NAND NOR XOR X-NOR Module 2 2.1 2.2 2.3 2.4 3.1 3.2 3.3 3.4 BOOLEAN ALGEBRA 10 Boolean variables Boolean function Rules and laws of Boolean algebra De Morgans theorem Max. term and min. term Canonical form of equation Simplification of Boolean expression Karnaugh map technique Dont care condition Prime implicants Canonical forms QuineMcClusky method Realization of Boolean expression with logic gates COMBINATIONAL LOGIC CIRCUITS 10 ARITHMETIC CIRCUITS: Half adder Full adder Half subtractor Full subtractor Parallel and serial full adder (1s complement, 2s complement and 9s complement addition) Design of circuits using universal gates Code converter, encoder and decoder Multiplexer & demultiplexer Parity generator and checker Comparator
Module 3
GROUP B
Module 4 4.1 4.2 4.3 4.4 SEQUENTIAL LOGIC CIRCUITS
24 PERIODS
12
Difference between combinational and sequential logic circuits Triggering of sequential logic circuits Difference between flip flop and latch Construction of RS, D, JK, JK master slave, T flip flops using basic gates, preset and clear signal COUNTERS: Asynchronous and synchronous counter Ripple counter Mod-N counter Up-down counter Ring counter Johnson counter Programmable counter Applications REGISTERS: Shift registers Serial in serial out Serial in parallel out Parallel in serial out Parallel in parallel out Applications MEMORY DEVICES 12 MEMORY ADDRESSING: Read, Write and Read Only operations MEMORY CELLS: ROM, PROM, EEROM, EPROM, CDROM Static and dynamic RAM Refreshing of dynamic RAM Volatile and non-volatile memories, PLA, PAL, GAL, FPLA
GROUP C
Module 6 6.1 6.2 DATA CONVERTERS
14 PERIODS
6
DIGITAL TO ANALOG CONVERTERS: Binary weighted resistor type R-2R ladder type Specifications and applications of DA converter ANALOG TO DIGITAL CONVERTER: Comparator type Successive approximation type Dual slope AD converter Specifications and applications of AD converter
- 17 -
PART II ETCE
Module 7 7.1
LOGIC FAMILIES
7.2 1. 2. 3. 4. 5. 6. 7. 8. 9.
Comparative studies of different type of logic families like DTL, TTL, CMOS, and ECL etc. with the following characteristics: (a) logic levels, (b) power dissipation, (c) fan in and fan out, (d) propagation delay, and, (e) noise immunity. Interfacing of ICs of different logic families Logic hazards Digital Principles and Applications / Malvino & Leach / Tata McGraw-Hill Modern Digital Electronics / Jain / Tata McGraw-Hill Digital Electronics / Taub & Schilling / Tata McGraw-Hill Digital Electronics / V. K. Puri / Tata McGraw-Hill Digital Circuits and Design / S. Salivahnan & A. Arivazhgan / Vikash Publishing House Digital Logic Applications and Design / Yarbrough / Vikash Publishing House Digital Logic and Computer Design / Morris Mano / Prentice Hall of India, N. Delhi Digital Technology / V. Kumar / New Age Publishers Digital Circuits / D. Ray Chaudhuri / Eureka Publishers
REFERENCE BOOKS
_______
C PROGRAMMING LAB
Subject Code ETCE / 3 / S1 / LCPG Course offered in Part II First Semester Course Duration 17 weeks INTERNAL ASSESSMENT: 8 periods Full Marks 100 TOTAL: 68 periods
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to develop the skills corresponding to the knowledge acquired in the theoretical subject C PROGRAMMING.
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Second Year First Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Second Year First Semester on the entire syllabus. One assignment per student from any one of the assignments done is to be performed. Assignment is to be set by lottery system. Distribution of marks: On spot job 25, Vivavoce 25.
9. 10.
WBSCTE
11. 12.
To write program using string function and math function. To realize Int86 functions.
_______
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to develop the skills corresponding to the knowledge acquired in the theoretical subject BASIC ELECTRONICS.
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Second Year First Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Second Year First Semester on the entire syllabus. One job per student from any one of the jobs done is to be performed. Job is to be set by lottery system. Distribution of marks: On spot job 25, Viva-voce 25.
_______
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to develop the skills corresponding to the knowledge acquired in the theoretical subject NETWORK ANALYSIS.
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Second Year First Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Second Year First Semester on the entire syllabus. One experiment per student from any one of the experiments done is to be - 19 -
PART II ETCE
performed. Experiment is to be set by lottery system. Distribution of marks: On spot job 25, Viva-voce 25.
networks.
To design, test and to measure the cut off frequencies of the following: (a) constant k-type low pass filter; (b) constant k-type high pass filter; (c) constant k-type band pass filter, and, (d) constant k-type band stop filter. To design and test T and
8. 9.
To study standing wave pattern for a transmission line of finite length with: (a) open termination, (b) shorted termination, and, (c) matched termination. To measure the attenuation constant and phase shift constant for matched termination. (a) To study the given RC differentiator at different time constant, and, (b) To study the given RC integrator at different time constant.
10. 11.
_______
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to develop the skills corresponding to the knowledge acquired in the theoretical subject ANALOG ELECTRONICS - I.
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Second Year First Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Second Year First Semester on the entire syllabus. One job per student from any one of the jobs done is to be performed. Job is to be set by lottery system. Distribution of marks: ON SPOT JOB 25, Viva-voce 25.
3. 4.
WBSCTE
5.
To determine frequency response characteristics of RC coupled amplifier circuit and calculation of bandwidth, midband gain, input impedance and output impedance for : (a) Single-stage amplifier, (b) Double-stage amplifier. To study the output waveform of push-pull amplifier for Class-A, Class-B & Class-AB operations. To study shunt and series regulator and draw the following plots: line regulation and load regulation.
6. 7.
_______
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to develop the skills corresponding to the knowledge acquired in the theoretical subject DIGITAL ELECTRONICS.
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Second Year First Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Second Year First Semester on the entire syllabus. One job per student from any one of the jobs done is to be performed. Job is to be set by lottery system. Distribution of marks: On spot job 25, Viva-voce 25.
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C O M M U N I C A T I O N S K I L LS ( J O B )
Subject Code ETCE / S4 / T1 / CSJ Course offered in Part II Second Semester Duration 17 weeks 2 lecture contact periods per week Full Marks 38
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to: (i) write letters asking for application forms; - 21 -
PART II ETCE
fill in application forms; prepare a resume or a CV; write letters of application in response to advertisements; learn how to write memos; learn how to write letters of enquiry, letters of complaint and letters to place orders; learn to understand and respond to tender notices.
M O D U L A R D I V I S I O N O F T H E SY L L A B U S & E X A M I N A T I O N S C H E M E
MODULE TOPIC CONTACT PERIODS 12 18 SUBJECTIVE QUESTIONS TO BE SET QUESTIONS TO BE SET, FOLLOWING THE SKILLS DEVELOPED FOLLOWING THE UNITS IN THE TEXT BOOK: ENGLISH SKILLS FOR TECHNICAL STUDENTS TEACHERS HANDBOOK TOTAL MARKS TO BE ANSWERED 16 22 TOTAL PERIODS: 34
Module 1 LOOKING
FOR A JOB
Module 2
AT THE WORKPLACE
CONTACT PERIODS: 30
INTERNAL ASSESSMENT: 4
Writing Memos Business Letters: General Features Letters of Enquiry Letters to Place Orders
TEXT BOOK
ENGLISH SKILLS for Technical Students TEACHERS HANDBOOK / West Bengal State Council of Technical Education in collaboration with THE BRITISH COUNCIL / Orient Longman
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COMMUNICATION ENGINEERING
Subject Code ETCE / 4 / T2 / CE1 Course offered in Part II Second Semester Course Duration 17 weeks 5 lecture contact periods per week
I
Full Marks 75
OBJECTIVE
This course concentrates on the field of analog communication and pulse code modulation. It also includes the advantages and disadvantages of digital and analog communications. After passing through the course the students will be acquainted with the basic telephony systems. Upon successful completion of this course the students will be able to: 1. know the basic requirements of an analog communication system; 2. understand analog modulation including PAM, PWM and PPM; 3. know the functioning of transmitter and receiver; - 22 -
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4. 5. 6.
explain the difference between digital and analog communication; discuss the basic ideas of information theory; discuss the ideas dealing with the operation of the systems like telephony.
EXAMINATION SCHEME
GROUP MODULE TO BE SET A B C 1, 2, 3 4, 5 6, 7 15 7 11 OBJECTIVE QUESTIONS TO BE ANSWERED ANY 25 MARKS PER QUESTION 1 TOTAL MARKS 1 x 25 = 25 TO BE SET FOUR TWO THREE FIVE, TAKING AT LEAST ONE FROM EACH GROUP 10 SUBJECTIVE QUESTIONS TO BE ANSWERED MARKS PER QUESTION TOTAL MARKS 10 X 5 = 50
33 PERIODS
10
Importance of communication Elements of a communication system Types of electronic communication Electromagnetic spectrum Bandwidth Basic idea of Fourier series and Fourier transform Module 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 ANALOG MODULATION 15 Concept and necessity of modulation Definition of amplitude, frequency and phase modulation Derivation of sidebands in AM systems Evaluation of power Sideband depth Percentage of modulation METHODS OF AM: Principles of operation of plate modulated Class C amplifier Balanced modulator Expression of sidebands in FM and PM systems and its interpretation Modulation index and bandwidth requirement Principles of operation of varactor diode modulation Comparison of AM, FM and PM Basic ideas of Pulse Amplitude Modulation (PAM), Pulse Width Modulation (PWM) and Pulse Position Modulation (PPM) Principle of generation and reception of PAM, PWM & PPM with block diagram and their applications TRANSMITTING SYSTEMS 8 Block diagram and function of different stages of AM and FM broadcast transmitter W ORKING PRINCIPLES OF SSB SYSTEMS WITH BLOCK DIAGRAM: Filter Method Phase Shift Method Third Method
GROUP B
Module 4 4.1 DEMODULATION Principle of detection with diode detector - 23 -
16 PERIODS
6
PART II ETCE
4.2 4.3
AGC circuit delayed AGC Foster-Seeley discriminator Ratio Detector Limiter Standard AFC Circuits (basic principles only, no derivation) RECEIVING SYSTEM 10 Block diagram and principle of operation of super heterodyne receiver IF amplifier and choice of IF Mixer and converter Alignment and tracking Tone and volume control Band spreading Receiver characteristics Testing Block diagram and principle operation of FM receiver Pre-emphasis and de-emphasis AFC and alignment of FM receiver
Module 5 6.1
6.2
GROUP C
Module 6 6.1 6.2 BASIC TELEPHONY
26 PERIODS
14
Telephone transmitter Receiver Dial tone, side tone and antisidetone circuits Handset Ringer Switch hook Hybrid Local loop Tone dialling DTMF ELECTRONIC EXCHANGE: Space division switching, time division switching, block diagram of electronic exchange concept of PBX and EPABX PULSE CODE MODULATION 12 Idea of digital communication Advantages of digital communication over analog communication BASIC STEPS IN PCM SYSTEM: Filtering Sampling Quantizing Encoding Line coding (HDB3, AM1, CM1, NRZ, RZ) Block schematic description of transmitter and receiver of PCM system Principles of linear and non-linear quantization Companding
REFERENCE BOOKS
1. 2. 3. 4. 5. 6. 7. Communication Electronics / Frenzel / Tata McGraw-Hill Electronic Communication System / Kennedy / Tata McGraw-Hill Principles of Communication System / Taub & Schilling / Tata McGraw-Hill Electronic Communication / Roddy & Coolen / Prentice Hall of India, N. Delhi Communication System / Simon Haykin / WI Ltd. Telemetry Principles / D. Patranabis / Tata McGraw-Hill Electronic Communication System / Dungan / Vikash Publishing House
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ANALOG ELECTRONICS
Subject Code ETCE / 4 / T3 / AE2 Course offered in Part II Second Semester Course Duration 17 weeks
II
Full Marks 75
OBJECTIVE
This course begins with tuned amplifier and concept of feedback and its effect on amplifiers. Differential amplifier is then treated, with the main portion of the course spent on the study of op-amps and their applications in the field of electronics and telecommunications. Upon successful completion of this course the student will be able to: 1. describe an operational amplifier, 2. explain how its operation in a circuit depends on certain parameters, 3. recognize various op-amp circuit and its applications, 4. be familiar with microelectronic technology, 5. observe, measure and record various types of waveforms through the use of applicable measuring instruments, and, 6. perform essential tests, diagnosis & repairs.
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1 2
TUNED AMPLIFIER FEEDBACK AMPLIFIER OPERATIONAL AMPLIFIER OSCILLTORS RELAXATION OSCILLATOR SWEEP CIRCUITS MICROELECTRONICS TECHNOLOGY INTERNAL ASSESSMENT: 10
6 8 20 10 8 8 15 TOTAL PERIODS: 85
3 4 5
6 7
CONTACT PERIODS: 75
EXAMINATION SCHEME
GROUP MODULE TO BE SET A B C 1, 2 3, 4 5, 6, 7 7 13 13 OBJECTIVE QUESTIONS TO BE ANSWERED ANY 25 MARKS PER QUESTION ONE TOTAL MARKS 1 x 25 = 25 TO BE SET TWO FOUR FOUR FIVE, TAKING AT LEAST ONE FROM EACH GROUP 10 SUBJECTIVE QUESTIONS TO BE ANSWERED MARKS PER QUESTION TOTAL MARKS 10 X 5 = 50
14 PERIODS
6
GROUP B
Module 3 3.1 3.2 OPERATIONAL AMPLIFIER
30 PERIODS
23
Circuit operation of differential amplifier single & double ended INTRODUCTION TO OPERATIONAL AMPLIFIER: Inverting and non-inverting mode and their gain calculation Common mode rejection ratio Bias current Offset voltage and current Slew rate Open loop and closed loop gain Input and output impedance Frequency response and virtual ground APPLICATIONS OF OPAMP: Adder Subtractor Voltage Follower Integrator Differentiator Comparator Schmitt Trigger Voltage Limiter Log Amplifier Clipper Clamper Concept of Active Filter OSCILLATORS 10 Concept of oscillation Barkhausen criteria Operation of following oscillators: a) tuned collector, b) Hartley, c) Colpitt, d) Wein-bridge, e) Phase Shift, and, F) Crystal.
Module 4
GROUP C
Module 5 5.1 5.2 5.3 RELAXATION OSCILLATOR Operation of monostable, astable and bistable multivibrator with waveforms Schmitt trigger circuits
31 PERIODS
8
IC-555, internal block diagram and pin function, construction of different multivibrators with IC-555 - 25 -
PART II ETCE
SWEEP CIRCUITS
Fundamentals of sweep circuit operation Difference between voltage time base generator and current time base generator Operation of Miller and Bootstrap circuits Applications of Sweep Circuits MICROELECTRONICS TECHNOLOGY 12 Advantages of ICs over discrete elements TYPES OF ICS: Linear and Digital Monolithic and Hybrid PLANAR TECHNOLOGY: Crystal growth of wafer Epitaxial growth Oxidation Photolithography Chemical etching Diffusion Ion implantation and metallisation (ideas only) Fabrication of BJT, diode, resistor and capacitor (salient features)
Module 7
REFERENCE BOOKS
1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. Microelectronics / Millman & Grabel / Tata McGraw-Hill Electronic Devices and Circuits / Millman & Halkias / Tata McGraw-Hill Electronic Principles / Malvino / Tata McGraw-Hill Electronic Devices and Circuits / Boylestad & Nashalsky / Prentice Hall of India, N. Delhi Electronic Devices and Circuits / S. Salivanan / Tata McGraw-Hill Electronic Devices and Circuits / Mottershed / Prentice Hall of India, N. Delhi Electronic Devices and Circuits / Millman & Halkias / Tata McGraw-Hill Electronic Fundamentals and Applications / Chattopadhyay & Rakhshit / New Age International Basic Electronic & Linear Circuits / Bhargava / Tata McGraw-Hill Electronic Principle / Sahadeb / Dhanpat Rai & sons Microelectronics / Rashid Opamp and Linear Integrated Circuits / Gayakwad / Prentice Hall of India, N. Delhi Pulse Digital and Switching waveforms / Millman & Taub / Tata McGraw-Hill
_______
CONSUMER ELECTRONICS
Subject Code ETCE / 4 / T5 / CE Course offered in Part II Second Semester Course Duration 17 weeks 5 lecture contact periods per week Full Marks 75
OBJECTIVE
This course is designed to provide required knowledge and skills in the communication systems such as microphone and loudspeakers. The students will also be acquainted with the systems like tape recorder, audio CD player, B/W TV, colour TV, VCR, VCP etc. Also covered in this are some of the home appliances like washing machine, electronic cooker etc. Upon successful completion of this course the students will be able to: 1. discuss the basic concept dealing with the operations of microphone, loudspeakers and tape recorder; 2. discuss the basic concepts dealing with the operation of B/W TV circuits, Colour TV circuits, VCR circuits and audio CD player; 3. understand the function of cable TV system, washing machine, microwave oven etc.
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9 10
6 8 TOTAL PERIODS: 85
CONTACT PERIODS: 75
EXAMINATION SCHEME
GROUP MODULE TO BE SET A B C 1, 2, 3, 4 5, 6 7, 8, 9, 10 9 13 11 OBJECTIVE QUESTIONS TO BE ANSWERED ANY 25 MARKS PER QUESTION ONE TOTAL MARKS 1 x 25 = 25 TO BE SET TWO THREE THREE SUBJECTIVE QUESTIONS TO BE ANSWERED ONE TWO TWO MARKS PER QUESTION 10 10 10 TOTAL MARKS 10 X 5 = 50
20 PERIODS
5
CONSTRUCTION, WORKING PRINCIPLE AND FREQUENCY RESPONSE OF: Carbon Microphone Variable Reactance Microphone Capacitance Microphone Piezo-Electric Microphone Moving Coil Microphone Module 2 LOUDSPEAKERS 5 Frequency ranges of musical instruments Intensity and Dynamic Range Constructions and working principles of Moving Coil Loudspeaker Impedance and Power Level of loudspeaker Frequency characteristics of Practical Loudspeakers: Woofer, Tweeter, Squawker Loudspeaker Enclosure Module 3 TAPE RECORDERS 5 Principle of magnetic recording and playback Requirement of bias Working principle with block schematic diagram of a tape recorder system Module 4 STEREOS 5 DETAILS OF STEREO COMPONENTS: Tone, Bass, Treble, Balance & Control Crossover Networks Graphic Equalizer Noise Reduction Techniques
GROUP B
Module 5 5.1 5.2 BLACK AND WHITE TV SYSTEM Working principle with block diagram of TV transmitter and receiver
55 PERIODS
15
Brief description with circuit diagram: TV Tuner Video IF stage Sound stage Picture tube & its associated circuit Synchronizing circuits Automatic Gain Control (AGC) Horizontal & vertical deflection circuits EHT section Remote control of a TV receiver COLOUR TV SYSTEM 14 + 8
Module 6
Colour technology Working principle of Vi d ic o n camera Block schematic description of a colour encoder and decoder RGB drivers of a colour picture tube Colour picture tube & its associated circuits Module 7 Module 8 CD PLAYER CABLE TV SYSTEM 12 6 Working principle of CD recording and CD playing Working principle of VCD and DVD player Channel and cable type of cable TV system Head end processor Trunk & cable distribution system with block diagram Scrambling
REFERENCE BOOKS
1. 2. 3. 4. 5. 6. 7. A ud i o a nd V id e o S ys te m s / R. G . G up t a / T at a Mc G r a w - H i l l Mo n oc h r om e a nd C o lo ur T V / G u la t i / Ne w A ge I n ter n at i on a l B ook V id e o / Ne wn es s / B P B VC R- Pr i nc i p l e M ai n te n anc e a n d Re p a ir / S. P . S harm a / T a ta Mc G r a w - H i l l Ca b le T V T ec h n ol o g y an d O p er at i o n / B art l e tt / T a t a Mc G r a w - H i ll E lec tr on ic I ns tr um en ts a n d S ys t em s / R. G . G up t a / T at a Mc G ra w - H i l l E lec tr on ic C om m un ic a ti o n / Ru d d y a nd C o o l en / Pr en t ic e H a l l of I n d ia , N. D e lh i - 27 -
PART II ETCE
_______
MICROPROCESSOR
Subject Code ETCE / 4 / T6 / MP1 Course offered in Part II Second Semester Course Duration 17 weeks
I
Full Marks 75
OBJECTIVE
This course is designed to introduce the student to the field of microprocessor and microcomputers. Topics covered include organization of a computer, the architecture of typical 8 bit and 16 bits microprocessors, its function and its instruction set. Machine language of the 8085 and 8086 microprocessors is covered in details and the students are given the opportunity of writing programs and controlling devices using an 8085 and 8086 based system development kit. Upon successful completion of this course the students will be able to: 1. identify the main function and application of microprocessor and microcomputers; 2. describe the basic organization of a computer; 3. describe the architecture of 8 bit microprocessor; 4. write machine language program for an 8085 based microcomputer; 5. describe memory and I/O interfacing technique; 6. describe I/O interfacing scheme and devices; 7. program I/O interface devices; 8. describe the architecture and instruction set of 8086 and write program.
EXAMINATION SCHEME
GROUP MODULE TO BE SET A B C 1, 2, 3, 4 5, 6, 7 8, 9 11 9 13 OBJECTIVE QUESTIONS TO BE ANSWERED ANY 25 MARKS PER QUESTION 1 TOTAL MARKS 1 x 25 = 25 TO BE SET THREE THREE THREE FIVE, TAKING AT LEAST ONE FROM EACH GROUP 10 SUBJECTIVE QUESTIONS TO BE ANSWERED MARKS PER QUESTION TOTAL MARKS 10 X 5 = 50
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WBSCTE
GROUP A
Module 1 Module 2 2.1 2.2 2.3 2.4 3.1 3.2 3.3 3.4 4.1 4.2 4.3 INTRODUCTION TO MICROPROCESSOR BASIC ARCHITECTURE OF 8-BIT MICROPROCESSOR Generation and evolution of microprocessors
20 PERIODS
1 5
Tristate register and switch Architecture of intel-8085- registers, timing and control, add buffer and add data, interrupts control, serial input and output control Pin out configuration Demultiplexing and buffering the system bus TIMING CYCLE OF 8085 4 Machine cycle, instruction cycle Instruction fetch cycle, read cycle and write cycle Bus idle cycle Hold and Halt state PROGRAMMING OF 8085 10 Addressing modes of 8085A Classification of instruction and Instruction set of 8085A Concept of assembly language programming- basic assembler directives and labels
Module 3
Module 4
GROUP B
Module 5 5.1 5.2 5.3 5.4 5.5 5.6 5.7 6.1 6.2 6.3 6.4 6.5 MEMORY INTERFACING & I / O INTERFACING Basic bus interface Address decoding Interfacing ROM, static RAM and dynamic RAM Address space provided by 8085A Address decoding Interfacing I/O devices Isolated I/O versus memory mapped I/O I / O DATA TRANSFER SCHEME
16 PERIODS
8
Module 6
Synchronous and asynchronous data transfer Interrupt driven data transfer, single interrupt, multiple interrupt- polling, priority interrupt controller, dairy chaining Interrupts in 8085A Software and hard ware Vectored Enabling, disabling and masking of interrupts Direct memory access Block transfer DMA Cycle stealing DMA
GROUP C
24 PERIODS
12
Module 7 I / O INTERFACING DEVICES 7.1 Functional block diagram and programming of : a) 8253(programmable counter), b) 8255(PPI), c) 8279(Keyboard and display controller) 7.2 Functional block description and control word development of : a) 8237(programmable DMA controller), b) 8259 (programmable interrupt controller) 7.3 8.1 8.2 8.3 8.4 Interfacing DAC & ADC with 8085 INTRODUCTION TO 8086 Module 8
12
FUNCTIONAL BLOCK DIAGRAM OF 8086: Bus interface unit, execution unit, general purpose register, flag register, pointer and index register Memory address space and generating a memory address Dynamically allocable relocatable code Dedicated and reserved memory location - 29 -
PART II ETCE
Pin configuration of 8086- minimum and maximum mode Addressing mode of 8086 Instruction set of 8086
REFERENCE BOOKS
1. 2. 3. 4. 5. 6. 7. Microprocessors Architectures and Applications / Gaonkar / New Age International Introduction to microprocessors / A. P. Mathur / Tata McGraw-Hill Microprocessors: Principles and Applications / A. K. Pal / Tata McGraw-Hill Microprocessors Principle and Applications / C. M. Gilmore / Tata McGraw-Hill Microprocessors and its applications / Leventhal Advanced Microprocessor and Interfacing / Badri Ram / Tata McGraw-Hill Microprocessor and Interfacing / Hall / Tata McGraw-Hill
_______
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to: (i) (ii) (iii) (iv) (v) (vi) (vii) look for suitable jobs by skimming through job advertisement; scan advertisements for specific information about particular jobs; develop aural-oral skills, recognition and interpretation of linguistic and non-linguistic forms which relate to job interviews; prepare for an interview; respond appropriately and politely at an interview; take part in group discussions; learn all kinds of communication needed at the workplace, including telephone calls.
M O D U L A R D I V ISI ON OF T H E S Y L L A B US & E X A M I N AT I O N S C H E M E
MODULE TOPIC LOOKING FOR A JOB JOB INTERVIEWS AT THE WORKPLACE INTERNAL ASSESSMENT: 4 TOTAL PERIODS: 34 8 16 CONTACT PERIODS 6 MARKS ALLOTTMENT CONTINUOUS INTERNAL ASSESSMENT OF 25 MARKS IS TO BE CARRIED OUT THROUGHOUT THE SECOND YEAR SECOND SEMESTER, WHICH SHOULD BE BASED ON THE STUDENTS PERFORMANCE OF THE TASKS GIVEN BY THE SUBJECT TEACHER. THE TASKS WOULD INCLUDE: (A) DIFFERENT KINDS OF BUSINESS LETTERS AT LEAST TWO; (B) MEMO AT LEAST TWO; (C) JOB APPLICATION AT LEAST TWO; (D) REPORT WRITING TEACHERS DISCRETION. EXTERNAL ASSESSMENT OF 25 MARKS SHALL BE HELD AT THE END OF THE SECOND YEAR SECOND SEMESTER.
WBSCTE
TEACHING INSTRUCTIONS
There should be no difference between the teaching methodology of the lecture classes of the subject COMMUNICATION SKILLS (JOB) and those of the sessional classes of the subject COMMUNICATION SKILLS (JOB) LAB, since all the modules are practical oriented. Things to be followed by the polytechnics for effective teaching of the subject: (a) (b) (c) L R U C Room to be used for the classes; English newspapers be made available on a regular basis to the students; samples of different Application Forms be made available to the students.
TEXT BOOK
ENGLISH SKILLS for Technical Students TEACHERS HANDBOOK / West Bengal State Council of Technical Education in collaboration with THE BRITISH COUNCIL / Orient Longman
_______
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to develop the skills corresponding to the knowledge acquired in the theoretical subject COMMUNICATION ENGINEERING I.
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Second Year First Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Second Year First Semester on the entire syllabus. One assignment per student from any one of the assignments done is to be performed. Assignment is to be set by lottery system. Distribution of marks: On spot job 25, Vivavoce 25.
5. 6.
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PART II ETCE
TOTAL: 68 periods
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to develop the skills corresponding to the knowledge acquired in the theoretical subject ANALOG ELECRTONICS II.
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Second Year First Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Second Year First Semester on the entire syllabus. One assignment per student from any one of the assignments done is to be performed. Assignment is to be set by lottery system. Distribution of marks: On spot job 25, Vivavoce 25.
4. 5. 6. 7. 8.
9. 10.
_______
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to develop the skills corresponding to the knowledge acquired in the theoretical subject CONSUMER ELECTRONICS.
EXAMINATION SCHEME
1. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Second Year First Semester. Distribution of marks: Performance of Job 35, Notebook 15. - 32 -
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2.
External Assessment of 50 marks shall be held at the end of the Second Year First Semester on the entire syllabus. One assignment per student from any one of the assignments done is to be performed. Assignment is to be set by lottery system. Distribution of marks: On spot job 25, Viva-voce 25.
_______
MICROPROCESSOR LAB I
Subject Code ETCE / 4 / S5 / LMP1 Course offered in Part II Second Semester Course Duration 17 weeks INTERNAL ASSESSMENT: 8 periods Full Marks 100 TOTAL: 68 periods
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to develop the skills corresponding to the knowledge acquired in the theoretical subject MICROPROCESSOR I.
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Second Year First Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Second Year First Semester on the entire syllabus. One assignment per student from any one of the assignments done is to be performed. Assignment is to be set by lottery system. Distribution of marks: On spot job 25, Vivavoce 25.
5. 6.
PART II ETCE
2. Assume that six types of data are stored at consecutive memory locations, starting at location X. Write a program which loads register E with (X), that is with data contained in memory location X,D with (X+1),c with (X+2) and A(X+3). [A] Use direct addressing; [b] Use indirect addressing. 3. Assume that one byte of a data is stored at memory location X. Write a program which tests bit five of (X), write 00 into (X+1), if bit five is 0, and write FF at the same location if bit five is 1. Test the program in single step and run mode. 4. Write a program which tests the zero condition of a data-byte specified at memory location X. If it is 0, 00 should be stored at location (X+1), and if non-zero FF should be stored at the same location. 5. Write a program which tests the all-one condition of a data- byte specified at memory location X. If all bytes are one, store FF at (X+1), else store 00 at the same location. 6. Four bytes of data are specified at consecutive memory starting at X. Write a program which increments the value of all four bytes by two. 7. Two data bytes are stored at location X and Y. Interchange the data at the two locations using indirect addressing. 8. Two binary numbers are stored at data-memory locations X and (X+1). Add the two numbers and store the result at (X+2) 9. Four unsigned binary numbers are stored at consecutive memory location starting at X. Compute the sum of the four numbers ignoring the possible overflow and store it at location Y. Use indirect addressing. 10. Two unsigned binary numbers are stored at consecutive memory location X and (X+1). Compute the difference (X+1) -(X) and store the result at and the sign (00 if positive, 01 if negative) at (Y+1). 11. A double precision number (that is a sixteen bit unsigned number) is stored at X and (X+1), low order byte at X. Another double precision number is stored at Y and (Y+1).Subtract the two numbers and store the result in W and (W+1) 12. Two 2-digit BCD numbers are stored in consecutive memory locations X and (X+1). Write a program for computing the sum and store the result at location Y (use decimal adjust). 13. Two 2-digit BCD numbers are stored at consecutive memory locations X and (X+1). Compute the difference of the two and store the result at location Y. Use decimal subtraction with the aid of DAA and 10s compliment arithmetic. 14. Implement a time-delay loop (counter) for the generation of milliseconds delay. Determine the exact time- delay by adding up the states of the instructions executed by the program. 15. Write a program for a decimal counter which counts from 00 to a given decimal number with a programmable clock frequency and display the count in the data-field using the corresponding monitor subroutine. The frequency is specified at data memory location X. 16. N binary numbers are stored at consecutive data memory locations starting at X and N is defined at memory location Y. Find the largest number and display it in the data field. 17. N binary numbers are stored at consecutive data memory locations starting at X and N is defined at memory location Y. Rearrange the numbers in ascending and descending order. 18. Write a program for moving a data block, starting from address X to address Y. The addresses X, Y as well as the length of the block are specified at some suitable memory locations. 19. Write a program for displaying (in address field) the hex-character which is depressed. The program should be such that the data can be entered through the keyboard indefinite number of times and at every key depression the display characters get shifted 1 digit to left as the new digit is entered an the least significant digit. A small part of the monitor-program is thus implemented. For this program, use the keyboards subroutine. 20. Write the following program: If key GO command is depressed (Byte 12H will be entered into the accumulator) the subsequent hexadecimal key entries will be displayed in the address field and if key single step command is pressed (15H), subsequent hexadecimal key entries will be displayed in the data field. This problem demonstrates a part of a possible monitor function. - 34 -
WBSCTE
21. Two unsigned binary numbers are stored at data memory locations X and (X+1). Find the product and display in the address field. Find the product by successive addition that is the multiplier is added as often to itself and as corresponds to the value of multiplicant. 22. Divide a sixteen bit number by an eight bit number and display the result in the data field. [A] Use successive subtraction method. [B] Use the common for division (shift right and subtract) [C] Compare [A] with [B]. 23. A 2-digit BCD number is stored in memory location X. Convert the number into binary and display the result in the data field. 24. Divide the contents of a memory location X into two 4-bit sections and store them in the memory locations (X+1) and (X+2). Place the 4 most significant bits of memory locations X in the 4 least significant bit positions of memory location (X+1), place the 4 least significant bit positions of memory location ( X+2 ). Clear the 4 most significant bit positions of memory locations (X+2) and (X+2). 25. Add the 16-bit numbers in memory locations X and (X+1) in the memory location (X+2) and (X+2). The most significant 8-bits of the two numbers to be added are in memory locations (X+1) and (X+3). Store the result in memory locations (X+4) and (X+5) with most significant byte in memory location (X+5). 26. Place the larger of the contents of the memory locations X and (X+1) in the memory location (X+2). Assume that the contents of the memory location X contain a number between 0 and 7 inclusive. 27. Calculate the square of the contents of the memory locations X using a table and place the result in the memory location (X+1). Assume memory locations X contain a number between 0 and 7 c. 28. Place the 1s complement of a 16-bit number in memory locations X and (X+1) in memory locations (X+2) and (X+3). The most significant bytes in locations (X+1) and (X+3). 29. Add the 24-bit number in memory locations X,(X+1) and (X+2) to the 24-bit number in memory locations ( X+3 ), ( X+4 ) and ( X+5 ), the least significant 8-bits in memory locations X and ( X+3 ). Store the result in memory locations (X+6) and (X+7) and (X+8) with the most significant bits in (X+8) and the least significant bit in (X+6). 30. Calculate the squares of contents of memory locations X and (X+1) and add them together. Place the result in memory location (X+2). Assume that the memory locations X and (X+1) both contain a number between 0and 7 inclusive. 31. Calculate the sum of a series of numbers. The length or the series is in memory location (X+2) and the series itself begins in memory location (X+2).Store the sum in memory location X and (X+1) eight most significant bits in (X+1). 32. Determine the number of negative elements in a block of data. The length of block is in memory location (X+1) and the block itself starts in memory location (X+2). Store the number of negative elements in the memory location X. 33. Find the largest element in a block of data. The length of the block is in memory location (X+1) and block itself starts in memory location (X+2). Store the maximum in memory location X. Assume that the numbers in the block are all 8-bit unsigned binary numbers. 34. Shift the contents of memory location X left until the most significant bit of the number is 1. Store the result in memory location (X+1) and the numbers of the left shifts required in the memory location (X+2). If the contents of the memory location X are 0, clear both (X+1) and (X+2). 35. Determine the numbers of zeroes, positive (most significant zero but entire number not zero) and negative elements (most significant 1) in block. The length of the block is in memory location (X+3) and the block itself starts in memory location (X+4). Place the number of negative elements in the memory location X, the number of zero elements in memory location (X+1) and the number of positive elements in memory location (X+2). 36. Find the smallest element in a block of data. The length of the block is in memory location ( x + 1 ) and the block itself begins in memory location ( x+2 ). Store the minimum in memory location X. Assume the numbers in the block to be 8-bit unsigned binary numbers. 37. Convert the contents of memory location X to a 7-segment code in memory location (X+1). If the memory location X dopes not contain a single decimal digital, clear memory location (x+1). - 35 -
PART II ETCE
38. Convert the contents of memory location X from an ASCII character to a decimal digit and store the result in memory location (X+1 ). If the contents of memory location X is not the ASCII presentation of the decimal digit, set the content of the memory location (x+1) to FF (hex). 39. Convert two BCD digits in memory location X and (X+1) to a binary number in memory location(x+2). The most significant BCD digit is the one in memory location X. 40. Convert a string of 8 ASCII characters into a binary number and store the result in memory location X. If any of the characters are not either ASCII zero or ASCII one, set memory location(x+1) to FF (hex), otherwise, clear memory location(X+1). The string of characters is in memory location (X+2) through(X+9) with the most significant bit in memory location (x+2). 41. Convert the contents of memory location X to a hexadecimal digit and store the result in memory location (X+1). Assume that the memory location X contains the ASCII representation of hexadecimal digit. 42. Add even parity to a string of 7-bit ASCII characters. The length of the string is in memory location X, and the string starts from (X+1) onwards. Place even parity in the most significant bit of each character, i.e. set MSB if that makes the total number of 1 bit in the word even. 43. Add two multiple word binary numbers. The length of the numbers (in byte) is in memory location Z, the starting addresses of the numbers are in registers DE and HL, and the starting address of the result is in register BC. All the numbers begin with least significant bits. 44. Write a program segment for 8085 that could be used to generate a delay (a) 100s. (b) 10 ms. This means that in a program, before execution of a specific instruction, if a delay of at least 100s is required, one should be able to obtain it by placing this segment just before that instruction. 45. Write a program which will subtract the number in address XX01 by adding the complement of the number to be subtracted. The result should be stored in address in XX02. 46. Write a program which will put two single digit hexadecimal numbers together. The first single digit hexadecimal or hex would be the MSB and the second would be LSB. 47. Write a program which will test bit-3 of hex number with the location of bet-3 in XX00. If bit-3 is high (1), no action is taken and the data address location will be in null state. 48. Write a program which will determine if the parity of the number in memory location XX00 is odd or even. If the number is odd a 00 will be stored in XX01 and if the number is even an EE will be stored in XX01.
_______
- 36 -
DETAILED SYLLABI OF THE DIFFERENT COURSES OFFERED IN PART III FIRST & SECOND SEMESTERS
WBSCTE
INDUSTRIAL MANAGEMENT
Subject Code INST / 5 / T1 / IMNT Course offered in Part III First Semester Course Duration 17 weeks 3 lecture contact periods per week Full Marks 75
OBJECTIVE
This subject provides the students of polytechnics with an exposure to the art and science of management principles, functions, techniques and skills that are essential for maximising attainment of the organisational goals with the available manpower and resources. Upon successful completion of this subject, the students shall be equipped with the fundamental knowledge of management which should make them confident in facing the challenges of their responsibilities in the different organisational scenarios.
C CONTACT PERIODS: 45
EXAMINATION SCHEME
GROUP MODULE TO BE SET A B C 1, 2, 3 4, 5, 6 7, 8 14 11 8 OBJECTIVE QUESTIONS TO BE ANSWERED ANY 25 MARKS PER QUESTION ONE TOTAL MARKS 25 x 1 = 25 TO BE SET FOUR THREE TWO SUBJECTIVE QUESTIONS TO BE ANSWERED FIVE, TAKING AT LEAST ONE FROM EACH GROUP MARKS PER QUESTION 10 TOTAL MARKS 5 X 10 = 50
19 PERIODS
5
Principles & functions of management Contributions of F.W. Taylor, Henry Fayol, Max Weber and Elton Mayo & Roethlisburger in development of the theories of management science. Module 2 ORGANISATIONAL BEHAVIOUR 6 Objectives Brief introduction to: Motivation & Morale Perception Leadership & Leadership Styles Communication Team Building Work Culture. Module 3 HUMAN RESOURCES MANAGEMENT 8 Scope & Functions Human Resources Planning Selection & Recruitment Training & Development Performance Appraisal Industrial Safety.
GROUP - B
Module 4 PRODUCTION M ANAGEMENT
15 PERIODS
9
PRODUCTION PLANNING: Routing Loading Scheduling PRODUCTION CONTROL: Expediting Dispatching Materials Handling Work Study Productivity QUALITY MANAGEMENT: Tools & Techniques Quality Management System. Module 5 M ATERIALS M ANAGEMENT 3 OBJECTIVES & FUNCTIONS: Purchase function Stores function INVENTORY MANAGEMENT: ABC, VED analyses. - 39 -
GROUP - C
Module 7 M ARKETING & SALES M ANAGEMENT
11 PERIODS
5
Objectives & Functions Marketing of products & Services Advertising & Sales Promotion Consumer Behaviour Module 8 QUANTITATIVE TECHNIQUES Linear programming (graphical method only) NETWORK ANALYSIS: PERT CPM 6
REFERENCE BOOKS
Essentials of Management / Kontz / McGraw-Hill of India Organization & Behaviour / M. Banerjee / Allied Publishers Human Behaviour at Work: Organizational Behaviour / Keith Davis & Newstrom / McGraw-Hill of India Human Resources Management / Mirza Saiyatain / Tata McGraw-Hill Production Management & Control / Nikhil Barat / U.N. Dhar & Co. Production Management / Keith Lockyer / ELBS Marketing Management / Philip Kolter / Prentice Hall of India Lectures on Management Accounting / Dr. B.K. Basu / Basusri Bookstall, Kolkata An Insight into Auditing: A Multi-dimensional Approach / Dr. B.K. Basu / Basusri Bookstall, Kolkata Business Strategies, Financial Management & Management Accounting / S.K. Poddar / The Association of Engineers (India)
_______
ELECTRONIC MEASUREMENT
Subject Code ETCE / 5 / T2 / EMN Course offered in Part III First Semester Course Duration 17 weeks 4 lecture contact periods per week Full Marks 75
OBJECTIVE
After successful completion of this course the students will be able to get familiar with the measurement fundamentals and instruments like electronic voltmeter, Multimeter, Q-meter, CRO, signal generator, spectrum analyzer etc.
EXAMINATION SCHEME
GROUP MODULE TO BE SET 12 12 12 OBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION ANY 25 ONE TOTAL MARKS 25 x 1 = 25 TO BE SET THREE THREE THREE SUBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION FIVE, TAKING AT LEAST ONE FROM EACH 10 GROUP TOTAL MARKS 5 X 10 = 50
A B C
1, 2, 3 4, 5, 6 7, 8, 9, 10
- 40 -
WBSCTE
20 PERIODS
6
1.1 Explanation of accuracy, precision, sensitivity, resolution, dynamic range, response and repeatability of measuring instruments. 1.2 Role of Units in measurements and different types of units Definition of Errors and type of errors Definition of Primary and Secondary Standards Concept of Calibration. Module 2 PERMANENT M AGNET MOVING COIL METER 6 2.1 Theory of operation, working principle and construction of PMMC. 2.2 Measurement of voltage, current and resistance. 2.3 Loading effect, extension of range and PMMC Multimeter. Module 3 MEASUREMENT OF VOLTAGE, CURRENT, ENERGY & POWER 8 3.1 Principle of rectifier type instrument Average reading and peak reading Advantages and limitations. 3.2 Compensated thermocouple type instruments Construction and working principle of electrodynamic wattmeter.
GROUP - B
Module 4 ELECTRONIC VOLTMETER & MULTI METER
22 PERIODS
6
4.1 Advantages of electronic voltmeter over ordinary voltmeter. 4.2 Working principle of Digital Multi Meter Different types of DMM: Integration and successive approximation type. 4.3 Advantages of DMM over Conventional Multi Meter. Module 5 IMPEDANCE BRIDGE & Q-METER 6 5.1 DC Wheatstone Bridge and its application AC bridge-balance Detection and source of excitation Maxwells induction bridge Hays bridge Capacitance comparison bridge Wien Bridge. 5.2 Basic principle of Q-Meter and its working circuit. 5.3 Basic principle and operation of RLC meter. Module 6 CATHODE RAY OSCILLOSCOPE 10 6.1 Block diagram of CRO, constructional features of CRT and principle of operation. 6.2 Block schematic description of: (a) Vertical Amplifier, (b) Time Base Generator, (c) Trace Synchronization, (d) Triggering Modes, (e) Front Panel Controls, (f) Probe Characteristics. 6.3 Features of dual trace oscilloscopes, chopper beam switch, alternate beam switch. 6.4 Block schematic description of digital storage oscilloscope. 6.5 Measurement of amplitude, frequency, time period, phase angle and delay time by CRO.
GROUP - C
Module 7 TIME & FREQUENCY MEASUREMENT
18 PERIODS
6
7.1 Measurement of frequency by heterodyne method Block schematic description of digital frequency counter. 7.2 Measurement of frequency, time period and time interval through frequency counter. Module 8 SIGNAL GENERATOR 5 Block schematic descriptions, specifications and uses of: Audio & Radio Frequency Signal Generator Function Generator Pulse Generator. Module 9 RF POWER MEASUREMENT 2 5 Bolometer Method of power measurement Balance Bridge Bolometer. Module 10 FREQUENCY SPECTRUM, DISTORTION & WAVE ANALYSIS 10.1 Basic working principle of Heterodyne Wave Analyzer 10.2 Block schematic description of Harmonic Distortion Analyzer. 10.3 Block schematic description of Spectrum Analyzer and its use. - 41 -
REFERENCE BOOKS
1. Electronic Measurement and Measurement Technique / Cooper / Prentice Hall of India 2. Electronic Instrumentation / Kalsi / Tata McGraw-Hill 3. A Course in Electrical and Electronic Measurement and Instrumentation / A.K. Sawhney / Dhanpat Rai & Sons 4. Electronic Measurement and Instrumentation / Oliver Cage / McGraw Hill 5. Students Reference Manual for Electronic Instrumentation Lab / Wolf and Smith / Prentice Hall of India
_______
COMMUNICATION ENGINEERING II
Subject Code ETCE / 5 / T3 / CE2 Course offered in Part III First Semester Course Duration 17 weeks 4 lecture contact periods per week Full Marks 75
OBJECTIVE
This course is continuation of the one titled COMMUNICATION ENGINEERING I, offered in Part II Second Semester. After completion of this course, the students will be able to get some idea about modern digital communication techniques like delta modulation, multiplexing, ASK, FSK, PSK etc. They will also know the basics of radar system, microwave amplifiers and antenna wave guide.
EXAMINATION SCHEME
GROUP MODULE TO BE SET A B C 1, 2 3, 4, 5 6, 7, 8 11 11 14 OBJECTIVE QUESTIONS TO BE ANSWERED ANY 25 MARKS PER QUESTION ONE TOTAL MARKS 25 x 1 = 25 TO BE SET THREE THREE FOUR SUBJECTIVE QUESTIONS TO BE ANSWERED FIVE, TAKING AT LEAST ONE FROM EACH GROUP 10 MARKS PER QUESTION TOTAL MARKS 5 X 10 = 50
18 PERIODS
WBSCTE
Frequency division multiplexing with practical examples, phase locked loop. Merits and demerits of TDM and FDM.
GROUP - B
RF MODULATION FOR BASE BAND SIGNAL Concepts of binary modulation techniques. Principles of amplitude shift keying, frequency shift keying and phase shift keying. Comparison between ASK, FSK and PSK. PERFORMANCE & TESTING OF DIGITAL COMMUNICATION LINK 6
18 PERIODS
INFORMATION THEORY: Relationship between data speed and channel bandwidth Shannon-Hartley theorem Theory of line coding. Error Correction Techniques: Parity checking and cyclic redundancy check. Brief description of inter-symbolic interference and interpretation of eye pattern. PROPAGATION OF WAVES 4 Elementary concepts about propagation of waves. Propagation of ground wave, space wave and sky wave. Iono-spheric layers Skip distance Plasma frequency Critical frequency MUF Virtual height.
GROUP - C
RADAR SYSTEMS
24 PERIODS
6
Block schematic description of simple radar system Plan position indicator, frequency and power range of radar system Operation of duplexer RADAR range equation. Block schematic description of pulsed radar system and moving target indicator including Doppler Effect, blind speed. MICROWAVE AMPLIFIER 3 Problems associated with conventional tubes at microwave frequency. Basic idea of amplification with velocity and density modulation in case of MULTI-CAVITY KLYSTRON, REFLEX KLYSTRON AND TRAVELLING W AVE TUBE Their efficiency, power output & frequency range of operation (no deduction) Field of applications. General features of GUNN diode and IMPATT diode their field of applications ANTENNA & WAVEGUIDE 15 8.1 BASIC PRINCIPLES of antenna Different types of antenna: Dipole antenna Half wave and folded, microwave antenna Horn antenna, parabolic antenna 8.2 PROPERTIES of antenna: Gain Bandwidth Beam Width Impedance Radiation Pattern. 8.3 ANTENNA ARRAYS: general idea of antenna array. 8.4 W AVE GUIDES: Rectangular Circular Wave Guide Modes. 8.5 MICROWAVE COMPONENTS: Directional Coupler Attenuator Isolator Circulator.
REFERENCE BOOKS
Communication Electronics / Frenzel / Tata McGraw-Hill Electronic Communication System / Dungan / Vikash Publishing House Electronic Communication System / Kennedy / Tata McGraw-Hill Principles of Communication System / Taub & Schilling / Tata McGraw-Hill Electronic Communication / Roddy & Coolen / Prentice Hall of India Communication System / Simon Haykin / W.I. Ltd. Telemetry Principles / D. Patranabis / Tata McGraw-Hill Analog and Digital Communication System / M.S. Roden / Shroff Pub. & Distrib. Pvt. Ltd.
_______
- 43 -
INDUSTRIAL ELECTRONICS I
Subject Code ETCE / 5 / T4 / IE1 Course offered in Part III First Semester Course Duration 17 weeks 3 lecture contact periods per week Full Marks 75
OBJECTIVE
This course is introduced to have the students become familiar with the high power electronic devices and components like power diode, IGBT, power transistor, SCR, power transformer etc.
EXAMINATION SCHEME
GROUP MODULE TO BE SET 14 12 10 OBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION ANY 25 ONE TOTAL MARKS 25 x 1 = 25 TO BE SET THREE THREE THREE SUBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION FIVE, TAKING AT LEAST ONE FROM 10 EACH GROUP TOTAL MARKS 5 X 10 = 50
A B C
1, 2 3, 4, 5 6, 7
15 PERIODS
6
Module 2
GROUP - B
Module 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 THYRISTORS
17 PERIODS
9
Switching characteristics and ratings of SCR. Two transistors method of SCR. Triggering circuits of SCR. Series parallel methods of SCR. Photo sensitive SCRS, GTO, SCS, TRIAC & DIAC Operating principles and their uses Construction, operation & characteristics of UJT equivalent circuits field of applications. Losses in power semi-conductor devices - 44 -
WBSCTE
Module 4
4.1 Overload Protection Fuse Circuit Breaker Transient Protector. 4.2 Protection by RC networks, MOV and snubber. 4.3 Transient voltage suppressors. 4.4 dV/dT and dI/dT protection of SCR Module 5 COMMUTATION CIRCUITS 3 5.1 Commutation circuits of SCR natural and forced commutation class A, B, C, D & E
GROUP - C
Module 6 6.1 6.2 6.3 6.4 MOUNTING & COOLING OF SEMICONDUCTOR DEVICES Heat transfer fundamentals: Conduction Convection Radiation. Thermal resistance Transient thermal impedance. Use of heat sink and heat sink compound. Mounting principles and types of cooling (natural, forced air, forced liquid). Module 7 SINGLE PHASE & POLYPHASE CONTROLLED RECTIFIER
13 PERIODS
5
7.1 Single phase control rectifier circuit Principle of operation with resistive and inductive load Use of free wheel diode. 7.2 Three phase half wave and full wave control rectifier Operation with inductive and resistive load Use of free wheel diode. 7.3 Calculation of Vdc, Vrms, ripple factor, PIV and efficiency of single phase & three phase control rectifier. 7.4 Concept of full control and half control rectifier.
REFERENCE BOOKS
Power Electronics / P.C. SEN / Tata McGraw-Hill Industrial Electronics & Control / S.K. Bhattacharya (TTTI) / Tata McGraw-Hill Power Electronics / Singh & Kanchandani / Tata McGraw-Hill Power Electronics & Control / S.K. Dutta / Prentice Hall of India Industrial Electronics / S.N. Biswas / Dhanpat Rai Industrial Electronics / Biswanath Pal / Prentice Hall of India Power Electronics Converter Application and Design / Mohon / W. I. Ltd.
_______
MICROPROCESSOR II
Subject Code ETCE / 5 / T5 / MP2 Course offered in Part III First Semester Course Duration 17 weeks 4 lecture contact periods per week Full Marks 75
OBJECTIVE
This course is continuation of the one entitled MICROPROCESSOR I, offered in Part II Second Semester. In this course, the modern Pentium processor is introduced to make the students familiar with the processors of modern computer. Also idea of interfacing and micro controller is given to make them acquainted with the PC connection and microprogramming.
EXAMINATION SCHEME
- 45 -
GROUP
MODULE TO BE SET 11 13 12
TOTAL MARKS 25 x 1 = 25
A B C
1, 2 3, 4, 5 6, 7
SUBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION FIVE, TAKING AT LEAST ONE FROM 10 EACH GROUP
TOTAL MARKS 5 X 10 = 50
18 PERIODS
12
FUNCTIONAL BLOCK DIAGRAM OF 8086: Bus interface unit, execution unit, general purpose register, flag register, pointer and index register Memory address space and generating a memory address Dynamically allocable relocatable code Dedicated and reserved memory location Pin configuration of 8086- minimum and maximum mode Addressing mode of 8086 Instruction set of 8086 Internal block diagram of 8088 INTERFACING TECHNIQUES OF CPU SUPPORT CHIPS 10 Comparison between 8086 and 8088. Interfacing system clock 8284. Interfacing bus controller 8288. Floating point process of 8087 and its interfacing. INTERRUPTS & DMA CONTROLLER 8 Interfacing of a DMA controller 8257. Interfacing of an interrupt controller 8257. Interrupt vector table. INTERRUPT TYPES: Software interrupt External maskable interrupt Non-maskable hardware interrupt. Priority in interrupt.
Module 2
Module 3
GROUP - B
Module 4 ADVANCED MICROPROCESSORS
22 PERIODS
12
4.1 80286: Architecture Real address mode Protected virtual address mode. 4.2 MULTI-TASKING & MULTI-USER OPERATING SYSTEM: Prescribing the environment Accessing resources Need for protection - 80386: Basic features of 80386 compared to 80286 - Concept of virtual and cache memory. 4.3 Memory management - 80486: Features of 80486 Internal cache memory support Comparison with 80386 basic concept of virtual memory and GUI 4.4 MEMORY MANAGEMENT SCHEME: Descriptors Accessing segments Selecting address translation register Physical address - PENTIUM PROCESSOR: Concept of super scalar Dual pipeline architecture Comparison with 80486. 4.5 Protection schemes Task switching Gates. Module 5 5.1 5.2 5.3 5.4 SERIAL INPUT OUTPUT INTERFACE 6 Concept of Universal Serial Bus. Functional description Interfacing of 8250(USART) Communication: Simplex Duplex Full duplex. Serial I/O Bus Standard and RS232 signals. PARALLEL INTERFACE 4
Module 6
6.1 Centronics interface standard for parallel communication. 6.2 Bi-directional standard for parallel ports (SPP & EPP).
GROUP - C
Module 7 BUS STANDARDS - 46 -
20 PERIODS
4
WBSCTE
RS422 standard. RS423 standard. IEEE488 standard. VME BUS. SINGLE CHIP MICROCONTROLLER 16
Module 8
8.1 Programming model of 8051: CPU Address bus Data bus Control bus Register Internal RAM and ROM Ports (serial and parallel) Timers Interrupts. 8.2 ADDRESS MODES: Immediate Register Direct Indirect Indexed. 8.3 INSTRUCTION TYPES: Arithmetic Logical Data Transfer (Internal/External) Boolean. 8.4 Control Transfer and Special Function Register.
REFERENCE BOOKS
Advanced Microprocessors and Interfacing / Badri Ram / Tata McGraw-Hill Microprocessors and Interfacing / Hall / Tata McGraw-Hill Microprocessor System: 8086/8088 Family / Liu & Gibson / Prentice Hall of India Microprocessor Comprehensive Study: Architecture, Programming & Interfacing / Naresh Grover / Dhanpat Rai & Co.
_______
C O M M U N I C A T I O N E N G I N E E R I N G L A B II
Subject Code ETCE / 5 / S1 / LCE2 Course offered in Part III First Semester Course Duration 17 weeks INTERNAL ASSESSMENT 8 periods Full Marks 100 TOTAL 68 periods
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to develop the skills corresponding to the knowledge acquired in the theoretical subject COMMUNICATION ENGINEERING II.
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Third Year First Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Third Year First Semester on the entire syllabus. One job per student from any one of the jobs done is to be performed. Job is to be set by lottery system. Distribution of marks: On spot job 25, Viva-voce 25.
_______
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to develop the skills corresponding to the knowledge acquired in the theoretical subject INDUSTRIAL ELECTRONICS I.
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Third Year First Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Third Year First Semester on the entire syllabus. One job per student from any one of the jobs done is to be performed. Job is to be set by lottery system. Distribution of marks: On spot job 25, Viva-voce 25.
_______
MICROPROCESSOR LAB II
Subject Code ETCE / 5 / S3 / LMP2 Course offered in Part III First Semester Course Duration 17 weeks INTERNAL ASSESSMENT 8 periods Full Marks 100 TOTAL 68 periods
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to develop the skills corresponding to the knowledge acquired in the theoretical subject MICROPROCESSOR II.
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Third Year First Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Third Year First Semester on the entire syllabus. One job per student from any one of the jobs done is to be performed. Job is to be set by lottery system. Distribution of marks: On spot job 25, Viva-voce 25.
WBSCTE
______
OBJECTIVE
This is an extension of the earlier courses in Communication Engineering. In this course, idea of long distance communication system is introduced. After successful completion of the course the students will be able to know the principles of satellite communication, optical communication, computer network and modern telephony.
CONTACT PERIODS: 60
EXAMINATION SCHEME
GROUP MODULE TO BE SET 14 12 10 OBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION ANY 25 ONE TOTAL MARKS 25 x 1 = 25 TO BE SET FOUR THREE TWO SUBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION FIVE, TAKING AT LEAST ONE FROM 10 EACH GROUP TOTAL MARKS 5 X 10 = 50
A B C
1, 2 3 4
24 PERIODS
12
1.1 Keplers Law Artificial Satellite Orbits Geostationary Orbit Satellite Speed 1.2 Transponder and satellite frequency allocations Frequencies reuse. 1.3 Block schematic description of communication satellite Elementary idea of FDMA and
TDMA.
Module 2 OPTICAL COMMUNICATION 16 2.1 Concept of fibre optic communication system Advantages and limitations of optical fibre
communication Construction of optical fibre Optical fibre types: Monomode and Multimode. OPTICAL FIBRE PERFORMANCE: Bandwidth-distance product Transmission loss. OPTICAL SOURCES: LED and LASER Modulation of LED and LASER Functions of optical detectors. Elementary ideas of LED, LCD, PHOTO-DIODES, PHOTO-TRANSISTORS and SOLAR CELL Block schematic description of optical fibre communication system. Components of optical fibre Coupler connector splice. Synchronous optical network. Multiplexing on optical fibre cable Wavelength division multiplexing (basic idea only) Applications of fibre optics. 16 PERIODS
GROUP - B
Module 3 COMPUTER NETWORK
3.1 Network Architecture Network Topology Routing Flow Control Error Control (Basic idea only). - 49 -
3.2 Connection of Networks: Bridge Router Gateway : Basic idea 3.3 Categories of Network: LAN MAN WAN File Server Network Client Server Network Peer to Peer Network. 3.4 Idea of network protocol Idea of layered protocol Ethernet CSMA/CD Token ring Token bus. 3.5 Circuit Switched and Packet Switched network. 3.6 Characteristics of modem. 3.7 Basic principles of Internet and E-mail ISDN
GROUP - C
Module 4 MODERN TELEPHONY
16 PERIODS
4.1 Working of facsimile or fax Idea of image processing by Charged Coupled Device. 4.2 Concept of cordless telephony. 4.3 CELLULAR TELEPHONE SYSTEM: Concept Mobile Telephone Switching Office Cellular telephone unit Frequency synthesizer Number Assignment Module Mobile Identification Number Digital cellular telephone system Global System for Mobile communication Concept of CDMA.
REFERENCE BOOKS
1. 2. 3. 4. 5. 6. 7. 8. Communication Electronics / Frenzel / Tata McGraw-Hill Electronic Communication System / Dungan / Vikash Publishing House Electronic Communication System / Kennedy / Tata McGraw-Hill Principles of Communication System / Taub & Schilling / Tata McGraw-Hill Electronic Communication / Roddy & Coolen / Prentice Hall of India Communication System / Simon Haykin / W.I. Ltd. Telemetry Principles / D. Patranabis / Tata McGraw-Hill Analog and Digital Communication System / M.S. Roden / Shroff Pub. & Distrib. Pvt. Ltd.
_______
INDUSTRIAL ELECTRONICS II
Subject Code ETCE / 6 / T2 / IE2 Course offered in Part III Second Semester Course Duration 17 weeks 4 lecture contact periods per week Full Marks 75
OBJECTIVE
In this course the applications of the high power electronic devices in instruments like SMPS and UPS are introduced. This course also includes choppers & inverters and speed control of different types of motors. After successful completion of this course the students will be familiar with different kinds of power supply and different methods of speed control of motors.
EXAMINATION SCHEME
- 50 -
WBSCTE
GROUP
MODULE TO BE SET
TOTAL MARKS 25 x 1 = 25
A B C
1, 2, 3 4, 5, 6 7, 8, 9
SUBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION FIVE, TAKING AT LEAST ONE FROM 10 EACH GROUP
TOTAL MARKS 5 X 10 = 50
GROUP -B
20 PERIODS
6
Module 4 CHOPPERS 4.1 Principle of operation of chopper and its application. 4.2 Functional operation of forced, commutated and Jones chopper and their areas of applications. 4.3 Principle of operation of 4-quadrant chopper. 4.4 Principle of operation of Cycloconverter and its applications. Module 5 INVERTERS 5.1 Principle of operation of self-oscillating and driving inverter. 5.2 Principle of operation of voltage driver, current driver, half bridge and full bridge inverter. 5.3 Inverter loads. 5.4 Three phase inverter. 5.5 Applications of inverter. Module 6 DC MOTOR CONTROL 6.1 TYPES OF SPEED CONTROL: Armature Volt Field Current Control. 6.2 DRIVE SYSTEM: Controlled Rectifier Drive Reversible Drive Quadrant Drive Dual Converter.
GROUP - C
20 PERIODS
Module 7 VARIABLE SPEED DRIVE SYSTEM 8 7.1 Principle of variable speed drives. 7.2 Load characteristics. 7.3 Different types of load, fan load, transportation load, selection of motor depending upon loads. 7.4 Drive characteristics and speed changes. Module 8 AC MOTOR CONTROL 6 8.1 SPEED CONTROL OF AC MOTOR: Types of speed variation Frequency variation Stator volt variation Closed loop control Types of feedback. 8.2 TYPES OF BREAKING: Regenerative breaking Plugging. Module 9 STEPPER MOTOR CONTROL 9.1 Types and principle of operation of stepper motor. 9.2 STEPPER MOTOR CONTROL: Stepper Drive Dual Voltage Drive Chopper Drive. - 51 6
REFERENCE BOOKS
1. 2. 3. 4. 5. 6. 7. Power Electronics / P.C. SEN / Tata McGraw-Hill Industrial Electronics & Control / S.K. Bhattacharya (TTTI) / Tata McGraw-Hill Power Electronics / Singh & Kanchandani / Tata McGraw-Hill Power Electronics & Control / S.K. Dutta / Prentice Hall of India Industrial Electronics / S.N. Biswas / Dhanpat Rai & Sons Industrial Electronics / Biswanath Pal / Prentice Hall of India Power Electronics Converter Application and Design / Mohon / W. I. Ltd.
_______
OBJECTIVE
Measurement of different physical quantity can be done with the help of some instruments constructed of some electrical and electronic devices. The students will be familiar with the principle of operation of different transducer processing of signals of different instrument like LVDT, strain gauge, thermocouple, thermistors etc. The students will also be acquainted with the basics of control system after successful completion of this course.
EXAMINATION SCHEME
GROUP MODULE TO BE SET 12 12 12 OBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION ANY 25 ONE TOTAL MARKS 25 x 1 = 25 TO BE SET THREE THREE THREE SUBJECTIVE QUESTIONS TO BE ANSWERED MARKS PER QUESTION FIVE, TAKING AT LEAST ONE FROM 10 EACH GROUP TOTAL MARKS 5 X 10 = 50
A B C
1, 2 3, 4, 5 6, 7, 8
20 PERIODS
14
1.1 Input-Output Specification Sensitivity Accuracy Repeatability Resolution Hysterisis. 1.2 Principle of operation of transducer and sensor. 1.3 Measurement of physical quantities with transducer, displacement, potentiometer, LVDT, strain gauge, piezoelectric crystal. 1.4 Tachogenerator, resolution counters. 1.5 TEMPERATURE: RTD Thermistors Thermocouple. 1.6 FLOW: Positive displacement Electromagnetic heat Thermal heat. 1.7 Other applications like measurement of pH and conductivity. 1.8 Transducer as system components. - 52 -
WBSCTE
1.9 Factors for choice of transducer. Module 2 POSITION & DISPLACEMENT MEASUREMENT 6 2.1 Principle of Potentiometric Transducer. 2.2 Capacitance Transducer. 2.3 Linear Variable Differential Transformer.
GROUP - B
Module 3 PRESSURE OF FORCE & VIBRATION MEASUREMENT 3.1 Representative unit of pressure of force.
20 PERIODS
8
3.2 Primary pressure of force sensing alignments. 3.3 Electrical transducer alignments Electrical strain gauges: Types Gauge Factor Temperature Specification. 3.4 SEMICONDUCTOR STRAIN GAUGES: Properties of piezoelectric alignments, application. Module 4 TEMPERATURE MEASUREMENT 6 4.1 Basic types of temperature transducer: Resistance detectors, thermistors, thermocouple Principle of operation, specifications, features and applications. 4.2 Application of platinum thin film and sensors. Module 5 SIGNAL CONDITIONING 6 5.1 Signal conditioning requirements for AC and DC transducer signal. 5.2 Transducer circuit modification. 5.3 Specification and characteristics of instrumentation amplifier. 5.4 Signal processing. 5.5 Features and advantages of computerized data acquisition.
GROUP - C
Module 6 INTRODUCTION TO CONTROL ENGINEERING 6.1 Examples of control system. 6.2 Classification of control system. 6.3 Representation of control system. 6.4 Transfer function. 6.5 Block diagram of a feedback control system. 6.6 Simplification of a feedback control system. Module 7 SYSTEM ELEMENT BEHAVIOUR
20 PERIODS
6
10
7.1 Standard test. 7.2 The steady state and transient response. 7.3 Steady State Error Rise Time Delay Time Settling Time. 7.4 DAMPING: Over damped Under damped Critically damped. 7.5 First order and second order response Examples. Module 8 CLOSED LOOP SYSTEM 4 8.1 Introduction to Routh stability and Nyquist criteria.
REFERENCE BOOKS
Electronic instrumentation / Kalsi / Tata McGraw-Hill Industrial Instrumentation and Control / S.K. Singh / Tata McGraw-Hill Numericals / Y. Koren & J. BEN / URI Programmable Controllers Hardware, software and applications / G.L. Battin / McGraw Hill Electronic Instrumentation and Measurement / D.A. Bell / Prentice Hall of India
_______
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OBJECTIVE
On satisfactory completion of the course, the students should be in a position to develop the skills corresponding to the knowledge acquired in the theoretical subject ELECTRONIC MEASUREMENT.
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Third Year First Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Third Year First Semester on the entire syllabus. One job per student from any one of the jobs done is to be performed. Job is to be set by lottery system. Distribution of marks: On spot job 25, Viva-voce 25.
_______
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to develop the skills corresponding to the knowledge acquired in the theoretical subject COMMUNICATION ENGINEERING III.
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Third Year First Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Third Year First Semester on the entire syllabus. One job per student from any one of the jobs done is to be performed. Job is to be set by lottery system. Distribution of marks: On spot job 25, Viva-voce 25.
WBSCTE
2. To study the frequency response of optical receiver at various load conditions. 3. To study the losses in optical fibre: (a) propagation loss, (b) bending loss. 4. To study the numerical aperture of optical fibre. 5. To be familiar with the following network components: Cables Connectors Hubs Network Interface Card. 6. To be familiar with installation of modem. 7. To be familiar with fax, cordless telephone, mobile telephone and pager system.
_______
OBJECTIVE
On satisfactory completion of the course, the students should be in a position to develop the skills corresponding to the knowledge acquired in the theoretical subject INDUSTRIAL ELECTRONICS II.
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Third Year First Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Third Year First Semester on the entire syllabus. One job per student from any one of the jobs done is to be performed. Job is to be set by lottery system. Distribution of marks: On spot job 25, Viva-voce 25.
_______
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COMPUTER NETWORK
( ONE OF THE OPTIONS OFFERED AS ELECTIVE )
OBJECTIVE
Modern age is the age of computer. Global communication can be done within few seconds with the help of computer network. Preliminaries like network structure, flow and error control, LAN, internetworking, network security etc. are included in this course so that the students know about the fundamentals of computer networking.
COMPUTER NETWORK I
Subject Code ETCE / 5 / T6 / CN1 Course offered in Part III First Semester Course Duration 17 weeks 3 lecture contact periods per week Full Marks 75
EXAMINATION SCHEME
GROUP MODULE TO BE SET A B 1, 2, 3 4, 5 20 14 OBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION ANY 25 ONE TOTAL MARKS 25 x 1 = 25 TO BE SET FIVE FOUR SUBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION FIVE, TAKING AT LEAST ONE FROM EACH TEN GROUP TOTAL MARKS 5 X 10 = 50
13 PERIODS
5
Definition of computer network Network components Categories of networks Classification of NETWORKS: LAN, MAN & WAN Connection of networks Application of Network System General applications like ATM Banking etc with modern approach to Distributed Computing System Mobile Computing System. Module 2 BASIC CONCEPT OF DATA COMMUNICATION 12 2.1 Signals Different kind of analog and digital signals for communication Wave Spectra Mode of Signals: Simplex, duplex, half & full duplex Resultant of superposition of signals Application of Fourier Transformation. 2.2 Classification of COMMUNICATION CHANNEL: Guided media and unguided media Characteristics of different TRANSMISSION MEDIA: Twisted Pair Cable, Coaxial Cable, Optical Fibre, Terrestrial Communication, Micro-waves Short Wave Communication Satellite Communication. 2.3 Encoding techniques Modulation techniques Application in modem. 2.4 Broadband and base band systems.
GROUP - B
Module 3 3.1 3.2 3.3 3.4 NETWORK STRUCTURES
14 PERIODS
10
Network topology. CHANNEL SHARING TECHNIQUES: FDM TDM WDM Inverse Multiplexing. SWITCHING: Circuit Switching Message Switching Packet Switching. Layered architecture of network system Seven layer OSI model Functions of each OSI layer Other ISO structure TCP / IP Layer Structure. 3.5 X.25 protocol. - 56 -
WBSCTE
Module 4
10
4.1 FLOW CONTROL: Congestion control Necessity of flow control Poll / select method Stop and wait method Sliding window method. 4.2 ERROR CONTROL: Error detection & correction Types of error Checksum Forward error control Automatic repeat request Cyclic redundancy check. 4.3 ALGORITHMS: Routing, Fixed and Adaptive.
GROUP - C
Module 5 LOCAL AREA NETWORK 5.1 Basic concepts. 5.2 IEEE 802 family of standards. 5.3 ETHERNET: CSMA / CD Frame formats. 5.4 Token Bus Token Ring Frame Formats. 5.5 FDDI: Access method Frame format. 5.6 Hubs Switches Bridges Transceivers Repeaters. 5.7 Wireless LAN.
18 PERIODS
8
COMPUTER NETWORK II
Subject Code ETCE / 6 / T4 / CN2 Course offered in Part III Second Semester Course Duration 17 weeks 2 lecture contact periods per week Full Marks 38
EXAMINATION SCHEME
MODULE TO BE SET 1 2 14 4 OBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION ANY THIRTEEN ONE TOTAL MARKS 1 x 13 = 13 TO BE SET EIGHT SUBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION ANY FIVE FIVE TOTAL MARKS 5 X 5 = 25
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Part III Second Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Part III Second Semester on the entire syllabus. One job per student from any one of the jobs done is to be performed. Job is to be set by lottery system. Distribution of marks: On spot job 25, Viva-voce 25.
REFERENCE BOOKS
Data Communication and Networking / B.A. Forouzan / Tata McGraw-Hill Communication Network / Leon, Garcia, Widjaja / Tata McGraw-Hill Computer Network / Tanenbaum / Prentice Hall of India Data Communications / F. Halsall / Pearson Edu. Computer Network/ U. Black / Prentice Hall of India Peter Nortons Introduction to Computer / P. Norton / Tata McGraw-Hill Computer Network / Stallings / Prentice Hall of India Local Area Network / Ahuja / Tata McGraw-Hill. Computer Communication ISDN Systems / Dr. D.C. Agarwal Elements of Computer Science & Engineering / Prof. A.K. Mukhopadhyay Computer Networks Fundamentals and Applications / Rajesh, Easwarakumar & Balasubramanian.
_______
MEDICAL ELECTRONICS
( ONE OF THE OPTIONS OFFERED AS ELECTIVE )
OBJECTIVE
At present application of many electronics instruments are found in medical science. After successful completion of this course interested students will be able to know about radiology, ultrasound, ICU/CCU system, cardiac pacemaker, foetal system etc.
MEDICAL ELECTRONICS I
Subject Code ETCE / 6 / T7 / ME1 Course offered in Part III First Semester Course Duration 17 weeks 3 lecture contact periods per week Full Marks 75
CONTACT PERIODS: 45
EXAMINATION SCHEME
- 58 -
WBSCTE
GROUP
MODULE TO BE SET
TOTAL MARKS 25 x 1 = 25
SUBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION FIVE, TAKING AT LEAST ONE FROM EACH GROUP TEN
TOTAL MARKS 5 X 10 = 50
A B C
1, 2, 3 4 5
13 8 13
17 PERIODS
13
1.1 Properties of X-ray Production of X-ray Types of X-ray machine photoelectric effect Crompton effect. 1.2 Bremostrate lung X-ray tubes High voltage power sources Typical X-ray machine, care, maintenance and troubleshooting designs variations. 1.3 Scatter reductions Image intensifiers C.T. scan. Module 2 Module 3 ULTRASOUND MICROSCOPY 2 2 Ultrasonic Pulse Echo techniques Time Motion Ultrasonography. Electron microscopy Light microscope Their comparison
GROUP - B
Module 4 ANALYTICAL & LABORATORY INSTRUMENTS 4.1 Introduction & basic principles of PH meter. 4.2 Blood gas analysis Densitometers Electrophoresis. 4.3 Filter and flame photometers Spectrometers.
10 PERIODS
GROUP - C
Module 5 I.C.U. / C.C.U. SYSTEMS
18 PERIODS
5.1 Introduction System configuration System connection Recording instrument Alarm modules Displaying. 5.2 Information and servicing considerations in control systems. 5.3 Strip chart recorder Introduction recording technique. 5.4 PMMC Galvanometer Electronic Recorder Adjustment & typical faults Servo recorders.
MEDICAL ELECTRONICS II
Subject Code ETCE / 6 / T5 / ME2 Course offered in Part III Second Semester Course Duration 17 weeks 2 lecture contact periods per week Full Marks 38
EXAMINATION SCHEME
MODULE 1 2 3 4 TO BE SET 6 4 5 4 OBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION ANY THIRTEEN ONE TOTAL MARKS 1 x 13 = 13 TO BE SET TWO TWO TWO TWO SUBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION FIVE, TAKING AT LEAST ONE FROM EACH MODULE 5 TOTAL MARKS 5 X 5 = 25
- 59 -
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Part III Second Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Part III Second Semester on the entire syllabus. One job per student from any one of the jobs done is to be performed. Job is to be set by lottery system. Distribution of marks: On spot job 25, Viva-voce 25.
REFERENCE BOOKS
1. Handbook of Biomedical Instrumentation / R.S. Khandpur / Tata McGraw Hill 2. Handbook of Biomedical Instrumentation and Measurement / H.E. Thomas / Prentice Hall of India 3. Biomedical instrumentation and Measurement / L. Cromwell, F.J. Weibell & E.A. Peiffer / Prentice Hall of India 4. Electronics for Biomedical Personnel / E.J.B. Buckstein / Taraporewala 5. Biomedical Instrumentation / Can & Brown 6. X-ray techniques for students / M.O. Chasney 7. Recent Advances in Biomedical Engineering / Reddy
_______
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WBSCTE
PC HARDWARE MAINTENANCE
( ONE OF THE OPTIONS OFFERED AS ELECTIVE )
OBJECTIVE
The complete PC hardware system is embedded in electronics industry. Every card and every module of a PC system is consisting of a number of Integrated Circuits or discrete electronic components. While maintaining PCs the competency levels of maintenance in the form of installation, preventive and corrective measures, maintenance of different devices, use of software & system maintenance, measure for virus detection & protection and finally provision for upgradation of PC system should be well thought for overall PC maintenance. The above reason justifies the utility of this course.
PC HARDWARE MAINTENANCE I
Subject Code ETCE / 6 / T8 / PHM Course offered in Part III Second Semester Course Duration 17 weeks 3 lecture contact periods per week Full Marks 75
CONTACT PERIODS: 45
EXAMINATION SCHEME
GROUP MODULE TO BE SET 20 13 OBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION ANY 25 ONE TOTAL MARKS 25 x 1 = 25 TO BE SET FIVE FOUR SUBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION FIVE, TAKING AT LEAST TWO FROM TEN EACH GROUP TOTAL MARKS 5 X 10 = 50
A B
1, 2 3, 4
26 PERIODS
12
MOTEHR BOARD, FORM FACTORS, FUNCTIONAL DESCRIPTION OF EACH BLOCK & THEIR INTERCONNECTIONS 3 EXPANSION BUS SLOTS DIFFERENT BUS ARCHITECTURE FEATURES ISA, VESA, PCI, PCIX. THEIR COMPARISON & AREAS OF APPLICATION 4 PROCESSORS, P-II, P-III, CELERON, P-IV COMPETING PROCESSOR FROM AMD ATHLON 64, COMPARISON AMONG DIFFERENT PROCESSORS AND APPLICATIONS 8 CHIPSETS, NORTH-BRIDGE, SOUTH-BRIDGE AND SUPER-IO CHIPS THEIR FUNCTIONS, INTEL HUB ARCHITECTURE CHIPSETS FOR P-III , P-IV 3 MEMORY CHIPS DRAM, SRAM - TYPES OF DRAM INCLUDING EDO, SDRAM, RDRAM & DDR FEATURES & PERFORMANCE. - MEMORY PACKAGES SIMM & DIMM 5
2.6
Memory Organisation low memory , high memory, extended memory, cache memory, virtual memory 2
- 61 -
2.7 2.8
BIOS basic ROM BIOS organisation, interaction between different bays of the system, ROM CHIPS , EEPROM, AND FLASH 2 CMOS set up Configuration and utility 1
GROUP - B
Module 3
26 PERIODS
12 3
3.1 Keyboard: types, key-switches, key-board interface, keyboard controller and maintenance.
3.2 Mouse: Types, principles of operation, signal, connectors, controllers, installation & maintenance. 2 3.3 Monitor: Types, principles of operation and block diagram. Features resolutions, control (basic & advanced) LCD front panel and plasma, Working of display adapter CGA, VGA, SVGA, XGA standards, vide card, memory and AGP 4 3.4 SMPS: Types, principles of operation and block diagram, form factor AT an ATX. 3
GROUP - C
Module 4 PERIPHERAL DEVICES
19 PERIODS
10
4.1 DOT MATRIX PRINTER: Types, Sub-assemblies, block diagram and description, control, self-test installation and maintenance. 3 4.2 INKJET PRINTER: Type, principle of operation, block diagram, features, installation, interface requirement and maintenance. 2 4.3 LASER PRINTER: Block diagram, printing mechanism, self-test, installation, resolution and speed. 2 4.4 SCANNER: Type, principle of operation, resolution, installation, OCR 1
PC HARDWARE MAINTENANCE II
Subject Code ETCE / 6 / T6 / PHM Course offered in Part III Second Semester Course Duration 17 weeks 2 lecture contact periods per week Full Marks 38
EXAMINATION SCHEME
MODULE TO BE SET 9 9 OBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION ANY THIRTEEN ONE TOTAL MARKS 1 x 13 = 13 TO BE SET FOUR FOUR SUBJECTIVE QUESTIONS TO BE MARKS PER ANSWERED QUESTION FIVE, TAKING AT LEAST TWO FROM EACH FIVE MODULE TOTAL MARKS 5 x 5 = 25
1 2
WBSCTE
1.4 REMOVABLE DRIVES : ZIP DRIVES, REMOVABLE HARD DRIVES 1.5 CARTRIDGE T APE DRIVES -: TYPES AND CAPABILITIES AND APPLICATIONS
1
2
GROUP-B
Module 2 2.1 MULTIMEDIA DEVICES 10 Sound Cards block diagram of sound blaster card concepts of audio compression and decompression surround sound speakers, microphones and headphone DOLBY audio standard 4. VIDEO capture : principle and method capture, formats, and comparison, TV tuner cards, video conferencing, digital camera, 3D graphics, graphic acceleration 4
2.2
GROUP-C
Module 3 3.1 3.2 3.3 3.4 3.5 NETWORKING & SOFTWARE INSTALLATION OS Installation Win 98, Win XP, WIN 2000, Linux 2 6
Building LAN features and specifications, cabling / Cable laying, HUB and Switch Installation 2 LAN Commissioning with Performance functioning with IP address configuration, 2 Computer Virus- types, nature, impact and prevention of virus, anti-virus installation & fire-wall installation 3 MODEM block diagram and installation 1
PC MAINTENANCE LAB
Subject Code ETCE / 6 / S8 / LPHM Course offered in Part III Second Semester Course Duration 17 weeks INTERNAL ASSESSMENT 12 periods Full Marks 100 TOTAL 102 periods
EXAMINATION SCHEME
1. 2. Continuous Internal Assessment of 50 marks is to be carried out by the teachers throughout the Part III Second Semester. Distribution of marks: Performance of Job 35, Notebook 15. External Assessment of 50 marks shall be held at the end of the Part III Second Semester on the entire syllabus. One job per student from any one of the jobs done is to be performed. Job is to be set by lottery system. Distribution of marks: On spot job 25, Viva-voce 25.
16. To build a window based LAN and install the OS and firewall antivirus.
REFERENCE BOOKS
1. 2. 3. 4. 5. 6. 7. 8. 9. IBM PC troubleshooting & repair guide / Brenner / BPB PC Hardware a Beginners Guide / R. Gilster / Tata McGraw Hill IBM PC Clone / Govindrajalu / Tata McGraw Hill Peter Nortons Problem / Norton / Prentice Hall of India Upgrading and repairing PC / Mueller / Prentice Hall of India Troubleshooting, maintaining and repairing PCs / Biglows / Tata McGraw Hill Complete PC Upgrade and Maintenance Guide / Mark Minasy / BPB PC Hardware in a Nutshell / Thompson and Thompson / Shroff Pub. & Distrib. Pvt. Ltd. A to Z of PC Hardware Maintenance / Subhodeep Chowdhury / Dhanpat Rai & Co.
_______
OBJECTIVE
Project Work is intended to provide opportunity for students to develop understanding of the interrelationship between different courses learnt in the entire diploma programme and to apply the knowledge gained in a way that enables them to develop & demonstrate higher order skills. The basic objective of a project class would be to ignite the potential of students creative ability by enabling them to develop something which has social relevance, aging, it should provide a taste of real life problem that a diploma-holder may encounter as a professional. It will be appreciated if the polytechnics develop interaction with local industry and local developmental agencies viz. different Panchayet bodies, the municipalities etc. for choosing topics of projects and / or for case study. The course further includes preparation of a Project Report which, among other things, consists of technical description of the project. The Report should be submitted in two copies, one to be retained in the library of the institute. The Report needs to be prepared in computer using Word and CADD software wherever necessary. Seminar on Project Work is intended to provide opportunity for students to present the Project Work in front of a technical gathering with the help of different oral, aural and visual communication aids which they learnt through different courses in the Parts I & II of the diploma course. In the Seminar, students are not only expected to present their Project Work, but also to defend the same while answering questions arising out of their presentation.
GENERAL GUIDELINE
Project Work is conceived as a group work through which the spirit of team building is expected to be developed. Students will be required to carry out their Project Works in groups under supervision of a lecturer of their core discipline who will work as a Project Guide. It is expected that most of the lecturers of the core discipline will act as project guide and each should supervise the work of at least two groups. Number of students per group will vary with the number of lecturers acting as Project Guide and student strength of that particular class. In the Part III First Semester six sessional periods will be utilised for performing Project Work. In the Part III Second Semester, for the first twelve weeks the six sessional periods allocated to Project Work along with the single sessional period allocated to Seminar on Project Work will be together utilised for Project work; whereas in the last three weeks of the Part III Second Semester all these seven sessional periods allocated to Project Work and Seminar on Project Work will be utilised for performing Seminar. In Seminar classes all the teachers who are involved with imparting knowledge and skill to the students in their Project classes should be present along with all the students.
C O U RS E & E X A M I N A T I O N S C H E D U L E
SUBJECT CODE NAME OF THE COURSES COURSES OFFERED IN COURSE DURATION CONTACT PERIODS MARKS ALLOTTED
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WBSCTE
15 Weeks
First 12 Weeks
60 contact periods @ 4 sessional contact periods per week 84 contact periods @ 7 sessional contact periods per week
ETCE / 6 / S5 / SMNR
Last 3 Weeks
Continuous Internal Assessment of 100 marks is to be carried out by the teachers throughout the two semesters where marks allotted for assessment of sessional work undertaken in each semester is 50. Distribution of marks: Project Work 50, Project Report 25, Viva-voce 25. External assessment of 100 marks shall be held at the end of the Part III Second Semester on the entire syllabi of ETCE Project Work. The external examiner is to be from industry / engineering college / university / government organisation. Distribution of marks: Project Work 25, Project Report 25, Viva-voce 50. Continuous Internal Assessment of 25 marks for a particular group is to be awarded by their concerned Project Guide. External Assessment of 25 marks is to be awarded by all the other Project Guides present in the Seminar.
T HE P R O J E C T
The students should be made aware of the factors influencing the selection of a particular product and its available design, viz. selection of components for assembling, harnessing, testing and quality control of the same. They should also be aware of the workability of the product. Each group will take at least one project in a semester. PROJECT REPORT Each project work should be accompanied by a Project Report which should cover the following: (a) (b) (c) (d) (e) (f) (g) (h) (i) (j) (k) (l) General description; Product specification; Hardware description; Operating instruction; Installation requirement, if any; Circuit diagrams; Layout diagrams; List of components; Costing; Study of marketability; Scope for future development; A brief outline of the maintenance procedure may also be included in the report (if possible).
SUGGESTED LIST OF PROJECT WORKS The project works are generally selected depending upon the objective of the course and the infrastructural facilities available at a particular institution. Some of the popular items are listed below as guideline for selection: (i) (ii) (iii) (iv) (v) (vi) (vii) (viii) (ix) (x) (xi) (xii) (xiii) (xiv) (xv) (xvi) (xvii) regulated power supply; AC voltage stabilizer; inverter; battery charger; FM receiver; bar level indicator; digital thermometer; field strength meter; digital clock; solid state relay; stereo amplifier; programmable interval time; analog trainer kit; digital trainer kit; circuit theory trainer kit; microprocessor trainer kit; telephone line / status monitor; - 65 -
(xviii) MICROPROCESSOR BASED APPLICATIONS: (a) temperature controller, (b) alarm, (c) moving display, (d) speed control of motor, (e) programmable logic controller etc.; (xix) one project on computer application ; (xx) one project on any one of the elective subjects; (xxi) a report on a short visit to a local electronic industry / organization may be regarded as one of the projects; (xxii) a particular project may be a part of a bigger project depending upon the complexity.
_______
GENERAL VIVAVOCE
Subject Code ETCE / 6 / S9 / GVV Course offered in Part III Second Semester Full Marks 100
COURSE CONTENT
The syllabi of all the theoretical and sessional subjects taught in the three years of diploma education.
EXAMINATION SCHEME
The Final Viva-Voce Examination shall take place at the end of the Part III Second Semester. It is to be taken by one External and one Internal Examiner. The External Examiner is to be from industry / engineering college / university / government organisation and he / she should give credit out of 50 marks; whereas, the Internal Examiner should normally be the Head of the Department and he / she should give credit of 50 marks. In the absence of the Head of the Department the senior most lecturer will act as the Internal Examiner.
_______
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