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The two's complement of a binary number is defined as the value obtained by subtracting the number from
a large power of two (specifically, from 2N for an N-bit two's complement). The two's complement of the
number then behaves like the negative of the original number in most arithmetic, and it can coexist with
positive numbers in a natural way.

A two's-complement system or two's-complement arithmetic is a system in which negative numbers are

represented by the two's complement of the absolute value;[1] this system is the most common method of
representing signed integers on computers.[2] In such a system, a number is negated (converted from positive
to negative or vice versa) by computing its two's complement. An N-bit two's-complement numeral system
can represent every integer in the range −2N−1 to +2N−1−1.

The two's-complement system has the advantage of not requiring that the addition and subtraction circuitry
examine the signs of the operands to determine whether to add or subtract. This property makes the system
both simpler to implement and capable of easily handling higher precision arithmetic. Also, zero has only a
single representation, obviating the subtleties associated with negative zero, which exists in ones'-
complement systems.

The method of complements can also be applied in base-10 arithmetic, using ten's complements by analogy
with two's complements.

most-significant
bit
0 1 1 1 1 1 1 1 = 127
1 Explanation 0 1 1 1 1 1 1 0 = 126
1.1 Two's-complement numbers 0 0 0 0 0 0 1 0 = 2
1.2 Making the Two's Complement of a 0 0 0 0 0 0 0 1 = 1
number 0 0 0 0 0 0 0 0 = 0
1.3 Alternative conversion process 1 1 1 1 1 1 1 1 = −1
1.4 Sign extension 1 1 1 1 1 1 1 0 = −2
1.5 The most negative number
1 0 0 0 0 0 0 1 = −127
1.6 Why it works
1.7 Calculating two's complement 1 0 0 0 0 0 0 0 = −128
8-bit two's-complement integers
2 Arithmetic operations
2.1 Addition
2.2 Subtraction
2.3 Multiplication
3 Two's complement and universal algebra
4 Potential ambiguities in usage
5 See also
6 External links
7 References

Two's-complement numbers

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Two's complement numbers are a way to encode negative numbers into ordinary binary, such that addition
still works. Adding -1 + 1 should equal 0, but ordinary addition gives the result of 2 or -2 unless the
operation takes special notice of the sign bit and performs a subtraction instead. Two's complement results in
the correct sum without this extra step.

A two's-complement number system encodes positive and negative numbers in a binary number
representation. The bits have a binary radix point and the bits are weighted according to the position of the
bit within the array. A convenient notation is the big-endian ordering. In this notation, the bit to the left of
the binary point has a bit index of 0 and a weight of 20. The bit indices increase, by one, to the left of the
binary point, and decrease, by one, to the right of the binary point. The weight of each bit is 2i, except for
the left-most bit, whose weight is −2i. With this bit numbering, a two's complement number with m integer
bits and n fractional bits is represented by the array of bits

the value of this number is given by the following formula.

The left-most bit, also called the MSB, or most-significant bit, determines the sign of the number, but, unlike
the sign-and-magnitude representation, also has a weight, −2m-1, as shown in the formula above. Because of
this weight, it is misleading to call this bit the "sign bit".

The two's complement encoding shown above can represent the following range of numbers

Zero representation is

The maximum positive number is

The minimum, non-zero, positive number (smallest absolute value) is

The minimum negative number is

The maximum negative number (smallest absolute value) is

Making the Two's Complement of a number

Positive numbers are represented in two's complement as binary numbers whose most significant bit is zero.
Negative numbers are represented with the most-significant bit being one, making use of the left-most bit's
negative weight. All radix complement number systems use a fixed-width encoding. Every number encoded
in such a system has a fixed width so the most-significant digit can be examined.

Algorithmically, to create a two's complement binary value:

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1. express the binary value for the positive number

2. complement the value (only if original value was negative)
3. add one (only if original value was negative)
4a. if the value is positive, add leading zeros to achieve the proper number of bits
4b. if the value is negative, add leading ones to achieve the proper number of bits

In general, for a radix r's complement encoding, with r the base (radix) of the number system, an integer part
m−1 −n
of m digits and fractional part of n digits, then the r's complement of a number 0≤ N<r −r is
determined by the formula:

N** = (rm − N) mod (r m)

The (r−1)'s complement of a number is determined by the formula:

N* = rm − r−n −N

We can also find the r's complement of a number N by adding r–n to the (r-1)'s complement of the number
i.e.,

N** = N* + r–n

Alternative conversion process

A shortcut to manually convert a binary number into its two's complement is to start at the least significant
bit (LSB), and copy all the zeros (working from LSB toward the most significant bit) until the first 1 is
reached; then copy that 1, and flip all the remaining bits. This shortcut allows a person to convert a number
to its two's complement without first forming its ones' complement. For example: the two's complement of
"0011 1100" is "1100 0100", where the underlined digits are unchanged by the copying operation.

In computer circuitry, this method is no faster than the "complement and add one" method; both methods
require working sequentially from right to left, propagating logic changes. The method of complementing and
adding one can be sped up by a standard carry look-ahead adder circuit; the alternative method can be sped
up by a similar logic transformation.

Sign extension

When turning a two's-complement number with a

certain number of bits into one with more bits 4-bit two's 8-bit two's
Decimal
complement complement
(e.g., when copying from a 1 byte variable to a
two byte variable), the most-significant bit must 5 0101 0000 0101
be repeated in all the extra bits and lower bits. −3 1101 1111 1101
Some processors have instructions to do this in a sign-bit repetition in 4 and 8-bit integers
single instruction. On other processors a
conditional must be used followed with code to set the relevant bits or bytes.

Similarly, when a two's-complement number is shifted to the right, the most-significant bit, which contains
magnitude and the sign information, must be maintained. However when shifted to the left, a 0 is shifted in.
These rules preserve the common semantics that left shifts multiply the number by two and right shifts divide
the number by two.

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Both shifting and doubling the precision are important for some multiplication algorithms. Note that unlike
addition and subtraction, precision extension and right shifting are done differently for signed vs unsigned
numbers.

The most negative number

With only one exception, when we start with any number in two's-complement representation, if we flip all
the bits and add 1, we get the two's-complement representation of the negative of that number. Negative 12
becomes positive 12, positive 5 becomes negative 5, zero becomes zero, etc.

The two's complement of the minimum number in the range

will not have the desired effect of negating the number. For −128 1000 0000
example, the two's complement of −128 in an 8-bit system invert bits 0111 1111
results in the same binary number. This is because a positive add one 1000 0000
value of 128 cannot be represented with an 8-bit signed
binary numeral. Note that this is detected as an overflow The two's complement of -128 results in the
condition since there was a carry into but not out of the same 8-bit binary number.
most-significant bit. This can lead to unexpected bugs in
that a naive implementation of absolute value could return a negative number.

The most negative number in two's complement is sometimes called "the weird number," because it is the
only exception.[3][4]

Although the number is an exception, it is a valid number in regular two's complement systems. All
arithmetic operations work with it both as an operand and (unless there was an overflow) a result.

Why it works

Given a set of all possible n-bit values, we can assign the lower (by binary value) half to be the integers from
0 to (2n-1-1) inclusive and the upper half to be -2n-1 to -1 inclusive. The upper half can be used to represent
negative integers from -2n-1 to -1 because, under addition modulo 2n they behave the same way as those
negative integers. That is to say that because i + j mod 2n = i + (j - 2^n) mod 2n any value in the set {j + k2n |
k is an integer} can be used in place of j.

For example, with eight bits, the unsigned bytes are 0 to 255. Subtracting 256 from the top half (128 to 255)
yields the signed bytes −128 to 127.

The relationship to two's complement is realised by noting that 256 = 255 + 1, and (255 − x) is the ones'
complement of x.

Example
Decimal Two's complement
−95 modulo 256 is equivalent to 161 since 127 0111 1111

−95 + 256 64 0100 0000

= −95 + 255 + 1 1 0000 0001
= 255 − 95 + 1
0 0000 0000
= 160 + 1
= 161 -1 1111 1111
-64 1100 0000
-127 1000 0001
-128 1000 0000

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1111 1111 255 Some special numbers to note

− 0101 1111 − 95
=========== =====
1010 0000 (ones' complement) 160
+ 1 + 1

=========== =====
1010 0001 (two's complement) 161

Fundamentally, the system represents negative integers by counting Two's complement Decimal
backward and wrapping around. The boundary between positive and
negative numbers is arbitrary, but the de facto rule is that all negative 0111 7
numbers have a left-most bit (most significant bit) of one. Therefore, 0110 6
the most positive 4-bit number is 0111 (7) and the most negative is 0101 5
1000 (−8). Because of the use of the left-most bit as the sign bit, the
absolute value of the most negative number (|−8| = 8) is too large to 0100 4
represent. For example, an 8-bit number can only represent every 0011 3
integer from −128 to 127 (2^(8−1) = 128) inclusive. Negating a two's
0010 2
complement number is simple: Invert all the bits and add one to the
result. For example, negating 1111, we get 0000 + 1 = 1. Therefore, 0001 1
1111 must represent −1. 0000 0
The system is useful in simplifying the implementation of arithmetic 1111 −1
on computer hardware. Adding 0011 (3) to 1111 (−1) at first seems to 1110 −2
give the incorrect answer of 10010. However, the hardware can 1101 −3
simply ignore the left-most bit to give the correct answer of 0010 (2).
Overflow checks still must exist to catch operations such as summing 1100 −4
0100 and 0100. 1011 −5

The system therefore allows addition of negative operands without a 1010 −6

subtraction circuit and a circuit that detects the sign of a number. 1001 −7
Moreover, that addition circuit can also perform subtraction by taking 1000 −8
the two's complement of a number (see below), which only requires
an additional cycle or its own adder circuit. Lastly, the two's Two's complement using a 4-bit
complement system allows a subtraction circuit to return 1001, integer
equivalent to −0001, for 0001 − 0010 rather than 1111. To perform
the former, the circuit merely pretends an extra left-most bit of 1 exists. To perform the latter, there must be
a sign check, a possible rearrangement of the number, and finally a subtraction.

Calculating two's complement

In two's complement notation, a positive number is represented by its ordinary binary representation, using
enough bits that the high bit (the sign bit) is 0. The two's complement operation is the negation operation, so
negative numbers are represented by the two's complement of the representation of the absolute value.

In finding the two's complement of a binary number, the bits are inverted, or "flipped", by using the bitwise
NOT operation; the value of 1 is then added to the resulting value. Bit overflow is ignored, which is the
normal case with the zero value.

For example, beginning with the signed 8-bit binary representation of the decimal value 5, using subscripts to
indicate the base of a representation needed to interpret its value:

000001012 = 510
The most significant bit is 0, so the pattern represents a non-negative (positive) value.

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To convert to −5 in two's-complement notation, the bits are inverted; 0 becomes 1, and 1 becomes 0:

11111010
At this point, the numeral is the ones' complement of the decimal value 5. To obtain the two's complement, 1
is added to the result, giving:

111110112 = − 510
The result is a signed binary number representing the decimal value −5 in two's-complement form. The most
significant bit is 1, so the value represented is negative.

The two's complement of a negative number is the corresponding positive value. For example, inverting the
bits of −5 (above) gives:

00000100
And adding one gives the final value:

000001012 = 510
The value of a two's-complement binary number can be calculated by adding up the power-of-two weights
of the "one" bits, but with a negative weight for the most significant (sign) bit; for example:

111110112 = − 128 + 64 + 32 + 16 + 8 + 0 + 2 + 1 = ( − 27 + 26 + ...) = − 5

Note that the two's complement of zero is zero: inverting gives all ones, and adding one changes the ones
back to zeros (the overflow is ignored). Also the two's complement of the most negative number
representable (e.g. a one as the most-significant bit and all other bits zero) is itself. Hence, there appears to
be an 'extra' negative number.

A more formal definition of a two's-complement negative number (denoted by N* in this example) is derived
n
from the equation N * = 2 − N, where N is the corresponding positive number and n is the number of bits
in the representation.

For example, to find the 4 bit representation of −5:

N = 510 therefore N = 01012

n=4

Hence:

N * = 2n − N = 24 − 510 = 100002 − 01012 = 10112

The calculation can be done entirely in base 10, converting to base 2 at the end:

N * = 2n − N = 24 − 5 = 1110 = 10112

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Addition

Adding two's-complement numbers requires no special processing if the operands have opposite signs: the
sign of the result is determined automatically. For example, adding 15 and -5:

11111 111 (carry)

0000 1111 (15)
+ 1111 1011 (-5)
==================
0000 1010 (10)

This process depends upon restricting to 8 bits of precision; a carry to the (nonexistent) 9th most significant
bit is ignored, resulting in the arithmetically correct result of 1010.

The last two bits of the carry row (reading right-to-left) contain vital information: whether the calculation
resulted in an arithmetic overflow, a number too large for the binary system to represent (in this case greater
than 8 bits). An overflow condition exists when a carry (an extra 1) is generated out of the far left bit (the
MSB), but not into the MSB. As mentioned above, the sign of the number is encoded in the MSB of the
result.

In other terms, if the left two carry bits (the ones on the far left of the top row in these examples) are both 1s
or both 0s, the result is valid; if the left two carry bits are "1 0" or "0 1", a sign overflow has occurred.
Conveniently, an XOR operation on these two bits can quickly determine if an overflow condition
exists. As an example, consider the 4-bit addition of 7 and 3:

0111 (carry)
0111 (7)
+ 0011 (3)
=============
1010 (−6) invalid!

In this case, the far left two (MSB) carry bits are "01", which means there was a two's-complement addition
overflow. That is, 10102 = 1010 is outside the permitted range of −8 to 7.

In general, any two n-bit numbers may be added without overflow, by first sign-extending both of them to
n+1 bits, and then adding as above. The n+1 bit result is large enough to represent any possible sum (e.g., 5
bits can represent values in the range −16 to 15) so overflow will never occur. It is then possible, if desired,
to 'truncate' the result back to n bits while preserving the value if and only if the discarded bit is a proper sign
extension of the retained result bits. This provides another method of detecting overflow—which is
equivalent to the method of comparing the carry bits—but which may be easier to implement in some
situations, because it does not require access to the internals of the addition.

Subtraction

Computers usually use the method of complements to implement subtraction. Using complements for
subtraction is closely related to using complements for representing negative numbers, since the combination
allows all signs of operands and results; direct subtraction works with two's-complement numbers as well.
Like addition, the advantage of using two's complement is the elimination of examining the signs of the
operands to determine if addition or subtraction is needed. For example, subtracting −5 from 15 is really
adding 5 to 15, but this is hidden by the two's-complement representation:

11110 000 (borrow)

0000 1111 (15)
− 1111 1011 (−5)
===========
0001 0100 (20)

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Overflow is detected the same way as for addition, by examining the two leftmost (most significant) bits of
the borrows; overflow has occurred if they are different.

Another example is a subtraction operation where the result is negative: 15 − 35 = −20:

11100 0000 (borrow)

0000 1111 (15)
− 0010 0011 (35)
===========
1110 1100 (−20)

As for addition, overflow in subtraction may be avoided (or detected after the operation) by first
sign-extending both inputs by an extra bit.

Multiplication

The product of two n-bit numbers requires 2n bits to contain all possible values. If the precision of the two
two's-complement operands is doubled before the multiplication, direct multiplication (discarding any excess
bits beyond that precision) will provide the correct result. For example, take 6 × −5 = −30. First, the
precision is extended from 4 bits to 8. Then the numbers are multiplied, discarding the bits beyond 8 (shown
by 'x'):

00000110 (6)
× 11111011 (-5)
==========
110
110
000
110
110
110
x10
xx0
==========
xx11100010 (-30)

This is very inefficient; by doubling the precision ahead of time, all additions must be double-precision and
at least twice as many partial products are needed than for the more efficient algorithms actually
implemented in computers. Some multiplication algorithms are designed for two's complement, notably
Booth's multiplication algorithm. Methods for multiplying sign-magnitude numbers don't work with two's-
complement numbers without adaptation. There isn't usually a problem when the multiplicand (the one being
repeatedly added to form the product) is negative; the issue is setting the initial bits of the product correctly
when the multiplier is negative. Two methods for adapting algorithms to handle two's-complement numbers
are common:

First check to see if the multiplier is negative. If so, negate (i.e., take the two's complement of) both
operands before multiplying. The multiplier will then be positive so the algorithm will work. Because
both operands are negated, the result will still have the correct sign.

Subtract the partial product resulting from the MSB (pseudo sign bit) instead of adding it like the other
partial products. This method requires the multiplicand's sign bit to be extended by one position, being
preserved during the shift right actions.[5]

As an example of the second method, take the common add-and-shift algorithm for multiplication. Instead of
shifting partial products to the left as is done with pencil and paper, the accumulated product is shifted right,
into a second register that will eventually hold the least significant half of the product. Since the least
significant bits are not changed once they are calculated, the additions can be single precision, accumulating
in the register that will eventually hold the most significant half of the product. In the following example,

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again multiplying 6 by −5, the two registers and the extended sign bit are separated by "|":

0 0110 (6) (multiplicand with extended sign bit)

× 1011 (-5) (multiplier)
=|====|====
0|0110|0000 (first partial product (rightmost bit is 1))
0|0011|0000 (shift right, preserving extended sign bit)
0|1001|0000 (add second partial product (next bit is 1))
0|0100|1000 (shift right, preserving extended sign bit)
0|0100|1000 (add third partial product: 0 so no change)
0|0010|0100 (shift right, preserving extended sign bit)
1|1100|0100 (subtract last partial product since it's from sign bit)
1|1110|0010 (shift right, preserving extended sign bit)
|1110|0010 (discard extended sign bit, giving the final answer, -30)

In the classic "HAKMEM" published by the MIT AI Lab in 1972, Bill Gosper noted that whether or not a
machine's internal representation was two's-complement could be determined by summing the successive
powers of two. In a flight of fancy, he noted that the result of doing this algebraically indicated that "algebra
is run on a machine (the universe) which is twos-complement."[6]

Gosper's end conclusion is not necessarily meant to be taken seriously, and it is akin to a mathematical joke.
The critical step is "...110 = ...111 − 1", i.e., "2X = X − 1". This presupposes a method by which an
infinite string of 1s is considered a number, which requires an extension of the finite place-value concepts in
elementary arithmetic. It is meaningful either as part of a two's-complement notation for all integers, as a
typical 2-adic number, or even as one of the generalized sums defined for the divergent series of real
numbers 1 + 2 + 4 + 8 + · · ·.[7]

One should be cautious when using the term two's complement, as it can mean either a number format or a
mathematical operator. For example 0111 represents 7 in two's-complement notation, but 1001 is the two's
complement of 7, which is the two's complement representation of −7. In code notation or conversation the
statement "convert x to two's complement" may be ambiguous, as it could describe either the change in
representation of x to two's-complement notation from some other format, or else (if the writer really meant
"convert x to its two's complement") the calculation of the negated value of x.

Division (digital), including restoring and non-restoring division in two's-complement representations

Signed number representations
p-adic numbers

Tutorial: Two's Complement Numbers (http://www.vb-helper.com/tutorial_twos_complement.html)

Online calculator: Binary, inverse (one complement) and two complement (http://planetcalc.com/747/)
Two's complement array multiplier JavaScript simulator (http://www.ecs.umass.edu/ece/koren/arith
/simulator/ArrMlt/)

1. ^ David J. Lilja and Sachin S. Sapatnekar, Designing Digital Computer Systems with Verilog, Cambridge

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University Press, 2005 online (http://books.google.com/books?vid=ISBN052182866X&id=5BvW0hYhxkQC&

pg=PA37&lpg=PA37&ots=l-E0VjyPt8&dq=%22two%27s+complement+arithmetic%22&
sig=sS5_swrfrzcQI2nHWest75sIjgg)
2. ^ E.g. "Signed integers are two's complement binary values that can be used to represent both positive and
negative integer values.", Section 4.2.1 in Intel 64 and IA-32 Architectures Software Developer's Manual,
Volume 1: Basic Architecture, November 2006
3. ^ Reynald Affeldt and Nicolas Marti. "Formal Verification of Arithmetic Functions in SmartMIPS Assembly"
(http://www.ipl.t.u-tokyo.ac.jp/jssst2006/papers/Affeldt.pdf) . http://www.ipl.t.u-tokyo.ac.jp/jssst2006/papers
/Affeldt.pdf.
4. ^ "Digital Design and Computer Architecture" (http://books.google.com/books?id=5X7JV5-n0FIC&pg=PA19&
dq=%22weird+number%22+binary) by David Harris, David Money Harris, Sarah L. Harris. 2007. Page 18.
5. ^ John F. Wakerly, Digital Design Principles & Practices, Prentice Hall, 3rd edition 2000, page 47
6. ^ Hakmem - Programming Hacks - Draft, Not Yet Proofed (http://www.inwap.com/pdp10/hbaker/hakmem
/hacks.html#item154)
7. ^ For the summation of 1 + 2 + 4 + 8 + · · · without recourse to the 2-adic metric, see Hardy, G.H. (1949).
Divergent Series. Clarendon Press. LCC QA295 .H29 1967 (http://catalog.loc.gov/cgi-bin
/Pwebrecon.cgi?Search_Arg=QA295+.H29+1967&Search_Code=CALL_&CNT=5) . (pp. 7–10)

Israel Koren, Computer Arithmetic Algorithms, A.K. Peters (2002), ISBN 1-56881-160-8
Ivan Flores, The Logic of Computer Arithmetic, Prentice-Hall (1963)
Retrieved from "http://en.wikipedia.org/wiki/Two%27s_complement"
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