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Datasheet mc14584

MC14584B hex Schmitt Trigger is constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. The MC14584B may be used in place of the MC14069UB hex inverter for enhanced noise immunity to "square up" slowly changing waveforms. For greater hysteresis, Use MC14106B which is Pin-for-Pin Replacement for CD40106B and MM74C
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0% found this document useful (0 votes)
266 views8 pages

Datasheet mc14584

MC14584B hex Schmitt Trigger is constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. The MC14584B may be used in place of the MC14069UB hex inverter for enhanced noise immunity to "square up" slowly changing waveforms. For greater hysteresis, Use MC14106B which is Pin-for-Pin Replacement for CD40106B and MM74C
Copyright
© Attribution Non-Commercial (BY-NC)
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Available Formats
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MC14584B Hex Schmitt Trigger

The MC14584B Hex Schmitt Trigger is constructed with MOS Pchannel and Nchannel enhancement mode devices in a single monolithic structure. These devices find primary use where low power dissipation and/or high noise immunity is desired. The MC14584B may be used in place of the MC14069UB hex inverter for enhanced noise immunity to square up slowly changing waveforms.
http://onsemi.com MARKING DIAGRAMS
14 PDIP14 P SUFFIX CASE 646 MC14584BCP AWLYYWW 1 14 SOIC14 D SUFFIX CASE 751A 14584B AWLYWW 1 Unit V V mA 14 500 55 to +125 65 to +150 260 mW C C C SOEIAJ14 F SUFFIX CASE 965 1 A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week MC14584B AWLYWW TSSOP14 DT SUFFIX CASE 948G 1 14 14 584B ALYW

Supply Voltage Range = 3.0 Vdc to 18 Vdc Capable of Driving Two Lowpower TTL Loads or One Lowpower Double Diode Protection on All Inputs Can Be Used to Replace MC14069UB For Greater Hysteresis, Use MC14106B which is PinforPin
Replacement for CD40106B and MM74Cl4 Schottky TTL Load over the Rated Temperature Range

MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.)


Symbol VDD Vin, Vout Iin, Iout PD TA Tstg TL Parameter DC Supply Voltage Range Input or Output Voltage Range (DC or Transient) Input or Output Current (DC or Transient) per Pin Power Dissipation, per Package (Note 3.) Ambient Temperature Range Storage Temperature Range Lead Temperature (8Second Soldering) Value 0.5 to +18.0 0.5 to VDD + 0.5 10

2. Maximum Ratings are those values beyond which damage to the device may occur. 3. Temperature Derating: Plastic P and D/DW Packages: 7.0 mW/_C From 65_C To 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS (Vin or Vout) VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open.

ORDERING INFORMATION
Device MC14584BCP MC14584BD MC14584BDR2 MC14584BDT MC14584BDTEL MC14584BF MC14584BFEL Package PDIP14 SOIC14 SOIC14 TSSOP14 Shipping 2000/Box 55/Rail 2500/Tape & Reel 96/Rail

TSSOP14 2000/Tape & Reel SOEIAJ14 SOEIAJ14 See Note 1. See Note 1.

1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative.

Semiconductor Components Industries, LLC, 2000

March, 2000 Rev. 3

Publication Order Number: MC14584B/D

MC14584B
PIN ASSIGNMENT
IN 1 OUT 1 IN 2 OUT 2 IN 3 OUT 3 VSS 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD IN 6 OUT 6 IN 5 OUT 5 IN 4 OUT 4

LOGIC DIAGRAM
1 2

11

10

13 VDD = PIN 14 VSS = PIN 7

12

EQIVALENT CIRCUIT SCHEMATIC (1/6 OF CIRCUIT SHOWN)

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ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)
Characteristic Symbol VOL VDD Vdc 5.0 10 15 5.0 10 15 5.0 5.0 10 15 IOL 5.0 10 15 15 5.0 10 15 5.0 10 15 Min 4.95 9.95 14.95 3.0 0.64 1.6 4.2 0.64 1.6 4.2 55_C 25_C 125_C Max Min 4.95 9.95 14.95 2.4 0.51 1.3 3.4 0.51 1.3 3.4 Typ (4.) 0 0 0 5.0 10 15 4.2 0.88 2.25 8.8 0.88 2.25 8.8 0.00001 5.0 0.0005 0.0010 0.0015 Max Min 4.95 9.95 14.95 1.7 0.36 0.9 2.4 0.36 0.9 2.4 Max Unit Vdc Output Voltage Vin = VDD Vin = 0 0 Level 0.05 0.05 0.05 0.1 0.25 0.5 1.0 0.05 0.05 0.05 0.1 7.5 0.25 0.5 1.0 0.05 0.05 0.05 1.0 7.5 15 30 mAdc 1 Level VOH Vdc

MC14584B

Output Drive Current (VOH = 2.5 Vdc) (VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5 Vdc) (VOL = 0.4 Vdc) (VOL = 0.5 Vdc) (VOL = 1.5 Vdc) Input Current Input Capacitance (Vin = 0) Quiescent Current (Per Package)

IOH Source

mAdc

Sink

Iin Cin IDD

Adc pF Adc

Total Supply Current (5.) (6.) (Dynamic plus Quiescent, Per Package) (CL = 50 pF on all outputs, all buffers switching) Hysteresis Voltage

IT

IT = (1.8 A/kHz) f + IDD IT = (3.6 A/kHz) f + IDD IT = (5.4 A/kHz) f + IDD

Adc

VH (7.)

5.0 10 15 5.0 10 15

0.27 0.36 0.77 1.9 3.4 5.2 1.6 3.0 4.5

1.0 1.3 1.7 3.5 7.0 10.6 3.3 6.7 9.7

0.25 0.3 0.6 1.8 3.3 5.2 1.6 3.0 4.6

0.6 0.7 1.1 2.7 5.3 8.0 2.1 4.6 6.9

1.0 1.2 1.5 3.4 6.9 10.5 3.2 6.7 9.8

0.21 0.25 0.50 1.7 3.2 5.2 1.5 3.0 4.7

1.0 1.2 1.4 3.4 6.9 10.5 3.2 6.7 9.9

Vdc

Threshold Voltage PositiveGoing

VT+

Vdc

NegativeGoing

VT

5.0 10 15

Vdc

4. Data labelled Typ is not to be used for design purposes but is intended as an indication of the ICs potential performance. 5. The formulas given are for the typical characteristics only at 25_C. 6. To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL 50) Vfk where: IT is in A (per package), CL in pF, V = (VDD VSS) in volts, f in kHz is input frequency, and k = 0.001. 7. VH = VT+ VT (But maximum variation of VH is specified as less than VT + max VT min).

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SWITCHING CHARACTERISTICS (CL = 50 pF, TA = 25_C)
Characteristic Symbol tTLH VDD Vdc 5.0 10 15 5.0 10 15 5.0 10 15 Min Typ (8.) 100 50 40 100 50 40 125 50 40 Max 200 100 80 200 100 80 250 100 80 Unit ns Output Rise Time Output Fall Time tTHL ns Propagation Delay Time tPLH, tPHL ns

MC14584B

8. Data labelled Typ is not to be used for design purposes but is intended as an indication of the ICs potential performance.

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MC14584B
VDD 14 PULSE GENERATOR OUTPUT INPUT 7 VSS CL 20 ns INPUT 90% 50% 10% 90% 50% 10% tf tr tPLH 20 ns VDD VSS VOH VOL

tPHL OUTPUT

Figure 1. Switching Time Test Circuit and Waveforms

Vin VH Vin VDD VT+ VT VSS VDD Vout VSS

Vout VH Vin VDD VT+ VT VSS VDD Vout VSS

(a) Schmitt Triggers will square up inputs with slow rise and fall times.

(b) A Schmitt trigger offers maximum noise immunity in gate applications.

Figure 2. Typical Schmitt Trigger Applications

VDD Vout , OUTPUT VOLTAGE (Vdc) 0

VT VH

VT+

VDD

Vin, INPUT VOLTAGE (Vdc)

Figure 3. Typical Transfer Characteristics

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MC14584B
PACKAGE DIMENSIONS

P SUFFIX PLASTIC DIP PACKAGE CASE 64606 ISSUE M


14 8

B
1 7

NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 10_ 0.015 0.039 MILLIMETERS MIN MAX 18.16 18.80 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 10_ 0.38 1.01

A F N T
SEATING PLANE

L C

K H G D 14 PL 0.13 (0.005)
M

J M

DIM A B C D F G H J K L M N

D SUFFIX PLASTIC SOIC PACKAGE CASE 751A03 ISSUE F


A
14 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

B
1 7

P 7 PL 0.25 (0.010)
M

G C

R X 45 _

T
SEATING PLANE

D 14 PL 0.25 (0.010)
M

K T B
S

M A
S

DIM A B C D F G J K M P R

MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50

INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019

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MC14584B
PACKAGE DIMENSIONS

DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948G01 ISSUE O


14X K REF NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE W. MILLIMETERS INCHES DIM MIN MAX MIN MAX A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 C 1.20 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC M 0_ 8_ 0_ 8_

0.10 (0.004) 0.15 (0.006) T U


S

T U

N
2X

L/2

14

0.25 (0.010) M

L
PIN 1 IDENT. 1 7

B U

N F DETAIL E K

0.15 (0.006) T U

A V J J1


K1

SECTION NN W

C 0.10 (0.004) T SEATING


PLANE

DETAIL E

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MC14584B
PACKAGE DIMENSIONS

F SUFFIX PLASTIC EIAJ SOIC PACKAGE CASE 96501 ISSUE O

14

LE Q1 E HE M_ L DETAIL P

Z D e A VIEW P

NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE 0.50 LE M Q1 Z MILLIMETERS MIN MAX 2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 1.42 INCHES MIN MAX 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 0.056

b 0.13 (0.005)
M

A1 0.10 (0.004)

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

PUBLICATION ORDERING INFORMATION


NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 3036752175 or 8003443860 Toll Free USA/Canada Fax: 3036752176 or 8003443867 Toll Free USA/Canada Email: [email protected] Fax Response Line: 3036752167 or 8003443810 Toll Free USA/Canada N. American Technical Support: 8002829855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor European Support German Phone: (+1) 3033087140 (MF 1:00pm to 5:00pm Munich Time) Email: [email protected] French Phone: (+1) 3033087141 (MF 1:00pm to 5:00pm Toulouse Time) Email: [email protected] English Phone: (+1) 3033087142 (MF 12:00pm to 5:00pm UK Time) Email: [email protected] EUROPEAN TOLLFREE ACCESS*: 0080044223781 *Available from Germany, France, Italy, England, Ireland CENTRAL/SOUTH AMERICA: Spanish Phone: 3033087143 (MonFri 8:00am to 5:00pm MST) Email: [email protected] ASIA/PACIFIC: LDC for ON Semiconductor Asia Support Phone: 3036752121 (TueFri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 00180044223781 Email: [email protected] JAPAN: ON Semiconductor, Japan Customer Focus Center 4321 NishiGotanda, Shinagawaku, Tokyo, Japan 1418549 Phone: 81357402745 Email: [email protected] ON Semiconductor Website: http://onsemi.com

For additional information, please contact your local Sales Representative.

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MC14584B/D

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