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Microelectronic Circuits

This document provides an overview of the topics to be covered in a Microelectronic Circuits course. It summarizes the key points from Chapter 6 on single-stage integrated circuit amplifiers, including current sources, biasing techniques, and analyzing high-frequency response. The chapters will cover single and multistage amplifiers, feedback, operational amplifiers, and digital logic circuits. Chapter 6 focuses on biasing circuits, current mirrors, and determining the dominant pole to estimate the amplifier's 3-dB frequency. Tables and figures from the textbook are referenced throughout.

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0% found this document useful (0 votes)
1K views33 pages

Microelectronic Circuits

This document provides an overview of the topics to be covered in a Microelectronic Circuits course. It summarizes the key points from Chapter 6 on single-stage integrated circuit amplifiers, including current sources, biasing techniques, and analyzing high-frequency response. The chapters will cover single and multistage amplifiers, feedback, operational amplifiers, and digital logic circuits. Chapter 6 focuses on biasing circuits, current mirrors, and determining the dominant pole to estimate the amplifier's 3-dB frequency. Tables and figures from the textbook are referenced throughout.

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mome 85
Copyright
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Microelectronic Circuits Slide 1

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Microelectronic Circuits
• Instructor: Prof. Kwan-ho You
• http://optima.skku.ac.kr/courses.htm
• E-mail: [email protected]
• Textbook: “Microelectronic Circuits”
• Author: Sedra & Smith
• Press: Oxford press, 5th edition

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Overview Slide 2

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Overview

• List of chapters to be covered in this semester.


1. Chapter 6: Single-Stage Integrated Circuit Amp.
2. Chapter 7: Differential & Multistage Amp.
3. Chapter 8: Feedback
4. Chapter 9: OP-Amp & Data-Converter Circuits.
5. Chapter 10: Digital CMOS Logic Circuits

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Ch.6 Single-Stage Integrated Circuit Amp.

6.2 Comparison of the MOSFET & BJT

♣ Table 6.3 on page 550, 551.


6.3 IC Biasing

• Current sources, current mirrors, & current steering


circuits will be covered.
• Biasing in IC design is based on the use of
constant-current sources.
• On an IC chip with a number of amp stages, a constant
dc current (=reference current) is generated at one
location and is then replicated at various other
locations for biasing the various amp stages through a
process known as current steering.
⊙ 6.3.1 Basic MOSFET Current Source
• The circuit of a simple MOS constant-current source.
♣ Fig. 6.4 on page 563.
• The drain of Q1 is shorted to its gate, thereby forcing it
to operate in the saturation mode with
( )
1 ′ W
ID1 = kn (VGS − Vtn )2
2 L 1
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VDD − VGS
ID1 = IREF =
R
• The output current IO of the current source will be
( )
1 ′ W
IO = ID2 = kn (VGS − Vtn )2
2 L 2
IO (W/L)2
=
IREF (W/L)1

• Effect of VO on IO
• To ensure that Q2 is saturated,

VO ≥ VGS − Vt

♣ Fig. 6.6 on page 564.


• The output resistance Ro ,
∆VO VA2
Ro ≡ = ro2 =
∆IO IO
VA2 is the Early voltage of Q2 .
⊙ 6.3.2 MOS Current-Steering Circuits
• Current mirrors can be used to implement the
current-steering function.
• A simple current-steering circuit.
♣ Fig. 6.7 on page 566.
• Transistors Q1 , Q2 , and Q3 form a two-output current
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mirror.
(W/L)2
I2 = IREF
(W/L)1
(W/L)3
I3 = IREF
(W/L)1
• To ensure operation in the saturation region,
VD2 , VD3 ≥ −VSS + VGS1 − Vtn

• Current I3 is fed to the input side of a current mirror


formed by PMOS transistors Q4 and Q5 .
(W/L)5
I5 = I4
(W/L)4
where I4 =I3 . To keep Q5 in saturation,
VD5 ≤ VDD − |VOV 5 |

⊙ 6.3.3 BJT Circuits


• The basic BJT current mirror.
♣ Fig. 6.8 on page 567.
• Two important differences from MOS mirror.
• (1) the nonzero base current of BJT causes an error in
the current transfer ratio of the bipolar mirror. (2) the
current transfer ratio is determined by the relative
areas of the emitter-base junctions of Q1 and Q2 .
• Let us first consider the case when β is suffciently high
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so that we can neglect the base current.

IO = IREF

• To obtain a current transfer ratio other than unity, say


m, the area of the EBJ of Q2 is m times that of Q1 .

IO = mIREF

• The current transfer ratio is


IO IS2 Area of EBJ of Q2
= =
IREF IS1 Area of EBJ of Q1
• Next we consider the effect of finite transistor β on the
current transfer ratio.
♣ Fig. 6.9 on page 568.
( )
2
IREF = IC + 2IC /β = IC 1 +
β
IO I 1
= ( C )=
IREF IC 1 + 2 1 + β2
β

• BJT mirror has a finite output resistance Ro ,


∆VO VA2
Ro ≡ = ro2 =
∆IO IO
where VA2 and ro2 are the Early voltage and the output
resistance of Q2 .
• A Simple Current Source
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♣ Fig. 6.10 on page 569.
VCC − VBE
IREF =
R ( )
IREF VO − VBE
IO = 1+
1 + (2/β) VA
• Output resistance of this current source is ro of A2
VA VA
Ro = r02 ≈ ≈
IO IREF
• Current Steering
♣ Fig. 6.11 on page 570.
• Q3 will supply a constant current I equal to IREF .
• Two transistors, Q5 and Q6 are connected in parallel,
and the combination forms a mirror with Q1 . Thus
I3 = 2IREF .
• Constant current I2 equals to IREF .
• Finally, to generate a current three times IREF , three
transistors, Q7 , Q8 and Q9 , each of which is matched to
Q2 , are connected in parallel.
6.4 High-Frequency Response

• The general form of the frequency response.


♣ Fig. 6.12 on page 572.
• The gain remains constant at its midband value AM
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down to zero frequency (dc).


• The gain falls off at the high-frequency end due to the
internal capacitances of the transistor.
⊙ 6.4.1 High-Frequency Gain Function
• The amp. gain, taking into account the internal
transistor capacitances, can be expressed as
A(s) = AM FH (s)
(1 + s/ωZ1 )(1 + s/ωZ2 ) · · · (1 + s/ωZn )
FH (s) =
(1 + s/ωP 1 )(1 + s/ωP 2 ) · · · (1 + s/ωP n )
⊙ 6.4.2 Determining the 3-dB Frequency fH
• ωP 1 is of much lower frequency than any of the other
poles, then this pole will have the greatest effect on the
value of the amplifier ωH .
• The amp. is said to have a dominant-pole frequency.
1
FH (s) ≈
1 + s/ωP 1
Then the determination of ωH is greatly simplified:
ωH ≈ ωP 1

• A dominant pole exists if the lowest-frequency pole is at


least two octaves (a factor of 4) away from the nearest
pole or zero.
• If a dominant pole does not exist, the 3-dB frequency
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ωH can be determined from a plot of |FH (jω)|.


(1 + s/ωZ1 )(1 + s/ωZ2 )
FH (s) =
(1 + s/ωP 1 )(1 + s/ωP 2 )

• By definition, at ω = ωH , |FH |2 = 12 ;

1 1 2 2
ωH ≈ 1/ + − −
ωP2 1 ωP2 2 2
ωZ1 2
ωZ2

• This relationship can be extended to any number of


poles and zeros as
√( ) ( )
1 1 1 1
ωH ≈ 1/ + 2 ··· − 2 2 + ω2 + · · ·
ωP2 1 ωP 2 ωZ1 Z2

⊙ 6.4.3 Using Open-Circuit Time Constants for the


Approximate Determination of fH
• If the poles and zeros of the amp. transfer function can
be determined easily, then we can determine fH using
the techniques above.
• However, it is not a simple matter to determine the
poles and zeros by quick hand analysis.
• Consider the function FH (s)
1 + a1 s + a2 s2 + · · · + an sn
FH (s) =
1 + b1 s + b2 s2 + · · · + bn sn
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The coefficient b1 is given by
1 1 1
b1 = + + ··· +
ωP 1 ωP 2 ωP n
• The value of b1 can be obtained by considering the
various capacitances in the high-frequency equivalent
circuit one at a time while reducing all other
capacitances to zero.
• The value of b1 is computed by summing the individual
time constants, called open-circuit time constants,

n
b1 = Ci Rio
i=1

• If one of the poles, say P1 , is dominant, the upper 3-dB


frequency will be approximately equal to ωP 1 ,
1 1
ωH ≈ =∑
b1 i Ci Rio

• EX. 6.6 Figure 6.14(a) shows the high-frequency


equivalent circuit of a common-source FET amplifier.
♣ Fig. 6.14(a) on page 577.
Capacitors Cgs and Cgd are the FET internal
capacitances. For Rsig = 100kΩ, Rin = 420kΩ,

Cgd = Cgd = 1pF , gm = 4mA/V , and RL = 3.33kΩ.
Find the midband voltage gain, AM = Vo /Vsig and the
upper 3-dB frequency, fH .
Sol. The midband voltage gain is determined by
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assuming that the capacitors in the MOSFET model
are perfect open circuits.
Vo Rin ′
AM ≡ =− (gm RL )
Vsig Rin + Rsig
420
= − × 4 × 3.33 = −10.8V /V
420 + 100
We shall determine ωH using the method of
open-circuit time constants. The resistance Rgs seen by
Cgs is found by setting Cgd = 0 and short-circuiting the
signal generator Vsig

Rgs = Rin //R = 420kΩ//100kΩ = 80.8kΩ

The open-circuit time constant of Cgs is

τgs ≡ Cgs Rgs = 1 × 10−12 × 80.8 × 103 = 80.8ns

The resistance Rgd seen by Cgd =0 and short-circuiting


Vsig .
We apply a test current Ix , writing a node equation at
G gives.
Vgs Vgs
Ix = − −
Rin Rsig
Vgs = −Ix R′

Where R′ = Rin //Rsig .


Vgs + Vx
Ix = gm Vgs + ′
RL
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Vx
Rgd ≡ = R ′ + RL
′ ′
+ gm RL R′ = 1.16M Ω
Ix
Open-circuit time constant of Cgd is

τ ≡ Cgd Rgd
= 1 × 10− 12 × 1.16 × 106 = 1160ns

Upper 3-dB frequency ωH can now be determined from


1
ωH ≈
τgs + τgd
1
≈ = 806 krad/s
(80.8 + 1160) × 10−9
ωH
fH = = 128.3kHz

• The method of open-circuit time constants has an
important advantage in that it tells the circuit designer
which of the various capacitances is significant in
determining the amplifier frequency response.
⊙ 6.4.4 Miller’s Theorem
♣ Fig. 6.15(a) on page 579.
• The voltage at node 2 is related to that at node 1 by

V2 = KV1

• Miller’s theorem states that impedance Z can be


replaced by two impedances: Z1 connected bw. node 1
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and ground and Z2 connected bw. node 2 and ground,

Z1 = Z/(1 − K)
( )
1
Z2 = Z/ 1 −
K
The proof of Miller’s theorem is
( )
V1 V1 − KV1
I1 = =I=
Z1 Z
0 − V2 0 − KV1 V1 − KV1
I2 = = =I=
Z2 Z2 Z
• Ex. 6.7 An ideal voltage amp. having a gain of -100
V/V with an impedance Z connected bw. its output
and input terminals. Find the Miller equivalent circuit
when Z is (a) a 1-M Ω resistance, and (b) a 1-pF
capacitance. In each case, use the equivalent circuit to
determine Vo /Vsig .
♣ Fig. 6.16(a) on page 580.
(Sol.)
(a) For Z = 1M Ω,
Z 1000kΩ
Z1 = = = 9.9kΩ
1−K 1 + 100
Z 1M Ω
Z2 = = 1 = 0.99M Ω
1− K
1
1 + 100

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The voltage gain can be
Vo Vo Vi Z1
= = −100 × = −49.7V /V
Vsig Vi Vsig Z1 + Rsig
(b) For Z as a 1-pF capacitance
Z 1/sC
Z1 = = = 1/s(101C)
1−K 1 + 100
Z 1 1 1
Z2 = = =
1− K
1 1.01 sC s(1.01C)
Vo Vo Vi 1/sC1
= = −100
Vsig Vi Vsig 1/(sC1 ) + Rsig

• The multiplication of a feedback capacitance by (1 − K)


is referred to as Miller multiplication or Miller effect.
6.5 CS & CE Amp. with Active Loads

⊙ 6.5.1 Common-Source Circuit


• Most basic IC MOS amp.
♣ Fig. 6.17(a) on page 583.
• The current-source load can be implemented using a
PMOS transistor and is therefore called an active load.
• We shall assume that the MOSFET is biased to operate
in the saturation region.
⊙ 6.5.2 CMOS Implementation of the
Common-Source Amp.
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• A CMOS circuit implementation of the common-source
amp.
♣ Fig. 6.18(a) on page 584.
• We shall assume that Q2 and Q3 are matched.
• Q2 behaves as a current source when it operates in
saturation.
|VA2 |
ro2 =
IREF
The current-source load is not ideal but has a finite
output resistance equal to the transistor ro .
• Transfer characteristic
♣ Fig. 6.18(d) on page 584.
• In region III both the amplifying transistor Q1 and the
load transister Q2 are operating in saturation.
ro2
Av = −(gm1 ro1 ) = −gm1 (ro1 ||ro2 )
ro2 + ro1
6.6 High-Frequency Response of the CS and CE amp.

• High-frequency response of the active-loaded


common-source and common-emitter amp.
• High-frequency equivalent circuit of the common-source
amp.
♣ Fig. 6.20 on page 589.
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• The load capacitance CL represents the total
capacitance bw. drain (or collector) and ground.
⊙ Analysis using Miller’s Theorem
• Approximate equivalent circuit obtained for the CS
case.
♣ Fig. 6.21 on page 589.
• The amp. has a dominant pole formed by Rsig and Cin .
Vo AM

Vsig 1 + ωsH

AM = −gm RL
1
fH =
2πCin Rsig

Cin = Cgs + Cgd (1 + gm RL )

⊙ 6.6.2 Analysis using Open-Circuit Time Constants


• (1) The resistance seen by Cgs , Rgs = Rsig .

• (2) The resistance seen by CL , RCL = RL
• (3) The resistance seen by Cgd can be found by
analyzing the circuit in Fig. 6.22(b) with the result that
♣ Fig. 6.22(b) on page 590.
′ ′
Rgd = Rsig (1 + gm RL ) + RL

• Thus the effective time-constant b1 or τH can be


τH = Cgs Rgs + Cgd Rgd + CL RCL
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• The 3-dB frequency fH is
1
fH ≈
2πτH
⊙ 6.6.4 Adapting the formula for the Case of the
CE Amp.
♣ Fig. 6.25 on page 596.
′ rπ
Vsig = Vsig
Rsig + rx + rπ

Rsig = rπ ||(Rsig + rx )
rπ ′
AM = − (gm RL )
Rsig + rx + rπ

Cin = Cπ + Cµ (1 + gm RL )
1
fH ≈ ′
2πCin Rsig
• Using the method of open-circuit time constants

τH = Cπ Rπ + Cµ Rµ + CL CCL
′ ′ ′ ′ ′
= Cπ Rsig + Cµ [(1 + gm RL )Rsig + RL ] + CL RL
1
fH ≈
2πτH
6.7 CG & CB Amp. with Active Loads

⊙ 6.7.1 Common-Gate Amp.


• The basic IC MOS common-gate amp.
♣ Fig. 6.27(a) on page 601.
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• We assume that the MOSFET is operating in the
saturation region.
• The Body Effect
• Since the substrate (=body) is not connected to the
source, the body effect plays a role in the operation of
the common-gate amp.
• Just as a signal voltage vgs bw. the gate and the source
gives rise to a drain current signal gm vgs , a signal
voltage vbs bw. the body and the source gives rise to a
drain current signal gmb vbs .
• Thus the drain signal current becomes
(gm vgs + gmb vbs ); gmb = χgm , χ = 0.1 to 0.2.
• Since both the gate and the body terminals are
connected to ground, vbs = vgs , and the signal current
in the drain becomes (gm + gmb )vgs .
• Input Resistance
• To determine the input resistance Rin , express ii in
terms of vi .
♣ Fig. 6.27(c) on page 601.
• The source current i = (gm + gmb )vi and the current
through ro , iro ,

ii = (gm + gmb )vi + iro


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vi − vo vi − ii RL
iro = =
ro ro
( ) ( )
1 RL
ii = gm + gmb + vi / 1 +
ro ro

• The input resistance Rin can be found as


vi ro + RL
Rin ≡ =
ii 1 + (gm + gmb )ro

• Observe that for ro = ∞, Rin reduces to 1/(gm + gmb ).


• Operation with RL = ∞
• Since io = 0, ii must also be zero; the current i in the
source terminal, i = (gm + gmb )vi , simply flows via the
drain through ro and back to the source node.

Ri = ∞

• To determine the open-circuit voltage gain Avo ,

vo = iro + vi
= (gm + gmb )ro vi + vi
Avo = 1 + (gm + gmb )ro

• The gain of the CG circuit is positive. Unlike the CS


amp., the CG amp. is noninverting.
• Voltage Gain
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• We use that io = ii and express vo as

vo = io RL = ii RL
vi = ii Rin

• The voltage gain Av is


vo RL
Av = =
vi Rin
• Output Resistance
• Two different output resistances: Ro , which is the
output resistance when vi is set to zero, and Rout ,
which is the output resistance when vsig is set to zero.
♣ Fig. 6.28 on page 605.

Ro = ro

• From the Fig. 6.28(b), a test voltage vx is applied at


the output.

v = ix Rs
vx = [ix + (gm + gmb )v]ro + v

• Hence Rout ≡ vx /ix ,

Rout = ro + [1 + (gm + gmb )ro ]Rs

• The expressions for Rout is very useful results that we


will employ frequently throughout the rest of this book.
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• These formulas give the output resistance not only of
the CG amp. but also of a CS amp. with a resistance
Rs in the emitter.
• Another interpretation of the formula for Rout is
Rout = Rs + [1 + (gm + gmb )Rs ]ro

• High-Frequency Response
• CG amp. with the MOSFET internal capacitances Cgs
and Cgd indicated.
♣ Fig. 6.31(a) on page 607.
• None of the capacitances undergoes the Miller
multiplication effect.
• CG circuit can be designed to have a much wider
bandwidth than that of the CS circuit.
• If ro can be neglected, we immediately observe that
there are two poles: one at the input side with a
frequency fP 1 ,
1
fP 1 = ( )
2πCgs Rs || gm +g
1
mb

• The other at the output side with a frequency fP 2 ,


1
fP 2 =
2π(Cgd + CL )RL
• fP 2 is usually lower than fP 1 ; thus fP 2 can be
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dominant.
• Both fP 1 and fP 2 are usually much higher than the
frequency of the dominant input pole in the CS stage.
• When ro has to be taken into account,
Rgs = Rs ||Rin
Rgd = RL ||Rout
1
fH =
2π[Cgs Rgs + (Cgd + CL )Rgd ]
⊙ 6.7.2 The Common-Base Amp.
• The basic circuit for the active-loaded common-base
amp.
♣ Fig. 6.33 on page 610
• From figure 6.33(b)
io = ii − vi /rπ

• The input resistance at the emitter Rin


ro + RL
Rin =
1 + rroe + (β+1)r
RL
e

• With a slight approximation,


ro + RL
Rin ≈ re
ro + RL /(β + 1)
• Note that setting ro = ∞ yields Rin = re . Also,for
RL = 0, Rin = re .
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• For RL /(β + 1) << ro ,


RL
Rin ≈ re +
Ao
where Ao is the intrinsic gain gm ro .
• The output resistance including the source resistance
Re can be found by analysis of the circuit
♣ Fig. 6.34 on page 612.

Rout = ro + (1 + gm ro )Re′

where Re′ = Re ||rπ .


• Another useful form for Rout can be

Rout = Re′ + (1 + gm Re′ )ro


6.8 Cascode Amp.

• By placing a common-gate (common-base) amp. stage


in cascade with a common-source (common-emitter)
amp. stage. ⇒ cascode configuration.
• We combine the high input resistance and large
transconductance achieved in a common-source
(common-emitter) amp. with the current-buffering
property and the superior high-frequency response of
the common-gate (common-base) circuit.
⊙ 6.8.1 The MOS Cascode
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• MOS cascode amp.
♣ Fig. 6.36 on page 615.
• Q1 is connected in the common-source configuration
and provides its output to the input terminal (source)
of Q2 .
• Small-Signal Analysis
♣ Fig. 6.36(b)
1 RL
Rin2 = +
gm2 + gmb2 Avo2
Avo2 = 1 + (gm2 + gmb2 )ro2
[ ]
1 RL
Rd1 = ro1 || +
gm2 + gmb2 Avo2
Rout = ro2 + Avo2 ro1
vi = vsig
vo1
= −gm1 ro1 = −A01
vi
vo = Avo2 vo1
Avo = −A01 Avo2

⊙ 6.8.2 Frequency Response of the MOS Cascode


• Cascode amp. with all transistor internal capacitances
indicated.
♣ Fig. 6.38 on page 618.
• Determining the 3-dB frequency fH is to employ the
open-circuit time-constants method.
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1. Capacitance Cgs1 sees a resistance Rsig .
2. Capacitance Cgd1 sees a resistance Rgd1 , which can
be obtained by adapting the formula in Eq. (6.56) to

Rgd1 = (1 + gm1 Rd1 )Rsig + Rd1

where Rd1 , the total resistance at D1 , is given by


Eq. (6.124).
3. Capacitance (Cdb1 + Cgs2 ) sees a resistance Rd1 .
4. Capacitance (CL + Cgd2 ) sees a resistance
(RL ||Rout ).

τH = Cgs1 Rsig + Cgd1 [(1 + gm1 Rd1 )Rsig + Rd1 ]


+(Cdb1 + Cgs2 )Rd1 + (CL + Cgd2 )(RL ||Rout )
1
fH ≈
2πτH
⊙ 6.8.3 The BJT Cascode
• BJT cascode amp.
♣ Fig. 6.40 on page 623.
• The BJT cascode has an input resistance of rπ1 .
• The output resistance is found as Rout = β2 ro2 .
• From the circuit in Fig. 6.40(c), the voltage gain Avo is

Avo = −βAo

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6.9 CS & CE Amp. with Source (Emitter) Degeneration

⊙ 6.9.1 CS Amp. with a Source Resistance


• An active-loaded amp. with a source resistance Rs .
♣ Fig. 6.47 on page 629.
• To determine the output resistance Rout , we reduce vi
to zero and using Eq. (6.101),

Rout = ro + [1 + (gm + gmb )ro ]Rs

• The open-circuit voltage gain can be found from the


circuit in Fig. 6.47(c).

vo = −iro = −gm ro vgs = −gm ro vi


Avo = −gm ro = −Ao

• The amp. output equivalent circuit can be found as


shown in Fig. 6.47(d).
• The voltage gain Av is
RL
Av = −Avo
RL + Rout
• If RL is kep unchanged, Av will decrease, which is the
price paid for the performance improvements obtained
when Rs is introduced.
• Frequency Response
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• Another advantage of source degeneration is the ability
to broaden the amp. bandwidth.
• The amp. with internal capacitance Cgs and Cgd
indicated.
♣ Fig. 6.48 on page 632.
• The method of open-circuit time constants can be
employed to obtain an estimate of the 3-dB frequency
fH .
• Rgd , which is the resistance seen by Cgd can be
determined by simply adapting the formula in Eq.
(6.56) to the case with source degeneration as follows:
′ ′
Rgd = Rsig (1 + Gm RL ) + RL

RL = RL ||Rout

RCL = RL ||Rout = RL

• The formula for Rgs is the most difficult to derive,


using the hybrid-π model,
Rsig + Rs
Rgs ≈ ( )
ro
1 + (gm + gmb )Rs ro +RL
τH = Cgs Rgs + Cgd Rgd + CL RCL
1
fH =
2πτH
⊙ 6.9.2 CE Amp. with an Emitter Resistance
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• An active-loaded CE amp. with an emitter resistance
Re .
♣ Fig. 6.49 on page 633.
• We can express the ouput voltage vo as
[ ]
vi − ire
vo = (1 − α)i − RL
Re
Alternatively, we can express vo as
[ ]
vi − ire
vo = (vi − ire ) − ro i −
Re
• Equating these two expressions of vo yields an equation
in vi and i,
vi
Rin =
i/(β + 1)
RL
ro + β+1
= (β + 1)re + (β + 1)Re
ro + RL + Re
6.10 The Source & Emitter Followers

⊙ 6.10.1 Source Follower


• IC source follower biased by a constant-current source I.
♣ Fig. 6.50 on page 636.
• This is usually implemented using an NMOS current
mirror.
• The low-frequency small-signal model of the source
follower.
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♣ Fig. 6.50 (b), (c) on page 636.

′ 1
RL = RL ||ro ||
gmb

vo = gm vgs RL
vgs = vi − vo

vo gm RL
Av ≡ = ′
vi 1 + gm RL

• To obtain the open-circuit voltage gain, we set RL to


∞.
gm ro
Avo =
1 + (gm + gmb )ro

⊙ 6.10.2 Frequency Response of the Source Follower


• A major advantage of the source follower is its excellent
high-frequency response.
• This comes about because none of the internal
capacitances suffers from Miller effect.
• High-frequency equivalent circuit of a source follower.
♣ Fig. 6.51 on page 638.
• To find the poles, we will find the resistance seen by
each of three capacitances Cgd , Cgs , and CL and then
compute the time constant associated with each.
• (1) With Vsig set to zero and Cgs and CL assumed to
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be open circuited,
Rgd = Rsig

• (2) The resistance Rgs seen by Cgs can be determined


by analysis of the circuit in Fig. 6.51(c) to obtain,

Rsig + RL
Rgs = ′
1 + gm RL
• (3) CL interacts with RL ||Ro
RCL = RL ||Ro = RL ||ro ||1/gm ||1/gmb

• The high-frequency is limited as


1
fH = = 1/2π(Cgd Rsig + Cgs Rgs + CL RCL )
2πτH
6.11 Some Useful Transistor Pairings

⊙ 6.11.1 CD-CS, CC-CE, and CD-CE Configuration


• By cascading a common-drain (source-follower)
transistor Q1 with a common-source transistor Q2 .
♣ Fig. 6.53 on page 641.
• Its bandwidth is much wider than that obtained in a
CS amp.
⊙ 6.11.2 Darlington Configuration (CC-CC)
• Darlington configuration.
♣ Fig. 6.55 on page 645.
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• Darlington pair can be thought of as a composite
transistor with β = β1 β2 .
• It can be used to implement a high-performance voltage
follower.

6.12 Current-Mirror Circuits with Improved Performance

• Constant-current source is used both in biasing and as


active load.
⊙ 6.12.1 Cascode MOS Mirrors
• Bias cascode current mirror.
♣ Fig. 6.58 on page 649.
• The output resistance Ro is (using Eq. (6.101)),

Ro = ro3 + [1 + (gm3 + gmb3 )ro3 ]ro2


≈ gmb3 ro3 ro2

⊙ 6.12.2 A Bipolar Mirror with Base-Current


Compensation
• A bipolar current mirror
♣ Fig. 6.59 on page 650.
[ ]
2
IREF = IC 1 +
β(β + 1)
IO = IC
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The current transfer ratio of the mirror is
IO 1
=
RREF 1 + 2/(β 2 + β)
1

1 + 2/β 2
which means that the error due to finite β has been
reduced from 2/β in the simple mirror to 2/β 2 .
⊙ 6.12.3 The Wilson Current Mirror
• Wilson mirror.
♣ Fig. 6.60 on page 651.
IO 1

IREF 1 + 2/β 2
⊙ 6.12.4 The Wilson MOS Mirror
• MOS version of the Wilson mirror.
♣ Fig. 6.61 on page 653.
⊙ 6.12.5 The Widlar Current Source
• Widlar current source.
♣ Fig. 6.62 on page 654.
• Resistor RE is included in the emitter lead of Q2 .
• Neglecting base currents we can write as
( )
IREF
VBE1 = VT ln
IS
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( )
IO
VBE2 = VT ln
IS
( )
IREF
VBE1 − VBE2 = VT ln
IO
VBE1 = VBE2 + IO RE
( )
IREF
IO RE = VT ln
IO
• Ex. 6.14 Fig. 6.63 shows two circuits for generating a
constant current IO = 10µA which operate from a 10-V
supply. Determine the values of the required resistors
assuming that VBE is 0.7V at a current of 1 mA and
neglecting the effect of finite β.
♣ Fig. 6.63 on page 655.
(a) Choose a value for R1 to result in IREF = 10µA.
( )
10µA
VBE1 = 0.7 + VT ln = 0.58V
1mA
10 − 0.58
R1 = = 942kΩ
0.01
(b) First decide on a suitable value for IREF . If we
select IREF = 1mA, then VBE1 = 0.7V and R2 is given
by
10 − 0.7
R2 = = 9.3kΩ
1 ( )
1mA
10 × 10−6 R3 = 0.025 ln ⇒ R3 = 11.5kΩ
10µA

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