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MOS (Metal-Oxide-Semiconductor)

This document provides an overview of metal-oxide-semiconductor (MOS) structures. It describes the ideal MOS structure consisting of a metal electrode, insulating oxide layer, and semiconductor substrate. In a real MOS diode, fixed oxide charges, interface traps, and other defects introduce differences from the ideal case. The document outlines accumulation, depletion, and inversion at the semiconductor surface under different biases. It also derives the depletion width and discusses factors like threshold voltage and flat-band voltage. Traps in the oxide and at the interface affect the capacitance-voltage characteristics compared to an ideal MOS diode.

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Ajit Sarwade
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215 views

MOS (Metal-Oxide-Semiconductor)

This document provides an overview of metal-oxide-semiconductor (MOS) structures. It describes the ideal MOS structure consisting of a metal electrode, insulating oxide layer, and semiconductor substrate. In a real MOS diode, fixed oxide charges, interface traps, and other defects introduce differences from the ideal case. The document outlines accumulation, depletion, and inversion at the semiconductor surface under different biases. It also derives the depletion width and discusses factors like threshold voltage and flat-band voltage. Traps in the oxide and at the interface affect the capacitance-voltage characteristics compared to an ideal MOS diode.

Uploaded by

Ajit Sarwade
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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MOS

(metal-oxidesemiconductor)

2003/12/19

Outline

Structure

Ideal

MOS

The surface depletion region

Ideal MOS curves

The SiO2-Si MOS diode (real case)

Structure
A basic MOS consisting of three
layers.
The top layer is a conductive metal
electrode, the middle layer is an
insulator of glass or silicon dioxide,
and the bottom layer is another
conductive electrode made out of
crystal silicon. This layer is a
semiconductor whose conductivity
changes with either doping or
temperature.

Structure

Cross-section of an MOS
diode
d is the thickness of the
oxide and V is the
applied voltage on the
metal field plate
V>(<)0 metal plate is
positively (negatively)
biased with respect to the
ohmic contact

Ideal MOS

A. at zero applied bias, the energy difference between


the metal work function q

Ideal MOS

Ideal MOS
When an ideal MOS diode is biased with positive
or negative voltages, three case may exist at
the semiconductor surface
A. accumulation
B. depletion
C. inversion

Accumulation

V<0 excess + carrier will be induced at the SiO2-Si interface


Bands near the semiconductor surface are bent upward

Charge distribution Qs=lQml (Qs + charge per unit area in the


semiconductor)

depletion

V>0
Bands near the semiconductor surface are bent
downward and the major carriers (holes) are depleted
Charge distribution Qsc=-qNAW (space charge per unit
area) W (width of depletion region)

inversion

Larger +V is applied Ei cross over the Fermi level

Electrons is greater than holes


Weak and strong inversion (electron concentration in interface
equal to the substrate doping level)
After this point additional e in the n-type inversion layer(1~10nm)

The surface depletion region

The surface depletion region

We

can use q

The surface depletion region

Prove the depletion region


width
By using the one dimensional Poissons equation

s(x) is the charge density per unit volume at position x


and s is the dielectric permittivity
when the semiconductor is depleted to a width of W and
the charge within the semiconductor is given by s=-qNA
integration of Poissons equation we get the electrostatic
potential distribution as a function of distance x in the
surface depletion region

Prove the depletion region


width
When strong inversion occurs ns=NA
ns=nieq(

The relationship between W


and NA

Ideal MOS curves

Ideal MOS curves


1.C=Co
2.

3.Threshold voltage

The SiO2-Si MOS diode


In real case there are some difference
between the ideal MOS
a. the work function difference
b. interface traps and oxide charges

The work function difference

Flat-band

voltage (VFB=

Interface traps and oxide


charges

Interface-trapped charge
Fixed-oxide charge
Oxide-trapped charge
Mobile ionic charge

Interface-trapped charge Qit


It

is due to the SiO2-Si interface properties and


dependent on the chemical composition of this
interface
The interface trap density is orientation
dependent for example in <100>orientation
the interface trap density is about an order of
magnitude smaller than that in <111>orientation
450 hydrogen annealing the value of
Interface-trapped charges for <100>orientation
silicon can be as low as 1010cm-2

Fixed-oxide charge Qf

the fixed-oxide charge is located within approximately 3


nm of the SiO2-Si interface .this charge is fixed and
cannot be charged or discharged over a wide variation of
surface potential. Generally, Qf is positive and depends
on oxidation and annealing conditions and on silicon
orientation

It has been suggested that when the oxidation is stopped,


some ionic silicon is left near the interface. It may result in
the positive interface charge Qf
Typical fixed-oxide charge densities for a carefully treated
SiO2-Si interface system are about 1010cm-2 for a
<100>surface and about 5x 1010cm-2 for a <111>surface

Oxide-trapped charge Qot


Oxide-trapped charge are associated
with defect in the silicon dioxide.
These charges can be created, for
example, by X-ray radiation or high
energy electron bombardment the
trap are distributed inside the oxide
layer. Most of process-related oxidetrapped charge can be removed by
low-temperature annealing

Mobile ionic charge Qm

The

mobile ionic charges Qm, such as


sodium or other alkali ion are mobile
within the oxide under raisetemperature (e.g.>100) and highelectric field operation

It may cause stability problem in


device

Effect of a fixed oxide charge and interface


traps on the C-V characteristics of an MOS
diode

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