LOGIC OVERVIEW

PRODUCT INDEX

FUNCTIONAL CROSSREFERENCE

DEVICE SELECTION GUIDE

PACKAGING AND MARKING INFORMATION

LOGIC PURCHASING TOOL/ALTERNATE SOURCES

LOGIC SELECTION GUIDE

FIRST HALF 2004

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INTRODUCTION

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TI MILITARY
SEMICONDUCTOR

Texas Instruments offers a full spectrum of logic functions and technologies

from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TIs
process technologies offer the logic performance and features required for
modern logic designs, while maintaining support for more traditional logic
products. TIs offerings include products in the following process technologies
or device families:

AC, ACT, AHC, AHCT, ALVC, AUC, AUP, AVC, FCT, HC, HCT, LV, LVC,
TVC

ABT, ABTE, ALB, ALVT, BCT, HSTL, LVT, SSTL, SSTU, SSTV, SSTVF

BTA, CB3Q, CB3T, CBT, CBT-C, CBTLV, FB, FIFO, GTL, GTLP, JTAG,
PCA, PCF, VME

ALS, AS, F, LS, S, TTL

TI offers specialized, advanced logic products that improve overall system

performance and address design issues, including testability, low skew
requirements, bus termination, memory drivers, and low-impedance drivers.

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DATA SHEETS
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v

CURRENT TI LOGIC TECHNICAL DOCUMENTATION

Listed below is the current collection of TI logic technical documentation. These documents can be ordered through
a TI representative or authorized distributor by referencing the appropriate literature number.
Document

Literature Number

ABT Logic Advanced BiCMOS Technology Data Book (1997) . . . . . . . . . . . . . . . . . . . . . . . SCBD002C

AC/ACT CMOS Logic Data Book (1997) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCAD001D
AHC/AHCT Logic Advanced High-Speed CMOS Data Book (April 2000) . . . . . . . . . . . . . . SCLD003B
AHC/AHCT Designers Guide (February 2000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCLA013D
ALS/AS Logic Data Book (1995) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SDAD001C
ALVC Advanced Low-Voltage CMOS Data Book . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCED006B
AUC Advanced Ultra-Low-Voltage CMOS Data Book (January 2003) . . . . . . . . . . . . . . . . SCED011A
AVC Advanced Very-Low-Voltage CMOS Data Book (March 2000) . . . . . . . . . . . . . . . . . . SCED008C
BCT BiCMOS Bus-Interface Logic Data Book (1994) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCBD001B
Boundary-Scan Logic IEEE Std 1149.1 (JTAG) Data Book (1997) . . . . . . . . . . . . . . . . . . . . SCTD002A
IEEE Std 1149.1 (JTAG) Testability Primer (1997) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SSYA002C
CBT (5-V) and CBTLV (3.3-V) Bus Switches Data Book (December 1998) . . . . . . . . . . . . SCDD001B
Design Considerations for Logic Products Application Book (1997) . . . . . . . . . . . . . . . . . . SDYA002
Design Considerations for Logic Products Application Book, Volume 2
(September 1999) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SDYA018
Design Considerations for Logic Products Application Book, Volume 3
(December 2000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SDYA019
F Logic Data Book (1994) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SDFD001B
GTL/GTLP Logic High-Performance Backplane Drivers (September 2001) . . . . . . . . . . . . SCED004A
HC/HCT Logic High-Speed CMOS Data Book (2003) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCLD001E
Little Logic Data Book (November 2001) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCED010
LVC and LV Low-Voltage CMOS Logic Data Book (1998) . . . . . . . . . . . . . . . . . . . . . . . . . . . SCBD152B
LVT Logic Low-Voltage Technology Data Book (1998) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCBD154
Mobile Computing Logic Solutions Data Book (July 1999) . . . . . . . . . . . . . . . . . . . . . . . . . . SCPD002
Semiconductor Group Package Outlines Reference Guide (1999) . . . . . . . . . . . . . . . . . . . SSYU001E
Signal Switch Including Digital/Analog/Bilateral Switches and Voltage Clamps
Data Book (January 2004) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCDD003A
See www.ti.com/sc/logic for the most current data sheets.

vi

TABLE OF CONTENTS

SECTION 1 LOGIC OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Welcome to the World of TI Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Product Life Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Family Specification Comparision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Family Performance Positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
CMOS Voltage Roadmap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
CMOS Voltage vs. Speed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Device Names and Package Designators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Logic Vendor Partnerships . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
IC Basics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Logic Feature List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Bus-Hold Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Series Damping Resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Partial Power Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Hot Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Live Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Mixed-Voltage Interfacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Dual-Supply Level Translators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
What Is Little Logic? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
TI Little Logic Portfolio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
NanoStar/NanoFree Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
AUC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
AUP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
ALVC Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
AVC Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
LVC Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
LV-A Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
LVT Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
ALVT Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Bus Switch Function Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
Bus Switch Key Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
Bus Switch Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Bus Switch New Families . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
TVC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
What Is GTL/GTLP? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
GTLP Is a Bidirectional Translator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
GTLP and VME Are Specifically Designed for High-Performance Multislot Parallel Backplanes . . . . . . . . . 143
GTLP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
SN74VMEH22501 UBT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
Logic Roadmap for High-Speed Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
DDR Register Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
Packaging Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
TI FIFO Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
TI FIFO Product and Technology Roadmap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151

vii

SECTION 1 (continued)
TI FIFOs Optimize System Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IEEE 1149.1 (JTAG) Boundary-Scan Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current TI JTAG Product Offering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical System-Level Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical JTAG Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

152
153
154
155
157

SECTION 2 PRODUCT INDEX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Backplane Logic (GTL, GTLP, FB+/BTL, and ABTE/ETL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Drivers and Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Boundary-Scan IEEE Std 1149.1 (JTAG) Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Boundary-Scan (JTAG) Bus Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Boundary-Scan (JTAG) Support Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Inverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Noninverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Bus Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
Bus Exchange/Multiplexing Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
Standard Bus Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
Binary Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
Decade Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
Decoders, Encoders, and Multiplexers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Decoders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Multiplexers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Priority Encoders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

216
216
217
218

FIFOs (First-In, First-Out Memories) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219

Asynchronous FIFO Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
Synchronous FIFO Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220

viii

Flip-Flops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D-Type Flip-Flops (3-state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D-Type Flip-Flops (non 3-state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Other Flip-Flops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

221
221
223
223

Gates and Inverters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

AND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NAND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AND-OR-Invert Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NOR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Exclusive-OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Exclusive-NOR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

224
224
224
226
226
227
227
228

TABLE OF CONTENTS (continued)

SECTION 2 (continued)
Gate and Delay Elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
Inverters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
Latches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
D-Type Latches (3-state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
Other Latches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231
Little Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NAND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NOR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Exclusive-OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D-Type Flip-Flops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Decoders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inverters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Noninverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Multiplexers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Specialty Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Standard Bus Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

231
231
232
232
232
232
233
233
233
234
234
234
235
235

Memory Drivers and Transceivers (HSTL, SSTL, SSTU, and SSTV/SSTVF)) . . . . . . . . . . . . . . . . . . . . . . . . 235
Buffers, Drivers, and Latches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
Specialty Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Adders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Arithmetic Logic Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bus-Termination Arrays and Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Comparators (identity) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Comparators (magnitude) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Phase-Locked Loops (PLLs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Drivers/Multipliers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ECL/TTL Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Frequency Dividers/Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I2C Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Little Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Monostable Multivibrators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parity Generators and Checkers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Translation Voltage Clamps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage-Level Shifters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

237
237
237
237
238
238
238
238
239
239
239
239
240
240
240
241
241

ix

SECTION 2 (continued)
Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 241
Parity Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 241
Registered Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242
Standard Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243
Universal Bus Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Universal Bus Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Universal Bus Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Universal Bus Exchangers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

247
247
248
248

SECTION 3 FUNCTIONAL CROSS-REFERENCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

SECTION 4 DEVICE SELECTION GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

ABT Advanced BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
ABTE/ETL Advanced BiCMOS Technology/Enhanced Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . 413
AC/ACT Advanced CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415
AHC/AHCT Advanced High-Speed CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 423
ALB Advanced Low-Voltage BiCMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 429
ALS Advanced Low-Power Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 431
ALVC Advanced Low-Voltage CMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 437
ALVT Advanced Low-Voltage BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 443
AS Advanced Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 445
AUC Advanced Ultra-Low-Voltage CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 449
AUP Advanced Ultra-Low-Power CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 455
AVC Advanced Very-Low-Voltage CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 457
BCT BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 461
64BCT 64-Series BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 461
BTA Bus-Termination Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 465
CB3Q 2.5-V/3.3-V Low-Voltage High-Bandwidth Bus-Switch Crossbar Technology Logic . . . . . . . . . . . . 467
CB3T 2.5-V/3.3-V Low-Voltage Translator Bus-Switch Crossbar Technology Logic . . . . . . . . . . . . . . . . . . 469
CBT Crossbar Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471
CBT-C 5-V Bus-Switch Crossbar Technology Logic With 2-V Undershoot Protection . . . . . . . . . . . . . . . 475
CBTLV Low-Voltage Crossbar Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 477
CD4000 CMOS B-Series Integrated Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 479
74F Fast Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 483
FB+/BTL FutureBus+/Backplane Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 487
FCT Fast CMOS TTL Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 489
FIFO First-In, First-Out Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 497
GTL Gunning Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4101
GTLP Gunning Transceiver Logic Plus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4103
HC/HCT High-Speed CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4109

TABLE OF CONTENTS (continued)

SECTION 4 (continued)
IEEE Std 1149.1 (JTAG) Boundary-Scan Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Little Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LS Low-Power Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LV Low-Voltage CMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LVC Low-Voltage CMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LVT Low-Voltage BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCA/PCF I2C Inter-Integrated Circuit Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
S Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SSTL Stub Series-Terminated Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
HSTL High-Speed Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SSTU Stub Series-Terminated Ultra-Low-Voltage Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SSTV/SSTVF Stub Series-Terminated Low-Voltage Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TTL Transistor-Transistor Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TVC Translation Voltage Clamp Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VME VERSAmodule Eurocard Bus Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4119
4123
4129
4135
4139
4147
4153
4155
4159
4159
4161
4165
4169
4173
4175

APPENDIX A PACKAGING AND MARKING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A1

Device Names and Package Designators for TI Logic Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5
Device Names and Package Designators
for Logic Products Formerly Offered by Cypress Semiconductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A6
Device Names and Package Designators for Logic Products Formerly Offered by Harris Semiconductor . A7
Logic Marking Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
Moisture Sensitivity by Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A16
Packaging Cross-Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A18
APPENDIX B LOGIC PURCHASING TOOL/ALTERNATE SOURCES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B1

xi

LOGIC OVERVIEW

PRODUCT INDEX

FUNCTIONAL CROSSREFERENCE

DEVICE SELECTION GUIDE

PACKAGING AND MARKING INFORMATION

LOGIC PURCHASING TOOL/ALTERNATE SOURCES

11

LOGIC OVERVIEW

12

SECTION 1
LOGIC OVERVIEW

CONTENTS
Welcome to the World of TI Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Product Life Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Family Specification Comparision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Family Performance Positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
CMOS Voltage Roadmap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
CMOS Voltage vs. Speed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Device Names and Package Designators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Logic Vendor Partnerships . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
IC Basics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Logic Feature List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Bus-Hold Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Series Damping Resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Partial Power Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Hot Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Live Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Mixed-Voltage Interfacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Dual-Supply Level Translators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
What Is Little Logic? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
TI Little Logic Portfolio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
NanoStar/NanoFree Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
AUC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
AUP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
ALVC Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
AVC Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
LVC Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
LV-A Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
LVT Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
ALVT Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Bus Switch Function Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
Bus Switch Key Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
Bus Switch Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Bus Switch New Families . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
TVC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
What Is GTL/GTLP? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
GTLP Is a Bidirectional Translator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
GTLP and VME Are Specifically Designed for High-Performance Multislot Parallel Backplanes . . . . . . . . . 143
GTLP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
SN74VMEH22501 UBT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
Logic Roadmap for High-Speed Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
DDR Register Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
Packaging Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
TI FIFO Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150

13

CONTENTS (continued)
TI FIFO Product and Technology Roadmap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TI FIFOs Optimize System Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IEEE 1149.1 (JTAG) Boundary-Scan Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current TI JTAG Product Offering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical System-Level Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical JTAG Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

14

151
152
153
154
155
157

Welcome to the World of TI Logic

Specialty
GTL

GTLP

3.3 V Logic

VME
SSTV

LV

AHC
ALVT
AC

AUP

AC/ACT
F

AVC

ALVC
LV-A

TTL

CBT

TVC

FCT

CD4000

LV-A

ETL

ALB
LVT

5+ V Logic

BTL

SSTL

HSTL

Cypress now TI

Harris now TI

S
AHC
AHCT

HC/HCT
AS

LS

ABT

BCT

ALS

CBTLV

LVC

2.5 V Logic
LV

1.8 V Logic
LVC

AUC
AUP

LVC
LV-A

AVC

AVC

ALVC

LV

1.5 V Logic
AUP

AUC

1.2 V Logic
0.8 V Logic
AUP

15

AUC

AUP
AUC

ALVC

AUC
CBTLV

ALVT
AUP

16

Product Life Cycle

ABT FCT
AHC/AHCT
LVT-A
CBT
ALVT
AVC
GTLP
AUC

LV
LVC
ALVC

AC/ACT
HC/HCT
BCT
ALS
CD4000

Bipolar
CMOS
BiCMOS

F
AS

CBTLV
TVC

LS
S

Little Logic
SSTV

TTL

SSTU
VME
CBT-C
CB3T/Q
AUP
Introduction

Growth

Maturity

Decline

Obsolescence

TI remains committed to be the last supplier in the older families.

Investment levels for new products are at an all-time high.

Family Specification Comparison

17

18

Family Specification Comparison

Family Specification Comparison

19

16
110

Family Performance Positioning

100

GTLP
5V
3.3 V

IOL Drive (mA)

2.5 V
64

ALVT

LVT
ABT

BCT
74F

GTLP
FCT
ALVC LVC

24
ALB

12
8

AVC
AUC

CBT
0 CBTLV & CB3x 5

1.8 V
1.2 V
0.8 V

VME
AC/ACT

ALS

ABT
AC/T
AHC/T
ALB
ALVC
ALVT
AVC
AUC
BCT
CBT
CBTLV, CB3x
74F
FCT
GTLP
HC/T
LV
LVC
LVT
VME

Advanced BiCMOS Technology

Advanced CMOS
Advanced High Speed CMOS
Advanced LV BiCMOS
Advanced Low Voltage CMOS
Adv LV BiCMOS Technology
Advanced Very-LV CMOS
Advanced Ultra-LV CMOS
BiCMOS Technology
Cross Bar Technology
CBT Low Voltage Technology
74F Bipolar Technology
Fast CMOS Technology
Gunning Transceiver Logic Plus
High Speed CMOS
Low Voltage HCMOS
Low Voltage CMOS
Low Voltage BiCMOS Technology
VMEbus Technology

TTL

LS

AC
AHC/AHCT

AUP

LV
10

HC/HCT

AHC

Speed - max tpd (ns)

15

20

CMOS Voltage Roadmap

18

Voltage

15

Voltage
Tolerance

Optimized
Voltage

Data Sheet
Limits

4
3

Functional

2
1
CD4K HC
111

HCT
AHCT
ACT

AHC

AC

LV-A

LVC

ALVC

AVC AUP AUC

16
112

CMOS Voltage vs. Speed

HC

Typical Propagation Delay Time (ns)

25

20

15

AHC
AC
LV-A

10

LVC

AUC

ALVC
AVC

0
0

VCC (V)

Comparison of 16245 functions with 500 ohm/30pF load. (AUC not yet tested)

Device Names and Package Designators

113

Family
ABT/E
AC/ACT
AHC/AHCT
ALB
ALS
ALVC
ALVT
AS
AUC
AUP
AVC
BCT
CBT/LV/CB3x
CD4000
F
FB
FCT
GTL
GTLP
HC/HCT
HSTL
LS
LV-A
LVC
LVT
S
SSTL
SSTU
SSTV/SSTVF
TTL
TVC
VME

SN74 ABT H 16 2 244 A DGG R

Standard Prefix
Military (54)
Commercial (74)

Special Feature
Blank = no special features
A, B, C = Configurable VCC
D = Level Shifting Diode
H = Bus Hold
K = Undershoot Clamp
R = Damping Resistor on
Inputs/Outputs
S = Schottky Clamping Diodes
Z = Power Up 3 State

Bit Width
Blank = Gates, MSI, and Octals
1G = Single Gate
2G = Dual Gate
3G = Triple Gate
8 = Octal IEEE 1149 (JTAG)
16 = Widebus (16,18, and 20)
18 = Widebus IEEE 1149.1 (JTAG)
32 = Widebus+ (32 and 36 bit)

Tape & Reel

R = 3000
T = 250

Function
00
174
244

Options
Blank = No Options
2 = Series Damping
Resistor on Outputs
3 = Level Shifter
4 = Level Shifter
25 = 25 Line Driver

Package Type
D,DW = SOIC
DB,DL = SSOP
DBB,DGV = TVSOP
DCT,DCU = TSSOP
DBV, DCK = SOT
DGG,PW = TSSOP
FK = LCCC
FN = PLCC
GB = CPGA
GKE,GKF = LFBGA
GQL = VFBGA
HFP,HS,HT,HV = CQFP
J,JT = CDIP
N,NP,NT = PDIP
PAG,PAH,PCA,PCB,PM,
PN, PZ = TQFP
PH,PQ,RC = QFP
RGY,RGQ = QFN
W,WA,WD = CFP
YEP, YZP = DSBGA

Device Revision
Blank = No Revision
Letter Designator A-Z

DSBGA is the JEDEC reference for wafer chip scale package (WCSP).

114

Logic Vendor Partnerships

Performance
Range
5V

(Renesas)

TI

Philips Hitachi

high

ABT

ABT

low

AHC

AHC

3V

ALVT
ALVC
LVT
LVC

ALVC
LVT
LVC

LV-A

LV

LV
-A
LV

high

AVC

AVC

high

AUC

AUC

low

2.5 V
1.8 V

FSC

ABT

ABT-C

VHC

VHC

VHC

ALVC

VCX

VCX

LVC

LCX

VCX
LVT
LCX

LVQ

LVQ

LVQ

LVX

LVX

On

CBT-LV

ALVT
ALVC
LVT
LVC

medium

Toshiba

ABT

CBT-LV
high

IDT

AUC

LCX

IC Basics
Comparison of Switching Standards
5V

VCC

5V
4.44

VCC

Is VOH higher than VIH?

Is VOL less than VIL?

VOH
D

3.5

2.4
2.0
1.5

VOH

VIH

Vt

VIH
Vt

0.8

VIL

0.4

VOL

2.5

GND

115

5-V TTL

1.5

0.5
0

VIL

VOL
GND

5-V CMOS

Standard TTL: ABT,

Rail-to-Rail 5 V
AHCT, HCT, ACT, Bipolar HC, AHC, AC, LV-A

3.3 V

VCC

2.4

VOH

2.0

VIH

1.5

Vt

0.8

VIL

0.4

VOL

GND

5TTL

5CMOS

3LVTTL

2.5CMOS 1.8CMOS
1.8CMOS

5TTL

Yes

No

Yes *

Yes*
Yes*

Yes*

5 CMOS

Yes

Yes

Yes*

Yes*

Yes*

3 LVTTL

Yes

No

Yes

Yes*
Yes*

Yes*

2.5 CMOS

Yes

No

Yes

Yes

Yes*

1.8 CMOS

No

No

No

Yes

No

* Requires VIH Tolerance

2.5 V

VCC

2.3

VOH

1.7

VIH

1.2

Vt

0.7

VIL

0.2
0

VOL
GND

3.3-V LVTTL

2.5-V CMOS

LVT, LVC, ALVC

AUP, LV-A, ALVT

AUC, AUP, AVC,

ALVC, LVC, ALVT

1.8 V

VCC

1.2
1.17
0.9
0.7

VOH
VIH
Vt

0.45

VOL

VIL

GND

1.8-V CMOS
AUC, AUP, AVC,
ALVC, LVC

116

)
)

Logic Feature List

Bus Hold ABT, ALVC, ALVT, AVC, AUC, FCT, GTL, GTLP, LVC, LVT, VME

Bus-hold circuitry in selected logic families helps solve the problem of floating inputs and eliminates the need
for pull-up or pull-down resistors by holding the last known state of the input. See II(HOLD) or IBHL, IBHH, IBHLO,
and IBHHO on data sheet.
Series Damping Resistors ABT, ALVC, ALVT, F, GTLP, LVC, LVT, VME

Series damping resistors limit signal overshoot and undershoot by providing better impedance matching and
line termination without the need for external resistors.
Partial Power Down (Level 1 Isolation - Ioff) ABT, ALVT, AVC, AUC, AUP, CBTLV, CBT-C, GTL, GTLP LV-A,
LVC, LVT, VME

IOFF circuitry prevents the device from being damaged during hot insertion. See IOFF specifications on data
sheet.
Hot Insertion (Level 2 Isolation Ioff and Power-up 3-state) ABT, ALVT, GTLP, LVCZ, LVT, VME

Power-up 3-state ensures valid output levels during power up and valid Z on the outputs during power down.
See IOZPU, IOZPD.
Live Insertion (Level 3 Isolation Ioff, Power-up 3-state, and BIAS VCC) GTLP, FB, CBT, CBTLV, VME

Precharges I/O capacitance, preventing glitching of active data.

Mixed-Voltage-Tolerant I/Os and Level Shifting AVC, ALVC, ALVT, AUC, AUP, GTL, GTLP, LV-A, LVC, LVT

Systems use mixed supply voltages and TLL or CMOS levels in many designs. Most advanced-logic families
allow mixed-signal interfacing and provide level-shifting functions for certain mixed-voltage applications.
JTAG ABT, ACT, BCT, LVT

(selected functions)

Bus-Hold Input
Holds the last known state of the input

Bus-Hold
Input Cell

avoids floating inputs

Ii(HOLD) or IBHL, and IBHH specifies min

Input
Inverter
Stage

holding current

Bus-hold current does NOT load down

the driving output significantly at valid

logic levels.

Eliminates the need for external

I/O Pin
Device Boundary
Bus-hold input cell
replaces pullup resistor

resistors on unused or floating

input/output pins

The H in the device name indicates

bus hold.

Negligible increase in systems power

consumption.

Families Providing Bus-Hold Options

ABT, ALVC, ALVT, AVC, AUC, FCT, GTL, GTLP, LVC, LVT, VME
117

 Improves signal integrity

VCC
25

Provides better impedance

Output Pin

118

Series Damping Resistors

matching and line termination
Eliminates the need for external
series resistors
Extra 2 or R in device name
indicates damping resistor option
- R: I/O pins (LVCHR16245)
- 2: Output pins (LVC162244)

Damping resistors
replace external series resistors

Families Providing Damping Resistor Options

ABT, ALVC, ALVT, F, GTLP, LVC, LVT, VME

Partial Power Down

Live Insertion, Level 1
System Function
Capability
VCC = 0 V

VCC = 5 V

Prevents unexpected
device behavior during
power up or power down
Prevents signals from
sourcing current through
parasitic diodes
Allows for power down of
partial circuits within a
system

bus

Ioff spec is required for

partial power down
operations

IOUT

When VCC = 0, IOUT = 0 for

VOUT > VCC.

Families Supporting Partial Power Down (Ioff )

ABT, ALVT, AVC, AUC, AUP, CBTLV, CBT-C, GTL, GTLP LV-A, LVC, LVT, VME
119

120

Hot Insertion
Live Insertion, Level 2

System Function/Capability Prevents unwanted

turn-on of output
before VCC trip point

Prevents bus to be
loaded down upon
power up of device
VCC

VCC

Allows for hot

insertion
Ioff and PU3S specs
are required for Hot
Insertion

Example
Example
Circuit
Circuit Implementation
Implementation
PU3S
PU3S Circuit
Circuit
Supply
Voltage
VCC
Supply
trip point

Output
Off (Z)

On

Families Supporting Hot Insertion (Ioff and Power-up 3-state)

ABT, ALVT, GTLP, LVCZ, LVT, VME

Off (Z)

Live Insertion
Live Insertion, Level 3
System Function/Capability Prevents unwanted
glitches at the I/O
Allows for live insertion

Circuit
Circuit Implementation
Implementation
Pre-Charge
Pre-Charge Circuit
Circuit
with pre-charge
with out pre-charge

VCC

VCC

Ioff, PU3S, and BIAS VCC

required for Live Insertion
Staggered pins required
pre-charge functionality

VCC }

BIAS VCC
{

Pre-Charge
Circuit

I/O |
Output
Stage

GND

Families Supporting Live Insertion

(Ioff, Power-up 3-state, and BIAS VCC)
GTLP, FB, CBT, CBTLV, VME

} |{
Card Connector
Socket Pin
vcc

121

GND
I/O BIAS VCC

122

Mixed-Voltage Interfacing

Functions Available
05 - S, LS, ALS, AC, HC,
AHC, LV, LVC
06 - TTL, LS, LV, LVC,
LVC1G/3G, AUC1G
07 - TTL, LS, LV, LVC,
LVC1G/3G, AUC1G
NOTE: Over voltage tolerance is
required to support UP translation.

Required Input level

depends on VCC1

Open-Drain Outputs 05/06/07 Functions

Also Possible
Wired-Function Technique

VCC1

VCC2
RPULLUP

07

T1
07

RPULLUP

Vcc

Output level
depends on VCC2
Phantom links on output side
can reduce component count.

Dual-Supply Level Translators

Features:
Allow bi-directional voltage translation between different voltage
nodes from 1.4-V to 3.6-V and 1.65-V to 5.5-V.
Low power mode if either VCC is turned off, then both ports are in
the high-impedance mode, no power sequencing concerns (AVC
devices and LVC 1- and 2-bit devices only)
Bus-hold circuitry available (AVC devices only)
Ioff feature allows partial power-down operation (AVC devices and
LVC 1- and 2-bit devices only)
1-through 32 bit options available

TI's Dual-Supply Level-Translation Portfolio

Device

Bit Width

SN74ALVC164245
2

SN74AVC8T245

SN74AVC20T2452

VCCA (V)

VCCB (V) Smallest Package

16

2.3 to 3.6

1.4 to 3.6

1.4 to 3.6 24-pin QFN

3 to 5.5

56-ball VFBGA

20

1.4 to 3.6

1.4 to 3.6 56-ball VFBGA

16

1.4 to 3.6

1.4 to 3.6 56-ball VFBGA

32

1.4 to 3.6

1.4 to 3.6 96-ball LFBGA

SN74AVCA164245

SN74AVCB1642451
SN74AVCB3242451
2

1.65 to 5.5 1.65 to 5.5 6-pin NanoStar/NanoFree

SN74LVC2T45

1.65 to 5.5 1.65 to 5.5 8-pin NanoStar

SN74LVC4245A

4.5 to 5.5

2.7 to 3.3 24-pin TSSOP

SN74LVCC4245A

4.5 to 5.5

2.7 to 3.3 24-pin TSSOP

SN74LVCC3245A

2.3 to 3.3

2.7 to 3.3 24-pin TSSOP

SN74LVC1T45

123

Bus-hold option available

In development, samples available now ; product preview datasheet at w w w .ti.com /trans

124

What is Little Logic?

Single Gate/Dual Gate/Triple Gate
Principle

Naming
SN74 LVC 1G xx YEP R

Tape & Reel

R = 3000 piece
T = 250 piece
Package Type
YEP = NanoStar (230)
YZP = NanoFree (230)
DCK = SC-70
DBV = SOT-23
DCU = US-8
DCT = SM-8
Logic Function
xx
Gate Count
1G - Single Gate
2G - Dual Gate
3G - Triple Gate
Product Family
AHC/T, AUC, AUP,
CBT, LVC
Standard Prefix

TI Little Logic Portfolio

Provides wide range of operating voltages (0.8V to 5.5V)
Worlds first 1.8V optimized logic family (AUC)
Worlds lowest power logic family (AUP)
Available in NanoStar and NanoFree (YEP/YZP)
Operating Optimized Prop
Family Voltage
Voltage
Delaytyp

Output
Drive

Vi
Tolerant

AUC
AUP
LVC
AHC

0.8-2.7V
0.8-3.6V
1.65-5.5V
2.0-5.5V

1.8V
3.3V
3.3V
5.0V

2.0ns
5.4ns
3.5ns
5.0ns

8mA
4mA
24mA
8mA

3.6V
3.6V
5.5V
5.5V

Yes
Yes
Yes
No

CBT
CBTD
CBTLV

4.5-5.5V
4.5-5.5V
2.3-3.6V

5.0V
5.0V
3.3V

0.25ns
0.25ns
0.25ns

n/a
n/a
n/a

5.5V
5.5V
3.6V

n/a
n/a
Yes

Ioff

125

126

NanoStar/NanoFree Package
Offered in SnPb (NanoStar) and Pb-free (NanoFree)
Available in Large solder bump size (230 diameter)
Bump locations facilitate device probing and rework
0.5-mm height meets aggressive LCD design requirements
70% smaller than industry standard SC-70 (DCK)
72% smaller than industry standard US-8 (DCU)
Improved thermal and electrical characteristics
Targeted for space constrained, portable applications: Cellular,

DVD/CD ROMs, DVC, Digital Watch, DSC, MD/MP3/CD players,

notebook computers, PC cards and PDAs

Package Designators
YEP = SnPb Large Bump
YZP = Pb-Free Large Bump

AUC
The Worlds First 1.8-V Logic
Features

Advanced Packaging

1.8-V Optimized Performance

VCC Specified at 2.5 V, 1.8 V, 1.2 V
0.8 V Typical
Balanced Drive
3.6-V I/O Tolerance
Bus Hold Option
IOFF Spec for Partial Power Down
ESD Protection
Low Noise
Alternate -Source Agreements

NanoStar - YEP
NanoFree - YZP
SOT 23 - DBV (Microgate)
SC-70 - DCK (PicoGate)
TSSOP - PW & DGG
TVSOP - DGV
LFBGA - GKE, GKF
VFBGA - ZKE, ZKF
VFBGA - GQL
VFBGA - ZQL
QFN - RGY

Device

VCC

Drive

TPD(MAX)

SN74AUC1G00

1.8 V

8/8 mA

2.5 ns

SN74AUC16244

1.8 V

8/8 mA

2.0 ns

127

Alternate Source: Philips, IDT

128

AUP

NEW FAMILY

The Worlds Lowest Power Logic

Features

Advanced Packaging

Very low power consumption high battery life

NanoStar - YEP

Ideal for portable applications

Excellent signal integrity
Input hysteresis (250mV typ at 3.3V) allows for
slow input transition
Operating VCC: 0.8V-3.6V (optimized at 3.3V)
Best in class for speed-power optimization
Balanced Drive
3.6-V I/O tolerant
IOFF Spec for Partial Power Down
ESD Protection

Device
SN74AUP1G08

VCC

NanoFree - YZP
SOT 23 - DBV (Microgate)
SC-70 - DCK (PicoGate)

Drive

TPD(MAX)

3.3 V

4.0/4.0 mA (static)

4.3 ns

1.8 V

1.9/1.9 mA (static)

8.2 ns

1.2 V

1.1/1.1 mA (static)

15.6 ns

ALVC Family
Features

Advanced Packaging

VCC Specified at 3.3 V, 2.5 V, and 1.8 V

Balanced Drive
Bus-Hold Option
Drive Capability 6/12 mA at 2.5 V
Low Noise
Damping Resistor Options
ESD Protection

SOIC - D and DW
SSOP - DB and DL
TSSOP - PW and DGG
TVSOP - DGV
LFBGA - GKE, GKF
LFBGA - ZKE, ZKF
VFBGA - GQL
VFBGA ZQL

Device

VCC

Drive

TPD(MAX)

SN74ALVCH244

3.3 V

24/24 mA

2.8 ns

SN74ALVCH16244

3.3 V

24/24 mA

3.0 ns

Literature
ALVC Low-Voltage CMOS Logic Data Book
Lit # SCED006

Alternate Source
ALVC: Philips, Hitachi, IDT
VCX: Fairchild, ON, Toshiba

129

130

AVC Family
Advanced Packaging
SOIC - DW
TSSOP - PW, DGG
TVSOP - DGV
LFBGA - GKE, GKF
LFBGA - ZKE, ZKF
VFBGA - GQL
VFBGA - ZQL

Features
VCC Specified at 3.3 V, 2.5 V, 1.8
3.3-V I/O Tolerance
Sub-2.0-ns max Tpd at 2.5 V
Bus Hold Option
IOFF for Partial Power Down
Dynamic Output Control (DOCTM)
Circuit

Device
SN74AVC16244

VCC

Drive

TPD(MAX)

3.3 V

12/12 mA (static)

1.7 ns

2.5 V

8/8 mA (static)

1.9 ns

1.8 V

4/4 mA (static)

3.2 ns
Alternate Source: Philips

DOC is a trademark of Texas Instruments.

LVC Family
Features
VCC Specified at 3.3 V, 2.5 V, and 1.8 V
Balanced Drive
5-V I/O Tolerance
Bus-Hold Option
Series Damping Resistor Option
IOFF Spec for Partial Power Down
ESD Protection
LVCZ has Power-Up 3-State for Hot Insertion

NEW

Advanced Packaging
NanoStar - YEP
NanoFree - YZP
SOT 23 - DBV (Microgate)
SC-70 - DCK (PicoGate)
SOIC - D and DW
SSOP - DB and DL
TSSOP - PW and DGG
TVSOP - DGV
LFBGA - GKE, GKF
LFBGA - ZKE, ZKF
VFBGA - GQL
VFBGA ZQL
QFN - RGY

Device

VCC

Drive

SN74LVCH244

3.3 V

24/24 mA

5.9 ns

SN74LVCH16244

3.3 V

24/24 mA

4.1 ns

131

Literature
LVC Low-Voltage CMOS Logic Data Book
LVC Designers Guide Application Report

Lit # SCBD152
Lit # SDZAE16

TPD(MAX)

Alternate Source
LVC: Philips, Hitachi, IDT
LCX: Fairchild, Motorola, Toshiba

132

LV-A Family
Features

Advanced Packaging

VCC Specified at 5.0 V, 3.3 V, 2.5 V

5-V I/O Tolerance
Balanced Drive
IOFF Spec for Partial Power Down
ESD Protection
Low Noise

SOIC - D, DW
SOP - NS
SSOP - DB
TSSOP - PW, DGG
TVSOP - DGV
QFN - RGY, RGQ

Device
SN74LV244A

NEW

VCC

Drive

TPD(MAX)

5.0 V

16/16 mA

6.5 ns

3.3 V

8/8 mA

Literature
LV Low-Voltage CMOS Logic Data Book
Lit # SCBD152

10.0 ns

Alternate Source
LV: Philips, Hitachi
LVQ: Fairchild, ON, Toshiba
LVX: Fairchild, ON

LVT Family
Features
VCC Specified at 3.3 V
High-Drive Output up to 64 mA
5-V I/O Tolerance
Bus Hold Option
Partial Power Down (IOFF)
Power - Up 3-State (IOZPU ,IOZPD)
Hot Insertion (IOFF and PU3S)
Low Noise
Damping Resistor Options

Device

Advanced Packaging
SOIC - DW
SSOP - DB and DL
TSSOP - PW and DGG
TVSOP - DGV
LFBGA - GKE and GKF
LFBGA - ZKE and ZKF
VFBGA - GQL
VFBGA - ZQL

VCC

Drive

TPD(MAX)

SN74LVTH244

3.3 V

32/64 mA

3.5 ns

SN74LVTH16244

3.3 V

32/64 mA

3.2 ns

133

Literature

Alternate Source

LVT Low-Voltage Technology Data Book

Lit # SCBD154
LVT-to-LVTH Conversion Application Report
On the Internet

LVT: Philips, Hitachi,

Fairchild*, ON*
* Similar Device, No Second-Source Agreement

134

ALVT Family
Features

Advanced Packaging

VCC Specified at 3.3 V and 2.5 V

High-Drive Output up to 64 mA
5-V I/O Tolerance
Power-Up 3-State (IOZPU ,IOZPD)
Partial Power Down (IOFF)
Hot Insertion (IOFF and PU3S)
Bus Hold

SSOP - DL
TSSOP - DGG
TVSOP - DGV
LFBGA - GKE and GKF
LFBGA - GKE and GKF
VFBGA - GQL
VFBGA - ZQL

Device
SN74ALVTH16244

VCC

Drive

TPD(MAX)

3.3 V

32/64 mA

2.4 ns

2.5 V

8/24 mA

3.0 ns

Literature
ALVT Low-Voltage Technology Data Book
Lit # SCED003

Second Source
ALVT: Philips

Bus Switch
Function Description
What are Bus Switches?
Simple FET switches that can quickly turn
ON / OFF the connection to a line or bus

Bus Switch Circuit Diagram

A

Provide industry standard functions and

pinouts (i.e. 244, 245) in a full range of
bit widths (from 32-bit Widebus to 1-bit
Little Logic)
Offer extremely low power consumption
(A range), ideal for portable systems
High performance replacements for
standard Logic devices when signal
buffering (current drive) is not required

Source
Gate

OE

Drain

N-Channel
Field Effect
Transistor
(NFET)

135

136

Bus Switch
Key Characteristics
When ON, a Bus Switch Provides

Bus Switch Circuit Diagram

Switch ON

Bidirectional Signal Passing

Near Zero Propagation Delay (0.25ns) for
maximum system performance
Very Low Resistance (Ron about 5-10 Ohms)

Very Low Capacitance (Cio about 8-12pF)

Source
Gate

Fast Data Throughput

(supports signal frequencies up to 533MHz)
No Drive Current (pass-through current only)

When OFF, the Bus Switch Provides

Drain

N-Channel
Field Effect
Transistor
(NFET)

OE

Excellent Isolation with very high Resistance

(Ron = 100s of MOhms)
Ideal for Hot-Plug Applications
Very Low Capacitance (Cio about 3-5pF)
minimizes capacitive loading and signal distortion

Switch OFF

Bus Switch
Architecture
CBT Architecture
NMOS switch uses NFET
Supports 5V operation (Vcc = 4V 5.5V)
Switch ON when positive signal applied at gate (OE low)
Switch OFF when low signal applied at gate (OE high)
Bidirectional operation (Source & Drain interchangeable)
CBTD = NMOS switch configured as level shifter with Level Shifting Diode
NMOS Switch Circuit Diagram

NMOS Switch VIN/VOUT Graph

VOUT (V)

Source
Gate

B
Drain
N-Channel
Field Effect
Transistor
(NFET)

CBT
CBTD

4V
3V

OE
137

VCC - 1V

Vin (V)

138

Bus Switch
Architecture
CBTLV Architecture
CMOS Switch consisting of an NFET and PFET in parallel
Supports 3.3V / 2.5V operation (Vcc = 2.3V 3.6V)
Switch ON when positive signal applied at NFET gate, and low signal applied
at the PFET gate (OE low)
Switch OFF when low signal applied at NFET gate, and positive signal applied
at PFET gate (OE high)
Bidirectional operation (source and drain interchangeable)
Offers rail-to-rail signal transmission (no voltage clamping)
CMOS Switch Circuit Diagram

CMOS Switch VIN/VOUT Graph

VOUT (V)

OE

P-Channel Field
Effect Transistor
(PFET)
B
N-Channel Field
Effect Transistor
(NFET)

N-Channel

P-Channel
VCC

Vin (V)

Bus Switch
New Families
CB3T
3.3V/2.5V Bus Switch with 5V Tolerant Level Shifter
Supports Mixed-Mode Signal Operation On All Ports
5V Input to 3.3V Output Level Shift with 3.3V Vcc
5V and 3.3V Input to 2.5V Output Level Shift with 2.5V Vcc
Low Icc Ideal for Notebooks, PDAs and Other Portable Products
Ioff on A and B Ports for Partial-Power-Down Operation

CB3Q

139

3.3V/2.5V Bus Switch with Charge Pump Technology

Low and Flat Ron Characteristics Over Operating Range (4 Typical)
Supports Rail-to-Rail Switching on Data I/O Ports
0V to 5V Switching with 3.3V Vcc
0V to 3.3V Switching with 2.5V Vcc
Ioff on A and B Ports for Partial-Power-Down Operation
Equivalent to the IDTQS3VH Product Family

140

TVC
Translation Voltage Clamp

Overshoot protection
Voltage translator or a voltage clamp
Abs 7 to -0.5V

Device
Bit
TVC3306
2
TVC3010
10
TVC16222A 22

What is GTL/GTLP?
VT

Open drain n-channel CMOS outputs.

25

The pull-up resistor pulls the signal high

and the device pulls the signal low
Receiver stage is a differential input with V
V
external VREF. VREF is derived from a
simple R/2R voltage divider of the
R
RCVR
termination voltage, V-TT
V
2R
GTLP enjoys increased noise margin
V V
1.5V
V V
1.2V
1.05 V
over GTL
0.85 V
1.00
V V
0.80
V
V
GTLP edge rates have been optimized
0.95 V
0.75 V
for distributed loads
0.55
V
0.40 V
The reduced voltage swing reduces
0
GND
0
GND
GTL+/GTLP
power consumption and EMI
GTL
TT

IN

REF

OH,

OH,

IH

IH

t,

IL

OL

TT

t,

REF

TT

IL

OL

REF

141

142

GTLP Is a Bidirectional Translator

CARD SIDE
3.3 V

BACKPLANE SIDE

VCC

2.4

VOH

2.0

VIH

1.5

Vt

OEC Improved
Output Edge Control

0.8

VIL

Live Insertion

0.4

VOL

Reduced EMI

GND

Edge Rate Control

(ERC)

LVTTL
A Port and Control Pins
3.3-V VCC
5 V Tolerant
Drive +/-24 mA
Bus-Hold Option
Flow-Through Pinout

TI-OPCTM Overshoot
Protection Circuitry

1.5 V

2R

GTLP
B Port
1.5V

VIN

VOH & VTT

1.5 V
1.05 VIH
Vt & VREF
1.00
0.95 VIL
VOL
0.55

25
RCVR

VREF

Differential Input

Sink 50 mA or 100 mA

GTLP and VME Are Specifically Designed for

High-Performance Multislot Parallel Backplanes
Mass Storage

Industrial Controls

Bus
Transceiver

ISDN Remote Access

Aerospace

ASIC

Transportation

Internet Routers

Medical

ATM Switches

Instrumentation

Wireless Base Stations

Flight Equipment

Backplane Trace
Connector

GTLP

Systems

Termination

Bus Transceiver

VME

Open-drain technology

Push-pull output structure

Allows high frequencies (up to 100-MHz

clock)

Transmits data at 40 Mbit/s on legacy

termination topologies

Standard pinouts allow ease of migration Backward compatible to existing VME

backplane
from standard logic
143

Improved signal integrity over standard

logic

Reduced input threshold for greater

noise immunity

144

GTLP
Distributed-Load Devices
Features

CMOS
3.3-V VCC 5 V Tolerant
Ioff, PU3S, and BIAS VCC
Slow Edge Rates ERC
A Port
+/-24 mA SDR +/-12 mA
Bus-Hold Option (on Die)
B Port
VTT 1.2 V to 2.1 V (BTL)
100 mA (22- Effective
Characteristic Impedance)
TI-OPC
Low CIO

Benefits
9 Low Power Consumption
9 Mixed Supply Capability
9 Supports Live Insertion
9 Reduced EMI
9 A Port

Standard CMOS Output

9 No Need to Use Pullup/Pulldown
9 B Port
9 Can Use GTLP in BTL Applications
9 High Drive for Heavily Loaded
Systems
9 Improved Signal Integrity
9 Helps Live Insertion
9

SN74VMEH22501 UBT
The VME Compatible Device for Low Voltage
Environments
Benefits:
Extends life of VME characteristic bus
Supports 2eVME and 2eSST protocols
(VITA1.5)
Increased noise immunity
Supports transparent, latched or clocked
mode
5-V tolerance at both ports
Full live insertion capability with pre-charge
Bus-hold and series resistors on A-Port
Up to 320 MBps on standard VME backplane
and up to 1 GBps on VME320 (star topology)

VME

LVTTL

Vcc

VOH
VCC/2 +50mV
VCC/2 -50mV

VIH
VIL
VOL

Characteristics:

145

VOH
VIH

Tighter input threshold (VCC/2 50 mV)

B-Port
A-Port
-48/64 mA drive capability
Huge AC pull-up/down drive capability to drive backplanes (slow edge rates)
BIAS-VCC used to control pre-charge during live-insertion

VIL
VOL

146

Logic Roadmap for

High-Speed Memory Interface
4.3G
Product Status
Released Device
Under Development

II
RD
D

Bandwidth (GB/S)

3.2G
2.7G

2.1G

RD
D

1.6G
1.1G
0.8G

SSTU32864
SSTU32864C
SSTU32866
SSTU32868

I
RD
D

R
SD

ALVCF162834
ALVCF162835
_____________________

CDCF2509
CDCF2510
1999

2000

SSTVF16857
SSTVF16859
SSTVF32852
SSTV16857
SSTV16859

_____________________

CDCU877

_____________________

SSTV16857
SSTV16859
SSTV32852
SSTV32867
SSTV32877

CDCV857B
CDCVF857

_____________________

CDCV857
CDCV857A

2001

2002
Year

2003

2004

DDR Register Solutions

DDR-I

DDR-II

PC1600/2100

PC2700

PC3200

PC2-3200

PC2-4300

DDR200/266

DDR333

DDR400

DDR2-400

DDR2-533

1.2"

1.2"

1.2"

1.2"

1.7"

1.2"

TSOP DRAM TSOP DRAM TSOP DRAM

2x

2x

1 Rank of x8

2x

2x

2x

2x

2x

SSTV16857 TSSOP SSTV16857 TSSOP SSTVF16857 TSSOP SSTV16859 TSSOP SSTVF16859 QFN

2x

2 Rank of x4

2x

SSTV16857 TSSOP SSTV16857 TSSOP SSTVF16857 TSSOP SSTV16857 TSSOP SSTVF16859 QFN

2x

2 Rank of x8
1 Rank of x4

2x

BGA DRAM BGA DRAM BGA DRAM

SSTV16859 TSSOP

1x

1x

2x

SSTV32852 LFBGA SSTVF32852 LFBGA SSTVF16859 TSSOP

SSTV16859 QFN
SSTVF16859 QFN
SSTVF16859 QFN

147

2x

2x

2x

1x

1x

SSTU32864C LFBGA SSTU32864C LFBGA

SSTU32866 LFBGA SSTU32866 LFBGA

2x

2x

SSTU32864C LFBGA SSTU32864C LFBGA

SSTU32866 LFBGA SSTU32866 LFBGA

2x
No Solution

BGA DRAM

SSTU32868
176-ball VFBGA

2x
SSTU32868
176-ball VFBGA

148

Packaging Options

Packaging Options

149

150

TI FIFO Products
TI FIFOs Provide Cost Effective Pin-for-Pin Functional Equivalents to
IDTs 18-bit and 36-bit Synchronous FIFOs
TI DSP-Sync FIFOs Optimize DSP Performance in High Bandwidth
Applications by Eliminating Data Bottlenecks
TI DSP-Sync FIFOs provide a DSP Glueless Interface to Leading Edge
TI TMS320 DSPs
TI Technology Leadership Creates World Class FIFO Performance with
Industry's Fastest 3.3V FIFOs
High Bandwidth Applications Include:

- Wireless Base Stations

- Remote Access Servers (RAS)
- Digital Subscriber Line (DSL)
- Network Security Cameras
- Medical & Industrial Imaging
- Multi-Channel Telephony
- Gigabit-Ethernet Routers
- ATM Switches & SONET/ATM Multiplexers

TI FIFO
Product and Technology Roadmap
Performance (F Clock in MHz)

Configuration:
65Kx18 to 32Kx36
512x18 to 4Kx18

DSP-Sync FIFOs
SN74V2x3 SN74V36x0
(Now) & (2003)

512x36 to 2Kx36
64x18 to 2Kx36

DSP-Sync FIFOs
SN74V2x5
0.35 m
ALVC36xx
(Now)
0.6 m
(Now)
ALVC78xx 0.6 m
ACT36xx
ABT36xx
ACT78xx

0.8 m
1.0 m
1.0 m

(Now)
151

(Availability)

152

TI FIFOs Optimize System Performance

LOCAL

LOCAL

MEMORY

MEMORY
(Fast SRAM)

(Fast SRAM)
TI
FIFO

ANALOG
BACK END

ANALOG FRONT END

TI
FIFO

TMS320
DSP

GLOBAL
MEMORY
(Slower
Dual-Port
SRAM)

TI
FIFO

TMS320
DSP

ANALOG
BACK END

TI
FIFO

ANALOG FRONT END

IEEE 1149.1 (JTAG) Boundary-Scan Logic

BUS
INTERFACE

Generic IEEE 1149.1

functionality
Between each I/O pin and the
chip, there must be a boundary
scan cell (BSC).

(test clock)
(test mode select)
(test data input)
(test data output)

TDI
TMS
JTAG

TCK
TDO

LOGIC
NETWORK
OR
CLUSTER

STANDARD TI
JTAG DEVICE
ADDRESSABLE
SCAN-PORT
(SN74LVT8996)

BACKPLANE

STANDARD TI
JTAG DEVICE

BUS
INTERFACE

BUS
INTERFACE

STANDARD TI
JTAG DEVICE

The BSCs are controlled via

four test control pins:

153

The BSC allows capturing data

from and providing data to the chip
data path.

NONBOUNDARY
SCAN
DEVICE

BOUNDARY SCAN

All BSCs must be connected to

the serial scan path, which
functions like a shift register.

- TCK
- TMS
- TDI
- TDO

STANDARD TI
JTAG DEVICE

BUS
INTERFACE

STANDARD TI
JTAG DEVICE

STANDARD TI
JTAG DEVICE
TDI
TMS
TCK
TDO

SYSTEM LEVEL
EMBEDDED
TEST-BUS
CONTROLLER
(SN74LVT8980A)

154

Current TI JTAG Product Offering

Bus Interface

Octal
(8-bit)

Widebus
(18/20-bit)

5V

BCT

Scan Support

5V

ABT

ABT/
ABTH

3.3V

LVT

40+ commercially released devices

Scan Support
Functions
5V

3.3V

TBC

eTBC

ASP

ASP

SPL

LASP

eTBC = embedded Test Bus Controller

ASP = Addressable Scan Port
LASP = Linking Addressable Scan Port
SPL = Scan Path Linker

Typical System-Level Application

Active Backplane
Multi-Drop Architectures
eTBC converts parallel
microprocessor instructions into
serial JTAG commands through
TMS and TCK

eTBC addresses the correct

target scan chain via ASPs

ASP buffers/drives the JTAG

scan commands into IEEE 1149.1
compliant devices

155

156

Typical System-Level Application (Cont.)

1149.1
1149.1
1149.1
IEEE 1149.1
Compliant
Device
Chain

ASP(8996)

Host
Processor
or
Controller

OSC

eTBC
LVT8980A

1149.1

SPL(8997)

ASP(8996)

1149.1

1149.1

1149.1

LASP(8986)

1149.1

1149.1

LASP(8986)

To Other
Modules

IEEE 1149.1 Digital Bus

Cascading
Ability

Program/
Vector
Memory

1149.1

Typical JTAG Applications

Applications
Manufacturing Board Level Test
- Complex board assemblies (i.e. BGA packages)
Manufacturing System Level Test
- Fault Isolation rather than pass/fail
Embedded System Level Test
- Field testing or re-programming
In System Programming(ISP)
- Flash or PLD programming
Emulation
- eTBC (16-bit) used for DSP emulation/debug
157

LOGIC OVERVIEW

PRODUCT INDEX

FUNCTIONAL CROSSREFERENCE

DEVICE SELECTION GUIDE

PACKAGING AND MARKING INFORMATION

LOGIC PURCHASING TOOL/ALTERNATE SOURCES

21

PRODUCT INDEX

22

SECTION 2
PRODUCT INDEX

CONTENTS
Backplane Logic (GTL, GTLP, FB+/BTL, and ABTE/ETL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Drivers and Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Boundary-Scan IEEE Std 1149.1 (JTAG) Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Boundary-Scan (JTAG) Bus Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Boundary-Scan (JTAG) Support Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Inverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Noninverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Bus Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
Bus Exchange/Multiplexing Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
Standard Bus Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
Binary Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
Decade Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
Decoders, Encoders, and Multiplexers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Decoders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Multiplexers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Priority Encoders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

216
216
217
218

FIFOs (First-In, First-Out Memories) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219

Asynchronous FIFO Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
Synchronous FIFO Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
Flip-Flops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D-Type Flip-Flops (3-state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D-Type Flip-Flops (non 3-state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Other Flip-Flops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

221
221
223
223

Gates and Inverters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

AND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NAND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AND-OR-Invert Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NOR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Exclusive-OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Exclusive-NOR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate and Delay Elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inverters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

224
224
224
226
226
227
227
228
228
229

Latches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
D-Type Latches (3-state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
Other Latches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231

23

CONTENTS (continued)
Little Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NAND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NOR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Exclusive-OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D-Type Flip-Flops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Decoders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inverters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Noninverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Multiplexers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Specialty Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Standard Bus Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

231
231
232
232
232
232
233
233
233
234
234
234
235
235

Memory Drivers and Transceivers (HSTL, SSTL, SSTU, and SSTV/SSTVF)) . . . . . . . . . . . . . . . . . . . . . . . . 235
Buffers, Drivers, and Latches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236

24

Specialty Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Adders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Arithmetic Logic Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bus-Termination Arrays and Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Comparators (identity) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Comparators (magnitude) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Phase-Locked Loops (PLLs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Drivers/Multipliers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ECL/TTL Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Frequency Dividers/Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I2C Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Little Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Monostable Multivibrators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parity Generators and Checkers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Translation Voltage Clamps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage-Level Translators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

237
237
237
237
238
238
238
238
239
239
239
239
240
240
240
241
241

Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parity Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Registered Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Standard Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

241
241
242
243

Universal Bus Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Universal Bus Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Universal Bus Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Universal Bus Exchangers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

247
247
248
248

 Product available in technology indicated
Product available in reduced-noise advanced CMOS (11000 series)
New product planned in technology indicated
CP = center pin
OC = open collector
OD = open drain
3S = 3-state

BACKPLANE LOGIC (GTL, GTLP, FB+/BTL, AND ABTE/ETL)

Drivers and Transceivers
TECHNOLOGY
DESCRIPTION
1:6/1:2 GTLP-to-LVTTL Fanout Drivers
Dual 1-Bit
1 Bit LVTTL-to-GTLP
LVTTL to GTLP Adjustable-Edge-Rate
Adjustable Edge Rate Bus Transceivers with Split LVTTL Port,
Port Feedback Path,
Path and Selectable Polarity

TYPE

FB

GTL

GTLP

817

1395

21395

2-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Bus Transceivers with Selectable Polarity

1394

7-Bit TTL/BTL Transceivers (IEEE Std 1194.1)

2041

88-Bit
Bit LVTTL-to-GTLP
LVTTL to GTLP Adjustable
Adjustable-Edge-Rate
Edge Rate Registered Transceivers with Split LVTTL Port and Feedback Path

ABTE

VME

22033

2034

22034

8-Bit LVTTL-to-GTLP Bus Transceivers

306

8-Bit TTL/BTL Registered Transceivers (IEEE Std 1194.1)

2033

8-Bit TTL/BTL Transceivers (IEEE Std 1194.1)

2040

8-Bit Universal Bus Transceivers and Two 1-Bit Bus Transceivers with 3-State Outputs

22501

9-Bit TTL/BTL Address/Data Transceivers (IEEE Std 1194.1)

2031

11-Bit Incident Wave Switching Bus Transceivers with 3-State and Open-Collector Outputs

16246

16-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Bus Transceivers

1645

16 Bit LVTTL-to-GTL/GTL+ Universal Bus Transceivers with Live Insertion

1655

16 Bit LVTTL-to-GTLP Adjustable-Edge-Rate Universal Bus Transceivers

1655

16-Bit Incident Wave Switching Bus Transceivers with 3-State Outputs

16245

16-Bit LVTTL-to-GTLP Bus Transceivers

16945

17-Bit LVTTL-to-GTL/GTL+ Universal Bus Transceivers with Buffered Clock Outputs

16616

17-Bit LVTTL-to-GTLP Universal Bus Transceivers with Buffered Clock

16916

17-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Universal Bus Transceivers with Buffered Clock

1616

17-Bit TTL/BTL Universal Storage Transceivers with Buffered Clock Lines (IEEE Std 1194.1)

1651

17-Bit LVTTL/BTL Universal Storage Transceivers with Buffered Clock Lines (IEEE Std 1194.1)

1653

18-Bit TTL/BTL Universal Storage Transceivers (IEEE Std 1194.1)

1650

18-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Universal Bus Transceivers

1612

18-Bit LVTTL-to-GTL/GTL+ Universal Bus Transceivers

16612

25

PRODUCT INDEX

26

BACKPLANE LOGIC (GTL, GTLP, FB+/BTL, AND ABTE/ETL)

Drivers and Transceivers (continued)
TECHNOLOGY
DESCRIPTION

TYPE

ABTE

FB

GTL

16912

18 Bit LVTTL-to-GTL/GTL+
18-Bit
LVTTL to GTL/GTL Bus Transceivers

VME

16612
18 Bit LVTTL-to-GTLP
18-Bit
LVTTL to GTLP Universal Bus Transceivers

GTLP

16622

16923

18-Bit LVTTL-to-GTLP Bus Transceivers with Source-Synchronous Clock Outputs

16927

32-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Bus Transceivers

3245

32-Bit LVTTL-to-GTLP Bus Transceivers

32945

34-Bit LVTTL-to-GTLP Universal Bus Transceivers

32916

36-Bit LVTTL-to-GTLP Universal Bus Transceivers

32912

BOUNDARY-SCAN IEEE STD 1149.1 (JTAG) LOGIC

Boundary-Scan (JTAG) Bus Devices
TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

3S

ABT

BCT

8245

Scan-Test Devices with 18-Bit Bus Transceivers

18245

Scan-Test Devices with 18-Bit Inverting Bus Transceivers

18640

18646

182646

18652

182652

18502

182502

Scan-Test Devices with Octal Transceivers

Scan Test Devices with 18-Bit

Scan-Test
18 Bit Transceivers and Registers

Scan Test Devices with 18-Bit

Scan-Test
18 Bit Universal Bus Transceivers

3S

3S

18512

182512

Scan-Test
Scan
Test Devices with 20
20-Bit
Bit Universal Bus Transceivers

3S

LVT

18504

182504

18514

Boundary-Scan (JTAG) Bus Devices (continued)

TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

ABT

BCT

Scan Test Devices with Octal Buffers

Scan-Test

3S

8244
8646

8652

Scan Test Devices with Octal Bus Transceivers and Registers

Scan-Test

3S

Scan-Test Devices with Octal D-Type Latches

3S

8373

Scan-Test Devices with Octal D-Type Edge-Triggered Flip-Flops

3S

8374

Scan Test Devices with Octal Registered Bus Transceivers

Scan-Test

LVT

8240

8543

8952

Boundary-Scan (JTAG) Support Devices

TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

Embedded Test-Bus Controllers with 8-Bit Generic Host Interfaces

3S

8980

Test-Bus Controllers IEEE Std 1149.1 (JTAG) TAP Masters with 16-Bit Generic Host Interfaces

3S

8990

10-Bit Addressable Scan Ports Multidrop-Addressable IEEE Std 1149.1 (JTAG) TAP Transceivers

ABT

3S

8986

Scan-Path Linkers with 4-Bit Identification Buses Scan-Controlled IEEE Std 1149.1 (JTAG) TAP Concatenators

3S

8997

LVT

8996

10-Bit Linking Addressable IEEE Std 1149.1 (JTAG) TAP Transceivers

ACT

BUFFERS AND DRIVERS

Inverting Buffers and Drivers
DESCRIPTION
Single

TECHNOLOGY

TYPE

OD

1G06

3S

1G240

2G06

2G240

3G06

Dual

3S

Triple

OD

ABT

AC

ACT

AHC

AHCT

ALS

ALVC

ALVT

AS

AUC

BCT

64BCT

CD4K

FCT

GTLP

HC

HCT

LS

LV

LVC

LVT

TTL

27

PRODUCT INDEX

OUTPUT

28

BUFFERS AND DRIVERS

Inverting Buffers and Drivers (continued)
DESCRIPTION

OUTPUT

TYPE

OC

06

OD

06

OC

16

Hex

TECHNOLOGY
ABT

AC

ACT

AHC

AHCT

ALS

ALVC

ALVT

AS

AUC

BCT

64BCT

CD4K

OC

Hex
Buffers/Converters

4049

Hex Drivers

1004

Hex Schmitt
Triggers

40106

4502

LV

LVC

LVT

TTL

11240

1244
540

LS

1005

3S

HCT

368

240

HC

4009

3S

GTLP

Hex
Buffers/Converters

Octal

FCT

366
3S

Strobed Hex
Inverters/Buffers

OC

756

Octal with Input

Pullup Resistors

3S

746

Octal Buffers and

Line/MOS Drivers
with Series
Damping Resistors

3S

2240

10 Bit

3S

11-Bit Line/Memory
Drivers

3S

5401

12-Bit Line/Memory
Drivers

3S

5403

16240
16 Bit

3S

16540

828

29828

Inverting Buffers and Drivers (continued)

DESCRIPTION

OUTPUT

TYPE

TECHNOLOGY
ABT

AC

ACT

AHC

AHCT

ALS

ALVC

ALVT

AS

AUC

BCT

64BCT

CD4K

16 Bit with Series

Damping Resistors

3S

32-Bit

3S

32240

GTLP-to-LVTTL
1-to-6 Fanout
Drivers

3S

817

FCT

GTLP

HC

HCT

LS

LV

LVC

162240

LVT

TTL

TTL

162244

LVC

LVT

Noninverting Buffers and Drivers

DESCRIPTION

TYPE

OD

1G07

1G17

Single Bus Buffers

3S
Dual
OD

Dual Bus Buffers

3S
OD
Triple Bus Buffers

Quad Bus Buffers

Hex Buffers

3S

ABT

AC

ACT

AHC

AHCT

ALB

ALS

ALVC

ALVT

AS

AUC

AVC

BCT

64BCT

CD4K

FCT

HC

HCT

LS

LV

1G125

1G126

2G07

2G17

2G34

2G125

2G126

2G241

3G07

3G17

3G34

125

126

OC

1035

3S

4503

4010

4050

29

PRODUCT INDEX

Hex
Buffers/Converters

TECHNOLOGY

OUTPUT

210

BUFFERS AND DRIVERS

Noninverting Buffers and Drivers (continued)
DESCRIPTION

OUTPUT

TYPE

TECHNOLOGY
ABT

AC

ACT

AHC

AHCT

ALB

ALS

ALVC

ALVT

AS

AUC

AVC

BCT

64BCT

CD4K

FCT

365
3S
Hex Buffers/
Line Drivers

367

OC

07

OD

07

HC

HCT

LS

LV

LVC

LVT

17
OC

35

Hex Drivers

1034

Hex OR Gate
Line Drivers

128
241
3S

244

CP/3S
3S

760

Octal
with Series Damping
Resistors

3S

Octal Buffers

3S

465

Octal Buffers and

Line/MOS Drivers
with Series Damping
Resistors

3S

2241

Octal Line Drivers/

MOS Drivers

3S

2541

10 Bit

3S

10 Bit
with Series Damping
Resistors

3S

2827

11-Bit
Line/Memory Drivers

3S

5400

2244

25244

827

757
OC

11244
541

1244
O t l
Octal

TTL

29827

Noninverting Buffers and Drivers (continued)

DESCRIPTION
12-Bit
Line/Memory Drivers

16 Bit

TECHNOLOGY

OUTPUT

TYPE

3S

5402

16241

16244

16541

3S

ABT

AC

ACT

AHC

AHCT

ALB

ALS

ALVC

ALVT

3S

162244

18 Bit

3S

16825

18 Bit
with Series Damping
Resistors

3S

162825

20 Bit

3S

16827

20 Bit
with Series Damping
Resistors

3S

162827

20 Bit
with Balanced Drive
and Series Damping
Resistors

3S

162827

1-Bit to 2-Bit
Address Drivers

3S

162830

1 Bit to 4-Bit
1-Bit
4 Bit
Address Drivers

16344
3S

162344

1 to 4 Address
1-to-4
Registers/Drivers

16831
3S

16832

32 Bit

3S

32244

4054

AUC

AVC

BCT

64BCT

CD4K

FCT

HC

HCT

LS

LV

LVC

LVT

TTL

16 Bit
with Series Damping
Resistors

4-Segment Liquid
Crystal Display Drivers

AS

PRODUCT INDEX

211

212

BUS SWITCHES
Bus Exchange/Multiplexing Switches
TECHNOLOGY
DESCRIPTION

TYPE

CB3Q

CB3T

CBT

CBT-C

CBTLV

1-of-8 FET Multiplexers/Demultiplexers

3251

Dual 1-of-4 FET Multiplexers/Demultiplexers

3253

4-Bit 1-of-2 FET Multiplexers/Demultiplexers

3257

10-Bit FET Bus-Exchange Switches

3383

16292

162292

12 Bit 1-of-2
12-Bit
1 of 2 FET Multiplexers/Demultiplexers with Internal Pulldown Resistors

12-Bit 1-of-2 FET Multiplexers/Demultiplexers with Internal Pulldown Resistors and Series Damping Resistors

16292

12-Bit 1-of-3 FET Multiplexers/Demultiplexers

16214

Synchronous 16-Bit 1-of-2 FET Multiplexers/Demultiplexers

16232

16-Bit 1-of-2 FET Multiplexers/Demultiplexers

16233

16-Bit to 32-Bit FET Multiplexer/Demultiplexer Bus Switches

16390

18-Bit FET Bus-Exchange Switches

16209

16212
24 Bit FET Bus-Exchange
24-Bit
Bus Exchange Switches
24 Bit FET Bus-Exchange
24-Bit
Bus Exchange Switches with Schottky Diode Clamping

16213

16212

16213

Standard Bus Switches

TECHNOLOGY
DESCRIPTION
Single FET Bus Switches
Single FET Bus Switches with Level Shifting
Dual FET Bus Switches

TYPE

AUC

CB3Q

CB3T

CBT

1G125

1G384

1G125

3306

Dual FET Bus Switches with Schottky Diode Clamping

3306

3306

CBTLV

1G384
3305
3305

Dual FET Bus Switches with Level Shifting

CBT-C

CD4K

HC

HCT

LV

LVC

Standard Bus Switches (continued)

TECHNOLOGY
DESCRIPTION

TYPE

AUC

CB3Q

CB3T

CBT

CBT-C

CBTLV

4016
Quad Bilateral Switches

4066

1G125
Quad FET Bus Switches

3125

1G66

4-Bit Analog Switches with Level Translation

4316

Octal FET Bus Switches

10 Bit FET Bus Switches

10-Bit
10-Bit FET Bus Switches with Internal Pulldown Resistors

3245

3345

3384

6800

10-Bit FET Bus Switches with Schottky Diode Clamping

3384

16-Bit FET Bus Switches with Active Clamp Undershoot Protection

20-Bit FET Bus Switches with Active Clamp Undershoot Protection

20 Bit FET Bus Switches with Level Shifting
20-Bit

16245

16245

16210
20 Bit FET Bus Switches
20-Bit

16244

LVC

3861

10-Bit FET Bus Switches with Precharged Outputs for Live Insertion

LV

3857

6800

16 Bit FET Bus Switches

16-Bit

3861

6800

10-Bit FET Bus Switches with Precharged Outputs and Active Clamp Undershoot Protection

HCT

3244

10-Bit FET Bus Switches with Precharged Outputs and Diode Clamping

3384
10 Bit FET Bus Switches with Level Shifting
10-Bit

HC

3126
Single Bilateral Analog Switches

CD4K

16210

16861

20-Bit FET Bus Switches with Precharged Outputs

16800

20-Bit FET Bus Switches with Series Damping Resistors

19861

24-Bit FET Bus Switches

16211

24-Bit FET Bus Switches with Bus Hold

16211

24-Bit FET Bus Switches with Level Shifting

16211

24-Bit FET Bus Switches with Precharged Outputs

16811

213

PRODUCT INDEX

16861
16861

214

BUS SWITCHES
Standard Bus Switches (continued)
TECHNOLOGY
DESCRIPTION

TYPE

24-Bit FET Bus Switches with Schottky Diode Clamping

16211

32-Bit FET Bus Switches

34X245

32-Bit FET Bus Switches with Active Clamp Undershoot Protection

32245

AUC

CB3Q

CB3T

CBT

CBT-C

CBTLV

CD4K

HC

HCT

LV

LVC

TTL

COUNTERS
Binary Counters
TECHNOLOGY
DESCRIPTION
Divide by 12

TYPE

AC

ACT

ALS

AS

CD4K

FCT

LV

393

Dual 4 Bit Up

4520

Presettable 4 Bit Up/Down

4516

Presettable 4 Bit BCD Up/Down with Dual Clock and Reset

40193

191

193

Programmable 4 Bit with Asynchronous Clear

40161

Synchronous 4 Bit

569

169

Synchronous 4 Bit Up/Down

LS

293

Dual 4 Bit

Presettable Synchronous 4 Bit Up/Down

HCT

93
4 Bit Ripple

HC

92

669

697

Synchronous 4 Bit with Preset and Asynchronous Clear

161

Synchronous 4 Bit with Preset and Synchronous Clear

163

8-Bit Counters/Dividers with 1-of-8 Decoded Outputs

4022

8 Bit with 3-State Output Registers

590

8 Bit with Input Registers

592

8 Bit with Input Registers and Parallel Counter Outputs

593

Binary Counters (continued)

TECHNOLOGY
DESCRIPTION
8 Bit Synchronous Up/Down

TYPE

AC

ACT

ALS

AS

867

869

CD4K

FCT

HC

HCT

8 Bit Presettable Synchronous Down

40103

7-Stage Ripple-Carry Counters/Dividers

4024

12-Stage Ripple-Carry Counters/Dividers

4040

4020

14 Stage Ripple-Carry
14-Stage
Ripple Carry Counters/Dividers with Oscillators

4060

21 Stage

4045

Divide by N

4018

Programmable Divide by N

4059

Presettable Up/Down or BCD Decade

4029

LS

LV

TTL

Decade Counters
TECHNOLOGY
DESCRIPTION

TYPE

CD4K

HC

90

Dual Divide by 2, Divide by 5

390

190

Synchronous Presettable BCD Up/Down

Counters/Dividers with 1-of-10 Decoded Outputs
Counters/Drivers with Decoded 7-Segment
7 Segment Display Outputs

HCT

LS

Divide by 2, Divide by 5

192
4017

4026

4028

Presettable BCD Up/Down

4510

Dual BCD Up

4518

Programmable BCD Divide by N

4522

2 Decade Synchronous Presettable BCD Down

40102

Up-Down Counters/Latches/7-Segment Display Drivers

40110

Presettable BCD-Type Up/Down with Dual Clock and Reset

40192

215

PRODUCT INDEX

4033

BCD-to-Decimal Decoders

216

DECODERS, ENCODERS, AND MULTIPLEXERS

Decoders
DESCRIPTION
1-of-2 Noninverting Demultiplexers

OUTPUT

TYPE

3S

1G18
139

CP
Dual 2-to-4
2 to 4 Line Decoders/Demultiplexers

TECHNOLOGY
AC

ACT

AHC

AHCT

ALS

AS

BCT

CD4K

Dual 2-Line to 4-Line Memory Decoders

with On-Chip Supply-Voltage Monitors

FCT

HC

HCT

138

11138

42

4514

4515

154
OC

BCD to 7-Segment
7 Segment Decoders/Drivers

OC
OC

159

45
BCD to Decimal Decoders/Drivers
BCD-to-Decimal

237

4 Bit Latch/4 to 16 Line

4-Bit

BCD to 10 Line Decimal

TTL

3 to 8 Line Decoders/Demultiplexers
3-to-8
with Address Latches

238

137

LVC

156

4556

CP

LV

4555
3-to-8 Line Decoders/Demultiplexers

LS

11139

2414

Dual Binary 1-of-4

1 of 4 Decoders/Demultiplexers

4 to 16 Line Decoders/Demultiplexers
4-to-16

155
OC

3 to 8 Line Inverting Decoders/Demultiplexers

3-to-8

AUC

145

47

247

BCD to 7-Segment Latches/Decoders/Drivers

4511

BCD to 7-Segment LCD Decoders/Drivers

with Display-Frequency Outputs

4055

BCD to 7-Segment LCD Decoders/Drivers

with Strobed Latch Function

4056

BCD to 7-Segment Latches/Decoders/Drivers for LCDs

4543

Multiplexers
DESCRIPTION

OUTPUT

TYPE

Single 2-to-1 Line Data Selectors/Multiplexers

2G157

1-of-8 Analog Multiplexers/Demultiplexers

4051

1-of-8 Analog Multiplexers/Demultiplexers

with Logic Level Conversion

4051

1-of-8 Analog Multiplexers/Demultiplexers

with Latches

4351

1-of-8 Data Selectors

1 of 8 Data Selectors/Multiplexers
1-of-8

3S
3S

TECHNOLOGY
ABT

AC

ACT

AHC

AHCT

ALS

AS

AUC

CD4K

FCT

3S

151

251

1-of-16 Analog Multiplexers/Demultiplexers

4067

1-of-16 Data Selectors/Multiplexers

150

3S

253

Dual 1-of-4 Analog Multiplexers/Demultiplexers

with Logic Level Conversion

4052

Dual 1-of-4 Analog Multiplexers/Demultiplexers

with Latches

4352

Triple 1-of-2 Analog Multiplexers/Demultiplexers

4053

Triple 1-of-2 Analog Multiplexers/Demultiplexers

with Logic Level Conversion

4053

11257

3S

2257
157

Quad 2-to-1
2 to 1 Data Selectors/Multiplexers

3S

40257

217

PRODUCT INDEX

CP/3S

258

Quad 11-of-2
of 2 Data Selectors/Multiplexers
Quad 1-of-2 Data Selectors/Multiplexers
with Series Damping Resistors

257

TTL

4052

2G53

3S

153

Dual 1-of-4 Analog Multiplexers/Demultiplexers

PCA

250

Dual Analog Multiplexers/Demultiplexers

LVC

356

Dual 1-of-4
1 of 4 Data Selectors/Multiplexers

LV

4512

4097

3S

LS

1-of-8 Differential
Analog Multiplexers/Demultiplexers

1-of-16 Data Generators/Multiplexers

HCT

354
1 of 8 Data Selectors/Multiplexers/Registers
1-of-8

HC

218

DECODERS, ENCODERS, AND MULTIPLEXERS

Multiplexers (continued)
DESCRIPTION

OUTPUT

TYPE

Quad 22-to-1
to 1 Data Selectors/Multiplexers
with Storage

298

Quad 2-to-4 Data Selectors/Multiplexers

158

AC

ACT

AHC

AHCT

ALS

AS

AUC

CD4K

3S

857

4-to-1 Multiplexers/Demultiplexers

3S

16460

FCT

HC

HCT

LS

LV

LVC

PCA

8550

Priority Encoders
TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

CD4K

3S

HC

HCT

148
8 to 3 Line
10 to 4 Line

147

10 to 4 Line BCD

40147

LS

348
4532

399

Hex 2-to-1 Universal Multiplexers

Nonvolatile 5-Bit Registers with I2C Interface

TECHNOLOGY
ABT

TTL

FIFOs (FIRST-IN, FIRST-OUT MEMORIES)

Asynchronous FIFO Memories
TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

ABT

ACT

3S

16 5

3S

ALVC

CD4K

HC

HCT

232

16 4

ALS

40105

225
229

233

64 4

3S

236

64 18

3S

7814

64 18 3.3 V

3S

7814

256 18

3S

7806

256 18 3.3 V

3S

7806

512 18

3S

7804

512 18 3.3 V

3S

7804

512 18 2 Bidirectional

3S

7820

1024 9 2 Bidirectional

3S

2235

1024 18

3S

7802

2048 9

3S

7808

PRODUCT INDEX

219

220

FIFOS (FIRST-IN, FIRST-OUT MEMORIES)

Synchronous FIFO Memories
TECHNOLOGY
DESCRIPTION
16 4

OUTPUT
3S

TYPE

ALVC

2227

64 18

3S

7813

64 18 3.3 V

3S

7813

64 36

3S

3613

3612

3614

2228

2229

256 1 2 Independent

3S

256 18

3S

7805

256 18 3.3 V

3S

7805

256 36 2 Bidirectional

3S

3622

512 18

3S

7803

215
3S

512 18 2 Bidirectional

3S

7819

512 36

3S

3631

512 36 3.3 V

3S

3631

3611

512 18 3.3
33V

LS

2226
3S

3S

ACT

224

64 1 2 Independent

64 36 2 Bidirectional

ABT

7803

3632

3638

7811

7881

512 36 2 Bidirectional

3S

1024 18

3S

1024 18 3.3 V

3S

225

1024 36

3S

3641

1024 36 3.3
33V

3S

2048 9

3S

7807

2048 18

3S

7882

2048 18 3.3 V

3S

235

3640

3641

Synchronous FIFO Memories (continued)

TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

2048 36

3S

3651

2048 36 3.3
33V

3S

4096 18 3.3 V

3S

245

4096 36 3.3 V

3S

3660

8192 18 3.3 V

3S

263

8192 36 3.3 V

3S

3670

16384 9 3.3 V

3S

263

16384 18 3.3 V

3S

273

16384 36 3.3 V

3S

3680

32768 9 3.3 V

3S

273

32768 18 3.3 V

3S

283

32768 36 3.3 V

3S

3690

65536 9 3.3 V

3S

283

65536 18 3.3 V

3S

293

131072 9 3.3 V

3S

293

ABT

ACT

ALVC

LS

3650

3651

FLIP-FLOPS
D-Type Flip-Flops (3-state)
DESCRIPTION

OUTPUT

TYPE

Single

3S

1G34

Single Latch

3S

1G373

3S

Quad

3S
3S

ACT

AHC

AHCT

ALS

ALVC

ALVT

AS

AUC

AVC

BCT

FCT

HCT

LS

LV

LVC

LVT

876

173
29825

HC

874

825
Octal Bus Interface

AC

221

PRODUCT INDEX

Dual 4 Bit Edge Triggered

TECHNOLOGY
ABT

222

FLIP-FLOPS
D-Type Flip-Flops (3-state) (continued)
DESCRIPTION

OUTPUT
3S
3S/CP

TYPE
374

3S

Octal Edge Triggered

Dual Rank

3S

Octal Edge Triggered

with Series Damping
Resistors

3S

Octal Inverting

3S

9 Bit Bus Interface

3S

10 Bit Bus Interface

3S

AC

ACT

AHC

AHCT

ALS

ALVC

FCT

HC

HCT

LS

LV

LVC

LVT

576

577

AUC

AVC

4374
2374

2574

564

29821

162820
16374

29823

16820

3S

821

16 Bit Edge Triggered

BCT

823

3S

AS

575

534

10 Bit with Dual Outputs

ALVT

11374
574

Octal Edge Triggered

TECHNOLOGY
ABT

162374

163374
18 Bit

20 Bit

3S

3S

16823

162823

3S

162721

16722
32374

32 Bit Edge Triggered

16721

16821
322374

D-Type Flip-Flops (non 3-state)

TECHNOLOGY
DESCRIPTION

OUTPUT

Single Edge Triggered

TYPE

ABT

AC

ACT

AHC

AHCT

ALS

AS

AUC

FCT

HC

HCT

LS

LV

1G80

Dual Edge Triggered

CP

TTL

74

11074

2G79

2G80

175

11175

40175

174
Hex

4013
CP

LVT

2G74

Dual

LVC

1G79
1G74

Single Edge Triggered

with Preset and Clear

Quad

CD4K

40174

Hex with Enable

378

Octal

273

Octal with Enable

377

Other Flip-Flops
TECHNOLOGY
DESCRIPTION
Dual Edge Triggered J-K Master-Slave
Dual Edge Triggered JJ-K
K with Reset

TYPE

AC

ACT

ALS

AS

CD4K

HC

HCT

LS

73

107

LVC

TTL

4027

112

Dual Positive Edge Triggered J-K with Set and Reset

109

Quad Edge Triggered J-K

276

223

PRODUCT INDEX

Dual Edge Triggered J-K with Set and Reset

224

GATES AND INVERTERS

AND Gates
TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

Single 2 Input

1G08

Dual 2 Input

2G08

Quad 2 Input

AC

ACT

AHC

AHCT

ALS

ALVC

AS

AUC

AUP

CD4K

CP

11008

OC

09

HCT

Quad 2 Input with Schmitt-Trigger Inputs

7001

LVC

21

4082

11

LV

4081
1008

LS

Quad 2-Input Buffers/Drivers

Triple 3 Input

HC

08

Dual 4 Input

4073

NAND Gates
TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE
1G00

Single 2 Input
Single 2-1 Line Data
Selectors/Multiplexers

Single 3 Input Positive

AC

ACT

AHC

AHCT

ALS

ALVC

AS

AUC

CD4K

HC

HCT

LS

LV

LVC

OD

1G38

3S

2G257

1G10

1G11

1G27

1G332

1G386

Single-Pole Double-Throw
Analog Switches

1G3157

Dual 2 Input

2G00

Dual 2-Input Buffers/Drivers

40107

TTL

NAND Gates (continued)

TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

AC

ACT

AHC

AHCT

ALS

ALVC

AS

00

CP

11000

OC

03

OD

03

Quad 2 Input

OC

4011

Quad 2 Input
with Schmitt-Trigger Inputs

132

LV

LVC

TTL

4023

4012

20

1804
10

804

8 Input

LS

4093

Dual 4-Input Positive

50- Line Drivers

HCT

38

Quad 2 Input Unbuffered

Dual 4 Input

HC

37
1000

Triple 3 Input

26

Quad 2-Input Buffers/Drivers

Hex 2-Input
2 Input Drivers

CD4K

4011
3S

AUC

30

11030

8 Input AND/NAND

4068

13 Input

133

140

CP

PRODUCT INDEX

225

226

GATES AND INVERTERS

AND-OR-Invert Gates
TECHNOLOGY
DESCRIPTION

TYPE

CD4K

LS

51
Dual 2 Wide 2 Input

4085

Dual 2 Wide 2 Input, 2 Wide 3 Input

51

Expandable 4 Wide 2 Input

4086

Expandable 8 Input

4048

OR Gates
TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

Single 2 Input

1G32

Dual 2 Input

2G32

Quad 2 Input

CP

AC

ACT

AHC

AHCT

ALS

ALVC

AS

AUC

CD4K

HC

HCT

LS

LV

11032

Quad 2-Input Buffers/Drivers

1032

Quad 2 Input
with Schmitt-Trigger Inputs

7032

Hex 2-Input Drivers

832

Dual 4 Input

4072

Triple 3 Input

4075

TTL

4071

32

LVC

NOR Gates
TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

Single 2 Input

1G02

Dual 2 Input

2G02

AC

ACT

AHC

AHCT

ALS

AS

AUC

CD4K

7002

Quad 2 Input Unbuffered

4001

Dual 4 Input with Strobe

25

Dual 5 Input

260

8 Input NOR/OR

4078

TTL

27
4002

4025
Dual 4 Input

LVC

808

Triple 3 Input

LV

805
Hex 2-Input
2 Input Drivers

LS

33

Quad 2 Input with Schmitt-Trigger Inputs

HCT

02
OC

HC

4001
Quad 2 Input

Exclusive-OR Gates
TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

Single 2 Input

1G86

Dual 2 Input

2G86

AC

ACT

AHC

AHCT

ALS

AS

CD4K

HC

HCT

LS

LV

LVC

4030

4070
86

CP

11086

OC

136

Quad 2 Input

AUC

227

PRODUCT INDEX

228

GATES AND INVERTERS

Exclusive-NOR Gates
TECHNOLOGY
DESCRIPTION

Quad 2 Input

OUTPUT

TYPE

OC

266

OD

266
4077

CD4K

HC

LS

7266

Gate and Delay Elements

TECHNOLOGY
DESCRIPTION

TYPE

CD4K

Dual Unbuffered Complementary Pairs Plus Inverters

4007

Quad AND/OR Select Gates

4019

Quad True/Complement Buffers

4041

Hex Delay Elements for Generating Delay Lines

31

Hex Gates (4 Inverters, 2-Input NOR, 2-Input NAND)

4572

LS

Inverters
TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

AC

ACT

AHC

AHCT

Single

1G04

Unbuffered Single

1GU04

Single Schmitt Trigger

1G14

ALS

ALVC

AS

AUC

CD4K

HC

HCT

LS

LV

LVC

2G04

2GU04

Dual Schmitt Trigger

2G14

Triple

3G04

Unbuffered Triple

3GU04

Triple Schmitt Trigger

3G14

Dual

Hex

04

CP

11004

OC

05

OD

05

Hex Schmitt Trigger

19

TTL

U04
14

4069
Unbuffered Hex

PRODUCT INDEX

229

230

LATCHES
D-Type Latches (3-state)
DESCRIPTION
Dual 4 Bit

TYPE

AC

563
373

Octal Transparent Read Back

Octal Transparent
with Series Damping Resistors

573

AHCT

ALS

ALVC

845

666

667

BCT

FCT

HC

HCT

LS

LV

LVC

LVT

29843

12 Bit to 24 Bit Multiplexed

16260

12 Bit to 24 Bit Multiplexed

with Series Damping Resistors

162260

16373

162373
16843

16841

162841

32373

2573

841

32 Bit Transparent

AVC

2373

992

20 Bit Transparent

AUC

10 Bit Transparent

18 Bit Transparent

AS

9 Bit Transparent Read Back

16 Bit Transparent

ALVT

580

843
9 Bit Transparent

AHC

11373
Octal Transparent

ACT

873
533

Octal Inverting Transparent

TECHNOLOGY
ABT

Other Latches
TECHNOLOGY
DESCRIPTION

OUTPUT

Dual 2 Bit Bistable Transparent

Dual 4 Bit with Strobe

TYPE

ALS

CD4K

75
3S

HC

HCT

4508

75
4 Bit Bistable

375

Quad Clocked D

4042

Quad NAND R-S

3S

4044

Quad NOR R-S

3S

4043

Quad S-R

279
259

8 Bit Addressable

LS

4099

4724

8 Bit D-Type Transparent Read Back

990

8 Bit Edge Triggered Read Back

996

10 Bit D-Type Transparent Read Back

994

LITTLE LOGIC
AND Gates
TECHNOLOGY
DESCRIPTION

TYPE

Single 2 Input

1G08

Dual 2 Input

2G08

AHC

AHCT

AUC

AUP

LVC

PRODUCT INDEX

231

232

LITTLE LOGIC
NAND Gates
TECHNOLOGY
DESCRIPTION

Single

TYPE

AUC

LVC

1G10

1G11

1G27

1G332

1G386

Single-Pole Double-Throw Analog Switches

1G3157

Single 2-1

2G257

Single 2 Input

1G00

Dual 2 Input

2G00

AHC

AHCT

OR Gates
TECHNOLOGY
DESCRIPTION

TYPE

Single 2 Input

1G32

Dual 2 Input

2G32

AHC

AHCT

AUC

LVC

NOR Gates
TECHNOLOGY
DESCRIPTION

TYPE

Single 2 Input

1G02

Dual 2 Input

2G02

AHC

AHCT

AUC

LVC

Exclusive-OR Gates
TECHNOLOGY
DESCRIPTION

TYPE

Single 2 Input

1G86

Dual 2 Input

2G86

AHC

AHCT

AUC

LVC

D-Type Flip-Flops
TECHNOLOGY
DESCRIPTION
Single Edge Triggered
Single Edge Triggered with Preset and Clear
Dual Edge Triggered

TYPE

AUC

LVC

1G79

1G80

2G74

2G79

2G80

Decoders
TECHNOLOGY
DESCRIPTION

OUTPUT

1-of-2 Decoders/Demultiplexers
1-of-2 Noninverting Demultiplexers

3S

TYPE

AUC

1G19

1G18

LVC

Inverters
TECHNOLOGY
DESCRIPTION
Single
Single Schmitt Trigger
Dual
Dual Schmitt Trigger
Triple Schmitt Trigger
Unbuffered Triple

TYPE

AHC

AHCT

AUC

LVC

1G04

1GU04

1G14

2G04

2GU04

2G14

3G04

3G14

3GU04

PRODUCT INDEX

233

234

LITTLE LOGIC
Inverting Buffers and Drivers
TECHNOLOGY
DESCRIPTION
Single

OUTPUT

TYPE

OD
3S

AUC

LVC

1G06

1G240

2G06

Dual

3S

2G240

Triple

OD

3G06

OUTPUT

TYPE

Single

OD

1G07

Single Bus Buffers

3S

Noninverting Buffers and Drivers

TECHNOLOGY
DESCRIPTION

Single Schmitt Trigger

Dual
OD
Dual Bus Buffers

3S
OD

Triple

AHC

AHCT

AUC

LVC

1G125

1G126

1G17

2G07

2G34

2G17

2G125

2G126

2G241

3G07

3G17

3G34

Multiplexers
TECHNOLOGY
DESCRIPTION

TYPE

AUC

LVC

Single 2- to 1-Line Data Selectors/Multiplexers

2G157

Dual Analog Multiplexers/Demultiplexers

2G53

Specialty Logic
TECHNOLOGY
DESCRIPTION

Configurable Multiple-Function
Multiple Function Gates

TYPE

AUC

AUP

LVC

1G57

1G58

1G97

1G98

Standard Bus Switches

TECHNOLOGY
DESCRIPTION
Single Bilateral (Analog or Digital)

TYPE

AUC

CBT

CBTLV

1G125

1G384

1G125

1G384

1G66

Single FET
Single FET with Level Shifting
Dual Bilateral (Analog or Digital)

LVC

2G66

MEMORY DRIVERS AND TRANSCEIVERS (HSTL, SSTL, SSTU, AND SSTV/SSTVF)

Buffers, Drivers, and Latches
TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

HSTL

16918

9-Bit to 18-Bit HSTL-to-LVTTL Memory Address Latches with Pullup Resistors

16919

13-Bit to 26-Bit Registered Buffers with SSTL_2 Inputs and Outputs

16859

14-Bit Registered Buffers with SSTL_2 Inputs and Outputs

16857

14-Bit to 28-Bit HSTL-to-LVTTL Memory Address Latches

162822

SSTU

SSTV

SSTVF

20-Bit SSTL_3 Interface Buffers

3S

16847

20-Bit SSTL_3 Interface Universal Bus Drivers

3S

16837

235

24-Bit to 48-Bit Registered Buffers with SSTL_2 Inputs and Outputs

32852

25-Bit Configurable Registered Buffers with Address-Parity Test

32866

25-Bit Configurable Registered Buffers with SSTL_18 Inputs and Outputs

32864

26-Bit Registered Buffers with SSTL_2 Inputs and Outputs

32877

26-Bit Registered Buffers with SSTL_2 Inputs and LVCMOS Outputs

32867

PRODUCT INDEX

9-Bit to 18-Bit HSTL-to-LVTTL Memory Address Latches

SSTL

236

REGISTERS
Registers
TECHNOLOGY
DESCRIPTION
1 Bit to 4-Bit
1-Bit
4 Bit Address Registers/Drivers

OUTPUT
3S

TYPE

AC

ACT

AHC

AHCT

ALS

ALVC

162831

162832

AS

CD4K

40194

4 Bit D-Type

4076

4 Stage Parallel-In/Parallel-Out Shift

4035

Dual 4 Stage Static Shift

4015

OC

170

3S

670

3S

870

5 Bit Shift
3S

818

8 Bit Multilevel Pipeline

3S

520

8 Bit Serial In, Parallel Out Shift

164

8 Bit Parallel In, Serial Out Shift with Gated Clock

165

8 Bit Parallel In, Serial In, Serial Out Shift

166

8 Bit Shift with Output Registers

OC

8 Bit Shift with 3-State Output Registers

3S

595

8 Bit Shift with 3-State Output Latches

3S

596

8 Bit Shift with Input Latches

8-Stage Static Bidirectional Parallel-/Serial-Input/Output Bus

16 Bit Serial In/Out with 16-Bit
16 Bit Parallel-Out
Parallel Out Storage

3S

3S

LV

599

597
3S

8 Stage Static Shift

8-Stage Shift-and-Store Bus

LS

594

8 Bit Universal Shift/Storage

HCT

96

8 Bit Diagnostic Scan

8 Bit Shift with Input Latches and 3-State Input/Output Ports

HC

195

4 Bit Bidirectional Universal Shift

Dual 16-by-4 Register Files

FCT

194

4 by 4 Register Files
4-by-4

598
299

323

4014

4021

4094

4034

673

674

Registers (continued)
TECHNOLOGY
DESCRIPTION

OUTPUT

64 Stage Static Shift

Dual 64 Stage Static Shift

3S

TYPE

AC

ACT

AHC

AHCT

ALS

ALVC

AS

CD4K

4031

4517

FCT

HC

HCT

LS

LV

SPECIALTY LOGIC
Adders
TECHNOLOGY
DESCRIPTION

TYPE

9 Bit Binary Full with Fast Carry

283

AC

ACT

HC

HCT

LS

Arithmetic Logic Units

TECHNOLOGY
DESCRIPTION

TYPE
181

Arithmetic Logic Units/Function Generators

Look-Ahead Carry Generators

AS

LS

381

182

Bus-Termination Arrays and Networks

TECHNOLOGY
DESCRIPTION

TYPE

Dual 4-Bit Programmable Terminators

40117

8-Bit Schottky Barrier Diode Bus-Termination Arrays

1056

10-Bit Bus-Termination Networks with Bus Hold

1071

16-Bit Bus-Termination Networks with Bus Hold

CD4K

1050

1051

1073

1052
16 Bit Schottky Barrier Diode Bus-Termination
16-Bit
Bus Termination Arrays
16-Bit Schottky Barrier Diode R-C Bus-Termination Arrays

1053
1016

237

PRODUCT INDEX

12 Bit Schottky Barrier Diode Bus-Termination

12-Bit
Bus Termination Arrays

ACT

238

SPECIALTY LOGIC
Comparators (identity)
TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

ALS

521

518

8 Bit Identity (P = Q) with Input Pullup Resistors

520

12 Bit Address

679

8 Bit Identity (P = Q)
8 Bit Identity (P = Q) with Input Pullup Resistors

OC

Comparators (magnitude)
TECHNOLOGY
DESCRIPTION

TYPE

ALS

AS

CD4K

85
4 Bit

4063

4585

LS

684
688

HCT

682
8 Bit

HC

885

Digital Phase-Locked Loops (PLLs)

TECHNOLOGY
DESCRIPTION

TYPE

Digital PLLs

297

PLLs with VCO

4046

PLLs with VCO and Lock Detectors

7046

ACT

CD4K

HC

HCT

LS

Drivers/Multipliers
TECHNOLOGY
DESCRIPTION

TYPE

CD4K

4-Bit Binary Rate Multipliers

4089

BCD Rate Multipliers

4527

Synchronous 6-Bit Binary Rate Multipliers

97

TTL

ECL/TTL Functions
TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

Octal ECL-to-TTL Translators

3S

10KHT5541

Octal ECL-to-TTL Translators with Edge-Triggered D-Type Flip-Flops

3S

10KHT5574

10KHT5578

10KHT5542

10KHT5543

Octal TTL-to-ECL Translators with Edge-Triggered D-Type Flip-Flops and Output Enable
Octal TTL
TTL-to-ECL
to ECL Translators with Output Enable

ECL

Frequency Dividers/Timers
TECHNOLOGY
DESCRIPTION
24-Stage Frequency Dividers

TYPE

CD4K

LS

4521

292
Programmable Frequency Dividers/Digital Timers
Programmable Timers

294
4536

4541

I2C Functions
TECHNOLOGY
DESCRIPTION
Nonvolatile 5-Bit Resistors

TYPE

PCA

Remote 8-Bit
8 Bit I/O Expanders

PCF

8550
8574

8574A

Little Logic
TECHNOLOGY
DESCRIPTION

AUC

AUP

LVC

1G57

1G58

1G97

1G98

239

PRODUCT INDEX

Configurable Multiple-Function
Multiple Function Gates

TYPE

240

SPECIALTY LOGIC
Monostable Multivibrators
TECHNOLOGY
DESCRIPTION

TYPE

Low Power Monostable/Astable

4047

Monostable Multivibrators with Schmitt-Trigger Inputs

121

Retriggerable

122

Dual

4098

Dual with Schmitt-Trigger Inputs

221

Dual Precision

14538

Dual Retriggerable Precision

AHCT

CD4K

HC

HCT

LS

LV

TTL

423

4538

123
Dual Retriggerable with Reset

AHC

Oscillators
TECHNOLOGY
DESCRIPTION

TYPE

Single Crystal Controlled

Single Voltage Controlled

LS

321

624

628

124
Dual Voltage Controlled

629

Parity Generators and Checkers

TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

Dual 8 Bit Odd

480

9 Bit Odd/Even

280

9 Bit with Bus-Driver

Bus Driver Parity Input/Output Port

CP

AC

ACT

ALS

AS

FCT

HC

HCT

LS

286

11286

Translation Voltage Clamps

TECHNOLOGY
DESCRIPTION

TYPE

TVC

10 Bit

3010

22 Bit

16222

Voltage-Level Translators
TECHNOLOGY
DESCRIPTION

TYPE

AVC

LVC

1 Bit Dual Supply Level

1T45

2 Bit Dual Supply Level

2T45

Translates Between 1.4 V and 3.6 V

8T245

Translates Between 2.3 V and 5.5 V

C3245

3245

8 Bit Dual Supply Level

Translates Between 2.7
2 7 V and 5.5
55V

ALVC

4245

16 Bit Dual Supply Level

164245

20 Bit Dual Supply Level

20T245

32 Bit Dual Supply Level

B324245

TRANSCEIVERS
Parity Transceivers
TECHNOLOGY
DESCRIPTION
Octal with Parity Generators/Checkers

OUTPUT
3S

TYPE

ABT

657

833

ACT

29854
Dual 8 Bit to 9 Bit
16 Bit with Parity Generators/Checkers

3S

16833

16853

16657

241

PRODUCT INDEX

853

29833
8 Bit to 9 Bit

ALS

242

TRANSCEIVERS
Registered Transceivers
TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

ABT

AC

ACT

ALS

ALVC

AS

AVC

BCT

OC/3S

3S

651

652

654

2652

2952

16470

16543

16651

162652
16952

2646

16652

162952

3S

2543

162646

18 Bit

653

16646
3S

LVT

162543

16 Bit

LVC

11652

Octal with Series Damping Resistors

648

Octal

LS

561
646

HCT

11543

3S

HC

52
543

FCT

16524

16525

162525

32 Bit

3S

32543

4 to 1 Multiplexed/Demultiplexed

3S

162460

Standard Transceivers
DESCRIPTION

TECHNOLOGY

OUTPUT

TYPE

Dual 1 Bit
LVTTL to GTLP
Adjustable Edge
Rate with Split
LVTTL Port,
Feedback Path,
and Selectable
Polarity

3S

1395

2 Bit LVTTL to
GTLP Adjustable
Edge Rate with
Selectable Parity

3S

1394

Quad

3S

243

Quad
Tridirectional

3S

442

7 Bit Bus Interface

IEEE Std 1284

3S

1284

8-Bit Transceivers
and Transparent
D-Type Latches
with Four
Independent
Buffers
8 Bit
LVTTL to GTLP

16973

3S

306

ABT

ABTE

AC

ACT

AHC

AHCT

ALB

ALS

ALVC

ALVT

AS

AUC

AVC

BCT

64BCT

FCT

GTL

GTLP

HC

HCT

LS

LV

LVC

LVT

PRODUCT INDEX

243

244

TRANSCEIVERS
Standard Transceivers (continued)
DESCRIPTION

OUTPUT

TYPE
245

3S

TECHNOLOGY
ABT

620

3S

3S

AHC

AHCT

ALB

ALS

ALVC

ALVT

AS

AUC

AVC

BCT

64BCT

FCT

GTL

GTLP

HC

HCT

LS

LV

LVC

LVT

638

639

640

OC

ACT

621
623

Octal

AC

1245
11245

OC

ABTE

1640

641

642

645

1645

Octal with
Series Damping
Resistors

3S

2245

Octal Transceivers
and Line/MOS
Drivers with B-Port
Series Damping
Resistors

3S

2245

Octal with
Adjustable Output
Voltage

3S

3245

Octal Dual Supply

with Configurable
Output Voltage

3S

4245

Octal with
3.3-V to 5-V
Shifters

3S

4245

863
9 Bit

3S

29863
29864

Standard Transceivers (continued)

DESCRIPTION
10 Bit
11 Bit Incident
Wave Switching

16 Bit

OUTPUT
3S
3S/OC

3S

TYPE
861

TECHNOLOGY
ABT

ABTE

AC

ACT

AHC

AHCT

ALB

ALS

ALVT

AS

AUC

AVC

BCT

64BCT

FCT

GTL

GTLP

HC

HCT

LS

LV

LVC

LVT

16246
16245

16623

16640

16-Bit
Bus Transceivers
and Transparent
D-Type Latches
with Eight
Independent
Buffers

16 Bit Incident
Wave Switching

3S

16 Bit with
Series Damping
Resistors

3S

16 Bit 3.3 V to 5 V
Level Shifting

3S

164245

16 Bit LVTTL to
GTLP Adjustable
Edge Rate

3S

1645

16 Bit
LVTTL to GTLP

3S

16945

18 Bit
Bus Interface

3S

16863

18 Bit
LVTTL to
GTL/GTL+

ALVC

16245

16245
162245

16622

16923

16927

19 Bit
Bus Interface
IEEE Std 1284

161284

245

PRODUCT INDEX

18 Bit
LVTTL to GTLP
Source
Synchronous
Clock Outputs

246

TRANSCEIVERS
Standard Transceivers (continued)
DESCRIPTION
20 Bit

OUTPUT

TYPE

3S

16861

TECHNOLOGY
ABT

ABTE

AC

ACT

AHC

AHCT

ALB

ALS

ALVC

ALVT

AS

AUC

AVC

BCT

64BCT

FCT

GTL

GTLP

3S

25245

OC

25642

32 Bit

3S

32245

32 Bit
LVTTL to GTLP

3S

32945

32 Bit LVTTL to
GTLP Adjustable
Edge Rate

3S

3245

25 Octal

HC

HCT

LS

LV

LVC

LVT

UNIVERSAL BUS FUNCTIONS

Universal Bus Transceivers
TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

8 Bit and Two 1-Bit Split Outputs with Feedback Path

3S

22501

16 Bit LVTTL to GTL/GTL+ with Live Insertion

3S

1655

17 Bit LVTTL to GTLP Adjustable Edge Rate

3S

1616

17 Bit LVTTL to GTL/GTL+

18 Bit

18 Bit with Parity Generators/Checkers

ALVC

ALVT

AUC

FCT

3S

3S

18 Bit LVTTL to GTL/GTL+

GTLP

162500

16501

162501

16600

16601

162601

16901

16612
16612

16912

1612

18 Bit LVTTL to GTLP Adjustable Edge Rate

3S

32 Bit

3S

32501

VME

16500

3S

LVT

16916

18 Bit LVTTL to GTLP

LVC

16616
3S

GTL

1655

16 Bit LVTTL to GTLP Adjustable Edge Rate

17 Bit LVTTL to GTLP with Buffered Clock

ABT

PRODUCT INDEX

247

248

UNIVERSAL BUS FUNCTIONS

Universal Bus Drivers
TECHNOLOGY
DESCRIPTION
12 Bit with Parity Checker and Dual 3-State Outputs
16 Bit

OUTPUT

TYPE

3S

16903

16334

162334

16834

162834

16835

3S

ALVC

18 Bit

3S

162835

20 Bit

3S

162836

OUTPUT

TYPE

AVC

LVT

Universal Bus Exchangers

TECHNOLOGY
DESCRIPTION
9 Bit 4 Port

3S

12 Bit to 24 Bit Multiplexed

3S

12 Bit to 24 Bit Registered

3S

ABT

ALVC

16409

162409

16271

16269

16270

162268

16 Bit to 32 Bit with Byte Masks

3S

162280

16 Bit Tri-Port

3S

32316

18 Bit to 36 Bit Registered

3S

18 Bit Tri-Port

3S

16282

162282
32318

AVC

LOGIC OVERVIEW

PRODUCT INDEX

FUNCTIONAL CROSS-REFERENCE

DEVICE SELECTION GUIDE

PACKAGING AND MARKING INFORMATION

LOGIC PURCHASING TOOL/ALTERNATE SOURCES

31

FUNCTIONAL CROSS-REFERENCE

32

 Product available in technology indicated

Product available in reduced-noise advanced CMOS (11000 series)

New product planned in technology indicated

1G00

1G02

1G04

1GU04

1G06

1G07

1G10

1G11

1G17

1G18

1G19

1G08

1G14

1G27
1G32

1G38

1G57

1G58

1G66

1G74

1G79

1G80

1G97

1G98

1G86

33

1G125

1G126

1G240

1G332

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

TVC

VME

FUNCTIONAL CROSS-REFERENCE

1G34

ABTE

LV

LVC

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

AS

ALS

64BCT

BIPOLAR
LVT

BCT

ALB

ABT

DEVICE

ALVT

BiCMOS

1G373

1G374

1G384

1G386

1G3157
2G00

2G02

2G04

2GU04

2G06

2G07

2G08

2G14

2G17

2G32

2G34

2G53

2G66

2G74

2G79

2G80

2G86

2G125

2G126

2G157

2G240

2G241

2G257

3G04

3GU04

3G06

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

ALS

64BCT

LVT

BCT

ALVT

ALB

ABT

DEVICE

BIPOLAR

AS

34

BiCMOS

3G07

3G14

3G17

3G34

00

02

03

04

06

07

08

09

10

11

14

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

17

20

21

25
26

27

30

35

32

33

35

37

FUNCTIONAL CROSS-REFERENCE

31

FIFO

16
19

TVC

U04
05

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

AS

ALS

64BCT

BIPOLAR
LVT

BCT

ALB

ABT

DEVICE

ALVT

BiCMOS

38

45
47

51

52

73

74

75

85

86

90

92

93

96

97
107

109

112

121
122

123

124
125

126

128

132
133

136
137

138

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

42

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

ALS

64BCT

LVT

BCT

ALVT

ALB

ABT

DEVICE

BIPOLAR

AS

36

BiCMOS

145

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

148

150
151

153

154

155
156

157

158

159

163

164

165

166

169

170

173

174

175

181

182

190

192

37

FUNCTIONAL CROSS-REFERENCE

161

194

TVC

147

193

ABTE

140

191

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

TTL

CMOS
ACT

LS

AS

ALS

64BCT

LVT

BCT

BIPOLAR

AC

139

ALB

ABT

DEVICE

ALVT

BiCMOS

195

215

221

224

225

229

232

233

235

236

237
238

240

241

243

244

245

247

250
251

253

257

258

259

263

266

280

276
279

260

273

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT

CBTLV

OTHER
CBT-C

CB3T

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

AS

ALS

64BCT

LVT

BCT

ALVT

ALB

ABT

DEVICE

BIPOLAR

LS

38

BiCMOS

286

293

294

297

299

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

323

348

354

356

365

366

368

373

374

375

381
390

393

399

423

442

465

39

FUNCTIONAL CROSS-REFERENCE

367

480

TVC

321

378

306

377

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

CBT

CB3Q

AVC

AUC

AUP

OTHER

292

298

ALVC

AHC

AHCT

ACT

283

AC

TTL

CMOS

LS

AS

ALS

64BCT

BIPOLAR
LVT

BCT

ALB

ABT

DEVICE

ALVT

BiCMOS

518

520

521

533

534

540

541

543

561

563

564

569

573

574

575

576

577

580

590

592

593

594

595

596

597

598

621
623
624

599
620

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

AS

ALS

64BCT

LVT

BCT

ALVT

ALB

ABT

DEVICE

BIPOLAR

LS

310

BiCMOS

628

629

638

639

641

642

640

645
646

648
651

652

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

TTL

AC

654

666

667

670

673

674

679
682
684

688

697

746
756

757

760

311

FUNCTIONAL CROSS-REFERENCE

669

804

OTHER

653
657

CMOS

LS

AS

ALS

64BCT

BIPOLAR
LVT

BCT

ALB

ABT

DEVICE

ALVT

BiCMOS

805

808

818
821

823

825

828

832
833

841

843

845
853

857
861

863

867

869

870

873

874

876

885

990

992

994

996

1000

1004

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

TVC

817

827

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

AS

ALS

64BCT

LVT

BCT

ALVT

ALB

ABT

DEVICE

BIPOLAR

LS

312

BiCMOS

1005

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

1016
1032

1034

1035

1050

1051

1052

1053

1056
1071

1073

1244

1245

1284

1395

1612

1616

1640

1645

1650

1651

1653

1655

2031

2033

2034
313

FUNCTIONAL CROSS-REFERENCE

1394

2040

JTAG

1008

1804

HSTL

GTL

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

AS

ALS

64BCT

BIPOLAR
LVT

BCT

ALB

ABT

DEVICE

ALVT

BiCMOS

2226

2227

2228

2229

2235

2240

2241

2244

2245

2257

2373

2374

2414

2541

2543

2573

2574

2646

2652

2827

2952

3010
3125

3126

3244

3245

3251

3253

3257

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

2041

3305

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

ALS

64BCT

LVT

BCT

ALVT

ALB

ABT

DEVICE

BIPOLAR

AS

314

BiCMOS

3306
3345

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

3383

3384

3612

3613

3614

3622

3631

3632

3638

3640

3641

3650

3651

3660

3670

3680

3690

3857

315

4001

4002

4007

4009

4010

4011

4012

4013

4014

FUNCTIONAL CROSS-REFERENCE

3611

3861

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

AS

ALS

64BCT

BIPOLAR
LVT

BCT

ALB

ABT

DEVICE

ALVT

BiCMOS

4016

4017

4018

4019

4020

4021

4022

4023

4024

4025

4026

4027

4028

4029

4030

4031

4033

4034

4035

4040

4041

4042

4043

4044

4045

4046

4047

4048

4049

4050

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

4015

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

ALS

64BCT

LVT

BCT

ALVT

ALB

ABT

DEVICE

BIPOLAR

AS

316

BiCMOS

4052

4053

4054

4055

4056

4059

4060

4063

4066

4067

4068

4069

4070

4071

4072

4073

4075

4076

4077

4078

4081

4082

4085

4086

4089

4093

4094

4097

4098

4099

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

TVC

ABTE

VME

FUNCTIONAL CROSS-REFERENCE

317

4051

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

AS

ALS

64BCT

BIPOLAR
LVT

BCT

ALB

ABT

DEVICE

ALVT

BiCMOS

4316

4351

4352

4502

4503

4504

4508

4510

4511

4512

4514

4515

4516

4517

4518

4520

4521

4522

4527

4532

4536

4538
4541

4543

4555

4556

4572

4585

4724

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

TVC

ABTE

LVC

4245

4374

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

AS

ALS

64BCT

LVT

BCT

ALVT

ALB

ABT

DEVICE

BIPOLAR

LS

318

BiCMOS

5400

5401

5402

5403

6800

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

6845
7001

7002

7032

7046

7266

7803

7804

7805

7806

7807

7808

7811

7813

7814

7819

7820

7881

7882

319

8240

8244

8245

8373

8374

FUNCTIONAL CROSS-REFERENCE

7802

8003

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

AS

ALS

64BCT

BIPOLAR
LVT

BCT

ALB

ABT

DEVICE

ALVT

BiCMOS

8550

8574
8646

8652

8952

8980

8986

8990

8996

8997

11000

11004

11008

11030
11032

11074

11086

11138

11139
11175

11240

11244

11245

11257

11286

11373

11374

11543

11652

VME

SSTVF

SSTV

SSTU

SSTL

PCF

8543

14538

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

ALS

64BCT

LVT

BCT

ALVT

ALB

ABT

DEVICE

BIPOLAR

AS

320

BiCMOS

16209

16210

16211

16212

16213

16214

16232

16233

16240

16241

16244

16245

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

16246

16270

16271

16282

16292

16334

16344
16373

16374

16390

16409
16460

16470

16500

16501

321

FUNCTIONAL CROSS-REFERENCE

16269

16524

TVC

16222

16260

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

AS

ALS

64BCT

BIPOLAR
LVT

BCT

ALB

ABT

DEVICE

ALVT

BiCMOS

16540

16541

16543

16600

16601

16616

16622

16623

16640

16646

16652

16657

16651

16721

16722

16800

16811

16820
16821

16823

16825

16827

16831

16832

16834

16835

16837

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

16612

16841

JTAG

16525

16833

HSTL

GTL

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

ALS

64BCT

LVT

BCT

ALVT

ALB

ABT

DEVICE

BIPOLAR

AS

322

BiCMOS

16843

16861

VME

SSTVF

SSTV

SSTU

SSTL

16901

16903

16912

16916

16918

16919

16923

16927

16945

18245

18502

18504

18512

18514

18640

18646

18652

21395

22033

22034

22501
323

FUNCTIONAL CROSS-REFERENCE

16973

25244

16859

16952

16857

16863

PCF

16847
16853

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

AS

ALS

64BCT

BIPOLAR
LVT

BCT

ALB

ABT

DEVICE

ALVT

BiCMOS

25245

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

ALS

64BCT

LVT

BCT

ALVT

ALB

ABT

DEVICE

BIPOLAR

AS

324

BiCMOS

25642

29821

29823
29825

29827

29828

29833

29843

29854
29863

29864

32240

32244
32245

32316

32318

32373

32374

32501

32543

32852
32864

32866

32867

32877

32912

32916

32945
32973
40102

40103

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

HCT

CD4K

FCT

CBT-C

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

AS

ALS

64BCT

BIPOLAR
LVT

BCT

ALB

ABT

DEVICE

ALVT

BiCMOS

40105
40106

40107

40109

40110

40117

40147

40161

40174

40175

40192

40193

40194

40257

161284

162241

162244

162245

162260

162268

162280

162282

162334

162344

162373

162374

162409
325

162460

162500

FUNCTIONAL CROSS-REFERENCE

162240

162501

162543

162646

162652

162721

162820

162822
162823

162825

162827

162830

162831

162832

162834

162835

162836

162952

164245

182502

182504

182512

182646

182652
322374
34X245

VME

SSTVF

SSTV

SSTU

SSTL

PCF

PCA

JTAG

HSTL

GTL

GTLP

FB

FIFO

TVC

ABTE

LVC

LV

HC

162541

162841

HCT

CD4K

FCT

CBT-C

162525

162601

CBTLV

CB3T

OTHER
CBT

CB3Q

AVC

AUC

AUP

ALVC

AHC

AHCT

ACT

AC

TTL

CMOS

LS

ALS

64BCT

LVT

BCT

ALVT

ALB

ABT

DEVICE

BIPOLAR

AS

326

BiCMOS

LOGIC OVERVIEW

PRODUCT INDEX

FUNCTIONAL CROSS-REFERENCE

DEVICE SELECTION GUIDE

PACKAGING AND MARKING INFORMATION

LOGIC PURCHASING TOOL/ALTERNATE SOURCES

41

DEVICE SELECTION GUIDE

42

SECTION 4
DEVICE SELECTION GUIDE

CONTENTS
ABT Advanced BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
ABTE/ETL Advanced BiCMOS Technology/Enhanced Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . 413
AC/ACT Advanced CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415
AHC/AHCT Advanced High-Speed CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 423
ALB Advanced Low-Voltage BiCMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 429
ALS Advanced Low-Power Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 431
ALVC Advanced Low-Voltage CMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 437
ALVT Advanced Low-Voltage BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 443
AS Advanced Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 445
AUC Advanced Ultra-Low-Voltage CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 449
AUP Advanced Ultra-Low-Power CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 455
AVC Advanced Very-Low-Voltage CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 457
BCT BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 461
64BCT 64-Series BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 461
BTA Bus-Termination Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 465
CB3Q 2.5-V/3.3-V Low-Voltage High-Bandwidth Bus-Switch Crossbar Technology Logic . . . . . . . . . . . . 467
CB3T 2.5-V/3.3-V Low-Voltage Translator Bus-Switch Crossbar Technology Logic . . . . . . . . . . . . . . . . . . 469
CBT Crossbar Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471
CBT-C 5-V Bus-Switch Crossbar Technology Logic With 2-V Undershoot Protection . . . . . . . . . . . . . . . 475
CBTLV Low-Voltage Crossbar Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 477
CD4000 CMOS B-Series Integrated Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 479
74F Fast Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 483
FB+/BTL FutureBus+/Backplane Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 487
FCT Fast CMOS TTL Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 489
FIFO First-In, First-Out Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 497
GTL Gunning Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4101
GTLP Gunning Transceiver Logic Plus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4103
HC/HCT High-Speed CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4109
IEEE Std 1149.1 (JTAG) Boundary-Scan Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4119
Little Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4123
LS Low-Power Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4129
LV Low-Voltage CMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4135
LVC Low-Voltage CMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4139
LVT Low-Voltage BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4147
PCA/PCF I2C Inter-Integrated Circuit Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4153
S Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4155
SSTL Stub Series-Terminated Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4159
HSTL High-Speed Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4159
SSTU Stub Series-Terminated Ultra-Low-Voltage Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4161
SSTV/SSTVF Stub Series-Terminated Low-Voltage Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4165
TTL Transistor-Transistor Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4169
TVC Translation Voltage Clamp Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4173
VME VERSAmodule Eurocard Bus Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4175

43

DEVICE SELECTION GUIDE

ABT
Advanced BiCMOS Technology Logic
The ABT family, TIs second-generation family of BiCMOS bus-interface
products, is manufactured using a 0.8- BiCMOS process. It provides high
drive up to 64 mA and propagation delays in the 5-ns range, while maintaining
very low power consumption. ABT products are well suited for live-insertion
applications, with an Ioff specification of 0.1 mA and power-up 3-state (PU3S)
circuitry.
The ABT family offers series-damping-resistor options where reduced
transmission-line effects are required. Special ABT parts that provide
high-current drive (180 mA) for use with 25- transmission lines also are
offered. Advanced bus functions, such as UBT transceivers, emulate a wide
variety of bus-interface functions. Multiplexing options for memory
interleaving and bus upsizing or downsizing also are provided.
The ABT devices can be purchased in octal, Widebus, or Widebus+. The
Widebus and Widebus+ packages feature higher performance, with reduced
noise and flow-through pinout for easier board layout. Widebus+ devices offer
input bus-hold circuitry to eliminate the need for external pullup resistors for
floating inputs.
See www.ti.com/sc/logic for the most current data sheets.

45

DEVICE SELECTION GUIDE

ABT

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

MIL

PDIP

QFN

QFP

SOP

SSOP

SCBS182

SCBS183

SCBS098

SN74ABT125

14

Quad Bus Buffers

with 3-State Outputs

SN74ABT126

14

Quad Bus Buffers

with 3-State Outputs

SN74ABT240A

20

Octal Buffers/Drivers
with 3-State Outputs

SN74ABT241

20

Octal Buffers/Drivers
with 3-State Outputs

SN74ABT241A

20

Octal Buffers/Drivers
with 3-State Outputs

SN54ABT244

20

Octal Buffers and Line Drivers

with 3-State Outputs

SN74ABT244A

20

Octal Buffers and Line Drivers

with 3-State Outputs

SN74ABT245A

20

Octal Bus Transceivers

with 3-State Outputs

SN74ABT245B

20

Octal Bus Transceivers

with 3-State Outputs

SN74ABTH245

20

Octal Bus Transceivers

with 3-State Outputs

SN74ABT273

20

Octal D-Type Flip-Flops

with Clear

SN74ABT373

20

Octal Transparent D-Type

Latches with 3-State Outputs

SN54ABT374

20

Octal D-Type Edge-Triggered

Flip-Flops with 3-State Outputs

SN74ABT374A

20

Octal D-Type Edge-Triggered

Flip-Flops with 3-State Outputs

SN74ABT377

20

Octal D-Type Flip-Flops

with Enable

SN74ABT377A

20

Octal D-Type Flip-Flops

with Enable

SN74ABT533

20

Octal Inverting Transparent

Latches with 3-State Outputs

SN74ABT533A

20

Octal Inverting Transparent

Latches with 3-State Outputs

TQFP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

SOIC

SCBS184

SCBS184

SCBS099

SCBS099

SCBS081

SCBS185

SCBS155

SCBS081
SCBS663

SCBS111

SCBS111
SCBS156

SCBS156
SCBS186

SCBS186

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

46

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

ABT
AVAILABILITY

NO.
PINS

DESCRIPTION

SN74ABT534

20

Octal D-Type Inverting Flip-Flops

with 3-State Outputs

SN74ABT534A

20

Octal D-Type Inverting Flip-Flops

with 3-State Outputs

SN74ABT540

20

Inverting Octal Buffers and Line

Drivers with 3-State Outputs

SN54ABT541

20

Octal Buffers and Line Drivers

with 3-State Outputs

SN74ABT541B

20

Octal Buffers and Line Drivers

with 3-State Outputs

SN74ABT543

24

Octal Registered Transceivers

with 3-State Outputs

SN74ABT543A

24

Octal Registered Transceivers

with 3-State Outputs

SN74ABT573

20

Octal Transparent D-Type

Latches with 3-State Outputs

SN74ABT573A

20

Octal Transparent D-Type

Latches with 3-State Outputs

SN54ABT574

20

Octal Edge-Triggered D-Type

Flip-Flops with 3-State Outputs

SN74ABT574A

20

Octal Edge-Triggered D-Type

Flip-Flops with 3-State Outputs

SN74ABT620

20

Octal Bus Transceivers

with 3-State Outputs

SN74ABT623

20

Octal Bus Transceivers

with 3-State Outputs

SN74ABT640

20

SN74ABT646

DEVICE

MIL

PDIP

QFN

QFP

SOIC

SOP

SSOP

TQFP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE
SCBS187

SCBS187
SCBS188

SCBS093

SCBS093
SCAS422

SCBS157
SCBS190

SCBS190
SCBS191

SCBS114

Octal Bus Transceivers

with 3-State Outputs

SCBS104

24

Octal Registered Bus

Transceivers
with 3-State Outputs

SCBS068

SN74ABT646A

24

Octal Registered Bus

Transceivers
with 3-State Outputs

SCBS069

SN74ABT651

24

Octal Bus Transceivers and

Registers with 3-State Outputs

SCBS083

SN74ABT652A

24

Octal Bus Transceivers and

Registers with 3-State Outputs

SCBS072

SN74ABT657A

24

Octal Bus Transceivers

with Parity Generators/Checkers
and 3-State Outputs

SCBS192

SN54ABT821

24

10-Bit Bus-Interface Flip-Flops

with 3-State Outputs

SN74ABT821A

24

10-Bit Bus-Interface Flip-Flops

with 3-State Outputs

SCBS193

SN74ABT823

24

9-Bit Bus-Interface Flip-Flops

with 3-State Outputs

SCBS158

SN74ABT827

24

10-Bit Buffers/Drivers
with 3-State Outputs

SCBS191
SCBS113

SCBS193

SCBS159

47

DEVICE SELECTION GUIDE

ABT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SN74ABT833

24

8-Bit to 9-Bit Parity Bus

Transceivers

SN74ABT841

24

10-Bit Bus-Interface D-Type

Latches with 3-State Outputs

SN74ABT841A

24

10-Bit Bus-Interface D-Type

Latches with 3-State Outputs

SN74ABT843

24

9-Bit Bus-Interface D-Type

Latches with 3-State Outputs

SN74ABT853

24

8-Bit to 9-Bit Parity Bus

Transceivers

SN74ABT861

24

SN74ABT863

QFN

QFP

SOIC

SOP

SSOP

TQFP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE
SCBS195
SCBS196

SCBS196

SCBS197

SCBS198

10-Bit Transceivers
with 3-State Outputs

24

9-Bit Bus Transceivers

with 3-State Outputs

SN74ABT2240A

20

Octal Buffers and Line/MOS

Drivers with Series Damping
Resistors and 3-State Outputs

SCBS232

SN74ABT2241

20

Octal Buffers and Line/MOS

Drivers with Series Damping
Resistors and 3-State Outputs

SCBS233

SN74ABT2244A

20

Octal Buffers/Line Drivers

with Series Damping Resistors
and 3-State Outputs

SCBS106

SN74ABT2245

20

Octal Transceivers
and Line MOS Drivers
with Series Damping Resistors
and 3-State Outputs

SCBS234

SN74ABTR2245

20

Octal Transceivers
and Line MOS Drivers
with Series Damping Resistors
and 3-State Outputs

SN74ABT2827

24

10-Bit Buffers/Drivers
with Series Damping Resistors
and 3-State Outputs

SN74ABT2952A

24

Octal Bus Transceivers and

Registers with 3-State Outputs

SN74ABT5400A

28

11-Bit Line/Memory Drivers

with 3-State Outputs

SCBS661

SN74ABT5401

28

11-Bit Line/Memory Drivers

with 3-State Outputs

SCBS235

SN74ABT5402A

28

12-Bit Line/Memory Drivers

with 3-State Outputs

SCBS660

SN74ABT5403

28

12-Bit Line/Memory Drivers

with 3-State Outputs

SCBS236

SN74ABT16240A

48

16-Bit Buffers/Drivers
with 3-State Outputs

SCBS095

SN74ABT16241A

48

16-Bit Buffers/Drivers
with 3-State Outputs

SCBS096

SN74ABT16244A

48

16-Bit Buffers/Drivers
with 3-State Outputs

SCBS073

48

SCBS199

SCBS201

SCBS680

SCBS648

SCBS203

DEVICE SELECTION GUIDE

ABT

DEVICE

NO.
PINS

DESCRIPTION

SN74ABTH16244

48

16-Bit Buffers/Drivers
with 3-State Outputs

SN74ABT16245A

48

16-Bit Bus Transceivers

with 3-State Outputs

SN74ABTH16245

48

16-Bit Bus Transceivers

with 3-State Outputs

SN74ABTH16260

56

SN74ABT16373A

AVAILABILITY
MIL

PDIP

QFN

QFP

SOIC

SOP

SSOP

TQFP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

SCBS300

SCBS662

12-Bit to 24-Bit Multiplexed

D-Type Latches
with 3-State Outputs

48

16-Bit Transparent D-Type

Latches with 3-State Outputs

SCBS160

SN74ABT16374A

48

16-Bit Edge-Triggered D-Type

Flip-Flops with 3-State Outputs

SCBS205

SN74ABTH16460

56

4-to-1 Multiplexed/Demultiplexed
Transceivers
with 3-State Outputs

SCBS207

SN74ABT16470

56

16-Bit Registered Transceivers

with 3-State Outputs

SCBS085

SN74ABT16500B

56

18-Bit Universal Bus

Transceivers
with 3-State Outputs

SCBS057

SN74ABT16501

56

18-Bit Universal Bus

Transceivers
with 3-State Outputs

SCBS086

SN74ABT16540A

48

16-Bit Buffers/Drivers
with 3-State Outputs

SCBS208

SN74ABT16541A

48

16-Bit Buffers/Drivers
with 3-State Outputs

SCBS118

SN74ABT16543

56

16-Bit Registered Transceivers

with 3-State Outputs

SCBS087

SN74ABT16600

56

18-Bit Universal Bus

Transceivers
with 3-State Outputs

SCBS209

SN74ABT16601

56

18-Bit Universal Bus

Transceivers
with 3-State Outputs

SCBS210

SN74ABT16623

48

16-Bit Bus Transceivers

with 3-State Outputs

SCBS211

SN74ABT16640

48

16-Bit Bus Transceivers

with 3-State Outputs

SCBS107

SN74ABT16646

56

16-Bit Bus Transceivers and

Registers with 3-State Outputs

SCBS212

SN74ABT16652

56

16-Bit Bus Transceivers and

Registers with 3-State Outputs

SN74ABT16657

56

16-Bit Transceivers
with Parity Generators/Checkers
and 3-State Outputs

SCBS103

SN74ABT16821

56

20-Bit D-Type Flip-Flops

with 3-State Outputs

SCBS216

SN74ABT16823

56

18-Bit D-Type Flip-Flops

with 3-State Outputs

SCBS217

SCBS677

SCBS204

SCBS215

49

DEVICE SELECTION GUIDE

ABT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

QFN

QFP

SOIC

SOP

SSOP

TQFP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

SN74ABTH16823

56

18-Bit D-Type Flip-Flops

with 3-State Outputs

SN74ABT16825

56

18-Bit Buffers/Drivers
with 3-State Outputs

SN74ABT16827

56

20-Bit Buffers/Drivers
with 3-State Outputs

SN74ABT16833

56

Dual 8-Bit to 9-Bit

Parity Bus Transceivers

SN74ABT16841

56

20-Bit Bus-Interface D-Type

Latches with 3-State Outputs

SN74ABT16843

56

18-Bit Bus-Interface D-Type

Latches with 3-State Outputs

SCBS223

SN74ABT16853

56

Dual 8-Bit to 9-Bit

Parity Bus Transceivers

SCBS153

SN74ABT16863

56

18-Bit Bus-Interface Transceivers

with 3-State Outputs

SN74ABT16952

56

16-Bit Registered Transceivers

with 3-State Outputs

SN74ABTH25245

24

25- Octal Bus Transceivers

with 3-State Outputs

SN74ABTH32245

100

32-Bit Bus Transceivers

with 3-State Outputs

SN74ABTH32316

80

16-Bit Tri-Port
Universal Bus Exchangers

SN74ABTH32318

80

18-Bit Tri-Port
Universal Bus Exchangers

SN74ABTH32501

100

32-Bit Universal Bus

Transceivers
with 3-State Outputs

SCBS229

SN74ABTH32543

100

32-Bit Registered Bus

Transceivers
with 3-State Outputs

SCBS230

SN74ABT162244

48

16-Bit Buffers/Drivers
with Series Damping Resistors
and 3-State Outputs

SN74ABT162245

48

16-Bit Bus Transceivers

with Series Damping Resistors
and 3-State Outputs

SN74ABTH162245

48

16-Bit Bus Transceivers

with Series Damping Resistors
and 3-State Outputs

SN74ABTH162260

56

12-Bit to 24-Bit Multiplexed

D-Type Latches
with Series Damping Resistors
and 3-State Outputs

SN74ABTH162460

56

4-to-1 Multiplexed/Demultiplexed
Registered Transceivers
with 3-State Outputs

SN74ABT162500

56

18-Bit Universal Bus

Transceivers
with 3-State Outputs

410

SCBS664
SCBS218

SCBS097

SCBS222

SCBS225

SCBS082

SCBS251

SCBS220

SCBS228

SCBS179

SCBS180

SCBS238

SCBS239

SCBS712

SCBS240

SCBS241

SCBS242

DEVICE SELECTION GUIDE

ABT

DEVICE

NO.
PINS

DESCRIPTION

SN74ABT162501

56

18-Bit Universal Bus

Transceivers
with 3-State Outputs

SN74ABT162601

56

18-Bit Universal Bus

Transceivers
with 3-State Outputs

SN74ABT162823A

56

SN74ABT162825

AVAILABILITY
MIL

PDIP

QFN

QFP

SOIC

SOP

SSOP

TQFP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

SCBS243

SCBS247

18-Bit Bus-Interface Flip-Flops

with 3-State Outputs

SCBS666

56

18-Bit Buffers/Drivers
with Series Damping Resistors
and 3-State Outputs

SN74ABT162827A

56

20-Bit Buffers/Drivers
with Series Damping Resistors
and 3-State Outputs

SCBS248

SN74ABT162841

56

20-Bit Bus-Interface D-Type

Latches with 3-State Outputs

SCBS665

SCBS474

411

DEVICE SELECTION GUIDE

ABTE/ETL
Advanced BiCMOS Technology/
Enhanced Transceiver Logic
ABTE, with wide-noise-margin ETL logic levels on the A port, is backward
compatible with existing LVTTL/TTL logic. ABTE devices support the
ANSI/VITA 1-1994 specification (VME64), with tight tolerances for transition
times and skew. ABTE is manufactured using the 0.8- BiCMOS process and
provides A-port drive levels up to 90 mA for incident-wave switching. B-port
features include bus-hold circuitry, eliminating the need for external pullup
resistors and 25- series output resistors to dampen signal reflections. Other
features include a VCC BIAS pin and internal pullup resistors on control pins
for live-insertion protection.
The VMEbus International Trade Association (VITA) established a task group
in 1997 to specify a synchronous protocol to double data transfer rates to
320 Mbyte/s or more. The new specification, 2eSST (two-edge source
synchronous transfer), is based on the asynchronous 2eVME protocol.
Sustained data rates of 1 Gbyte/s, more then ten times faster than traditional
VME64 backplanes with single-edge signaling, are possible by taking
advantage of the 2eSST use of both edges of each VMEbus clock and the
21-slot VME320 star-configuration backplane.
TI, in conjunction with VITA, is designing a device to support the
2eSST protocol.
See www.ti.com/sc/logic for the most current data sheets and additional
information on this new device.

413

DEVICE SELECTION GUIDE

ABTE/ETL
AVAILABILITY

DEVICE

NO.
PINS

SN74ABTE16245

48

16-Bit Incident-Wave-Switching Bus Transceivers with 3-State Outputs

SN74ABTE16246

48

11-Bit Incident-Wave-Switching Bus Transceivers with 3-State and Open-Collector Outputs

DESCRIPTION

MIL

SSOP

TSSOP

LITERATURE
REFERENCE

SCBS226

SCBS227

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

414

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

AC/ACT
Advanced CMOS Logic
TI offers a full family of advanced CMOS logic, with a wide range of AC/ACT
devices for low-power and medium- to high-speed applications. Products
acquired from Harris Semiconductor provide many additional functions. Over
160 AC and ACT device types are available, including gates, latches,
flip-flops, buffers/drivers, counters, multiplexers, transceivers, and registered
transceivers. The AC/ACT family is a reliable, low-power logic family, with
24-mA output current drive at 5-V VCC (AC/ACT) and 12-mA output current
drive 3.3-V VCC (AC only).
The family includes standard end-pin products and center-pin VCC and
ground-configuration products with OEC circuitry. The OEC circuitry,
available only with the center-pin products, helps reduce simultaneous
switching noise associated with high-speed logic. The center-pin products
include 16-, 18-, and 20-bit bus-interface functions in the 48- and 56-pin shrink
small-outline package (SSOP) and thin shrink small-outline package
(TSSOP). These packages allow the designer to double functionality in the
same circuit board area or reduce the circuit board area by one-half.
The AC family offers CMOS inputs and outputs, while the ACT family offers
TTL inputs with CMOS outputs.
See www.ti.com/sc/logic for the most current data sheets.

415

DEVICE SELECTION GUIDE

AC

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

MIL

PDIP

SOIC

SOP

SSOP

TSSOP

LITERATURE
REFERENCE

CD74AC00

14

Quad 2-Input NAND Gates

SN74AC00

14

Quad 2-Input NAND Gates

CD74AC02

14

Quad 2-Input NOR Gates

SCHS224

CD74AC04

14

Hex Inverters

SCHS225

SN74AC04

14

Hex Inverters

CD74AC05

14

Hex Inverters with Open-Drain Outputs

SCHS225

CD74AC08

14

Quad 2-Input AND Gates

SCHS226

SN74AC08

14

Quad 2-Input AND Gates

CD74AC10

14

Triple 3-Input NAND Gates

SN74AC10

14

Triple 3-Input NAND Gates

SN74AC11

14

Triple 3-Input AND Gates

CD74AC14

14

Hex Schmitt-Trigger Inverters

SN74AC14

14

Hex Schmitt-Trigger Inverters

CD74AC20

14

Dual 4-Input NAND Gates

CD74AC32

14

Quad 2-Input OR Gates

SN74AC32

14

Quad 2-Input OR Gates

CD74AC74

14

Dual D-Type Flip-Flops with Set and Reset

SN74AC74

14

Dual D-Type Flip-Flops with Set and Reset

CD74AC86

14

Quad 2-Input Exclusive-OR Gates

SN74AC86

14

Quad 2-Input Exclusive-OR Gates

CD74AC109

16

Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset

SCHS282

CD74AC112

16

Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset

SCHS282

CD74AC138

16

3-to-8 Line Inverting Decoders/Demultiplexers

SCHS234

CD74AC139

16

Dual 2-to-4 Line Decoders/Demultiplexers

SCHS235

CD74AC151

16

1-of-8 Data Selectors/Multiplexers

SCHS236

CD74AC153

16

Dual 1-of-4 Data Selectors/Multiplexers

SCHS237

CD74AC157

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SCHS283

CD74AC158

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SCHS283

CD74AC161

16

Synchronous 4-Bit Binary Counters

SCHS239

CD74AC163

16

Synchronous 4-Bit Binary Counters

SCHS284

CD74AC164

14

8-Bit Serial-In, Parallel-Out Shift Registers

SCHS240

CD74AC174

16

Hex D-Type Flip-Flops with Clear

SCHS241

commercial package description and availability

DSBGA (die-size ball grid array)
PDIP (plastic dual-in-line package)
YEA, YZA = 5/6/8 pins
YEP, YZP = 5/6/8 pins

LFBGA (low-profile fine-pitch ball grid array)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

GQN, ZQN = 20 pins
GQL, ZQL = 56 pins (also includes 48-pin functions)

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins
PLCC (plastic leaded chip carrier)
FN = 20/28/44/68/84 pins
SOIC (small-outline integrated circuit)
D = 8/14/16 pins
DW = 16/18/20/24/28 pins

SOT (small-outline transistor)

LQFP (low-profile quad flatpack)

PZA = 80 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

schedule
= Now = Planned

PK
DBV
DCY
DCK

JEDEC reference for wafer chip scale package (WCSP)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

See Appendix A for package information

on CD54/74AC devices.

416

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)

SCHS223

SCAS524

SCAS519

SCAS536
SCHS227
SCAS529
SCAS532
SCHS228

SCAS522
SCHS229
SCHS230

SCAS528
SCHS231

SCAS521
SCHS232

SCAS533

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT
DB
DBQ
DL

= 8 pins
= 14/16/20/24/28/30/38 pins
= 16/20/24 pins
= 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

AC
AVAILABILITY

DEVICE

NO.
PINS

CD74AC175

16

Quad D-Type Flip-Flops with Clear

CD74AC238

16

3-to-8 Line Decoders/Demultiplexers

CD74AC240

20

Octal Buffers/Drivers with 3-State Outputs

SN74AC240

20

Octal Buffers/Drivers with 3-State Outputs

CD74AC241

20

Octal Buffers/Drivers with 3-State Outputs

SN74AC241

20

Octal Buffers/Drivers with 3-State Outputs

CD74AC244

20

Octal Buffers and Line Drivers with 3-State Outputs

SN74AC244

20

Octal Buffers and Line Drivers with 3-State Outputs

CD74AC245

20

Octal Bus Transceivers with 3-State Outputs

SN74AC245

20

Octal Bus Transceivers with 3-State Outputs

CD74AC251

16

1-of-8 Data Selectors/Multiplexers with 3-State Outputs

SCHS246

CD74AC253

16

Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs

SCHS247

CD74AC257

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SCHS248

CD74AC273

20

Octal D-Type Flip-Flops with Clear

SCHS249

CD74AC280

14

9-Bit Odd/Even Parity Generators/Checkers

SCHS250

CD74AC283

16

9-Bit Binary Full Adders with Fast Carry

SCHS251

CD74AC299

20

8-Bit Universal Shift/Storage Registers

SCHS288

CD74AC323

20

8-Bit Universal Shift/Storage Registers

SCHS288

CD74AC373

20

Octal Transparent D-Type Latches with 3-State Outputs

SN74AC373

20

Octal Transparent D-Type Latches with 3-State Outputs

CD74AC374

20

Octal Transparent D-Type Latches with 3-State Outputs

SN74AC374

20

Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs

SN74AC533

20

Octal Inverting Transparent Latches with 3-State Outputs

CD74AC534

20

Octal D-Type Inverting Flip-Flops with 3-State Outputs

SN74AC534

20

Octal D-Type Inverting Flip-Flops with 3-State Outputs

CD74AC540

20

Inverting Octal Buffers and Line Drivers with 3-State Outputs

CD74AC541

20

Octal Buffers and Line Drivers with 3-State Outputs

CD74AC563

20

Octal Inverting Transparent Latches with 3-State Outputs

SN74AC563

20

Octal Inverting Transparent Latches with 3-State Outputs

SCAS552

SN74AC564

20

Octal D-Type Inverting Flip-Flops with 3-State Outputs

SCAS551

CD74AC573

20

Octal Transparent D-Type Latches with 3-State Outputs

SN74AC573

20

Octal Transparent D-Type Latches with 3-State Outputs

CD74AC574

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SN74AC574

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

CD74AC623

20

Octal Bus Transceivers with 3-State Outputs

CD74AC646

24

Octal Registered Bus Transceivers with 3-State Outputs

CD74AC652

24

Octal Bus Transceivers and Registers with 3-State Outputs

74AC11000

16

Quad 2-Input NAND Gates

74AC11004

20

Hex Inverters

74AC11008

16

Quad 2-Input AND Gates

74AC11032

16

Quad 2-Input OR Gates

74AC11074

14

Dual D-Type Flip-Flops with Set and Reset

74AC11086

16

Quad 2-Input Exclusive-OR Gates

74AC11138

16

3-to-8 Line Inverting Decoders/Demultiplexers

DESCRIPTION

MIL

PDIP

SOIC

SOP

SSOP

TSSOP

SCHS242

SCHS234
SCHS287

SCAS512
SCHS287

SCAS514
SCHS245

SCAS461

SCHS289

SCAS513
SCHS287

SCAS540
SCHS290

LITERATURE
REFERENCE

SCAS543
SCAS555
SCHS290

SCAS554

SCHS285

SCHS285
SCHS291

SCHS291
SCAS542
SCHS292
SCAS541
SCHS286

SCHS293

SCHS294

SCLS054
SCHS033

SCAS014
SCAS007

SCAS499
SCAS081

SCAS042

417

DEVICE SELECTION GUIDE

AC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

TSSOP

LITERATURE
REFERENCE

74AC11175

20

Quad D-Type Flip-Flops with Clear

74AC11240

24

Octal Buffers/Drivers with 3-State Outputs

74AC11244

24

Octal Buffers and Line Drivers with 3-State Outputs

74AC11245

24

Octal Bus Transceivers with 3-State Outputs

74AC11257

20

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

74AC16244

48

16-Bit Buffers/Drivers with 3-State Outputs

SCAS120

74AC16245

48

16-Bit Bus Transceivers with 3-State Outputs

SCAS235

74AC16373

48

16-Bit Transparent D-Type Latches with 3-State Outputs

SCAS121

74AC16374

48

16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SCAS123

74AC16652

56

16-Bit Bus Transceivers and Registers with 3-State Outputs

SCAS242

418

SCAS090

SCAS448

SCAS171
SCAS010

SCAS049

DEVICE SELECTION GUIDE

ACT

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

MIL

PDIP

SOIC

SOP

SSOP

TSSOP

LITERATURE
REFERENCE

CD74ACT00

14

Quad 2-Input NAND Gates

SN74ACT00

14

Quad 2-Input NAND Gates

CD74ACT02

14

Quad 2-Input NOR Gates

SCHS224

CD74ACT04

14

Hex Inverters

SCHS225

SN74ACT04

14

Hex Inverters

CD74ACT05

14

Hex Inverters with Open-Drain Outputs

SCHS225

CD74ACT08

14

Quad 2-Input AND Gates

SCHS226

SN74ACT08

14

Quad 2-Input AND Gates

CD74ACT10

14

Triple 3-Input NAND Gates

SN74ACT10

14

Triple 3-Input NAND Gates

SN74ACT11

14

Triple 3-Input AND Gates

CD74ACT14

14

Hex Schmitt-Trigger Inverters

SN74ACT14

14

Hex Schmitt-Trigger Inverters

CD74ACT20

14

Dual 4-Input NAND Gates

CD74ACT32

14

Quad 2-Input OR Gates

SN74ACT32

14

Quad 2-Input OR Gates

CD74ACT74

14

Dual D-Type Flip-Flops with Set and Reset

SN74ACT74

14

Dual D-Type Flip-Flops with Set and Reset

CD74ACT86

14

Quad 2-Input Exclusive-OR Gates

SN74ACT86

14

Quad 2-Input Exclusive-OR Gates

CD74ACT109

16

Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset

SCHS233

CD74ACT112

16

Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset

SCHS233

CD74ACT138

16

3-to-8 Line Inverting Decoders/Demultiplexers

SCHS234

CD74ACT139

16

Dual 2-to-4 Line Decoders/Demultiplexers

SCHS235

CD74ACT151

16

1-of-8 Data Selectors/Multiplexers

SCHS236

CD74ACT153

16

Dual 1-of-4 Data Selectors/Multiplexers

CD74ACT157

16

Quad 2-to-4 Line Data Selectors/Multiplexers

CD74ACT158

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SCHS238

CD74ACT161

16

Synchronous 4-Bit Binary Counters

SCHS284

CD74ACT163

16

Synchronous 4-Bit Binary Counters

SCHS299

CD74ACT164

14

8-Bit Serial-In, Parallel-Out Shift Registers

SCHS240

CD74ACT174

16

Hex D-Type Flip-Flops with Clear

SCHS241

commercial package description and availability

DSBGA (die-size ball grid array)
PDIP (plastic dual-in-line package)
YEA, YZA = 5/6/8 pins
YEP, YZP = 5/6/8 pins

LFBGA (low-profile fine-pitch ball grid array)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

GQN, ZQN = 20 pins
GQL, ZQL = 56 pins (also includes 48-pin functions)

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins
PLCC (plastic leaded chip carrier)
FN = 20/28/44/68/84 pins
SOIC (small-outline integrated circuit)
D = 8/14/16 pins
DW = 16/18/20/24/28 pins

SOT (small-outline transistor)

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

schedule
= Now = Planned

PK
DBV
DCY
DCK

JEDEC reference for wafer chip scale package (WCSP)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

See Appendix A for package information

on CD54/74ACT devices.

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

SCHS223

SCAS523

SCAS518

SCAS535
SCHS227
SCAS526
SCAS531
SCHS228

SCAS557
SCHS229
SCHS230

SCAS530
SCHS231

SCAS520
SCHS232

SCAS534

SCHS237

SCHS283

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT
DB
DBQ
DL

= 8 pins
= 14/16/20/24/28/30/38 pins
= 16/20/24 pins
= 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

419

DEVICE SELECTION GUIDE

ACT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

TSSOP

LITERATURE
REFERENCE

CD74ACT175

16

Quad D-Type Flip-Flops with Clear

CD74ACT238

16

3-to-8 Line Decoders/Demultiplexers

CD74ACT240

20

Octal Buffers/Drivers with 3-State Outputs

SN74ACT240

20

Octal Buffers/Drivers with 3-State Outputs

CD74ACT241

20

Octal Buffers/Drivers with 3-State Outputs

SN74ACT241

20

Octal Buffers/Drivers with 3-State Outputs

CD74ACT244

20

Octal Buffers and Line Drivers with 3-State Outputs

SN74ACT244

20

Octal Buffers and Line Drivers with 3-State Outputs

CD74ACT245

20

Octal Bus Transceivers with 3-State Outputs

SN74ACT245

20

Octal Bus Transceivers with 3-State Outputs

CD74ACT253

16

Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs

SCHS247

CD74ACT257

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SCHS248

CD74ACT258

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

CD74ACT273

20

Octal D-Type Flip-Flops with Clear

CD74ACT280

14

9-Bit Odd/Even Parity Generators/Checkers

SCHS250

CD74ACT283

16

9-Bit Binary Full Adders with Fast Carry

SCHS251

CD74ACT297

16

Digital Phase-Locked Loops

SCHS297

CD74ACT299

20

8-Bit Universal Shift/Storage Registers

SCHS288

CD74ACT373

20

Octal Transparent D-Type Latches with 3-State Outputs

SN74ACT373

20

Octal Transparent D-Type Latches with 3-State Outputs

CD74ACT374

20

Octal Transparent D-Type Latches with 3-State Outputs

SN74ACT374

20

Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs

SN74ACT533

20

Octal Inverting Transparent Latches with 3-State Outputs

SN74ACT534

20

Octal D-Type Inverting Flip-Flops with 3-State Outputs

CD74ACT540

20

Inverting Octal Buffers and Line Drivers with 3-State Outputs

CD74ACT541

20

Octal Buffers and Line Drivers with 3-State Outputs

SN74ACT563

20

Octal Inverting Transparent Latches with 3-State Outputs

SN74ACT564

20

Octal D-Type Inverting Flip-Flops with 3-State Outputs

CD74ACT573

20

Octal Transparent D-Type Latches with 3-State Outputs

SN74ACT573

20

Octal Transparent D-Type Latches with 3-State Outputs

CD74ACT574

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SN74ACT574

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

CD74ACT623

20

Octal Bus Transceivers with 3-State Outputs

SCHS286

CD74ACT646

24

Octal Registered Bus Transceivers with 3-State Outputs

SCHS293

CD74ACT652

24

Octal Bus Transceivers and Registers with 3-State Outputs

SCHS294

SN74ACT1071

14

10-Bit Bus-Termination Networks with Bus Hold

SN74ACT1073

20

16-Bit Bus-Termination Networks with Bus Hold

SN74ACT1284

20

7-Bit Bus Interfaces with 3-State Outputs

74ACT11000

16

Quad 2-Input NAND Gates

74ACT11004

20

Hex Inverters

74ACT11008

16

Quad 2-Input AND Gates

74ACT11030

14

8-Input NAND Gates

74ACT11032

16

Quad 2-Input OR Gates

74ACT11074

14

Dual D-Type Flip-Flops with Set and Reset

420

SCHS242

SCHS234
SCHS244

SCAS515
SCHS287
SCAS516
SCHS287

SCAS517
SCHS245

SCAS452

SCHS248

SCHS249

SCHS289

SCAS539

SCAS553

SCAS544
SCHS290

SCAS556
SCHS285

SCHS285
SCAS550
SCAS549
SCHS291

SCAS538
SCHS292
SCAS537

SCAS192
SCAS193

SCAS215

SCAS013

SCAS008

SCAS459
SCAS002

SCLS050

SCAS498

DEVICE SELECTION GUIDE

ACT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

TSSOP

LITERATURE
REFERENCE

SCAS175

74ACT11139

16

Dual 2-to-4 Line Decoders/Demultiplexers

74ACT11240

24

Octal Buffers/Drivers with 3-State Outputs

74ACT11244

24

Octal Buffers and Line Drivers with 3-State Outputs

SCAS006

74ACT11245

24

Octal Bus Transceivers with 3-State Outputs

SCAS031

74ACT11257

20

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

74ACT11286

14

9-Bit Parity Generators/Checkers with Bus-Driver Parity I/O Port

74ACT11373

24

Octal Transparent D-Type Latches with 3-State Outputs

74ACT11374

24

Octal Transparent D-Type Latches with 3-State Outputs

74ACT11543

28

Octal Registered Transceivers with 3-State Outputs

74ACT11652

28

Octal Bus Transceivers and Registers with 3-State Outputs

74ACT16240

48

16-Bit Buffers/Drivers with 3-State Outputs

74ACT16244

48

16-Bit Buffers/Drivers with 3-State Outputs

SCAS116

74ACT16245

48

16-Bit Bus Transceivers with 3-State Outputs

SCAS097

74ACT16373

48

16-Bit Transparent D-Type Latches with 3-State Outputs

SCAS122

74ACT16374

48

16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SCAS124

74ACT16541

48

16-Bit Buffers/Drivers with 3-State Outputs

74ACT16543

56

16-Bit Registered Transceivers with 3-State Outputs

74ACT16623

48

16-Bit Bus Transceivers with 3-State Outputs

SCAS152

74ACT16646

56

16-Bit Bus Transceivers and Registers with 3-State Outputs

SCAS127

74ACT16651

56

16-Bit Bus Transceivers and Registers with 3-State Outputs

SCAS449

74ACT16652

56

16-Bit Bus Transceivers and Registers with 3-State Outputs

SCAS128

74ACT16657

56

16-Bit Transceivers with Parity Generators/Checkers and 3-State Outputs

SCAS164

74ACT16823

56

18-Bit D-Type Flip-Flops with 3-State Outputs

SCAS160

74ACT16825

56

18-Bit Buffers/Drivers with 3-State Outputs

SCAS155

74ACT16827

56

20-Bit Buffers/Drivers with 3-State Outputs

SCAS163

74ACT16841

56

20-Bit Bus-Interface D-Type Latches with 3-State Outputs

SCAS174

74ACT16861

56

20-Bit Bus Transceivers with 3-State Outputs

SCAS197

74ACT16863

56

18-Bit Bus-Interface Transceivers with 3-State Outputs

SCAS162

74ACT16952

56

16-Bit Registered Transceivers with 3-State Outputs

SCAS159

SCAS210

SCAS053
SCAS069
SCAS015
SCAS217

SCAS136

SCAS087
SCAS137

SCAS208

SCAS126

421

DEVICE SELECTION GUIDE

AHC/AHCT
Advanced High-Speed CMOS Logic
The AHC/AHCT logic family provides a natural migration path for HCMOS
users who need more speed in low-power, low-noise, and low-drive
applications. The AHC logic family consists of basic gates, octals, and 16-bit
Widebus functions. TI also offers single-gate solutions, designated with 1G
in the device name.
Performance characteristics of the AHC family are:

Speed Typical propagation delays of 5.2 ns (octals), about three times

faster than HC devices. At 5-V VCC, AHC devices are the quick and quiet
solution for higher-speed operation.
Low noise The AHC family allows designers to combine the low-noise
characteristics of HCMOS devices with todays performance levels,
without the overshoot and undershoot problems typical of higher-drive
devices required to get AHC speeds.
Low power The AHC family CMOS technology exhibits low power
consumption (40-mA max static current, one-half that of HCMOS).
Drive Output-drive current is 8 mA at 5-V VCC (AHC/AHCT) and 4 mA
at 3.3-V VCC (AHC only).
The AHC family offers CMOS inputs and outputs, while the AHCT family
offers TTL inputs with CMOS outputs.
Packaging AHC devices are available in small-outline integrated circuit
(SOIC), small-outline package (SOP), shrink small-outline package
(SSOP), plastic dual in-line package (PDIP), thin shrink small-outline
package (TSSOP), thin very small-outline package (TVSOP), and 5-pin
small-outline transistor (SOT) package. Selected AHC devices are
available in military versions (SN54AHCxx).

Using TI products offers several business advantages:

Competitive advantage AHC and competitors VHC devices have

equivalent specifications; therefore, AHC devices are drop-in
replacements offering alternate sources. With TIs production capacity,
delivery performance, and competitive prices, AHC devices are among
the most economical, easy-to-use, and readily available logic products.

See www.ti.com/sc/logic for the most current data sheets.

423

DEVICE SELECTION GUIDE

AHC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

QFN

SOIC

SOP

SOT

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE

SN74AHC1G00

Single 2-Input NAND Gates

SCLS313

SN74AHC1G02

Single 2-Input NOR Gates

SCLS342

SN74AHC1G04

Single Inverters

SCLS318

SN74AHC1GU04

Single Inverters

SCLS343

SN74AHC1G08

Single 2-Input AND Gates

SCLS314

SN74AHC1G14

Single Schmitt-Trigger Inverters

SCLS321

SN74AHC1G32

Single 2-Input OR Gates

SCLS317

SN74AHC1G86

Single 2-Input Exclusive-OR Gates

SCLS323

SN74AHC1G125

Single Bus Buffers with 3-State Outputs

SCLS377

SN74AHC1G126

Single Bus Buffers with 3-State Outputs

SN74AHC00

14

Quad 2-Input NAND Gates

SCLS227

SN74AHC02

14

Quad 2-Input NOR Gates

SCLS254

SN74AHC04

14

Hex Inverters

SCLS231

SN74AHCU04

14

Hex Unbuffered Inverters

SCLS234

SN74AHC05

14

Hex Inverters with Open-Drain Outputs

SCLS357

SN74AHC08

14

Quad 2-Input AND Gates

SCLS236

SN74AHC14

14

Hex Schmitt-Trigger Inverters

SCLS238

SN74AHC32

14

Quad 2-Input OR Gates

SCLS247

SN74AHC74

14

Dual D-Type Flip-Flops with Set and Reset

SCLS255

SN74AHC86

14

Quad 2-Input Exclusive-OR Gates

SCLS249

SN74AHC123A

16

Dual Retriggerable Monostable Multivibrators

with Reset

SCLS352

SN74AHC125

14

Quad Bus Buffers with 3-State Outputs

SN74AHC126

14

Quad Bus Buffers with 3-State Outputs

SN74AHC132

14

Quad 2-Input NAND Gates with Schmitt-Trigger Inputs

SN74AHC138

16

3-to-8 Line Inverting Decoders/Demultiplexers

SN74AHC139

16

Dual 2-to-4 Line Decoders/Demultiplexers

SN74AHC157

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SN74AHC158

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SN74AHC174

16

Hex D-Type Flip-Flops with Clear

SN74AHC240

20

Octal Buffers/Drivers with 3-State Outputs

SN74AHC244

20

Octal Buffers and Line Drivers with 3-State Outputs

SCLS379

SCLS256

SCLS257

SCLS365

SCLS258

SCLS259

SCLS345

SCLS346

SCLS425

SCLS251

SCLS226

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

424

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

AHC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

QFN

SOIC

SOP

SOT

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE

SCLS230

SN74AHC245

20

Octal Bus Transceivers with 3-State Outputs

SN74AHC273

20

Octal D-Type Flip-Flops with Clear

SCLS376

SN74AHC367

16

Hex Buffers/Line Drivers with 3-State Outputs

SCLS424

SN74AHC373

20

Octal Transparent D-Type Latches with 3-State Outputs

SCLS235

SN74AHC374

20

Octal D-Type Edge-Triggered Flip-Flops

with 3-State Outputs

SCLS240

SN74AHC540

20

Inverting Octal Buffers and Line Drivers

with 3-State Outputs

SCLS260

SN74AHC541

20

Octal Buffers and Line Drivers with 3-State Outputs

SCLS261

SN74AHC573

20

Octal Transparent D-Type Latches with 3-State Outputs

SCLS242

SN74AHC574

20

Octal Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SCLS244

SN74AHC594

16

8-Bit Shift Registers with Output Registers

SN74AHC595

16

8-Bit Shift Registers with 3-State Output Registers

SN74AHC16240

48

16-Bit Buffers/Drivers with 3-State Outputs

SCLS326

SN74AHC16244

48

16-Bit Buffers/Drivers with 3-State Outputs

SCLS327

SN74AHC16373

48

16-Bit Transparent D-Type Latches

with 3-State Outputs

SCLS329

SN74AHC16374

48

16-Bit Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SCLS330

SN74AHC16540

48

16-Bit Buffers/Drivers with 3-State Outputs

SCLS331

SN74AHC16541

48

16-Bit Buffers/Drivers with 3-State Outputs

SCLS332

SCLS423
SCLS373

425

DEVICE SELECTION GUIDE

AHCT

DEVICE

NO.
PINS

SN74AHCT1G00

SN74AHCT1G02
SN74AHCT1G04

DESCRIPTION

AVAILABILITY
MIL

PDIP

QFN

SOIC

SOT

Single 2-Input NAND Gates

SCLS316

Single 2-Input NOR Gates

SCLS341

Single Inverters

SCLS319

SN74AHCT1G08

Single 2-Input AND Gates

SCLS315

SN74AHCT1G14

Single Schmitt-Trigger Inverters

SCLS322

SN74AHCT1G32

Single 2-Input OR Gates

SCLS320

SN74AHCT1G86

Single 2-Input Exclusive-OR Gates

SCLS324

SN74AHCT1G125

Single Bus Buffers with 3-State Outputs

SCLS378

SN74AHCT1G126

Single Bus Buffers with 3-State Outputs

SCLS380

SN74AHCT00

14

Quad 2-Input NAND Gates

SCLS229

SN74AHCT02

14

Quad 2-Input NOR Gates

SCLS262

SN74AHCT04

14

Hex Inverters

SCLS232

SN74AHCT08

14

Quad 2-Input AND Gates

SCLS237

SN74AHCT14

14

Hex Schmitt-Trigger Inverters

SCLS246

SN74AHCT32

14

Quad 2-Input OR Gates

SCLS248

SN74AHCT74

14

Dual D-Type Flip-Flops with Set and Reset

SCLS263

SN74AHCT86

14

Quad 2-Input Exclusive-OR Gates

SCLS250

SN74AHCT123A

16

Dual Retriggerable Monostable Multivibrators

with Reset

SCLS420

SN74AHCT125

14

Quad Bus Buffers with 3-State Outputs

SCLS264

SN74AHCT126

14

Quad Bus Buffers with 3-State Outputs

SCLS265

SN74AHCT132

14

Quad 2-Input NAND Gates with Schmitt-Trigger Inputs

SCLS366

SN74AHCT138

16

3-to-8 Line Inverting Decoders/Demultiplexers

SCLS266

SN74AHCT139

16

Dual 2-to-4 Line Decoders/Demultiplexers

SCLS267

SN74AHCT157

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SCLS347

SN74AHCT158

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SCLS348

SN74AHCT174

16

Hex D-Type Flip-Flops with Clear

SCLS419

SN74AHCT240

20

Octal Buffers/Drivers with 3-State Outputs

SN74AHCT244

20

Octal Buffers and Line Drivers with 3-State Outputs

SCLS228

SN74AHCT245

20

Octal Bus Transceivers with 3-State Outputs

SCLS233

SN74AHCT273

20

Octal D-Type Flip-Flops with Clear

SCLS375

SN74AHCT367

16

Hex Buffers/Line Drivers with 3-State Outputs

SCLS418

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE

SOP

SCLS252

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

426

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

AHCT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

QFN

SOIC

SOP

SOT

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE

SN74AHCT373

20

Octal Transparent D-Type Latches

with 3-State Outputs

SN74AHCT374

20

Octal D-Type Edge-Triggered Flip-Flops

with 3-State Outputs

SCLS241

SN74AHCT540

20

Inverting Octal Buffers and Line Drivers

with 3-State Outputs

SCLS268

SN74AHCT541

20

Octal Buffers and Line Drivers with 3-State Outputs

SN74AHCT573

20

Octal Transparent D-Type Latches

with 3-State Outputs

SN74AHCT574

20

Octal Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SN74AHCT594

16

8-Bit Shift Registers with Output Registers

SN74AHCT595

16

8-Bit Shift Registers with 3-State Output Registers

SN74AHCT16240

48

SN74AHCT16244
SN74AHCT16245

SCLS139

SCLS269

SCLS243

SCLS245

16-Bit Buffers/Drivers with 3-State Outputs

SCLS333

48

16-Bit Buffers/Drivers with 3-State Outputs

SCLS334

48

16-Bit Bus Transceivers with 3-State Outputs

SCLS335

SN74AHCT16373

48

16-Bit Transparent D-Type Latches

with 3-State Outputs

SCLS336

SN74AHCT16374

48

16-Bit Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SCLS337

SN74AHCT16540

48

16-Bit Buffers/Drivers with 3-State Outputs

SCLS338

SN74AHCT16541

48

16-Bit Buffers/Drivers with 3-State Outputs

SCLS339

SCLS417
SCLS374

427

DEVICE SELECTION GUIDE

ALB
Advanced Low-Voltage BiCMOS Logic
The specially designed 3.3-V ALB family uses 0.6- BiCMOS process
technology for bus-interface functions. ALB provides 25-mA drive at 3.3 V with
maximum propagation delays of 2.2 ns, making it one of TIs fastest logic
families. The inputs have clamping diodes to limit overshoot and undershoot.
The ALB family currently is available in two functions with Widebus and
Shrink Widebus footprints, with advanced packaging options such as shrink
small-outline package (SSOP), thin shrink small-outline package (TSSOP),
and thin very small-outline package (TVSOP).
See www.ti.com/sc/logic for the most current data sheets.

429

DEVICE SELECTION GUIDE

ALB

DEVICE

NO.
PINS

SN74ALB16244

48

SN74ALB16245

48

AVAILABILITY
SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE

16-Bit Buffers/Drivers with 3-State Outputs

SCBS647

16-Bit Bus Transceivers with 3-State Outputs

SCBS678

DESCRIPTION

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

430

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

ALS
Advanced Low-Power Schottky Logic
The ALS family provides over 140 bipolar logic functions.
This family, combined with the AS family, can be used to optimize systems
through performance budgeting. By using AS in speed-critical paths and ALS
where speed is less critical, designers can optimize speed and
power performance in bipolar designs.
The ALS family includes gates, flip-flops, counters, drivers, transceivers,
registered transceivers, readback latches, clock drivers, register files,
and multiplexers.
See www.ti.com/sc/logic for the most current data sheets.

431

DEVICE SELECTION GUIDE

ALS

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

MIL

PDIP

SOIC

SOP

SSOP

LITERATURE
REFERENCE

SDAS187

SN74ALS00A

14

Quad 2-Input NAND Gates

SN74ALS02A

14

Quad 2-Input NOR Gates

SN74ALS03B

14

Quad 2-Input NAND Gates with Open-Collector Outputs

SN74ALS04B

14

Hex Inverters

SDAS063

SN74ALS05A

14

Hex Inverters with Open-Collector Outputs

SDAS190

SN74ALS08

14

Quad 2-Input AND Gates

SDAS191

SN74ALS09

14

Quad 2-Input AND Gates with Open-Collector Outputs

SDAS084

SN74ALS10A

14

Triple 3-Input NAND Gates

SDAS002

SN74ALS11A

14

Triple 3-Input AND Gates

SDAS009

SN74ALS20A

14

Dual 4-Input NAND Gates

SN74ALS21A

14

Dual 4-Input AND Gates

SDAS085

SN74ALS27A

14

Triple 3-Input NOR Gates

SDAS112

SN74ALS30A

14

8-Input NAND Gates

SDAS010

SN74ALS32

14

Quad 2-Input OR Gates

SDAS113

SN74ALS33A

14

Quad 2-Input NOR Gates

SN74ALS35A

14

Hex Noninverters with Open-Collector Outputs

SN74ALS37A

14

Quad 2-Input NAND Gates

SDAS195

SN74ALS38B

14

Quad 2-Input NAND Gates

SDAS196

SN74ALS74A

14

Dual D-Type Flip-Flops with Set and Reset

SDAS143

SN74ALS86

14

Quad 2-Input Exclusive-OR Gate

SDAS006

SN74ALS109A

16

Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset

SDAS198

SN74ALS112A

16

Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset

SDAS199

SN74ALS133

16

13-Input NAND Gates

SDAS202

SN74ALS137A

16

3-to-8 Line Decoders/Demultiplexers with Address Latches

SDAS203

SN74ALS138A

16

3-to-8 Line Inverting Decoders/Demultiplexers

SDAS055

SN74ALS139

16

Dual 2-to-4 Line Decoders/Demultiplexers

SDAS204

SN74ALS151

16

1-of-8 Data Selectors/Multiplexers

SDAS205

SN74ALS153

16

Dual 1-of-4 Data Selectors/Multiplexers

SDAS206

SN74ALS156

16

Dual 2-to-4 Line Decoders/Demultiplexers with Open-Collector Outputs

SN74ALS157A

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SDAS081

SN74ALS158

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SDAS081

SN74ALS161B

16

Synchronous 4-Bit Binary Counters

SDAS024

SDAS111
SDAS013

SDAS192

SDAS034
SDAS011

SDAS099

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

432

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

ALS

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

LITERATURE
REFERENCE

SDAS024

SN74ALS163B

16

Synchronous 4-Bit Binary Counters

SN74ALS164A

14

8-Bit Serial-In, Parallel-Out Shift Registers

SN74ALS165

16

8-Bit Parallel-In, Serial-Out Shift Registers

SN74ALS166

16

8-Bit Parallel-Load Shift Registers

SN74ALS169B

16

Synchronous 4-Bit Up/Down Binary Counters

SDAS125

SN74ALS174

16

Hex D-Type Flip-Flops with Clear

SDAS207

SN74ALS175

16

Quad D-Type Flip-Flops with Clear

SDAS207

SN74ALS191A

16

Presettable Synchronous 4-Bit Up/Down Binary Counters

SDAS210

SN54ALS193

16

Presettable Synchronous 4-Bit Up/Down Binary Counters

SN74ALS193A

16

Presettable Synchronous 4-Bit Up/Down Binary Counters

SN74ALS240A

20

Octal Buffers/Drivers with 3-State Outputs

SDAS214

SN74ALS240A-1

20

Octal Buffers/Drivers with 3-State Outputs

SDAS214

SN74ALS241C

20

Octal Buffers/Drivers with 3-State Outputs

SDAS153

SN74ALS243A

14

Quad Bus Transceivers with 3-State Outputs

SDAS069

SN74ALS244C

20

Octal Buffers and Line Drivers with 3-State Outputs

SN74ALS244C-1

20

Octal Buffers and Line Drivers with 3-State Outputs

SN74ALS245A

20

Octal Bus Transceivers with 3-State Outputs

SN74ALS245A-1

20

Octal Bus Transceivers with 3-State Outputs

SDAS272

SN74ALS251

16

1-of-8 Data Selectors/Multiplexers with 3-State Outputs

SDAS215

SN74ALS253

16

Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs

SDAS216

SN74ALS257

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SN74ALS257A

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SN74ALS258

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SN74ALS258A

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SN74ALS259

16

8-Bit Addressable Latches

SN74ALS273

20

Octal D-Type Flip-Flops with Clear

SN74ALS280

14

9-Bit Odd/Even Parity Generators/Checkers

SN74ALS299

20

8-Bit Universal Shift/Storage Registers

SN74ALS323

20

8-Bit Universal Shift/Storage Registers

SN74ALS373

20

Octal Transparent D-Type Latches with 3-State Outputs

SN74ALS373A

20

Octal Transparent D-Type Latches with 3-State Outputs

SN74ALS374A

20

Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs

SN74ALS518

20

8-Bit Identity Comparators (P = Q)

with Open-Collector Outputs and Input Pullup Resistors

SN74ALS520

20

8-Bit Identity Comparators (P = Q) with Input Pullup Resistors

SN74ALS521

20

8-Bit Identity Comparators (P = Q)

SN74ALS533A

20

Octal Inverting Transparent Latches with 3-State Outputs

SN74ALS534A

20

Octal D-Type Inverting Flip-Flops with 3-State Outputs

SN74ALS540

20

Inverting Octal Buffers and Line Drivers with 3-State Outputs

SN74ALS540-1

20

Inverting Octal Buffers and Line Drivers with 3-State Outputs

SN74ALS541

20

Octal Buffers and Line Drivers with 3-State Outputs

SN74ALS541-1

20

Octal Buffers and Line Drivers with 3-State Outputs

SN74ALS561A

20

Octal Bus Transceivers and Registers with 3-State Outputs

SN74ALS563B

20

Octal Inverting Transparent Latches with 3-State Outputs

SDAS159
SDAS157

SDAS156

Call
SDAS211

SDAS142
SDAS142

SDAS272

SDAS124
SDAS124

SDAS124
SDAS124
SDAS217

SDAS218
SDAS038
SDAS220

SDAS267
SDAS083

SDAS083

SDAS167

SDAS224

SDAS224

SDAS224

SDAS270

SDAS168

SDAS025

SDAS025

SDAS225

SDAS163

SDAS025

SDAS025

433

DEVICE SELECTION GUIDE

ALS

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

LITERATURE
REFERENCE

SN74ALS564B

20

Octal D-Type Inverting Flip-Flops with 3-State Outputs

SN74ALS569A

20

Synchronous 4-Bit Binary Counters with 3-State Outputs

SN74ALS573C

20

Octal Transparent D-Type Latches with 3-State Outputs

SN74ALS574B

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SN74ALS575A

24

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SN74ALS576B

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SDAS065

SN74ALS577A

24

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SDAS065

SN74ALS580B

20

Octal D-Type Transparent Latches with 3-State Outputs

SDAS277

SN74ALS620A

20

Octal Bus Transceivers with 3-State Outputs

SN74ALS621A

20

Octal Bus Transceivers with Open-Collector Outputs

SN74ALS621A-1

20

Octal Bus Transceivers with Open-Collector Outputs

SDAS226

SN74ALS623A

20

Octal Bus Transceivers with 3-State Outputs

SDAS226

SN74ALS638A

20

Octal Bus Transceivers with 3-State Outputs

SDAS123

SN74ALS638A-1

20

Octal Bus Transceivers with 3-State Outputs

SDAS123

SN74ALS639A

20

Octal Bus Transceivers with 3-State Outputs

SDAS123

SN74ALS640B

20

Octal Bus Transceivers with 3-State Outputs

SDAS122

SN74ALS640B-1

20

Octal Bus Transceivers with 3-State Outputs

SDAS122

SN74ALS641A

20

Octal Bus Transceivers with Open-Collector Outputs

SDAS300

SN74ALS641A-1

20

Octal Bus Transceivers with Open-Collector Outputs

SDAS300

SN74ALS642A

20

Octal Bus Transceivers with Open-Collector Outputs

SN74ALS642A-1

20

Octal Bus Transceivers with Open-Collector Outputs

SDAS300

SN74ALS645A

20

Octal Bus Transceivers with 3-State Outputs

SDAS278

SN74ALS645A-1

20

Octal Bus Transceivers with 3-State Outputs

SDAS278

SN74ALS648A

24

Octal Registered Bus Transceivers with 3-State Outputs

SDAS039

SN74ALS653

24

Octal Bus Transceivers and Registers with Open-Collector and 3-State Outputs

SDAS066

SN74ALS654

24

Octal Bus Transceivers and Registers with Open-Collector and 3-State Outputs

SN74ALS666

24

8-Bit D-Type Transparent Read-Back Latches with 3-State Outputs

SDAS227

SN74ALS667

24

8-Bit D-Type Transparent Read-Back Latches with 3-State Outputs

SDAS227

SN74ALS679

20

12-Bit Address Comparators

SDAS003

SN74ALS688

20

8-Bit Magnitude Comparators

SDAS228

SN74ALS746

20

Octal Buffers and Line Drivers with Input Pullup Resistors and 3-State Outputs

SDAS052

SN74ALS760

20

Octal Buffers and Line Drivers with Open-Collector Outputs

SDAS141

SN74ALS804A

20

Hex 2-Input NAND Drivers

SDAS022

SN74ALS805A

20

Hex 2-Input NOR Drivers

SDAS023

SN74ALS832A

20

Hex 2-Input OR Drivers

SDAS017

SN74ALS841

24

10-Bit Bus-Interface D-Type Latches with 3-State Outputs

SDAS059

SN74ALS843

24

9-Bit Bus-Interface D-Type Latches with 3-State Outputs

SDAS232

SN74ALS845

24

8-Bit Bus-Interface D-Type Latches with 3-State Outputs

SDAS233

SN74ALS857

24

Hex 2-to-1 Universal Multiplexers with 3-State Outputs

SDAS170

SN74ALS867A

24

Synchronous 8-Bit Up/Down Counters

SDAS115

SN74ALS869

24

Synchronous 8-Bit Up/Down Counters

SN74ALS870

24

Dual 16-by-4 Register Files

SN74ALS873B

24

Dual 4-Bit D-Type Latches with 3-State Outputs

SN74ALS874B

24

Dual 4-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs

434

SDAS164
SDAS229

SDAS048
SDAS165
SDAS165

SDAS226
SDAS226

SDAS300

SDAS066

SDAS115

SDAS139
SDAS036

SDAS061

DEVICE SELECTION GUIDE

ALS

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

LITERATURE
REFERENCE

SN74ALS876A

24

Dual 4-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SDAS061

SN74ALS990

20

8-Bit D-Type Transparent Read-Back Latches

SDAS027

SN74ALS992

24

9-Bit D-Type Transparent Read-Back Latches with 3-State Outputs

SDAS028

SN74ALS994

24

10-Bit D-Type Transparent Read-Back Latches

SDAS237

SN74ALS996

24

8-Bit Edge-Triggered Read-Back Latches

SDAS098

SN74ALS996-1

24

8-Bit Edge-Triggered Read-Back Latches

SN74ALS1004

14

Hex Inverting Drivers

SDAS074

SN74ALS1005

14

Hex Inverting Buffers with Open-Collector Outputs

SDAS240

SN74ALS1034

14

Hex Drivers

SDAS053

SN74ALS1035

14

Hex Noninverting Buffers with Open-Collector Outputs

SDAS243

SN74ALS1244A

20

Octal Buffers and Line Drivers with 3-State Outputs

SN74ALS1245A

20

Octal Bus Transceivers with 3-State Outputs

SN74ALS1640A

20

Octal Bus Transceivers with 3-State Outputs

SN74ALS1645A

20

Octal Bus Transceivers with 3-State Outputs

SN74ALS2240

20

Octal Buffers and Line/MOS Drivers

with 3-State Outputs and Series Damping Resistors

SDAS268

SN74ALS2541

20

Octal Line Drivers/MOS Drivers with 3-State Outputs

SDAS273

SN74ALS29821

24

10-Bit Bus-Interface Flip-Flops with 3-State Outputs

SDAS145

SN74ALS29823

24

9-Bit Bus-Interface Flip-Flops with 3-State Outputs

SDAS146

SN74ALS29827

24

10-Bit Buffers/Drivers with 3-State Outputs

SDAS095

SN74ALS29828

24

10-Bit Buffers/Drivers with 3-State Outputs

SDAS095

SN74ALS29833

24

8-Bit to 9-Bit Parity Bus Transceivers

SDAS119

SN74ALS29854

24

8-Bit to 9-Bit Parity Bus Transceivers

SDAS118

SN74ALS29863

24

9-Bit Bus Transceivers with 3-State Outputs

SDAS096

SDAS098

SDAS186

SDAS245
SDAS246
SDAS246

435

DEVICE SELECTION GUIDE

ALVC
Advanced Low-Voltage
CMOS Technology Logic
One of the highest-performance 3.3-V bus-interface families is the ALVC
family. These specially designed 3-V products are processed in 0.6- CMOS
technology, with typical propagation delays of less than 3 ns, current drive of
24 mA, and static current of 40 A for bus-interface functions. ALVC devices
have input bus-hold cells to eliminate the need for external pullup resistors for
floating inputs. With over 90 Widebus and Widebus+ devices with series
damping resistors and gates and octals on the roadmap, ALVC quickly is
becoming the industry standard for many 3.3-V logic applications. The family
also features innovative functions that make it ideal for memory interleaving,
multiplexing, and interfacing to SDRAMs.
Selected devices in the ALVC family are offered in Widebus footprints with all
of the advanced packaging, such as shrink small-outline package (SSOP) and
thin shrink small-outline package (TSSOP).
Selected ALVC devices are offered in MicroStar BGA (LFBGA) and
MicroStar Jr. (VFBGA) packages. Other devices are offered in the plastic
dual-in-line package (PDIP), quad flatpack no-lead (QFN) package,
small-outline integrated circuit (SOIC) package, small-outline package (SOP),
SSOP, TSSOP, and thin very small-outline package (TVSOP).
See www.ti.com/sc/logic for the most current data sheets.

437

DEVICE SELECTION GUIDE

ALVC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
LFBGA

PDIP

QFN

SOIC

SOP

SSOP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

Gates and Octals

SN74ALVC00

14

Quad 2-Input NAND Gates

SN74ALVC04

14

Hex Inverters

SCES117

SN74ALVC08

14

Quad 2-Input AND Gates

SCES101

SN74ALVC10

14

Triple 3-Input NAND Gates

SCES106

SN74ALVC14

14

Hex Schmitt-Trigger Inverters

SCES107

SN74ALVC32

14

Quad 2-Input OR Gates

SCES108

SN74ALVC125

14

Quad Bus Buffers with 3-State Outputs

SCES110

SN74ALVC126

14

Quad Bus Buffers with 3-State Outputs

SCES111

SN74ALVC244

20

Octal Buffers and Line Drivers

with 3-State Outputs

SCES188

SN74ALVCH244

20

Octal Buffers and Line Drivers

with 3-State Outputs

SCES112

SN74ALVC245

20

Octal Bus Transceivers

with 3-State Outputs

SCES271

SN74ALVCH245

20

Octal Bus Transceivers

with 3-State Outputs

SCES119

SN74ALVCH373

20

Octal Transparent D-Type Latches

with 3-State Outputs

SN74ALVCH374

20

Octal Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SN74ALVCH16240

48

16-Bit Buffers/Drivers with 3-State Outputs

SN74ALVC16244A

48

16-Bit Buffers/Drivers with 3-State Outputs

SCAS250

SN74ALVCH16244

48

16-Bit Buffers/Drivers with 3-State Outputs

SCES014

SN74ALVCH16245

48

16-Bit Bus Transceivers

with 3-State Outputs

SCAS015

SN74ALVCHR16245

48

16-Bit Bus Transceivers

with 3-State Outputs

SCES064

SN74ALVCH16260

56

12-Bit to 24-Bit Multiplexed

D-Type Latches with 3-State Outputs

SN74ALVCH16269

56

12-Bit to 24-Bit Registered

Bus Exchangers with 3-State Outputs

SCES115

SCES116
SCES118

Widebus Devices
SCES045

SCES046

SCES019

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

438

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

ALVC

DEVICE

NO.
PINS

SN74ALVCHR16269A

56

SN74ALVCH16270

DESCRIPTION

AVAILABILITY
LFBGA

PDIP

QFN

SOIC

SOP

VFBGA

LITERATURE
REFERENCE

SSOP

TSSOP

TVSOP

12-Bit to 24-Bit Registered

Bus Exchangers with 3-State Outputs

56

12-Bit to 24-Bit Registered

Bus Exchangers with 3-State Outputs

SCES028

SN74ALVCH16271

56

12-Bit to 24-Bit Multiplexed

Bus Exchangers with 3-State Outputs

SCES017

SN74ALVCH16282

80

18-Bit to 36-Bit Registered

Bus Exchangers with 3-State Outputs

SN74ALVC16334

48

16-Bit Universal Bus Drivers

with 3-State Outputs

SN74ALVCH16334

48

16-Bit Universal Bus Drivers

with 3-State Outputs

SN74ALVCH16344

56

SN74ALVCH16373

SCES050

SCES036

SCES128

SCES090

1-Bit to 4-Bit Address Drivers

with 3-State Outputs

48

16-Bit Transparent D-Type Latches

with 3-State Outputs

SCES020

SN74ALVCH16374

48

16-Bit Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SCES021

SN74ALVCH16409

56

9-Bit 4-Port Universal Bus Exchangers

with 3-State Outputs

SCES022

SN74ALVCHR16409

56

9-Bit 4-Port Universal Bus Exchangers

with 3-State Outputs

SCES056

SN74ALVCH16500

56

18-Bit Universal Bus Transceivers

with 3-State Outputs

SCES023

SN74ALVCH16501

56

18-Bit Universal Bus Transceivers

with 3-State Outputs

SN74ALVCH16524

56

18-Bit Registered Bus Transceivers

with 3-State Outputs

SCES080

SN74ALVCH16525

56

18-Bit Registered Bus Transceivers

with 3-State Outputs

SCES059

SN74ALVCH16543

56

16-Bit Registered Transceivers

with 3-State Outputs

SCES025

SN74ALVCH16600

56

18-Bit Universal Bus Transceivers

with 3-State Outputs

SCES030

SN74ALVCH16601

56

18-Bit Universal Bus Transceivers

with 3-State Outputs

SCES027

SN74ALVCHR16601

56

18-Bit Universal Bus Transceivers

with 3-State Outputs

SCES123

SN74ALVCH16646

56

16-Bit Bus Transceivers and Registers

with 3-State Outputs

SCES032

SN74ALVCH16721

56

20-Bit D-Type Flip-Flops

with 3-State Outputs

SCES052

SN74ALVCH16820

56

10-Bit D-Type Flip-Flops

with Dual Outputs and 3-State Outputs

SCES035

SN74ALVCH16821

56

20-Bit D-Type Flip-Flops

with 3-State Outputs

SCES037

SN74ALVCH16823

56

18-Bit D-Type Flip-Flops

with 3-State Outputs

SCES038

SN74ALVCH16825

56

18-Bit Buffers/Drivers with 3-State Outputs

SCES039

SCES054

SCES024

439

DEVICE SELECTION GUIDE

ALVC
AVAILABILITY

NO.
PINS

DESCRIPTION

SN74ALVCH16827

56

20-Bit Buffers/Drivers with 3-State Outputs

SN74ALVCH16831

80

1-to-4 Address Registers/Drivers

with 3-State Outputs

SN74ALVCH16832

64

1-to-4 Address Registers/Drivers

with 3-State Outputs

SN74ALVC16834

56

18-Bit Universal Bus Drivers

with 3-State Outputs

SCES140

SN74ALVC16835

56

18-Bit Universal Bus Drivers

with 3-State Outputs

SCES125

SN74ALVCH16835

56

18-Bit Universal Bus Drivers

with 3-State Outputs

SCES053

SN74ALVCH16841

56

20-Bit Bus-Interface D-Type Latches

with 3-State Outputs

SCES043

SN74ALVCH16863

56

18-Bit Bus-Interface Transceivers

with 3-State Outputs

SCES060

SN74ALVCH16901

64

18-Bit Universal Bus Transceivers

with Parity Generators/Checkers

SCES010

SN74ALVCH16903

56

12-Bit Universal Bus Drivers

with Parity Checker
and Dual 3-State Outputs

SCES095

SN74ALVCH16952

56

16-Bit Registered Transceivers

with 3-State Outputs

SCES011

SN74ALVCH16973

48

8-Bit Bus Transceivers and

Transparent D-Type Latches
with Four Independent Buffers

SCES435

SN74ALVCH32244

96

32-Bit Buffers/Drivers with 3-State Outputs

SCES281

SN74ALVCH32245

96

32-Bit Bus Transceivers

with 3-State Outputs

SCES282

SN74ALVCH32374

96

32-Bit Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SCES283

SN74ALVCH32501

114

32-Bit Universal Bus Transceivers

with 3-State Outputs

SCES144

SN74ALVCH32973

96

16-Bit Bus Transceivers

and Transparent D-Type Latches
with Eight Independent Buffers

SCES436

DEVICE

LFBGA

PDIP

QFN

SOIC

SOP

SSOP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE
SCES041

SCES083

SCES098

Widebus+ Devices

Widebus Devices With Series Damping Resistors

48

16-Bit Buffers/Drivers
with Series Damping Resistors
and 3-State Outputs

SCES065

SN74ALVCH162260

56

12-Bit to 24-Bit Multiplexed

D-Type Latches
with Series Damping Resistors
and 3-State Outputs

SCES570

SN74ALVCH162268

56

12-Bit to 24-Bit Registered

Bus Exchangers with 3-State Outputs

SN74ALVCHG162280

80

16-Bit to 32-Bit Bus Exchangers

with Byte Masks and 3-State Outputs

SCES093

SN74ALVCHG162282

80

18-Bit to 36-Bit Registered

Bus Exchangers with 3-State Outputs

SCES094

SN74ALVCH162244

440

SCES018

DEVICE SELECTION GUIDE

ALVC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
LFBGA

PDIP

QFN

SOIC

SOP

SSOP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

SN74ALVC162334

48

16-Bit Universal Bus Drivers

with 3-State Outputs

SCES127

SN74ALVCH162334

48

16-Bit Universal Bus Drivers

with 3-State Outputs

SCES120

SN74ALVCH162344

56

1-Bit to 4-Bit Address Drivers

with 3-State Outputs

SCES085

SN74ALVCH162374

48

16-Bit Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SN74ALVCH162409

56

9-Bit 4-Port Universal Bus Exchangers

with 3-State Outputs

SN74ALVCH162525

56

18-Bit Registered Transceivers

with 3-State Outputs

SCES058

SN74ALVCH162601

56

18-Bit Universal Bus Transceivers

with 3-State Outputs

SCES026

SN74ALVCH162721

56

20-Bit Flip-Flops with 3-State Outputs

SCES055

SN74ALVCH162820

56

10-Bit Flip-Flops with Dual Outputs

and 3-State Outputs

SCES012

SN74ALVCH162827

56

20-Bit Buffers/Drivers with Series Damping

Resistors and 3-State Outputs

SN74ALVCH162830

80

SN74ALVCHS162830

SCES092
SCES189

SCES013

1-Bit to 2-Bit Address Drivers

with 3-State Outputs

SCES082

80

1-Bit to 2-Bit Address Drivers

with 3-State Outputs

SCES097

SN74ALVC162831

80

1-Bit to 4-Bit Address Registers/Drivers

with 3-State Outputs

SCES605

SN74ALVCH162831

80

1-Bit to 4-Bit Address Registers/Drivers

with 3-State Outputs

SCES084

SN74ALVCH162832

64

1-Bit to 4-Bit Address Registers/Drivers

with 3-State Outputs

SN74ALVC162834

56

18-Bit Universal Bus Drivers

with 3-State Outputs

SCES172

SN74ALVCF162834

56

18-Bit Universal Bus Drivers

with 3-State Outputs

SCES409

SN74ALVC162835

56

18-Bit Universal Bus Drivers

with 3-State Outputs

SCES126

SN74ALVCF162835

56

18-Bit Universal Bus Drivers

with 3-State Outputs

SCES397

SN74ALVCH162835

56

18-Bit Universal Bus Drivers

with 3-State Outputs

SCES121

SN74ALVC162836

56

20-Bit Universal Bus Drivers

with 3-State Outputs

SCES129

SN74ALVCH162836

56

20-Bit Universal Bus Drivers

with 3-State Outputs

SCES122

SN74ALVCH162841

56

20-Bit Bus-Interface D-Type Latches

with 3-State Outputs

SCES588

SCES088

Widebus Devices With Level Shifter

SN74ALVC164245

48

16-Bit 3.3-V to-5-V Level-Shifting

Transceivers with 3-State Outputs

SCES416

441

DEVICE SELECTION GUIDE

ALVT
Advanced Low-Voltage
BiCMOS Technology Logic
ALVT is a 5-V-tolerant, 3.3-V and 2.5-V product using 0.6- BiCMOS
technology for advanced bus-interface functions. ALVT provides superior
performance, up to 28% speed improvement compared to similar LVT at 3.3 V,
current drive of 64 mA, and pin-for-pin compatibility with existing ABT and LVT
families.
ALVT operates at LVTTL signal levels in telecom and networking
high-performance system point-to-point or distributed-load backplane
applications. ALVT is an excellent migration path from ABT or LVT.
Performance characteristics of the ALVT family include:

3.3-V or 2.5-V operation, with 5-V-tolerant I/O capability for use in a

mixed-voltage environment
Speed Provides high performance, with up to 28% speed improvement
over LVT
Drive Provides up to 64 mA of drive at 3.3-V VCC and 24 mA at 2.5-V
VCC, yet consumes less than 330 W of standby power

Additional features include:

Live insertion ALVT devices incorporate Ioff and power-up 3-state

(PU3S) circuitry to protect the devices in live-insertion applications and
make them ideally suited for hot-insertion applications. Ioff prevents the
devices from being damaged during partial power down, and PU3S forces
the outputs to the high-impedance state during power up and power down.
Bus hold Eliminates floating inputs by holding them at the last valid logic
state, eliminating the need for external pullup and pulldown resistors
Damping-resistor option TI implements series damping resistors on
selected devices, reducing overshoot and undershoot, matching line
impedance, and minimizing ringing.
Packaging ALVT devices are available in shrink small-outline package
(SSOP), thin shrink small-outline package (TSSOP), and thin very
small-outline package (TVSOP), with selected devices offered in
MicroStar BGA (LFBGA) and MicroStar Jr. (VFBGA) packages.

See www.ti.com/sc/logic for the most current data sheets.

443

DEVICE SELECTION GUIDE

ALVT

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

LFBGA

SSOP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

SN74ALVTH16240

48

16-Bit Buffers/Drivers with 3-State Outputs

SN74ALVTH16244

48

16-Bit Buffers/Drivers with 3-State Outputs

SCES070

SN74ALVTH16245

48

16-Bit Bus Transceivers with 3-State Outputs

SCES066

SN74ALVTHR16245

48

2.5-V/3.3-V 16-Bit Bus Transceivers with 3-State Outputs

SCES075

SN74ALVTH16373

48

16-Bit Transparent D-Type Latches with 3-State Outputs

SCES067

SN74ALVTH16374

48

16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SCES068

SN74ALVTH16601

56

18-Bit Universal Bus Transceivers with 3-State Outputs

SCES143

SN74ALVTH16821

56

20-Bit D-Type Flip-Flops with 3-State Outputs

SCES078

SN74ALVTH16827

56

20-Bit Buffers/Drivers with 3-State Outputs

SCES076

SN74ALVTH32244

96

32-Bit Buffers/Drivers with 3-State Outputs

SCES279

SN74ALVTH32373

96

32-Bit Transparent D-Type Latches with 3-State Outputs

SCES322

SN74ALVTH32374

96

32-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SCES280

SN74ALVTH162244

48

16-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs

SCES074

SN74ALVTH162245

48

16-Bit Bus Transceivers with 3-State Outputs

SCES331

SN74ALVTH162827

56

20-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs

SCES079

SCES138

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

444

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

AS
Advanced Schottky Logic
The AS family of high-performance bipolar logic includes over 70 functions
that offer high drive capabilities.
This family, combined with the ALS family, can be used to optimize system
speed and power through performance budgeting where BiCMOS logic is
used. By using AS in speed-critical paths and ALS where speed is less critical,
designers can optimize speed and power performance.
The AS family includes gates, flip-flops, counters, drivers, transceivers,
registered transceivers, readback latches, clock drivers, register files,
and multiplexers.
See www.ti.com/sc/logic for the most current data sheets.

445

DEVICE SELECTION GUIDE

AS

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

MIL

PDIP

SOIC

SOP

SSOP

LITERATURE
REFERENCE

SN74AS00

14

Quad 2-Input NAND Gates

SN74AS02

14

Quad 2-Input NOR Gates

SDAS111

SN74AS04

14

Hex Inverters

SDAS063

SN74AS08

14

Quad 2-Input AND Gates

SDAS191

SN74AS10

14

Triple 3-Input NAND Gates

SDAS002

SN74AS11

14

Triple 3-Input AND Gates

SDAS009

SN74AS20

14

Dual 4-Input NAND Gates

SDAS192

SN74AS21

14

Dual 4-Input AND Gates

SDAS085

SN74AS27

14

Triple 3-Input NOR Gates

SN74AS30

14

8-Input NAND Gates

SN74AS32

14

Quad 2-Input OR Gates

SN74AS74A

14

Dual D-Type Flip-Flops with Set and Reset

SN74AS86A

14

Quad 2-Input Exclusive-OR Gates

SN74AS109A

16

Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset

SDAS198

SN74AS138

16

3-to-8 Line Inverting Decoders/Demultiplexers

SDAS055

SN74AS151

16

1-of-8 Data Selectors/Multiplexers

SDAS205

SN74AS153

16

Dual 1-of-4 Data Selectors/Multiplexers

SDAS206

SN74AS157

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SDAS081

SN74AS158

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SDAS081

SN74AS161

16

Synchronous 4-Bit Binary Counters

SDAS024

SN74AS163

16

Synchronous 4-Bit Binary Counters

SDAS024

SN74AS169A

16

Synchronous 4-Bit Up/Down Binary Counters

SN74AS174

16

Hex D-Type Flip-Flops with Clear

SDAS207

SN74AS175B

16

Quad D-Type Flip-Flops with Clear

SDAS207

SN74AS181A

24

Arithmetic Logic Units/Function Generators

SN74AS194

16

4-Bit Bidirectional Universal Shift Registers

SN74AS240A

20

Octal Buffers/Drivers with 3-State Outputs

SDAS214

SN74AS241A

20

Octal Buffers/Drivers with 3-State Outputs

SDAS153

SN74AS244A

20

Octal Buffers and Line Drivers with 3-State Outputs

SDAS142

SN74AS245

20

Octal Bus Transceivers with 3-State Outputs

SDAS272

SN74AS250A

24

1-of-16 Data Generators/Multiplexers with 3-State Outputs

SDAS137

SN74AS253A

16

Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs

SDAS216

SDAS187

SDAS112
SDAS010

SDAS113
SDAS143
SDAS006

SDAS125

SDAS209
SDAS212

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

446

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

AS

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

LITERATURE
REFERENCE

SN74AS257

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SDAS124

SN74AS258

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SDAS124

SN74AS280

14

9-Bit Odd/Even Parity Generators/Checkers

SDAS038

SN74AS286

14

9-Bit Parity Generators/Checkers with Bus-Driver Parity I/O Port

SDAS050

SN74AS298A

16

Quad 2-Input Multiplexers with Storage

SDAS219

SN74AS373

20

Octal Transparent D-Type Latches with 3-State Outputs

SDAS083

SN74AS374

20

Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs

SDAS167

SN74AS533A

20

Octal Inverting Transparent Latches with 3-State Outputs

SDAS270

SN74AS573A

20

Octal D-Type Transparent Latches with 3-State Outputs

SDAS048

SN74AS574

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SDAS165

SN74AS575

24

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SDAS165

SN74AS576

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SDAS065

SN74AS638A

20

Octal Bus Transceivers

SN74AS640

20

Octal Bus Transceivers with 3-State Outputs

SN74AS641

20

Octal Bus Transceivers with Open-Collector Outputs

SDAS300

SN74AS645

20

Octal Bus Transceivers with 3-State Outputs

SDAS278

SN74AS648

24

Octal Registered Bus Transceivers with 3-State Outputs

SDAS039

SN74AS756

20

Octal Buffers and Line Drivers with Open-Collector Outputs

SN74AS757

20

Octal Buffers and Line Drivers with Open-Collector Outputs

SDAS040

SN74AS760

20

Octal Buffers and Line Drivers with Open-Collector Outputs

SDAS141

SN74AS804B

20

Hex 2-Input NAND Drivers

SDAS022

SN74AS805B

20

Hex 2-Input NOR Drivers

SDAS023

SN74AS808B

20

Hex 2-Input NOR Drivers

SDAS018

SN74AS821A

24

10-Bit Bus-Interface Flip-Flops with 3-State Outputs

SDAS230

SN74AS823A

24

9-Bit Bus-Interface Flip-Flops with 3-State Outputs

SDAS231

SN74AS825A

24

8-Bit Bus-Interface Flip-Flops with 3-State Outputs

SDAS020

SN74AS832B

20

Hex 2-Input OR Drivers

SDAS017

SN74AS841A

24

10-Bit Bus-Interface D-Type Latches with 3-State Outputs

SDAS059

SN74AS867

24

Synchronous 8-Bit Up/Down Counters

SDAS115

SN74AS869

24

Synchronous 8-Bit Up/Down Counters

SDAS115

SN74AS873A

24

Dual 4-Bit D-Type Latches with 3-State Outputs

SDAS036

SN74AS874

24

Dual 4-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SDAS061

SN74AS876

24

Dual 4-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SDAS061

SN74AS885

24

8-Bit Magnitude Comparators

SN74AS1000A

14

Quad 2-Input NAND Buffers/Drivers

SDAS056

SN74AS1004A

14

Hex Inverting Drivers

SDAS074

SN74AS1008A

14

Quad 2-Input AND Buffers/Drivers

SDAS071

SN74AS1032A

14

Quad 2-Input OR Buffers/Drivers

SDAS072

SN74AS1034A

14

Hex Drivers

SN74AS1804

20

Hex 2-Input NAND Drivers

SN74AS4374B

20

Octal Edge-Triggered D-Type Dual-Rank Flip-Flops with 3-State Outputs

SN74AS8003

Dual 2-Input Positive-NAND Gates

SDAS123

SDAS122

SDAS040

SDAS236

SDAS053
SDAS042

SDAS109

SDAS305

447

DEVICE SELECTION GUIDE

AUC
Advanced Ultra-Low-Voltage
CMOS Logic
AUC is the industrys first logic family that is optimized for 1.8 V, with operation
from sub 1 V (0.8 V) to 2.5 V and the inputs are tolerant to 3.6 V.
This family meets a variety of demands that have been placed on digital
electronic designs, including the move to lower supply voltages, faster
speeds, smaller form factors, and lower power consumption, without
compromising signal integrity. AUC was developed to meet the design
parameters for advanced systems, such as telecommunications equipment,
high-performance workstations, PC and networking servers, and
next-generation portable consumer electronics.
As designers convert the core processors, ASICs, and memories of designs
to lower voltages, they need the supporting low-voltage logic functions. AUC
provides this support.
See www.ti.com/sc/logic for the most current data sheets.

449

DEVICE SELECTION GUIDE

AUC

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

DSBGA

LFBGA

QFN

SOP

SOT

SSOP

TSSOP

TVSOP

VFBGA

VSSOP

LITERATURE
REFERENCE

SN74AUC1G00

Single 2-Input
Positive-NAND Gates

SCES368

SN74AUC1G02

Single 2-Input Positive-NOR Gates

SCES369

SN74AUC1G04

Single Inverter Gates

SCES370

SN74AUC1GU04

Single Inverter Gates

SCES371

SN74AUC1G06

Single Inverter Buffers/Drivers

with Open-Drain Outputs

SCES372

SN74AUC1G07

Single Buffers/Drivers
with Open-Drain Outputs

SCES373

SN74AUC1G08

Single 2-Input Positive-AND Gates

SCES374

SN74AUC1G10

Single 3-Input
Positive-NAND Gates

Call

SN74AUC1G11

Single 3-Input Positive-AND Gates

Call

SN74AUC1G14

Single Schmitt-Trigger Inverters

SCES375

SN74AUC1G17

Single Schmitt-Trigger Buffers

SCES376

SN74AUC1G18

1-of-2 Noninverting Demultiplexers

with 3-State Deselected Output

Call

SN74AUC1G19

1-of-2 Decoders/Demultiplexers

Call

SN74AUC1G27

Single 3-Input Positive-NOR Gates

Call

SN74AUC1G32

Single Input Positive-OR Gates

SCES377

SN74AUC1G57

Configurable
Multiple-Function Gates

Call

SN74AUC1G58

Configurable
Multiple-Function Gates

Call

SN74AUC1G66

Single Bilateral Analog Switches

SCES386

SN74AUC1G79

Single Positive-Edge-Triggered
D-Type Flip-Flops

SCES387

SN74AUC1G80

Single Positive-Edge-Triggered
D-Type Flip-Flops

SCES388

SN74AUC1G86

Single 2-Input Exclusive-OR Gates

SCES389

SN74AUC1G97

Configurable
Multiple-Function Gates

Call

SN74AUC1G98

Configurable
Multiple-Function Gates

Call

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

450

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

AUC

DEVICE

NO.
PINS

SN74AUC1G125

Single Bus Buffer Gates

with 3-State Outputs

SN74AUC1G126

SN74AUC1G240

DESCRIPTION

AVAILABILITY
LFBGA

QFN

SSOP

TSSOP

TVSOP

VFBGA

VSSOP

LITERATURE
REFERENCE

SOP

SOT

SCES382

Single Bus Buffer Gates

with 3-State Outputs

SCES383

Single Buffers/Drivers
with 3-State Outputs

SCES384

SN74AUC1G332

Single 3-Input Positive-OR Gates

Call

SN74AUC1G386

Single 3-Input Positive-XOR Gates

Call

SN74AUC2G00

Dual 2-Input NAND Gates

SCES440

SN74AUC2G02

Dual 2-Input NOR Gates

SN74AUC2G04

Dual Inverters

SCES437

SN74AUC2GU04

Dual Inverters

SCES438

SN74AUC2G06

Dual Inverter Buffers/Drivers

with Open-Drain Outputs

SCES442

SN74AUC2G07

Dual Buffers/Drivers
with Open-Drain Outputs

SCES443

SN74AUC2G08

Dual 2-Input AND Gates

SN74AUC2G14

Dual Schmitt-Trigger Inverters

Call

SN74AUC2G17

Dual Schmitt-Trigger Buffers

Call

SN74AUC2G32

Dual 2-Input OR Gates

SN74AUC2G34

Dual Buffer Gates

SN74AUC2G53

Analog Multiplexers/Demultiplexers

SCES484

SN74AUC2G66

Dual Bilateral Switches

SCES507

SN74AUC2G74

Dual Edge-Triggered
D-Type Flip-Flops
with Clear and Preset

SN74AUC2G79

Dual Positive-Edge-Triggered
D-Type Flip-Flops

SN74AUC2G80

Dual Positive-Edge-Triggered
D-Type Flip-Flops

SN74AUC2G86

Dual 2-Input Exclusive-OR Gates

SCES479

SN74AUC2G125

Dual Bus Buffer Gates

with 3-State Outputs

SCES532

SN74AUC2G126

Dual Bus Buffers

with 3-State Outputs

SCES533

SN74AUC2G157

Dual 2-to-1 Line

Data Selectors/Multiplexers

Call

SN74AUC2G240

Dual Buffers/Drivers
with 3-State Outputs

SCES534

SN74AUC2G241

Dual Buffers/Drivers
with 3-State Outputs

SCES535

SN74AUC2G257

Dual 2-1 Line

Data Selectors/Multiplexers
with 3-State Outputs

Call

SN74AUC3G04

Triple Inverters

Call

SN74AUC3GU04

Triple Inverters

Call

Triple Inverter Buffers/Drivers

with Open-Drain Outputs

Call

SN74AUC3G06

DSBGA

SCES441

Call

SCES478
SCES514

Call

SCES536
SCES540

451

DEVICE SELECTION GUIDE

AUC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
DSBGA

LFBGA

QFN

SOP

SOT

SSOP

TSSOP

TVSOP

VFBGA

VSSOP

LITERATURE
REFERENCE

SN74AUC3G07

Triple Buffers/Drivers
with Open-Drain Outputs

Call

SN74AUC3G14

Triple Schmitt-Trigger Inverters

Call

SN74AUC3G17

Triple Schmitt-Trigger Buffers

Call

SN74AUC3G34

Triple Buffer Gates

Call

SN74AUC00

14

Quadruple 2-Input
Positive-NAND Gates

SCES510

SN74AUC02

14

Quadruple 2-Input
Positive-NOR Gates

SCES511

SN74AUC04

14

Hex Inverters

SCES444

SN74AUC06

14

Hex Inverter Buffers/Drivers

with Open-Drain Outputs

SCES471

SN74AUC07

14

Hex Buffers/Drivers
with Open-Drain Outputs

SCES472

SN74AUC08

14

Quadruple 2-Input
Positive-AND Gates

SCES512

SN74AUC14

14

Hex Schmitt-Trigger Inverters

SCES473

SN74AUC17

14

Hex Schmitt-Trigger Buffers

SCES497

SN74AUC125

14

Quadruple Bus Buffer Gates

with 3-State Outputs

SCES508

SN74AUC126

14

Quadruple Bus Buffer Gates

with 3-State Outputs

SCES509

SN74AUC240

20

Octal Buffers/Drivers
with 3-State Outputs

SCES430

SN74AUC244

20

Octal Buffers/Drivers
with 3-State Outputs

SCES432

SN74AUC245

20

Octal Bus Transceivers

with 3-State Outputs

SN74AUC16240

48

16-Bit Buffers/Drivers
with 3-State Outputs

SN74AUC16244

48/56

16-Bit Buffers/Drivers
with 3-State Outputs

SN74AUC16245

48

SN74AUC16373

SCES419

SCES390

SCES399

16-Bit Transceivers
with 3-State Outputs

SCES392

48

16-Bit Transparent D-Type Latches

with 3-State Outputs

SCES401

SN74AUC16374

48

16-Bit Edge-Triggered
D-Type Flip-Flops
with 3-State Outputs

SCES403

SN74AUC16501

56

18-Bit Universal Bus Transceivers

with 3-State Outputs

SCES418

SN74AUC32245

96

32-Bit Transceivers
with 3-State Outputs

SCES410

SN74AUC32374

96

32-Bit D-Type Flip-Flops

with 3-State Outputs

SCES475

SN74AUCH240

20

Octal Buffers/Drivers
with 3-State Outputs

SN74AUCH245

20

Octal Bus Transceivers

with 3-State Outputs

452

SCES431

SCES420

DEVICE SELECTION GUIDE

AUC
AVAILABILITY

DEVICE

NO.
PINS

SN74AUCH16244

48

16-Bit Buffers/Drivers
with 3-State Outputs

SN74AUCH32244

96

32-Bit Buffers/Drivers
with 3-State Outputs

SCES412

SN74AUCH32374

96

32-Bit Edge-Triggered D-Type

Flip-Flops with 3-State Outputs

SCES476

DESCRIPTION

DSBGA

LFBGA

QFN

SOP

SOT

SSOP

TSSOP

TVSOP

VFBGA

VSSOP

LITERATURE
REFERENCE
SCES391

453

DEVICE SELECTION GUIDE

AUP
Advanced Ultra-Low-Power
CMOS Logic
AUP is the industrys lowest-power logic family, extending battery life up to
73% over industry standard 3.3-V logic options. Current low-voltage logic
devices may consume a significant amount of power (up to 7% of standby
power) in typical portable applications; TIs new AUP family provides
designers the capability of designing less power-hungry systems.
Comparatively, AUP consumes 91% less static and 83% less dynamic power
than the industry standard 3.3-V low-voltage logic technologies.
Along with power, speed remains a critical aspect of portable application
designs. AUP provides the best speed-power technology of choice in the
industry, with typical propagation delays of 2 ns at 3.3 V (3 ns at 1.8 V). The
first AUP devices released include configurable Little Logic functions, and all
small-scale Little Logic packages will be offered, including the NanoFreet
WCSP technology.
See www.ti.com/sc/logic for the most current data sheets.

455

DEVICE SELECTION GUIDE

AUP

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

SOP

SOT

LITERATURE
REFERENCE

SN74AUP1G08

Low-Power Single 2-Input Positive-AND Gates

SCES502

SN74AUP1G57

Low-Power Configurable Multiple-Function Gates

SCES503

SN74AUP1G58

Low-Power Configurable Multiple-Function Gates

SCES504

SN74AUP1G97

Low-Power Configurable Multiple-Function Gates

SCES505

SN74AUP1G98

Low-Power Configurable Multiple-Function Gates

SCES506

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

456

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

AVC
Advanced Very-Low-Voltage
CMOS Logic
TIs new AVC logic family provides designers the tools to create advanced
high-speed systems with propagation delays of less than 2 ns. Though
optimized for 2.5-V systems, AVC logic supports operating voltages between
1.2 V and 3.6 V. The AVC family features TIs DOC circuitry, which
dynamically lowers circuit output impedance during signal transition for fast
rise and fall times, and then raises the impedance after signal transmission to
reduce ringing.
Trends in digital electronics design emphasize lower power consumption,
lower supply voltages, faster operating speeds, smaller timing budgets, and
heavier loads. Many designs are making the transition from 3.3 V to 2.5 V, with
bus speeds increasing beyond 100 MHz. Signal integrity need not be
compromised to meet these design requirements. TIs AVC family is designed
to meet the needs of these high-speed, low-voltage systems, including
next-generation high-performance workstations, PCs, networking servers,
and telecommunications switching equipment.
Key features:

Sub-2-ns maximum tpd at 2.5 V for AVC16245

DOC circuitry enhances high-speed, low-noise operation.

Ioff supports partial power down.

Designed for next-generation, high-performance PCs, workstations,

and servers

Supports mixed-voltage systems

Optimized for 2.5 V; operable from 1.2 V to 3.6 V
Bus-hold feature eliminates need for external resistors on unused
input pins.

See www.ti.com/sc/logic for the most current data sheets.

457

DEVICE SELECTION GUIDE

AVC
NO.
PINS

DEVICE

DESCRIPTION

AVAILABILITY
LFBGA

SOP

SSOP

TSSOP

TVSOP

VFBGA

VSSOP

LITERATURE
REFERENCE

SN74AVC1T45

Single-Bit Dual-Supply Bus Transceivers

with Configurable Voltage Translation
and 3-State Outputs

SN74AVC2T45

Dual-Bit Dual-Supply Bus Transceivers

with Configurable Voltage Translation
and 3-State Outputs

SN74AVC20T245

56

20-Bit Dual-Supply Bus Transceivers

with Configurable Voltage Translation
and 3-State Outputs

SCES518

SN74AVC16244

48

16-Bit Buffers/Drivers with 3-State Outputs

SCES150

SN74AVC16245

48

16-Bit Bus Transceivers with 3-State Outputs

SCES142

SN74AVC16269

56

12-Bit to 24-Bit Registered Bus Exchangers

with 3-State Outputs

SCES152

SN74AVC16334

48

16-Bit Universal Bus Drivers with 3-State Outputs

SCES154

SN74AVC16373

48

16-Bit Transparent D-Type Latches

with 3-State Outputs

SCES156

SN74AVC16374

48

16-Bit Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SCES158

SN74AVC16646

56

16-Bit Bus Transceivers and Registers

with 3-State Outputs

SN74AVC16722

64

20-Bit D-Type Flip-Flops with 3-State Outputs

SN74AVC16827

56

20-Bit Buffers/Drivers with 3-State Outputs

SCES176

SN74AVC16834

56

18-Bit Universal Bus Drivers with 3-State Outputs

SCES183

SN74AVC16835

56

18-Bit Universal Bus Drivers with 3-State Outputs

SCES168

96

1.2-V/3.3-V 32-Bit Transparent D-Type Latches

with 3-State Outputs

SN74AVC32373

SCES530

SCES531

SCES181
SCES166

SCES327

SN74AVCA164245

48/56

16-Bit Dual-Supply Bus Transceivers

with Configurable Voltage Translation
and 3-State Outputs

SCES395

SN74AVCAH164245

48/56

16-Bit Dual-Supply Bus Transceivers

with Configurable Voltage Translation
and 3-State Outputs

SCES396

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

458

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

AVC
NO.
PINS

DEVICE

DESCRIPTION

SN74AVCB164245

48/56

16-Bit Dual-Supply Bus Transceivers

with Configurable Voltage Translation
and 3-State Outputs

SN74AVCB324245

96

32-Bit Dual-Supply Bus Transceivers

with Configurable Voltage Translation
and 3-State Outputs

SN74AVCBH164245

48/56

16-Bit Dual-Supply Bus Transceivers

with Configurable Voltage Translation
and 3-State Outputs

AVAILABILITY
LFBGA

SOP

SSOP

TSSOP

TVSOP

VFBGA

VSSOP

LITERATURE
REFERENCE
SCES394

SCES485

SCES393

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins
TSSOP (thin shrink small-outline package)
PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

459

DEVICE SELECTION GUIDE

BCT
BiCMOS Technology Logic
BCT is a family of 8-, 9-, and 10-bit drivers, latches, transceivers, and
registered transceivers. Designed specifically for bus-interface applications,
BCT offers TTL I/O with high speeds, 64-mA output drive, and very low power
in the disabled mode. Over 50 BCT functions are in production.
The BCT25xxx series of fast, high-drive bus-interface functions provides
incident-wave switching required by large backplane applications. Designed
specifically to ensure incident-wave switching down to 25 , these
low-impedance driver devices can maximize the speed and reliability of
heavily loaded systems. Each device of this series delivers 188 mA of IOL drive
current.
Also included in TIs BCT family are devices with series damping resistors to
reduce overshoot and undershoot that can occur in memory-driving
applications.
See www.ti.com/sc/logic for the most current data sheets.

64BCT
64-Series BiCMOS Technology Logic
The 64BCT family offers all the features found in TIs standard BCT family. In
addition, the family is characterized for operation from 40C to 85C and
incorporates circuitry to protect the device in live-insertion applications.
See www.ti.com/sc/logic for the most current data sheets.

461

DEVICE SELECTION GUIDE

BCT

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

MIL

PDIP

SOIC

SOP

SSOP

TSSOP

LITERATURE
REFERENCE

SN74BCT125A

14

Quad Bus Buffers with 3-State Outputs

SN74BCT126A

14

Quad Bus Buffers with 3-State Outputs

SN74BCT240

20

Octal Buffers/Drivers with 3-State Outputs

SN74BCT241

20

Octal Buffers/Drivers with 3-State Outputs

SN74BCT244

20

Octal Buffers and Line Drivers with 3-State Outputs

SN74BCT245

20

Octal Bus Transceivers with 3-State Outputs

SN74BCT373

20

Octal Transparent D-Type Latches with 3-State Outputs

SN74BCT374

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SCBS019

SN74BCT540A

20

Inverting Octal Buffers and Line Drivers with 3-State Outputs

SCBS012

SN74BCT541A

20

Octal Buffers and Line Drivers with 3-State Outputs

SCBS011

SN74BCT543

24

Octal Registered Transceivers with 3-State Outputs

SCBS026

SN74BCT573

20

Octal Transparent D-Type Latches with 3-State Outputs

SCBS071

SN74BCT574

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SN74BCT623

20

Octal Bus Transceivers with 3-State Outputs

SN74BCT640

20

Octal Bus Transceivers with 3-State Outputs

SCBS025

SN74BCT756

20

Octal Buffers and Line Drivers with Open-Collector Outputs

SCBS056

SN74BCT757

20

Octal Buffers and Line Drivers with Open-Collector Outputs

SCBS041

SN74BCT760

20

Octal Buffers and Line Drivers with Open-Collector Outputs

SN74BCT2240

20

Octal Buffers and Line/MOS Drivers

with Series Damping Resistors and 3-State Outputs

SN74BCT2241

20

Octal Buffers and Line/MOS Drivers

with Series Damping Resistors and 3-State Outputs

SCBS035

SN74BCT2244

20

Octal Buffers/Line Drivers with Series Damping Resistors and 3-State Outputs

SCBS017

SN74BCT2245

20

Octal Transceivers and Line MOS Drivers

with Series Damping Resistors and 3-State Outputs

SN74BCT2414

20

Dual 2-Line to 4-Line Memory Decoders with On-Chip Supply-Voltage Monitor

SN74BCT2827C

24

10-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs

SN74BCT25244

24

25- Octal Buffers/Drivers with 3-State Outputs

SCBS064

SN74BCT25245

24

25- Octal Bus Transceivers with 3-State Outputs

SCBS053

SN74BCT25642

24

25- Octal Bus Transceivers with Open-Collector Outputs

SCBS047

SN74BCT29821

24

10-Bit Bus-Interface Flip-Flops with 3-State Outputs

SCBS021

SN74BCT29825

24

Octal Bus-Interface Flip-Flops with 3-State Outputs

SN74BCT29827B

24

10-Bit Buffers/Drivers with 3-State Outputs

SCBS032
SCBS252

SCBS004
SCBS005
SCBS006

SCBS013
SCBS016

SCBS074
SCBS020

SCBS034

SCBS030

SCBS102
SCBS059
SCBS007

SCBS075

SCBS008

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

462

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

BCT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

TSSOP

LITERATURE
REFERENCE

SN74BCT29843

24

9-Bit D-Type Bus-Interface Latches with 3-State Outputs

SCBS256

SN74BCT29863B

24

9-Bit Bus Transceivers with 3-State Outputs

SCBS015

SN74BCT29864B

24

9-Bit Bus Transceivers with 3-State Outputs

SCBS010

463

DEVICE SELECTION GUIDE

64BCT

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

PDIP

SOIC

LITERATURE
REFERENCE

SN64BCT125A

14

Quad Bus Buffers with 3-State Outputs

SCBS052

SN64BCT126A

14

Quad Bus Buffers with 3-State Outputs

SCBS051

SN64BCT244

20

Octal Buffers and Line Drivers with 3-State Outputs

SCBS027

SN64BCT245

20

Octal Bus Transceivers with 3-State Outputs

SCBS040

SN64BCT757

20

Octal Buffers and Line Drivers with Open-Collector Outputs

SCBS479

SN64BCT25244

24

25- Octal Buffers/Drivers with 3-State Outputs

SCBS477

SN64BCT25245

24

25- Octal Bus Transceivers with 3-State Outputs

SCBS060

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

464

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

BTA
Bus-Termination Arrays
TIs BTA family offers a space-saving, efficient, and effective solution to
bus-termination requirements. In high-speed digital systems with long
transmission lines, reflecting waves on the line can cause voltage
undershoots and overshoots that lead to malfunctions at the driven input.
A BTA is a series of diodes that clamps a signal on a bus or any other signal
trace using high-frequency logic to limit overshoot and undershoot problems.
See www.ti.com/sc/logic for the most current data sheets.

465

DEVICE SELECTION GUIDE

BTA

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

MIL

PDIP

SOIC

SSOP

TSSOP

LITERATURE
REFERENCE

SDFS093

SDLS015

SDLS018

16-Bit Schottky Barrier Diode Bus-Termination Arrays

SDLS016

20

16-Bit Schottky Barrier Diode Bus-Termination Arrays

16

8-Bit Schottky Barrier Diode Bus-Termination Arrays

SDFS085

SN74ACT1071

14

10-Bit Bus-Termination Networks with Bus-Hold Function

SCAS192

SN74ACT1073

20

16-Bit Bus-Termination Networks with Bus-Hold Function

CD40117B

14

Programmable Dual 4-Bit Terminators

SN74F1016

20

16-Bit Schottky Barrier Diode R-C Bus-Termination Arrays

SN74S1050

16

12-Bit Schottky Barrier Diode Bus-Termination Arrays

SN74S1051

16

12-Bit Schottky Barrier Diode Bus-Termination Arrays

SN74S1052

20

SN74S1053
SN74F1056

SDLS017

SCAS193

SCHS101

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

466

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

CB3Q
2.5-V/3.3-V Low-Voltage
High-Bandwidth Bus-Switch
Crossbar Technology Logic
CB3Q is a high-bandwidth (up to 500 MHz) FET bus-switch family utilizing a
charge pump to elevate the gate voltage of the pass transistor, providing low
and flat ON-state resistance (ron) characteristics. These FET bus switches
provide high-performance low-power replacements for standard
bus-interface devices when signal buffering (current drive) is not required. The
low and flat ON-state resistance allows for minimal propagation delay and
supports rail-to-rail input/output (RRIO) switching on the data I/O ports. The
CB3Q family also features low data I/O capacitance to minimize capacitive
loading and signal distortion on the data bus. Specifically designed to support
high-bandwidth applications, the CB3Q family provides an optimized interface
solution ideally suited for broadband communications, networking, and
data-intensive computing systems.
CB3Q devices are available in advanced packaging, such as the quarter-size
small-outline package (QSOP), thin shrink small-outline package (TSSOP),
thin very small-outline package (TVSOP), and quad flatpack no lead (QFN).
See www.ti.com/signalswitches for additional information regarding the CB3Q
product family.

467

DEVICE SELECTION GUIDE

CB3Q

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
QFN

QSOP

SOIC

VFBGA

LITERATURE
REFERENCE

SSOP

TSSOP

TVSOP

SCDS154

SCDS124

2-Port Switch
SN74CB3Q3125

14/16

2.5-V/3.3-V Low-Voltage High-Bandwidth

Quadruple FET Bus Switches

SN74CB3Q3244

16/20

2.5-V/3.3-V Low-Voltage High-Bandwidth

8-Bit FET Bus Switches

SN74CB3Q3245

20

2.5-V/3.3-V Low-Voltage High-Bandwidth

8-Bit FET Bus Switches

SN74CB3Q3305

2.5-V/3.3-V Low-Voltage High-Bandwidth

Dual FET Bus Switches

SCDS141

SN74CB3Q3306A

2.5-V/3.3-V Low-Voltage High-Bandwidth

Dual FET Bus Switches

SCDS113

SN74CB3Q3345

20

2.5-V/3.3-V Low-Voltage High-Bandwidth

8-Bit FET Bus Switches

SN74CB3Q3384A

24

2.5-V/3.3-V Low-Voltage High-Bandwidth

10-Bit FET Bus Switches

SN74CB3Q6800

24

2.5-V/3.3-V Low-Voltage High-Bandwidth

10-Bit FET Bus Switches with Precharged Outputs

SN74CB3Q16210

48

SN74CB3Q16211
SN74CB3Q16811

SCDS143

SCDS144

SCDS114

SCDS142

2.5-V/3.3-V Low-Voltage High-Bandwidth

20-Bit FET Bus Switches

SCDS151

56

2.5-V/3.3-V Low-Voltage High-Bandwidth

24-Bit FET Bus Switches

SCDS152

56

2.5-V/3.3-V Low-Voltage High-Bandwidth

24-Bit FET Bus Switches with Precharged Outputs

SCDS153

Multiplexer/Demultiplexer
SN74CB3Q3253

16

2.5-V/3.3-V Low-Voltage High-Bandwidth

Dual 1-of 4 FET Multiplexers/Demultiplexers

SCDS145

SN74CB3Q3257

16

2.5-V/3.3-V Low-Voltage High-Bandwidth

4-Bit 1-of-2 FET Multiplexers/Demultiplexers

SCDS135

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

468

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

CB3T
2.5-V/3.3-V
Low-Voltage Translator Bus-Switch
Crossbar Technology Logic
CB3T is a high-speed TTL-compatible FET bus-switch family, with low
ON-state resistance (ron) allowing for minimal propagation delay. These FET
bus switches provide high-performance low-power replacements for standard
bus-interface devices when signal buffering (current drive) is not required. The
CB3T family fully supports mixed-mode signal operation on all data I/O ports
by providing voltage translation that tracks VCC. The CB3T family supports
systems using 5-V TTL, 3.3-V LVTTL, and 2.5-V CMOS switching standards,
as well as user-defined switching levels. This voltage-translation feature
allows the CB3T family to provide a high-performance interface between
components (memory, processors, logic, ASICs, I/O peripherals, etc.) that
require the different signaling standards (5-V TTL, 3.3-V LVTTL, 2.5-V CMOS,
etc.) common in mixed 2.5-V to 5-V system environments. Specifically
designed to support todays portable computing and communications
applications, the CB3T family provides a high-performance low-power
interface solution ideally suited for low-power portable equipment.
CB3T devices are available in advanced packaging, such as the shrink
small-outline package (SSOP), thin shrink small-outline package (TSSOP),
thin very small-outline package (TVSOP), and very thin shrink small-outline
package (VSSOP).
See www.ti.com/signalswitches for additional information regarding the CB3T
product family.

469

DEVICE SELECTION GUIDE

CB3T

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

SOIC

SOP

SSOP

TSSOP

TVSOP

VSSOP

LITERATURE
REFERENCE

2-Port Switch
SN74CB3T1G125

2.5-V/3.3-V Low-Voltage Single FET Bus Switches

with 5-V-Tolerant Level Shifter

SCDS150

2.5-V/3.3-V Low-Voltage Quadruple FET Bus Switches

with 5-V-Tolerant Level Shifter

SN74CB3T3125

14/16

SN74CB3T3245

20

2.5-V/3.3-V Low-Voltage 8-Bit FET Bus Switches

with 5-V-Tolerant Level Shifter

SN74CB3T3306

2.5-V/3.3-V Low-Voltage Dual FET Bus Switches

with 5-V-Tolerant Level Shifter

SN74CB3T3384

24

2.5-V/3.3-V Low-Voltage 10-Bit FET Bus Switches

with 5-V-Tolerant Level Shifter

SN74CB3T16210

48

SN74CB3T16211

56

SCDS120

SCDS136

SCDS119

SCDS159

2.5-V/3.3-V Low-Voltage 20-Bit FET Bus Switches

with 5-V-Tolerant Level Shifter

SCDS156

2.5-V/3.3-V Low-Voltage 24-Bit FET Bus Switches

with 5-V-Tolerant Level Shifter

SCDS147

SCDS148

SCDS149

SCDS157

Multiplexer/Demultiplexer
SN74CB3T3253

16

2.5-V/3.3-V Low-Voltage Dual 1-of-4 FET

Multiplexers/Demultiplexers with 5-V-Tolerant Level Shifter

SN74CB3T3257

16

2.5-V/3.3-V Low-Voltage 4-Bit 1-of-2 FET

Multiplexers/Demultiplexers with 5-V-Tolerant Level Shifter

56

2.5-V/3.3-V Low-Voltage 24-Bit FET Bus-Exchange Switches

with 5-V-Tolerant Level Shifter

Bus-Exchange Switch
SN74CB3T16212

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

470

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

CBT
Crossbar Technology Logic
Power and speed are two primary concerns in todays computing market. CBT
can address these issues in bus-interface applications. CBT enables a
bus-interface device to function as a very fast bus switch, effectively isolating
buses when the switch is open and offering very little propagation delay when
the switch is closed. These devices can function as high-speed bus interfaces
between computer-system components, such as the central processing unit
(CPU) and memory. CBT devices also can be used as 5-V to 3.3-V translators,
allowing designers to mix 5-V or 3.3-V components in the same system. In
addition, the new CBTxxxxC devices provide undershoot protection on all
ports down to 2 V.
The CBT devices are available in advanced packaging, such as the quad
flatpack no-lead (QFN) package, small-outline integrated circuit (SOIC),
small-outline transistor (SOT), quarter-size small-outline package (QSOP),
shrink small-outline package (SSOP), thin shrink small-outline package
(TSSOP), and thin very small-outline package (TVSOP) for reduced board
area. Selected devices are offered in MicroStar BGA (LFBGA) and
MicroStar Jr. (VFBGA) packages.
See www.ti.com/sc/logic for the most current data sheets.

471

DEVICE SELECTION GUIDE

CBT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

LFBGA

QFN

QSOP

SOIC

SOT

SSOP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

2-Port Switch
5

Single FET Bus Switches

SCDS046

SN74CBTD1G125

Single FET Bus Switches

with Level Shifting

SCDS063

SN74CBT1G384

Single FET Bus Switches

SCDS065

Single FET Bus Switches

with Level Shifting

SCDS066

SN74CBT3125

14/16

Quad FET Bus Switches

SN74CBT3126

14/16

Quad FET Bus Switches

SN74CBT3244

20

Octal FET Bus Switches

SCDS001

SN74CBT3245A

20

Octal FET Bus Switches

SCDS002

SN74CBT3306

Dual FET Bus Switches

SCDS016

SN74CBTD3306

Dual FET Bus Switches

with Level Shifting

SCDS030

SN74CBTS3306

Dual FET Bus Switches

with Schottky Diode Clamping

SCDS029

SN74CBT3345

20

8-Bit FET Bus Switches

SCDS027

SN74CBT3384A

24

10-Bit FET Bus Switches

SCDS004

SN74CBTD3384

24

10-Bit FET Bus Switches

with Level Shifting

SCDS025

SN74CBTS3384

24

10-Bit FET Bus Switches

with Schottky Diode Clamping

SCDS024

SN74CBT3861

24

10-Bit FET Bus Switches

SCDS061

SN74CBTD3861

24

10-Bit FET Bus Switches

with Level Shifting

SCDS084

SN74CBT6800A

24

10-Bit FET Bus Switches

with Precharged Outputs
for Live Insertion

SCDS005

SN74CBTK6800

24

10-Bit FET Bus Switches

with Precharged Outputs
and Active-Clamp
Undershoot-Protection Circuit

SCDS107

SN74CBTS6800

24

10-Bit FET Bus Switches

with Precharged Outputs
and Diode Clamping

SCDS102

SN74CBT1G125

SN74CBTD1G384

SCDS021
SCDS020

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

472

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

CBT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

LFBGA

QFN

QSOP

SOIC

SOT

SSOP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

SN74CBT16210

48

20-Bit FET Bus Switches

SN74CBTD16210

48

20-Bit FET Bus Switches

SN74CBT16211A

56

24-Bit FET Bus Switches

SN74CBTD16211

56

24-Bit FET Bus Switches

with Level Shifting

SCDS048

SN74CBTH16211

56

24-Bit FET Bus Switches with Bus Hold

SCDS062

SN74CBTS16211

56

24-Bit FET Bus Switches

with Schottky Diode Clamping

SCDS050

SN74CBT16244

48

16-Bit FET Bus Switches

SCDS031

SN74CBT16245

48

16-Bit FET Bus Switches

SCDS070

SN74CBTK16245

48

16-Bit FET Bus Switches

with Active-Clamp
Undershoot-Protection Circuit

SCDS105

SN74CBT16861

48

20-Bit FET Bus Switches

SN74CBTR16861

48

20-Bit FET Bus Switches

with Series Damping Resistors

SN74CBT32245

96

32-Bit FET Bus Switches

SCDS104

SN74CBTK32245

96

32-Bit FET Bus Switches

with Active-Clamp
Undershoot-Protection Circuit

SCDS106

SN74CBT34X245

80

32-Bit FET Bus Switches

SCDS033
SCDS049

SCDS028

SCDS068
SCDS078

SCDS089

Multiplexer/Demultiplexer
SN74CBT3251

16

1-of-8 FET Multiplexers/Demultiplexers

SCDS019

SN74CBT3253

16

Dual 1-of-4
FET Multiplexers/Demultiplexers

SCDS018

SN74CBT3257

16

4-Bit 1-of-2
FET Multiplexers/Demultiplexers

SCDS017

SN74CBT16214

56

12-Bit 1-of-3
FET Multiplexers/Demultiplexers

SCDS008

SN74CBT16232

56

Synchronous 16-Bit 1-of-2

FET Multiplexers/Demultiplexers

SCDS009

SN74CBT16233

56

16-Bit 1-of-2
FET Multiplexers/Demultiplexers

SCDS010

SN74CBT16292

56

12-Bit 1-of-2
FET Multiplexers/Demultiplexers
with Internal Pulldown Resistors

SCDS053

SN74CBT16390

56

16-Bit to 32-Bit FET

Multiplexer/Demultiplexer Bus Switches

SCDS035

SN74CBT162292

56

12-Bit 1-of-2
Multiplexers/Demultiplexers
with Internal Pulldown Resistors

SCDS052

SN74CBT3383

24

10-Bit FET Bus-Exchange Switches

SCDS003

SN74CBT16209A

48

18-Bit FET Bus-Exchange Switches

SN74CBT16212A

56

24-Bit FET Bus-Exchange Switches

SN74CBTS16212

56

24-Bit FET Bus-Exchange Switches

with Schottky Diode Clamping

SN74CBT16213

56

24-Bit FET Bus-Exchange Switches

Bus-Exchange Switch

SCDS006

SCDS007
SCDS036
SCDS026

473

DEVICE SELECTION GUIDE

CBT-C
5-V Bus-Switch
Crossbar Technology Logic
With 2-V Undershoot Protection
CBT-C is a high-speed TTL-compatible FET bus-switch family with low
ON-state resistance (ron) allowing for minimal propagation delay. These FET
bus switches provide high-performance low-power replacements for standard
bus-interface devices when signal buffering (current drive) is not required. The
new CBT-C family offers numerous enhancements over the original CBT
family, including 2-V undershoot protection, faster enable/disable times , and
an Ioff feature for partial-power-down mode operation. The improved
undershoot characteristics of the CBT-C family are particularly important in
system environments where signal reflections and undershoot are common.
Without such protection, an undershoot event could cause a switch in the OFF
state to be turned ON, creating bus contention and possible data corruption.
The active undershoot-protection circuitry on the A and B ports of the CBT-C
family provides protection for up to 2 V by sensing an undershoot event and
ensuring that the switch remains in the proper OFF state.
CBT-C devices are available in advanced packaging, such as the quarter-size
small-outline package (QSOP), thin shrink small-outline package (TSSOP),
thin very small-outline package (TVSOP), and quad flatpack no lead (QFN).
See www.ti.com/signalswitches for additional information regarding the
CBT-C product family.

475

DEVICE SELECTION GUIDE

CBT-C

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

QFN

SOIC

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE

2-Port Switch
SN74CBT3305C

Dual FET Bus Switches with 2-V Undershoot Protection

SCDS125

SN74CBTD3305C

Dual FET Bus Switches with Level Shifting and 2-V Undershoot Protection

SCDS126

SN74CBT3306C

Dual FET Bus Switches with 2-V Undershoot Protection

SCDS127

SN74CBTD3306C

Dual FET Bus Switches with Level Shifting and 2-V Undershoot Protection

SN74CBT3125C

14/16

SN74CBT3244C

SCDS128

Quadruple FET Bus Switches with 2-V Undershoot Protection

SCDS122

20

8-Bit FET Bus Switches with 2-V Undershoot Protection

SCDS130

SN74CBT3245C

20

8-Bit FET Bus Switches with 2-V Undershoot Protection

SCDS131

SN74CBT3345C

20

8-Bit FET Bus Switches with 2-V Undershoot Protection

SCDS129

SN74CBT3384C

24

10-Bit FET Bus Switches with 2-V Undershoot Protection

SCDS132

SN74CBTD3384C

24

10-Bit FET Bus Switches with Level Shifting and 2-V Undershoot Protection

SCDS133

SN74CBT6800C

24

10-Bit FET Bus Switches with Precharged Outputs

and 2-V Undershoot Protection

SCDS138

SN74CBT6845C

20

8-Bit FET Bus Switches with Precharged Outputs

and 2-V Undershoot Protection

SCDS140

SN74CBT16210C

48

20-Bit FET Bus Switches with 2-V Undershoot Protection

SCDS115

SN74CBT16211C

56

24-Bit FET Bus Switches with 2-V Undershoot Protection

SCDS116

SN74CBT16244C

48

16-Bit FET Bus Switches with 2-V Undershoot Protection

SCDS134

SN74CBT16245C

48

16-Bit FET Bus Switches with 2-V Undershoot Protection

SCDS139

SN74CBT16800C

48

20-Bit FET Bus Switches with Precharged Outputs

and 2-V Undershoot Protection

SCDS117

SN74CBT16811C

56

24-Bit FET Bus Switches with Precharged Outputs

and 2-V Undershoot Protection

SCDS118

Multiplexer/Demultiplexer
SN74CBT3253C

16

Dual 1-of-4 FET Multiplexers/Demultipexers with 2-V Undershoot Protection

SCDS123

SN74CBT3257C

16

4-Bit 1-of-2 FET Multiplexers/Demultipexers with 2-V Undershoot Protection

SCDS137

SN74CBT16214C

56

12-Bit 1-of-3 FET Multiplexers/Demultipexers with 2-V Undershoot Protection

56

12-Bit FET Bus-Exchange Switches with 2-V Undershoot Protection

SCDS121

Bus-Exchange Switch
SN74CBT16212C

SCDS146

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

476

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

CBTLV
Low-Voltage
Crossbar Technology Logic
TI developed the SN74CBTLV family of 3.3-V bus switches to complement its
existing SN74CBT family of 5-V bus switches. TI was the first to offer these
devices, designed for 3.3 V, in its continuing drive to provide low-voltage
solutions.
CBTLV devices can be used in multiprocessor systems as fast bus
connections, bus-exchange switches for crossbar systems, ping-pong
memory connections, or bus-byte swapping. They also can be used to replace
relays, improving connect/disconnect speed and eliminating relay reliability
problems. The CBTLV family, designed to operate at 3.3 V, furthers the goal
of an integrated system operating with LVTTL voltages.
The CBTLV devices are available in industry-leading packaging options, such
as the small-outline integrated circuit (SOIC), small-outline transistor (SOT),
small-outline package (SOP), quarter-size small-outline package (QSOP),
shrink small-outline package (SSOP), thin small-outline package (TSSOP),
and thin very small-outline package (TVSOP) for reduced board area.
See www.ti.com/sc/logic for the most current data sheets.

477

DEVICE SELECTION GUIDE

CBTLV

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
QFN

QSOP

SOIC

SOP

SOT

VFBGA

LITERATURE
REFERENCE

SSOP

TSSOP

TVSOP

SCDS037

2-Port Switch
SN74CBTLV1G125

Single FET Bus Switches

SCDS057

SN74CBTLV3125

14/16

Quadruple FET Bus Switches

SN74CBTLV3126

14/16

Quadruple FET Bus Switches

SCDS038

SN74CBTLV3245A

20

Octal FET Bus Switches

SCDS034

SN74CBTLV3384

24

10-Bit FET Bus Switches

SCDS059

SN74CBTLV3857

24

10-Bit FET Bus Switches

with Internal Pulldown Resistors

SCDS085

SN74CBTLV3861

24

10-Bit FET Bus Switches

SCDS041

SN74CBTLV16210

48

20-Bit FET Bus Switches

SN74CBTLV16211

56

24-Bit FET Bus Switches

SCDS043

SN74CBTLV16800

48

20-Bit FET Bus Switches

with Precharged Outputs

SCDS045

SCDS042

Multiplexer/Demultiplexer
SN74CBTLV3251

16

1-of-8 FET Multiplexers/Demultiplexers

SCDS054

SN74CBTLV3253

16

Dual 1-of-4 FET Multiplexers/Demultiplexers

SCDS039

SN74CBTLV3257

16

4-Bit 1-of-2 FET Multiplexers/Demultiplexers

SCDS040

56

12-Bit 1-of-2 FET

Multiplexers/Demultiplexers
with Internal Pulldown Resistors

SCDS055

56

12-Bit 1-of-2 FET

Multiplexers/Demultiplexers
with Internal Pulldown Resistors
and Series Damping Resistors

SN74CBTLV3383

24

10-Bit FET Bus-Exchange Switches

SN74CBTLV16212

56

24-Bit FET Bus-Exchange Switches

SN74CBTLV16292

SN74CBTLVR16292

SCDS056

Bus-Exchange Switch

SCDS047

SCDS044

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

478

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

CD4000
CMOS B-Series Integrated Circuits
The CD4000 family is a CMOS B series of devices, with a maximum dc
supply-voltage rating of 20 V. The family has a large number of functions,
including analog switches, monostable multivibrators, level converters,
counters, timers, display drivers, phase-locked loops (PLLs), and other
functions. The wide operating voltage range of this family allows use of the
CD4000 products in varied applications, including instrumentation, control,
and communications.
Key features:

Wide variety of functions

High noise immunity
Low power consumption
Propagation delay time similar to LSTTL products
5-, 10-, and 15-V parametric ratings
High fanout, typically 10
Excellent temperature stability

TIs CD4000 products were acquired from Harris Semiconductor in

December 1998.
See www.ti.com/sc/logic for the most current data sheets.

479

DEVICE SELECTION GUIDE

CD4000

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

TSSOP

LITERATURE
REFERENCE

CD4001B

14

Quad 2-Input NOR Gates

SCHS015

CD4001UB

14

Quad 2-Input Unbuffered NOR Gates

SCHS016

CD4002B

14

Dual 4-Input NOR Gates

SCHS015

CD4007UB

14

Dual Unbuffered Complementary Pairs Plus Inverter

SCHS018

CD4009UB

16

Hex Inverting Buffers/Converters

SCHS020

CD4010B

16

Hex Buffers/Converters

SCHS020

CD4010UB

16

Hex Buffers/Converters

CD4011B

14

Quad 2-Input NAND Gates

SCHS021

CD4011UB

14

Quad 2-Input Unbuffered NAND Gates

SCHS022

CD4012B

14

Dual 4-Input NAND Gates

SCHS021

CD4013B

14

Dual D-Type Flip-Flops

SCHS023

CD4014B

16

8-Stage Static Shift Registers

SCHS024

CD4015B

16

Dual 4-Stage Static Shift Registers

SCHS025

CD4016B

14

Quad Bilateral Switches

SCHS026

CD4017B

16

Decade Counters/Dividers with 1-of-10 Decoded Outputs

SCHS027

CD4018B

16

Divide-by-N Counters

SCHS028

CD4019B

16

Quad AND/OR Select Gates

SCHS029

CD4020B

16

12-Stage Ripple-Carry Binary Counters/Dividers

SCHS030

CD4021B

16

8-Stage Static Shift Registers

SCHS024

CD4022B

16

Octal Counters/Dividers with 1-of-8 Decoded Outputs

SCHS027

CD4023B

14

Triple 3-Input NAND Gates

SCHS021

CD4024B

14

7-Stage Ripple-Carry Binary Counters/Dividers

SCHS030

CD4025B

14

Triple 3-Input NOR Gates

SCHS015

CD4026B

16

Decade Counters/Drivers with Decoded 7-Segment Display Outputs

SCHS031

CD4027B

16

Dual J-K Master-Slave Flip-Flops

SCHS032

CD4028B

16

BCD-to-Decimal Decoders

SCHS033

CD4029B

16

Presettable Up/Down Binary or BCD-Decade Counters

SCHS034

CD4030B

14

Quad Exclusive-OR Gates

SCHS035

CD4031B

16

64-Stage Static Shift Registers

SCHS036

CD4033B

16

Decade Counters/Drivers with Decoded 7-Segment Display Outputs

SCHS031

CD4034B

24

8-Stage Static Bidirectional Parallel/Serial Input/Output Bus Registers

SCHS037

CD4035B

16

4-Stage Parallel-In/Parallel-Out Shift Registers

SCHS038

CD4040B

16

12-Stage Ripple-Carry Binary Counters/Dividers

SCHS030

CD4041UB

14

Quad True/Complement Buffers

SCHS039

CD4042B

16

Quad Clocked D Latches

SCHS040

CD4043B

16

Quad NOR R/S Latches with 3-State Outputs

SCHS041

CD4044B

16

Quad NAND R/S Latches with 3-State Outputs

SCHS041

CD4045B

16

21-Stage Counters

SCHS042

CD4046B

16

Micropower Phase-Locked Loops with VCO

SCHS043

CD4047B

14

Low-Power Monostable/Astable Multivibrators

SCHS044

commercial package description and availability

schedule
= Now
= Planned

480

See Appendix A for package information.

Call

DEVICE SELECTION GUIDE

CD4000

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

TSSOP

LITERATURE
REFERENCE

CD4048B

16

Multifunction Expandable 8-Input Gates

SCHS045

CD4049UB

16

Hex Buffers/Converters

SCHS046

CD4050B

16

Hex Buffers/Converters

SCHS046

CD4051B

16

8-Channel Analog Multiplexers/Demultiplexers with Logic-Level Conversion

SCHS047

CD4052B

16

Dual 4-Channel Analog Multiplexers/Demultiplexers with Logic-Level Conversion

SCHS047

CD4053B

16

Triple 2-Channel Analog Multiplexers/Demultiplexers with Logic-Level Conversion

SCHS047

CD4054B

16

4-Segment Liquid Crystal Display Drivers

SCHS048

CD4055B

16

BCD to 7-Segment Liquid Crystal Decoders/Drivers with Display-Frequency Output

SCHS048

CD4056B

16

BCD to 7-Segment Liquid Crystal Decoders/Drivers with Strobed Latch Function

SCHS048

CD4059A

24

Programmable Divide-by-N Counters

CD4060B

16

14-Stage Binary-Ripple Counters/Dividers and Oscillator

SCHS049

CD4063B

16

4-Bit Magnitude Comparators

SCHS050

CD4066B

14

Quad Bilateral Switches

SCHS051

CD4067B

24

Single 16-Channel Analog Multiplexers/Demultiplexers

SCHS052

CD4068B

14

8-Input NAND/AND Gates

SCHS053

CD4069UB

14

Hex Inverters

SCHS054

CD4070B

14

Quad Exclusive-OR Gates

SCHS055

CD4071B

14

Quad 2-Input OR Gates

SCHS056

CD4072B

14

Dual 4-Input OR Gates

SCHS056

CD4073B

14

Triple 3-Input AND Gates

SCHS057

CD4075B

14

Triple 3-Input OR Gates

SCHS056

CD4076B

16

4-Bit D-Type Registers

SCHS058

CD4077B

14

Quad Exclusive-NOR Gates

SCHS055

CD4078B

14

8-Input NOR/OR Gates

SCHS059

CD4081B

14

Quad 2-Input AND Gates

SCHS057

CD4082B

14

Dual 4-Input AND Gates

SCHS057

CD4085B

14

Dual 2-Wide 2-Input AND-OR-Invert Gates

SCHS060

CD4086B

14

Expandable 4-Wide 2-Input AND-OR-Invert Gates

SCHS061

CD4089B

16

4-Bit Binary Rate Multipliers

SCHS062

CD4093B

14

Quad 2-Input NAND Schmitt Triggers

SCHS115

CD4094B

16

8-Stage Shift-and-Store Bus Registers

SCHS063

CD4097B

24

Differential 8-Channel Analog Multiplexers/Demultiplexers

SCHS052

CD4098B

16

Dual Monostable Multivibrators

SCHS065

CD4099B

16

8-Bit Addressable Latches

SCHS066

CD4502B

16

Strobed Hex Inverters/Buffers

SCHS067

CD4503B

16

Hex Buffers

SCHS068

CD4504B

16

Hex Voltage-Level Shifters for TTL-to-CMOS or CMOS-to-CMOS Operation

SCHS069

CD4508B

24

Dual 4-Bit Latches

SCHS070

CD4510B

16

Presettable BCD Up/Down Counters

SCHS071

CD4511B

16

BCD to 7-Segment Latch Decoder Drivers

SCHS072

CD4512B

16

8-Channel Data Selectors

SCHS073

CD4514B

24

4-Bit Latches/4-to-16 Line Decoders

SCHS074

CD4515B

24

4-Bit Latches/4-to-16 Line Decoders

SCHS074

CD4516B

16

Presettable Binary Up/Down Counters

SCHS109

SCHS071

481

DEVICE SELECTION GUIDE

CD4000

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

CD4517B

16

Dual 64-Stage Static Shift Registers

CD4518B

16

Dual BCD Up Counters

CD4520B

16

Dual Binary Up Counters

CD4521B

16

24-Stage Frequency Dividers

CD4522B

16

Programmable BCD Divide-by-N Counters

CD4527B

16

BCD Rate Multipliers

CD4532B

16

8-Bit Priority Encoders

CD4536B

16

Programmable Timers

CD4541B

14

Programmable Timers

CD4543B

16

BCD to 7-Segment Latches/Decoders/Drivers for Liquid-Crystal Displays

CD4555B

16

Dual Binary 1-of-4 Decoders/Demultiplexers

CD4556B

16

CD4572UB
CD4585B

SOIC

SOP

TSSOP

LITERATURE
REFERENCE
SCHS075

SCHS076

SCHS076

SCHS078

SCHS079

SCHS080

SCHS082

SCHS083

SCHS085

SCHS086

SCHS087

Dual Binary 1-of-4 Decoders/Demultiplexers

16

Hex Gates (4 Inverters, 2-Input NOR, 2-Input NAND)

16

4-Bit Magnitude Comparators

CD4724B

16

8-Bit Addressable Latches

CD14538B

16

Dual-Precision Monostable Multivibrators

CD40102B

16

2-Decade BCD Presettable Synchronous Down Counters

CD40103B

16

8-Bit Binary Presettable Synchronous Down Counters

CD40106B

14

Hex Schmitt Triggers

CD40107B

Dual 2-Input NAND Buffers/Drivers

CD40109B

16

Quad Low- to High-Voltage Level Shifters

CD40110B

16

Decade Up-Down Counters/Latches/7-Segment Display Drivers

CD40117B

14

Programmable Dual 4-Bit Terminators

SCHS100

CD40147B

16

10-Line to 4-Line BCD Priority Encoders

SCHS102

CD40161B

16

Programmable 4-Bit Binary Counters with Asynchronous Clear

SCHS103

CD40174B

16

Hex D-Type Flip-Flops

SCHS104

CD40175B

16

Quad D-Type Flip-Flops

SCHS105

CD40192B

16

Presettable Binary Up/Down Counters with Dual Clock and Reset

SCHS106

CD40193B

16

Presettable Binary Up/Down Counters with Dual Clock and Reset

SCHS106

CD40194B

16

4-Bit Bidirectional Universal Shift Registers

SCHS107

CD40257B

16

Quad 2-Line to 1-Line Data Selectors/Multiplexers

SCHS108

482

SCHS087

SCHS090

SCHS091

SCHS092

SCHS093

SCHS095

SCHS095

SCHS096

SCHS097

SCHS098

SCHS099

DEVICE SELECTION GUIDE

74F
Fast Logic
74F logic is a general-purpose family of high-speed advanced bipolar logic.
TI provides over 50 functions in the 74F family, including gates,
buffers/drivers, bus transceivers, flip-flops, latches, counters, multiplexers,
and demultiplexers.
See www.ti.com/sc/logic for the most current data sheets.

483

DEVICE SELECTION GUIDE

74F

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

MIL

PDIP

SOIC

SOP

SSOP

LITERATURE
REFERENCE

SN74F00

14

Quad 2-Input NAND Gates

SDFS035

SN74F02

14

Quad 2-Input NOR Gates

SDFS036

SN74F04

14

Hex Inverters

SN74F08

14

Quad 2-Input AND Gates

SN74F10

14

Triple 3-Input NAND Gates

SDFS039

SN74F11

14

Triple 3-Input AND Gates

SDFS040

SN74F20

14

Dual 4-Input NAND Gates

SDFS041

SN74F21

14

Dual 4-Input AND Gates

SN74F27

14

Triple 3-Input NOR Gates

SDFS042

SN74F30

14

8-Input NAND Gates

SDFS043

SN74F32

14

Quad 2-Input OR Gates

SDFS044

SN74F38

14

Quad 2-Input NAND Gates

SDFS013

SN74F74

14

Dual D-Type Flip-Flops with Set and Reset

SDFS046

SN74F86

14

Quad 2-Input Exclusive-OR Gates

SDFS019

SN74F109

16

Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset

SDFS047

SN74F112

16

Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset

SDFS048

SN74F125

14

Quad Bus Buffers with 3-State Outputs

SDFS016

SN74F126

14

Quad Bus Buffers with 3-State Outputs

SDFS017

SN74F138

16

3-to-8 Line Inverting Decoders/Demultiplexers

SDFS051

SN74F151B

16

1-of-8 Data Selectors/Multiplexers

SDFS023

SN74F153

16

Dual 1-of-4 Data Selectors/Multiplexers

SDFS052

SN74F157A

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SDFS053

SN74F161A

16

Synchronous 4-Bit Binary Counters

SDFS056

SN74F163A

16

Synchronous 4-Bit Binary Counters

SDFS088

SN74F169

16

Synchronous 4-Bit Up/Down Binary Counters

SN74F174A

16

Hex D-Type Flip-Flops with Clear

SDFS029

SN74F175

16

Quad D-Type Flip-Flops with Clear

SDFS058

SN74F240

20

Octal Buffers/Drivers with 3-State Outputs

SN74F241

20

Octal Buffers/Drivers with 3-State Outputs

SN74F244

20

Octal Buffers and Line Drivers with 3-State Outputs

SDFS063

SN74F245

20

Octal Bus Transceivers with 3-State Outputs

SDFS010

SN74F251B

16

1-of-8 Data Selectors/Multiplexers with 3-State Outputs

SDFS037

SDFS038

SDFS006

SDFS089

SDFS061
SDFS090

SDFS066

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

484

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

74F

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

LITERATURE
REFERENCE

SN74F253

16

Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs

SDFS064

SN74F257

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SDFS065

SN74F258

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SDFS067

SN74F260

14

Dual 5-Input NOR Gates

SDFS012

SN74F280B

14

9-Bit Odd/Even Parity Generators/Checkers

SDFS008

SN74F283

16

9-Bit Binary Full Adders with Fast Carry

SDFS069

SN74F299

20

8-Bit Universal Shift/Storage Registers

SN74F373

20

Octal Transparent D-Type Latches with 3-State Outputs

SDFS076

SN74F374

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SDFS077

SN74F377A

20

Octal D-Type Flip-Flops with Enable

SN74F520

20

8-Bit Identity Comparators (P = Q) with Input Pullup Resistors

SN74F521

20

8-Bit Identity Comparators (P = Q)

SN74F541

20

Octal Buffers and Line Drivers with 3-State Outputs

SN74F543

24

Octal Registered Transceivers with 3-State Outputs

SN74F573

20

Octal Transparent D-Type Latches with 3-State Outputs

SN74F574

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SN74F623

20

Octal Bus Transceivers with 3-State Outputs

SDFS087

SN74F657

24

Octal Bus Transceivers with Parity Generators/Checkers and 3-State Outputs

SDFS027

SN74F1016

20

16-Bit Schottky Barrier Diode R-C Bus-Termination Arrays

SDFS093

SN74F1056

16

8-Bit Schottky Barrier Diode Bus-Termination Arrays

SDFS085

SN74F2244

20

Octal Buffers/Line Drivers with Series Damping Resistors and 3-State Outputs

SDFS095

SN74F2245

20

Octal Bus Transceivers with Series Damping Resistors and 3-State Outputs

SDFS099

SN74F2373

20

25- Octal Transparent D-Type Latches with 3-State Outputs

SDFS100

SDFS071

SDFS018
SDFS081
SDFS091
SDFS021

SDFS025
SDFS011

SDFS005

485

DEVICE SELECTION GUIDE

FB+/BTL
FutureBus+/
Backplane Transceiver Logic
The FB+ series of devices is designed for use in double-terminated
high-speed bus applications and is fully compatible with IEEE Std 896-1991
(FutureBus+) and IEEE Std 1194.1-1991 (BTL). These transceivers are
available in 7-, 8-, 9-, and 18-bit versions for 5-V CMOS or TTL-to-BTL and
BTL-to-TTL translations. Other features include BTL drive up to 100 mA, low
(5 pF to 6 pF maximum) B-port Cio, tpd performance below 5 ns, and B-port
BIAS VCC pins for live insertion.
One device, the 18-bit FB1653, offers 5-V CMOS, TTL- or LVTTL-to-BTL and
BTL-to-LVTTL translations.
See www.ti.com/sc/logic for the most current data sheets.

487

DEVICE SELECTION GUIDE

FB+/BTL

DEVICE

AVAILABILITY

NO.
PINS

DESCRIPTION

MIL

QFP

TQFP

LITERATURE
REFERENCE

SN74FB1650

100

18-Bit TTL/BTL Universal Storage Transceivers

SCBS178

SN74FB1651

100

17-Bit TTL/BTL Universal Storage Transceivers with Buffered Clock Lines

SCBS177

SN74FB1653

100

17-Bit LVTTL/BTL Universal Storage Transceivers with Buffered Clock Lines

SCBS702

SN74FB2031

52

9-Bit TTL/BTL Address/Data Transceivers

SN74FB2033K

52

8-Bit TTL/BTL Registered Transceivers

SN74FB2040

52

8-Bit TTL/BTL Transceivers

SN74FB2041A

52

7-Bit TTL/BTL Transceivers

SCBS176

SCBS472

SCBS173

SCBS172

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

488

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

FCT
Fast CMOS TTL Logic
The FCT product family is designed for high-current-drive bus-interface
applications. The FCT family is fabricated using a CMOS 6-m technology to
provide up to 40-mA or 64-mA current sink capability, with typical propagation
delays of 5 ns (CD74FCT245). The family is optimized to operate at 5 V and
is pin-function compatible with most standard bipolar and CMOS logic
families.
The FCT family of devices has several features for efficient bus interfacing.
The family does not have input or output diodes to VCC, and most FCT devices
have 3-state outputs. Bus noise is minimized with 1-V, or less, typical ground
bounce (Volp, 5-V VCC, 25C) and limited output voltage swing (3.5 V typical).
The FCT family includes 8-, 9-, and 10-bit bus-interface devices.
Key features:

S
S
S
S

5-V operation
5-ns typical propagation delay (CD74FCT245)
Low quiescent power consumption
1-V typical Volp

TIs FCT family was acquired from Harris Semiconductor in December 1998.
See www.ti.com/sc/logic for the most current data sheets.

489

DEVICE SELECTION GUIDE

FCT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

QSOP

SOIC

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE

CY29FCT52CT

24

Octal Registered Transceivers with 3-State Outputs

SCCS010

CY74FCT138AT

16

1-of-8 Decoders

SCCS013

CY74FCT138CT

16

1-of-8 Decoders

SCCS013

CY74FCT138T

16

1-of-8 Decoders

SCCS013

CY74FCT157AT

16

Quad 2-Input Multiplexers

SCCS014

CY74FCT157CT

16

Quad 2-Input Multiplexers

SCCS014

CY74FCT163CT

16

Synchronous 4-Bit Binary Counters

SCCS015

CY74FCT163T

16

Synchronous 4-Bit Binary Counters

CY74FCT191AT

16

Presettable Synchronous 4-Bit Up/Down Binary Counters

CY74FCT191CT

16

Presettable Synchronous 4-Bit Up/Down Binary Counters

CY74FCT240AT

20

Octal Buffers/Drivers with 3-State Outputs

CY74FCT240CT

20

Octal Buffers/Drivers with 3-State Outputs

CY74FCT240T

20

Octal Buffers/Drivers with 3-State Outputs

CD74FCT244

20

Octal Buffers and Line Drivers with 3-State Outputs

CD74FCT244AT

20

Octal Buffers and Line Drivers with 3-State Outputs

CY74FCT244AT

20

Octal Buffers and Line Drivers with 3-State Outputs

CY74FCT244CT

20

Octal Buffers and Line Drivers with 3-State Outputs

CY74FCT244DT

20

Octal Buffers and Line Drivers with 3-State Outputs

CY74FCT244T

20

Octal Buffers and Line Drivers with 3-State Outputs

CD74FCT245

20

Octal Bus Transceivers with 3-State Outputs

CY74FCT245AT

20

Octal Bus Transceivers with 3-State Outputs

CY74FCT245CT

20

Octal Bus Transceivers with 3-State Outputs

CY74FCT245DT

20

Octal Bus Transceivers with 3-State Outputs

CY74FCT245T

20

Octal Bus Transceivers with 3-State Outputs

CY74FCT257AT

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

CY74FCT257CT

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

CY74FCT257T

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

CD74FCT273

20

Octal D-Type Flip-Flops with Clear

CY74FCT273AT

20

Octal D-Type Flip-Flops with Clear

SCCS020

CY74FCT273CT

20

Octal D-Type Flip-Flops with Clear

SCCS020

CY74FCT273T

20

Octal D-Type Flip-Flops with Clear

SCCS020

CY74FCT373AT

20

Octal Transparent D-Type Latches with 3-State Outputs

SCCS021

CY74FCT373CT

20

Octal Transparent D-Type Latches with 3-State Outputs

SCCS021

CY74FCT373T

20

Octal Transparent D-Type Latches with 3-State Outputs

CD74FCT374

20

Octal Transparent D-Type Latches with 3-State Outputs

CY74FCT374AT

20

Octal Transparent D-Type Latches with 3-State Outputs

CY74FCT374CT

20

Octal Transparent D-Type Latches with 3-State Outputs

CY74FCT374T

20

Octal Transparent D-Type Latches with 3-State Outputs

CY74FCT377AT

20

Octal D-Type Flip-Flops with Enable

CY74FCT377CT

20

Octal D-Type Flip-Flops with Enable

CY74FCT377T

20

Octal D-Type Flip-Flops with Enable

SCCS015

SCCS016

SCCS017

SCCS017

SCCS017

SCCS017

SCCS017

SCCS017

SCCS017

SCHS271

SCCS018

SCCS018

SCCS018

SCCS018

SCCS019

SCCS019

SCCS019

SCHS270
SCHS270

SCHS254

SCCS021

SCHS256

SCCS022

SCCS022

SCCS022

SCCS023

SCCS023

SCCS023

schedule

490

commercial package description and availability

= Now
= Planned

SCCS016

See Appendix A for package information.

DEVICE SELECTION GUIDE

FCT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

QSOP

SOIC

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE

CY74FCT399AT

16

Quad 2-Input Multiplexers with Storage

CY74FCT399CT

16

Quad 2-Input Multiplexers with Storage

CY74FCT480AT

24

Dual 8-Bit Parity Generators/Checkers

CY74FCT480BT

24

Dual 8-Bit Parity Generators/Checkers

CY29FCT520AT

24

8-Bit Multi-Level Pipeline Registers

CY29FCT520BT

24

CY29FCT520CT

24

CD74FCT540

20

Inverting Octal Buffers and Line Drivers with 3-State Outputs

CY74FCT540CT

20

Inverting Octal Buffers and Line Drivers with 3-State Outputs

CD74FCT541

20

Octal Buffers and Line Drivers with 3-State Outputs

CY74FCT541AT

20

Octal Buffers and Line Drivers with 3-State Outputs

CY74FCT541CT

20

Octal Buffers and Line Drivers with 3-State Outputs

CY74FCT541T

20

Octal Buffers and Line Drivers with 3-State Outputs

CD74FCT543

24

Octal Registered Transceivers with 3-State Outputs

CY74FCT543AT

24

Octal Registered Transceivers with 3-State Outputs

CY74FCT543CT

24

Octal Registered Transceivers with 3-State Outputs

CY74FCT543T

24

Octal Registered Transceivers with 3-State Outputs

CD74FCT564

20

Octal Inverting D-Type Flip-Flops with 3-State Outputs

CD74FCT573

20

Octal Transparent D-Type Latches with 3-State Outputs

CD74FCT573AT

20

Octal Transparent D-Type Latches with 3-State Outputs

CY74FCT573AT

20

Octal Transparent D-Type Latches with 3-State Outputs

CY74FCT573CT

20

CY74FCT573T

20

CD74FCT574

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

CY74FCT574AT

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SCCS022

CY74FCT574CT

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SCCS022

CY74FCT574T

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SCCS022

CD74FCT623

20

Octal Bus Transceivers with 3-State Outputs

CY74FCT646AT

24

Octal Registered Bus Transceivers with 3-State Outputs

CY74FCT646CT

24

Octal Registered Bus Transceivers with 3-State Outputs

CY74FCT646T

24

CY74FCT652AT
CY74FCT652CT

SCCS024
SCCS024

SCCS025

SCCS025

SCCS011

8-Bit Multi-Level Pipeline Registers

SCCS011

8-Bit Multi-Level Pipeline Registers

SCCS011

SCHS257

SCHS257

SCCS029

SCCS029

SCCS029

SCCS029

SCHS258

SCCS030

SCCS030

SCCS030

SCHS259

SCCS021

Octal Transparent D-Type Latches with 3-State Outputs

SCCS021

Octal Transparent D-Type Latches with 3-State Outputs

SCCS021

SCHS260

SCHS260

SCHS259

SCHS296

SCCS031

SCCS031

Octal Registered Bus Transceivers with 3-State Outputs

SCCS031

24

Octal Bus Transceivers and Registers with 3-State Outputs

SCCS032

24

Octal Bus Transceivers and Registers with 3-State Outputs

SCCS032

CY74FCT652T

24

Octal Bus Transceivers and Registers with 3-State Outputs

SCCS032

CY29FCT818AT

24

Diagnostic Scan Registers

CY29FCT818CT

24

Diagnostic Scan Registers

CY74FCT821AT

24

10-Bit Bus-Interface Flip-Flops with 3-State Outputs

CY74FCT821BT

24

10-Bit Bus-Interface Flip-Flops with 3-State Outputs

CY74FCT821CT

24

10-Bit Bus-Interface Flip-Flops with 3-State Outputs

CY74FCT823AT

24

9-Bit Bus-Interface Flip-Flops with 3-State Outputs

CY74FCT823BT

24

9-Bit Bus-Interface Flip-Flops with 3-State Outputs

CY74FCT823CT

24

CY74FCT825CT

SCCS012

SCCS012

SCCS033

SCCS033

SCCS033

SCCS033

9-Bit Bus-Interface Flip-Flops with 3-State Outputs

SCCS033

24

8-Bit Bus-Interface Flip-Flops with 3-State Outputs

SCCS033

CY74FCT827AT

24

10-Bit Buffers/Drivers with 3-State Outputs

SCCS034

CY74FCT827CT

24

10-Bit Buffers/Drivers with 3-State Outputs

SCCS034

SCCS033

491

DEVICE SELECTION GUIDE

FCT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

QSOP

SOIC

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE

CY74FCT841AT

24

10-Bit Bus-Interface D-Type Latches with 3-State Outputs

CY74FCT841BT

24

10-Bit Bus-Interface D-Type Latches with 3-State Outputs

CY74FCT841CT

24

10-Bit Bus-Interface D-Type Latches with 3-State Outputs

CD74FCT843A

24

9-Bit Bus-Interface D-Type Latches with 3-State Outputs

CY74FCT2240AT

20

Octal Buffers/Line Drivers

with Series Damping Resistors and 3-State Outputs

CY74FCT2240CT

20

Octal Buffers/Line Drivers

with Series Damping Resistors and 3-State Outputs

CY74FCT2240T

20

Octal Buffers/Line Drivers

with Series Damping Resistors and 3-State Outputs

CY74FCT2244AT

20

Octal Buffers/Line Drivers

with Series Damping Resistors and 3-State Outputs

SCCS036

CY74FCT2244CT

20

Octal Buffers/Line Drivers

with Series Damping Resistors and 3-State Outputs

SCCS036

CY74FCT2244T

20

Octal Buffers/Line Drivers

with Series Damping Resistors and 3-State Outputs

SCCS036

CY74FCT2245AT

20

Octal Bus Transceivers

with Series Damping Resistors and 3-State Outputs

SCCS037

CY74FCT2245CT

20

Octal Bus Transceivers

with Series Damping Resistors and 3-State Outputs

SCCS037

CY74FCT2245T

20

Octal Bus Transceivers

with Series Damping Resistors and 3-State Outputs

SCCS037

CY74FCT2257AT

16

Quad 1-of-2 Data Selectors/Multiplexers

with Series Damping Resistors and 3-State Outputs

SCCS038

CY74FCT2257CT

16

Quad 1-of-2 Data Selectors/Multiplexers

with Series Damping Resistors and 3-State Outputs

SCCS038

CY74FCT2373AT

20

Octal Transparent D-Type Latches

with Series Damping Resistors and 3-State Outputs

SCCS039

CY74FCT2373CT

20

Octal Transparent D-Type Latches

with Series Damping Resistors and 3-State Outputs

SCCS039

CY74FCT2373T

20

Octal Transparent D-Type Latches

with Series Damping Resistors and 3-State Outputs

SCCS039

CY74FCT2374AT

20

Octal Transparent D-Type Latches

with Series Damping Resistors and 3-State Outputs

SCCS040

CY74FCT2374CT

20

Octal Transparent D-Type Latches

with Series Damping Resistors and 3-State Outputs

SCCS040

CY74FCT2374T

20

Octal Transparent D-Type Latches

with Series Damping Resistors and 3-State Outputs

CY74FCT2541AT

20

Octal Line Drivers/MOS Drivers with 3-State Outputs

SCCS041

CY74FCT2541CT

20

Octal Line Drivers/MOS Drivers with 3-State Outputs

SCCS041

CY74FCT2541T

20

Octal Line Drivers/MOS Drivers with 3-State Outputs

SCCS041

CY74FCT2543AT

24

Octal Registered Transceivers

with Series Damping Resistors and 3-State Outputs

SCCS042

CY74FCT2543CT

24

Octal Registered Transceivers

with Series Damping Resistors and 3-State Outputs

SCCS042

CY74FCT2543T

24

Octal Registered Transceivers

with Series Damping Resistors and 3-State Outputs

SCCS042

CY74FCT2573AT

20

Octal Transparent D-Type Latches

with Series Damping Resistors and 3-State Outputs

SCCS039

492

SCCS035

SCCS035

SCHS267

SCCS036

SCCS036

SCCS035

SCCS036

SCCS040

DEVICE SELECTION GUIDE

FCT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

QSOP

SOIC

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE

CY74FCT2573CT

20

Octal Transparent D-Type Latches

with Series Damping Resistors and 3-State Outputs

CY74FCT2573T

20

Octal Transparent D-Type Latches

with Series Damping Resistors and 3-State Outputs

CY74FCT2574AT

20

Octal Transparent D-Type Latches

with Series Damping Resistors and 3-State Outputs

SCCS040

CY74FCT2574CT

20

Octal Transparent D-Type Latches

with Series Damping Resistors and 3-State Outputs

SCCS040

CY74FCT2574T

20

Octal Transparent D-Type Latches

with Series Damping Resistors and 3-State Outputs

CY74FCT2646AT

24

Octal Registered Bus Transceivers

with Series Damping Resistors and 3-State Outputs

SCCS043

CY74FCT2646CT

24

Octal Registered Bus Transceivers

with Series Damping Resistors and 3-State Outputs

SCCS043

CY74FCT2652AT

24

Octal Bus Transceivers and Registers

with Series Damping Resistors and 3-State Outputs

SCCS044

CY74FCT2652CT

24

Octal Bus Transceivers and Registers

with Series Damping Resistors and 3-State Outputs

SCCS044

CY74FCT2827AT

24

10-Bit Buffers/Drivers
with Series Damping Resistors and 3-State Outputs

SCCS045

CY74FCT2827CT

24

10-Bit Buffers/Drivers
with Series Damping Resistors and 3-State Outputs

SCCS045

CD74FCT2952A

24

Octal Bus Transceivers and Registers with 3-State Outputs

CY74FCT16240AT

48

16-Bit Buffers/Drivers with 3-State Outputs

SCCS027

CY74FCT16244AT

48

16-Bit Buffers/Drivers with 3-State Outputs

SCCS028

CY74FCT16244CT

48

16-Bit Buffers/Drivers with 3-State Outputs

SCCS028

CY74FCT16244T

48

16-Bit Buffers/Drivers with 3-State Outputs

SCCS028

CY74FCT16245AT

48

16-Bit Bus Transceivers with 3-State Outputs

SCCS026

CY74FCT16245CT

48

16-Bit Bus Transceivers with 3-State Outputs

SCCS026

CY74FCT16245T

48

16-Bit Bus Transceivers with 3-State Outputs

CY74FCT16373AT

48

16-Bit Transparent D-Type Latches with 3-State Outputs

SCCS054

CY74FCT16373CT

48

16-Bit Transparent D-Type Latches with 3-State Outputs

SCCS054

CY74FCT16374AT

48

16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SCCS055

CY74FCT16374CT

48

16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SCCS055

CY74FCT16374T

48

16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs

CY74FCT16500CT

56

18-Bit Universal Bus Transceivers with 3-State Outputs

CY74FCT16501AT

56

18-Bit Universal Bus Transceivers with 3-State Outputs

CY74FCT16543AT

56

16-Bit Registered Transceivers with 3-State Outputs

CY74FCT16543CT

56

16-Bit Registered Transceivers with 3-State Outputs

SCCS059

CY74FCT16543T

56

16-Bit Registered Transceivers with 3-State Outputs

SCCS059

CY74FCT16646AT

56

16-Bit Bus Transceivers and Registers with 3-State Outputs

SCCS060

CY74FCT16646CT

56

16-Bit Bus Transceivers and Registers with 3-State Outputs

SCCS060

CY74FCT16646T

56

16-Bit Bus Transceivers and Registers with 3-State Outputs

SCCS060

CY74FCT16652AT

56

16-Bit Bus Transceivers and Registers with 3-State Outputs

SCCS061

CY74FCT16652CT

56

16-Bit Bus Transceivers and Registers with 3-State Outputs

SCCS061

CY74FCT16823AT

56

18-Bit D-Type Flip-Flops with 3-State Outputs

CY74FCT16823CT

56

18-Bit D-Type Flip-Flops with 3-State Outputs

SCCS039

SCCS039

SCCS040

SCBS720

SCCS055

SCCS056
SCCS057

SCCS026

SCCS059

SCCS062

SCCS062

493

DEVICE SELECTION GUIDE

FCT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

QSOP

SOIC

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE

CY74FCT16827AT

56

20-Bit Buffers/Drivers with 3-State Outputs

CY74FCT16827CT

56

20-Bit Buffers/Drivers with 3-State Outputs

CY74FCT16841AT

56

20-Bit Bus-Interface D-Type Latches with 3-State Outputs

SCCS067

CY74FCT16841CT

56

20-Bit Bus-Interface D-Type Latches with 3-State Outputs

SCCS067

CY74FCT16952AT

56

16-Bit Registered Transceivers with 3-State Outputs

SCCS065

CY74FCT16952CT

56

16-Bit Registered Transceivers with 3-State Outputs

SCCS065

CY74FCT162240CT

48

16-Bit Buffers/Drivers with 3-State Outputs

SCCS027

CY74FCT162244AT

48

16-Bit Buffers/Drivers with 3-State Outputs

SCCS028

CY74FCT162244CT

48

16-Bit Buffers/Drivers with 3-State Outputs

SCCS028

CY74FCT162244T

48

16-Bit Buffers/Drivers with 3-State Outputs

SCCS028

CY74FCT162H244AT

48

16-Bit Buffers/Drivers with Bus Hold and 3-State Outputs

SCCS028

CY74FCT162H244CT

48

16-Bit Buffers/Drivers with Bus Hold and 3-State Outputs

CY74FCT162245AT

48

16-Bit Bus Transceivers with 3-State Outputs

SCCS026

CY74FCT162245CT

48

16-Bit Bus Transceivers with 3-State Outputs

SCCS026

CY74FCT162245T

48

16-Bit Bus Transceivers with 3-State Outputs

SCCS026

CY74FCT162H245AT

48

16-Bit Bus Transceivers with Bus Hold and 3-State Outputs

SCCS026

CY74FCT162H245CT

48

16-Bit Bus Transceivers with Bus Hold and 3-State Outputs

SCCS026

CY74FCT162373AT

48

16-Bit Transparent D-Type Latches with 3-State Outputs

SCCS054

CY74FCT162373CT

48

16-Bit Transparent D-Type Latches with 3-State Outputs

SCCS054

CY74FCT162374AT

48

16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SCCS055

CY74FCT162374CT

48

16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SCCS055

CY74FCT162374T

48

16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SCCS055

CY74FCT162500AT

56

18-Bit Universal Bus Transceivers with 3-State Outputs

SCCS056

CY74FCT162500CT

56

18-Bit Universal Bus Transceivers with 3-State Outputs

SCCS056

CY74FCT162501AT

56

18-Bit Universal Bus Transceivers with 3-State Outputs

SCCS057

CY74FCT162501CT

56

18-Bit Universal Bus Transceivers with 3-State Outputs

SCCS057

CY74FCT162H501CT

56

18-Bit Universal Bus Transceivers with Bus Hold

and 3-State Outputs

SCCS057

CY74FCT162543AT

56

16-Bit Registered Transceivers with 3-State Outputs

SCCS059

CY74FCT162543CT

56

16-Bit Registered Transceivers with 3-State Outputs

SCCS059

CY74FCT162543T

56

16-Bit Registered Transceivers with 3-State Outputs

CY74FCT162H543CT

56

16-Bit Registered Transceivers with Bus Hold

and 3-State Outputs

CY74FCT162646AT

56

16-Bit Bus Transceivers and Registers with 3-State Outputs

CY74FCT162646CT

56

16-Bit Bus Transceivers and Registers with 3-State Outputs

CY74FCT162652AT

56

16-Bit Bus Transceivers and Registers with 3-State Outputs

CY74FCT162652CT

56

16-Bit Bus Transceivers and Registers with 3-State Outputs

CY74FCT162823AT

56

18-Bit D-Type Flip-Flops with 3-State Outputs

CY74FCT162823CT

56

18-Bit D-Type Flip-Flops with 3-State Outputs

CY74FCT162827AT

56

20-Bit Buffers/Drivers with 3-State Outputs

SCCS064

CY74FCT162827BT

56

20-Bit Buffers/Drivers with 3-State Outputs

SCCS064

CY74FCT162827CT

56

20-Bit Buffers/Drivers with 3-State Outputs

CY74FCT162841CT

56

20-Bit Bus-Interface D-Type Latches with 3-State Outputs

CY74FCT162952AT

56

16-Bit Registered Transceivers with 3-State Outputs

CY74FCT162952BT

56

16-Bit Registered Transceivers with 3-State Outputs

494

SCCS064

SCCS064

SCCS028

SCCS059

SCCS059

SCCS060

SCCS060

SCCS061

SCCS061

SCCS062

SCCS062

SCCS064

SCCS067

SCCS065
SCCS065

DEVICE SELECTION GUIDE

FCT

DEVICE

NO.
PINS

CY74FCT162H952AT

56

16-Bit Registered Transceivers with Bus Hold

and 3-State Outputs

CY74FCT162H952CT

56

16-Bit Registered Transceivers with Bus Hold

and 3-State Outputs

DESCRIPTION

AVAILABILITY
MIL

PDIP

QSOP

SOIC

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE
SCCS065
SCCS065

495

DEVICE SELECTION GUIDE

FIFO
First-In, First-Out Memories
Todays competitive environment creates a constant need for greater system
performance. One common method to optimize system performance involves
the use of a first-in, first-out (FIFO) memory to eliminate the data bottlenecks
common between digital signal processors (DSPs), high-speed processors,
industry-standard buses, memory devices, and analog front ends (AFEs).
TI offers a wide range of FIFO devices designed for use in a variety of systems,
including real-time DSP applications, telecommunications, internetworking,
medical/industrial imaging, precision instrumentation, and high-bandwidth
computing.
New DSP-Sync FIFO Products
Designed to work directly with TI DSPs that drive todays digital revolution, TIs
new DSP-sync FIFOs provide a glueless DSP interface and offer the features
necessary to enhance your DSP-based system designs. These new
DSP-sync FIFOs leverage TIs most advanced processing technology to
create world-class FIFO performance and set new levels in cost efficiency.
Visit the TI FIFO home page at http://www.ti.com/sc/fifo for a comprehensive
overview of TIs FIFO product line, new product releases, data sheets,
application reports, and pricing.

497

DEVICE SELECTION GUIDE

FIFO
NO.
PINS

DEVICE

CLOCK
(MHz)

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SSOP

PLCC

QFP

LQFP

TQFP

LFBGA

LITERATURE
REFERENCE

36-Bit Synchronous FIFOs

SN74ABT3611

132, 120

67

64 36, 5-V Synchronous FIFOs

SCBS127

SN74ABT3613

132, 120

67

64 36, 5-V Synchronous FIFO

SCBS128

SCBS129

SCBS126

SN74ABT3612

132, 120

67

64 36 2, 5-V Synchronous
Bidirectional FIFOs

SN74ABT3614

132, 120

67

64 36 2, 5-V Synchronous
Bidirectional FIFOs

SN74ACT3622

132, 120

67

256 36 2, 5-V Synchronous

Bidirectional FIFOs

SCAS247

SN74ACT3631

132, 120

67

512 36, 5-V Synchronous FIFOs

SCAS246

SCAS224

SN74ACT3632

132, 120

67

512 36 2, 5-V Synchronous

Bidirectional FIFOs

SN74ACT3641

132, 120

67

1K 36, 5-V Synchronous FIFOs

SCAS338

SN74ACT3651

132, 120

67

2K 36, 5-V Synchronous FIFOs

SCAS439

SN74ALVC3631

132, 120

100

512 36, 3.3V Synchronous FIFOs

SDMS025

SN74ALVC3641

132, 120

100

1K 36, 3.3-V Synchronous FIFOs

SDMS025

SN74ALVC3651

132, 120

100

2K 36, 3.3-V Synchronous FIFOs

SDMS025

SN74V3640

128

166

1024 36, 3.3-V Synchronous FIFOs

SCAS668

SN74V3650

128

166

2048 36, 3.3-V Synchronous FIFOs

SCAS668

SN74V3660

128

166

4096 36, 3.3-V Synchronous FIFOs

SCAS668

SN74V3670

128

166

8192 36, 3.3-V Synchronous FIFOs

SCAS668

SN74V3680

128

166

16384 36, 3.3-V Synchronous FIFOs

SCAS668

SN74V3690

128

166

32768 36, 3.3-V Synchronous FIFOs

SCAS668

67

512 32 2, 5-V Synchronous

Bidirectional FIFOs

SCAS228

32-Bit Synchronous FIFOs

SN74ACT3638

132, 120

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

498

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

FIFO

DEVICE

NO.
PINS

CLOCK
(MHz)

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SSOP

PLCC

QFP

LQFP

TQFP

LFBGA

LITERATURE
REFERENCE

18-Bit Synchronous FIFOs

SN74ACT7813

56

67

64 18, 5-V Synchronous FIFOs

SCAS199

SN74ACT7805

56

67

256 18, 5-V Synchronous FIFOs

SCAS201

SN74ACT7803

56

67

512 18, 5-V Synchronous FIFOs

SCAS191

SN74ABT7819

80

100

512 18 2, 5-V Synchronous

Bidirectional FIFOs

SN74ACT7811

68, 80

67

1K 18, 5-V Synchronous FIFOs

SN74ACT7881

68, 80

67

1K 18, 5-V Synchronous FIFOs

SN74ACT7882

68, 80

67

2K 18, 5-V Synchronous FIFOs

SN74ALVC7813

56

50

64 18, 3.3-V Synchronous FIFOs

SCAS594

SN74ALVC7805

56

50

256 18, 3.3-V Synchronous FIFOs

SCAS593

SN74ALVC7803

56

50

512 18, 3.3-V Synchronous FIFOs

SCAS436

SN74V215

64

133

512 18, 3.3-V Synchronous FIFOs

SCAS636

SN74V225

64

133

1K 18, 3.3-V Synchronous FIFOs

SCAS636

SN74V235

64

133

2K 18, 3.3-V Synchronous FIFOs

SCAS636

SN74V245

64

133

4K 18, 3.3-V Synchronous FIFOs

SCAS636

SCAS669

SCBS125

SCAS151

SCAS227

SCAS445

SN74V263

80, 100

166

8K 18/16K 9,
3.3-V Synchronous FIFOs

SN74V273

80, 100

166

16K 18/32K 9,
3.3-V Synchronous FIFOs

SCAS669

SN74V283

80, 100

166

32K 18/64K 9,
3.3-V Synchronous FIFOs

SCAS669

SN74V293

80, 100

166

64K 18/128K 9,
3.3-V Synchronous FIFOs

SCAS669

18-Bit Asynchronous FIFOs

SN74ACT7814

56

50

64 18, 5-V Asynchronous FIFOs

SCAS209

SN74ACT7806

56

50

256 18, 5V Asynchronous FIFOs0

SCAS438

SN74ACT7804

56

50

512 18, 5-V Asynchronous FIFOs

SCAS204

SN74ABT7820

80

67

512 18 2, 5-V Asynchronous

Bidirectional FIFOs

SN74ACT7802

80

40

1K 18, 5-V Asynchronous FIFOs

SN74ALVC7814

56

40

64 18, 3.3-V Asynchronous FIFOs

SCAS592

SN74ALVC7806

56

40

256 18, 3.3-V Asynchronous FIFOs

SCAS591

SN74ALVC7804

56

40

512 18, 3.3-V Asynchronous FIFOs

SCAS437

SN74ACT2235

44, 64

50

1K 9 2, 5-V Asynchronous
Bidirectional FIFOs

SCAS148

SN74ACT7807

44, 64

67

2K 9, 5-V Synchronous FIFOs

SCAS200

SN74ACT7808

44, 64

50

2K 9, 5-V Asynchronous FIFOs

SCAS205

SCAS206

SCAS187

9-Bit FIFOs

499

DEVICE SELECTION GUIDE

FIFO

DEVICE

NO.
PINS

CLOCK
(MHz)

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SSOP

PLCC

QFP

LQFP

TQFP

LFBGA

LITERATURE
REFERENCE

1-Bit Telecommunication FIFOs

SN74ACT2226

24

22

64 1 2, 5-V Independent
Synchronous FIFOs

SCAS219

SN74ACT2227

28

60

64 1 2, 5-V Independent
Synchronous FIFOs

SCAS220

SN74ACT2228

24

22

256 1 2, 5-V Independent

Synchronous FIFOs

SCAS219

SN74ACT2229

28

60

256 1 2, 5-V Independent

Synchronous FIFOs

SCAS220

SN74LS224A

16

10

16 4, 5-V Synchronous FIFOs

SN74ALS232B

16, 20

40

16 4, 5-V Asynchronous FIFOs

SN74ALS236

16

30

16 4, 5-V Asynchronous FIFOs

SDAS107

CD40105B

16

16 4, 5-V Asynchronous FIFOs

SCHS096

CD74HC40105

16

12

16 4, 5-V Asynchronous FIFOs

SCHS222

CD74HCT40105

16

12

16 4, 5-V Asynchronous FIFOs

SCHS222

SN74S225

20

10

16 5, 5-V Asynchronous FIFOs

SN74ALS229B

20

40

16 5, 5-V Asynchronous FIFOs

SN74ALS233B

20

40

16 5, 5-V Asynchronous FIFOs

Mature Products

4100

SDLS023

SCAS251

SDLS207
SDAS090

SCAS253

DEVICE SELECTION GUIDE

GTL
Gunning Transceiver Logic
GTL devices are high-speed transceivers operating at LVTTL logic levels on
the A port and at GTL/GTL+ signal levels on the B port. The devices are
designed with faster edge rates for point-to-point applications in which hot
insertion is not a requirement. The devices operate at the JEDEC JESD8-3
GTL or at the higher threshold-voltage/lower noise-margin GTL+ signal levels.
Use GTLP devices in applications that require a slower edge rate for optimal
signal-integrity performance.
GTL family features:

3.3-V or 3.3-/5-V VCC operation with 5-V-tolerant LVTTL I/Os (except

GTL1655) permits the devices to act as 5-V CMOS/TTL or 3.3-V
LVTTL-to-GTL+/GTL and GTL+/GTL-to-3.3-V LVTTL translators.

OEC circuitry reduces line reflections, electromagnetic interference

(EMI), and improves overall signal integrity.

B-port drive of 50 mA and 100 mA (GTL1655 only) allows the designer

flexibility in matching the device to the application.

Ioff circuitry prevents damage during partial-power-down situations.

Power-up 3-state (PU3S) and BIAS VCC circuitry (GTL1655 only) permit
true live-insertion capability.
Bus-hold circuitry (A port only) eliminates floating inputs by holding them
at the last valid logic state. No external pullup or pulldown resistors are
needed for unused or undriven inputs, which reduces power, cost, and
board layout time.

See http://www.ti.com/sc/gtl for further information. TI provides a wide range

of design assistance, including application support, application reports, free
samples, demonstration backplane, and HSPICE/IBIS simulation models.

4101

DEVICE SELECTION GUIDE

GTL

DEVICE

AVAILABILITY

NO.
PINS

DESCRIPTION

MIL

SSOP

TSSOP

LITERATURE
REFERENCE

SCBS696

SCBS480

SN74GTL1655

64

16-Bit LVTTL-to-GTL/GTL+ Universal Bus Transceivers with Live Insertion

SN74GTL16612

56

18-Bit LVTTL-to-GTL/GTL+ Universal Bus Transceivers

SN74GTL16616

56

17-Bit LVTTL-to-GTL/GTL+ Universal Bus Transceivers with Buffered Clock Outputs

SCBS481

SN74GTL16622A

64

18-Bit LVTTL-to-GTL/GTL+ Registered Bus Transceivers

SCBS673

SN74GTL16923

64

18-Bit LVTTL-to-GTL/GTL+ Registered Bus Transceivers

SCBS674

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

4102

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

GTLP
Gunning Transceiver Logic Plus
GTLP devices are high-speed CMOS transceivers specifically designed for
heavily loaded parallel backplane applications. The reduced output swing
(<1 V), reduced input threshold levels, differential input, and OEC and
TI-OPC circuitry on the GTLP rising and falling edges reduces EMI and
improves overall signal integrity, allowing higher backplane clock frequencies.
This increases the bandwidth for manufacturers developing improved
data-communication solutions.
GTLP solves high-performance parallel backplane designers needs:

Offers higher backplane data rates (100+ Mbps) for increased

data-throughput requirements, lower EMI, and lower power consumption
Ioff, power-up 3-state (PU3S), and BIAS VCC circuitry support true
live-insertion capability for easy internal precharging of the backplane I/O
pins for applications in which active backplane data cannot be suspended
or disturbed during card insertion or removal.

GTLP family features:

3.3-V VCC with 5-V-tolerant LVTTL I/Os permits GTLP devices to act as
5-V CMOS, TTL, or LVTTL-to-GTLP and GTLP-to-LVTTL or TTL
translators.
A-port (LVTTL side) balanced drive of 24 mA
B-port (GTLP side) open drain sinks either 50 mA or 100 mA of current,
allowing the designer flexibility in matching the best device to the
backplane characteristics, which are dependent on the length, slot
spacing, and distributed capacitance (among other factors).
Edge-rate control (ERC) circuitry allows either fast or slow edge rates.
One-third the static power consumption of BiCMOS logic devices
A-port bus-hold circuitry (GTLPH only) eliminates floating inputs by
holding them at the last valid logic state.

See http://www.ti.com/sc/gtlp for further information. TI provides a wide range

of design assistance, including application reports and support, free samples,
demonstration backplane, and HSPICE/IBIS simulation models.

4103

Migration Path From GTLPH16912

MEDIUM-DRIVE UNIVERSAL BUS TRANSCEIVER
16601 Pinout 18 Bits With OE, LE, CLK, and CE Controls
High Drive

GTLPH16916

Buffered clock supports

source-synchronous
applications

1-Bit Buffered Clock

High Drive

GTLPH16912

GTLPH1616

GTLPH1612

3.3-V and 5-V VCC

2 8 Bits
Without CE

GTLPH16612

GTLPH1655

Migration Path From GTLPH16945

MEDIUM-DRIVE BUS TRANSCEIVER
16245 Pinout 2 8 Bits With Separate DIR and OE Controls
GTLPH306

High Drive

GTLPH3245

4104

GTLPH16945

High Drive

GTLPH32945

4 8 Bits

8 Bits

GTLPH1645

DEVICE SELECTION GUIDE

GTLP

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
LFBGA

QFN

SOIC

SSOP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

SN74GTLPH306

24

8-Bit LVTTL-to-GTLP Bus Transceivers

SCES284

SN74GTLP817

24

GTLP-to-LVTTL 1-to-6 Fanout Drivers

SCES285

16

2-Bit LVTTL-to-GTLP
Adjustable-Edge-Rate Bus Transceivers
with Selectable Polarity

SCES286

SN74GTLP1395

20

Dual 1-Bit LVTTL-to-GTLP

Adjustable-Edge-Rate Bus Transceivers
with Split LVTTL Port, Feedback Path,
and Selectable Polarity

SN74GTLPH1612

64

18-Bit LVTTL-to-GTLP
Adjustable-Edge-Rate Universal Bus Transceivers

SCES287

SN74GTLPH1616

64

17-Bit LVTTL-to-GTLP Adjustable-Edge-Rate

Universal Bus Transceivers with Buffered Clock Outputs

SCES346

SN74GTLPH1645

56

16-Bit LVTTL-to-GTLP
Adjustable-Edge-Rate Bus Transceivers

SN74GTLPH1655

64

16-Bit LVTTL-to-GTLP
Adjustable-Edge-Rate Universal Bus Transceivers

SN74GTLP2033

48

8-Bit LVTTL-to-GTLP
Adjustable-Edge-Rate Registered Transceivers
with Split LVTTL Port and Feedback Path

SCES352

SN74GTLP2034

48

8-Bit LVTTL-to-GTLP
Adjustable-Edge-Rate Registered Transceivers
with Split LVTTL Port and Feedback Path

SCES353

SN74GTLPH3245

114

32-Bit LVTTL-to-GTLP
Adjustable-Edge-Rate Bus Transceivers

SN74GTLPH16612

56

18-Bit LVTTL to GTLP Universal Bus Transceivers

SN74GTLPH16912

56

18-Bit LVTTL-to-GTLP Universal Bus Transceivers

SCES288

SN74GTLPH16916

56

17-Bit LVTTL-to-GTLP Universal Bus Transceivers

with Buffered Clock Outputs

SCES347

SN74GTLPH16927

56

18-Bit LVTTL-to-GTLP Bus Transceivers

with Source-Synchronous Clock Outputs

SCES413

SN74GTLPH16945

48/56

16-Bit LVTTL-to-GTLP Bus Transceivers

SCES292

20

Dual 1-Bit LVTTL-to-GTLP

Adjustable-Edge-Rate Bus Transceivers
with Split LVTTL Port, Feedback Path,
and Selectable Polarity

SCES350

SN74GTLP1394

SN74GTLP21395

SCES349

SCES290
SCES294

SCES291

SCES326

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins
TSSOP (thin shrink small-outline package)
PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

4105

DEVICE SELECTION GUIDE

GTLP

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
LFBGA

QFN

SOIC

SSOP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

SN74GTLP22033

48/56

8-Bit LVTTL-to-GTLP
Adjustable-Edge-Rate Registered Transceivers
with Split LVTTL Port and Feedback Path

SCES354

SN74GTLP22034

48/56

8-Bit LVTTL-to-GTLP
Adjustable-Edge-Rate Registered Transceivers
with Split LVTTL Port and Feedback Path

SCES355

SN74GTLPH32912

96

36-Bit LVTTL-to-GTLP Universal Bus Transceivers

SCES379

SN74GTLPH32916

96

34-Bit LVTTL-to-GTLP Universal Bus Transceivers

with Buffered Clock Outputs

SCES380

SN74GTLPH32945

96

32-Bit LVTTL-to-GTLP Bus Transceivers

SCES293

4106

SN74GTLP1394
Specifically designed for use with the Texas Instruments
TSB14AA1 1394 backplane layer controller family to transmit
1394 backplane serial bus across parallel backplanes
The 1394 backplane serial

64-Bit Data Bus

bus plays a supportive role in

backplane systems, providing
a means for diagnostics,
system enhancement, and
peripheral monitoring.

32- to 64-Bit Address Bus

GTLP1394
Transceiver
TSB14AA1

High-performance, multi-slot,

parallel-backplane-optimized
GTLP edge rates easily
support data transfer rates of
25 Mbps (S25), 50 Mbps
(S50), and 100 Mbps (S100).

Termination
Backplane Trace Connector
VME / FB+ / CPCI or
GTLP Transceiver

Single-chip solution

Easier to implement

DATA

STRB

GTLP vs LVDS solutions

VTT

GTLP vs BTL/FB+ solutions

Better signal integrity

More cost effective

Less power consumption

RTT

A2 Y2 A1 Y1

SN74GTLP1394 main features include:

B2

B1

3.3 V

VCC

LVTTL to GTLP bidirectional translator

2.4

VOH

High GTLP drive (100 mA)

2.0

VIH

TI-OPCTM

1.5

Vt

BIAS VCC supports true live insertion.

3.3-V VCC with 5-V tolerance

0.8

VIL

$3.75 in lots of 1000

0.4

VOL

16-pin SOIC (D & DR), TSSOP (PWR), and

TVSOP (DGVR) packages

GND

overshoot protection circuitry

www.ti.com/sc/1394

VTT
VREF
50 MHz
1.5V
1.05
1.00
0.95
0.55

LVTTL

VOH, VTT
VIH
Vt, VREF
VIL
VOL

GTLP

www.ti.com/sc/gtlp
4107

DEVICE SELECTION GUIDE

HC/HCT
High-Speed CMOS Logic
TI offers a full family of HC/HCT devices for low-power, medium- to low-speed
applications. The recent addition of products acquired from Harris
Semiconductor has added a wide range of additional functions. Over 250 HC
and HCT device types are available, including gates, latches, flip-flops,
buffers/drivers, counters, multiplexers, transceivers, and registered
transceivers. The HC/HCT family is a popular, reliable logic family, with
6-mA output current drive at 5-V VCC (HC/HCT) and 20-A output current
drive 3.3-V VCC (HC only).
While HCMOS can be used in most new designs, TI recommends Advanced
High-Speed CMOS (AHC) as a reliable and effortless migration path from the
HC family. AHC delivers the same low noise as HC, with one-half the static
power consumption of HC, at a competitive price.
The HC family offers CMOS inputs and outputs, while the HCT family offers
TTL inputs with CMOS outputs.
See www.ti.com/sc/logic for the most current data sheets.

4109

DEVICE SELECTION GUIDE

HC

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

MIL

PDIP

SOIC

SOP

SSOP

TSSOP

LITERATURE
REFERENCE

CD74HC00

14

Quad 2-Input NAND Gates

SN74HC00

14

Quad 2-Input NAND Gates

CD74HC02

14

Quad 2-Input NOR Gates

SN74HC02

14

Quad 2-Input NOR Gates

CD74HC03

14

Quad 2-Input NAND Gates with Open-Drain Outputs

SN74HC03

14

Quad 2-Input NAND Gates with Open-Drain Outputs

CD74HC04

14

Hex Inverters

SN74HC04

14

Hex Inverters

CD74HCU04

14

Hex Unbuffered Inverters

SN74HCU04

14

Hex Unbuffered Inverters

SN74HC05

14

Hex Inverters with Open-Drain Outputs

CD74HC08

14

Quad 2-Input AND Gates

SN74HC08

14

Quad 2-Input AND Gates

CD74HC10

14

Triple 3-Input NAND Gates

SN74HC10

14

Triple 3-Input NAND Gates

CD74HC11

14

Triple 3-Input AND Gates

SN74HC11

14

Triple 3-Input AND Gates

CD74HC14

14

Hex Schmitt-Trigger Inverters

SN74HC14

14

Hex Schmitt-Trigger Inverters

CD74HC20

14

Dual 4-Input NAND Gates

SN74HC20

14

Dual 4-Input NAND Gates

CD74HC21

14

Dual 4-Input AND Gates

SN74HC21

14

Dual 4-Input AND Gates

CD74HC27

14

Triple 3-Input NOR Gates

SCHS132

SN74HC27

14

Triple 3-Input NOR Gates

SCLS088

CD74HC30

14

8-Input NAND Gates

CD74HC32

14

Quad 2-Input OR Gates

SN74HC32

14

Quad 2-Input OR Gates

CD74HC42

16

4-Line BCD to 10-Line Decimal Decoders

SN74HC42

16

4-Line BCD to 10-Line Decimal Decoders

CD74HC73

14

Dual J-K Edge-Triggered Flip-Flops with Reset

SCHS134

CD74HC74

14

Dual D-Type Flip-Flops with Set and Reset

SCHS124

SCHS116

SCLS181
SCHS125

SCLS076
SCHS126

SCLS077
SCHS117

SCLS078
SCHS127

SCLS079
SCLS080
SCHS118

SCLS081
SCHS128

SCLS083
SCHS273

SCLS084
SCHS129
SCLS085
SCHS130

SCLS086
SCHS131

SCLS087

SCHS121
SCHS274

SCLS200
SCHS133

SCLS091

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

4110

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

HC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

TSSOP

LITERATURE
REFERENCE

SCLS094

SN74HC74

14

Dual D-Type Flip-Flops with Set and Reset

CD74HC75

16

Dual 2-Bit Bistable Transparent Latches

SCHS135

CD74HC85

16

4-Bit Magnitude Comparators

SCHS136

CD74HC86

14

Quad 2-Input Exclusive-OR Gates

SN74HC86

14

Quad 2-Input Exclusive-OR Gates

CD74HC93

14

4-Bit Binary Ripple Counters

SCHS138

CD74HC107

14

Dual Negative-Edge-Triggered J-K Flip-Flops with Reset

SCHS139

CD74HC109

16

Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset

SCHS140

SN74HC109

16

Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset

SCLS098

CD74HC112

16

Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset

SN74HC112

16

Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset

CD74HC123

16

Dual Retriggerable Monostable Multivibrators with Reset

CD74HC125

14

Quad Bus Buffers with 3-State Outputs

SN74HC125

14

Quad Bus Buffers with 3-State Outputs

CD74HC126

14

Quad Bus Buffers with 3-State Outputs

SN74HC126

14

Quad Bus Buffers with 3-State Outputs

CD74HC132

14

Quad 2-Input NAND Gates with Schmitt-Trigger Inputs

SN74HC132

14

Quad 2-Input NAND Gates with Schmitt-Trigger Inputs

CD74HC137

16

3-to-8 Line Decoders/Demultiplexers with Address Latches

CD74HC138

16

3-to-8 Line Inverting Decoders/Demultiplexers

SN74HC138

16

3-to-8 Line Inverting Decoders/Demultiplexers

CD74HC139

16

Dual 2-to-4 Line Decoders/Demultiplexers

SN74HC139

16

Dual 2-to-4 Line Decoders/Demultiplexers

CD74HC147

16

10-to-4 Line Priority Encoders

SN74HC148

16

8-to-3 Line Priority Encoders

CD74HC151

16

1-of-8 Data Selectors/Multiplexers

SN74HC151

16

1-of-8 Data Selectors/Multiplexers

CD74HC153

16

Dual 1-of-4 Data Selectors/Multiplexers

SN74HC153

16

Dual 1-of-4 Data Selectors/Multiplexers

CD74HC154

24

4-to-16 Line Decoders/Demultiplexers

CD74HC157

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SN74HC157

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SN74HC158

16

Quad 2-to-4 Line Data Selectors/Multiplexers

CD74HC161

16

Synchronous 4-Bit Binary Counters

SN74HC161

16

Synchronous 4-Bit Binary Counters

CD74HC163

16

Synchronous 4-Bit Binary Counters

SN74HC163

16

Synchronous 4-Bit Binary Counters

CD74HC164

14

8-Bit Serial-In, Parallel-Out Shift Registers

SN74HC164

14

8-Bit Serial-In, Parallel-Out Shift Registers

CD74HC165

16

8-Bit Parallel-In, Serial-Out Shift Registers

SN74HC165

16

8-Bit Parallel-In, Serial-Out Shift Registers

CD74HC166

16

8-Bit Parallel-Load Shift Registers

SN74HC166

16

8-Bit Parallel-Load Shift Registers

CD74HC173

16

Quad D-Type Flip-Flops with 3-State Outputs

SCHS137

SCLS100

SCHS141

SCHS142

SCLS099
SCHS143

SCLS104
SCHS144

SCLS103
SCHS145

SCLS034

SCHS146
SCHS147

SCLS107
SCHS148

SCLS108

SCHS149
SCLS109
SCHS150

SCLS110
SCHS151
SCLS112
SCHS152
SCHS153
SCLS113
SCLS296
SCHS154

SCLS298

SCHS155

SCLS297
SCHS154

SCLS115
SCHS156

SCLS116

SCHS157
SCLS117

SCHS158

4111

DEVICE SELECTION GUIDE

HC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

TSSOP

LITERATURE
REFERENCE

CD74HC174

16

Hex D-Type Flip-Flops with Clear

SN74HC174

16

Hex D-Type Flip-Flops with Clear

CD74HC175

16

Quad D-Type Flip-Flops with Clear

SN74HC175

16

Quad D-Type Flip-Flops with Clear

CD74HC190

16

Presettable Synchronous 4-Bit Up/Down BCD Decade Counters

CD74HC191

16

Presettable Synchronous 4-Bit Up/Down Binary Counters

SN74HC191

16

Presettable Synchronous 4-Bit Up/Down Binary Counters

CD74HC192

16

BCD Presettable Synchronous 4-Bit Up/Down Decade Counters

CD74HC193

16

Presettable Synchronous 4-Bit Up/Down Binary Counters

SN74HC193

16

Presettable Synchronous 4-Bit Up/Down Binary Counters

SCLS122

CD74HC194

16

4-Bit Bidirectional Universal Shift Registers

SCHS164

CD74HC195

16

4-Bit Parallel Access Shift Registers

SCHS165

CD74HC221

16

Dual Monostable Multivibrators with Schmitt-Trigger Inputs

SCHS166

CD74HC237

16

3-to-8 Line Decoders/Demultiplexers with Address Latches

SCHS146

CD74HC238

16

3-to-8 Line Decoders/Demultiplexers

SCHS147

CD74HC240

20

Octal Buffers/Drivers with 3-State Outputs

SN74HC240

20

Octal Buffers/Drivers with 3-State Outputs

SN74HC240A

20

Octal Buffers/Drivers with 3-State Outputs

CD74HC241

20

Octal Buffers/Drivers with 3-State Outputs

SN74HC241

20

Octal Buffers/Drivers with 3-State Outputs

CD74HC243

14

Quad Bus-Transceivers with 3-State Outputs

SCHS168

CD74HC244

20

Octal Buffers and Line Drivers with 3-State Outputs

SCHS167

SN74HC244

20

Octal Buffers and Line Drivers with 3-State Outputs

CD74HC245

20

Octal Bus Transceivers with 3-State Outputs

SN74HC245

20

Octal Bus Transceivers with 3-State Outputs

CD74HC251

16

1-of-8 Data Selectors/Multiplexers with 3-State Outputs

SN74HC251

16

1-of-8 Data Selectors/Multiplexers with 3-State Outputs

CD74HC253

16

Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs

SN74HC253

16

Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs

CD74HC257

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SN74HC257

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

CD74HC258

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SN74HC258

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

CD74HC259

16

8-Bit Addressable Latches

SN74HC259

16

8-Bit Addressable Latches

SN74HC266

14

Quad 2-Input Exclusive-NOR Gates with Open-Drain Outputs

CD74HC273

20

Octal D-Type Flip-Flops with Clear

SN74HC273

20

Octal D-Type Flip-Flops with Clear

CD74HC280

14

9-Bit Odd/Even Parity Generators/Checkers

SCHS175

CD74HC283

16

9-Bit Binary Full Adders with Fast Carry

SCHS176

CD74HC297

16

Digital Phase-Locked Loops

CD74HC299

20

8-Bit Universal Shift/Storage Registers

CD74HC354

20

8-Line to 1-Line Data Selectors/Multiplexers/Registers

CD74HC365

16

Hex Buffers/Line Drivers with 3-State Outputs

4112

SCHS159

SCLS119
SCHS160

SCLS299

SCHS275
SCHS162

SCLS121

SCHS163
SCHS163

SCHS167

SCLS128
Call
SCHS167

SCLS300

SCLS130
SCHS119

SCLS131
SCHS169
SCLS132
SCHS170
SCLS133
SCHS171

SCLS224
SCHS276

SCLS224
SCHS173

SCLS134
SCLS135
SCHS174

SCLS136

SCHS177

SCHS178
SCHS179

SCHS180

DEVICE SELECTION GUIDE

HC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

TSSOP

LITERATURE
REFERENCE

SN74HC365

16

Hex Buffers/Line Drivers with 3-State Outputs

CD74HC366

16

Hex Inverting Buffers/Line Drivers with 3-State Outputs

CD74HC367

16

Hex Buffers/Line Drivers with 3-State Outputs

SN74HC367

16

Hex Buffers/Line Drivers with 3-State Outputs

CD74HC368

16

Hex Inverting Buffers/Line Drivers with 3-State Outputs

SN74HC368

16

Hex Inverting Buffers/Line Drivers with 3-State Outputs

CD74HC373

20

Octal Transparent D-Type Latches with 3-State Outputs

SN74HC373

20

Octal Transparent D-Type Latches with 3-State Outputs

CD74HC374

20

Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs

SN74HC374

20

Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs

CD74HC377

20

Octal D-Type Flip-Flops with Enable

SN74HC377

20

Octal D-Type Flip-Flops with Enable

CD74HC390

16

Dual 4-Bit Decade Counters

SCHS185

CD74HC393

14

Dual 4-Bit Binary Counters

SCHS186

SN74HC393

14

Dual 4-Bit Binary Counters

CD74HC423

16

Dual Retriggerable Monostable Multivibrators with Reset

CD74HC533

20

Octal Inverting Transparent Latches with 3-State Outputs

CD74HC534

20

Octal D-Type Inverting Flip-Flops with 3-State Outputs

CD74HC540

20

Inverting Octal Buffers and Line Drivers with 3-State Outputs

SN74HC540

20

Inverting Octal Buffers and Line Drivers with 3-State Outputs

CD74HC541

20

Octal Buffers and Line Drivers with 3-State Outputs

SN74HC541

20

Octal Buffers and Line Drivers with 3-State Outputs

CD74HC563

20

Octal Inverting Transparent Latches with 3-State Outputs

SN74HC563

20

Octal Inverting Transparent Latches with 3-State Outputs

SCLS145

CD74HC564

20

Octal D-Type Inverting Flip-Flops with 3-State Outputs

SCHS188

CD74HC573

20

Octal Transparent D-Type Latches with 3-State Outputs

SN74HC573A

20

Octal Transparent D-Type Latches with 3-State Outputs

CD74HC574

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SN74HC574

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SN74HC590A

16

8-Bit Binary Counters with 3-State Output Registers

SN74HC594

16

8-Bit Shift Registers with Output Registers

SN74HC595

16

8-Bit Shift Registers with 3-State Output Registers

SCLS041

CD74HC597

16

8-Bit Shift Registers with Input Latches

SCHS191

SN74HC623

20

Octal Bus Transceivers with 3-State Outputs

CD74HC640

20

Octal Bus Transceivers with 3-State Outputs

SN74HC640

20

Octal Bus Transceivers with 3-State Outputs

SN74HC645

20

Octal Bus Transceivers with 3-State Outputs

CD74HC646

24

Octal Registered Bus Transceivers with 3-State Outputs

SN74HC646

24

Octal Registered Bus Transceivers with 3-State Outputs

CD74HC652

24

Octal Bus Transceivers and Registers with 3-State Outputs

SN74HC652

24

Octal Bus Transceivers and Registers with 3-State Outputs

CD74HC670

16

4-by-4 Register Files with 3-State Outputs

SN74HC682

20

SN74HC684

20

SCLS308
SCHS180
SCHS181

SCLS309
SCHS181

SCLS310
SCHS182

SCLS140
SCHS183

SCLS141
SCHS184

SCLS307

SCLS143
SCHS142
SCHS187
SCHS188

SCHS189
SCLS007
SCHS189

SCLS305
SCHS187

SCHS182

SCLS147
SCHS183

SCLS148
SCLS039
SCLS040

SCLS149
SCHS192

SCLS303
SCLS304
SCHS193
SCLS150
SCHS194

SCLS151

SCHS195

8-Bit Magnitude Comparators

SCLS018

8-Bit Magnitude Comparators

SCLS340

4113

DEVICE SELECTION GUIDE

HC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

CD74HC688

20

8-Bit Magnitude Comparators

SN74HC688

20

8-Bit Magnitude Comparators

CD74HC4002

14

Dual 4-Input NOR Gates

CD74HC4015

16

Dual 4-Stage Static Shift Registers

CD74HC4016

14

Quad Bilateral Switches

CD74HC4017

16

Decade Counters/Dividers with 1-of-10 Decoded Outputs

CD74HC4020

16

12-Stage Ripple-Carry Binary Counters/Dividers

SN74HC4020

16

12-Stage Ripple-Carry Binary Counters/Dividers

CD74HC4024

14

7-Stage Ripple-Carry Binary Counters/Dividers

CD74HC4040

16

12-Stage Ripple-Carry Binary Counters/Dividers

SN74HC4040

16

12-Stage Ripple-Carry Binary Counters/Dividers

CD74HC4046A

16

Micropower Phase-Locked Loops with VCO

CD74HC4049

16

Hex Buffers/Converters

CD74HC4050

16

Hex Buffers/Converters

CD74HC4051

16

8-Channel Analog Multiplexers/Demultiplexers

with Logic Level Conversion

CD74HC4052

16

Dual 4-Channel Analog Multiplexers/Demultiplexers

with Logic Level Conversion

CD74HC4053

16

CD74HC4059
CD74HC4060

SSOP

TSSOP

LITERATURE
REFERENCE

SCHS196

SCLS010

SCHS197
SCHS198
SCHS199

SCHS200
SCHS201

SCLS158

SCHS202
SCHS203

SCLS160

SCHS204

SCHS205

SCHS205

SCHS122

Triple 2-Channel Analog Multiplexers/Demultiplexers

with Logic Level Conversion

24

Programmable Divide-by-N Counters

16

14-Stage Binary-Ripple Counters/Dividers and Oscillators

SN74HC4060

16

14-Stage Binary-Ripple Counters/Dividers and Oscillators

CD74HC4066

14

Quad Bilateral Switches

SN74HC4066

14

Quad Bilateral Switches

CD74HC4067

24

Single 16-Channel Analog Multiplexers/Demultiplexers

CD74HC4075

14

Triple 3-Input OR Gates

SCHS210

CD74HC4094

16

8-Stage Shift-and-Store Bus Registers

SCHS211

CD74HC4316

16

Quad Analog Switches with Level Translation

SCHS212

CD74HC4351

20

Analog 1-of-8 Multiplexers/Demultiplexers with Latch

CD74HC4352

20

Analog Dual 1-of-4 Multiplexers/Demultiplexers with Latch

CD74HC4511

16

BCD to 7-Segment Latch Decoder Drivers

CD74HC4514

24

4-Bit Latches/4-to-16 Line Decoders

SCHS215

CD74HC4515

24

4-Bit Latches/4-to-16 Line Decoders

SCHS215

CD74HC4518

16

Dual BCD Up Counters

CD74HC4520

16

Dual Binary Up Counters

CD74HC4538

16

Dual Retriggerable Precision Monostable Multivibrators

CD74HC4543

16

BCD to 7-Segment Latches/Decoders/Drivers for Liquid-Crystal Displays

SN74HC7001

14

Quad 2-Input AND Gates with Schmitt-Trigger Inputs

SN74HC7002

14

Quad 2-Input NOR Gates with Schmitt-Trigger Inputs

SN74HC7032

14

Quad 2-Input OR Gates with Schmitt-Trigger Inputs

CD74HC7046A

16

Phase-Locked Loops with VCO and Lock Detector

SCHS218

CD74HC7266

14

Quad 2-Input Exclusive NOR Gates

SCHS219

CD74HC40103

16

8-Bit Binary Presettable Synchronous Down Counters

SCHS221

4114

SCHS122

SCHS122
SCHS206

SCHS207

SCLS161
SCHS208

SCLS325
SCHS209

SCHS213
SCHS213

SCHS214

SCHS216
SCHS216

SCHS123
SCHS217
SCLS035

SCLS033
SCLS036

DEVICE SELECTION GUIDE

HCT

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

MIL

PDIP

SOIC

SOP

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE

CD74HCT00

14

Quad 2-Input NAND Gates

SN74HCT00

14

Quad 2-Input NAND Gates

CD74HCT02

14

Quad 2-Input NOR Gates

SN74HCT02

14

Quad 2-Input NOR Gates

CD74HCT03

14

Quad 2-Input NAND Gates with Open-Drain Outputs

CD74HCT04

14

Hex Inverters

SN74HCT04

14

Hex Inverters

CD74HCT08

14

Quad 2-Input AND Gates

SN74HCT08

14

Quad 2-Input AND Gates

CD74HCT10

14

Triple 3-Input NAND Gates

SCHS128

CD74HCT11

14

Triple 3-Input AND Gates

SCHS273

CD74HCT14

14

Hex Schmitt-Trigger Inverters

SCHS129

SN74HCT14

14

Hex Schmitt-Trigger Inverters

CD74HCT20

14

Dual 4-Input NAND Gates

SCHS130

CD74HCT21

14

Dual 4-Input AND Gates

SCHS131

CD74HCT27

14

Triple 3-Input NOR Gates

SCHS132

CD74HCT30

14

8-Input NAND Gates

SCHS121

CD74HCT32

14

Quad 2-Input OR Gates

SN74HCT32

14

Quad 2-Input OR Gates

CD74HCT42

16

4-Line BCD to 10-Line Decimal Decoders

CD74HCT73

14

Dual J-K Edge-Triggered Flip-Flops with Reset

CD74HCT74

14

Dual D-Type Flip-Flops with Set and Reset

SN74HCT74

14

SN74HCT74A

14

CD74HCT75

16

Dual 2-Bit Bistable Transparent Latches

SCHS135

CD74HCT85

16

4-Bit Magnitude Comparators

SCHS136

CD74HCT86

14

Quad 2-Input Exclusive-OR Gates

SCHS137

CD74HCT93

14

4-Bit Binary Ripple Counters

CD74HCT107

14

Dual Negative-Edge-Triggered J-K Flip-Flops with Reset

CD74HCT109

16

Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset

CD74HCT112

16

Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset

CD74HCT123

16

Dual Retriggerable Monostable Multivibrators with Reset

SCHS116

SCLS062
SCHS125

SCLS065
SCHS126
SCHS117

SCLS042
SCHS118

SCLS063

SCLS225

SCHS274

SCLS064
SCHS133

SCHS134

SCHS124

Dual D-Type Flip-Flops with Set and Reset

Dual D-Type Flip-Flops with Set and Reset

SCLS169
Call

SCHS138
SCHS139

SCHS140
SCHS141

SCHS142

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins
TSSOP (thin shrink small-outline package)
PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

4115

DEVICE SELECTION GUIDE

HCT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE

CD74HCT125

14

Quad Bus Buffers with 3-State Outputs

SN74HCT125

14

Quad Bus Buffers with 3-State Outputs

SCLS069

CD74HCT126

14

Quad Bus Buffers with 3-State Outputs

SCHS144

CD74HCT132

14

Quad 2-Input NAND Gates with Schmitt-Trigger Inputs

SCHS145

CD74HCT137

16

3-to-8 Line Decoders/Demultiplexers with Address Latches

SCHS146

CD74HCT138

16

3-to-8 Line Inverting Decoders/Demultiplexers

SN74HCT138

16

3-to-8 Line Inverting Decoders/Demultiplexers

CD74HCT139

16

Dual 2-to-4 Line Decoders/Demultiplexers

SN74HCT139

16

Dual 2-to-4 Line Decoders/Demultiplexers

CD74HCT147

16

10-to-4 Line Priority Encoders

CD74HCT151

16

1-of-8 Data Selectors/Multiplexers

SCHS150

CD74HCT153

16

Dual 1-of-4 Data Selectors/Multiplexers

SCHS151

CD74HCT154

24

4-to-16 Line Decoders/Demultiplexers

SCHS152

CD74HCT157

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SCHS153

SN74HCT157

16

Quad 2-to-4 Line Data Selectors/Multiplexers

CD74HCT158

16

Quad 2-to-4 Line Data Selectors/Multiplexers

CD74HCT161

16

Synchronous 4-Bit Binary Counters

SCHS154

CD74HCT163

16

Synchronous 4-Bit Binary Counters

SCHS154

CD74HCT164

14

8-Bit Serial-In, Parallel-Out Shift Registers

SCHS155

CD74HCT165

16

8-Bit Parallel-In, Serial-Out Shift Registers

SCHS156

CD74HCT166

16

8-Bit Parallel-Load Shift Registers

SCHS157

CD74HCT173

16

Quad D-Type Flip-Flops with 3-State Outputs

SCHS158

CD74HCT174

16

Hex D-Type Flip-Flops with Clear

SCHS159

CD74HCT175

16

Quad D-Type Flip-Flops with Clear

SCHS160

CD74HCT191

16

Presettable Synchronous 4-Bit Up/Down Binary Counters

SCHS162

CD74HCT193

16

Presettable Synchronous 4-Bit Up/Down Binary Counters

SCHS163

CD74HCT194

16

4-Bit Bidirectional Universal Shift Registers

SCHS164

CD74HCT221

16

Dual Monostable Multivibrators with Schmitt-Trigger Inputs

CD74HCT237

16

3-to-8 Line Decoders/Demultiplexers with Address Latches

CD74HCT238

16

3-to-8 Line Decoders/Demultiplexers

CD74HCT240

20

Octal Buffers/Drivers with 3-State Outputs

SN74HCT240

20

Octal Buffers/Drivers with 3-State Outputs

CD74HCT241

20

Octal Buffers/Drivers with 3-State Outputs

SCHS167

CD74HCT243

14

Quad Bus-Transceivers with 3-State Outputs

SCHS168

CD74HCT244

20

Octal Buffers and Line Drivers with 3-State Outputs

SCHS167

SN74HCT244

20

Octal Buffers and Line Drivers with 3-State Outputs

CD74HCT245

20

Octal Bus Transceivers with 3-State Outputs

SN74HCT245

20

Octal Bus Transceivers with 3-State Outputs

CD74HCT251

16

1-of-8 Data Selectors/Multiplexers with 3-State Outputs

SCHS169

CD74HCT253

16

Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs

SCHS170

CD74HCT257

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SCHS171

SN74HCT257

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

CD74HCT258

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

CD74HCT259

16

8-Bit Addressable Latches

4116

SCHS143

SCHS147

SCHS148

SCLS171
SCLS066
SCHS149

SCLS071
SCHS153

SCHS166
SCHS146
SCHS147
SCHS167

SCLS174

SCLS175
SCHS119

SCLS020

SCLS072
SCHS172

SCHS173

DEVICE SELECTION GUIDE

HCT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE

CD74HCT273

20

Octal D-Type Flip-Flops with Clear

SCHS174

SN74HCT273

20

Octal D-Type Flip-Flops with Clear

CD74HCT280

14

9-Bit Odd/Even Parity Generators/Checkers

CD74HCT283

16

9-Bit Binary Full Adders with Fast Carry

CD74HCT297

16

Digital Phase-Locked Loops

CD74HCT299

20

8-Bit Universal Shift/Storage Registers

CD74HCT354

20

8-Line to 1-Line Data Selectors/Multiplexers/Registers

CD74HCT356

20

8-Line to 1-Line Data Selectors/Multiplexers/Registers

SCHS277

CD74HCT365

16

Hex Buffers/Line Drivers with 3-State Outputs

SCHS180

CD74HCT367

16

Hex Buffers/Line Drivers with 3-State Outputs

SCHS181

CD74HCT368

16

Hex Inverting Buffers/Line Drivers with 3-State Outputs

SCHS181

CD74HCT373

20

Octal Transparent D-Type Latches with 3-State Outputs

SCHS182

SN74HCT373

20

Octal Transparent D-Type Latches with 3-State Outputs

CD74HCT374

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SN74HCT374

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

CD74HCT377

20

Octal D-Type Flip-Flops with Enable

SCHS184

SN74HCT377

20

Octal D-Type Flip-Flops with Enable

SCLS067

CD74HCT390

16

Dual 4-Bit Decade Counters

SCHS185

CD74HCT393

14

Dual 4-Bit Binary Counters

SCHS186

CD74HCT423

16

Dual Retriggerable Monostable Multivibrators with Reset

SCHS142

CD74HCT533

20

Octal Inverting Transparent Latches with 3-State Outputs

SCHS187

CD74HCT534

20

Octal Inverting D-Type Flip-Flops with 3-State Outputs

SCHS188

CD74HCT540

20

Inverting Octal Buffers and Line Drivers with 3-State Outputs

SN74HCT540

20

Inverting Octal Buffers and Line Drivers with 3-State Outputs

SCLS008

CD74HCT541

20

Octal Buffers and Line Drivers with 3-State Outputs

SCHS189

SN74HCT541

20

Octal Buffers and Line Drivers with 3-State Outputs

CD74HCT563

20

Octal Inverting Transparent Latches with 3-State Outputs

SCHS187

CD74HCT564

20

Octal Inverting D-Type Flip-Flops with 3-State Outputs

SCHS188

CD74HCT573

20

Octal Transparent D-Type Latches with 3-State Outputs

SN74HCT573

20

Octal Transparent D-Type Latches with 3-State Outputs

CD74HCT574

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

SN74HCT574

20

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

CD74HCT597

16

8-Bit Shift Registers with Input Latches

SN74HCT623

20

Octal Bus Transceivers with 3-State Outputs

SCLS016

CD74HCT640

20

Octal Bus Transceivers with 3-State Outputs

SCHS192

SN74HCT645

20

Octal Bus Transceivers with 3-State Outputs

CD74HCT646

24

Octal Registered Bus Transceivers with 3-State Outputs

SN74HCT646

24

Octal Registered Bus Transceivers with 3-State Outputs

CD74HCT652

24

Octal Bus Transceivers and Registers with 3-State Outputs

SN74HCT652

24

Octal Bus Transceivers and Registers with 3-State Outputs

CD74HCT670

16

4-by-4 Register Files with 3-State Outputs

CD74HCT688

20

8-Bit Magnitude Comparators

CD74HCT4020

16

12-Stage Ripple-Carry Binary Counters/Dividers

CD74HCT4024

14

7-Stage Ripple-Carry Binary Counters/Dividers

SCHS176

SCHS177

SCHS178

SCLS068
SCHS175

SCHS179

SCLS009
SCHS183

SCLS005

SCHS189

SCLS306

SCHS182

SCLS176
SCHS183

SCLS177
SCHS191

SCLS019

SCHS278

SCLS178

SCHS194

SCLS179

SCHS195

SCHS196

SCHS201

SCHS202

4117

DEVICE SELECTION GUIDE

HCT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE

CD74HCT4040

16

12-Stage Ripple-Carry Binary Counters/Dividers

SCHS203

CD74HCT4046A

16

Micropower Phase-Locked Loops with VCO

SCHS204

CD74HCT4051

16

8-Channel Analog Multiplexers/Demultiplexers

with Logic Level Conversion

SCHS122

CD74HCT4052

16

Dual 4-Channel Analog Multiplexers/Demultiplexers

with Logic Level Conversion

SCHS122

CD74HCT4053

16

Triple 2-Channel Analog Multiplexers/Demultiplexers

with Logic Level Conversion

CD74HCT4060

16

14-Stage Binary-Ripple Counters/Dividers and Oscillators

SCHS207

CD74HCT4066

14

Quad Bilateral Switches

SCHS208

CD74HCT4067

24

Single 16-Channel Analog Multiplexers/Demultiplexers

SCHS209

CD74HCT4075

14

Triple 3-Input OR Gates

CD74HCT4094

16

8-Stage Shift-and-Store Bus Registers

SCHS211

CD74HCT4316

16

Quad Analog Switches with Level Translation

SCHS212

CD74HCT4351

20

Analog 1-of-8 Multiplexers/Demultiplexers with Latch

SCHS213

CD74HCT4511

16

BCD to 7-Segment Latch Decoder Drivers

SCHS279

CD74HCT4514

24

4-Bit Latches/4-to-16 Line Decoders

SCHS314

CD74HCT4515

24

4-Bit Latches/4-to-16 Line Decoders

SCHS314

CD74HCT4520

16

Dual Binary Up Counters

CD74HCT4538

16

Dual Retriggerable Precision Monostable Multivibrators

CD74HCT4543

16

BCD to 7-Segment Latches/Decoders/Drivers

for Liquid-Crystal Displays

CD74HCT7046A

16

Phase-Locked Loops with VCO and Lock Detector

SCHS218

CD74HCT40103

16

8-Bit Binary Presettable Synchronous Down Counters

SCHS221

4118

SCHS122

SCHS210

SCHS216

SCHS123
SCHS281

DEVICE SELECTION GUIDE

IEEE Std 1149.1 (JTAG)

Boundary-Scan Logic
The IEEE Std 1149.1 (JTAG) boundary-scan logic family of octal, Widebus,
and scan-support functions incorporates circuitry that allows these devices
and the electronic systems in which they are used to be tested without reliance
on traditional probing techniques.
Bus-interface logic devices are available in BCT, ABT, and LVT technologies
in the 8-, 18-, and 20-bit options of standard buffers, latches, and transceivers.
The UBT devices, which can functionally replace 50+ standard bus-interface
devices, are featured at Widebus widths (18 bits and 20 bits). Package options
for these devices include plastic dual in-line package (PDIP), small-outline
integrated circuit (SOIC), shrink small-outline package (SSOP), thin shrink
small-outline package (TSSOP), and thin quad flatpack (TQFP). The
scan-support functions include devices for controlling the test bus, performing
at-speed functional testing, and partitioning the scan path into smaller, more
manageable segments.
Over 40 devices, composed of a wide selection of BCT and ABT octals, ABT
and LVT Widebus, and scan-support functions, are available. Bus-hold and
series-damping-resistor features also are available.
See www.ti.com/sc/jtag for the most current data sheets.
IEEE Std 1149.1 (JTAG) Boundary-Scan Logic

Octal

BCT
H

Scan-Support
Functions

Widebus

ABT

ABT/ABTH

LVTH

ACT/ABT

LVT

indicates bus hold

4119

TI IEEE Std 1149.1-Compliant Device Family and Function Cross-Reference

Octal Bus-Interface Logic With JTAG Test Access Port (TAP)
FUNCTION

PACKAGE

PINS

BITS

240

DW/NT

24

244

DW/NT

24

DW

24

245

ABT

BH

SN74ABT8245

BCT

BH

SN74BCT8240A

SN74BCT8244A

SN74BCT8245A

NT

24

SN74BCT8245A

373

DW/NT

24

SN74BCT8373A

374

DW/NT

24

SN74BCT8374A

543

DL/DW

28

SN74ABT8543

646

DL/DW

28

SN74ABT8646

652

DL/DW

28

SN74ABT8652

952

DL/DW

28

SN74ABT8952

TQFP Bus-Interface Logic With JTAG TAP

FUNCTION

PACKAGE

PINS

BITS

ABT

BH

LVT

BH

16646

PM

64

29

SN74ABTH18646

SN74LVTH18646A

16652

PM

64

29

SN74ABTH18652

SN74LVTH18652A

16501

PM

64

29

SN74ABTH18502

SN74LVTH18502A

16601

PM

64

20

SN74ABTH18504

SN74LVTH18504A

LVT

BH

Widebus Bus-Interface Logic With JTAG TAP

FUNCTION

PACKAGE

PINS

BITS

ABT

BH

16245

DGG/DL

56

29

SN74ABT18245A

16640

DGG/DL

56

29

SN74ABT18640

16501

DGG

64

29

SN74LVTH18512

16601

DGG

64

20

SN74LVTH18514

JTAG Scan-Support Products

FUNCTION

PACKAGE

PINS

8980A

DW

24

8986

PM

64

8990A

FN

44

8996

DW/PW

24

8997

DW

28

ABT

ACT

BH

10-Bit Linking Addressable

Scan Ports
SN74ACT8990
SN74ABT8996

B = both non-bus-hold and bus-hold version

BH = bus hold
N = no
P = preview
R = series-damping-resistor option
Y = yes

4120

BH

Embedded Test Bus Controller

10-Bit Addressable Scan Ports

SN74ACT8997

LVT

BH

SN74LVT8980/A

SN74LVT8986

Test Bus Controller

SN74LVT8996

Scan Path Linker

DEVICE SELECTION GUIDE

IEEE STD 1149.1 (JTAG) BOUNDARY-SCAN LOGIC

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

MIL

PDIP

PLCC

SOIC

SSOP

TQFP

TSSOP

LITERATURE
REFERENCE

SN74BCT8240A

24

Scan Test Devices with Octal Buffers

SCBS067

SN74BCT8244A

24

Scan Test Devices with Octal Buffers

SCBS042

SN74ABT8245

24

Scan Test Devices with Octal Transceivers

SCBS124

SN74BCT8245A

24

Scan Test Devices with Octal Transceivers

SCBS043

SN74BCT8373A

24

Scan Test Devices with Octal D-Type Latches

SCBS044

SN74BCT8374A

24

Scan Test Devices with Octal Edge-Triggered D-Type Flip-Flops

SN74ABT8543

28

Scan Test Devices with Octal Registered Bus Transceivers

SCBS120

SN74ABT8646

28

Scan Test Devices with Octal Bus Transceivers and Registers

SCBS123

SN74ABT8652

28

Scan Test Devices with Octal Bus Transceivers and Registers

SCBS122

SN74ABT8952

28

Scan Test Devices with Octal Registered Bus Transceivers

SCBS121

SN74LVT8980

24

Scan Test Bus Controllers with 8-Bit Generic Host Interfaces

SCBS676

SN74LVT8980A

24

Scan Test Bus Controllers with 8-Bit Generic Host Interfaces

SCBS755

SN74LVT8986

64

10-Bit Linking Addressable Scan Ports Multidrop-Addressable

IEEE Std 1149.1 (JTAG) TAP Transceivers

SN74ACT8990

44

Test Bus Controllers IEEE Std 1149.1 (JTAG) TAP Masters

with 16-Bit Generic Host Interfaces

SN74ABT8996

24

10-Bit Addressable Scan Ports Multidrop-Addressable

IEEE Std 1149.1 (JTAG) TAP Transceivers

SN74LVT8996

24

10-Bit Addressable Scan Ports Multidrop-Addressable

IEEE Std 1149.1 (JTAG) TAP Transceivers

SN74ACT8997

28

Scan Path Linkers with 4-Bit Identification Buses

Scan-Controlled IEEE Std 1149.1 (JTAG) TAP Concatenators

SN74ABT18245A

56

Scan Test Devices with 18-Bit Bus Transceivers

SN74ABT18502

64

Scan Test Devices with 18-Bit Universal Bus Transceivers

SCBS109

SN74ABTH18502A

64

Scan Test Devices with 18-Bit Universal Bus Transceivers

SCBS164

SN74LVTH18502A

64

Scan Test Devices with 18-Bit Universal Bus Transceivers

SCBS668

SN74ABT18504

64

Scan Test Devices with 20-Bit Universal Bus Transceivers

SCBS108

SN74ABTH18504A

64

Scan Test Devices with 20-Bit Universal Bus Transceivers

SCBS165

SN74LVTH18504A

64

Scan Test Devices with 20-Bit Universal Bus Transceivers

SCBS667

SN74LVT18512

64

Scan Test Devices with 18-Bit Universal Bus Transceivers

SCBS711

SN74LVTH18512

64

Scan Test Devices with 18-Bit Universal Bus Transceivers

SCBS671

SN74LVTH18514

64

Scan Test Devices with 20-Bit Universal Bus Transceivers

SCBS670

SN74ABT18640

56

Scan Test Devices with 18-Bit Inverting Bus Transceivers

SCBS267

SCBS045

SCBS759

SCBS190

SCBS489

SCBS686

SCBS157

SCBS110

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins
TSSOP (thin shrink small-outline package)
PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

4121

DEVICE SELECTION GUIDE

IEEE STD 1149.1 (JTAG) BOUNDARY-SCAN LOGIC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

PLCC

SOIC

SSOP

TQFP

TSSOP

LITERATURE
REFERENCE

SN74ABT18646

64

Scan Test Devices with 18-Bit Transceivers and Registers

SCBS131

SN74ABTH18646A

64

Scan Test Devices with 18-Bit Transceivers and Registers

SCBS166

SN74LVTH18646A

64

Scan Test Devices with 18-Bit Transceivers and Registers

SCBS311

SN74ABT18652

64

Scan Test Devices with 18-Bit Transceivers and Registers

SCBS132

SN74ABTH18652A

64

Scan Test Devices with 18-Bit Transceivers and Registers

SCBS167

SN74LVTH18652A

64

Scan Test Devices with 18-Bit Transceivers and Registers

SCBS312

SN74ABTH182502A

64

Scan Test Devices with 18-Bit Universal Bus Transceivers

SCBS164

SN74LVTH182502A

64

Scan Test Devices with 18-Bit Universal Bus Transceivers

SCBS668

SN74ABTH182504A

64

Scan Test Devices with 20-Bit Universal Bus Transceivers

SCBS165

SN74LVTH182504A

64

Scan Test Devices with 20-Bit Universal Bus Transceivers

SN74LVTH182512

64

Scan Test Devices with 18-Bit Universal Bus Transceivers

SN74ABTH182646A

64

Scan Test Devices with 18-Bit Transceivers and Registers

SN74LVTH182646A

64

Scan Test Devices with 18-Bit Transceivers and Registers

SCBS311

SN74ABTH182652A

64

Scan Test Devices with 18-Bit Transceivers and Registers

SCBS167

SN74LVTH182652A

64

Scan Test Devices with 18-Bit Transceivers and Registers

SCBS312

4122

SCBS667

SCBS671
SCBS166

DEVICE SELECTION GUIDE

Little Logic
TI maintains one of the largest Little Logic portfolios in the logic industry, with
a wide array of functions, families, and packaging options. With power and
space concerns being prevalent in the emerging portable space, Little Logic
offers the right technologies to meet these needs with NanoStar/NanoFree
packaging, the industrys smallest packages, and AUC, the first logic family
optimized at 1.8 V.
Little Logic products are offered in the following technology families:

AUC (advanced ultra-low-voltage CMOS logic) with 0.8-V to 2.7-V VCC

operation and Ioff circuitry

LVC (low-voltage CMOS logic) with 1.65-V to 5.5-V VCC operation and Ioff
circuitry

AHC/AHCT (advanced high-speed CMOS logic) with 2-V to 5.5-V

operation in CMOS- and TTL-compatible versions

CBT/CBTD (crossbar technology logic) with 4.5-V to 5.5-V operation,

output voltage translation, and integrated level-shifting diode

CBTLV (low-voltage crossbar technology logic) with 2.3-V to 3.6-V

operation and Ioff circuitry

Single/dual gates are available in 5-/6-pin SOT 23 and SC-70 packages, while
triple gates are offered in 8-pin SM-8 and US-8 packages. TI Little Logic is also
available in the worlds smallest logic packages, NanoStar and NanoFree
package technology.
See www.ti.com/sc/logic for the most current data sheets.

4123

DEVICE SELECTION GUIDE

LITTLE LOGIC

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

DSBGA

SOP

SOT

SSOP

VSSOP

LITERATURE
REFERENCE

SCLS313

Single 2-Input Positive-NAND Gates

SLOS424

Single 2-Input NAND Gates

SCLS316

SCES368

Single 2-Input NAND Gates

SCES212

Dual 2-Input NAND Gates

Dual 2-Input NAND Gates

SN74AHC1G02

Single 2-Input NOR Gates

SCLS342

SN74AHCT1G02

Single 2-Input NOR Gates

SCLS341

SN74AUC1G02

Single 2-Input NOR Gates

SCES369

SN74LVC1G02

Single 2-Input NOR Gates

SN74AUC2G02

Dual 2-Input NOR Gates

SN74LVC2G02

Dual 2-Input NOR Gates

SN74AHC1G04

Single Inverters

SCLS318

SN74AHC1GU04

Single Inverters

SCLS343

SN74AHCT1G04

Single Inverters

SCLS319

SN74AUC1G04

Single Inverter Gates

SCES370

SN74AUC1GU04

Single Inverter Gates

SCES371

SN74LVC1G04

Single Inverters

SCES214

SN74LVC1GU04

Single Inverters

SCES215

SN74AUC2G04

Dual Inverters

SCES437

SN74AUC2GU04

Dual Inverters

SCES438

SN74LVC2G04

Dual Inverters

SCES195

SN74LVC2GU04

Dual Inverters

SCES197

SN74AUC3G04

Triple Inverters

Call

SN74AUC3GU04

Triple Inverters

SN74LVC3G04

Triple Inverters

SN74LVC3GU04

Triple Inverters

SN74AUC1G06

Single Inverter Buffers/Drivers with Open-Drain Outputs

SCES372

SN74LVC1G06

Single Inverter Buffers/Drivers with Open-Drain Outputs

SCES295

SN74AUC2G06

Dual Inverter Buffers/Drivers with Open-Drain Outputs

SCES442

SN74LVC2G06

Dual Inverter Buffers/Drivers with Open-Drain Outputs

SCES307

SN74AHC1G00

Single 2-Input NAND Gates

SN74AHC1G00-Q1

SN74AHCT1G00

SN74AUC1G00

Single 2-Input NAND Gates

SN74LVC1G00

SN74AUC2G00

SN74LVC2G00

SCES440

SCES193

SCES213

SCES441

SCES194

Call

SCES363

SCES539

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

4124

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

LITTLE LOGIC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
DSBGA

SOP

SOT

SSOP

VSSOP

LITERATURE
REFERENCE

SN74AUC3G06

Triple Inverter Buffers/Drivers with Open-Drain Outputs

SN74LVC3G06

Triple Inverter Buffers/Drivers with Open-Drain Outputs

SN74AUC1G07

Single Buffers/Drivers with Open-Drain Outputs

SCES373

SN74LVC1G07

Single Buffers/Drivers with Open-Drain Outputs

SCES296

SN74AUC2G07

Dual Buffers/Drivers with Open-Drain Outputs

SCES443

SN74LVC2G07

Dual Buffers/Drivers with Open-Drain Outputs

SCES308

SN74AUC3G07

Triple Buffers/Drivers with Open-Drain Outputs

Call

SN74LVC3G07

Triple Buffers/Drivers with Open-Drain Outputs

SN74AHC1G08

Single 2-Input AND Gates

SN74AHCT1G08

Single 2-Input AND Gates

SN74AUC1G08

Single 2-Input AND Gates

SN74AUP1G08

Low-Power Single 2-Input Positive-AND Gates

SN74LVC1G08

Single 2-Input AND Gates

SN74AUC2G08

Dual 2-Input AND Gates

SN74LVC2G08

Dual 2-Input AND Gates

SN74AUC1G10

Single 3-Input Positive-NAND Gates

SN74LVC1G10

Single 3-Input Positive-NAND Gates

SN74AUC1G11

Single 3-Input Positive-AND Gates

SN74LVC1G11

Single 3-Input Positive-AND Gates

SN74AHC1G14

Single Schmitt-Trigger Inverters

SN74AHCT1G14

Single Schmitt-Trigger Inverters

SCLS322

SN74AUC1G14

Single Schmitt-Trigger Inverters

SCES375

SN74LVC1G14

Single Schmitt-Trigger Inverters

SCES218

SN74AUC2G14

Dual Schmitt-Trigger Inverters

Call

SN74LVC2G14

Dual Schmitt-Trigger Inverters

SCES200

SN74AUC3G14

Triple Schmitt-Trigger Inverters

SN74LVC3G14

Triple Schmitt-Trigger Inverters

SN74AUC1G17

Single Schmitt-Trigger Buffers

SCES376

SN74LVC1G17

Single Schmitt-Trigger Buffers

SCES351

SN74AUC2G17

Dual Schmitt-Trigger Buffers

Call

SN74LVC2G17

Dual Schmitt-Trigger Buffers

SCES381

SN74AUC3G17

Triple Schmitt-Trigger Buffers

Call

SN74AUC1G18

1-of-2 Noninverting Demultiplexers with 3-State Deselected Output

Call

SN74LVC1G18

1-of-2 Noninverting Demultiplexers with 3-State Deselected Output

SCES406

SN74AUC1G19

1-of-2 Decoders/Demultiplexers

Call

SN74AUC1G27

Single 3-Input Positive-NOR Gates

SN74LVC1G27

Single 3-Input Positive-NOR Gates

SN74AHC1G32

Single 2-Input OR Gates

SN74AHCT1G32

Single 2-Input OR Gates

SCLS320

SN74AUC1G32

Single 2-Input-OR Gates

SCES377

SN74LVC1G32

Single 2-Input OR Gates

SN74AUC2G32

Dual 2-Input OR Gates

SN74LVC2G32

Dual 2-Input OR Gates

SN74LVC1G34

Single Buffer Gates

Call

SCES364

SCES365
SCLS314

SCLS315

SCES374

SCES502
SCES217

SCES477

SCES198

Call

SCES486

Call

SCES487

SCLS321

Call

SCES367

Call

SCES488

SCLS317

SCES219

SCES478

SCES201
SCES519

4125

DEVICE SELECTION GUIDE

LITTLE LOGIC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
DSBGA

SOP

SOT

SSOP

VSSOP

LITERATURE
REFERENCE

SN74AUC2G34

Dual Buffer Gates

SCES514

SN74LVC2G34

Dual Buffer Gates

SCES359

SN74AUC3G34

Triple Buffer Gates

SN74LVC3G34

Triple Buffer Gates

SN74LVC1G38

Single 2-Input NAND Gates with Open-Drain Outputs

SN74AUC2G53

Analog Multiplexers/Demultiplexers

SN74LVC2G53

Analog Multiplexers/Demultiplexers

SN74AUC1G57

Configurable Multiple-Function Gates

SN74AUP1G57

Low-Power Configurable Multiple-Function Gates

SN74LVC1G57

Configurable Multiple-Function Gates

SN74AUC1G58

Configurable Multiple-Function Gates

SN74AUP1G58

Low-Power Configurable Multiple-Function Gates

SN74LVC1G58

Configurable Multiple-Function Gates

SN74AUC1G66

Single Bilateral Switches

SN74LVC1G66

SN74AUC2G66

SN74LVC2G66

Call

SCES484

SCES324

SCES366
SCES538

Call

SCES503

SCES414

Call

SCES504

SCES415

SCES386

Single Bilateral Switches

Dual Bilateral Switches

Dual Bilateral Switches

SN74AUC1G74

Single Positive-Edge-Triggered D-Type Flip-Flops with Clear and Preset

SN74AUC2G74

Dual Edge-Triggered D-Type Flip-Flops with Clear and Preset

SN74LVC2G74

Dual Edge-Triggered D-Type Flip-Flops with Clear and Preset

SN74AUC1G79

Single Positive-Edge-Triggered D-Type Flip-Flops

SCES387

SN74LVC1G79

Single Edge-Triggered D-Type Flip-Flops

SCES220

SN74AUC2G79

Dual Positive-Edge-Triggered D-Type Flip-Flops

SN74AUC1G80

Single Positive-Edge-Triggered D-Type Flip-Flops

SCES388

SN74LVC1G80

Single Edge-Triggered D-Type Flip-Flops

SCES221

SN74AUC2G80

Dual Positive-Edge-Triggered D-Type Flip-Flops

SN74AHC1G86

Single 2-Input Exclusive-OR Gates

SN74AHCT1G86

Single 2-Input Exclusive-OR Gates

SN74AUC1G86

Single 2-Input Exclusive-OR Gates

SN74LVC1G86

Single 2-Input Exclusive-OR Gates

SN74AUC2G86

Dual 2-Input Exclusive-OR Gates

SN74LVC2G86

Dual 2-Input Exclusive-OR Gates

SN74AUC1G97

Configurable Multiple-Function Gates

SN74AUP1G97

Low-Power Configurable Multiple-Function Gates

SN74LVC1G97

Configurable Multiple-Function Gates

SN74AUC1G98

Configurable Multiple-Function Gates

SN74AUP1G98

Low-Power Configurable Multiple-Function Gates

SN74LVC1G98

Configurable Multiple-Function Gates

SN74AHC1G125

SN74AHCT1G125

SN74AUC1G125

Single Bus Buffers with 3-State Outputs

SCES382

SN74CBT1G125

Single FET Bus Switches

SCDS046

SN74CBTD1G125

Single FET Bus Switches with Level Shifting

SCDS063

SN74CBTLV1G125

Single FET Bus Switches

SCDS057

4126

SCES323

SCES507

SCES325
SCES537

Call

SCES536

SCES540
SCLS323

SCLS324

SCES389
SCES222

SCES203

SCES479

SCES360

SCES387

SCES505

SCES416

Call

SCES506

SCES417

Single Bus Buffers with 3-State Outputs

SCLS377

Single Bus Buffers with 3-State Outputs

SCLS378

DEVICE SELECTION GUIDE

LITTLE LOGIC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
DSBGA

SOP

SOT

SSOP

VSSOP

LITERATURE
REFERENCE

SN74LVC1G125

Single Bus Buffers with 3-State Outputs

SN74AUC2G125

Dual Bus Buffer Gates with 3-State Outputs

SCES532

SN74LVC2G125

Dual Bus Buffer Gates with 3-State Outputs

SCES204

SN74AHC1G126

Single Bus Buffers with 3-State Outputs

SN74AHCT1G126

Single Bus Buffers with 3-State Outputs

SCLS380

SN74AUC1G126

Single Bus Buffers with 3-State Outputs

SCES383

SN74LVC1G126

Single Bus Buffers with 3-State Outputs

SCES224

SN74LVC1G126-Q1

Automotive Catalog Single Bus Buffer Gates with 3-State Outputs

SN74AUC2G126

Dual Bus Buffers with 3-State Outputs

SN74LVC2G126

Dual Bus Buffers with 3-State Outputs

SN74AUC2G157

Dual 2-to-1 Line Data Selectors/Multiplexers

SN74LVC2G157

Dual 2-to-1 Line Data Selectors/Multiplexers

SN74AUC1G240

Single Buffers/Drivers with 3-State Outputs

SCES384

SN74LVC1G240

Single Buffers/Drivers with 3-State Outputs

SCES305

SN74AUC2G240

Dual Buffers/Drivers with 3-State Outputs

SN74LVC2G240

Dual Buffers/Drivers with 3-State Outputs

SN74AUC2G241

Dual Buffers/Drivers with 3-State Outputs

SN74LVC2G241

Dual Buffers/Drivers with 3-State Outputs

SN74AUC2G257

Dual 2-1 Line Data Selectors/Multiplexers with 3-State Outputs

SN74AUC1G332

Single 3-Input Positive-OR Gates

Call

SN74LVC1G332

Single 3-Input Positive-OR Gates

SCES489

SN74LVC1G373

Single D-Type Latches with 3-State Outputs

SN74LVC1G374

Single D-Type Flip-Flops with 3-State Outputs

SN74CBT1G384

Single FET Bus Switches

SCDS065

SN74CBTD1G384

Single FET Bus Switches with Level Shifting

SCDS066

SN74AUC1G386

Single 3-Input Positive-XOR Gates

Call

SN74LVC1G386

Single 3-Input Positive-XOR Gates

SCES349

SN74LVC1G3157

Single-Pole Double-Throw Analog Switches

SCES424

SCES223

SCLS379

SCES467

SCES533

SCES205

SCES207

Call

Call

SCES208
Call

SCES210

SCES534

SCES528
SCES520

4127

DEVICE SELECTION GUIDE

LS
Low-Power Schottky Logic
With a wide array of functions, TIs LS family continues to offer replacement
alternatives for mature systems. This classic line of devices was at the cutting
edge of performance when introduced, and it continues to deliver excellent
value for many of todays designs. As the world leader in logic products, TI is
committed to being the last major supplier at every price-performance node.
See www.ti.com/sc/logic for the most current data sheets.

4129

DEVICE SELECTION GUIDE

LS

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

MIL

PDIP

SOIC

SOP

SSOP

LITERATURE
REFERENCE

SDLS025

14

Quad 2-Input NAND Gates

SN74LS00

Quad 2-Input NAND Gates

SDLS026

SN74LS02

14

Quad 2-Input NOR Gates

SDLS027

SN74LS03

14

Quad 2-Input NAND Gates with Open-Collector Outputs

SDLS028

SN74LS04

14

Hex Inverters

SN74LS05

14

Hex Inverters with Open-Collector Outputs

SDLS030

SN74LS06

14

Hex Inverter Buffers/Drivers with Open-Collector Outputs

SDLS020

SN74LS07

14

Hex Buffers/Drivers with Open-Collector Outputs

SDLS021

SN74LS08

14

Quad 2-Input AND Gates

SDLS033

SN74LS09

14

Quad 2-Input AND Gates with Open-Collector Outputs

SDLS034

SN74LS10

14

Triple 3-Input NAND Gates

SDLS035

SN74LS11

14

Triple 3-Input AND Gates

SDLS131

SN74LS14

14

Hex Schmitt-Trigger Inverters

SN74LS19A

14

Hex Schmitt-Trigger Inverters

SDLS138

SN74LS20

14

Dual 4-Input NAND Gates

SDLS079

SN74LS21

14

Dual 4-Input AND Gates

SDLS139

SN74LS26

14

Quad 2-Input NAND Gates

SDLS087

SN74LS27

14

Triple 3-Input NOR Gates

SDLS089

SN74LS30

14

8-Input NAND Gates

SDLS099

SN74LS31

16

Hex Delay Elements for Generating Delay Lines

SDLS157

SN74LS32

14

Quad 2-Input OR Gates

SDLS100

SN74LS33

14

Quad 2-Input NOR Gates

SDLS101

SN74LS37

14

Quad 2-Input NAND Gates

SDLS103

SN74LS38

14

Quad 2-Input NAND Gates

SDLS105

SN74LS42

16

4-Line BCD to 10-Line Decimal Decoders

SDLS109

SN74LS47

16

BCD to 7-Segment Decoders/Drivers

SDLS111

SN74LS51

14

Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-Invert Gates

SDLS113

SN74LS73A

14

Dual J-K Edge-Triggered Flip-Flops with Reset

SN74LS74A

14

Dual D-Type Flip-Flops with Set and Reset

SDLS119

SN74LS75

16

4-Bit Bistable Latches

SDLS120

SN74LS85

16

4-Bit Magnitude Comparators

SDLS123

SN74LS86A

14

Quad 2-Input Exclusive-OR Gates

SDLS124

SN74LS00

SDLS029

SDLS049

SDLS118

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

4130

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

LS

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

LITERATURE
REFERENCE

SN74LS90

14

Decade Counters

SN74LS92

14

Divide-by-12 Counters

SDLS940

SN74LS93

14

4-Bit Binary Counters

SDLS940

SN74LS96

16

5-Bit Shift Registers

SN74LS107A

14

Dual Negative-Edge-Triggered J-K Flip-Flops with Reset

SDLS036

SN74LS109A

16

Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset

SDLS037

SN74LS112A

16

Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset

SDLS011

SN74LS122

14

Retriggerable Monostable Multivibrators

SDLS043

SN74LS123

16

Dual Retriggerable Monostable Multivibrators with Reset

SDLS043

SN74LS125A

14

Quad Bus Buffers with 3-State Outputs

SDLS044

SN74LS126A

14

Quad Bus Buffers with 3-State Outputs

SDLS044

SN74LS132

14

Quad 2-Input NAND Gates with Schmitt-Trigger Inputs

SDLS047

SN74LS136

14

Quad Exclusive-OR Gates with Open-Collector Outputs

SDLS048

SN74LS138

16

3-to-8 Line Inverting Decoders/Demultiplexers

SDLS014

SN74LS139A

16

Dual 2-to-4 Line Decoders/Demultiplexers

SDLS013

SN74LS145

16

BCD-to-Decimal Decoders/Drivers

SDLS051

SN74LS148

16

8-to-3 Line Priority Encoders

SDLS053

SN74LS151

16

1-of-8 Data Selectors/Multiplexers

SDLS054

SN74LS153

16

Dual 1-of-4 Data Selectors/Multiplexers

SDLS055

SN74LS155A

16

Dual 2-to-4 Line Decoders/Demultiplexers

SDLS057

SN74LS156

16

Dual 2-to-4 Line Decoders/Demultiplexers with Open-Collector Outputs

SDLS057

SN74LS157

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SDLS058

SN74LS158

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SDLS058

SN74LS161A

16

Synchronous 4-Bit Binary Counters

SDLS060

SN74LS163A

16

Synchronous 4-Bit Binary Counters

SDLS060

SN74LS164

14

8-Bit Serial-In, Parallel-Out Shift Registers

SDLS061

SN74LS165A

16

8-Bit Parallel-In, Serial-Out Shift Registers

SDLS062

SN74LS166A

16

8-Bit Parallel-Load Shift Registers

SDLS063

SN74LS169B

16

Synchronous 4-Bit Up/Down Binary Counters

SDLS134

SN74LS170

16

4-by-4 Register Files with Open-Collector Outputs

SN74LS173A

16

Quad D-Type Flip-Flops with 3-State Outputs

SDLS067

SN74LS174

16

Hex D-Type Flip-Flops with Clear

SDLS068

SN74LS175

16

Quad D-Type Flip-Flops with Clear

SDLS068

SN74LS181

24

Arithmetic Logic Units/Function Generators

SN74LS191

16

Presettable Synchronous 4-Bit Up/Down Binary Counters

SDLS072

SN74LS193

16

Presettable Synchronous 4-Bit Up/Down Binary Counters

SDLS074

SN74LS194A

16

4-Bit Bidirectional Universal Shift Registers

SN74LS221

16

Dual Monostable Multivibrators with Schmitt-Trigger Inputs

SDLS213

SN74LS240

20

Octal Buffers/Drivers with 3-State Outputs

SDLS144

SN74LS241

20

Octal Buffers/Drivers with 3-State Outputs

SDLS144

SN74LS243

14

Quad Bus Transceivers with 3-State Outputs

SDLS145

SN74LS244

20

Octal Buffers and Line Drivers with 3-State Outputs

SDLS144

SN74LS245

20

Octal Bus Transceivers with 3-State Outputs

SDLS146

SN74LS247

16

BCD to 7-Segment Decoders/Drivers with Open-Collector Outputs

SDLS940

SDLS946

SDLS065

SDLS136

SDLS075

SDLS083

4131

DEVICE SELECTION GUIDE

LS

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

LITERATURE
REFERENCE

SN74LS251

16

1-of-8 Data Selectors/Multiplexers with 3-State Outputs

SDLS085

SN74LS253

16

Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs

SDLS147

SN74LS257B

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SDLS148

SN74LS258B

16

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SDLS148

SN74LS259B

16

8-Bit Addressable Latches

SDLS086

SN74LS266

14

Quad 2-Input Exclusive-NOR Gates with Open-Collector Outputs

SDLS151

SN74LS273

20

Octal D-Type Flip-Flops with Clear

SDLS090

SN74LS279A

16

Quad S-R Latches

SDLS093

SN74LS280

14

9-Bit Odd/Even Parity Generators/Checkers

SDLS152

SN74LS283

16

9-Bit Binary Full Adders with Fast Carry

SDLS095

SN74LS292

16

Programmable Frequency Dividers/Digital Timers

SN74LS293

14

4-Bit Binary Counters

SN74LS294

16

Programmable Frequency Dividers/Digital Timers

SDLS153

SN74LS297

16

Digital Phase-Locked Loops

SDLS155

SN74LS298

16

Quad 2-Input Multiplexers with Storage

SDLS098

SN74LS299

20

8-Bit Universal Shift/Storage Registers

SDLS156

SN74LS321

16

Crystal-Controlled Oscillators

SN74LS348

16

8-Line to 3-Line Priority Encoders

SDLS161

SN74LS365A

16

Hex Buffers/Line Drivers with 3-State Outputs

SDLS102

SN74LS367A

16

Hex Buffers/Line Drivers with 3-State Outputs

SDLS102

SN74LS368A

16

Hex Inverting Buffers/Line Drivers with 3-State Outputs

SDLS102

SN74LS373

20

Octal Transparent D-Type Latches with 3-State Outputs

SDLS165

SN74LS374

20

Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs

SN74LS375

16

4-Bit Bistable Latches

SDLS166

SN74LS377

20

Octal D-Type Flip-Flops with Enable

SDLS167

SN74LS378

16

Hex D-Type Flip-Flops with Enable

SDLS167

SN74LS390

16

Dual 4-Bit Decade Counters

SDLS107

SN74LS393

14

Dual 4-Bit Binary Counters

SDLS107

SN74LS399

16

Quad 2-Input Multiplexers with Storage

SDLS174

SN74LS423

16

Dual Retriggerable Monostable Multivibrators with Reset

SDLS175

SN74LS442

20

Quad Tridirectional Bus Transceivers with 3-State Outputs

SN74LS465

20

Octal Buffers with 3-State Outputs

SN74LS540

20

Inverting Octal Buffers and Line Drivers with 3-State Outputs

SDLS180

SN74LS541

20

Octal Buffers and Line Drivers with 3-State Outputs

SDLS180

SN74LS590

16

8-Bit Binary Counters with 3-State Output Registers

SDLS003

SN74LS592

16

8-Bit Binary Counters with Input Registers

SDLS004

SN74LS593

20

8-Bit Binary Counters with Input Registers and 3-State I/O Ports

SDLS004

SN74LS594

16

8-Bit Shift Registers with Output Registers

SDLS005

SN74LS595

16

8-Bit Shift Registers with 3-State Output Registers

SDLS006

SN74LS596

16

8-Bit Shift Registers with 3-State Output Latches

SN74LS597

16

8-Bit Shift Registers with Input Latches

SN74LS598

20

8-Bit Shift Registers with Input Latches and 3-State I/O Ports

SN74LS599

16

8-Bit Shift Registers with Output Registers

SN74LS623

20

Octal Bus Transceivers with 3-State Outputs

4132

SDLS153

SDLS158

SDLS165

SDLS176

SDLS097

SDLS179

SDLS006

SDLS007
SDLS007
SDLS005

SDLS185

DEVICE SELECTION GUIDE

LS

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

PDIP

SOIC

SOP

SSOP

LITERATURE
REFERENCE

SN74LS624

14

Single Voltage-Controlled Oscillators

SDLS186

SN74LS628

14

Single Voltage-Controlled Oscillators

SDLS186

SN74LS629

16

Dual Voltage-Controlled Oscillators

SDLS186

SN74LS640

20

Octal Bus Transceivers with 3-State Outputs

SDLS189

SN74LS640-1

20

Octal Bus Transceivers with 3-State Outputs

SDLS189

SN74LS641

20

Octal Bus Transceivers with Open-Collector Outputs

SDLS189

SN74LS641-1

20

Octal Bus Transceivers with Open-Collector Outputs

SN74LS642

20

Octal Bus Transceivers with Open-Collector Outputs

SN74LS642-1

20

Octal Bus Transceivers with Open-Collector Outputs

SN74LS645

20

Octal Bus Transceivers with 3-State Outputs

SDLS189

SN74LS645-1

20

Octal Bus Transceivers with 3-State Outputs

SDLS189

SN74LS646

24

Octal Registered Bus Transceivers with 3-State Outputs

SDLS190

SN74LS648

24

Octal Registered Bus Transceivers with 3-State Outputs

SDLS190

SN74LS652

24

Octal Bus Transceivers and Registers with 3-State Outputs

SDLS191

SN74LS669

16

Synchronous 4-Bit Up/Down Binary Counters

SN74LS670

16

4-by-4 Register Files with 3-State Outputs

SN74LS673

24

16-Bit Serial In/Out with 16-Bit Parallel-Out Storage Registers

SN74LS674

24

16-Bit Serial In/Out with 16-Bit Parallel-Out Storage Registers

SN74LS682

20

8-Bit Magnitude Comparators

SDLS008

SN74LS684

20

8-Bit Magnitude Comparators

SDLS008

SN74LS688

20

8-Bit Magnitude Comparators

SDLS008

20

Synchronous 4-Bit Up/Down Binary Counters

with Output Registers and Multiplexed 3-State Outputs

SDLS199

SN74LS697

SDLS189

SDLS189
SDLS189

SDLS192

SDLS193
SDLS195
SDLS195

4133

DEVICE SELECTION GUIDE

LV
Low-Voltage CMOS Technology Logic
TIs entire LV family has been redesigned for better flexibility in 3.3-V or 5-V
systems. New LV-A devices (e.g., LV00A, LV02A) have improved operating
characteristics and new features, such as 5-V tolerance, faster performance,
and partial power down.
The LV-A series of devices has expanded its voltage operation range (2-V to
5.5-V VCC), while still having a static power consumption of only 20 A for both
bus-interface and gate functions. The LV family now has propagation delays
of 5.4 ns typical at 3.3 V (SN74LV244A) and provides 8 mA of current drive.
With an Ioff specification of only 5 A, these devices have the capability of
partially powering down. In addition, the typical output VOH undershoot (VOHV)
has been improved to >2.3 V at 3.3-V VCC for quieter operation.
New key features:

Support mixed-mode voltage operation on all ports

Ioff for partial power down
14 ns maximum at 3.3-V VCC for buffers

The LV family is offered in the octal footprints, with advanced packaging such
as plastic dual-in-line package (PDIP), quad flatpack no-lead (QFN) package,
small-outline integrated circuit (SOIC), small-outline package (SOP), shrink
small-outline package (SSOP), thin shrink small-outline package (TSSOP),
and thin very small-outline package (TVSOP). Selected LV devices are
offered in the MicroStar Jr. (VFBGA) package.
See www.ti.com/sc/logic for the most current data sheets.

4135

DEVICE SELECTION GUIDE

LV

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
PDIP

QFN

SOIC

SOP

SSOP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

SN74LV00A

14

Quad 2-Input NAND Gates

SCLS389

SN74LV02A

14

Quad 2-Input NOR Gates

SCLS390

SN74LV04A

14

Hex Inverters

SCLS388

SN74LVU04A

14

Hex Unbuffered Inverters

SCES130

SN74LV05A

14

Hex Inverters with Open-Drain Outputs

SCLS391

SN74LV06A

14

Hex Inverter Buffers/Drivers with Open-Drain Outputs

SCES336

SN74LV07A

14

Hex Buffers/Drivers with Open-Drain Outputs

SCES337

SN74LV08A

14

Quad 2-Input AND Gates

SCLS387

SN74LV10A

14

Triple 3-Input NAND Gates

SCES338

SN74LV11A

14

Triple 3-Input AND Gates

SCES345

SN74LV14A

14

Hex Schmitt-Trigger Inverters

SCLS386

SN74LV20A

14

Dual 4-Input NAND Gates

SCES339

SN74LV21A

14

Dual 4-Input AND Gates

SCES340

SN74LV27A

14

Triple 3-Input NOR Gates

SCES341

SN74LV32A

14

Quad 2-Input OR Gates

SCLS385

SN74LV74A

14

Dual D-Type Flip-Flops with Set and Reset

SCLS381

SN74LV86A

14

Quad 2-Input Exclusive-OR Gates

SCLS392

SN74LV123A

16

Dual Retriggerable Monostable Multivibrators with Reset

SCLS393

SN74LV125A

14

Quad Bus Buffers with 3-State Outputs

SCES124

SN74LV126A

14

Quad Bus Buffers with 3-State Outputs

SCES131

SN74LV132A

14

Quad 2-Input NAND Gates with Schmitt-Trigger Inputs

SCLS394

SN74LV138A

16

3-to-8 Line Inverting Decoders/Demultiplexers

SCLS395

SN74LV139A

16

Dual 2-to-4 Line Decoders/Demultiplexers

SCLS396

SN74LV157A

14

Quad 2-to-4 Line Data Selectors/Multiplexers

SCLS397

SN74LV161A

16

Synchronous 4-Bit Binary Counters

SCLS404

SN74LV163A

16

Synchronous 4-Bit Binary Counters

SCLS405

SN74LV164A

14

8-Bit Serial-In, Parallel-Out Shift Registers

SCLS403

SN74LV165A

16

8-Bit Parallel-In, Serial-Out Shift Registers

SCLS402

SN74LV166A

16

8-Bit Parallel-Load Shift Registers

SCLS456

SN74LV174A

16

Hex D-Type Flip-Flops with Clear

SCLS401

SN74LV175A

16

Quad D-Type Flip-Flops with Clear

SCLS400

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

4136

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

LV

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
PDIP

QFN

SOIC

SOP

SSOP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

SN74LV221A

16

Dual Monostable Multivibrators

with Schmitt-Trigger Inputs

SCLS450

SN74LV240A

20

Octal Buffers/Drivers with 3-State Outputs

SCLS384

SN74LV244A

20

Octal Buffers and Line Drivers with 3-State Outputs

SN74LV245A

20

Octal Bus Transceivers with 3-State Outputs

SN74LV273A

20

Octal D-Type Flip-Flops with Clear

SN74LV367A

16

Hex Buffers/Line Drivers with 3-State Outputs

SN74LV373A

20

Octal Transparent D-Type Latches with 3-State Outputs

SCLS407

SN74LV374A

20

Octal Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SCLS408

SN74LV393A

14

Dual 4-Bit Binary Counters

SCLS457

SN74LV540A

20

Inverting Octal Buffers and Line Drivers

with 3-State Outputs

SCLS409

SN74LV541A

20

Octal Buffers and Line Drivers with 3-State Outputs

SN74LV573A

20

Octal Transparent D-Type Latches with 3-State Outputs

SCLS411

SN74LV574A

20

Octal Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SCLS412

SN74LV594A

16

8-Bit Shift Registers with Output Registers

SN74LV595A

16

8-Bit Shift Registers with 3-State Output Registers

SN74LV4040A

16

12-Stage Ripple-Carry Binary Counters/Dividers

SN74LV4051A

16

8-Channel Analog Multiplexers/Demultiplexers

with Logic Level Conversion

SN74LV4052A

16

SN74LV4053A

SCLS383

SCLS382
SCLS399
SCLS398

SCLS410

SCLS413

SCLS414

SCES226

SCLS428

Dual 4-Channel Analog Multiplexers/Demultiplexers

with Logic Level Conversion

SCLS429

16

Triple 2-Channel Analog Multiplexers/Demultiplexers

with Logic Level Conversion

SCLS430

SN74LV4066A

14

Quad Bilateral Switches

SCLS427

SN74LV161284A

48

19-Bit Bus Interfaces

SCLS426

4137

DEVICE SELECTION GUIDE

LVC
Low-Voltage CMOS Technology Logic
TIs LVC products are specially designed for 3-V power supplies.
The LVC family is a high-performance version, with 0.8- CMOS process
technology, 24-mA current drive, and 6.5-ns maximum propagation delays for
driver operations. The LVC family includes both bus-interface and gate
functions, with 60 different functions planned.
The LVC family is offered in the octal and Widebus footprints, with advanced
packaging such as plastic dual-in-line package (PDIP), quad flatpack no-lead
(QFN) package, small-outline transistor (SOT), small-outline integrated circuit
(SOIC), small-outline package (SOP), shrink small-outline package (SSOP),
thin shrink small-outline package (TSSOP), very small-outline package
(TVSOP), and very thin shrink small-outline package (VSSOP). Selected
devices are offered in NanoStar/NanoFree (DSBGA) packages and the
MicroStar BGA (LFBGA) and MicroStar Jr. (VFBGA) packages.
All LVC devices are available with 5-V-tolerant inputs and outputs.
An extensive line of single gates is planned in the LVC family.
See www.ti.com/sc/logic for the most current data sheets.

4139

DEVICE SELECTION GUIDE

LVC

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

DSBGA

LFBGA

PDIP

QFN

SOIC

SOP

SOT

SSOP

TSSOP

TVSOP

VFBGA

VSSOP

LITERATURE
REFERENCE

SN74LVC1G00

Single 2-Input
NAND Gates

SCES212

SN74LVC1G02

Single 2-Input
NOR Gates

SCES213

SN74LVC1G04

Single Inverters

SCES214

SN74LVC1GU04

Single Inverters

SCES215

SN74LVC1G06

Single Inverting
Buffers/Drivers
with Open-Drain Outputs

SCES295

SN74LVC1G07

Single Buffers/Drivers
with Open-Drain Outputs

SCES296

SN74LVC1G08

Single 2-Input
AND Gates

SCES217

SN74LVC1G10

Single 3-Input
Positive-NAND Gates

SCES486

SN74LVC1G11

Single 3-Input
Positive-AND Gates

SCES487

SN74LVC1G14

Single
Schmitt-Trigger Inverters

SCES218

SN74LVC1G17

Single
Schmitt-Trigger Buffers

SCES351

SN74LVC1G18

1-of-2 Noninverting
Demultiplexers
with 3-State
Deselected Output

SCES406

SN74LVC1G27

Single 3-Input
Positive-NOR Gates

SCES488

SN74LVC1G32

Single 2-Input OR Gates

SCES219

SN74LVC1G57

Configurable
Multiple-Function Gates

SCES414

SN74LVC1G58

Configurable
Multiple-Function Gates

SCES415

SN74LVC1G66

Single Bilateral Switches

SCES323

Single Edge-Triggered
D-Type Flip-Flops

SCES220

SN74LVC1G79

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

4140

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

LVC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
DSBGA

LFBGA

PDIP

QFN

SOIC

SOP

SOT

SSOP

TSSOP

TVSOP

VFBGA

VSSOP

LITERATURE
REFERENCE

SN74LVC1G80

Single Edge-Triggered
D-Type Flip-Flops

SCES221

SN74LVC1G86

Single 2-Input
Exclusive-OR Gates

SCES222

SN74LVC1G97

Configurable
Multiple-Function Gates

SCES416

SN74LVC1G98

Configurable
Multiple-Function Gates

SCES417

SN74LVC1G125

Single Bus Buffers

with 3-State Outputs

SCES223

SN74LVC1G126

Single Bus Buffers

with 3-State Outputs

SCES224

SN74LVC1G240

Single Buffers/Drivers
with 3-State Outputs

SCES305

SN74LVC1G332

Single 3-Input
Positive-OR Gates

SCES489

SN74LVC1G386

Single 3-Input
Positive-XOR Gates

SCES349

SN74LVC1G3157

Single-Pole
Double-Throw
Analog Switches

SCES424

SN74LVC2G00

Dual 2-Input
NAND Gates

SN74LVC2G02

Dual 2-Input NOR Gates

SN74LVC2G04

Dual Inverters

SCES195

SN74LVC2GU04

Dual Inverters

SCES197

SN74LVC2G06

Dual Inverter
Buffers/Drivers
with Open-Drain Outputs

SCES307

SN74LVC2G07

Dual Buffers/Drivers
with Open-Drain Outputs

SCES308

SN74LVC2G08

Dual 2-Input AND Gates

SN74LVC2G14

Dual
Schmitt-Trigger Inverters

SCES200

SN74LVC2G17

Dual
Schmitt-Trigger Buffers

SCES381

SN74LVC2G32

Dual 2-Input OR Gates

SN74LVC2G34

Dual Buffer Gates

SN74LVC2G53

Analog Multiplexers/
Demultiplexers

SCES324

SN74LVC2G66

Dual Bilateral
Analog Switches

SCES325

SN74LVC2G74

Dual Edge-Triggered
D-Type Flip-Flops
with Preset and Clear

SCES203

SN74LVC2G86

Dual 2-Input
Exclusive-OR Gates

SCES360

SN74LVC2G125

Dual Bus Buffers

with 3-State Outputs

SCES204

SCES193

SCES194

SCES198

SCES201
SCES359

4141

DEVICE SELECTION GUIDE

LVC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
DSBGA

LFBGA

PDIP

QFN

SOIC

SOP

SOT

SSOP

TSSOP

TVSOP

VFBGA

VSSOP

LITERATURE
REFERENCE

SN74LVC2G126

Dual Bus Buffer Gates

with 3-State Outputs

SCES205

SN74LVC2G157

Dual 2-to-1 Line Data

Selectors/Multiplexers

SCES207

SN74LVC2G240

Dual Buffers/Drivers
with 3-State Outputs

SCES208

SN74LVC2G241

Dual Buffers/Drivers
with 3-State Outputs

SCES210

SN74LVC3G04

Triple Inverters

SCES363

SN74LVC3GU04

Triple Inverters

SCES539

SN74LVC3G06

Triple Inverting
Buffers/Drivers
with Open-Drain Outputs

SCES364

SN74LVC3G07

Triple Buffers/Drivers
with Open-Drain Outputs

SCES365

SN74LVC3G14

Triple
Schmitt-Trigger Inverters

SCES367

SN74LVC3G34

Triple Buffer Gates

SCES366

SN74LVC00A

14

Quad 2-Input
NAND Gates

SN74LVC02A

14

Quad 2-Input NOR Gates

SN74LVC04A

14

Hex Inverters

SCAS281

SN74LVCU04A

14

Hex Unbuffered Inverters

SCAS282

SN74LVC06A

14

Hex Inverter
Buffers/Drivers
with Open-Drain Outputs

SCAS596

SN74LVC07A

14

Hex Buffers/Drivers
with Open-Drain Outputs

SCAS595

SN74LVC08A

14

Quad 2-Input AND Gates

SCAS283

SN74LVC10A

14

Triple 3-Input
NAND Gates

SCAS284

SN74LVC14A

14

Hex
Schmitt-Trigger Inverters

SN74LVC32A

14

Quad 2-Input OR Gates

SCAS286

SN74LVC74A

14

Dual D-Type Flip-Flops

with Set and Reset

SCAS287

SN74LVC86A

14

Quad 2-Input
Exclusive-OR Gates

SCAS288

SN74LVC112A

16

Dual Negative-Edge
Triggered J-K Flip-Flops
with Set and Reset

SN74LVC125A

14

Quad Bus Buffers

with 3-State Outputs

SN74LVC126A

14

Quad Bus Buffers

with 3-State Outputs

SN74LVC138A

16

3-to-8 Line Inverting

Decoders/Demultiplexers

SN74LVC139A

16

Dual 2-to-4 Line

Decoders/Demultiplexers

4142

SCAS279
SCAS280

SCAS285

SCAS289

SCAS290
SCAS339

SCAS291
SCAS341

DEVICE SELECTION GUIDE

LVC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
DSBGA

LFBGA

PDIP

QFN

SOIC

SOP

SOT

TVSOP

VFBGA

VSSOP

LITERATURE
REFERENCE

SSOP

TSSOP

SCAS293

SCES273

SCAS218

SCES008

SCES275

SCAS294

SCAS296

SN74LVC157A

16

Quad 2-to-4 Line Data

Selectors/Multiplexers

SN74LVC240A

20

Octal Buffers/Drivers
with 3-State Outputs

SN74LVCZ240A

20

Octal Buffers/Drivers
with 3-State Outputs

SN74LVC244A

20

Octal Buffers
and Line Drivers
with 3-State Outputs

SN74LVCH244A

20

Octal Buffers
and Line Drivers
with 3-State Outputs

SN74LVCZ244A

20

Octal Buffers
and Line Drivers
with 3-State Outputs

SN74LVC245A

20

Octal Bus Transceivers

with 3-State Outputs

SN74LVCH245A

20

Octal Bus Transceivers

with 3-State Outputs

SN74LVCZ245A

20

Octal Bus Transceivers

with 3-State Outputs

SN74LVC257A

16

Quad 1-of-2 Data

Selectors/Multiplexers
with 3-State Outputs

SN74LVC373A

20

Octal Transparent
D-Type Latches
with 3-State Outputs

SN74LVC374A

20

Octal Edge-Triggered
D-Type Flip-Flops
with 3-State Outputs

SN74LVC540A

20

Inverting Octal Buffers

and Line Drivers
with 3-State Outputs

SCAS297

SN74LVC541A

20

Octal Buffers
and Line Drivers
with 3-State Outputs

SCAS298

SN74LVC543A

24

Octal
Registered Transceivers
with 3-State Outputs

SN74LVC573A

20

Octal Transparent
D-Type Latches
with 3-State Outputs

SCAS300

SN74LVC574A

20

Octal Edge-Triggered
D-Type Flip-Flops
with 3-State Outputs

SCAS301

SN74LVC646A

24

Octal Registered
Bus Transceivers
with 3-State Outputs

SN74LVC652A

24

Octal Bus Transceivers

and Registers
with 3-State Outputs

SCAS292

SCAS414

SCES009

SCES274

SCAS295

SCAS299

SCAS302

SCAS303

4143

DEVICE SELECTION GUIDE

LVC
NO.
PINS

DESCRIPTION

SN74LVC821A

24

SN74LVC823A

DEVICE

AVAILABILITY
SOIC

SOP

LFBGA

PDIP

QFN

10-Bit
Bus-Interface Flip-Flops
with 3-State Outputs

24

9-Bit
Bus-Interface Flip-Flops
with 3-State Outputs

SN74LVC827A

24

SN74LVC828A

TSSOP

TVSOP

SCAS304

SCAS305

10-Bit Buffers/Drivers
with 3-State Outputs

SCAS306

24

10-Bit Buffers/Drivers
with 3-State Outputs

SCAS347

SN74LVC841A

24

10-Bit Bus-Interface
D-Type Latches
with 3-State Outputs

SCAS307

SN74LVC861A

24

10-Bit Transceivers
with 3-State Outputs

SCAS309

SN74LVC863A

24

9-Bit Bus Transceivers

with 3-State Outputs

SCAS310

SN74LVC2244A

20

Octal
Buffers/Line Drivers
with Series Damping
Resistors
and 3-State Outputs

SCAS572

SN74LVCR2245A

20

Octal Bus Transceivers

with Series Damping
Resistors
and 3-State Outputs

SN74LVC2952A

24

Octal Bus Transceivers

and Registers
with 3-State Outputs

SCAS311

SN74LVCC3245A

24

Octal Bus Transceivers

with Adjustable
Output Voltage
and 3-State Outputs

SCAS585

SN74LVC4245A

24

Octal Bus Transceivers

and 3.3-V to 5-V Shifters
with 3-State Outputs

SCAS375

SN74LVCC4245A

24

Octal Dual-Supply
Bus Transceivers
with Configurable
Output Voltage
and 3-State Outputs

SCAS584

SN74LVCH16240A

48

16-Bit Buffers/Drivers
with 3-State Outputs

SCAS566

SN74LVCZ16240A

48

16-Bit Buffers/Drivers
with 3-State Outputs

SN74LVC16244A

48

16-Bit Buffers/Drivers
with 3-State Outputs

SCES061

SN74LVCH16244A

48

16-Bit Buffers/Drivers
with 3-State Outputs

SCAS313

SN74LVCZ16244A

48

16-Bit Buffers/Drivers
with 3-State Outputs

SN74LVC16245A

48

16-Bit Bus Transceivers

with 3-State Outputs

SOT

VFBGA

VSSOP

LITERATURE
REFERENCE

SSOP

4144

DSBGA

SCAS581

SCES276

SCES277

SCES062

DEVICE SELECTION GUIDE

LVC
NO.
PINS

DESCRIPTION

SN74LVCH16245A

48

SN74LVCHR16245A

DEVICE

AVAILABILITY
DSBGA

LFBGA

PDIP

QFN

SOIC

SOP

SOT

TSSOP

TVSOP

VFBGA

16-Bit Bus Transceivers

with 3-State Outputs

SCES063

48

16-Bit Bus Transceivers

with 3-State Outputs

SCAS582

SN74LVCZ16245A

48

16-Bit Bus Transceivers

with 3-State Outputs

SN74LVC16373A

48

16-Bit Transparent
D-Type Latches
with 3-State Outputs

SCAS662

SN74LVCH16373A

48

16-Bit Transparent
D-Type Latches
with 3-State Outputs

SCAS568

SN74LVC16374A

48

16-Bit Edge-Triggered
D-Type Flip-Flops
with 3-State Outputs

SCAS663

SN74LVCH16374A

48

16-Bit Edge-Triggered
D-Type Flip-Flops
with 3-State Outputs

SCAS565

SN74LVCH16540A

48

16-Bit Buffers/Drivers
with 3-State Outputs

SCAS569

SN74LVCH16541A

48

16-Bit Buffers/Drivers
with 3-State Outputs

SCAS567

SN74LVC16543

56

16-Bit
Registered Transceivers
with 3-State Outputs

SN74LVCH16543A

56

16-Bit
Registered Transceivers
with 3-State Outputs

SN74LVC16646

56

16-Bit Bus Transceivers

and Registers
with 3-State Outputs

SN74LVCH16646A

56

16-Bit Bus Transceivers

and Registers
with 3-State Outputs

SN74LVC16652

56

16-Bit Bus Transceivers

and Registers
with 3-State Outputs

SN74LVCH16652A

56

16-Bit Bus Transceivers

and Registers
with 3-State Outputs

SN74LVCH16901

64

18-Bit Universal
Bus Transceivers
with Parity
Generators/Checkers

SN74LVCH16952A

56

16-Bit
Registered Transceivers
with 3-State Outputs

SN74LVCZ32240A

96

32-Bit Buffers/Drivers
with 3-State Outputs

SCES421

SN74LVC32244

96

32-Bit Buffers/Drivers
with 3-State Outputs

SCES342

SCES278

Call

SCAS317

Call

SCAS318

Call

VSSOP

LITERATURE
REFERENCE

SSOP

SCAS319

SCES145

SCAS320

4145

DEVICE SELECTION GUIDE

LVC

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
DSBGA

LFBGA

PDIP

QFN

SOIC

SOP

SOT

SSOP

TSSOP

TVSOP

VFBGA

VSSOP

LITERATURE
REFERENCE

SN74LVCH32244A

96

32-Bit Buffers/Drivers
with 3-State Outputs

SCAS617

SN74LVCZ32244A

96

32-Bit Buffers/Drivers
with 3-State Outputs

SCES422

SN74LVC32245

96

32-Bit Bus Transceivers

with 3-State Outputs

SCES343

SN74LVCH32245A

96

32-Bit Bus Transceivers

with 3-State Outputs

SCAS616

SN74LVCR32245A

96

32-Bit Bus Transceivers

with 3-State Outputs

SCES428

SN74LVCZ32245A

96

32-Bit Bus Transceivers

with 3-State Outputs

SCES423

SN74LVCH32373A

96

32-Bit Transparent
D-Type Latches
with 3-State Outputs

SCAS618

SN74LVC32374A

96

32-Bit Edge-Triggered
D-Type Flip-Flops
with 3-State Outputs

SCES407

SN74LVCH32374A

96

32-Bit Edge-Triggered
D-Type Flip-Flops
with 3-State Outputs

SCAS619

SN74LVC161284

48

19-Bit Bus Interfaces

SN74LVCZ161284A

48

19-Bit IEEE Std 1284

Bus Interfaces

SN74LVC162244A

48

16-Bit Buffers/Drivers
with Series Damping
Resistors
and 3-State Outputs

SN74LVCH162244A

48

16-Bit Buffers/Drivers
with Series Damping
Resistors
and 3-State Outputs

48

16-Bit Bus Transceivers

with Series Damping
Resistors
and 3-State Outputs

SN74LVCR162245

4146

SCAS583

SCES358

SCAS664

SCAS545

SCES047

DEVICE SELECTION GUIDE

LVT
Low-Voltage BiCMOS
Technology Logic
LVT is a 5-V-tolerant, 3.3-V product using 0.72- BiCMOS technology, with
performance specifications ideal for workstation, networking, and
telecommunications applications. LVT delivers 3.5-ns propagation delays at
3.3 V (28% faster than ABT at 5 V), current drive of 64 mA, and pin-for-pin
compatibility with existing ABT families.
LVT operates at LVTTL signal levels in telecom and networking
high-performance system point-to-point or distributed backplane applications.
LVT is an excellent migration path from ABT.
In addition to popular octal and Widebus bus-interface devices, TI also offers
UBT transceivers and selected functions in Widebus+ in this low-voltage
family.
Performance characteristics of the LVT family are:

3.3-V operation with 5-V-tolerant I/Os Permits use in a mixed-voltage

environment

Speed Provides high-performance with maximum propagation delays of

3.5 ns at 3.3 V for buffers

Drive Provides up to 64 mA of drive at 3.3-V VCC, yet consumes less than

330 W of standby power

Additional features include:

Hot insertion LVT devices incorporate Ioff and power-up 3-state (PU3S)
circuitry to protect the devices in live-insertion applications and make
them ideally suited for hot-insertion applications. Ioff prevents the devices
from being damaged during partial power down, and PU3S forces the
outputs to the high-impedance state during power up and power down.

Bus-hold option Eliminates floating inputs by holding them at the last

valid logic state. This eliminates the need for external pullup and pulldown
resistors.

4147

Additional features (continued):

Damping-resistor option TI implements series damping resistors on

selected devices, which not only reduces overshoot and undershoot, but
also matches the line impedance, minimizing ringing.

Packaging LVT devices are available in the quad flatpack no-lead (QFN)
package, small-outline integrated circuit (SOIC), small-outline package
(SOP), shrink small-outline package (SSOP), thin shrink small-outline
package (TSSOP), and thin very small-outline package (TVSOP). Select
devices are offered in the MicroStar BGA (LFBGA) and MicroStar Jr.
(VFBGA) packages.

See www.ti.com/sc/logic for the most current data sheets.

4148

DEVICE SELECTION GUIDE

LVT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

LFBGA

QFN

SOIC

SOP

SSOP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

LVT Octals (SN74LVTxxx, SN74LVTHxxx)

SN74LVT125

14

Quad Bus Buffers with 3-State Outputs

SN74LVTH125

14

Quad Bus Buffers with 3-State Outputs

SCBS703

SN74LVTH126

14

Quad Bus Buffers with 3-State Outputs

SCBS746

SN74LVT240

20

Octal Buffers/Drivers with 3-State Outputs

Call

SN74LVT240A

20

Octal Buffers/Drivers with 3-State Outputs

SCBS134

SN74LVTH240

20

Octal Buffers/Drivers with 3-State Outputs

SN74LVTH241

20

Octal Buffers/Drivers with 3-State Outputs

SN74LVT244B

20

Octal Buffers and Line Drivers

with 3-State Outputs

SCAS354

SN74LVTH244A

20

Octal Buffers and Line Drivers

with 3-State Outputs

SCAS586

SN74LVT245B

20

Octal Bus Transceivers with 3-State Outputs

SCES004

SN74LVTH245A

20

Octal Bus Transceivers with 3-State Outputs

SCBS130

SN74LVTR245

20

3.3-V ABT Octal Bus Transceivers

with 3-State Outputs and Series Resisters

SN74LVTH273

20

Octal D-Type Flip-Flops with Clear

SN74LVTH373

20

Octal Transparent D-Type Latches

with 3-State Outputs

SN74LVTH374

20

Octal Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SN74LVTH540

20

SN74LVTH541

SCBS133

SCBS679
SCAS352

SCAS428

SCBS136

SCBS689

SCBS683

Inverting Octal Buffers and Line Drivers

with 3-State Outputs

SCBS681

20

Octal Buffers and Line Drivers

with 3-State Outputs

SCBS682

SN74LVTH543

24

Octal Registered Transceivers

with 3-State Outputs

SN74LVTH573

20

Octal Transparent D-Type Latches

with 3-State Outputs

SCBS687

SN74LVTH574

20

Octal Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SCBS688

SN74LVTH646

24

Octal Registered Bus Transceivers

with 3-State Outputs

SCBS705

SN74LVTH652

24

Octal Bus Transceivers and Registers

with 3-State Outputs

SCBS706

SCBS704

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins
TSSOP (thin shrink small-outline package)
PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

4149

DEVICE SELECTION GUIDE

LVT

DEVICE
SN74LVT2952

NO.
PINS
24

DESCRIPTION

AVAILABILITY
MIL

LFBGA

QFN

SOIC

SOP

SSOP

Octal Bus Transceivers and Registers

with 3-State Outputs

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

SCBS152

LVT Widebus (SN74LVTH16xxx)

SN74LVT16240

48

16-Bit Buffers/Drivers with 3-State Outputs

SCBS717

SN74LVTH16240

48

16-Bit Buffers/Drivers with 3-State Outputs

SCBS684

SN74LVTH16241

48

16-Bit Buffers/Drivers with 3-State Outputs

SN74LVT16244B

48

16-Bit Buffers/Drivers with 3-State Outputs

SCBS716

SN74LVTH16244A

48

16-Bit Buffers/Drivers with 3-State Outputs

SCBS142

SN74LVT16245B

48

16-Bit Bus Transceivers with 3-State Outputs

SCBS715

SN74LVTH16245A

48

16-Bit Bus Transceivers with 3-State Outputs

SCBS143

SN74LVTH16373

48

16-Bit Transparent D-Type Latches

with 3-State Outputs

SCBS144

SN74LVTH16374

48

16-Bit Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SCBS145

SN74LVTH16500

56

18-Bit Universal Bus Transceivers

with 3-State Outputs

SCBS701

SN74LVTH16501

56

18-Bit Universal Bus Transceivers

with 3-State Outputs

SCBS700

SN74LVTH16541

48

16-Bit Buffers/Drivers with 3-State Outputs

SCBS691

SN74LVTH16543

56

16-Bit Registered Transceivers

with 3-State Outputs

SCBS699

SN74LVTH16646

56

16-Bit Bus Transceivers and Registers

with 3-State Outputs

SCBS698

SN74LVTH16652

56

16-Bit Bus Transceivers and Registers

with 3-State Outputs

SCBS150

SN74LVTH16835

56

18-Bit Universal Bus Drivers

with 3-State Outputs

SCBS713

SN74LVTH16952

56

16-Bit Registered Transceivers

with 3-State Outputs

SCBS697

SN74LVTH162373

48/56

3.3-V ABT 16-Bit Transparent

D-Type Latches with 3-State Outputs

SCBS693

SCBS261

LVT Widebus (SN74LVTH32xxx)

SN74LVT32240

96

32-Bit Buffers/Drivers with 3-State Outputs

SCBS747

SN74LVT32244

96

32-Bit Buffers/Drivers with 3-State Outputs

SCBS748

SN74LVTH32244

96

32-Bit Buffers/Drivers with 3-State Outputs

SCBS749

SN74LVT32245

96

32-Bit Bus Transceivers with 3-State Outputs

SCBS750

SN74LVTH32245

96

32-Bit Bus Transceivers with 3-State Outputs

SCBS750

SN74LVTH32373

96

32-Bit Transparent D-Type Latches

with 3-State Outputs

SCBS751

SN74LVTH32374

96

32-Bit Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SCBS752

SN74LVTH322374

96

3.3-V ABT 32-Bit Edge-Triggered

D-Type Flip-Flops with 3-State Outputs

SCBS754

4150

DEVICE SELECTION GUIDE

LVT

DEVICE

NO.
PINS

DESCRIPTION

AVAILABILITY
MIL

LFBGA

QFN

SOIC

SOP

SSOP

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

LVT Octals/Widebus With Series Damping Resistors (SN74LVTH2xxx, SN74LVTH162xxx)

SN74LVTH2245

20

Octal Bus Transceivers

with Series Damping Resistors
and 3-State Outputs

SN74LVTH2952

24

Octal Bus Transceivers and Registers

with 3-State Outputs

SN74LVT162240

48

16-Bit Buffers/Drivers
with Series Damping Resistors
and 3-State Outputs

SN74LVTH162240

48

16-Bit Buffers/Drivers
with Series Damping Resistors
and 3-State Outputs

SCBS685

SN74LVTH162241

48

16-Bit Buffers/Drivers
with Series Damping Resistors
and 3-State Outputs

SCBS692

SN74LVT162244A

48

16-Bit Buffers/Drivers
with Series Damping Resistors
and 3-State Outputs

SN74LVTH162244

48

16-Bit Buffers/Drivers
with Series Damping Resistors
and 3-State Outputs

SN74LVT162245A

48

16-Bit Bus Transceivers

with Series Damping Resistors
and 3-State Outputs

SN74LVTH162245

48

16-Bit Bus Transceivers

with Series Damping Resistors
and 3-State Outputs

SN74LVTH162373

48

SN74LVTH162374
SN74LVTH162541

SCBS707

SCBS710

SCBS718

SCBS258

SCBS714

SCBS260

16-Bit Transparent D-Type Latches

with 3-State Outputs

SCBS261

48

16-Bit Edge-Triggered D-Type Flip-Flops

with 3-State Outputs

SCBS262

48

16-Bit Buffers/Drivers with 3-State Outputs

SCBS719

SCBS690

4151

DEVICE SELECTION GUIDE

PCA/PCF
I2C Inter-Integrated
Circuit Applications
The I2C bus is a bidirectional two-wire bus for communicating between
integrated circuits. The PCA and PCF devices offered by TI are
general-purpose logic to be used with the I2C or system management (SM)
bus protocols.

4153

DEVICE SELECTION GUIDE

PCA/PCF

DEVICE
PCA8550

NO.
PINS
16

AVAILABILITY

DESCRIPTION

PDIP

Nonvolatile 5-Bit Registers with I2C Interface

SOIC

SSOP

TSSOP

TVSOP

LITERATURE
REFERENCE
SCPS050

PCF8574

16/20

Remote 8-Bit I/O Expanders for

Bus

SCPS068

PCF8574A

16/20

Remote 8-Bit I/O Expanders for I2C Bus

SCPS069

I2C

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

4154

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

S
Schottky Logic
With a wide array of functions, TIs S family continues to offer replacement
alternatives for mature systems. This classic line of devices was at the cutting
edge of performance when introduced, and it continues to deliver excellent
value for many of todays designs. As the world leader in logic products, TI is
committed to being the last major supplier at every price-performance node.
See www.ti.com/sc/logic for the most current data sheets.

4155

DEVICE SELECTION GUIDE

S

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

MIL

PDIP

SOIC

SOP

SSOP

TSSOP

LITERATURE
REFERENCE

SN74S00

14

Quad 2-Input NAND Gates

SDLS025

SN74S02

14

Quad 2-Input NOR Gates

SDLS027

SN74S04

14

Hex Inverters

SDLS029

SN74S05

14

Hex Inverters with Open-Collector Outputs

SDLS030

SN74S08

14

Quad 2-Input AND Gates

SDLS033

SN74S09

14

Quad 2-Input AND Gates with Open-Collector Outputs

SDLS034

SN74S10

14

Triple 3-Input NAND Gates

SDLS035

SN74S20

14

Dual 4-Input NAND Gates

SDLS079

SN74S32

14

Quad 2-Input OR Gates

SDLS100

SN74S37

14

Quad 2-Input NAND Gates

SDLS103

SN74S38

14

Quad 2-Input NAND Gates

SDLS105

SN74S51

14

Dual 2-Wide 2-Input AND-OR-Invert Gates

SDLS113

SN74S74

14

Dual D-Type Flip-Flops with Set and Reset

SDLS119

SN74S85

16

4-Bit Magnitude Comparators

SDLS123

SN74S86

14

Quad 2-Input Exclusive-OR Gates

SDLS124

SN74S112A

16

Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset

SDLS011

SN74S124

16

Dual Voltage Controlled Oscillators

SDLS201

SN74S132

14

Quad 2-Input NAND Gates with Schmitt-Trigger Inputs

SDLS047

SN74S133

16

13-Input NAND Gates

SDLS202

SN74S138A

16

3-to-8 Line Inverting Decoders/Demultiplexers

SDLS014

SN74S139A

16

Dual 2-to-4 Line Decoders/Demultiplexers

SDLS013

SN74S140

14

Dual 4-Input Positive-NAND 50- Line Drivers

SDLS210

SN74S151

16

1-of-8 Data Selectors/Multiplexers

SDLS054

SN74S157

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SDLS058

SN74S158

16

Quad 2-to-4 Line Data Selectors/Multiplexers

SDLS058

SN74S163

16

Synchronous 4-Bit Binary Counters

SDLS060

SN74S174

16

Hex D-Type Flip-Flops with Clear

SDLS068

SN74S175

16

Quad D-Type Flip-Flops with Clear

SN74S182

16

Look-Ahead Carry Generators

SN74S240

20

Octal Buffers/Drivers with 3-State Outputs

SDLS144

SN74S241

20

Octal Buffers/Drivers with 3-State Outputs

SDLS144

SN74S244

20

Octal Buffers and Line Drivers with 3-State Outputs

SDLS144

SDLS068
SDLS206

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

4156

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

S

DEVICE

NO.
PINS

SN74S257

16

SN74S260
SN74S280

DESCRIPTION

AVAILABILITY
SOP

SSOP

TSSOP

LITERATURE
REFERENCE

MIL

PDIP

SOIC

Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

SDLS148

14

Dual 5-Input NOR Gates

SDLS208

14

9-Bit Odd/Even Parity Generators/Checkers

SDLS152

SN74S283

16

9-Bit Binary Full Adders with Fast Carry

SDLS095

SN74S373

20

Octal Transparent D-Type Latches with 3-State Outputs

SDLS165

SN74S374

20

Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs

SDLS165

SN74S381

20

Arithmetic Logic Units/Function Generators

SN74S1050

16

12-Bit Schottky Barrier Diode Bus-Termination Arrays

SN74S1051

16

12-Bit Schottky Barrier Diode Bus-Termination Arrays

SN74S1052

20

16-Bit Schottky Barrier Diode Bus-Termination Arrays

SN74S1053

20

16-Bit Schottky Barrier Diode Bus-Termination Arrays

SDLS168
SDLS015
SDLS018
SDLS016

SDLS017

4157

DEVICE SELECTION GUIDE

SSTL
Stub Series-Terminated Logic
The SSTL interface is the computer industrys leading choice for
next-generation technology in high-speed memory subsystems, adopted by
JESD8-8 and JESD8-9 standards developed through the Joint Electronic
Device Engineering Committee (JEDEC), and endorsed by major
memory-module, workstation, and PC manufacturers.
The SSTL family is optimized for 3.3-V VCC operation. The SN74SSTL16837
is used for driving 3.3-V address signals from a low-voltage memory controller
to SDRAMs using SSTL technology. In designs operating at greater than
75 MHz, the SN74SSTL16837 provides fast address signaling with minimal
propagation delay. The SN74SSTL16837 converts LVTTL signals from the
memory controller to SSTL signals that are used by the SDRAM input pins.
Initially, targeted applications using the device include workstations and
servers, with eventual migration to PCs as high-speed memory subsystem
technology evolves in desktop systems. For low-voltage solutions. please see
the SSTV and SSTVF product lines.

HSTL
High-Speed Transceiver Logic
One of TIs low-voltage interface solutions is HSTL. HSTL devices accept a
minimal differential input swing from 0.65 V to 0.85 V (nominally), with the
outputs driving LVTTL levels. HSTL is ideally suited for driving an address bus
to two banks of memory. The HSTL input levels follow the JESD8-6 standard.
See www.ti.com/sc/logic for the most current data sheets.

4159

DEVICE SELECTION GUIDE

SSTL/HSTL

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

TSSOP

LITERATURE
REFERENCE

SSTL
SN74SSTL16837A

64

20-Bit SSTL_3 Interface Universal Bus Drivers with 3-State Outputs

SCBS675

SN74SSTL16847

64

20-Bit SSTL_3 Interface Buffers with 3-State Outputs

SCBS709

SN74SSTL16857

48

14-Bit SSTL_2 Registered Buffers

SCAS625

SN74HSTL16918

48

9-Bit to 18-Bit HSTL-to-LVTTL Memory Address Latches

SCES096

SN74HSTL16919

48

9-Bit to 18-Bit HSTL-to-LVTTL Memory Address Latches with Pullup Resistors

SCES348

SN74HSTL162822

64

14-Bit to 28-Bit HSTL-to-LVTTL Memory Address Latches

SCES091

HSTL

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

4160

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

SSTU
Stub Series-Terminated
Ultra-Low-Voltage Logic
TI introduces the SN74SSTU32864, which prepares the industry for
double-data-rate II (DDR-II) registered dual inline memory modules
(RDIMMs). While competitors still are focusing on back filling their DDR-I
portfolios, TI again takes the leadership role by being ahead of the market with
this register, which is targeted at next-generation DDR-II systems. The
SN74SSTU32864 is the worlds first DDR-II register that employs output
edge-control circuitry similar to the technology used in the successful SSTVF
product line. The SN74SSTU32864 has proven simultaneous switching
performance in initial prototype DDR-II RDIMMs, enabling high speeds
without sacrificing signal integrity. This device is configurable as a 1:1 or 1:2
registered buffer, which makes it flexible enough to be used in a multitude of
RDIMM configurations.
TI also offers the SN74SSTU32866 for higher-reliability systems. This register
has the capability of adding parity to a DDR-II RDIMM. Additional parity I/Os
are introduced for the parity calculation. When two devices are used on a
DIMM, the register has the capability of cascading the parity path of the two
registers while maintaining the same parity output timing as the single device
parity configuration.
SSTU family features:

Operation at 1.7 V to 1.9 V for PC2-3200 and PC2-4300

Output edge-control circuitry minimizes switching noise in an

unterminated line.

Parity option available

Pinout optimizes DDR-II DIMM PCB layout.

Chip-select inputs gate the data outputs from changing state and
minimize system power consumption.

4161

TI provides the complete solution when the CDCU877 PLL clock driver is
used. Please see the following table for the device that best fits your
application:

4162

DIMM
CONFIGURATION

PC2-3200/PC2-4300
DDR2-400/DDR2-533
LOW PROFILE (1U)
NON PARITY

PC2-3200/PC2-4300
DDR2-400/DDR2-533
LOW PROFILE (1U)
WITH PARITY CHECK

Planar
1 rank of 8 SDRAMs
9 loads

SSTU32864 25-bit 1:1 configuration

96-ball LFBGA
1 per DIMM

SSTU32866 25-bit 1:1 configuration

96-ball LFBGA
1 per DIMM/uncascaded parity

Planar double-sided
2 rank of 8 SDRAMs
1 rank 4 SDRAMs
18 loads

SSTU32864 14-bit 1:2 configuration

96-ball LFBGA
2 per DIMM

SSTU32866 14-bit 1:2 configuration

96-ball LFBGA
2 per DIMM/uncascaded parity

DEVICE SELECTION GUIDE

SSTU

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

LFBGA

LITERATURE
REFERENCE

SN74SSTU32864

96

25-Bit Configurable Registered Buffers with SSTL_18 Inputs and Outputs

SCES434

SN74SSTU32866

96

25-Bit Configurable Registered Buffers with Address-Parity Test

Call

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins
TSSOP (thin shrink small-outline package)
PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

4163

DEVICE SELECTION GUIDE

SSTV/SSTVF
Stub Series-Terminated
Low-Voltage Logic
The TI SSTV family is optimized for 2.5-V VCC operation. The devices offered
in this family are ideal solutions for address/control bus buffering in
high-performance double-data-rate (DDR) memory systems. TI offers a
variety of solutions for DDR registered dual inline memory module (RDIMM)
applications. The SN74SSTV16857 is a 14-bit 1:1 register with low-power
mode support designed for stacked DIMM applications. Two registers per
DIMM are required when using these devices.
The SN74SSTV32852 combines the functionality of two SN74SSTV16859
devices to provide a cost-effective, single-chip solution for stacked
applications. The SSTV family of devices is ideal for use in DDR200/266
applications. The SSTV family features SSTL_2 class-II drivers, which are
ideal for terminated buses often used in motherboard applications.
To meet the needs for DDR333/400 registered DIMMs, TI was the first to
release their SSTVF product line. As a faster version of the SSTV family,
SSTVF devices feature SSTL_2 class-I outputs specifically designed for the
unterminated DIMM load. This enables an increase in performance without
sacrificing signal integrity. The result is a system with increased timing
margins and better reliability. The SSTVF devices are available in all the
popular SSTV functions used for planar and stacked DIMMs. All SSTVF
devices are backward compatible with SSTV devices in registered DIMM
applications. The CDCV857B differential clock complete the TI solution for
DDR RDIMMs.

4165

Please see the following table for the device that best fits your application:
DIMM
CONFIGURATION

PC1600/PC2100
DDR200/266
1.7 DIMM

PC1600/PC2100
DDR200/266
1U DIMM

PC2700
DDR333
1U DIMM

PC3200
DDR400
1U DIMM

Planar
1 rank of 8 SDRAMs
9 loads

SSTV16857 14-bit 1:1

48-pin TSSOP
2 per DIMM

SSTV16857 14-bit 1:1

48-pin TSSOP
2 per DIMM

SSTVF16857 14-bit 1:1

48-pin TSSOP
2 per DIMM

SSTVF16859 13-bit 1:2

56-pin QFN
2 per DIMM

Planar double-sided
2 rank of 8 SDRAMs
18 loads

SSTV16857 14-bit 1:1

48-pin TSSOP
2 per DIMM

SSTV16857 14-bit 1:1

48-pin TSSOP
2 per DIMM

SSTVF16857 14-bit 1:1

48-pin TSSOP
2 per DIMM

SSTVF16859 13-bit 1:2

56-pin QFN
2 per DIMM

SSTV32852 24-bit 1:2

114-ball LFBGA
1 per DIMM

SSTVF32852 24-bit 1:2

114-ball LFBGA
1 per DIMM

SSTV16859 13-bit 1:2

56-pin QFN
2 per DIMM

SSTVF16859 13-bit 1:2

64-pin TSSOP/56-pin QFN
2 per DIMM

Stacked double-sided
2 rank of 4 SDRAMs
36 loads

SSTV16859 13-bit 1:2

64 pin TSSOP
64-pin
2 per DIMM

Migrate to SSTVF
for better signal integrity
and timing margins

4166

No solution

DEVICE SELECTION GUIDE

SSTV/SSTVF

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

LFBGA

QFN

TSSOP

TVSOP

LITERATURE
REFERENCE

SCES344

SSTV
SN74SSTV16857

48

14-Bit Registered Buffers with SSTL_2 Inputs and Outputs

(56)

(64)

SN74SSTV16859

56/64

13-Bit to 26-Bit Registered Buffers with SSTL_2 Inputs and Outputs

SCES297

SN74SSTV32852

114

24-Bit to 48-Bit Registered Buffers with SSTL_2 Inputs and Outputs

SCES361

SN74SSTV32867

96

26-Bit Registered Buffers with SSTL_2 Inputs and LVCMOS Outputs

SCES362

SN74SSTV32877

96

26-Bit Registered Buffers with SSTL_2 Inputs and Outputs

SCES378

48

14-Bit Registered Buffers with SSTL_2 Inputs and Outputs

SSTVF
SN74SSTVF16857

SN74SSTVF16859

56/64

13-Bit to 26-Bit Registered Buffers with SSTL_2 Inputs and Outputs

SN74SSTVF32852

114

24-Bit to 48-Bit Registered Buffers with SSTL_2 Inputs and Outputs

(56)

(64)

SCES411
SCES429
SCES426

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins
TSSOP (thin shrink small-outline package)
PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

4167

DEVICE SELECTION GUIDE

TTL
Transistor-Transistor Logic
With a wide array of functions, TIs TTL family continues to offer replacement
alternatives for mature systems. This classic line of devices was at the cutting
edge of performance when introduced, and it continues to deliver excellent
value for many of todays designs. As the world leader in logic products, TI is
committed to being the last major supplier at every price-performance node.
See www.ti.com/sc/logic for the most current data sheets.

4169

DEVICE SELECTION GUIDE

TTL

DEVICE

NO.
PINS

AVAILABILITY

DESCRIPTION

MIL

PDIP

SOIC

LITERATURE
REFERENCE

SDLS025

SN7400

14

Quad 2-Input NAND Gates

SN7402

14

Quad 2-Input NOR Gates

SN7404

14

Hex Inverters

SN7405

14

Hex Inverters with Open-Collector Outputs

SN7406

14

Hex Inverter Buffers/Drivers with Open-Collector Outputs

SDLS031

SN7407

14

Hex Buffers/Drivers with Open-Collector Outputs

SDLS032

SN7410

14

Triple 3-Input NAND Gates

SN7414

14

Hex Schmitt-Trigger Inverters

SDLS049

SN7416

14

Hex Inverter Buffer/Drivers with Open-Collector Outputs

SDLS031

SN7417

14

Hex Buffers/Drivers with Open-Collector Outputs

SDLS032

SN7425

14

Dual 4-Input NOR Gates with Strobe

SDLS082

SN7432

14

Quad 2-Input OR Gates

SDLS100

SN7437

14

Quad 2-Input NAND Gates

SN7438

14

Quad 2-Input NAND Gates

SN7445

16

BCD-to-Decimal Decoders/Drivers

SN7447A

16

BCD to 7-Segment Decoders/Drivers

SDLS111

SN7497

16

Synchronous 6-Bit Binary Rate Multipliers

SDLS130

SN74107

14

Dual Negative-Edge-Triggered J-K Flip-Flops with Reset

SN74121

14

Monostable Multivibrators with Schmitt-Trigger Inputs

SN74123

16

Dual Retriggerable Monostable Multivibrators with Reset

SN74128

14

Hex OR-Gate Line Drivers

SN74132

14

Quad 2-Input NAND Gates with Schmitt-Trigger Inputs

SDLS047

SN74145

16

BCD-to-Decimal Decoders/Drivers

SDLS051

SN74150

24

1-of-16 Data Selectors/Multiplexers

SDLS054

SN74154

24

4-to-16 Line Decoders/Demultiplexers

SDLS056

SN74159

24

4-to-16 Line Decoders/Demultiplexers with Open-Collector Outputs

SDLS059

SN74175

16

Quad D-Type Flip-Flops with Clear

SDLS068

SN74193

16

Presettable Synchronous 4-Bit Up/Down Binary Counters

SDLS074

SN74221

16

Dual Monostable Multivibrators with Schmitt-Trigger Inputs

SN74276

20

Quad J-K Flip-Flops

SN74367A

16

Hex Buffers/Line Drivers with 3-State Outputs

SDLS027

SDLS029
SDLS030

SDLS035

SDLS103

SDLS105
SDLS110

SDLS036

SDLS042
SDLS043

SDLS045

SDLS213

SDLS091
SDLS102

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

4170

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

TTL

DEVICE

NO.
PINS

SN74368A

16

SN74393

14

DESCRIPTION

AVAILABILITY
SOIC

LITERATURE
REFERENCE

MIL

PDIP

Hex Inverting Buffers/Line Drivers with 3-State Outputs

SDLS102

Dual 4-Bit Binary Counters

SDLS107

4171

DEVICE SELECTION GUIDE

TVC
Translation Voltage Clamp Logic
TVC products are designed to protect components sensitive to high-state
voltage-level overshoots.
New designs for PCs and other bus-oriented products require faster and
lower-power devices built with advanced submicron semiconductor
processes. Often, the I/Os of these devices are intolerant of high-state voltage
levels on the communication buses used. The need for I/O protection became
apparent for devices communicating with legacy buses, and the TVC family
fills this need.
TVC devices offer an array of n-type metal-oxide semiconductor (NMOS)
field-effect transistors (FETs), with the gates cascaded to a common gate
input. TVC devices can be used as voltage limiters by connecting one of the
FETs as a voltage reference transistor and the remainder as pass transistors.
The low-voltage side of each pass transistor is limited to the voltage set by the
reference transistor. All of the FETs in the array have essentially the same
characteristics, so any one can be used as the reference transistor. Because
the fabrication of the FETs is symmetrical, either port connection for each bit
can be used as the low-voltage side, and the I/O signals are bidirectional
through each FET.
Key features:

No logic supply voltage required (no internal control logic)

Used as voltage translators or voltage clamps
7- on-state resistance with gate at 3.3 V
Any FET can be used as the reference transistor.
Direct interface with GTL+ levels
Accept any I/O voltage from 0 to 5.5 V
Flow-through pinout for ease of printed circuit board layout
Minimum fabrication process transistor characteristic variations

See www.ti.com/sc/logic for the most current data sheets.

4173

DEVICE SELECTION GUIDE

TVC

DEVICE
SN74TVC3010

NO.
PINS

FUNCTION

24

10-Bit Translation Voltage Clamps

SN74TVC3306

Dual Voltage Clamps

SN74TVC16222A

48

22-Bit Translation Voltage Clamps

AVAILABILITY
QSOP

SOIC

SOT

SSOP

TSSOP

TVSOP

VSSOP

SCDS088

LITERATURE
REFERENCE

SCDS112
SCDS087

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

4174

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

DEVICE SELECTION GUIDE

VME
VERSAmodule Eurocard
Bus Technology
TI introduces the SN74VMEH22501, which is specifically designed for
VMEbus technology. The device is an 8-bit universal bus transceiver with two
bus transceivers. The device provides incident-wave switching on the
standard 21-slot VMEbus backplane, thus, producing data signaling rates of
up to 40 Mbps an 8 improvement over the VME64 standard.
SN74VMEH22501 features:

Ability to transmit data on the VMEbus up to two-edge source

synchronous transfer (2eSST) protocol speeds an 8 improvement over
the VME64 standard

Incident-wave switching allows higher performance on the VMEbus,

compared to conventional logic that depends on reflective wave
switching.

Backward compatibility to legacy VMEbus backplane

Target applications:

Industrial controls
Telecommunications
Instrumentation systems

See www.ti.com/sc/logic for the most current data sheets.

4175

DEVICE SELECTION GUIDE

VME

DEVICE

NO.
PINS

SN74VMEH22501

48/56

AVAILABILITY

FUNCTION
8-Bit Universal Bus Transceivers and Two 1-Bit Bus Transceivers with 3-State Outputs

TSSOP

TVSOP

VFBGA

LITERATURE
REFERENCE

SCES357

commercial package description and availability

DSBGA (die-size ball grid array)

PDIP (plastic dual-in-line package)

YEA, YZA = 5/6/8 pins

YEP, YZP = 5/6/8 pins

P = 8 pins
N = 14/16/20/24 pins
NT = 24/28 pins

LFBGA (low-profile fine-pitch ball grid array)

PLCC (plastic leaded chip carrier)

GGM
= 80/100 pins
GKE, ZKE = 96 pins
GKF, ZKF = 114 pins

FN = 20/28/44/68/84 pins

VFBGA (very-thin-profile fine-pitch ball grid array)

D = 8/14/16 pins
DW = 16/18/20/24/28 pins

GQN, ZQN = 20 pins

GQL, ZQL = 56 pins (also includes 48-pin functions)

schedule
= Now = Planned
JEDEC reference for wafer chip scale package (WCSP)

4176

QFP (quad flatpack)

RC = 52 pins (FB only)
PH = 80 pins (FIFOs only)
PQ = 100/132 pins (FIFOs only)
LQFP (low-profile quad flatpack)
PZA = 80 pins

SOIC (small-outline integrated circuit)

SOT (small-outline transistor)
PK
DBV
DCY
DCK

= 3 pins
= 3/4/5 pins
= 4 pins
= 5/6 pins

TQFP (plastic thin quad flatpack)

PAH
PAG
PM
PN
PCA, PZ
PCB

= 52 pins
= 64 pins (FB only)
= 64 pins
= 80 pins
= 100 pins (FB only)
= 120 pins (FIFOs only)

QFN (quad flatpack no lead)

SOP (small-outline package)

RGY = 14/16/20 pins

RGQ = 56 pins

PS = 8 pins
NS = 14/16/20/24 pins

QSOP (quarter-size small-outline package)

DBQ = 16/20/24 pins
SSOP (shrink small-outline package)
DCT = 8 pins
DB = 14/16/20/24/28/30/38 pins
DBQ = 16/20/24 pins
DL = 28/48/56 pins

TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins
DGG = 48/56/64 pins
TVSOP (thin very small-outline package)
DGV = 14/16/20/24/48/56 pins
DBB = 80/100 pins
VSSOP (very thin shrink small-outline package)
DCU = 8 pins

LOGIC OVERVIEW

PRODUCT INDEX

FUNCTIONAL CROSSREFERENCE

DEVICE SELECTION GUIDE

PACKAGING AND MARKING INFORMATION

LOGIC PURCHASING TOOL/ALTERNATE SOURCES

A1

PACKAGING AND MARKING INFORMATION

A2

APPENDIX A
PACKAGING AND MARKING INFORMATION

CONTENTS
Device Names and Package Designators for TI Logic Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5
Device Names and Package Designators
for Logic Products Formerly Offered by Cypress Semiconductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A6
Device Names and Package Designators
for Logic Products Formerly Offered by Harris Semiconductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A7
Logic Marking Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
Moisture Sensitivity by Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A16
Packaging Cross-Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A18

A3

DEVICE NAMES AND PACKAGE DESIGNATORS

FOR TI LOGIC PRODUCTS
Example:

LVC

16

244

DGG

10

Bit Width

SN Standard Prefix
SNJ Conforms to MIL-PRF-38535 (QML)

Examples:

Temperature Range

Examples:

74

Standard Prefix

Examples:

SN

54 Military
74 Commercial

Family

Examples:

Blank = Transistor-Transistor Logic (TTL)

ABT Advanced BiCMOS Technology
ABTE/ETL Advanced BiCMOS Technology/
Enhanced Transceiver Logic
AC/ACT Advanced CMOS Logic
AHC/AHCT Advanced High-Speed CMOS Logic
ALB Advanced Low-Voltage BiCMOS
ALS Advanced Low-Power Schottky Logic
ALVC Advanced Low-Voltage CMOS Technology
ALVT Advanced Low-Voltage BiCMOS Technology
AS Advanced Schottky Logic
AUC Advanced Ultra-Low-Voltage CMOS Logic
AUP Advanced Ultra-Low-Power CMOS Logic
AVC Advanced Very Low-Voltage CMOS Logic
BCT BiCMOS Bus-Interface Technology
CB3Q 2.5-V/3.3-V Low-Voltage High-Bandwidth
Bus-Switch Crossbar Technology Logic
CB3T 2.5-V/3.3-V Low-Voltage Translator
Bus-Switch Crossbar Technology Logic
CBT Crossbar Technology
CBT-C 5-V Bus-Switch Crossbar Technology Logic
With 2-V Undershoot Protection
CBTLV Low-Voltage Crossbar Technology Logic
CD4000 CMOS B-Series Integrated Circuits
F F Logic
FB Backplane Transceiver Logic/Futurebus+
FCT Fast CMOS TTL Logic
GTL Gunning Transceiver Logic
GTLP Gunning Transceiver Logic Plus
HC/HCT High-Speed CMOS Logic
HSTL High-Speed Transceiver Logic
LS Low-Power Schottky Logic
LV Low-Voltage CMOS Technology
LVC Low-Voltage CMOS Technology
LVT Low-Voltage BiCMOS Technology
PCA/PCF I2C Inter-Integrated Circuit Applications
S Schottky Logic
SSTL Stub Series-Terminated Logic
SSTU Stub Series-Terminated
Ultra-Low-Voltage Logic
SSTV/SSTVF Stub Series-Terminated
Low-Voltage Logic
TVC Translation Voltage Clamp Logic
VME VERSAmodule Eurocard Bus Technology

Options

Examples:

244 Noninverting Buffer/Driver

374 D-Type Flip-Flop
573 D-Type Transparent Latch
640 Inverting Transceiver

Device Revision

Examples:

Blank = No Options
2 Series Damping Resistor on One Output Port
4 Level Shifter
25 25- Line Driver

Function

Examples:

Blank = Gates, MSI, and Octals

1G Single Gate
2G Dual Gate
3G Triple Gate
8 Octal IEEE 1149.1 (JTAG)
16 Widebus (16, 18, and 20 bit)
18 Widebus IEEE 1149.1 (JTAG)
32 Widebus+ (32 and 36 bit)

Blank = No Revision
Letter Designator AZ

Packages

Commercial: D, DW Small-Outline Integrated Circuit (SOIC)

DB, DBQ, DCT, DL Shrink Small-Outline Package
(SSOP)
DBB, DGV Thin Very Small-Outline Package (TVSOP)
DBQ Quarter-Size Small-Outline Package (QSOP)
DBV, DCK, DCY, PK Small-Outline Transistor (SOT)
DBV, DCK, NS, PS Small-Outline Package (SOP)
DCU Very Thin Shrink Small-Outline Package (VSSOP)
DGG, PW Thin Shrink Small-Outline Package (TSSOP)
FN Plastic Leaded Chip Carrier (PLCC)
GGM, GKE, GKF, ZKE, ZKF MicroStar BGA
Low-Profile Fine-Pitch Ball Grid Array (LFBGA)
GQL, GQN, ZQL, ZQN MicroStar Jr.
Very-Thin-Profile Fine-Pitch Ball Grid Array (VFBGA)
N, NT, P Plastic Dual-In-Line Package (PDIP)
PAG, PAH, PCA, PCB, PM, PN, PZ Thin Quad
Flatpack (TQFP)
PH, PQ, RC Quad Flatpack (QFP)
PZA Low-Profile Quad Flatpack (LQFP)
RGQ, RGY Quad Flatpack No Lead (QFN)
YEA, YEP, YZA, YZP NanoStar and NanoFree
Die-Size Ball Grid Array (DSBGA)
Military:
FK Leadless Ceramic Chip Carrier (LCCC)
GB Ceramic Pin Grid Array (CPGA)
HFP, HS, HT, HV Ceramic Quad Flatpack (CQFP)
J, JT Ceramic Dual-In-Line Package (CDIP)
W, WA, WD Ceramic Flatpack (CFP)

10 Tape and Reel

4

Special Features

Examples:

Blank = No Special Features

C Configurable VCC (LVCC)
D Level-Shifting Diode (CBTD)
H Bus Hold (ALVCH)
K Undershoot-Protection Circuitry (CBTK)
R Damping Resistor on Both Output Ports (LVCR)
S Schottky Clamping Diode (CBTS)
Z Power-Up 3-State (LVCZ)

Devices in the DB and PW package types include the R designation

for reeled product. Existing product inventory designated LE may
remain, but all products are being converted to the R designation.
Examples:

Old Nomenclature SN74LVTxxxDBLE

New Nomenclature SN74LVTxxxADBR
R Standard (valid for all surface-mount packages)
T Small Quantity Reels (available in Little Logic only)

There is no functional difference between LE and R designated

products, with respect to the carrier tape, cover tape, or reels used.

DSBGA is the JEDEC reference for wafer chip scale package (WCSP).
A5

DEVICE NAMES AND PACKAGE DESIGNATORS

FOR LOGIC PRODUCTS FORMERLY OFFERED BY CYPRESS SEMICONDUCTOR
CYFCT Nomenclature
Example:

CY

74

FCT

162

245

PV

10

11

Prefix Designation
for Acquired Cypress FCT Logic

Speed Grade

Examples:

May be blank to accommodate 18-character limitation

Temperature Range

Examples:

54 Military (55C to 125C)

74 Commercial/Industrial (40C to 85C)
29 Commercial/Industrial or Military (see data sheet)

Family

Example:

Blank = CMOS Outputs

T TTL Outputs

FCT FAST CMOS TTL Logic

16 or Greater Bit Width

With Balanced Drive or 3.3V Operation

Examples:

TTL or CMOS Outputs

Examples:

9
4

Blank = No Speed Grade

A
B
C
D
E

Packages

Examples:

Blank
16x 16 or Greater Bit Width
With Balanced Drive or 3.3-V Operation
162 Balanced Drive (series output resistors)
163 3.3 V

P Plastic Dual-In-Line Package (PDIP) (N)

PA Thin Shrink Small-Outline Package (TSSOP)
(DGG/G)
PV Shrink Small-Outline Package (SSOP) (DL)
Q Quarter-Size Outline Package (QSOP) (DBQ)
SO Small-Outline Integrated Circuit (SOIC) (DL)

10 Processing
5

Bus Hold

Examples:

Blank = No Bus Hold

H Bus Hold (present only when preceded by 16x
see item 4)

Example:

11 Tape and Reel

Example:

Type Designation

Up to Five Digits
Examples: 245
1652
16245

FAST is a trademark of Fairchild Semiconductor.

A6

C Commercial Processing

T Tape-and-Reel Packing

DEVICE NAMES AND PACKAGE DESIGNATORS

FOR LOGIC PRODUCTS FORMERLY OFFERED BY HARRIS SEMICONDUCTOR
CD4000 Nomenclature
Example

CD

4011

1
1

XX

Prefix Designation
for Acquired Harris Digital Logic

Packages

Examples:

Type Designation

Up to Five Digits

Supply Voltage

Examples:

A 12 V Maximum
B 18 V Maximum
UB 18 V Maximum, Unbuffered

D Ceramic Side-Brazed Dual-In-Line Package

(DIP)
E Plastic DIP
F Ceramic DIP
K Ceramic Flatpack
M Plastic Surface-Mount
Small-Outline Integrated Circuit (SOIC)
SM Plastic Shrink SOIC (SSOP)
M96 Reeled Plastic Surface-Mount SOIC
SM96 Reeled Plastic Shrink SOIC (SSOP)

HighReliability Screening

Military Products Only

Examples: 3 Noncompliant With MIL-STD-883, Class B
3A Fully Compliant With MIL-STD-883, Class B

CDAC/CDACT Advanced CMOS and CDHC/CDHCT/CDHCU High-Speed CMOS Nomenclature

Example

74

ACT
3

245

Temperature Range

AC Advanced CMOS Logic, CMOS Input Levels

ACT Advanced CMOS Logic, TTL Input Levels
HC High-Speed CMOS Logic, CMOS Input Levels
HCT High-Speed CMOS Logic, TTL Input Levels
HCU High-Speed CMOS Logic, CMOS Input Levels,
Unbuffered

Type Designation

Up to Five Digits

Packages

Examples:

Family

Examples:

XX

5
4

54 Military (55C to 125C)

74 Commercial (0C to 70C)

Prefix Designation
for Acquired Harris Digital Logic

Examples:

CD

E Plastic Dual-In-Line Package (DIP)

EN Plastic Slim-Line 24-Lead DIP
F Ceramic DIP
M Plastic Surface-Mount
Small-Outline Integrated Circuit (SOIC)
SM Plastic Shrink SOIC (SSOP)
M96 Reeled Plastic Surface-Mount SOIC
SM96 Reeled Plastic Shrink SOIC (SSOP)

HighReliability Screening

Military Products Only

Example:
3A Fully Compliant With MIL-STD-883

A7

DEVICE NAMES AND PACKAGE DESIGNATORS

FOR LOGIC PRODUCTS FORMERLY OFFERED BY HARRIS SEMICONDUCTOR
CDFCT Nomenclature
Example

54 Military (55C to 125C)

74 Commercial (0C to 70C)

Family
FCT Bus Interface, TTL Input Levels

Type Designation

Up to Five Digits

FAST is a trademark of Fairchild Semiconductor.

A8

FCT

Temperature Range

Example:

74

Prefix Designation
for Acquired Harris Digital Logic

Examples:

CD

245

Speed Grade

Example:

Blank or A Standard Equivalent to FAST

Packages

Examples:

E Plastic Dual-In-Line Package (DIP)

EN Plastic Slim-Line 24-Lead DIP
F Ceramic DIP
M Plastic Surface-Mount
Small-Outline Integrated Circuit (SOIC)
SM Plastic Shrink SOIC (SSOP)
M96 Reeled Plastic Surface-Mount SOIC
SM96 Reeled Plastic Shrink SOIC (SSOP)

LOGIC MARKING GUIDELINES

In the past, logic products had the complete device name on the package. It has become necessary to reduce the
character count, as package types have become smaller and logic names longer. Information in the following tables
is intended to help interpret TIs logic symbolization.
Table A-1 defines a name rule (A, B, or C) based on the type of package for a specific device. Each name rule differs
in the number of characters that are symbolized on the package. Name rule A uses the complete, or fully qualified,
device name. Name rules B and C include fewer characters, respectively. Table A-2 is a listing of the various logic
products by name rule.
Example: Assume a 48-pin TVSOP with the symbolization VH***. Locate the 48-pin TVSOP (DGV) package in
Table A-1, and find the name rule used (C). Proceed to Table A-2, and find VH*** in the Name Rule C column. The
most complete device number, SN74ALVCH16***, is located in the Name Rule A column.
See the following information and Tables A-3 and A-4 for Little Logic (PicoGate Logic, Microgate Logic, and
NanoStar) packages.

A9

LOGIC MARKING GUIDELINES

Table A-1.
Name-Rule Decision Tree

PACKAGE
LFBGA

NAME
RULE

PACKAGE
DESIGNATOR

96

GKE

114

GKF

14, 16, 20

24, 28

NP, NT

28

FN

44

FN

68

FN

QSOP

16, 20, 24

DBQ

SOIC

14, 16

16, 20, 24, 28

DW

14, 16, 20

RGY

56

RGQ

52

RC

PDIP

PLCC

QFN

QFP

SOP

SSOP

TSSOP
TVSOP

TQFP

VFBGA

A10

NO. PINS

80

PH

100, 132

PQ

PS

14, 16, 20, 24

NS

14, 16, 20, 24, 28, 30, 38

DB

16, 20, 24

DBQ

28, 48, 56

DL

8, 14, 16, 20, 24, 28

PW

48, 56, 64

DGG

14, 16, 20, 24, 48, 56

DGV

80

DBB

52

PAH

64

PAG, PM

80

PN

100

PZ, PCA

120

PCB

56

GQL

LOGIC MARKING GUIDELINES

Table A-2.
Typical Logic Package Symbolization Guidelines

NAME RULE A

NAME RULE B

NAME RULE C

NAME RULE A

NAME RULE B

NAME RULE C

74AC***

AC***

AC***

SN74AHC16***

AHC16***

HE***

74AC11***

AC11***

AE***

SN74AHCH16***

AHCH16***

HH***

74ACT***

ACT***

AD***

SN74AHCT***

AHCT***

HB***

74ACT1***

ACT1***

AU***

SN74AHCT16***

AHCT16***

HF***

74ACT11***

ACT11***

AT***

SN74AHCTH16***

AHCTH16***

HG***

CD4***

CD4***

CM***

SN74AHCU***

AHCU***

HD***

CD4***

CD4***M

CM***

SN74ALB16***

ALB16***

AV***

CD74AC***

AC***M

HL***

SN74ALS***

ALS***

G***

CD74AC40

AC40***M

HY***

SN74ALVC***

ALVC***

VA***

CD74ACT***

ACT***M

HM***

SN74ALVC16***

ALVC16***

VC***

CD74ACT40***

ACT40***M

HZ***

SN74ALVC162***

ALVC162***

VC2***

CD74FCT***

74FCT***M

FC***

SN74ALVCH***

ALVCH***

VB***

CD74FCT***

74FCT***M

FCT***SM

SN74ALVCH16***

ALVCH16***

VH***

CD74HC***

HC***M

HJ***

SN74ALVCH162***

ALVCH162***

VH2***

CD74HC40***

HC40***M

HP***

SN74ALVCH32***

ALVCH32***

ACH***

CD74HCT***

HCT***M

HK***

SN74ALVCHG16***

ALVCHG16***

VG***

CD74HCT40***

HCT40***M

HR***

SN74ALVCHG162***

ALVCHG162***

VG2***

CY29FCT***

29FCT***

FY***-*

SN74ALVCHR16***

ALVCHR16***

VR***

CY74FCT***

FCT***

FT***-*

SN74ALVCHR162***

ALVCHR162***

VR2***

CY74FCT16***

FCT16***

FD***

SN74ALVCHS162***

ALVCHS162***

VS2***

CY74FCT2***

FCT2***

FR***-*

SN74ALVTH16***

ALVTH16***

VT***

PCF8***

PCF8***

PF***

SN74ALVTH162***

ALVTH162***

VT2***

SN64BCT***

DCT***

DT***

SN74ALVTH32***

ALVTH32***

VL***

SN64BCT2***

DCT2***

DA***

SN74AS***

AS***

AS***

SN64BCT25***

DCT25***

DC***

SN74AS***

74AS***

AS***

SN64BCT29***

DCT29***

DD***

SN74AVC***

AVC***

AVC***

SN74ABT***

ABT***

AB***

SN74AVC16***

AVC16***

CVA***

SN74ABT***-S

ABT***-S

AB***-S

SN74AVC32***

AVC32***

ACV***

SN74ABT16***

ABT16***

AH***

SN74AVCC16***

AVCC16***

AW***

SN74ABT162***

ABT162***

AH2***

SN74AVCH16***

AVCH16***

CVH***

SN74ABT18***

ABT18***

AJ***

SN74BCT***

BCT***

BT***

SN74ABT2***

ABT2***

AA***

SN74BCT11***

BCT11***

BB***

SN74ABT5***

ABT5***

AF***

SN74BCT2***

BCT2***

BA***

SN74ABT8***

ABT8***

AG***

SN74BCT25***

BCT25***

BC***

SN74ABTE16***

ABTE16***

AN***

SN74BCT29***

BCT29***

BD***

SN74ABTH***

ABTH***

AK***

SN74BCT8***

BCT8***

BG***

SN74ABTH16***

ABTH16***

AM***

SN74CBT***

CBT***

CT***

SN74ABTH162***

ABTH162***

AM2***

SN74CBT16***

CBT16***

CY***

SN74ABTH18***

ABTH18***

AL***

SN74CBT3***

CBT3***

CU***

SN74ABTR2***

ABTR2***

AR***

SN74CBT6***

CBT6***

CT6***

SN74AHC***

AHC***

HA***

SN74CBTD***

CBTD***

CD***

For SOIC D and DW packages only

For DB package only
Speedcode
For NS package only

A11

LOGIC MARKING GUIDELINES

Table A-2.
Typical Logic Package Symbolization Guidelines (continued)

NAME RULE A

NAME RULE B

NAME RULE C

NAME RULE A

NAME RULE B

NAME RULE C

SN74CBTD16***

CBTD16***

CYD***

SN74LVCC3***

LVCC3***

LH***

SN74CBTD3***

CBTD3***

CC***

SN74LVCC4***

LVCC4***

LG***

SN74CBTH16***

CBTH16***

CYH***

SN74LVCH***

LVCH***

LCH***

SN74CBTK***

CBTK***

BK***

SN74LVCH16***

LVCH16***

LDH***

SN74CBTK16***

CBTK16***

CP***

SN74LVCH162***

LVCH162***

LN2***

SN74CBTK32***

CBTK32***

KT***

SN74LVCH32***

LVCH32***

CH***

SN74CBTLV16***

CBTLV16***

CN***

SN74LVCHR162***

LVCHR162***

LR2***

SN74CBTLV3***

CBTLV3***

CL***

SN74LVCR2***

LVCR2***

LER***

SN74CBTR16***

CBTR16***

CZ***

SN74LVCU***

LVCU***

LCU***

SN74CBTS***

CBTS***

CS***

SN74LVCZ***

LVCZ***

CV***

SN74CBTS16***

CBTS16***

CYS***

SN74LVCZ16***

LVCZ16***

CW***

SN74CBTS3***

CBTS3***

CR***

SN74LVT***

LVT***

LX***

SN74F***

F***

F***

SN74LVT***-S

LVT***-S

LX***-S

SN74F***

74F***

F***

SN74LVT162***

LVT162***

LZ***

SN74GTLP***

GTLP***

GT***

SN74LVT18***

LVT18***

T18***

SN74GTLP1***

GTLP1***

GP***

SN74LVT2***

LVT2***

LY***

SN74GTLPH***

GTLPH***

GH***

SN74LVT32***

LVT32***

VJ***

SN74GTLPH16***

GTLPH16***

GL***

SN74LVTH***

LVTH***

LXH***

SN74GTLPH32***

GTLPH32***

GM***

SN74LVTH16***

LVTH16***

LL***

SN74HC***

HC***

HC***

SN74LVTH162***

LVTH162***

LL2***

SN74HCT***

HCT***

HT***

SN74LVTH2***

LVTH2***

LK***

SN74HCU***

HCU***

HU***

SN74LVTH32***

LVTH32***

HV***

SN74LS***

LS***

LS***

SN74LVTR***

LVTR***

LXR***

SN74LS***

74LS***

LS***

SN74LVTT***

LVTT***

LXT***

SN74LV***

LV***

LV***

SN74LVTZ***

LVTZ***

LXZ***

SN74LV***

74LV***

LV***

SN74LVU***

LVU***

LU***

SN74LVC***

LVC***

LC***

SN74S***

S***

S***

SN74LVC16***

LVC16***

LD***

SN74S***

74S***

S***

SN74LVC2***

LVC2***

LE***

SN74SSTV16***

SSTV16***

SS***

SN74LVC32***

LVC32***

NC***

SN74TVC16***

TVC16***

TW***

SN74LVC4***

LVC4***

LJ***

SN74TVC3***

TVC3***

TT***

SN74LVC8***

LVC8***

LC8***

For SOIC D and DW packages only

For DB package only
Speedcode
For NS package only

A12

LOGIC MARKING GUIDELINES

Little Logic Packages

TI Little Logic devices are available in several small pin-count package options. Leadframe devices are offered in
5-pin SOT-23 (DBV), 5-pin SC-70 (DCK), 6-pin SOT-23 (DBV), 6-pin SC-70 (DCK), 8-pin SM-8 (DCT), and 8-pin US-8
(DCU). Wafer chip scale packaging (WCSP) is available with TI NanoStar (YEA) and NanoFree (YZA) packages
in 5-, 6-, and 8-ball solder bump configurations.
Tables A-3 and A-4 list the possible device technology and function codes for the 5-pin packages. In some cases,
the tables may list a device technology or function that is not yet available. The wafer fabrication and assembly-test
site is coded into the final character for both packages. Additional tracking information is coded into dots or marks
adjacent to the device pins. For further information about a specific device, please contact your local field sales office
or the TI Product Information Center.
PicoGate Logic

PicoGate Logic uses a three-character name rule. The first character denotes the technology family, the second
character denotes device function, and the third character denotes a wafer fabrication and assembly-test facility
combination (for internal tracking, here denoted by x).
Example: A PicoGate Logic device with a package code of BAx is an SN74AHCT1G00DBV.
Microgate Logic

Microgate Logic uses a four-character name rule. The first character denotes the technology family, the second and
third characters denote device function, and the fourth character denotes a wafer fabrication and assembly-test
facility combination (for internal tracking, here denoted by x).
Example: A Microgate Logic device with a package code of A02x is an SN74AHC1G02DCK.
NanoStar Package

The NanoStar package uses a three-character name rule. The first character denotes the technology family, the
second character denotes device function, and the third character denotes a wafer fabrication and assembly-test
facility combination (for internal tracking, here denoted by x).
Note: On NanoStar packages, the three-character device name is preceded by three additional characters denoting
year (Y), month (M), and sequence code (L).
Example: A NanoStar package logic device with a package code of YMLCAx is an SN74LVC1G00YEA.

A13

LOGIC MARKING GUIDELINES

Table A-3.
Device Technology Codes

A14

TECHNOLOGY

CODE

AHC

AHCT

AUC

AUP

CB3Q

CB3T

CBT

CBTD

CBTLV

LVC

LOGIC MARKING GUIDELINES

Table A-4.
Device Function Codes

FUNCTION

DCK/
YEA/
YZA

DBV/
DCT/
DCU

00

00

02

02

04

04

05

05

06

06

07

07

08

08

125

125C

25
C2

126

26

132

3B

14

14

157

57

17

17

18

18

240

40

241

41

245

45

257
32

B7
G

32

8D

34
384

34

53

53

57

A7

58
66

58
6

74
79

66
74

79

80

80

86

86

97

97

98
U04

98
D

U4

A15

MOISTURE SENSITIVITY BY PACKAGE

Table A-5 lists the moisture sensitivity of TI packages by level. Some packages differ in level by pin count.
Table A-5.
Package Moisture Sensitivity by Levels
PACKAGE
PLCC
SOT

LEVEL 1

LEVEL 2

LEVEL 4

DBV (5)
DCK (5)
NS (14/16/20)
PS (8)

SOIC

D (8/14/16)
DW (16/20/24/28)
DCT (8)
DL (28/48/56)

DB (14/16/20/24/28/30/38)
DBQ (16/20/24)
DBQ (16/20/24)

QSOP
TSSOP

DGG (48/56/64)
PW (8/14/16/20/24)

TVSOP

DBB (80)
DGV (14/16/20/24/48/56)

VSSOP

DCU (8)

QFN

RGY (14/16/20)

QFP

RC (52)
PAG (64)
PCA (100)
PN (80)
PZ (100)

TQFP

PM (64)
GKE (96)
GKF (114)

MicroStar BGA
MicroStar Jr. BGA
NanoStar

LEVEL 3
FN (44/68)

SOP

SSOP

LEVEL 2A

FN (20/28)

GQL (56)
YEA (5/8)

Meets 250C
NOTES: 1. No current device packages are moisture-sensitivity levels 5 or 6.
2. Some device types in these packages may have different moisture-sensitivity levels than shown.
3. All levels except level 1 are dry packed.

TIs through-hole packages (N, NT) have not been tested per the JESD22-A112A/JESD22-A113A standards. Due
to the nature of the through-hole PCB soldering process, the component package is shielded from the solder wave
by the PC board and is not subjected to the higher reflow temperatures experienced by surface-mount components.
TIs through-hole component packages are classified as not moisture sensitive.

A16

MOISTURE SENSITIVITY BY PACKAGE

The information in Table A-6 was derived using the test procedures in JESD22-A112A and JESD22-A113A. The
Floor Life column lists the time that products can be exposed to the open air while in inventory or on the manufacturing
floor. The worst-case environmental conditions are given. The Soak Requirements column lists the preconditioning,
or soak, conditions used when testing to determine the floor-life exposure time.
Table A-6.
Moisture-Sensitivity Levels
(JESD22-A112A/JESD22-A113A)
FLOOR LIFE
LEVEL

SOAK REQUIREMENTS

CONDITIONS

TIME
(hours)

CONDITIONS

TIME
(hours)

30C/90% RH

Unlimited

85C/85% RH

168

30C/60% RH

1 year

85C/60% RH

168

2A

30C/60% RH

4 weeks

30C/60% RH

696
X + Y = Z

30C/60% RH

168

30C/60% RH

24 + 168 = 192

30C/60% RH

72

30C/60% RH

24 + 72 = 96

30C/60% RH

24

30C/60% RH

24 + 24 = 48

30C/60% RH

30C/60% RH

0+6=6

RH = Relative humidity
X + Y = Z, where:
X = Default value of time between bake and bag. If the actual time exceeds this
value, use the actual time and adjust the soak time (Z). For levels 36, X can be
standardized at 24 hours as long as the actual time does not exceed this value.
Y = Floor life of package after it is removed from dry-pack bag
Z = Total soak time for the evaluation

For more information, see:

Packaging Material Standards for Moisture-Sensitive Items, EIA Std EIA-583
Symbol and Labels for Moisture-Sensitive Devices, EIA/JEDEC Engineering Publication EIA/JEP113-B,
May 1999
Guidelines for the Packing, Handling, and Repacking of Moisture-Sensitive Components,
EIA/JEDEC Publication EIA/JEP124, December 1995

A17

Table A-7.
Logic Package Competitive Cross-Reference

PACKAGE
TYPE
DSBGA

LFBGA

PDIP

QSOP

SOIC

NO.
PINS

TI

TI-ACQUIRED
HARRIS

TI-ACQUIRED
CYPRESS

FAIRCHILD

IDT

IDT-ACQUIRED
QUALITY

ON (formerly
Motorola)

PERICOM

PHILIPS

RENESAS

YEA

MicroPakt

YEA

MicroPakt

96

GKE

BF

EC

114

GKF

BF

NB

EC

ST MICRO

TOSHIBA

N, P

P, N

DP

EY

14

N, P

P, N

DP

B, B1R, EY

P
P

16

P, N

DP

B, B1R, EY

20

P, N

DP

B, B1R, EY

24

NT

EN

NT, SP

PT

N2

DP

B, B1R, EY

28

NT

PT

DP

16

DBQ

20

DBQ

24

DBQ

14

SO

M, S, SC

DC

S1

FP

M/MTR,
M1R/RM13TR,
M1/M013TR

FN

16

D, M

SO

M, S, SC

DC

S1

FP

M/MTR,
M1R/RM13TR,
M1/M013TR

FN

16

DW

DW, M

SO

SO

S0

DW

M/MTR,
M1R/RM13TR,
M1/M013TR

20

DW

SO

WM, SC

SO

S0

DW

DW

FP

M/MTR,
M1R/RM13TR,
M1/M013TR

FW

24

DW

SO

WM, SC

SO

S0

DW

DW

FP

M/MTR,
M1R/RM13TR,
M1/M013TR

28

DW

SO

SO

S0

DW

FP

LEGEND:
TI and this company have an alternate source agreement.

MicroPak is a trademark of Fairchild Semiconductor Corporation.

PACKAGING CROSS-REFERENCE

A18

Table A-7 is a packaging cross-reference for TI and other semiconductor manufacturing companies. If a specific alternate source agreement exists
between TI and a particular company, the cell is shaded.

Table A-7.
Logic Package Competitive Cross-Reference (continued)

PACKAGE
TYPE

SSOP

TSSOP

TI

TI-ACQUIRED
HARRIS

TI-ACQUIRED
CYPRESS

FAIRCHILD

IDT

IDT-ACQUIRED
QUALITY

ON (formerly
Motorola)

PERICOM

PHILIPS

RENESAS

14

DB

SD

DB

FS

16

DB

SM

SD

DB

FS

16

DBQ

20

DB

SM

MSA

PY

SD

DB

FS

20

DBQ

QSC

24

DB

SM

MSA

PY

SD

DB

FS

24

DBQ

28

DB

PY

DB

30

DB

38

DB

28

DL

48

DL

PV

MEA/SSC

PV

PV

DL

56

DL

PV

MEA/SSC

PV

PV

DL

14

PW

MTC

DT

PW/DH

TTP

TTR

FS, FT

16

PW

MTC

DT

PW/DH

TTP

TTR

FS, FT

20

PW

MTC

PG

DT

PW/DH

TTP

TTR

FS, FT

24

PW

MTC

PG

PA

DT

PW/DH

TTP

TTR

28

PW

PG

TTP

TTR

48

DGG

PA

MTD

PA

PA

DT

DGG

TTP

TTR

FT

56

DGG

PA

MTD

PA

PA

DT

DGG

TTP

TTR

FT

64

DGG

TTP

TTR

14

DGV

DGV

16

DGV

20

DGV

24

DGV

ST MICRO

TOSHIBA

48

DGV

PF

Q1

56

DGV

PF

K6

80

DBB

TTP

LEGEND:
TI and this company have an alternate source agreement.
A19

PACKAGING CROSS-REFERENCE

TVSOP

NO.
PINS

PACKAGE
TYPE
VFBGA
Single
Gate
Dual Gate
Triple
Gate

NO.
PINS

TI

TI-ACQUIRED
HARRIS

TI-ACQUIRED
CYPRESS

FAIRCHILD

IDT

IDT-ACQUIRED
QUALITY

ON (formerly
Motorola)

PERICOM

PHILIPS

RENESAS

20

GQN

56

GQL

DBV

P5

CM(E)

STR

DCK

M5

DF

DCK

VS

CTR

FU

DCT

SSOP8

DCU

K8

US(E)

DCT

SSOP8

FU

DCU

K8

US(E)

FK

DSBGA is the JEDEC reference for wafer chip scale package (WCSP).
Also available in lead free
Quality Semiconductors QVSOP package has the same pitch but slightly different footprint than the TI TVSOP package.
Pericom has a QVSOP with similar specifications and lead pitch to the TI TVSOP package.
# Tape-and-reel packaging is valid for surface-mount packages only. All orders must be for whole reels.
|| LE = Left-embossed tape and reel may be seen with some DB and PW packages, however, the nomenclature is transitioning to R.
k R = Standard tape and reel (required for DBB, DBV, and DGG; optional for D, DL, and DW packages)
LEGEND:
TI and this company have an alternate source agreement.

ST MICRO

TOSHIBA

FU
CTR

FK

PACKAGING CROSS-REFERENCE

A20

Table A-7.
Logic Package Competitive Cross-Reference (continued)

PACKAGING CROSS-REFERENCE

Logic Devices
Tables A-8 through A-11 list the standard pack quantities, by package type, for tubes, reels, boxes, and trays,
respectively.
Table A-8.
Tube Quantities
PIN COUNT
8

14

16

20

24

28

44

48

56

68

DIP

50

25

25

20

15

13

N/A

N/A

N/A

N/A

PLCC

N/A

N/A

N/A

46

N/A

37

26

N/A

N/A

18

SOIC

75

50

40

25

25

20

N/A

N/A

N/A

N/A

SSOP

N/A

N/A

NS

N/A

N/A

40

N/A

25

20

N/A

NOTE 1: QSOP (DBQ) and EIAJ devices (DB, NS, PS, and PW packages) are not available in tubes.

Table A-9.
Reel Quantities

PACKAGE
DESIGNATOR

UNITS
PER REEL

YEAR

3000

EIAJ surface mount

DBR/DBLE,
NSR/NSLE,
PWR/PWLE

2000

LFBGA

GKE, GKF

1000

20 pin

FNR

1000

28 pin

FNR

750

44 pin

FNR

500

14/16/20 pin

RGY

1000

DSBGA

PLCC

QFN

96/114 pin

96/114 pin

56 pin

RGQ

2000

QSOP

16/20/24 pin

DBQR

2500

SSOP

48/56 pin

DLR

1000

14/16 pin

DR

2500

Widebody 16 pin

DWR

2000

20/24 pin

DWR

2000

28 pin

DWR

1000

64 pin

PMR

1000

DGGR

2000

GQN, GQL

1000

SOIC/SOP

TQFP
TSSOP
VFBGA

20/56 pin

DSBGA is the JEDEC reference for wafer chip scale package (WCSP).
Also available in lead free

A21

PACKAGING CROSS-REFERENCE

Table A-10.
Box Quantities

DIP
SOIC
SSOP

48/56 pin

PACKAGE
DESIGNATOR

UNITS
PER BOX

1000

NT

750

NP

700

D, DW

1000

DL

1000

Table A-11.
Tray Quantities

TQFP

A22

64 pin

PACKAGE
DESIGNATOR

UNITS
PER TRAY

PM

160

LOGIC OVERVIEW

PRODUCT INDEX

FUNCTIONAL CROSSREFERENCE

DEVICE SELECTION GUIDE

PACKAGING AND MARKING INFORMATION

LOGIC PURCHASING TOOL/ALTERNATE SOURCES

B1

LOGIC PURCHASING TOOL/ALTERNATE SOURCES

B2

LOGIC PURCHASING TOOL/ALTERNATE SOURCES

Tables B-1 through B-4 list equivalent or similar product types for most logic families available in the industry,
separated by voltage node and specialty logic. As the world leader in logic products, TI offers the broadest logic
portfolio to meet your design needs.
Alternate sourcing agreements between TI and other companies are shown with shaded table cells. Crosshatched
cells are used where the products are identical (or nearly identical). Cells with no background are used where the
products are similar.
Table B-1.
5-V Logic
TI
ABT
AC
ACT
AHC

ABT

IDT

ON

AC

AC

AC

ACT

ACT

ACT

PERICOM

PHILIPS
ABT

AHCT

VHCT

VHCT

NC7S

HC1G

ALS

ALS

BCT
CBT/BUS
CD4000
F
FCT
HC
HCT
LS
S
TTL

ABT
AC

AHC1G

AS

TOSHIBA

ACT

VHC

ALS

HITACHI

ABT

VHC

AHCT1G

LEGEND:

FAIRCHILD

AHC
AHCT
7SHU

AS

BCT

BC

FST

FST, QS

CD4000

BC

PI5C

MC14000

FCT

FCT

HC

HC

HC

HC

HC

HCT

HCT

HCT

HCT

HCT

LS

LS

TTL

TI and this company have an alternate source agreement.

Same product but no alternate source agreement

NAME

Similar product and technology

Cypress = Cypress Semiconductor, Fairchild = Fairchild Semiconductor, Hitachi = Hitachi Semiconductor (America), Inc.,
IDT = Integrated Device Technology, Inc., ON = ON Semiconductor, Pericom = Pericom Semiconductor Corporation,
Philips = Philips Semiconductors, Toshiba = Toshiba America Electronic Components, Inc.
B3

LOGIC PURCHASING TOOL/ALTERNATE SOURCES

Table B-2.
3.3-V Logic

TI

FAIRCHILD

HITACHI

IDT

ON

VCX

ALVC

ALVC

VCX

LVQ/LVX

LV

LCX

LVC

LVT

LVT

ALB
ALVC
CBTLV
LV
LVC
LVT
LEGEND:

QS3VH

PERICOM

PHILIPS

TOSHIBA

ALVC

ALVC

VCX

LV

LVQ/LVX

LCX/LPT

LVC

LCX

P13B

LVQ/LVX
LVC/ LCX

LCX

LVT

TI and this company have an alternate source agreement.

Same product but no alternate source agreement

NAME

Similar product and technology

Table B-3.
2.5-V Logic

TI
ALVT
AVC

PERICOM

PHILIPS

ALVT

ALVT

AVC

AVC

LEGEND:
TI and this company have an alternate source agreement.

Same product but no alternate source agreement

NAME

Similar product and technology

Table B-4.
1.8-V Logic

TI

HITACHI

AUC
LEGEND:

TI and this company have an alternate source agreement.

Same product but no alternate source agreement

NAME

B4

Similar product and technology

IDT

PHILIPS

LOGIC PURCHASING TOOL/ALTERNATE SOURCES

Table B-5.
Specialty Logic

TI

FAIRCHILD

ABTE

ETL/VME

FB

DS

GTL
GTLP
HSTL
JTAG
TVC
PCA
SSTL
SSTV

HITACHI

IDT

GTL

GTLP

QS3J

GTL

PCA

SSTL

SSTV

SSTV

SSTVF

PHILIPS
FB

GTLP

SCAN

PERICOM

SSTV

SSTV

SSTVF

SSTVF

SSTV

LEGEND:
TI and this company have an alternate source agreement.

Same product but no alternate source agreement

NAME

Similar product and technology

B5