Analysis of Analog IC MOS

amplifiers

Dr. D. Meganathan
Department of Electronics Engineering,
Madras Institute of Technology

Name the amplifier

Mid Band Gain= ?

VDD
Vb1

M7

Vb2

M5

VOVb3

Vin

Vb1

M6

Vb2

Negative Power Supply Rejection

Ratio?

VO+

M3

M4

Vb4

Vb3

Common-Mode Rejection Ratio?

Input Common Mode Voltage

Range ?

M2

M1

M8

Positive Power Supply Rejection

Ratio ?

M9

Vin

Output Common Mode Voltage

Range?

Output Voltage Swing?

Feedback Concepts

Feedback
concepts new
to us?
6/19/2014

D.Meganathan, Anna University

Harold S. Black, 1927

6/19/2014

D.Meganathan, Anna University

General feedback structure

Open loop gain

Mixer network
Voltage series
Current shunt

xo Axi

Sampling network
Voltage shunt
Current Series
Loop gain

x f xo
xi xs x f
Af

xo
A

xs 1 A

Closed-loop gain

Feedback Amplifier by D.Meganathan

FEEDBACK CONCEPTS in biasing circuit

VDD

IREF

ID = n/2 (VGS Vt)2

ID

SIMPLE FEEDBACK

G
S

NO EXTRA CIRCUIT IS INVOLVED

6/19/2014

D.Meganathan, Anna University

Integrated Circuit Biasing Circuit

CURRENT Source

VDD

IREF

ID

TO BIAS INTEGREATED
CIRCUIT

G
S

6/19/2014

D.Meganathan, Anna University

Analysis of Analog IC MOS

amplifiers
Small signal Analysis of Common Source
Amplifier
Input and Output Impedance measurement
for Common source amplifier
Small signal Analysis of Common Source
degenerator Amplifier
Input and Output Impedance measurement
for Common source degenerator amplifier

Analysis of Analog IC MOS

amplifiers
Small signal Analysis of Common Drain
Amplifier
Input and Output Impedance measurement for
Common Drain amplifier
Small signal Analysis of Common Gate Amplifier
Input and Output Impedance measurement for
Common Gate amplifier

Analysis of MOS amplifiers

MID BAND GAIN ANALYSIS

Output Voltage swing
Input common-mode voltage range
Output common-mode voltage range
Power supply rejection ratio
Common mode rejection ratio

Small signal analysis

TO DETERMINE MIDBAND GAIN OF THE CIRCUIT
STEP 1 EVALUATE THE SMALL SIGNAL CIRCUIT CONSTANTS using DC QPoint voltage and currents (gm, r0) gm = n(VGSQ-Vt) and r0 = VA/IDQ
STEP2 DRAW THE SMALL SIGNAL EQUIVALENT DIAGRAM
+

+
vgs
-

gm
vgs

r0

Vo
-

STEP 3
DETERMINE THE MID BAND VOLTAGE GAIN AV=VO/VS

Determining Input impedance

Step 1 Draw the small signal equivalent circuit diagram
Step 2 Null the output to the circuit
If it is a voltage source then short it
If it is a current source then open it
Step 3 Remove input voltage source from the circuit
Step 4 Connect known voltage or current source at the
input terminal
Step 5 Measure the current supplied or voltage across
the input source
Step 6 Determine the ratio of Voltage/ current

Determining Output impedance

Step 1 Draw the small signal equivalent circuit diagram
Step 2 Null the input to the circuit
If it is a voltage source short circuit it
If it is a current source open circuit it
Step 3 Remove output voltage source From the circuit
Step 4 Connect known voltage or current source at the
output terminal
Step 5 Measure the current supplied or voltage across
the output source
Step 6 Determine the ratio of Voltage/ current

Common Source Amplifier

VDD
+

RD
Vo

Vin
-

Vgs

gm
vgs

Vin
Av= -gm (r0 // RD)

r0

RD Vo
-

Input impedance
It

Vt

gm
vgs

Rin =

r0

RD

Output Impedance
It

gm vgs

r0

Rout = r0 // RD

RD

Vt

Common Source with Source Degenerator

Circuit
V
I
DD

RD

Vgs

Vo

Vin

gm
Vgs

Rs

+
Rs

r0 Vr0

+
I1
RD
Vo

VRs
-

Vo=Vro + VRs;
Vo = (I D -gmVgs) ro +I D Rs;
-Vo

Vo
-gm(Vin I D Rs) ro I D Rs;
RD

-Vo

-Vo
-Vo
Vo
-gm(Vin
Rs) ro
Rs;
RD
RD
RD

Vo = I 1 R D ;
I D = -I 1 ;
ID =

-Vo
;
RD

Vin = Vgs + VR S ;
Vgs =Vin VR S ;
VR S I D Rs =

-Vo
Rs;
RD

Vo+

-Vo
Vo
Vo
ro gm
Rsro
Rs=-gmVin
RD
RD
RD

AV

-gmro R D
-gmR D

R D ro gmRsro Rs (1 gmRs )

Input Impedance
+

Rin =

Vgs
Vt

gm
Vgs

Rs

r0

RD

Output Impedance
Rout

ID
+
Vgs
-

+
gm r0
Vgs
+
Rs VRs

Vr0

I1

Rout
It

RD

Vt

VRs= -Vgs;
VRs= IDRs

Vt = Vr0 + VRs;
Vt= (ID-gmVgs)r0 +VRs
Vt= (ID + gmVRs) r0 + VRs;
Vt= (ID+ gm IDRs) r0+ IDRs;

Rout= r0(1+ gm Rs) + Rs

r0(1+ gm Rs);
Rout = (r0(1+ gm Rs) + Rs) // RD

Common Drain Amplifier

VDD

ID
+

Vgs

Vo

Vin

Vr0
-

+
Rs

Rs

r0

gm
Vgs

Vo
-

Vo= gm Vgs (Rs // r0);

Vin = Vgs + Vo;
Vin = Vgs (1+gm Vgs (Rs // r0));
AV =

gm (ro//Rs)
(1+gm(ro//Rs))

Input Impedance
+

Rin =

Vgs
Vt

gm
Vgs

Rs

r0

Output Impedance
+
gm Vgs

Vgs
r0

Vgs=-Vt

It

A
Rs

Vt

Apply KCL at junction A

gmVgs + It = Vt/Rs + Vt/r0;
It= Vt/Rs + Vt/r0+ gmVt;
1
R OUT =
//ro // Rs
gm

Common Gate Amplifier

ro

I1

VDD

Rsi

gm Vgs

I2
D

RD

Vin

RD

Vgs

Vo

Vo

G
Vo = -Av1 Vgs;

Rsi

Vin

I1=(Vgs-Vo)/r0
Vo= -Av1Vgs; (Av1 is the gain of the circuit);
I1=(Vgs-(- Av1Vgs)/r0
I1=Vgs(1+ Av1)/r0
RM = r0 /(1+ Av1)

I2= (Vo-(Vgs)/r0;
Vgs= Vo/-Av1; (Av1 is the gain of the circuit);
I2= (Vo+ Vo/Av1 )/r0
I2
Vo/r0

Common Gate Amplifier

Ii

Rsi

I1
Vin

gm Vgs

RM

Vgs

D
I2
ro

RD

Vo

+
G

Vo = -gm Vgs (ro // RD)

Vo/Vin = Av= gm(ro / / R D )

(1 gm Rsi )

Apply KCL at node S

Ii +gm Vgs+ I1=0
Ii = -gmVgs-Vgs/RM
Vin = Ii Rsi Vgs
Vin = (-gmVgs-Vgs/RM)Rsi-Vgs
Vin

-(gmR M Rsi+Rsi+R M )
Vgs;
RM

-R M
Vgs

;
Vin (gmR M Rsi+Rsi+R M )
Vgs
Vin

-R M
(gmRsi+1)R M

-1
(gmRsi+1)

Input Impedance
ro
It

I1
S

gm Vgs

Vt

RD

Vgs
+
G

It=-gmVgs+I1;
Vt=-Vgs;
Rin = r0 // 1/gm;
Rin 1/gm;

Output Impedance
ro

gm Vgs

It

RD

Vgs

Rout =ro // RD

+
G

Vt

Output impedance and Small Signal gain of MOS

IC amplifier
Output Impedance of a IC MOS resistor
It

VDD
0
Vbias

M2

Vo

M1

Vin

Vt

r02

gm vgs

Rout = r02
Small signal gain of MOS IC amplifier
+
+
Vin
-

Vgs

gm1
vgs

r01

r02

Vo

Small Signal Gain = -gm1(r01//r02)

Differential Amplifier
VDD

VDD

ID/2

ID/2
RD

RD

-Vo/2

+Vo/2

+Vin/2

-Vin/2
ID
Virtual
ground

Rs

Differential Amplifier
Differential Mode gain
VDD
ID/2+ ID

ID/2+ID
RD

Vin

VDD

VDD

-Vo/2

Vo

+Vo/2
Vin

+Vin/2

0
Virtual
ground

RD

RD

-Vin/2

+Vin

Rs
ID
Rout = r0
ADM = -gm (r0 // RD)

Differential Amplifier
COMMON MODE GAIN
VDD
ID/2+ ID

VDD

RD

ID/2+ID

RD
Vin

VDD

Vo

RD

-Vo

-Vo
Vin
Vin

Vin

ID

Rss

2ID
Rss
ACM =

-gmR D
(1 2gmRss)

Rout = (r0(1+ 2gm Rss) + 2Rss) // RD

Power Supply Rejection Ratio

VDD

Vb1

M3

M4

-Vo/2

+Vo/2
M1

+Vin/2

Vb1

M2
-Vin/2

Vb2

Power Supply Rejection Ratio+

Power supply rejection ratio+ = Adm/A+
Adm = -gm (ro1 // ro3)
A+= Vo/Vdd

Vb1

M3

M4

-Vo/2

+Vo/2
M2

M1

Vb2

Vb1

M5

Vdd

Power Supply Rejection Ratio+

M3 device act as common-gate amplifier
M3

Vdd

Small Signal gain of the M3 is gm3 (r03 // Rdown)

Vo
Rdown

M1

A+ =gm3 (r03 // gm1ro1ro5)

Rdown

Rdown
M1

M5

PSRR+ =

M1

r01
Rdown

M5

-gm1 (ro1 // ro3)

gm3 (r03 // gm1ro1ro5)

r05

gm1ro1ro5

Power Supply Rejection RatioPower supply rejection ratio- = Adm/AAdm = -gm1 (ro1 // ro3)
A-= Vo/Vss
Vb1

M3

M4

-Vo/2

+Vo/2
M2

M1

Vb
M5 2

Vb1

M5

Vss

Power Supply Rejection RatioVb1

A- = Vo/Vss
M3 R
up
Vo
Rdown
M1

M5 transistor act as common-gate

amplifier.
The gain of M5 transistor is gm5 RD

RD= Rup // Rdown

Rup = r03

M5

Rdown = gm1r01r05
Vss
PSRR- =

A- = gm5 (gm1r01r05 // r03)

-gm1 (ro1 // ro3)
gm5 (gm1r01r05 // r03)

Common Mode Rejection Ratio

VDD

Vb1

M3

M4

-Vo/2

Vb1
+Vo/2

M2

M1
+Vin/2

-Vin/2
Vb2

M5
Adm = -gm1 (ro1// ro3);
Acm= -gm1 ro3/ (1+2gm1ro5);

CMRR = Adm/Acm
CMRR= gm (ro1 // ro3) (1+2gm1ro5)
gm1 ro3

Input Common Mode Range

Voltage
VDD

Vin

VCMI
Vt

RD
Vout

time
Vin
VCMI

Voltage

Vin

VCMI
Vt

time

Input Common Mode Range

VDD

Vb1

M3

+
VoV3
-

M1

+
VoV1

-Vo/2

+
+Vin/2

Vgs1
Vb2

Input common-mode range

(VoV5 + Vgs1 )< VCMI <(VDD-|VoV3|- Vdg1)
M4

Vgs1 = VoV1+Vt1

+Vo/2
M2

Vb1

+
M5 VoV5
-

-Vin/2

Input Common Mode Range

VDD

VDD
From VDD
+

Vb1

Vb1

M3
Vo

VCMI

VCMI

M1

VoV5

Vgs1
-

Vb2

M3 VoV3
+
Vdg1
-

M1
Vgs1

VCMI= VDD-|VoV3|-Vdg1

Vo

Vdg1

M1 VoV1

Vgs1

Vb2

M5
-

M5

Vdg1= VoV1-Vgs1 ;
Vdg1= VoV1 (VoV1+Vt1);

VCMI(MAX) = VDD-|VoV3|-Vt1
From Vss

Vgs1= VoV1+Vt1

VCMI (MIN)= Vgs1 + VoV5

VCMI (MIN) <VCMI < VCMI(MAX)

Output Common Mode Voltage

Voltage

VOUT

VDD
VCMO
RD
VCMO VGS-Vt
time
Vin

Voltage

VOUT

VCMI
VCMO
VGS-Vt

time

Output Common Mode Voltage

VDD

Vb1

M3

-Vo/2

+
VoV3
-

+
M1 VoV1

Output common-mode range

M4

M2
+

Vb2

VCMO(MAX) = VDD-VoV3
+Vo/2

+Vin/2

Vb1

VCMO(MIN) = VoV5+VoV1

-Vin/2

M5 VoV5
-

(VoV5+VoV1 )< VCMO< (VDD-VoV3)

Output Voltage Swing

VDD

Vb1

M3

-Vo/2

+
VoV3
-

+
M1 VoV1

M4

+Vo/2
M2

+Vin/2

Vb2

Vb1

-Vin/2

M5 VoV5
- Maximum Output Voltage Swing
Differential End

2(VDD-(VoV5 +VoV1+| VoV3|))

Telescopic OTA
VDD
Mid Band Gain= ?
Vb1

M7

M8

Vb1
Single stage

Vb2
VOVb3

M5

M6

VO

M3

M4

Vb4

Vb1

Vb3

Vb2

M2

M1

Vin+

Vb2

M9

Vb3
Vin-

RD

M7

VO
M5

Rup

M1

Rdown
M3

Vin

M1

Vin+

Virtual
ground

AV=-gm1 RD
RD= Rup // Rdown

Mid Band Gain of a Telescopic OTA

Vb1
Vb2

M7

Vb1

M5

Vb2
Vo

Rup
Rdown

Vb3

M7
M5

r05

M5

Vo

Rup

M3

M1

Vin+

Rup

r07

M5 looks like common source with

degenerator circuit; its output
resistance is (1+gm5ro7)ro5
gm5ro5ro7
Rup gm5ro5ro7

Mid Band Gain of a Telescopic OTA

Rdown

Rdown

Vb3

M3

M1

r03

M3

r01

M3 looks like common source with

degenerator circuit; its output
resistance is (1+gm3ro1)ro3
gm3ro1ro3
Rdown

gm3ro1ro3

Overall gain of the Telescopic OTA is

-gm1 RD
RD= Rup // Rdown
Overall Midband gain

-gm1 (gm3ro1ro3)// gm5ro5ro7

Power Supply Rejection Ratio+

Power supply rejection ratio+ = Adm/A+
Adm = -gm1 (gm3ro1ro3)// gm5ro5ro7
A+ =gm7 RD

Vb1

M7

Vb2

M5

RD = Rup // Rdown

Rup = gm5ro5ro7 and Rdown = gm3ro1ro3

Rup
Rdown

Hence A+ =gm7 (gm5ro5ro7 // gm3ro1ro3)

Vb3

PSRR+ = -gm1 (gm3ro1ro3)// gm5ro5ro7

gm7 (gm5ro5ro7 // gm3ro1ro3)

Vdd

Vo

M3

M1

Power Supply Rejection RatioVb1

Vb2

PSRR- =Adm/A-

M7

A- = gm1RD
RD = Rup // Rdown

M5

Vb3

Rup

Vo

Rup
Rdown

gm5ro5ro7

Rdown

M3

Vb3
M1

R1
Vb4

Rdown

gm3ro3gm1ro1ro9

Vo
Rdown
M3

gm3gm1ro1ro3ro9

r03
gm3ro3R1

R1
M1

M9

r01 gm1ro1ro9
r09

Vss

PSRR- =

-gm1 (gm3ro1ro3)// gm5ro5ro7

gm1 (gm3gm1ro1ro3ro9 // gm5ro5ro7)

Common Mode Rejection Ratio

CMRR = Adm/Acm

Single stage

Adm

Vb1

M7

Vb2

M5

Vb3

Rup

-gm1 (ro3//gm5ro5ro7)
(1+2gm1 ro9)

M1

Virtual
ground

Vb1

M7

Vb2

M5

Vo

Rup
Rdown

M3

CMRR

Vin+

Acm

-gm1 (gm3ro1ro3)// gm5ro5ro7

((gm1 (gm3ro1ro3)// gm5ro5ro7 ) (1+2gm1 ro9)) V

b3

M3

gm1 (ro3//gm5ro5ro7)
M1

Vin+

Vb4

M9

Input Common Mode range

VDD
Vb1
Vb2

VCMI (MIN) = VOV9 + Vgs1

M7

VCMI (MAX) = VDD- |VOV7|- |VOV5| - |VOV3| +Vt1

M5

Vo
Vb3

M3
M1

M9

VCMI (MIN) < VCMI < VCMI (MAX)

Output Common Mode range

VCMO(MIN) = VOV9 + VOV1 + VOV3

VDD
Vb1

M7

Vb2

M5

VCMO(MAX) = VDD- |VOV7 | - | VOV5 |

Vo

Vb3

M3
M1

M9

VCMO (MIN) <VCMO < VCMO(MAX)

Output Voltage Swing

VDD
Vb1

For Differential End

M7

Output Voltage Swing is

Vb2

M5

Vo
Vb3

M3
M1

M9

2(VDD- |VOV7 | - | VOV5 |- VOV3 VOV1 - VOV9)

Mid band gain of Folded Cascoded

OTA
VDD
Vb5

M1

VDD

M11

M2

Vb1

M9

M10

Vb2

M7

M8

VoVin

Vin

Vb3

Vb4

M3

M5

Vo+

M4

M6

Vb1
Vb2
Vb3

Vb4

Mid band gain=?

Single Stage
Virtual
Ground
M1

Vin

Vb1

M9

Vb2

M7

Vb3

M3

Rup
Vo
Rdown

RD
VO
M1

Vin
Vb4

M5

AV=-gm1 RD
RD= Rup // Rdown

Overall Mid band gain

Vb1
Vb2
Rup

Rdown

r09
S

M9
M7

Vb3

r07

Rdown
M3

r03

M3

M7

Vo

Rup

M1

M5

r01

r05

M3 looks like common source with

degenerator
circuit; its output
resistance is (1+gm3(ro1 // r05))ro3
Rdown
gm3 ro3 (ro1//ro5)

M5
looks like common source with
degenerator circuit; its output resistance is
(1+gm7ro9)ro7
gm7ro7ro9
Rup gm7ro7ro9
-gm1 RD
RD= Rup // Rdown
Overall Midband gain -gm1 (gm3 ro3 (ro1//ro5) //(gm7ro7ro9))

Power Supply Rejection Ratio+

Power supply rejection ratio+ = Adm/A+

Mid band gain of Simple Two

Stage OTA
Stage 2

Stage 1
VDD

VDD
Vb1

M5

M3

VDD
M4

Vb1

M6

Vo+

VoM1

M7

Vb2

Vin

Vb3

M2

Vin-

Vb2

M8

Overall Midband gain

Stage 1 Gain

Stage 2 Gain

V1

M3

V1

M5

Vo+

M1

Vin

AV1=-gm1 (ro1 // ro3)

AV2= -gm5 (ro5 // ro7)

M7

Overall gain = AV1 AV2

= gm1 gm5 (ro1 // ro3) (ro5 // ro7)

Mid band gain of Two Stage OTA

with telescopic first stage
Stage 2
VDD

Stage 1
VDD

VDD

M9

Vb1

M7

M8

Vb1

Vb2

M5

M6

Vb2

Vo+

M10

VoVb3

M11

Vb4
Vin+

M3

M4

M1

M2

Vb5

Vb3
Vb4
Vin-

M12

Mid band gain

Stage 1

Stage 2

Vb1

M7

Vb2

M5

V1
Vb3

V1

M9

Vo
M3

M1

Vb4

M11

Vin
AV2= -gm9 (ro9 // ro11)
AV1

-gm1 (gm3ro1ro3)// gm5ro5ro7

Overall Midband gain = AV1 AV2
gm1 gm9((gm3ro1ro3)// (gm5ro5ro7)) (ro9 // ro11)

Mid band gain of Two Stage OTA

with folded cascode first stage
Stage 2

Stage 1
VDD
Vb6

M1

Vin

VDD

M15

M2

Vin

Vb1

M9

M10

Vb2

M7

M8

Vb3

M3

M4

M5

M6

VDD

M11

M12

Vb1
Vb2
Vb3

Vb4

Vo-

Vo+

Vb5
Vb4

VDD

M13

Vb5

M14

Mid band gain

Stage 1
Virtual
Ground
M1

Stage 2
Vb1

M9

Vb2

M7

V1
Vb3

Vb4

M11

Vo

M3

Vb4

M13

M5

Av1 -gm1 ((gm3 ro3 (ro1//ro5) ) //(gm7ro7ro9))

Overall gain

V1

Av2=-gm11 (ro11 // ro13)

gm1 gm11 (gm3 ro3 (ro1//ro5) //(gm7ro7ro9)) (ro11 // ro13)

THE END