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Radio Engineering Design Exercise 2015

This document summarizes a student design project for a radio frequency amplifier. It includes: 1) Examination of transistor models and biasing points. 2) Comparison of nonlinear and S-parameter transistor models. 3) Design of an amplifier using each model to achieve minimum noise figure between 0.9-1GHz with gain over 13.2dB. 4) Analysis of the stability of the S-parameter amplifier design.
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100% found this document useful (2 votes)
169 views30 pages

Radio Engineering Design Exercise 2015

This document summarizes a student design project for a radio frequency amplifier. It includes: 1) Examination of transistor models and biasing points. 2) Comparison of nonlinear and S-parameter transistor models. 3) Design of an amplifier using each model to achieve minimum noise figure between 0.9-1GHz with gain over 13.2dB. 4) Analysis of the stability of the S-parameter amplifier design.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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MASTER DEGREE PROGRAM IN WIRELESS COMMUNICATION ENGINEERING

TITLE: 521335S RADIO ENGINEERING 1


(DESIGN EXERCISE 2015)

Author

Rumana Yasmin (2473855)


Sadiqur Rahaman (2473677)
Munim Morshed (2473716)

Supervisor

Timo Kunpuniemi

Accepted

_______/_______2015

Grade

___________________________________

Rumana Yasmin, Sadiqur Rahaman, Munim Morshed (2015) University of


Oulu, Department of Communications Engineering, Master Degree Programme in
Wireless Communications Engineering,. Design Exercise.

ABSTRACT
The laboratory work of the course is done performing in ADS software. In the Lab
work 1) We examine the value needed for base-emitter voltage (VBE) and base
current (IBB) of the nonlinear transistor model, 2)We Compare two transistor models
(nonlinear model vs. S-parameter model) using the schematic view ModelVerif and
the corresponding data display ModelVerif.ddsI 3) Do the biasing of the nonlinear
transistor model to the biasing point of the S-parameter model 4) We Simulate and
present in Smith chart (in ADS data window) the constant noise circles, reflection
coefficients S11 and S22 and the reflection coefficient Sopt that is calculated to give
the minimum noise figure of the S-parameter transistor model. 5) Examine the
stability of the S-parameter transistor model 6) We Matchd the transistor to reach
minimum noise figure in such a way that the specifications for the task are fulfilled.
7) We simulate the whole amplifier and presented noise figure, gain and reflection
coefficients S11 and S22 8) and at last we match by using micro stripes and compare
the result with the result obtained by lumped components. We have included our
findings and explanations in the report.

ABSTRACT
TABLE OF CONTENTS

LIST OF ABBREVIATIONS AND SYMBOLS ......................................................... 4


1.

INTRODUCTION ................................................................................................ 5

2.

DESIGN AMPLIFIER USING NONLINEAR TRANSISTOR .......................... 6

3.

COMPARE NONLINEAR MODEL VS. S-PARAMETER MODEL ................ 7

4.

NONLINEAR TRANSISTOR MODEL USE VDC = 6 V AS OPERATING

VOLTAGE ................................................................................................................... 8
5.

DESIGN THE AMPLIFIER WITH MINIMUM NOISE FIGURE OF THE S-

PARAMETER TRANSISTOR .................................................................................. 10


6.

STABILITY OF THE S-PARAMETER AMPLIFIER...................................... 12

7.

INPUT AND OUTPUT MATCHING ............................................................... 16

8.

THE WHOLE AMPLIFIER DESIGN ............................................................... 18

9.

BONUS TASK ................................................................................................... 20

10. CONCLUSION .................................................................................................. 21


11. APPENDIX ........................................................................................................ 22
12. REFERENCES ................................................................................................... 30

LIST OF ABBREVIATIONS AND SYMBOLS


VBE

Voltage of Base-Emitter

VCE

Voltage of Collector-Emitter

Vdc

Direct Current Voltage

IBB

Base Current

ICE

Collector-Emitter Current

S-parameter

Scattered Parameter

NF

Noise Figure

LNA

Low Noise Amplifier

Sopt

Optimum Scattered Parameter

RF

Radio Frequency

1. INTRODUCTION
This report covers the nonlinear and S-parameter amplifier design using the ADS
software. When use the BJT transistor model AT-41511 during the work, there exist
a nonlinear model pb_hp_AT-41511_19931202 in the component library
RF_Transistor and a S-parameter model sp_hp_AT-41511_5_199212201 in the
library S_Parameter. They are both needed during the design exercise. In the design
the goal is to match the transistor into minimum noise figure at frequency band 0.9 1.0 GHz in such a way, that the available gain is as high as possible. Using transistor
AT-4111 at the operating point VCE = 5 V, ICE = 5 mA the following performance
values at frequency band 0.9 1.0 GHz should be reached. Noise figure NF not
greater than 1.25 dB. Gain S(2,1) not smaller than 13.2 dB. The transistor must
unconditionally stable within the defined bandwidth. [1]

2. DESIGN AMPLIFIER USING NONLINEAR TRANSISTOR


Using this nonlinear transistor model, we can calculate the base emitter voltage
(VBE) and base current (IBB). When using this transistor as a S-parameter amplifier
model with ICE = 5 mA and VCE = 5 V, the operating point is the same to the
nonlinear transistor amplifier. To design the amplifier model the operating point IB =
32.3A. After simulation we find the base emitter voltage VBE = 768 mV shown in
the figure 1.

Figure 1. Nonlinear Transistor Amplifier


The value of the biased current is presented in the data window by the variable
VCC.i. According to the figure 2 the VCC.i is 5.00 mA. In practice it is a negative
value due to the definition of the direction of the current. So we use the absolute
value of the VCC.i. And the base current IBB = 60 A for the VBB 767.7 mV.

Figure 2. Nonlinear Amplifier Simulation Result

3. COMPARE NONLINEAR MODEL VS. S-PARAMETER


MODEL
In the nonlinear model use the transistor pb_hp_AT-41511_19931202 in the
component library RF_Transistor. With this transistor the value of the base voltage
use the value that found out in previous solution and in the S-parameter model use
the transistor sp_hp_AT-41511_5_199212201 in the library S_Parameter. Then
simulate the model. After simulating the model we found out the comparison
between these two amplifiers. The S-parameters S(3,3), S(3,4), S(4,3) and S(4,4) for
the S-parameter amplifier and S(1,1), S(2,1), S(1,2) and S(2,2) for the nonlinear
amplifier in the figure 3. In figure 3 the S-parameter are match to each other very
collectively.

Figure 3. Nonlinear Amplifier vs. S-parameter Amplifier

Figure 4. Comparison between the Nonlinear Amplifier vs. S-parameter Amplifier

4. NONLINEAR TRANSISTOR MODEL USE VDC = 6 V AS


OPERATING VOLTAGE
To design the nonlinear transistor amplifier we are using the same nonlinear
transistor model. To maintain the biasing condition of the nonlinear transistor model
using the biasing point of the S-parameter model with VCE = 5 V, ICE = 5 mA and
VDC = 6 V as an operating voltage of this design. In the schematic, the DC voltage
VDC was changed to 6 V instead of 5 V. This was because of the voltage drop
caused by the resistors RC1 and RB1. The voltage drop is given as:
Vdrop = ICE * Rtotal
Rtotal = (RC1 * RB1) / (RC1 + RB1)

(1)
(2)

Where, RC1 = 199.983 and RB1 = 5121.12. From equation (2),


Rtotal = 192.4670

(3)

From equation (1),


Vdrop = 0.9623 V
VCE = VDC Vdrop = 5.03 V

(4)
(5)

This is the reason to use the voltage VDC of 6 V instead of 5 V.

Figure 5. Nonlinear Amplifier using VDC of 6 V

Figure 6. Simulation Result after Optimizing the Value

10

5. DESIGN THE AMPLIFIER WITH MINIMUM NOISE


FIGURE OF THE S-PARAMETER TRANSISTOR
With this amplifier the constant noise circles, reflection coefficient S11 & S22 and
the reflection coefficient Sopt that is calculated to give the minimum noise figure of
the S-parameter transistor model. Also calculate the gain of S21 in dB and minimum
noise figure NFmin in dB and effective noise resistance Rn. The amplifier with Sparameter transistor and VCE = 5V and IC = 5mA are shown in the figure 7.

Figure 7. Amplifier with S-parameter transistor


The figure 8 shows the graph of constant noise circles, reflection coefficients S11and
S22 and reflection coefficient Sopt. From the figure 8, we can calculate the minimum
noise figure of S-parameter transistor. Also calculate the gain of S21[dB], minimum
noise figure NFmin [dB] and effective noise resistance Rn. The frequency within the
range of 0.9 to 1.0 give the gain of 1.8 dB and minimum noise figure NFmin = 1.2 dB
and that time effective noise resistance Rn = 1.5 dB.

11

Figure 8. Gain, Minimum noise figure and effective noise resistance of S-parameter
transistor model

12

6. STABILITY OF THE S-PARAMETER AMPLIFIER


In this task the stability of the S-parameter amplifier with transistor sp_hp_AT41511_5_19921201.is used by using the Stability Schematic. The transistor is
unconditionally stable if the following Rollets condition is satisfied.

K-factor that is greater than one then the amplifier is unconditionally stable. The
stability parameter must be greater than 1 for the transistor to be unconditionally
stable. [2]

The operating frequency was changed to 900 MHz to 1 GHz and inductor L =
18nH and resistor R = 45 ohms. Then simulating the circuit and we found out the
stable circle, minimum noise figure for stable circuit. Below the schematic diagram
of S-parameter amplifier circuit is shown in figure 9. Circuit is unconditionally stable
for frequencies 990 MHz.

Figure 9: Schematic diagram stable amplifier

13
In figure 10 shows that the circuit before adding output stabilizing circuit at
frequency range 0.9 GHz to 1.0 GHz. Below the vs frequency curve is shown in
figure10.

Figure 10: vs. frequency diagram


In figure 11 shows the table that are defined the frequency, , K and B1 values.

Figure 11. Value of , K and B1


Figure 12 showing that the device is unconditionally stable for frequencies 1.0
GHz. The source stability circle shows all values of source impedance for S(22)=1.
At 970 MHz, S(22)<1, so 45 Ohms is a stable source impedance.

14

Figure 12: Source stability circle


The stable circuits vs. frequency is shown in figure 13. It is clear from the
figure 13 that the circuit is stable for the range 900 MHz to 1 GHz range and after
that it is unstable up to the frequency 970 MHz and at frequency 980 MHz the circuit
becomes stable.

Figure 13: of stabilized circuit vs. frequency response


Consequently the load and source stability circles now fall outside of Smith chart
which means all passive source and load terminations will produce stable circuit that
are shown in figure 14.

15

Figure 14: Load and source impedance stable region


The results are shown in the figure 15 in which we can found the minimum noise
figure and gain S2. In figure 15, minimum noise figure NFmin = 1.235 with stable
circuit NFmin = 1.264. The gain S21= 13.757 dB with stable circuit S21 = 13.722.

Figure 15. Result of minimum noise figure and gain S21


In figure 16 shows that the Sopt value in polar form. The value of Sopt =
0.245<57.295 at frequency 1.0 GHz.

Figure 16. Value of Sopt in polar formss

16

7. INPUT AND OUTPUT MATCHING


We can match the input and output circuit to stable the circuit. When we match the
input and output first we match the math circuit 1 to 4. Match 1 and match 2 refer to
the input matching and match 3 and 4 refer to the output matching. Here, we use the
Sopt = Source Reflection Coefficient = 0.249<57 degree. From this point we can
match the input circuit match 1 and match 2 respectively according to the figure 17
and figure 18. We found the series capacitor value is 1.59 pF and then added the
parallel inductor value is 7.55 nH.

Figure 17. Adding Capacitor to the Input Matching

Figure 18. Matching the Input Circuit


From the Sopt we can calculate the output reflection coefficient. Then we can
match the output circuit match 3 and 4 respectively. For the output impedance

17
matching we added capacitor in series which value is 1.59 pF and then added the
parallel inductor of value 3.58 nH that is shown in figure 19.

Figure 19. Matching the Output Circuit

18

8. THE WHOLE AMPLIFIER DESIGN


From the previous task we match the input and output circuit. Now we can simulate
and from this circuit we obtained the value of noise figure, gain and reflection
coefficient S11 and S22. Figure 20 depicts the overall design of matching circuit
with desired components.

Figure 20. Amplifier Design

We have found the value of S(2,2) is -0.738 dB and the value of S(1,1) is -1.460
dB which is shown in the figure 21.

Figure 21. Value of S(2,2) & S(1,1)


Frequency vs. gain of S(2,1) is shown below on figure 22 and we found the gain
value is 2.134 dB.

19

Figure 22. Frequency vs. gain of S(2,1)


The figure 23 shows the frequency vs. noise figure graph. We found the minimum
noise figure at 1 GHz frequency is 2.223 dB.

Figure 23. Frequency vs. noise figure

20

9. BONUS TASK
From the previous simulation we can the lump component to the amplifier. But in
other way we can match the circuit by using microstrip line. We can calculate the
length of microstrip line by hand theoretically. We add this calculation to the
appendix of the design exercise report 2015.
For the input matching we found the series microstrip line which length is
L1=0.144 and then the parallel length of microstrip is L2=0.186.
For the output matching the value of series microstrip length L3=0.146 and the
parallel microstrip length is L4=0.109.

21

10. CONCLUSION
From all these experiments we basically learn to manipulate the circuitry operation
on the software Advanced Design Systems (ADS). We have observed various
operation from simple bias circuit, matching the input and output circuit at different
frequency band, low noise amplifier matching circuits etc. It is very convenient to
change the parameters of different devices easily than the practical cases. From this
software we can calculate the gain of different parameters, noise figure of various
states and effective noise resistance.

22

11. APPENDIX
Input matching smith chart for problem 6:

23
Output matching smith chart for problem 6:

24
Input/Output matching value calculation for problem 6:

25

26

27
Calculation for Bonus Task of input/output matching for microstrip line:

28
Input Smith Chart for Bonus Task for matching with microstrip line:

29
Output Smith Chart for Bonus Task for matching with microstrip line:

30

12. REFERENCES
[1]

Radio Engineering I (Design Exercise Manual 2015), Design Procedure


(01/11/15), Design Exercise Manual 2015, Timo Kumpuniemi

[2]

Stability Conditions, Class Lectures, 01/11/15, Class lecture- LNA Design


Part I, Risto Vuohtoniemi.

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