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How Computers Work

Lecture 8

Asynchronous State Machines

and Metastability

How Computers Work Lecture 8 Page 1

Review:
Edge-Triggered Timing Constraints
n Edge Triggered Flip-Flop
1
clk
in out 3 4
C.L.
current state
current next
state state 5 6
next state
Q D
1133
TcdC-Q < t____ 3355
TcdC.L. < t____
TpdC-Q > t____ Tpd > t____
1144 C.L. 4466
clk
Thold
Thold
_________________ < Tcd + Tcd
C-Q C.L.

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Maximum Frequency

clk
in out
C.L.
current state
current next
state state
next state
Q D

clk Tpd
Tpdc-q
c-q++Tpd
Clock Period > ___________ Tpdclcl++Tsetup
Tsetup

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Skew

D Q C.L. D Q

clk1 clk2

Thold + Tskew
_______________________<
Thold + Tskew _______________________________
Tcd
Tcdc-q
c-q++tcd
tcdclcl
Tpd
Tpdc-q
c-q++Tpd
Tpdclcl++Tsetup
Tsetup++Tskew
Clock Period > _______________________________ Tskew

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What we will cover today:

The Trouble with Asynchronous
Inputs

in
D Q D Q out

current next
clk state state clk
Q D

clk
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A Synchronizer as Arbiter

D Q

clock clock
D D
Q Q

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What Happens Now?

CLOCK Ts Th

Nothing
Nothing
Flip-Flop Specification Says:______________________

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Buridans Ass

Buridan, Jean

Buridan, Jean (1300-58), French Scholastic philosopher, who held a theory of determinism, contending
that the will must choose the greater good. Born in Bethune, he was educated at the University of Paris,
where he studied with the English Scholastic philosopher William of Ockham. After his studies were
completed, he was appointed professor of philosophy, and later rector, at the same university. Buridan is
traditionally but probably incorrectly associated with a philosophical dilemma of moral choice called
"Buridan's ass." In the problem an ass starves to death between two alluring bundles of hay because it
does not have the will to decide which one to eat.

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The Game Show Arbiter

A B
Arbiter

A wins B Wins

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A Simpler Arbiter

AA AAwins
wins

BBwins
wins
BB

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With Both Inputs High

H

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Static Metastability
Vin Vout

Vin Vout R
A
i C
Vout = Vin
Vout > Vin
Vout

Vout < Vin

Vin

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Static Metastability:
Inverted Pendulum Analogy
Potential Energy
(mgh)
m

h
angle
left up right

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What does Heisenberg Say ?

x p > h

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What if we relax accuracy?

Who Won

0 Ta - Tb

Arbiter output perfectly correct if | Ta - Tb | > Tmargin

if | Ta - Tb | <= Tmargin, output can be RANDOM

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The Remarkable Fact

The perfect arbiter:

Tmargin and Tpd finite and constant

Correct Ouput if | Ta - Tb | > Tmargin
Any Output if | Ta - Tb | <= Tmargin
Answer valid and stable after Tpd

IT IS IMPOSSIBLE TO BUILD ! ! ! !

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Dynamic Metastability
(More Stupid Classroom
Tricks)

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Lecture Demonstration Circuit

delay D Q

delay
To Scope

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Is It Possible to Build This?

Answer:
A B
The
Asynchronous
Yes
Arbiter: __________
Yes
Winner Done

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Practical Metastability

Async. FSM
Inputs

Clock

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A Simple Model of Static Metstability

Assume Vout = A Vin (i.e. not saturated)
R
Vin Vout
i= (A
(A- -1)1)Vin
Vin/ /RR
A

i C

Vout

1 EEt t(A(A- -1)1)/ (/ (RRCC) )

Vin(t) =
Vin

-1

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Evolution of Vout

Vout
1

time

-1
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How Small must Vin(0) be

to make time to saturation take longer
than time t?

1
Vin ( t ) = Vin ( 0 )e t / =
A

Vin ( 0 ) = 1/(A t/tau -t/tau

1/(Aee t/tau) )==ee -t/tau/ /AA

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If Vin(0) is uniformly distributed:

Vin

1/(A t/tau -t/tau

1/(Aee t/tau) )==ee -t/tau/ /AA
p metastable (t) = __________________________
But if Vin is in linear rise/fall a certain fraction
(p transition) of the time:

Vin

pptransition /(A e t/tau

p metastable (t) = __________________________ ) )==(p
t/tau / A) e -t/tau
-t/tau
transition /(A e (ptransition
transition / A) e

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How much time do we need

to achieve a certain pmetastable?

Ptransition t /
Pmetstable (t ) = e
A
Ptransition
e t / =
A Pmetstable (t )
Ptransition
t = ln( )
A Pmetstable (t )
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Example:
How Long for 1 failure / year?
100 MHz Clock (t = 10 ns) P
Pmetstable = transition e t /
ptransition = 0.1 A
A = 10 P
t = ln( transition )
A Pmetstable
= 1 ns
Pmetstable = 1 / (100MHz . 1 year)
= 1 / (108 x x 10 7 ) = x 10 -16

t = 10 -9 ln( 0.1 / (10 x x 10 -16 ) ) = about 31 ns

How about 10 years instead of 1?

t t==(10^-9)ln(pi
(10^-9)ln(pixx10^(-15))
10^(-15))==33ns
33ns
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How often will failures

occur if we wait 100 ns?
Ptransition t /
Pmetstable (t ) = e
A
100
0.1 100
= e = 10 2 10 ln(10 )
10
10 45.4
At 100 MHz, this is about 1 failure every 1030 YEARS!
Age of Hominids: 10 7
10 7
Age of Earth: 10 9
10 9
Age of Universe: 10 1010
10
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Is this a Good Excuse

For Cruising a Light?

You 30
Youget
get10
10 30Years!
Years!

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What did we Learn Today?

If we violate setup or hold times, a flip-flop can give a random
digital output.
If we violate setup or hold times, we cant bound the propagation
delay of a flip-flop.
Metastability usually causes strange outputs, but flip-flops are
sold that have valid, stable, outputs while internal nodes are
metastable. They can still change their minds when coming out
of metastability.
In practice, we can choose a propagation time that will have a
forever stable output most of the time.
If we wait long enough (typ. 10-100 ns) most of the time is
almost all of the time.
We can easily detect when settling happens, but we cant say
how long it will take.
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