COMPUTER ARCHITECTURES
COMPUTER ARCHITECTURE
SUBMITTED TO
MR.SYED ALI RAZA
DEPARTMENT OF COMPUTER SCIENCE
GCU, LAHORE
SUBMITTED BY
FAKHAR MUSTAFA 913-BH-STAT-09 [email protected]
ZEESHAN ALI 901-BH-STAT-09
HEDAS MALIK 109-BH-BAF-09 [email protected]
THEORY SECTION
A2
TOPIC DATE OF SUBMISSION
Wednesday 9 June 2010
(Topic and Group members’ submission)
And
Wednesday 23 june2010 (Term paper submission)
Table of Content
1
COMPUTER ARCHITECTURES
Introduction to Topic 3
1. The CPU 3
1.1 the arithmetic logic unit 4
1.2 Main Memory
4 1.2.1 RAM
5 1.2.1.1 DRAM
5 1.2.1.2 SRAM
5 1.2.2 ROM
6 2. BUS INTERCONNECTION
6 2.1 Control Bus
7 2.2 Data Bus
7 2.3 Address Bus
7 3. The I/O UNIT 8
3.1 Interrupts 8
3.2 DMA 8
4. REGISTERS 9
4.1 PC 9
4.2 IR 9
4.3 MAR 9
4.4 MBR 9
4.5 Stack Point 10
4.6 GPR 10
4.7 AX 10
4.8 BX 10
4.9 CX 10
4.10 DX 10
4.11 Address or Segment Registers 10
4.12 CS 10
4.13 DS 10
4.14 ES 10
4.15 SS 11
REFERENCES 12
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COMPUTER ARCHITECTURES
INTRODUCTION TO TOPIC:
In 1951, Van Neumann and his team proposed a design of a stored programmed
computer. According to his design as sequence of instructions (called a Program) and
the data are stored in the memory of the machine. The machine reads the instructions
one by one and executes these instructions accordingly. This seemingly simple design is
proved to be very powerful and general purpose. it is basis of most modern day
computers .
If we consider the architecture of the modern
stored program machine the following are most important components are
CONTROL UNIT (CU)
ARITHEMATIC AND LOGICAL UNIT(ALU)
MAIN MEMORY
I/O UNIT
BUS INTERCONNECTION
The figure given below shows clearly the main components in the architecture of the
computer.
DATA BUS
MEMORY INPUT/OUTPUT
CPU
ROM RAM DEVICES
KEYBOARD
SECONDARY
MOUSE
MEMORY
MONITOR
1. The CPU
The CPU is the brain of the computer .in terms of computing power;
the CPU is the most important element of a computer system.
The CPU is the centrally located on the motherboard.
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COMPUTER ARCHITECTURES
Since the CPU carries out a large share of the work in the computer, data pass
continually through it. The data come from the RAM and the units (keyboard, drivers
etc).After processing, the data is send back to RAM and the units.
On large machines, CPUs require one
or more printed circuit boards .On personnel computers and small workstations; the
CPU is housed in a single chip called a microprocessor. Two typical components of a CPU
are;
1.1 The arithmetic logic unit (ALU)
The ALU part of a computer that performs all arithmetic computations, such
as addition and multiplication and all comparison operations. The ALU is one component
of the CPU.
1.2 Main Memory
As mentioned earlier, a computer executes a program in its main memory,
which is another very important component of the stored program computer. A
computer cannot work without having some kind of main memory in it.
CPU
CONTROL UNIT
(CU)
ARITHEMATIC
/LOGIC UNIT
(ALU)
MAIN MEMORY
RAM INPUT DEVICES
ROM
OUTPUT
DEVICES
SECONDARY
SORAGE
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COMPUTER ARCHITECTURES
Mostly the modern computer memory is built in the form of a chip of a semi
conductor material. It is built in the form of thousand or even millions of cells each
capable of storing a bit i-e a 0 or 1. This is shown in fig.1
These cells are logically organized into group of 8 bits called a Byte. Each
byte in the memory has a unique number assigned it is called the address of that byte.
This scheme of arranging cells into a byte and bytes into memory chip is shown in fig
Main memory
Address of IOC prgm
Butter
IOC prgm Opcod Buffer miscbits Byte Count
e address
Startio Chn# Sub
Chn#
From the figure, it is obvious that a memory is sequence of bytes. So the main memory
is direct access storage device. As no mechanical movement is involved in accessing any
byte of the memory so the main memory of the computer is very fast as compared to
other storage devices like the magnetic and optical disks. There are two main memories.
1.2.1 RAM
It is usually build by using two different technologies.
1.2.1.1 DRAM
DRAM stand for random access memory, a type of memory used in most
computers. Dynamic Random Access Memory must have an electric current to maintain
electrical state.
1.2.1.2 SRAM
In SRAM technologies, the memory cells are made form digital gates and each
cell can hold its value without any need to refresh the data as long as the power is
supplied to it. As no refreshing is required to SRAM, these chips are faster than the dram
chips also utilize less power. Because of these reasons the design of SRAM chip is more
complex than the design of DRAM chips. Hence the SRAM chip is more expensive than
the DRAM chip. In most modern computers this technology is used to build very fast
memory inside a CPU. This memory is known as the cache memory. Cache memory
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COMPUTER ARCHITECTURES
usually has a very small size as compared to the main memory in the computer system.
CPU
Cache
memory
Main
memory
Memory Arrangement
1.2.2 ROM
The manufacturer of the ROM writes the data and programs permanently
onto it and this data and programs cannot be changed afterwards. ROM contains
frequently used instructions and data. Other forms of ROM are
PROM (Programmable Read Only Memory)
EPROM (Erasable Programmable Read Only Memory)
EEPROM (Electrically Erasable Programmable Read Only
Memory)
2. BUS INTERCONNECTION
We know that a computer consists of a CPU, Main Memory and I/O unit.
These components are interconnected by using a set of parallel lines Conducting Wires.
Each of these lines can be used to transfer a sequence of bits from one component of the
computer to the other component. This set of parallel lines is called BUS
CENTRAL CB
Clock UNIT
Electronic
clock pulse MEMORY
Microprocessor AB
Arithmetic
Logic Unit DB
BUS INTERCONNECTIOS
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COMPUTER ARCHITECTURES
The bus used to connect the main components of a computer is called the system bus.
General purpose computers have a 70-100 line system bus. The system bus is divided
into three main categories.
2.1 CONTROL BUS (CB)
These lines are used to transmit different commands from one
component to the other. For example, if the CPU wants to read data from the main
memory; it will use the control bus to send the memory read command to the main
memory of the computer; the control bus is also used to transmit other controls signals
like ACKS (Acknowledgement signals). For example when CPU give a command to the
main memory for writing data, the memory send a acknowledgement signal to the CPU
after writing data, the data successfully so that the CPU can move forwards and perform
some more actions.
2.2 DATA BUS (DB)
On the system bus 32 or 64 lines are reserved to transfer data from one
component to the other. These lines are commonly known as the data bus. A 64-line
data bus can transfer 64 bits of data simultaneously so it is not difficult to see that the
width of the data bus has a direct impact on the performance of the computer.
2.3 ADDRESS BUS
As we know that many components are connected to one another
through the system so it is important to assign a unique ID to each component. This ID is
called the address bus of that component. When a computer component wants to
communicate with another, it uses a few of the system bus lines to specify the
destination component by using its address. These lines are commonly known as the
address bus. Not only the address is used to identify different components of a system
but it is also used to specify different memory locations with in the main memory.
As the number of components connected to the system bus increases
more components will be trying to use the system bus simultaneously. This will slow
down the computer as component will have to wait longer to get access to the bus. To
solve the problem only the major components of the computers are connected to the
system bus and remaining components are connected to another bus usually known as
the expansion bus. This is shown in the figure below
MAIN MEMORY EB
EXPANSION
SLOT CU ALU
EXPANSION
REGISTERS SLOT
EB
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COMPUTER ARCHITECTURES
Expansion Bus
3. The I/O UNIT
The I/O Unit is another very important component of a computer. Now
days we have many input/output devices like keyboard, mouse, disks etc. All these
devices are very different from another in their organization. Also these devices can
handle different data-transfer rates and support different data formats. Because of all
these differences it is impractical to connect all these devices directly to the system bus.
It is not sensible to require the CPU to control these devices directly as they will take a
lot of CPU time and will fill the system bus capacity.
To avoid these difficulties, a special hardware component I/O unit is used.
Only the I/O unit is connected to the bus and the processor and all other devices are
connected to it as shown in figure below.
CPU RAM I/O
DATA BUS
ADRESS BUS
Hardware Components
The I/O unit is responsible for keeping the track of states of different
devices attached with it. It is also responsible for compensating the speed difference
between the processors and I/O devices.
3.1 INTERRUPTS
In this scheme the processors issues of the command to the I/O devices.
When the devices get ready, these generate an interrupt signal for the processors. On
sensing this signal, the processors suspend all other processing and perform the I/O
operation. The disadvantage of this scheme is that it reduces the overall performance of
the processors.
3.2 DMA
The second scheme is DMA. In this scheme the processor issue the I/O
command and then gets busy in some other useful task. The special hardware gets the
data from I/O device and uses the system bus to place if in the main memory. It is useful
to note that the data is transfused when the processor does not need the system bus.
So the processor does not have to wait for the I/O operation to complete. The
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COMPUTER ARCHITECTURES
disadvantage of this scheme is that it is more complex and extensive as more hardware
is needed.
4. CPU REGISTERS
The program is stored in the main memory of the computer contiguous
memory locations. The data is also located in the computer’s memory before the
processing starts and then the control is given to the CPU.
The CPU needs storage areas where the data can be stored temporarily.
As these storage areas are use frequently, so for efficiency these special purpose
temporary storage areas are provided within the CPU for enhancing the performance of
the CPU.These special purpose areas are called registers.
XMM0 G EAX
79 0
P
R
CPU Registers
XMM7 4.1 PC EDI (Program
XMM8 RS Counter)
T h i s r e g i s t
soon this instruction is fetched, its value
is incremented so that it still has the
address of next instruction.
4.2 IR (Instruction Register)
Once the instruction is fetched it is
stored in IR where this instruction is
XMM15 R15 decoded,
4.3 MAR (Memory Address Register)
When the CPU wants to store some data in then memory or reads
the data from the memory, it places the address of the required memory location in the
MAR.
4.4 MBR (Memory Buffer Register)
The CPU this register to store data coming from the memory or
going to the memory.
4.5 STACK POINTER
To understand the purpose of this register it is important to
understand a very important data structure called a Stack.
4.6 GPR (General Purpose Registers)
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COMPUTER ARCHITECTURES
These registers are called EAX, EBX, ECX, and EDX and can be
used for arithmetic and data movement purpose. Each can be divided into an upper
case and lower byte called AH, AL, BH, BL, CH, CL, DH, and DL respectively. A stand for
Accumulator, B for base, C for count and D for data. Each of these registers can
alternately be used as one byte, two byte, or four byte registers, AL (1 byte), AH (1
byte), AX ( 2 byte), EAX (4 byte). We can process 16 bit or 8 bit.
4.7 AX (Accumulator Register)
Use for arithmetic and data operations.
4.8 BX (Base Register)
Used for arithmetic and data movement and special addressing
abilities.
4.9 CX (Counter Register)
Used for counting purpose
4.10 DX (Data)
Has special role in division and multiplication.
4.11 Address and Segment Registers
The address or segment register is a group of 4, some time
registers named CS, DS, ES, SS. The segment registers use as base location for program
instruction, data, and the stack.
4.12 CS (Code Segment)
The CS register holds the base location of all executable
instructions (code) in the program.
4.13 DS (Data Segment)
The Ds register is default baser location for memory variables. The
CPU calculates the offsets of variable using the current value of DS
4.14 ES (Extra Segment)
The extra segment is an additional base location for the memory
variables.
4.15 SS (Stack Segment)
The SS registers contains the base location of the current program
stack.
Each has 2-byte. These registers are called segment registers
and are used in conjunction with either the IP registers or two index registers DI and SI
to address various areas of computer memory. CS is the primary registers or two index
register use to fetch instruction in conjunction with the IP register. DS is the primary
register, used to point out data in the computer memory along with the DI or SI
registers.
Code Segment(CS)
hhhh
Data Segment(DS)
hhhh
Extra Segment(ES)
hhhh 10
Stack Segment(SS)
hhhh
COMPUTER ARCHITECTURES
11
COMPUTER ARCHITECTURES
REFERENCES
12
