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Cmos Report

This document is a project report on the design of a 2-bit arithmetic logic unit (ALU) using CMOS logic with a decoder. It was submitted by three students to fulfill the requirements for a Bachelor of Technology degree. The report introduces the project, which aims to design and implement the transistor-level circuit and layout of a 2-bit ALU that can perform four logic and arithmetic operations. It will use DSCH2 and MicroWind software to design the circuit using CMOS transistors and minimize the layout area. The report includes chapters on the introduction, project description, design rules, results, advantages/disadvantages, and applications.

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Naveen Kumar
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0% found this document useful (0 votes)
273 views25 pages

Cmos Report

This document is a project report on the design of a 2-bit arithmetic logic unit (ALU) using CMOS logic with a decoder. It was submitted by three students to fulfill the requirements for a Bachelor of Technology degree. The report introduces the project, which aims to design and implement the transistor-level circuit and layout of a 2-bit ALU that can perform four logic and arithmetic operations. It will use DSCH2 and MicroWind software to design the circuit using CMOS transistors and minimize the layout area. The report includes chapters on the introduction, project description, design rules, results, advantages/disadvantages, and applications.

Uploaded by

Naveen Kumar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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A

Project Based Lab Report On


Design of 2-BIT ALU using CMOS logic with a Decoder
Submitted in partial fulfilment of the
Requirements for the award of the Degree of
Bachelor of Technology
In
Electronics & Communication Engineering

By

CH ADITYA (Id. No-150040169)


CH NAVEEN KUMAR (Id. No-150040176)
CH LAKSHMI SUSHMA (Id. No-150040178)

Under the guidance of


Mr. V. Narasimha Nayak
Asst. Professor, Dept. of ECE

Dept. of Electronics and Communication Engineering,


K.L. UNIVERSITY

Green fields, Vaddeswaram-522502, Guntur


Dist.
2016-17

K L University E.C.E 1
K L UNIVERSITY
DEPARTMENT OF ELECTRONICS AND COMMUNICATION
ENGINEERING

CERTIFICATE

This is to certify that this project based lab report entitled Design of 2-BIT ALU
using CMOS logic with a Decoder is the bonafide work carried out by Ch
Aditya (150040169), Ch Naveen Kumar (150040176) and Ch Lakshmi Sushma
(150040178) in partial fulfilment of the requirement for the award of degree in
Bachelor of Technology in Electronics and Communication Engineering during
the academic year 2016-2017.

Signature of the Project Guide Signature of the Course Coordinator

K L University E.C.E 2
ACKNOWLEDGMENT

We would like to place on record the deep sense of gratitude to Dr. L S S Reddy, the honourable
Vice Chancellor, K L University for providing the necessary facilities to carry the concluded project
based work.

We express our gratitude to Dr. A S C S Sastry, HOD, for providing us with adequate facilities, ways
and means by which we are able to complete this project based work.
Our sincere thanks to Mr. V. Narasimha Nayak in the Lab for their outstanding support throughout
the project for the successful completion of the work.
Last but not the least, we thank all Teaching and Non-Teaching Staff of our department and
especially our classmates and my friends for their support in the completion of our project based
work.
We express our sincere thanks to our parents for providing us with all the facilities, care and love
throughout the years

Place: K L University
Date: 11-04-2017

S. No Name of the Student Id no

1 Ch Aditya 150040169

2 Ch Naveen Kumar 150040176

3 Ch Lakshmi Sushma 150040178

K L University E.C.E 3
INDEX

S.NO CONTENTS PAGE NO

1. Abstract 5

2. Chapter 1: Introduction 6

3. 1.1 IC Technologies 8

4. Chapter 2: Description of project 10

5. 2.1 ALU 10

6. 2.2 Working of ALU 10

7. 2.3 Decoder 11

7. 2.4 CMOS technology 12

8. 2.5 Truth table 12

9. 2.6 Circuit 13

10. Chapter 3: Design Rules 14

11. Chapter 4: Results 18

12. Chapter 5: Advantages & Dis Advantages 19

13. Chapter 6: Application, Conclusion & Future Scope 20

14. References 21

K L University E.C.E 4
ABSTRACT

Main purpose of this report is to analysis Design and Implementation of 2 Bit ALU
Using Logic Unit. Here ALU is an arithmetic logic unit use as multi-operation, combinational-
logic digital function. This 2-bit ALU has been designed based on 2 arithmetic operations and 2
logic operations. Analysis focus on reduce the time delay so this 2-bit ALU by using the latest
version of Dsch and micro wind software where the full-adder is also designed by logic gate. In
computing, an Arithmetic Logic Unit (ALU) is a digital circuit that performs arithmetic and
logical operations. The ALU is a fundamental building block of the central processing unit
(CPU) of a computer, and even the simplest microprocessors contain one for purposes such as
maintaining timers. The two function select inputs S 1 and S 0 Specify particular arithmetic or
logic operation to be granted.

K L University E.C.E 5
CHAPTER-1

INTRODUCTION:

In this project we aim at designing and implementing the layout of a 2-BIT ALU using the
transistor level circuit and stick diagram. We implement the circuit using DSCH2 and Micro
wind software in a system. DSCH2 software is used to implement the transistor level circuit in
CMos logic.

Micro wind software is used to implement the layout of the circuit minimum possible area. The
circuit that we are implementing here is a 2-BIT ALU with four different arithmetic and logic
operations as: logic XOR, logic AND, logic OR and Arithmetic bitwise addition on two 2-BIT
input values. A 2-BIT output is generated with a carry.

The ALU (Arithmetic and logic unit) is a very widely used logic device in modern day
technology. CMOS (Complementary metal oxide semiconductor) technology is the most
widely used technology in circuit designing. It provides low power dissipation. This technology
is used in designing microprocessors, microcontrollers, static RAM, etc... Two important
characteristics of CMOS devices are high noise immunity and low static power consumption.
CMOS technology uses both nMOS and pMos transistors.

The most common description of the evolution of CMOS technology is known as


Moores law. In 1963 Gordon Moore predicted that as a result of continuous miniaturization,
transistor count would double every 18 months. The observation made by Gordon Moore was
that the number of components on the most complex integrated circuit chip would double each
year for the next 10 years. This doubling was based on a 50 60-component chip produced at
that point of time compared with those produced in preceding years. Looks surprising, but his
prediction has turned true and is being treated as a law. The speed of transistors increases and
their cost decreases as their size is reduced. The transistors manufactured today are 20 times
faster and occupy less than 1% of the area of those built 20-30 years ago. In 1971, Intel 4004
had transistors with minimum dimension of 10um and in 2003; Pentium 4 had transistors with
minimum dimension of 130 nm. Having crossed 90nm, 65nm technological nodes, 32 nm and
22nm technology is in the pipeline. 53% compound annual growth rate is achieved over 45
years. No other technology has grown so fast so long. Transistors have become smaller, faster,
consume less power, and are cheaper to manufacture. It seems intuitively obvious that scaling
cannot go
on forever because transistors cannot be smaller than atoms. In principle, MOS is better in
terms
K L University E.C.E 6
of power consumption. MOS devices work with only switching voltages; current per se is not
needed for the operation. MOS circuits do have lower power consumption; but they are also
slower than their bipolar colleagues. Initially, NMOS got wider acceptance but with the
increase in integration density, power consumption again became a problem. Afterwards, in
eighties, CMOS processes were widely adopted. Present day chips would not exist if the
CMOS technique would not have been implemented around the late eighties.

The first integrated circuits hitting the markets in the seventies had a few 100 transistors
integrated in bipolar technology. Even though the principles were well known, MOS arrived in
the markets several years later. One of the reasons behind this was the inherent instability of the
MOS transistors due to the presence of minute amounts of alkali elements in the gate dielectric.
This caused the threshold voltage of the transistor to shift during the operation. However, soon
the problems of high power consumption by bipolar circuits became dominant. Even in the case
of all transistors being OFF, the sum of the leakage current in bipolar transistors is fairly
large. To provide a solution for the problem of power consumption, MOS technology
eventually made
its way. Dimensions of MOS devices can be scaled down more easily than other transistor
types.
K L University E.C.E 7
1.1. IC TECHNOLOGIES
Silicon IC technologies can be primarily classified under three types:
1. Bipolar
Bipolar transistors have npn or pnp silicon structure. In these transistors, small current into very
thin base layer controls large currents between emitter and collector. Base currents limit
integration density of bipolar devices.

2. Metal Oxide Semi-conductor (MOS)


MOS is further classified under PMOS (P-type MOS), NMOS (N-type MOS) and CMOS
(Complementary MOS). MOS derives its name from the basic physical structure of these
devices; MOS devices comprise of a semiconductor, oxide and a metal gate. Nowadays,
polysilicon is more widely used as gate. Voltage applied to the gate controls the current
between source and drain. Since they consume very low power, MOS allows very high
integration.

3. Bi-CMOS (Bipolar CMOS technology)


Bi-CMOS Technology utilizes both CMOS and Bipolar Junction transistors integrated on the
same semiconductor chip. CMOS offers high, symmetrical noise margins, high input and low
output impedance, high packing density, and low power dissipation but speed is the only
restricting factor. In contrast, the ECL gate has a high current drive per unit area, high
switching speed, smaller propagation delay, but high power consumption makes very large
scale integration difficult.

Bi-CMOS has made it possible to combine CMOS transistors and bipolar devices in a single
process at a reasonable cost to achieve the high-density integration of MOS logic with the
current-driving capabilities of bipolar transistors.

K L University E.C.E 8
SOFTWARE USED
1.2.1 DSCh2 Software:
DSCH program is a logic editor and simulator.
DSCH is used to validate the architecture of the logic circuit before the microelectronics design
is started.

It also features the symbols, models and assembly support for 8051 and 16F84 controllers.

Designers can create logic circuits for interacting with these controllers and verify software
programs using DSCH.

1.2.2 MICROWIND Software:


Micro wind is a truly integrated EDA software encompassing IC designs from concept to
completion, enabling chip designers to design beyond their imagination.

Micro wind integrates traditionally separated front-end and back-end chip design ito an
integrated flow, accelerating the design cycle and reducing design complex.

Colour specifications in Micro-wind software are:


Red Polysilicon
Blue Metal 1

Yellow P diffusion
Dark blue Metal 2
Green N diffusion
Black Contact cuts

K L University E.C.E 9
CHAPTER-2
DESCRIPTION OF PROJECT:
2.1 Arithmetic Logic Unit
An Arithmetic and logic unit (ALU) is a digital logic circuit used to perform arithmetic and
logic operations. It represents the fundamental building block of the Central Processing Unit
(CPU). The inputs to the ALU are the data to be operated on are called operands. The ALus
output is the result of the performed operation. In many designs, the ALU also exchanges
additional information with a status register, which relates to the result of the current of
previous operations.

2.2 Working of ALU:


An ALU can be designed to perform any series of complicated arithmetic and/or logical
operations on the given inputs. It is the computational capacity of the ALU that determines the
power of the computer systems CPU. The number of operations that can be performed by the
ALU depends on the number of selection lines, typically a general purpose ALU can perform
16
Arithmetic/logic operations. In this project we are performing 4 operations namely: logic XOR,
logic AND, logic OR and arithmetic bitwise addition.

An ALU is a combinational logic circuit, meaning that its outputs will change asynchronously
in response to input changes. In normal operation, stable signals are applied to all of the ALU
inputs and, when enough time has passed for the signals to propagate through the ALU
circuitry, the
result of the ALU operation appears at the ALU output.
K L University E.C.E 10
2.3 Decoder:
In digital electronics, a binary decoder is a combinational logic circuit that converts a binary
integer value to an associated pattern of output bits. They are used in a wide variety of
applications, including data demultiplexing, seven segment displays, and memory address
decoding.

There are several types of binary decoders, but in all cases a decoder is an electronic circuit
with multiple input and multiple output signals, which converts every unique combination of
input states to a specific combination of output states. In addition to integer data inputs, some
decoders also have one or more "enable" inputs. When the enable input is negated (disabled),
all decoder outputs are forced to their inactive states.

Depending on its function, a binary decoder will convert binary information from n input
signals to as many as 2n unique output signals. Some decoders have less than 2n output lines; in
such cases, at least one output pattern will be repeated for different input values.

A binary decoder is usually implemented as either a stand-alone integrated circuit (IC) or as


part of a more complex IC. In the latter case the decoder may be synthesized by means of a
hardware description language such as VHDL or Verilog. Widely used decoders are often
available in the
form of standardized ICs.

K L University E.C.E 11
2.4 CMOS Technology:
Complementary metal oxide semiconductor is a technology for constructing integrated circuits.
CMOS technology is used in microprocessors, microcontrollers, static RAM, and other digital
logic circuits. CMOS technology is also used for several analog circuits such as image sensors,
data converters and highly integrated transceivers for many types of communication. CMOS
was patented by FRAN WANLASS in 1963.

The typical design style in CMOS is complementary and symmetrical pairs of p-type and n-
type metal oxide semiconductor field effective transistors (MOSFETs) for logic functions.

Two important characteristics of CMOS devices are high noise immunity and low static power
consumption. Since one transistor of the pair is always off, the series combination draws
significant power only momentarily during switching between on and off states.

CMOS logic has number of desirable characteristics:


1. High input impedance. The input signal is driving electrodes with a layer of insulation between
them and what they are controlling.

2. The output actively drive both ways.


3. The outputs are pretty much rail-to-rail.
4. CMOS logic consumes very little power when held in a fixed state.
5. CMOS gates are very simple. The basic gate is a inverter, which is only two transistors. This
together with low power consumption means it lends itself well to dense integration.

2.5 TRUTH TABLE:

S1 S2 O/P

0 0 A&B

0 1 A^|B

1 0 A+B

1 1 A-B

K L University E.C.E 12
2.6 CIRCUIT:

Figure 2.5
CHAPTER-3

K L University E.C.E 13
DESIGN CHAPTER-3
RULES
3.1. STICK DIAGRAM
RULES:
Stick diagrams are a means of capturing topography and layer information using simple
diagrams. Stick diagrams convey layer information through color codes (or monochrome
encoding). These act as an interface between symbolic circuit and the actual layout.

Stick diagram
notations:

Meta

1----

Poly

------

n-diffusion------

p-diffusion-------

R
u
le
1
:
When two or more sticks of the same type cross or touch each other that represents
electrical
c
o
nt
a
ct
.
R
u
le
2
:
When two or more sticks of different type cross or touch each other there is no
electrical
contact. (If electrical contact is needed we have to show the connection
explicitly).

K L University E.C.E 14
Rule 3:
When a poly crosses diffusion it represents a transistor. If a contact is shown then it is not
a transistor.

Rule 4:
In CMOS a demarcation line is drawn to avoid touching of p-diff with n-diff. All pMOS must
lie on one side of the line and all nMOS will have to be on the other side.

K L University E.C.E 15
3.2. DESIGN RULES OF LAYOUTS:
LAMDA BASED RULES (n-MOS and CMOS)

K L University E.C.E 16
K L University E.C.E 17
CHAPTER-4

RESULTS

K L University E.C.E 18
CHAPTER-5

ADVANTAGES & DISADVANTAGES:

5.1 ADVANTAGES:

2-bit ALU has minimum delay time to implementation.


Minimize the logic gate.
Less expensive due to using minimum gate.

5.2 DISADVANTAGES:

Complex circuit diagram.


To implement 2 bit ALU we need 4-bit input, but according to 4 bit being just logic, ALU
require all the inputs to be present at once.

They have no memory. We will look at adding some next time.


Input we can implement 4, 8 bit ALU.
The OP-CODES are predefined and should be remembered.

K L University E.C.E 19
CHAPTER-6
APPLICATIONS, CONCLUSION & FUTURE SCOPE
APPLICATIONS:
The arithmetic/logic unit (ALU) contains the electronic circuitry that executes all arithmetic
logical

The arithmetic/logic unit can perform four kinds of arithmetic operations, or mathematical
calculations: addition, subtraction, multiplication, and division. As its name implies, the
arithmetic/logic unit also performs logical operations. A logical operation is usually a
comparison. The unit can compare numbers, letters, or special characters. The computer can
then take action based on the result of the comparison. This is a very important capability. It is
by comparing that a computer is able to tell, for instance, whether there are unfilled seats on
airplanes, whether charge- card customers have exceeded their credit limits, and whether one
candidate for Congress has more votes than another.

CONCLUSION:
In this project, we have successfully designed a 2-BIT ALU and implemented its corresponding
CMOS transistor level circuit. We also designed the stick diagram for 2-BIT ALU using the
CMOS transistor level circuit. We have learned how to use DSCH2 software to implement
CMOS logic and how to design stick diagrams for different logic circuits.

FUTURE SCOPE:
We implemented 2-bit ALU, but we want to work on 8-bit ALU, later on we will try to work on
32-bit or 64-bit as much we can. Our purpose is to reduce the delay time. To make the circuit
complex free and less expensive. To implement the circuit by applying latest version of the
renowned software. Minimizing the logic gate as much its possible.

K L University E.C.E 20
REFERENCES:
http://electronics.stackexchange.com/questions/26404/what-so-great-about-cmos
https://en.wikipedia.org/wiki/CMOS
http://www.microwind.net/dsch.php
http://study.com/academy/lesson/arithmetic-logic-unit-alu-definition-designfunction.html

K L University E.C.E 21

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