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Assignment 3

This document appears to be an assignment submission for an analog IC design course. It includes: 1) Plots of various transistor characteristics like threshold voltage, transconductance, and output resistance versus operating voltage. 2) Design of a common-source amplifier with a voltage gain of 50V/V, bandwidth of 200MHz, and output swing of 600mV using a 1.8V supply voltage and 10pF load. 3) Design of a source follower level shifter with a gain over 0.9V/V, bandwidth of 2GHz, and 0.8V level shift using a 1.8V supply and 10pF load. Performance is confirmed through AC analysis and step response.

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Sure Avinash
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209 views19 pages

Assignment 3

This document appears to be an assignment submission for an analog IC design course. It includes: 1) Plots of various transistor characteristics like threshold voltage, transconductance, and output resistance versus operating voltage. 2) Design of a common-source amplifier with a voltage gain of 50V/V, bandwidth of 200MHz, and output swing of 600mV using a 1.8V supply voltage and 10pF load. 3) Design of a source follower level shifter with a gain over 0.9V/V, bandwidth of 2GHz, and 0.8V level shift using a 1.8V supply and 10pF load. Performance is confirmed through AC analysis and step response.

Uploaded by

Sure Avinash
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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EE5320 ANALOG IC DESIGN

ASSIGNMENT - 3

SURE AVINASH
(EE17M046)
1) A) Vth vs L
NMOS

PMOS
B) Vgs – Vth vs Vov
NMOS
PMOS
C) gm vs Vov
NMOS
PMOS
D) gm/Id vs Vov
NMOS
W = 0.24u

W = 2u
W = 10u

PMOS
W = 0.24u
W = 2u

W = 10u
E) fT vs Vov
NMOS
PMOS
F) rds vs Vds
NMOS
PMOS
G) gm*rds vs Vds
NMOS
PMOS
2)

Design a single-stage two-transistor (excluding bias transistors) common-source amplifier with


a DC gain of Av = 50V/V, unity gain bandwidth of 200MHz, and an output swing of 600mV
(amplitude) with minimum power. Assume supply voltage of 1.8V and a load capacitance of
10pF.

AC anlaysis Results
Voltage Gain = 65.34 V/V
Unity Gain Frequency = 202MHz

Voltage swing > 600mV


3) Design a single-stage two-transistor (excluding bias transistors) source follower that level
shifts-up the input by 0.8V with a DC gain of Av > 0.9V/V and -3dB bandwidth of 2GHz with
minimum power. Assume supply voltage of 1.8V and a load capacitance of 10pF.

Schematic

Gain = 0.904V/V
3db Bandwidth = 2.07GHz
AC Analysis Results

Output when a pulse of 500mV is applied.

Time taken for Settling is 450.9ps.

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