CHARACTERIZATION OF OP-AMP

1. OBJECTIVE

 To sketch and briefly explain an operational amplifier circuit symbol and

identify all terminals
 To measure the input bias current, input offset current, input offset voltage,
input and output voltage ranges, the slew rate and bandwidth of op – amp.

2. HARDWARE REQUIRED

 Dual variable regulated low voltage DC source

 CRO, AFO, DMM (Digital Multimeter)
 Resistors
 IC741 op-amp

3. EXPERIMENTATION

Use op-amp dc power supply voltages ±12V wherever not specified

a) Input bias current and input offset current

Figure 1: Input bias and Input offset current

 Expt. 2 OPAMP INVERTING AND NONINVERTING
AMPLIFIERS
Objective :

 To study use of Opamp as inverting and noninverting amplifier with a gain = 2

 To plot frequency response and to find out bandwidth.

Hardware required :

 Dual variable low voltage regulated power supply

 CRO, AFO, DMM
 Resistors
 IC 741 Opamp

Experimentation :

Inverting Amplifier :

Design :

Gain of the amplifier ,

-R F
Av = =2
R1
Take R 1 = 100K
R F = 200K 220K

Circuit Diagram:
 Expt. 3 Op Amp Inverting and Noninverting Summer and Subtractor
Objective :

 To study use of Opamp as inverting and noninverting summer

 To study use of Opamp as subtractor.

Hardware required :

 Dual variable low voltage regulated power supply

 CRO, AFO, DMM
 Resistors
 IC 741 Opamp

Experimentation :

Inverting summer Design:

Va + Vb
V o = -R F ( )
R1 R 2
Take R 1 = R 2 = R F = 220KΩ
V o = -(V a +V b)
Take R L = 4.7KΩ
3 = R4 5
R 4+R 3
Take R 4 = 4.7KΩ
R 4+R 3 = 7.8KΩ
R 3 = 3.133KΩ 3.3KΩ

Va is a sine wave source with peak value 6V and frequency 100 Hz

Vb is a dc voltage of 3V generated from a source of 5V and voltage divider formed by 4.7KΩ

and 3.3KΩ.
Vo is expected to be inverted sine wave with peak value 6V with a dc shift of -3V, frequency
100 Hz.

Circuit diagram :
0

V2

12Vdc
7

U1
3 5
V+

+ OS2
6
OUT
0 2 1 RL
4

R1 - OS1
4.7k
uA741
V-

R3
220k
3.3k
V5
5Vdc V4 0

R2
12Vdc
R4
220k
4.7k
0 Va 0
RF
0
220k
0
 Expt No. 4 Op Amp Integrator and Differentiator
Objective :

 To study use of Op amp in Integrator and Differentiator Circuits

 To plot the frequency response of Integrator and Differentiator and also response of
the circuits for Sine, Square and Triangular inputs

Hardware required :

 Dual variable low voltage regulated power supply

 CRO, AFO, DMM
 Resistors, capacitors
 IC 741 Opamp

Experimentation :

Integrator Design :

1
f a = 33.86Hz =
2πR 1Cf
Take R 1=470KΩ Cf =0.01μF
f 1
f b= a =
10 2πR f Cf
R f = 4.7MΩ

Circuit Diagram :

0
V2

R2
12Vdc
470k
7

U1
3 5
V+

+ OS2
6
R1 OUT
2 1
V-

- OS1
470k
V3 uA741
4

V1

12Vdc
0 0
CF

10n
RF

4700k
 Expt. No. 5 Op Amp Precision Rectifier
Objective :

 To study Half and Full wave Precision Rectifier using Op Amp

 To compare performance with simple diode rectifiers

Hardware required :

 Dual variable low voltage regulated power supply

 CRO, AFO, DMM
 Resistors, IN 4007 diodes
 IC 741 Opamp

Experimentation :

Circuit diagram for Precision half wave rectifier with clipped negative half cycle :

V3

12Vdc
7

U1
3 5
V+

+ OS2
6 D1
V1
OUT
VAMPL = 1 2 1
FREQ = 50 - 4 OS1 RL
uA741 V-
10k
V2

0
12Vdc 0
0

Fig. 1 Circuit diagram of Precision half wave rectifier with clipped negative half cycle

Waveforms :

Fig. 2 Input and output waveforms of Precision half wave rectifier with clipped negative half cycle.
 Expt. No. 6 Active Filters using Op Amp
1. Objective :
 To design first and second order Low pass and high pass filters and to plot their
frequency response
 To design first order Wide band pass and Wide band stop filters and to plot their
frequency response
 To design narrow band pass and narrow band stop filters and to plot their frequency
response
2. Hardware required :
 Dual variable regulated low voltage DC source
 CRO, AFO, DMM (Digital Multimeter)
 Resistors, capacitors
 IC741 op-amp
3. Experimentation :
Design of first order Low Pass Filter :
Rf
Af = 1 + 2
R1
R f = R 1 = 10KΩ
Upper cutoff frequency f H= 900Hz
1
f H=
2πRC
For C=0.01μF
R = 17.7KΩ
Circuit Diagram :
0
0
V1

C
0.01u 12Vdc
7

R U1
3 5
V+

+ OS2
17700 6
V3
1Vac R1 OUT
2 1
4

- OS1
10k
uA741 RL
V-

0 V2 10k
0

12Vdc 0
0
RF

10k

Design of first order High Pass Filter :

Rf
Af = 1 + 2
R1
R f = R 1 = 10KΩ
Lower cutoff frequency f L= 900Hz
 Expt. No. 7 Oscillators using Op Amp
1. Objective:
To design and analyse RC Phase shift and Wein Bridge Oscillators using Op Amp
2. Hardware required:
 Dual variable regulated low voltage DC source
 CRO, AFO, DMM (Digital Multimeter)
 Resistors, capacitors
 IC741 op-amp
3. Experimentation:
Design of RC Phase shift Oscillator :
0.065
fo =
RC
f o =200Hz
For C = 0.1μF
R = 3.25KΩ
Choose R = 3.3KΩ
R F should be large
R1
R
For F = 60
R1
R 1 >> R
R 1 =10R = 33KΩ
R F = 2MΩ

Circuit Diagram :
0 0 0

R R R
3.3k 3.3k C 3.3k C
C 0
0
0.1u 0.1u 0.1u
V1
ROM
33k
U1 7
3 12Vdc
V+ 5
+ OS2
6
R1 OUT
2 1
- 4 OS1
33k V-
uA741
V2

12Vdc
0 RF

2000k

Fig. 1 Circuit diagram of RC Phase shift Oscillator

Design of Wein Bridge Oscillator :
1
fo =
2πRC
For f o = 480Hz Take C = 0.1μF
 Expt. No. 8 Multivibrators And Triangular wave generator
1. Objective : To design and analyse square wave generator(Astable Multivibrator), triangular
wave generator and monostable multivibrator using Op Amp.
2. Hardware required :
 Dual variable regulated low voltage DC source
 CRO, AFO, DMM (Digital Multimeter)
 Resistors, capacitors
 IC324 Op Amp
3. Experimentation :
Design of Square wave generator (Astable Multivibrator):
R 2 = 1.16R 1
For R 1 = 10KΩ
R 2 = 11.6KΩ
Frequency of square wave output f o= 1
2RC
For f o = 1KHz C = 0.05μF
R = 10KΩ
Circuit diagram of square wave generator :
R2

11.6k
0
V1

12Vdc
R1 4
3 V+
U1A
0 +
10k 1
C OUT
2
0 - 11
50n V-
LM324

V2

12Vdc
0
R

10k

Fig. 1 Circuit diagram of square wave generator

Design of Integrator :
For square wave generator with period T =1ms
R 3C 2 = T
For C 2 = 0.01μF
R 3 = 100KΩ
R F = 10R 3 = 1MΩ
 Expt. No. 9 Multivibrators Using 555 Timer
1. Objective : To design and analyse Monostable and Astable multivibrators using 555 timer and
to study their applications.
2. Hardware required :
 Dual variable regulated low voltage DC source
 CRO, AFO, DMM (Digital Multimeter)
 Resistors, capacitors, Transistor
 555 Timer
3. Experimentation :
Design of Monostable multivibrator :
Pulse on period t p=1.1R AC
For t p=10ms Take C = 1μF
R A = 10KΩ
Circuit Diagram of Monostable multivibrator :
+VCC

8 4 RA=10 KΩ
Trigger 2 7
6
Output 3 555 C = 1μF
1

5 C1=0.01μF
Fig. 1 Circuit diagram of monostable multivibrator

Waveforms of Monostable Multivibrator :

Fig. 2 Waveforms of monostable multivibrator

Missing Pulse detector :
+VCC

8 4 RA=10 KΩ
Trigger 2 7
6
Output 3 555 C = 1μF
1

5 C1=0.01μF

Fig. 3 Missing Pulse detector

 Expt. 10 Phase Locked Loop
1. Objective :
To study working of Phase locked loop and to verify Capture and Lock range
To implement Frequency multiplier using PLL
2. Hardware required :
 Dual variable regulated low voltage DC source
 CRO, AFO, DMM (Digital Multimeter)
 Resistors, capacitors, NPN transistor (2N2222)
 565 PLL
3. Experimentation :
Design of Lock range and capture range :
1.2
f OUT =
4R 1C1
8f
f L = ± OUT
V
fL 1/2
f C = ±[ ]
2π(3.6)(10 )C 2
3

For f OUT = 2.5KHz C1 = 0.01μF

R 1 = 12KΩ
For V = 24V
f L = 833.3Hz
For C 2 = 10μF
f C =  61Hz
Circuit Diagram: +V=+ 10 V

R1 C2
12 KΩ C3 10 μF

10 8 0.001μF
Input 2 7 Demodulated Output

6 Reference Output

3 NE565 4 VCO Output

9 1

C1= 0.01μF

-V=-10V

Fig. 1 Circuit diagram of PLL to capture and lock Input