Static Timing Analysis
Homework 3
What is the maximum frequency (in MHz) for the following circuit? What are the
constraints to avoid setup/hold violations for the given circuit?
Parameter Value
tsetup,DFF 0.2ns
thold,DFF 0.35ns
tc q,DFF
0.5ns
tAND 0.45ns
tINV 0.2ns
B
AND2 D Q
DFF
C
Clock DFF
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