EEE / INSTR F244

Microelectronic
Circuits
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 BITS Pilani
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Amplifier Basics
Mixed signal System design

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ADC- SubSystem Design

A to D Converter, D to A Converter

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Flash ADC-100 Msps

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Band width requirement of
OPAMP

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DAC

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Design issues

Diff amp, biasing circuit, CSA, C (if compensation is reqd.)

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Concepts

• Signal amplification
• Voltage/ power gain/ Power efficiency
• Gain in decibels
• Voltage transfer characteristics—power supplies,
saturation,

• Circuit models—voltage/ current transresistance/

transconductance
• Frequency response—single time constant circuits,
bandwidth

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Signals

Arbitrary in nature.

Obtained through sensors---variations converted into

current or voltage

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Sinusoid

• Important signal in analysis , design, testing

• For an LTI system, if input is sinusoid, output is
also sinusoid with modified amplitude and
phase. Hence analysis is easy

• Every natural signal can be represented as sum

of sine waves of different frequencies and
amplitude.

• Lab testing is possible

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Why amplifier first?

• Reasons—
• Fundamental signal processing function
• Employed in every electronic system
• Easy to understand
• Design techniques can be easily extended to design of
complex analog circuits.

• Similar to NOT gate in Digital Electronics

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Amplifier circuit symbol

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Amplifiers

Need- Weak signals- energy too small for reliable

processing

Requirement---Information contained in the signal should

not get changed/ Output must be exact replica of the
input.

Relation ship of amplifiers

vo(t) = A vi(t)

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Characterizing parameters

• Gain
• Voltage swing
• Linearity
• Power efficiency
• Frequency response
• Power supply and dc bias

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Analog Design tradeoffs

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Gain/ transfer characteristics (VTC)

Gain/ transfer characteristics

Voltage Gain

Current gain

Power gain

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VTC

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Information from VTC

• Highest and Lowest signal amplitude

• Gain—steepness of transition
• Inverting/ non inverting nature
• Single/ dual power supply
• Offset

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Voltage/ Power gain---

Gain in dB---10 log[ (Vo2/RL) / (Vi2/Ri)]

If RL= Ri

Gain in dB= 20 log (Vo/ Vi)

Power gain= 10 (Vo/ Vi)

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Measuring Unit---Use of
Decibel unit
The decibel, or dB, is a means of expressing either the gain
of an active device (such as an amplifier) or the loss in a
passive device (such as an attenuator or length of
cable).

The decibel was developed by the telephone company to

conveniently express the gain or loss in telephone
transmission systems.

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• Input >---- Amp #1 ---- Amp #2 ------> Output
• A1 = 275, A2 = 55
• The total gain factor At = 275 x 55 = 15,125.

• Use logarithms-
• log (A x B) = log A + log B
• log (A/B) = log A - log B

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• Invented a unit of gain measurement called a
"Bel," named after Alexander Graham Bell.

• They defined the Bel as

Gain in Bels = log A = log (Po / Pi )

where A = Power amplification factor

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• log 275 = 2.4393326 and
• log 55 = 1.7403626,

15,125

• so the total gain in our cascade is

• 2.4393326 + 1.7403626 = 4.179,695,289 Bels

• Rounding problem---
• 4.179 Bels15124.99----4.2 Bels15,849
• 5% error

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• it was decided to express power gain in units
which were equal to one-tenth of a Bel, or in
deci-Bels

• 1 Bel=10 decibels

• Gain in decibels (dB) = 10 log A

• 2.4393326 + 1.7403626 = 4.179,695,289 Bels

• 24.39 + 17.40 = 41.79 decibels = 15,101

• 41.79 dB is a power gain of 15,101

• while 41.8 dB is a power gain of 15,136, so the error is

only 0.23%. Bits, pilani
Linearity

• Amplifier follows a relationship.--- linear

amplifier
• vo(t) = A vi(t)
• Any deviation (higher powers of vi) ---
nonlinear distortion

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THD
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Amplifier Power Supplies

• Important part of the circuit

• Power balance equation---
• Pdc + Pin = P load + P dissipated
• Maximum power must be delivered to the
load
• Figure of merit---Amplifier Power efficiency

PL
 100
Pdc
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Classes of amplifiers

Class A----ηmax = 25 %
Class B (~70%)
Class AB (~70%)
Class C (~80%)
Class D (~100%)

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Example1-

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 Vcc vout

Q
Vcc/2

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Practical VTC is non linear--
Saturation, varying slope

output will be distorted

--Operate at a point where VTC is

close to linear-middle
--Keep input small

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Frequency Response
Frequency response-
bandwidth
• Ideal frequency response---gain does not
change with frequency

• Practical frequency response

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 Poles, Zeros and Bode Plots
Characterization:
K ( s  z1 )( s  z 2 ) ... ( s  z m )
G (s) 
s  ( s  p1 )( s  p2 ) ... ( s  pn )
s s s
(  1)(  1) ... (  1)
K  z1 z 2 z m  z1 z2 zm
G (s) 
 p1 p2 pn  s  ( s  1)( s  1) ... ( s  1)
p1 p2 pn
K  z1 z 2 z m 
KB 
 p1 p2 pn 
( z1s  1)( z 2 s  1) ... ( zm s  1)
G (s)  K B
s  ( p1s  1)( p 2 s  1) ... ( pn s  1)
(Time Constant Form.)
Characterization:
Considering the transfer function in the time constant form.
we have 4 different types of terms in the time constant form,
these are:
1 1
KB , , , (s / z  1)
s (s / p  1)
Expressing the transfer function dB:
j
KB (  1)
G ( jw)  z
 j
(j )(  1)
0 p
20 log | G ( j ) |
j  j
 20 log K B  20 log | (  1) | 20 log | j | 20 log | 1|
z o p
 Mechanics: We have 4 distinct terms to consider:

20logKB ----- ( constant gain in time constant format)

- 20log|j /ω0 | ----- (Pole at origin if wo=1)

- 20log|(j  /1 + |p|) ------ (Pole at 0 = p )

20log|(j/1 ±z)| ----- (zero at 0 = z )

wlg
 1 1 1 1 1 1

This is a sheet of 5 cycle, semi-log paper.

This is the type of paper usually used for
preparing Bode plots.

dB Mag
Phase
(deg)

wlg

 (rad/sec)
Frequency response plots

• Different types of transfer functions---

• K

w 1 jw 1
j w 1 jw
wo j wo 1
wo wo

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K constant
Gain in dB

Log w

Ө= 0

Log w
jw/wo
Gain in dB

20 dB/ dec

wo
Log w

Ө= 90

Log w
-j wo/w = 1/ [jw/wo]
, pole at the origin, jw/w
w0=1 o

Gain in dB

20 dB/ dec

Log w
wo rad./ sec

For a pole at the origin draw a line with a slope of -20

Ө dB/decade that goes through 0 dB at 1 rad/sec

Log w

Ө= -90
1+ j (w/wo)
Gain in dB
Corner plot

20 dB/ dec

wo
Log w
Corner frequency
Ө

90

45
Ө= tan-1 (w/wo)

0.1 wo Log w
~10 wo
Magnitude and phase

jw
1
wo
1 / [1+ j (w/wo)]
Gain in dB

wo
Log w

20 dB/ dec

Ө
Ө= -tan-1 (w/wo)
~0.1 wo
Log w
-45

-90
~10 wo
 Using Matlab For Frequency Response
Instruction: We can use Matlab to run the frequency response for the
previous example. We place the transfer function in the
form:
5000 ( s  10) [ 5000s  50000 ]

( s  1) ( s  500) [ s 2  501s  500]

The Matlab Program

num = [5000 50000];

den = [1 501 500];
Bode (num,den)
Using Matlab For Freq. Response

Instruction: We can use Matlab to run the frequency response for the
previous example. We place the transfer function in the
form:
5000 ( s  10) [ 5000s  50000 ]

( s  1) ( s  500) [ s 2  501s  500]

The Matlab Program

num = [5000 50000];

den = [1 501 500];
Bode (num,den)
 Bode Diagrams

From: U(1)
40

30

20
Phase (deg); Magnitude (dB)

10

-10
1 10 100 500
0

-20

-40
To: Y(1)

-60
100(1  jw / 10)
Bode for: G ( jw) 
-80 (1  jw)(1  jw / 500)
-100
10-1 100 101 102 103 104

Frequency (rad/sec)

G( j)  tan1 ( / 10)  tan1 ( / 1)  tan1 ( / 500)

Initial angle=00 and final angle -900
Evaluating the frequency response
• Single time constant circuits

Vo (s) = 1/ [1+sCR] vi (s) Vo (s) = sCR/ [1+sCR] vi (s)

[vo./ vi]= K / [1+{s/wo}] [vo./ vi]= K s / [1+{s/wo}]

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Amplifier circuit models

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Amplifier circuit models-
analysis tools
Amplifiers must be characterized for its terminal behavior
first to be used as block in system design

For analysis purpose, complex circuits are replaced by their

(models)--- simple circuits

Voltage amplifier model (v,v)

Current amplifier (i,i)

Trans-conductance (v,i)

Trans-resistance (i,v)
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Use 2 port network theory

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 Z parameter model

1/21/2019 Anu Gupta BITS PILANI

CLASSIFICATION OF AMPLIFIERS
Voltage amplifier

Ro

+ + +
vi Ri vo
Avvi
- -
-

Using the voltage divider rule open circuit voltage gain is

Av = vo/vi|io=0
Unit (V/V)
Ideal conditions: R0 = 0 Ri =  condition for no loss
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Current amplifier
ii io

+ +
Ri Aivi Ro vo
- -

Short-Circuit current gain

Ais = io/ii |vo=0
Unit (A/A)
Ideal conditions Ri = 0 ; R0 = 

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Trans-conductance amplifier
io
+ +
vi Ri Ro vo
Gmvi
- -

Short-Circuit Transconductance
Gm = io/vi |vo=0
Unit (A/V)
Ideal conditions Ri =  ; R0 = 

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Trans-resistance amplifier
ii Ro

+
Ri vo
Rmii
-

Open-Circuit Transresistence
Rm = vo/ii |io=0
Unit (V/A)
Ideal conditions Ri = 0 ; R0 = 0

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Relations between parameters

Av0 = Ais(Ro /Ri)

Av0 = GmRo

Av0 = Rm/Ri

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Bipolar Junction Transistor

 BJT
• The bipolar junction transistor, unlike other transistors, is
usually not a symmetrical device. This means that
interchanging the collector and the emitter makes the transistor
leave the forward active mode and start to operate in reverse
mode.
• Because the transistor's internal structure is usually optimized
for forward-mode operation, interchanging the collector and the
emitter makes the values of α and β in reverse operation much
smaller than those in forward operation; often the α of the
reverse mode is lower than 0.5.
• The lack of symmetry is primarily due to the doping ratios of the
emitter and the collector.

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• The emitter is heavily doped, while the collector is lightly doped,
allowing a large reverse bias voltage to be applied before the
collector–base junction breaks down.
• The collector–base junction is reverse biased in normal
operation. The reason the emitter is heavily doped is to
increase the emitter injection efficiency: the ratio of carriers
injected by the emitter to those injected by the base. For high
current gain, most of the carriers injected into the emitter–base
junction must come from the emitter.
• The low-performance "lateral" bipolar transistors sometimes
used in CMOS processes are sometimes designed
symmetrically, that is, with no difference between forward and
backward operation.
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 Collector terminal
• The area of collector layer is largest. So it can dissipate
heat quickly. IT is normally in direct contact with the metal
case of the transistor, or a metal mounting pad, which may
then be bolted or clipped directly on to a heat-sink.

• The collector needs to be lightly doped so that the

collector-base junction will have a high breakdown voltage.
This translates into a high allowable collector power supply
voltage. Small signal silicon transistors have a 60-80 V
breakdown voltage. Though, it may run to hundreds of
volts for high voltage transistors.
• The collector also needs to be heavily doped to minimize ohmic

losses if the transistor must handle high current. These

contradicting requirements are met by doping the collector

more heavily at the metallic contact area. The collector near the

base is lightly doped as compared with the emitter.

• The heavy doping in the emitter gives the emitter-base a low

approximate 7 V breakdown voltage in small signal transistors.

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END

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