Small Signal Amplifiers - BJT
Definitions
Small Signal Amplifiers
Dimensioning of capacitors
1
Definitions (1)
Small signal condition
When the input signal (vin and, iin) is small so that output signal (vout and,
iout) is confined in the active region of the output characteristics of the device,
the device is operating in a condition of small signal.
More specifically, the condition of small signal are verified when the variations in
output are so small that the parameter values of the device can be regarded as
constant.
In these conditions, the amplifiers can be analyzed using the small-signal
models of the BJT. The small signal conditions occur, in general, for the first
stages constituting an amplification system.
Linearity
In conditions of the small signal, the amplifier can be considered linear. The
output signal is proportional to the input signal. This property derives from
the fact that the components of the circuit are described by linear equations.
If the system is linear applies the principle of superposition.
Amplitude and phase distortion
So that a waveform is not altered across the amplifier is necessary that each of
its sinusoidal component is equally modified in amplitude and phase.
2
Definitions (2)
Transfer function or network function
Complex function that describes the relationship between the output signal and the input
signal. It is defined in the Laplace domain (s) or in the frequency domain (s = jw)
Amplitude and phase response
Real functions obtained by specifying amplitude and phase of the transfer function with s = jw.
Describe the variation of modulus and phase when the frequency changes.
Gain and phase shift of an amplifier
In the case of an amplifier transfer function is also called amplification (or gain) and can be
expressed in magnitude and phase. Relatively to the various electrical quantities considered for
entry and exit there are various definitions of gain
Voltage VL
Av ;
amplification Vin
Current I
Iin IL Ai L ;
RS amplification I in
+ +
Transconductance I
Vs Vin VL RL AG L ;
- -
amplification Vin
Transresistance VL
AR ;
amplification I in 3
Definitions (3)
Input impedance
It is the impedance viewed by the source of the input signal.
Vin
Zin ;
I in
Output Impedance
It is the impedance viewed from the output port. This impedance can be interpreted as
the Thevenin impedance at the output port.
Vout
Z out ;
I out
Iin IL Iout
RS RS
+ + +
Vs Vin VL RL Vout
- - -
Zin Zout
4
Definitions (4)
Three configurations can be considered
VCC VCC VCC
RC R1 RC R1
C1 R C2 C2
+ C1 C1
1
BJT BJT BJT
C3 + C2
+ Rs + Rs + +
RL VL
Rs Vin Vin
R2 RL VL Vs Vin
R2
Vs VL
R2 R RE RE
E
- RL
Vs - - - - -
Common Base Conf.. Common Emitter Conf. Common Collecttor Conf.
RP R1 // R2 CBC CEC CCC
h fe h fe RC // RL R // RL 1 h fe RE // RL
C 1
hie 1 h fe RE
Av RC // RL
hie RE hie 1 h fe RE // RL
Rin RC h fe Rin Rin Rin
Ai Av Av Av
RL RC RL 1 h fe RL RL RL
Rin RE //
hie
1 h fe
RP // hie 1 h fe RE RP
RP // hie 1 h fe RE // RL RP
hie RP // RS
Rout RC RC RE //
1 h fe
Electronics: a systems approach by N. Storey 5
Definitions (5)
ib hfeib
hie +
RE
Common Base C. + vout
RC//RL
vin
-
-
ib hfeib
+ hie +
Common Emitter C. v
RC//RL
in
RE vout
R1//R2
- -
ib hfeib
+ hie
Common Collecttor C. vin +
RE//RL
vout RC
- R1//R2 -
6
Common Emitter C.
The voltage supply (VCC) for the signal
is equivalent to a short circuit
R1 equivalent RC
ib hfeib
ib circuit hfeib
+ hie +
hie + +
RC//RL
+ + vin
RE vout
vbe - vce
R1//R2
vin - vout - -
- R2 RL -
Rin R1 // R2 // hie 1 h fe RE R1 // R2 RP
RE
vout ib h fe RC // RL
vin ib hie 1 h fe RE
Capacitors in the mid-band vout h fe RC // RL RC // RL
are equivalent to a short Av
vin hie 1 h fe RE RE
circuit
iL vout 1 Rin
Ai Av
iin RC // RL vin RC // RL
Rin 7
Common Collettor C.
The voltage supply (VCC)
for the signal is equivalent
to a short circuit
R1 equivalent RC
ib hfeib
ib circuit hfeib
+ hie
+ +
hie + vin +
vbe
RE//RL
- vce vout RC
R1//R2
vin - -
R2 + -
-
vout
RE RL -
Rin R1 // R2 // hie 1 h fe RE // RL R1 // R2 RP
vout ib 1 h fe RC // RL vin i h 1 h R
b ie fe C // RL
Capacitors in the mid-band
v 1 h fe RE // RL
are equivalent to a short Av out 1
circuit vin hie 1 h fe RE // RL
iL vout 1 Rin Rin
Ai Av
iin RC // RL vin RC // RL RC // RL
Rin 8
Definitions (6)
Coupling capacitor
The amplifier is used to provide voltage and current levels adequate to drive the
load connected to the output. The use of a single BJT is sometimes not sufficient
to achieve this result.
This limitation can be overcome by connecting in cascade several amplifiers,
so that the signal emitted by the source is increased by each amplifier constituting
the cascade. Each individual amplifier is called stage.
• Capacitors are used to connect one stage to another, they are referred coupling
capacitors.
• The coupling capacitors have the function of providing insulation in DC so that
the bias of one stage does not affect that of the next stage.
• These capacitors have to pass the AC signal from one stage to another with
minimum distortion.
Iin IL
RS
+ RL +
Vs Vin VL
- -
Zin Zout 9
Definitions (7)
By-pass capacitors
These capacitors are connected in parallel to a resistor, so AC signals on the
resistor are short circuited. In this way the AC and DC circuits are different.
For example, in the case of CEC, a by- h fe RC // RL h fe RC // RL
pass capacitor on RE allows to obtain a AV AV
higher voltage gain. hie 1 h fe RE hie
For the capacitor by-pass the following configurations can be used :
BJT BJ
BJ
T
T
C3
C3 RE C3 Re
RE
R3 R3
Gain variation with frequency
Because of the introduced reactive elements and the parasitic reactive
elements the response of the amplifier is function of frequency.
10
Definitions (8)
Mid-band
• To simplify the study, it is useful to assume that there is a range of frequencies
(bandwidth) in which all the reactive effects are negligible.
• Therefore in this range, gain (A0), input and output impedances are real quantities (Rin Rout).
• Three different frequency ranges (low, medium and high frequencies) can be considered.
• Three different frequency ranges correspond to three different dynamic circuits.
Cut-off frequencies
The mid-band is delimited by two frequencies, the
lower cut-off frequency fl (determined by coupling
and by-pass capacitors) and the upper cut-off
frequency fu (determined by the junction capacitance
Freq.
and the parasitic effects).
The cutoff frequencies are defined by:
A0
A fl A fu
2
A fl dB A fu dB A0 dB 3dB
Freq.
Electronics: a systems approach by N. Storey (13.7) 11
Definitions (9)
Iin IL
RS +
Vs +
VL RL
Vin
-
-
Zin Zout
VL
Av ;
Vin Common Emitter C.
VL V V
Av L e j (L in ) L e jL ;
Vin Vin Vin
VL
in 0 Av ; Common Collector C.
Vin
Mid-band
12
Definitions (10)
Observation
• When the small signal conditions are verified the bias conditions are not
influenced by signals present, and the full analysis can be divided into two
sub-analysis: DC and AC.
• The AC analysis is often made by assuming the existence of the intermediate
band and analyzing the circuit in this band, where the reactive effects can be
neglected.
• Therefore, it is important to know the cutoff frequencies that define the mid-band.
Syntesis of a small signal stage
In general, a synthesis process, without the computer aid is carried out taking
into account the behavior of the circuit in DC and in AC and estimating the effect of
the capacitors on the cut-off frequencies. At last, the synthesis, of a stage which
works at small signal, can be realized in the following steps:
1. Synthesis of the bias network.
2. Change of the bias network to meet the design specifications.
3. Choice of the capacitors to obtain the request lower cutoff frequency.
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Small signal amplifiers
14
To design an amplifier, that by means of a suitable RL value, ensure a specific
current gain and voltage amplification equal to one.
IL
AI
The circuit solution is the: I in VCC
common collector stage Iin R1
BJT C2 IL
RS + C1 +
Vin RL VL
- -
Vs R2 RE
Synthesis steps
1. Synthesize the bias network (R1, R2, RE) .
2. Select the RL value which ensures the desired current gain.
3. Choose the appropriate values for C1 and C2 which ensure the lower cutoff
frequency given in the project specifications.
15
Synthesis steps: 1
Synthesis of bias network for the CCC
3 resistors
Bias network for the CCC
3 relations
1) VCC VCE RE ( ICQ I BQ )
VCC
2) I CQ I CQ
I 2 I BQ I 2 10 I BQ 10
hFE hFE
R1 Rbase 1 VBEQ VE
R2
VB 10 10 I BQ I BQ
BJT
1 VBEQ 1
R2 1 hFE R E R2 hFE R E
10 I BQ
VE
10
Rbase
I2 RE
R2
3) VCC R1// R 2 I BQ (VBEQ VE ) (VBEQ VE )
R1 R 2
VCC VBEQ VE
R1 R2
VBEQ VE
16
Synthesis steps: 1
Synthesis steps of bias network:
1) Choose the supply voltage VCC and the transistor working point: IC, VCE.
VBEon =0.66 V
2) From the datasheet VBEon and hFE values can be obtained.
hFE =210
VCC VCEQ 20V 10V
3) RE is obtained by: RE 1k
IC 10mA
1 210 1k
4) R2 is obtained by: R2 hFE RE 21k R2 15k
10 10
V VE VBE VE
Or: R2 BE hFE
I2 10 I C
VCC VBEQ VE 9.34
5) R1 is obtained by: R1 R2 10.66 15k 13k R1 12k
VBEQ VE
18
Synthesis steps: 2
RL is obtained by the circuit analysis.
R1 R2
RP R1 // R2
R1 R2
AI AV
Rin RP // hie 1 h fe RE // RL
1
1
1
RL RL RL AI RP h fe RE // RL
1 1 RE RL
h fe
RL AI RP RE RL
h fe
RE 1
RL I
A
h
1 fe RE
RP
h fe RP
RL 1
If hfeRE>>RP or hfeRE> 10RP
I
A h fe
RP 6.666k 6.8k
If hfeRE> 10RP and hfe>10AI RL RL 680
AI 10 10
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To perform the AI and Rin measurements :
Mount the circuit introducing a test resistor RT RT R1 // R2 6.8k
VCC
Iin R1
Measure VRT (using two probes) + VRT -
BJT C2 IL
RS RT + C1
+
V V
Calculate Iin and IL I in RT ; I L L Vin RL VL
RT RL Vs R2 RE
- -
IL
Calculate AI AI
I in
Vin
Calculate Rin Rin
I in
20
To design a stage which ensures, in the passband, the desired voltage
amplification.
VL
AV
Vin
If the load can be selected a possible solution is the:
VCC
common emitter stage R RC
1 C2
C1
BJT
+
Rs +
RL
R2 VL
Vs Vin
RE C3
- -
Synthesis steps
1. Synthesize the bias network (R1, R2, RC, RE) .
2. Select the RL value which ensures the voltage gain desired.
3. Choose the appropriate values for C1, C2 and C3 (C3 >> C1 and C2) which
ensure the lower cutoff frequency given in the project specifications
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Synthesis steps: 1
Synthesis of bias network for the CEC (and CBC)
4 resistors 4 relations
VCC
1) VCC RC IC VCEQ RE ( ICQ I BQ )
ICQ VCC
R1 Rc 2) VE
10 20
BJT
VB I CQ I CQ
Rbase 3) I 2 I BQ I 2 10 I BQ 10
VE hFE hFE
Rbase 1 VBEQ 1
R2 RE R2 1 hFE R E R2 hFE R E
I2 10 10 I BQ
10
R2
4) VCC R1// R 2 I BQ (VBEQ VE ) (VBEQ VE )
R1 R 2
VCC VBEQ VE
R1 R2
VBEQ VE
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Synthesis steps: 1
Synthesis steps of bias network:
1) Choose the supply voltage VCC and the transistor working point: IC, VCE.
VBEon =0.66 V
2) From the datasheet VBEon and hFE values can be obtained.
hFE =210
VE VCC 1V
3) RE is obtained by: RE 100
I CQ 20 I CQ 10mA
VCC VCEQ VE 9V RC 820
4) RC is obtained by: RC 900
ICQ 10mA
hFE RE 210 100 2.1k R2 1.8k
1
4) R2 is obtained by: R2
10 10
V VE VBE VE
Or: R2 BE hFE
I2 10 I C
VCC VBEQ VE 18.44
5) R1 is obtained by: R1 R2 1.8k 20k R1 22k
VBEQ VE 1.66
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Synthesis steps: 2
RL is obtained by circuit analysis.
VCC
ii ib ib hfe
R1 R
C C2
C1
BJT
+ hie
Rs + RS
RL
R2 VL
Vs Vin Vs RL
RE C3 R1//R2
- -
h fe RC // RL 1 h fe 1
AV
hie RL hie AV RC
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To design a stage to ensure, in the passband, a voltage amplification
VL
AV
Vin
If the load is fixed a possible solution is the: VCC
R1 RC
common emitter stage with C1
C2
emitter degeneration BJT
+
Rs + C3
R2 RL VL
Vs Vin RE
The emitter resistor is replaced with R3 -
-
RE//Series (C3-R3) to obtain different
impedance values in DC and AC.
Synthesis steps
1. Synthesize the bias network (R1, R2, RC, RE). Same approach of the CEC.
2. Select the R3 value.
3. Choose the appropriate values for C1, C2 and C3 (C3 >> C1 and C2) which
ensure the lower cutoff frequency given in the project specifications.
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Synthesis steps: 2
VCC
ii ib ib hfe
R1 RC
C2
C1
BJT
+ hie
Rs + C3 RS
R2 RL VL
Vs Vin RE RL
Vs R1//R2 RE//R3
- R3 -
h fe RC // RL RC // RL AV 1 R R3
AV E
hie 1 h fe RE // R3 RE // R3 RC // RL RE // R3 RE R3
1 AV 1
R3 RC // RL RE
1 10 1
0.0132 - 0.01 0.0032 1 R3 330
R3 758 100
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