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FM Demodulator

The document describes a common-base detector circuit. It consists of a transistor with the input signal coupled through a transformer T1 to the emitter of Q1. The emitter-base junction acts as the detector, producing a varying voltage that follows the modulated envelope. This voltage changes the bias on Q1, causing the collector current to vary accordingly. The output is taken from the collector through transformer T2. The circuit is equivalent to a diode detector followed by an amplification stage, with the emitter-base junction performing the detection.

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0% found this document useful (0 votes)
96 views8 pages

FM Demodulator

The document describes a common-base detector circuit. It consists of a transistor with the input signal coupled through a transformer T1 to the emitter of Q1. The emitter-base junction acts as the detector, producing a varying voltage that follows the modulated envelope. This voltage changes the bias on Q1, causing the collector current to vary accordingly. The output is taken from the collector through transformer T2. The circuit is equivalent to a diode detector followed by an amplification stage, with the emitter-base junction performing the detection.

Uploaded by

Yash Budhwar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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COMMON-BASE DETECTOR

Another amplifying detector that is used in portable receivers is the COMMON-BASE DETECTOR.
In this circuit detection occurs in the emitter-base junction and amplification occurs at the output of the
collector junction. The output developed is the equivalent of a diode detector which is followed by a stage
of audio amplification, but with more distortion. Figure 3-8 is a schematic of a typical common-base
detector. Transformer T1 is tuned by capacitor C3 to the frequency of the incoming modulated envelope.
Resistor R1 and capacitor C1 form a self-biasing network which sets the dc operating point of the emitter
junction. The af output is taken from the collector circuit through audio transformer T2. The primary of
T2 forms the detector output load and is bypassed for rf by capacitor C2.

Figure 3-8.—Common-base detector.

The input signal is coupled through T1. When capacitor C3 is tuned to the proper frequency, the
signal is passed to the emitter of Q1. When no input signal is present, bias is determined by resistor R1.
When the input signal becomes positive, current flows through the emitter-base junction causing it to be
forward biased. C1 and R1 establish the dc operating point by acting as a filter network. This action
provides a varying dc voltage that follows the peaks of the rf modulated envelope. This action is identical
to the diode detector with the emitter-base junction doing the detecting. The varying dc voltage on the
emitter changes the bias on Q1 and causes collector current to vary in accordance with the detected
voltage. Transformer T2 couples these af current changes to the output. Thus, Q1 detects the AM wave
and then provides amplification for the detected waveform.

The four AM detectors just discussed are not the only types that you will encounter. However, they
are representative of most AM detectors and the same characteristics will be found in all AM detectors.
Now let’s study some ways of demodulating frequency-modulated (fm) signals.

Q-18. Which junction acts as the detector in a common-base detector?

Q-19. To what circuit arrangement is a common-base detector equivalent?

Q-20. In figure 3-8, which components act as the filter network in the diode detector?

FM DEMODULATION

In fm demodulators, the intelligence to be recovered is not in amplitude variations; it is in the


variation of the instantaneous frequency of the carrier, either above or below the center frequency. The

3-10
detecting device must be constructed so that its output amplitude will vary linearly according to the
instantaneous frequency of the incoming signal.

Several types of fm detectors have been developed and are in use, but in this section you will study
three of the most common: (1) the phase-shift detector, (2) the ratio detector, and (3) the gated-beam
detector.

SLOPE DETECTION

To be able to understand the principles of operation for fm detectors, you need to first study the
simplest form of frequency-modulation detector, the SLOPE DETECTOR. The slope detector is
essentially a tank circuit which is tuned to a frequency either slightly above or below the fm carrier
frequency. View (A) of figure 3-9 is a plot of voltage versus frequency for a tank circuit. The resonant
frequency of the tank is the frequency at point 4. Components are selected so that the resonant frequency
is higher than the frequency of the fm carrier signal at point 2. The entire frequency deviation for the fm
signal falls on the lower slope of the bandpass curve between points 1 and 3. As the fm signal is applied
to the tank circuit in view (B), the output amplitude of the signal varies as its frequency swings closer to,
or further from, the resonant frequency of the tank. Frequency variations will still be present in this
waveform, but it will also develop amplitude variations, as shown in view (B). This is because of the
response of the tank circuit as it varies with the input frequency. This signal is then applied to the diode
detector in view (C) and the detected waveform is the output. This circuit has the major disadvantage that
any amplitude variations in the rf waveform will pass through the tank circuit and be detected. This
disadvantage can be eliminated by placing a limiter circuit before the tank input. (Limiter circuits were
discussed in NEETS, Module 9, Introduction to Wave-Generation and Wave-Shaping Circuits.) This
circuit is basically the same as an AM detector with the tank tuned to a higher or lower frequency than the
received carrier.

Figure 3-9A.—Slope detector. VOLTAGE VERSUS FREQUENCY PLOT.

Figure 3-9B.—Slope detector. TANK CIRCUIT.

3-11
Figure 3-9C.—Slope detector. DIODE DETECTOR.

Q-21. What is the simplest form of fm detector?

Q-22. What is the function of an fm detector?

FOSTER-SEELEY DISCRIMINATOR

The FOSTER-SEELEY DISCRIMINATOR is also known as the PHASE-SHIFT


DISCRIMINATOR. It uses a double-tuned rf transformer to convert frequency variations in the received
fm signal to amplitude variations. These amplitude variations are then rectified and filtered to provide a
dc output voltage. This voltage varies in both amplitude and polarity as the input signal varies in
frequency. A typical discriminator response curve is shown in figure 3-10. The output voltage is 0 when
the input frequency is equal to the carrier frequency (fr). When the input frequency rises above the center
frequency, the output increases in the positive direction. When the input frequency drops below the center
frequency, the output increases in the negative direction.

Figure 3-10.—Discriminator response curve.

The output of the Foster-Seeley discriminator is affected not only by the input frequency, but also to
a certain extent by the input amplitude. Therefore, using limiter stages before the detector is necessary.

Circuit Operation of a Foster-Seeley Discriminator

View (A) of figure 3-11 shows a typical Foster-Seeley discriminator. The collector circuit of the
preceding limiter/amplifier circuit (Q1) is shown. The limiter/amplifier circuit is a special amplifier
circuit which limits the amplitude of the signal. This limiting keeps interfering noise low by removing

3-12
excessive amplitude variations from signals. The collector circuit tank consists of C1 and L1. C2 and L2
form the secondary tank circuit. Both tank circuits are tuned to the center frequency of the incoming fm
signal. Choke L3 is the dc return path for diode rectifiers CR1 and CR2. R1 and R2 are not always
necessary but are usually used when the back (reverse bias) resistance of the two diodes is different.
Resistors R3 and R4 are the load resistors and are bypassed by C3 and C4 to remove rf. C5 is the output
coupling capacitor.

Figure 3-11.—Foster-Seeley discriminator. FOSTER-SEELEY DISCRIMINATOR.

CIRCUIT OPERATION AT RESONANCE.—The operation of the Foster-Seeley discriminator


can best be explained using vector diagrams [figure 3-11, view (B)] that show phase relationships
between the voltages and currents in the circuit. Let's look at the phase relationships when the input
frequency is equal to the center frequency of the resonant tank circuit.

The input signal applied to the primary tank circuit is shown as vector ep. Since coupling capacitor
C8 has negligible reactance at the input frequency, rf choke L3 is effectively in parallel with the primary
tank circuit. Also, because L3 is effectively in parallel with the primary tank circuit, input voltage ep also
appears across L3. With voltage ep applied to the primary of T1, a voltage is induced in the secondary
which causes current to flow in the secondary tank circuit. When the input frequency is equal to the center
frequency, the tank is at resonance and acts resistive. Current and voltage are in phase in a resistance
circuit, as shown by is and ep. The current flowing in the tank causes voltage drops across each half of the
balanced secondary winding of transformer T1. These voltage drops are of equal amplitude and opposite

3-13
polarity with respect to the center tap of the winding. Because the winding is inductive, the voltage across
it is 90 degrees out of phase with the current through it. Because of the center-tap arrangement, the
voltages at each end of the secondary winding of T1 are 180 degrees out of phase and are shown as e1 and
e2 on the vector diagram.

The voltage applied to the anode of CR1 is the vector sum of voltages ep and e1, shown as e 3 on the
diagram. Likewise, the voltage applied to the anode of CR2 is the vector sum of voltages e p and e 2,
shown as e4 on the diagram. At resonance e3 and e4 are equal, as shown by vectors of the same length.
Equal anode voltages on diodes CR1 and CR2 produce equal currents and, with equal load resistors, equal
and opposite voltages will be developed across R3 and R4. The output is taken across R3 and R4 and will
be 0 at resonance since these voltages are equal and of appositive polarity.

The diodes conduct on opposite half cycles of the input waveform and produce a series of dc pulses
at the rf rate. This rf ripple is filtered out by capacitors C3 and C4.

OPERATION ABOVE RESONANCE.—A phase shift occurs when an input frequency higher
than the center frequency is applied to the discriminator circuit and the current and voltage phase
relationships change. When a series-tuned circuit operates at a frequency above resonance, the inductive
reactance of the coil increases and the capacitive reactance of the capacitor decreases. Above resonance
the tank circuit acts like an inductor. Secondary current lags the primary tank voltage, ep. Notice that
secondary voltages e 1 and e2 are still 180 degrees out of phase with the current (iS) that produces them.
The change to a lagging secondary current rotates the vectors in a clockwise direction. This causes el to
become more in phase with ep while e2 is shifted further out of phase with ep. The vector sum of ep and e2
is less than that of ep and e1. Above the center frequency, diode CR1 conducts more than diode CR2.
Because of this heavier conduction, the voltage developed across R3 is greater than the voltage developed
across R4; the output voltage is positive.

OPERATION BELOW RESONANCE.—When the input frequency is lower than the center
frequency, the current and voltage phase relationships change. When the tuned circuit is operated at a
frequency lower than resonance, the capacitive reactance increases and the inductive reactance decreases.
Below resonance the tank acts like a capacitor and the secondary current leads primary tank voltage ep.
This change to a leading secondary current rotates the vectors in a counterclockwise direction. From the
vector diagram you should see that e2 is brought nearer in phase with ep, while el is shifted further out of
phase with ep. The vector sum of ep and e2 is larger than that of e and e1. Diode CR2 conducts more than
diode CR1 below the center frequency. The voltage drop across R4 is larger than that across R3 and the
output across both is negative.

Disadvantages

These voltage outputs can be plotted to show the response curve of the discriminator discussed
earlier (figure 3-10). When weak AM signals (too small in amplitude to reach the circuit limiting level)
pass through the limiter stages, they can appear in the output. These unwanted amplitude variations will
cause primary voltage ep [view (A) of figure 3-11] to fluctuate with the modulation and to induce a
similar voltage in the secondary of T1. Since the diodes are connected as half-wave rectifiers, these small
AM signals will be detected as they would be in a diode detector and will appear in the output. This
unwanted AM interference is cancelled out in the ratio detector (to be studied next in this chapter) and is
the main disadvantage of the Foster-Seeley circuit.

Q-23. What type of tank circuit is used in the Foster-Seeley discriminator?

Q-24. What is the purpose of CR1 and CR2 in the Foster-Seeley discriminator?

Q-25. What type of impedance does the tank circuit have above resonance?

3-14
RATIO DETECTOR

The RATIO DETECTOR uses a double-tuned transformer to convert the instantaneous frequency
variations of the fm input signal to instantaneous amplitude variations. These amplitude variations are
then rectified to provide a dc output voltage which varies in amplitude and polarity with the input signal
frequency. This detector demodulates fm signals and suppresses amplitude noise without the need of
limiter stages.

Circuit Operation

Figure 3-12 shows a typical ratio detector. The input tank capacitor (C1) and the primary of
transformer T1 (L1) are tuned to the center frequency of the fm signal to be demodulated. The secondary
winding of T1 (L2) and capacitor C2 also form a tank circuit tuned to the center frequency. Tertiary
(third) winding L3 provides additional inductive coupling which reduces the loading effect of the
secondary on the primary circuit. Diodes CR1 and CR2 rectify the signal from the secondary tank.
Capacitor C5 and resistors R1 and R2 set the operating level of the detector. Capacitors C3 and C4
determine the amplitude and polarity of the output. Resistor R3 limits the peak diode current and
furnishes a dc return path for the rectified signal. The output of the detector is taken from the common
connection between C3 and C4. Resistor RL is the load resistor. R5, C6, and C7 form a low-pass filter to
the output.

Figure 3-12.—Ratio detector.

This circuit operates on the same principles of phase shifting as did the Foster-Seeley discriminator.
In that discussion, vector diagrams were used to illustrate the voltage amplitudes and polarities for
conditions at resonance, above resonance, and below resonance. The same vector diagrams apply to the
ratio detector but will not be discussed here. Instead, you will study the resulting current flows and
polarities on simplified schematic diagrams of the detector circuit.

OPERATION AT RESONANCE.—When the input voltage ep is applied to the primary in figure


3-12 it also appears across L3 because, by inductive coupling, it is effectively connected in parallel with
the primary tank circuit. At the same time, a voltage is induced in the secondary winding and causes
current to flow around the secondary tank circuit. At resonance the tank acts like a resistive circuit; that is,

3-15
the tank current is in phase with the primary voltage ep. The current flowing in the tank circuit causes
voltages e1 and e2 to be developed in the secondary winding of T1. These voltages are of equal magnitude
and of opposite polarity with respect to the center tap of the winding. Since the winding is inductive, the
voltage drop across it is 90 degrees out of phase with the current through it.

Figure 3-13 is a simplified schematic diagram of a ratio detector at resonance. The voltage applied to
the cathode of CR1 is the vector sum of e1 and ep. Likewise, the voltage applied to the anode of CR2 is
the vector sum of e2 and ep. No phase shift occurs at resonance and both voltages are equal. Both diodes
conduct equally. This equal current flow causes the same voltage drop across both R1 and R2. C3 and C4
will charge to equal voltages with opposite polarities. Let’s assume that the voltages across C3 and C4 are
equal in amplitude (5 volts) and of opposite polarity and the total charge across C5 is 10 volts. R1 and R2
will each have 5 volts dropped across them because they are of equal values. The output is taken between
points A and B. To find the output voltage, you algebraically add the voltages between points A and B
(loop ACB or ADB). Point A to point D is −5 volts. Point D to point B is + 5 volts. Their algebraic sum is
0 volts and the output voltage is 0 at resonance. If the voltages on branch ACB were figured, the same
output would be found because the circuit branches are in parallel.

Figure 3-13.—Current flow and polarities at resonance.

When the input signal reverses polarity, the secondary voltage across L2 also reverses. The diodes
will be reverse biased and no current will flow. Meanwhile, C5 retains most of its charge because of the
long time constant offered in combination with R1 and R2. This slow discharge helps to maintain the
output.

OPERATION ABOVE RESONANCE.—When a tuned circuit (figure 3-14) operates at a


frequency higher than resonance, the tank is inductive. The secondary current i lags the primary voltage
ep. Secondary voltage e1 is nearer in phase with primary voltage e, while e2 is shifted further out of phase
with ep. The vector sum of e1 and ep is larger than that of e2 and ep. Therefore, the voltage applied to the
cathode of CR1 is greater than the voltage applied to the anode of CR2 above resonance.

Figure 3-14.—Current flow and polarities above resonance.

3-16
Assume that the voltages developed above resonance are such that the higher voltage on the cathode
of CR1 causes C3 to charge to 8 volts. The lower voltage on the anode of CR2 causes C4 to charge to 2
volts. Capacitor C5 remains charged to the sum of these two voltages, 10 volts. Again, by adding the
voltages in loop ACB or ADB between points A and B, you can find the output voltage. Point A to point
D equals -2 volts. Point D to point B equals +5 volts. Their algebraic sum, and the output, equals +3 volts
when tuned above resonance. During the negative half cycle of the input signal, the diodes are reverse
biased and C5 helps maintain a constant output.

OPERATION BELOW RESONANCE.—When a tuned circuit operates below resonance (figure


3-15), it is capacitive. Secondary current is leads the primary voltage ep and secondary voltage e2 is nearer
in phase with primary voltage ep. The vector sum of e2 and ep is larger than the sum of e1 and ep. The
voltage applied to the anode of CR2 becomes greater than the voltage applied to the cathode of CR1
below resonance.

Figure 3-15.—Current flow and polarities below resonance.

Assume that the voltages developed below resonance are such that the higher voltage on the anode of
CR2 causes C4 to charge to 8 volts. The lower voltage on the cathode of CR1 causes C3 to charge to 2
volts. Capacitor C5 remains charged to the sum of these two voltages, 10 volts. The output voltage equals
−8 volts plus +5 volts, or −3 volts, when tuned below resonance. During the negative half cycle of the
input signal, the diodes are reverse biased and C5 helps maintain a constant output.

Advantage of a Ratio Detector

The ratio detector is not affected by amplitude variations on the fm wave. The output of the detector
adjusts itself automatically to the average amplitude of the input signal. C5 charges to the sum of the
voltages across R1 and R2 and, because of its time constant, tends to filter out any noise impulses. Before
C5 can charge or discharge to the higher or lower potential, the noise disappears. The difference in charge
across C5 is so slight that it is not discernible in the output. Ratio detectors can operate with as little as
100 millivolts of input. This is much lower than that required for limiter saturation and less gain is
required from preceding stages.

Q-26. What is the primary advantage of a ratio detector?

Q-27. What is the purpose of C5 in figure 3-12?

GATED-BEAM DETECTOR

An fm demodulator employing a completely different detection principle is the GATED-BEAM


DETECTOR (sometimes referred to as the QUADRATURE DETECTOR). A simplified diagram of a

3-17

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