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Subject: Digital System Design Faculty: Mr. P.Jayakrishna Unit-5 Assignment 5 Set 1

This document contains assignments on digital system design covering the following topics: 1) Classifying fault detection experiments for sequential circuits and explaining fault detection in PLA with an example. 2) Determining if distinguishing sequences exist for a given state machine and conducting a homing experiment to identify the final state of another state machine. 3) Explaining fault diagnosis of sequential circuits using transition check approach. 4) Devising a procedure for an experimenter to identify the initial state of a machine based on its response to an unknown input sequence.

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123 views2 pages

Subject: Digital System Design Faculty: Mr. P.Jayakrishna Unit-5 Assignment 5 Set 1

This document contains assignments on digital system design covering the following topics: 1) Classifying fault detection experiments for sequential circuits and explaining fault detection in PLA with an example. 2) Determining if distinguishing sequences exist for a given state machine and conducting a homing experiment to identify the final state of another state machine. 3) Explaining fault diagnosis of sequential circuits using transition check approach. 4) Devising a procedure for an experimenter to identify the initial state of a machine based on its response to an unknown input sequence.

Uploaded by

Jayakrishna Chary
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Subject: Digital System Design Faculty: Mr. P.

Jayakrishna

Unit-5 Assignment 5

Set 1
1. Classify the fault detection experiments for the sequential circuits.
2. With an example, explain how faults are detected in a PLA.
3. Determine whether a distinguishing sequences exist for the given machine below

4. Conduct a Homing experiment and determine shortest homing sequence which identifies
the final state of the given state machine M1.

5. Explain fault diagnosis of sequential circuits using transition check approach for

6. The response of the machine shown in table to an un known input sequence is give to the
experimenter. Devise a procedure that the experimenter may use in order to identify the initial
state. What are the minimum-length sequences that will make such an identification possible?

PS NS
X=0 X=1
A A,0 B,0
B C,0 D,0
C D,1 C,1

D B,1 A,1
Subject: Digital System Design Faculty: Mr. P.Jayakrishna

Unit-5 Assignment 5
Set 2

1. List out and explain briefly about the faults that may occur in PLAs.
2. Explain the circuit test approach concept in sequential circuits.
3. The typical cell in an interactive network has one binary input xi and one binary outputZi.
The output Zi=1 if and only if xi ≠x i-2. for the first two cells (i.e; i =1,2) assume X-1=
X0 = 0. Write a cell table in standard form. Make a gray code state assignment and write
the output and carry functions.
4. Classify the fault detection experiments for the sequential circuits.
5. It is necessary to synchronize the machine of table shown below to a state ‘A’ with a
minimum number of input symbols. Devise such a procedure which may be adaptive

6. Find a preset distinguishing experiment that determine the initial state of the machine
shown in table given below. Given that it cannot be initially in state E.

b) Can you identify the initial state when the initial uncertainity is (ABCDE)?

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