Analog Circuits [18EC42]

Module -2
MOSFET AMPLIFIER CONFIGURATION:

Basic Configurations:
The Three Basic Configurations are:
i. The common-source (CS) or grounded-source amplifier.
ii. The common-gate (CG) or grounded-gate amplifier.
iii. The common drain (CD) or grounded-drain amplifier.

i. The common-source (CS) or grounded-source amplifier:

 In the circuit of the above Fig. the source terminal is connected to ground,
the input voltage signal vi is applied between the gate and ground, and the
output voltage signal vo is taken between the drain and ground, across the
resistance RD.
 This configuration, therefore, is called the grounded-source or common-
source (CS) amplifier.

ii. The common-gate (CG) or grounded-gate amplifier:

 The common-gate (CG) or grounded-gate amplifier is shown in Fig.

 Here the gate is grounded, the input signal vi is applied to the source, and the
output signal vo is taken at the drain across the resistance RD.

1 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

iii. The common drain (CD) or grounded-drain amplifier

 The common drain (CD) or grounded-drain amplifier is shown in Fig.

 The drain terminal is grounded, the input signal vi is applied between gate
and ground, and the output voltage vo is taken between the source and
ground, across a resistance RL.
 This configuration is more commonly called as the source follower

CHARACTERIZING AMPLIFIERS:

This topic provides how to characterize the performance of an amplifier as a

circuit building block:

 Figure (a) shows an amplifier fed with a signal source having an open-circuit
voltage vsig and an internal resistance Rsig.
 The amplifier is shown with a load resistance RL connected to the output
terminal. Here, RL can be an actual load resistance or the input resistance of a
succeeding amplifier stage in a cascade amplifier.

2 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

 Figure (b) shows the amplifier circuit with the amplifier block replaced by its
equivalent circuit model.
 The first parameter in characterizing amplifier performance is the input
resistance.
 The input resistance Rin represents the loading effect of the amplifier input
on the signal source. It is found from
𝑣𝑖
𝑅𝑖𝑛 ≡
𝑖𝑖
 The input to the amplifier is determined using
𝑅𝑖𝑛
𝑣𝑖 = 𝑣
𝑅𝑖𝑛 + 𝑅𝑠𝑖𝑔 𝑠𝑖𝑔
 The amplifier circuits used are unilateral. That is, they do not contain
internal feedback, and thus Rin will be independent of RL.
 The second parameter in characterizing amplifier performance is the open-
circuit voltage gain Avo, defined as
𝑣𝑜
𝐴𝑣𝑜 ≡
𝑣𝑖 𝑅 =∞
𝐿
 The third and final parameter is the output resistance Ro.
 Ro can be determined, conceptually, as indicated in Fig. (c) with
𝑣𝑥
𝑅𝑜 =
𝑖𝑥
 Because Ro is determined with vi= 0, the value of Ro does not depend on Rsig.
 The controlled source Avovi and the output resistance Ro represent the
Thevenin equivalent of the amplifier output circuit, and the output voltage vo
can be found from
𝑅𝐿
𝑣𝑜 = 𝐴 𝑣
𝑅𝐿 + 𝑅𝑂 𝑣𝑜 𝑖
 Thus the voltage gain of the amplifier proper, Av , can be found as
𝑣𝑜 𝑅𝐿
𝐴𝑣 ≡ = 𝐴𝑣𝑜
𝑣𝑖 𝑅𝐿 + 𝑅𝑂
 the overall voltage gain, Gv ,
𝑣𝑜
𝐺𝑣 ≡
𝑣𝑠𝑖𝑔
𝑅𝐿 𝑅𝑖𝑛
 Substituting 𝑣𝑜 = 𝐴𝑣𝑜 𝑣𝑖 and 𝑣𝑖 = 𝑣𝑠𝑖𝑔 we get
𝑅𝐿 +𝑅𝑂 𝑅𝑖𝑛 +𝑅𝑠𝑖𝑔

𝑅𝐿
𝑣𝑜 𝐴 𝑣 𝑅𝑖𝑛 𝑅𝐿
𝑅𝐿 + 𝑅𝑂 𝑣𝑜 𝑖
𝐺𝑣 ≡ = = 𝐴𝑣𝑜
𝑣𝑠𝑖𝑔 𝑅𝑖𝑛 𝑅𝑖𝑛 + 𝑅𝑠𝑖𝑔 𝑅𝐿 + 𝑅𝑂
𝑣𝑖
𝑅𝑖𝑛 + 𝑅𝑠𝑖𝑔

3 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

THE COMMON-SOURCE (CS) AMPLIFIERS:

i. The Common-Source (CS) Amplifiers Without Source Resistance:

Fig(a): Common-source amplifier fed with a signal v sig from a generator with a resistance Rsig.

Fig(b): The common-source amplifier with the MOSFET replaced with its hybrid-π model.
 Figure (a) shows a common-source amplifier without source resistance fed
with a signal source vsig having a source resistance Rsig.
 We wish to analyze this circuit to determine Rin, Avo, and Ro.
 Replacing the MOSFET with its hybrid-π model (without ro), we obtain the
CS amplifier equivalent circuit in Fig.(b).
 We shall use this equivalent circuit to determine the characteristic
parameters and as follows.
𝑅𝑖𝑛 = ∞
𝑣𝑖 = 𝑣𝑠𝑖𝑔
𝑣𝑔𝑠 = 𝑣𝑖
 The output voltage 𝑣𝑜 is found by multiplying the current by the total
resistance between the output node and ground,
𝑣𝑜 = − 𝑔𝑚 𝑣𝑔𝑠 𝑟𝑂 𝑅𝐷

4 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

 Since 𝑣𝑔𝑠 = 𝑣𝑖 , the open-circuit voltage gain 𝐴𝑣𝑜 ≡ 𝑣𝑜 𝑣𝑖 can be obtained as

𝑣𝑜 − 𝑔𝑚 𝑣𝑔𝑠 𝑟𝑂 𝑅𝐷
𝐴𝑣𝑜 ≡ = = −𝑔𝑚 𝑟𝑂 𝑅𝐷
𝑣𝑖 𝑣𝑔𝑠
 Observe that the transistor output resistance reduces the magnitude of the
voltage gain.
 𝑅𝐷 is usually chosen much lower than 𝑟𝑂 so that the effect of 𝑟𝑂 on reducing
the magnitude of the voltage gain is slight.
 If 𝑅𝐷 ≪ 𝑟𝑂 then we can neglect 𝑟𝑂 and express 𝐴𝑣𝑜 simply as
𝐴𝑣𝑜 ≅ −𝑔𝑚 𝑅𝐷
 The output resistance 𝑅𝑂 is the resistance seen looking back into the output
terminal with 𝑣𝑖 set to zero.
 From Fig. (b) we see that 𝑣𝑖 with set to zero, 𝑣𝑔𝑠 will be zero, and thus
𝑔𝑚 𝑣𝑔𝑠 will be zero, resulting in
𝑅𝑂 = 𝑟𝑂 𝑅𝐷
 If 𝑅𝐷 ≪ 𝑟𝑂 then we can neglect 𝑟𝑂 and express 𝑅𝑂 as
𝑅𝑂 ≅ 𝑅𝐷
Overall Voltage Gain:
 To determine the overall voltage gain 𝐺𝑣 , we first note that the infinite input
resistance will make the entire signal 𝑣𝑠𝑖𝑔 appear at the amplifier input,
𝑣𝑖 = 𝑣𝑠𝑖𝑔
 If a load resistance 𝑅𝐿 is connected to the output terminal of the amplifier,
this resistance will appear in parallel with the 𝑅𝐷 .
 It follows that the voltage gain 𝐴𝑣 can be obtained by simply replacing 𝑅𝐷 in
the expression for 𝐴𝑣𝑜 = 𝑔𝑚 𝑟𝑂 𝑅𝐷 by 𝑅𝐷 𝑅𝐿

∴ 𝐴𝑣 = −𝑔𝑚 𝑅𝐷 𝑅𝐿 𝑟𝑂
 Since 𝑣𝑖 = 𝑣𝑠𝑖𝑔 , the overall voltage gain,
𝐺𝑣 = 𝐴𝑣 = −𝑔𝑚 𝑅𝐷 𝑅𝐿 𝑟𝑂

5 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

ii. The Common-Source Amplifier with a Source Resistance(𝑅𝑆 ):

Fig(a): Circuit diagram of CS amplifier with a source resistance 𝑅𝑆

Fig(b): Equivalent circuit with the MOSFET represented by its T model.

 Figure (a) shows a Circuit diagram of CS amplifier with a source resistance
𝑅𝑆 .
 The corresponding small-signal equivalent circuit is shown in Fig. (b), where
we note that the MOSFET has been replaced with its T equivalent-circuit
model.
 The source resistance then simply appears in series with the resistance
1 𝑔𝑚 and can be added to it.
 From Fig. (b) we see that the input resistance 𝑅𝑖𝑛 is infinite and thus
𝑣𝑖 = 𝑣𝑠𝑖𝑔 .
 Unlike the CS amplifier, however, here only a fraction of 𝑣𝑖 appears between
gate and source as 𝑣𝑔𝑠 .
 It can be determined from the voltage divider composed of 1 𝑔𝑚 and 𝑅𝑆
that appears across the amplifier input, as follows:
6 By: Mahendra Naik, Department of ECE, PESITM Shivamogga
 Analog Circuits [18EC42]

1 𝑔𝑚 𝑣𝑖
𝑣𝑔𝑠 = 𝑣𝑖 =
1 𝑔𝑚 + 𝑅𝑆 1 + 𝑔𝑚 𝑅𝑆

 Thus we can use the value of 𝑅𝑆 to control the magnitude of the signal 𝑣𝑔𝑠
and thereby ensure that 𝑣𝑔𝑠 does not become too large and causes
unacceptably high nonlinear distortion.
 The output voltage 𝑣𝑜 is obtained by multiplying the controlled-source
current i by 𝑅𝐷 ,
𝑣𝑜 = −𝑖𝑅𝐷
 The current i in the source lead can be found by dividing 𝑣𝑖 by the total
resistance in the source,
𝑣𝑖 𝑔𝑚
𝑖= = 𝑣
1 𝑔𝑚 + 𝑅𝑆 1 + 𝑔𝑚 𝑅𝑆 𝑖
 substituting i in 𝑣𝑜 = −𝑖𝑅𝐷 we get

𝑔𝑚
𝑣𝑜 = − 𝑣𝑅
1 + 𝑔𝑚 𝑅𝑆 𝑖 𝐷

 Thus, the open-circuit voltage gain 𝐴𝑣𝑜 can be found as

𝑣𝑜 𝑔𝑚 𝑅𝐷
𝐴𝑣𝑜 ≡ =−
𝑣𝑖 1 + 𝑔𝑚 𝑅𝑆
 The above Equation indicates that including the resistance reduces the
voltage gain by the (1 + 𝑔𝑚 𝑅𝑆 ) factor.
 If a load resistance 𝑅𝐿 is connected to the output terminal of the amplifier,
this resistance will appear in parallel with the 𝑅𝐷 .
 We can obtain the gain 𝐴𝑣 using the open-circuit voltage gain together with
the output resistance 𝑅𝑂 which can be found by inspection to be
𝑅𝑂 = 𝑅𝐷
 Alternatively, 𝐴𝑣 can be obtained by simply replacing 𝑅𝐷 in Eq 𝐴𝑣𝑜 = − 1+𝑔𝑔 𝑅
𝑚
𝑅𝑚
𝐷
𝑆

by 𝑅𝐷 𝑅𝐿 ; thus,
𝑔𝑚 𝑅𝐷 𝑅𝐿
𝐴𝑣 = −
1 + 𝑔𝑚 𝑅𝑆

7 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

THE COMMON-DRAIN AMPLIFIER OR SOURCE FOLLOWER:

Fig (a): Common-drain amplifier or source follower

Fig (b): Equivalent circuit of the source Fig(c): Equivalent circuit of the source
follower obtained by replacing the MOSFET with its T follower obtained by replacing the MOSFET with its T
model. model (Neglecting rO)

 Figure (a) shows a source follower with the bias circuit omitted.
 The source follower is fed with a signal generator 𝑣𝑠𝑖𝑔 , 𝑅𝑠𝑖𝑔 and has a load
resistance 𝑅𝐿 connected between the source terminal and the ground.
 Since the MOSFET has a resistance 𝑅𝐿 connected in its source terminal, it is
most convenient to use the T model, as shown in Fig. (b).
 Note that we have included 𝑟𝑂 , simply because it is very easy to do so.
 However, since 𝑟𝑂 in effect appears in parallel with 𝑅𝐿 , and since in discrete
circuits 𝑟𝑂 ≫ 𝑅𝐿 , we can neglect 𝑟𝑂 and obtain the simplified equivalent
circuit shown in Fig. (c).

8 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

 From fig (c), by observation

𝑅𝑖𝑛 = ∞
 And
𝑅𝐿
𝑣𝑜 = 𝑣𝑖 ×
1 𝑔𝑚 + 𝑅𝐿
 Therefore, voltage gain 𝐴𝑣 can be obtained by applying voltage divider rule
formed by 1 𝑔𝑚 and 𝑅𝐿
𝑣𝑜 𝑅𝐿
𝐴𝑣 = =
𝑣𝑖 1 𝑔𝑚 + 𝑅𝐿
 If we set 𝑅𝐿 = ∞, we get 𝐴𝑣𝑜
𝐴𝑣𝑜 = 1
 The output resistance 𝑅𝑂 is found by setting 𝑣𝑖 = 0 (i.e., by grounding the
gate).
 Now looking back into the output terminal, excluding 𝑅𝐿 , we simply see
1 𝑔𝑚 , thus
𝑅𝑂 = 1 𝑔𝑚
 Finally, because of the infinite 𝑅𝑖𝑛 ,𝑣𝑖 = 𝑣𝑠𝑖𝑔 , and the overall voltage gain is
𝑣𝑜 𝑅𝐿
𝐺𝑣 = 𝐴𝑣 = =
𝑣𝑖 1 𝑔𝑚 + 𝑅𝐿
 Thus 𝐺𝑣 will be lower than unity.
 However, because 1 𝑔𝑚 is usually low, the voltage gain can be close to
unity.
 The unity open-circuit voltage gain in Eq. 𝐴𝑣𝑜 = 1 indicates that the voltage
at the source terminal will follow that at the input, hence the name source
follower.

9 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

INTERNAL CAPACITIVE EFFECTS AND THE HIGH-FREQUENCY

MODEL OF THE MOSFET:

The Gate Capacitive Effect:

 The gate capacitive effect can be modeled by the three capacitances 𝐶𝑔𝑠 , 𝐶𝑔𝑑 ,

𝐶𝑔𝑏 . The values of these capacitances can be determined as follows:

1. When the MOSFET is operating in the triode region at small vDS, the channel
will be of uniform depth. The gate-channel capacitance will be WLCox and
can be modeled by dividing it equally between the source and drain ends;
thus,
1
𝐶𝑔𝑠 = 𝐶𝑔𝑑 = 𝑊𝐿𝐶𝑜𝑥 (𝑡𝑟𝑖𝑜𝑑𝑒 𝑟𝑒𝑔𝑖𝑜𝑛)
2
2. When the MOSFET operates in saturation, the channel has a tapered shape
and is pinched off at or near the drain end. It can be shown that the gate-to-
2
channel capacitance, in this case, is approximately 𝑊𝐿𝐶𝑜𝑥 and can be
3
modeled by assigning this entire amount to Cgs, and a zero amount to Cgd
(because the channel is pinched off at the drain); thus,
2
𝐶𝑔𝑠 = 𝑊𝐿𝐶𝑜𝑥
3 (𝑠𝑎𝑡𝑢𝑟𝑎𝑡𝑖𝑜𝑛 𝑟𝑒𝑔𝑖𝑜𝑛)
𝐶𝑔𝑑 = 0
3. When the MOSFET is cut off, the channel disappears, and thus Cgs = Cgd =
0. However, we can (after some rather complex reasoning) model the gate
capacitive effect by assigning a capacitance WLCox to the gate-body model
capacitance; thus,
𝐶𝑔𝑠 = 𝐶𝑔𝑑 = 0
(𝑐𝑢𝑡𝑜𝑓𝑓)
𝐶𝑔𝑏 = 𝑊𝐿𝐶𝑜𝑥
4. There is an additional small capacitive component that should be added to
Cgs and Cgd in all the preceding formulas. This is the capacitance that
results from the fact that the source and drain diffusions extend slightly
under the gate oxide. If the overlap length is denoted Lov, we see that the
overlap capacitance component is
𝐶𝑜𝑣 = 𝑊𝐿𝑜𝑣 𝐶𝑜𝑥
Typically 𝐿𝑜𝑣 = 0.05 𝑡𝑜 𝑜. 1𝐿.

10 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

THE JUNCTION CAPACITANCES:

 The depletion-layer capacitances of the two reverse-biased pn junctions

formed between each of the source and the drain diffusions and the body can
be determined using
i. The source-body capacitance 𝐶𝑠𝑏
ii. The drain-body capacitance 𝐶𝑑𝑏

i. The source-body capacitance 𝑪𝒔𝒃 :

𝐶𝑠𝑏0
𝐶𝑠𝑏 =
𝑉
1 + 𝑆𝐵
𝑉𝑜
Where 𝐶𝑠𝑏0 is the value of 𝐶𝑠𝑏 at zero body-source bias, 𝑉𝑆𝐵 is the magnitude of
the reverse bias voltage, and 𝑉𝑜 is the junction built-in voltage (0.6 V to 0.8 V).

ii. The drain-body capacitance 𝑪𝒅𝒃 :

𝐶𝑑𝑏 0
𝐶𝑑𝑏 =
𝑉
1 + 𝐷𝐵
𝑉𝑜
where Cdb0 is the capacitance value at zero reverse-bias voltage, and VDB is the
magnitude of this reverse-bias voltage.

11 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

THE HIGH-FREQUENCY MOSFET MODEL:

 Figure (a) shows the High-frequency, equivalent-circuit model for the

MOSFET.

Fig (a): The high-frequency equivalent circuit model for MOSFET

Model parameters:
𝑊 𝑊 2𝐼𝐷
𝑔𝑚 = 𝜇𝑛 𝐶𝑂𝑋 𝑉 = 2𝜇𝑛 𝐶𝑂𝑋 𝐼𝐷 =
𝐿 𝑂𝑉 𝐿 𝑉𝑂𝑉

𝑔𝑚𝑏 = 𝜒𝑔𝑚 , 𝑤𝑕𝑒𝑟𝑒 𝜒 = 0.1 𝑡𝑜 0.2

𝑉𝐴
𝑟𝑂 =
𝐼𝐷
2
𝐶𝑔𝑠 = 𝑊𝐿𝐶𝑜𝑥 + 𝑊𝐿𝑜𝑣 𝐶𝑜𝑥
3
𝐶𝑔𝑑 = 𝑊𝐿𝑜𝑣 𝐶𝑜𝑥
𝐶𝑠𝑏0
𝐶𝑠𝑏 =
𝑉𝑆𝐵
1+
𝑉𝑜
𝐶𝑑𝑏 0
𝐶𝑑𝑏 =
𝑉𝐷𝐵
1+
𝑉𝑜

12 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

 Figure (b) shows the High-frequency, equivalent-circuit model for the

MOSFET when the source is connected to the body.
 Figure (c) shows the High-frequency, equivalent-circuit model for the
MOSFET when the source is connected to the body with Cdb neglected

Fig (b): The equivalent circuit for the case in which the source is connected to the substrate in the high-frequency
equivalent circuit model

Fig (c): The equivalent circuit model with Cdb neglected in the high-frequency equivalent circuit model

13 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

HIGH-FREQUENCY RESPONSE OF THE CS AMPLIFIERS:

Figure (a) shows the high-frequency, equivalent-circuit model of a CS
amplifier.
Figure (b) gives the equivalent circuit of Fig (a) that is simplified by utilizing
the Thévenin theorem at the input side and by combining the three parallel
resistances at the output side.

Fig (a): Equivalent circuit to determine the high-frequency response of the CS amplifier

Fig (b): Equivalent circuit to determine the high-frequency response of the CS amplifier simplified
at the input and the output

14 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

OSCILLATORS:

Barkhausen criterion for oscillation:

1. The loop gain is equal to unity in absolute magnitude, that is, βA = 1 and
2. The phase shift around the loop is zero or an integer multiple of 2π:
∠𝛽𝐴 = 0° or 360°

i. FET BASED PHASE SHIFT OSCILLATOR:

 A FET-based phase-shift oscillator is shown in fig (a).
 The circuit consists of an amplifier and a feedback network.
 The FET amplifier is self-biased with a capacitor bypassed source resistor
and a drain resistor.
 The feedback network consists of three cascaded RC sections.

Fig (a): FET-based phase-shift oscillator

 As shown in fig (a), the feedback voltage Vf available at the output of the last
RC section of the feedback network is fed to the gate as input.
 The FET amplifier provides a phase shift of 180o, the remaining 180o phase
shift is provided by the feedback network to obtain a total phase shift of 360o
around the loop.
 Thus each RC section is designed to provide a phase shift 60o at the desired
frequency of oscillation.

15 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

To find the loop gain 𝑨𝜷:

 The ac equivalent circuit for the FET-based phase-shift oscillator is shown in
figure (b).
 The simplified circuit of FET-based phase-shift oscillator where the current

source is replaced by the equivalent voltage source 𝑔𝑚 𝑅𝐷′ , where 𝑅𝐷, =

𝑟𝑑 𝑅𝐷 is shown in figure (c).
′
 Assuming that the feedback network doesn't load the amplifier as 𝑅 ≫ 𝑅𝐷 ,

we neglect 𝑅𝐷′ in fig (c).

Fig: Small-signal ac equivalent model

Fig: Simplified small-signal ac equivalent model

Apply KVL, we get

For loop-1:
1
𝑔𝑚 𝑅𝐷′ 𝑉𝑖 + 𝐼1 − 𝐼2 − 𝐼1 𝑅 = 0
𝑆𝐶
1
𝐼1 𝑅 + − 𝐼2 𝑅 = −𝑔𝑚 𝑅𝐷′ 𝑉𝑖 (1)
𝑆𝐶

16 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

For loop-2:
1
𝐼2 − 𝐼3 − 𝐼2 𝑅 − 𝐼1 − 𝐼2 𝑅 = 0
𝑆𝐶
1
−𝐼1 𝑅 + 𝐼2 2𝑅 + − 𝐼3 𝑅 = 0 (2)
𝑆𝐶
For loop-3:
1
𝐼3 − 𝐼3 𝑅 − 𝐼2 − 𝐼3 𝑅 = 0
𝑆𝐶
1
−𝐼2 𝑅 + 𝐼3 2𝑅 + =0 (3)
𝑆𝐶

Also
𝑉𝑓 = 𝐼3 𝑅 (4)
Hence loop gain 𝐴𝛽 is
𝑉𝑓 −𝑔𝑚 𝑅𝐷′
𝐴𝛽 = = (5)
𝑉𝑖 1 − 5𝛼 2 + 𝑗 𝛼 3 − 6𝛼
Where
1
𝛼=
𝜔𝑅𝐶
As loop gain is a real quantity,
𝛼 3 − 6𝛼 = 0
𝛼2 = 6
1
𝜔2 𝑅2 𝐶 2 =
6
The frequency of oscillation becomes
1
𝑓𝑜 =
2𝜋𝑅𝐶 6
Equation (5) becomes
𝑔𝑚 𝑅𝐷′
𝐴𝛽 =
29
We know that 𝐴𝛽 > 1 for sustained oscillation, hence

17 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

𝑔𝑚 𝑅𝐷′ > 29
The voltage gain of the FET amplifier is given as
𝐴 > 𝑔𝑚 𝑅𝐷′
Therefore,
1
𝐴 > 29 𝑎𝑛𝑑 𝛽 =
29
Hence, we can say that the gain of the FET amplifier gate must be at least 29 to
sustain oscillation.

18 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

LC AND CRYSTAL OSCILLATORS:

 The two commonly used configurations of LC-tuned oscillators are

i. The Colpitts oscillator and

ii. The Hartley oscillator

i. The Colpitts oscillator:

Fig (a): Colpitts Oscillator

 Figure (a) shows the circuit diagram of the Colpitts Oscillator.
 Colpitts Oscillator utilizes a parallel LC circuit connected between collector
and base (or between drain and gate if a FET is used) with a fraction of the
tuned-circuit voltage fed to the emitter (the source in a FET).
 This feedback is achieved by way of a capacitive divider in the Colpitts
oscillator.
 Observe that in the circuit, the voltage Veb gives rise to a current Ic in the
direction shown, which in turn results in a positive voltage across the LC
circuit. Thus, we do have a positive-feedback loop.
 If the frequency of operation is sufficiently low that we can neglect the
transistor capacitances, the frequency of oscillation will be determined by
the resonance frequency of the parallel-tuned circuit (also known as a tank
circuit because it behaves as a reservoir for energy storage).
 Thus for the Colpitts oscillator, we have
1
𝜔𝑂 =
𝐶1 𝐶2
𝐿
𝐶1 + 𝐶2

19 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

ii. The Hartley oscillator:

Fig (b): Hartley Oscillator

 Figure (b) shows the circuit diagram of the Hartley Oscillator.
 Hartley Oscillator utilizes a parallel LC circuit connected between collector
and base (or between drain and gate if a FET is used) with a fraction of the
tuned-circuit voltage fed to the emitter (the source in a FET).
 This feedback is achieved by way of an inductive divider in the Hartley
circuit.
 Observe that in the circuit, the voltage Veb gives rise to a current Ic in the
direction shown, which in turn results in a positive voltage across the LC
circuit. Thus, we do have a positive-feedback loop.
 If the frequency of operation is sufficiently low that we can neglect the
transistor capacitances, the frequency of oscillation will be determined by
the resonance frequency of the parallel-tuned circuit (also known as a tank
circuit because it behaves as a reservoir for energy storage).
 Thus for the Hartley oscillator, we have
1
𝜔𝑂 =
𝐿1 + 𝐿2 𝐶

20 By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 Analog Circuits [18EC42]

CRYSTAL OSCILLATORS:

A piezoelectric crystal, such as quartz, exhibits electromechanical-resonance characteristics that are very stable
(with time and temperature) and highly selective (having very high Q factors).

21 By: Mahendra Naik, Department of ECE, PESITM Shivamogga