Identify j2015.03msp1 Debug Env Reference
Identify j2015.03msp1 Debug Env Reference
Reference Manual
March 2015
http://solvnet.synopsys.com
Preface
Each copy shall include all copyrights, trademarks, service marks, and
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“This document is duplicated with the permission of Synopsys, Inc., for the
exclusive use of __________________________________________ and its
employees. This is copy number __________.”
LO
Disclaimer
SYNOPSYS, INC., AND ITS LICENSORS MAKE NO WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING,
BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
AND FITNESS FOR A PARTICULAR PURPOSE.
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LO
Chapter 1: Introduction
Syntax Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Symbol Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Tool Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
File System Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Design Hierarchy Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
LO
Introduction
The tool set consists of an instrumentor and a debugger. These two tools
allow you to debug your HDL design:
• In the target system
• At the target speed
• At the VHDL/Verilog RTL Source level
The tool set increases your debugging capabilities of high-end FPGA designs,
FPGA-based prototypes, and system-on-a-chip designs. For the first time you
will be able to debug live hardware with the internal design visibility you need
while using intuitive debugging techniques.
To efficiently use the system and its underlying tools, this manual provides
you with an alphabetical listing of all the commands that the tool set accepts
in the next chapter. The remainder of this chapter describes the conventions
used within this manual to convey command usage.
Syntax Conventions
There are several conventions this manual uses to convey command syntax.
These conventions are:
Symbol Conventions
This manual contains symbol conventions detailing the tools that use these
commands. These symbols are located adjacent to the command name.
These symbols are:
LO
Tool Conventions
There are tool concepts you must familiarize yourself with when using the
tool set. These concepts help you to decipher structural and HDL-related
information.
/usr/data.dat
c:/Synopsys/data.dat
Wildcards
A wildcard is a command element you can use to search for specific file infor-
mation. You can use these wildcards in combination with the file system
commands. Conventions for wildcards are as follows:
Syntax Description
* Matches any sequence of characters
? Matches any single character
Syntax Description
[abcd] Matches any character in the specified set.
[a-d] LO
Matches any character in a specified range.
To use square brackets in wildcard specifications, you must delimit the entire
name with curly braces { }. For example
{[a-d]1}
matches any character in the specified range (a-d) preceding the character 1.
The tool set supports VHDL and Verilog. These languages vary in their
hierarchy conventions. The VHDL and Verilog languages contain design units
and hierarchies of these design units. In VHDL, these design units are
entity/architecture pairs, in Verilog they are modules. VHDL and Verilog
design units are organized hierarchically. Each of the following HDL design
units creates a new level in the hierarchy:
VHDL
• The top-level entity
• Architectures
• Component instantiation statements
• Process statements
• Control flow statements: if-then-else, and case
• Subprogram statements
• Block statements
Verilog
• The top-level module
• Module instantiation statements
• Always statements
• Control flow statements: if-then-else, and case
• Functions and tasks
/inst/reset_n
Absolute path names begin with a path separator character. The top-level
design unit is represented by the initial “/”. Thus, a port on the top-level
design unit would be represented:
/port_name
/arch
Relative path names do not start with the path separator, and are relative to
the current location in the design hierarchy. Initially, the current location is
the top-level design unit, but commands exist that allow you to change the
location.
Wildcards
A wildcard is a command element you can use to search for specific design
hierarchy information. You can use these wildcards in combination with the
design hierarchy commands. Conventions for wildcards are as follows:
Syntax Description
* Matches any sequence of characters
? Matches any single character
LO
Syntax Description
[abcd] Matches any character in the specified set.
[a-d] Matches any character in a specified range.
To use square brackets in pattern matching, you must delimit the entire
name with curly braces { }. For example
{[a-d]1}
matches any character in the specified range (a-d) preceding the character 1.
LO
Startup Modes
The instrumentor and the debugger can be started in any of three execution
modes as outlined below:
• identify_instrumentor
Runs a Tcl startup file and then opens the instrumentor in the graphical
user interface.
• identify_instrumentor_shell [-version]
Opens the instrumentor in the shell and/or script mode. If the optional
-version argument is included, reports the software version without
opening the instrumentor.
• identify_debugger
Runs a Tcl startup file and then opens the debugger in the graphical
user interface.
• identify_debugger_shell [-version]
Opens the debugger in the shell and/or script mode. If the optional
-version argument is included, reports the software version without
opening the debugger.
Note: The path to the synthesis tool and the tool type can also be
defined after the instrumentor or debugger has been started as
described in Command Line Configuration, on page 18.
-synplify_install synthesisToolPath
The arguments are entered on the same command line in any order.
GUI Configuration
To set the path to the synthesis tool from the instrumentor GUI:
3. Click the OK button to accept the values and close the dialog box.
License Types
All of the startup execution mode commands accept an optional -licensetype
argument to specify a license type other than the default. The license type
can be either a vendor-specific license or a full license.
LO
The following examples illustrate using the -licensetype argument. The first
example opens the instrumentor in the graphical interface with an
Altera-only license, and the second example opens the debugger in the shell
mode with a full license.
Note: Changing the license type with the -licensetype argument is valid
only for the current session and does not change the default
license type defined in the Select available license dialog box.
starts Synplify Pro in the GUI and sets the default installation path in the
synthesis tool for launching the instrumentor/debugger tool set. The installa-
tion path specified appears in the Configure Identify Launch dialog box
(Options->Configure Identify Launch) in the synthesis tool GUI.
Script Locations
The software first looks for initialization scripts, titled synrc.tcl, in the /etc
directory of the installation path and then in the user’s home directory. On a
Linux-based platform, this is the standard home directory. On Windows, the
value of the environment value USERPROFILE is used. On a standard Windows
installation, this path is generally represented as:
Scripting Priority
The script is first sourced from the installation directory and then from the
home directory. Since the format is Tcl, a second user-specific script
overrides Tcl procedures and variables previously defined.
LO
Command Description
The commands are divided into several specific categories. These categories
separate the commands in terms of which tool (instrumentor or debugger)
utilizes the command. These symbols are:
LO
activation
Allows you to save or reload a set of trigger settings (enabled watchpoints and
breakpoints). Including the -sample option causes the sample data to be
loaded or saved with the trigger settings. If the optional activationName
argument is included, the named activation is loaded or saved; if activation-
Name is omitted, last_run.adb is used as the default activation name. The activa-
tion clear and activation list commands clear the current trigger settings and list
all of the saved activations for the current instrumentation, respectively.
Syntax
activation load|save [-sample] [activationName]
activation clear|list
Command Example
activation load -sample instr_trial1
breakpoints
Instructs the instrumentor to add or delete special debug logic to or from the
specified IICE™. This debug logic implements breakpoint-style RTL
source-level trigger conditions.
Syntax
breakpoints add|delete [-iice iiceID|all] breakpointName [breakpointName ...]
The map option is used exclusively with the real-time debugging feature to
assign a breakpoint to a Mictor connector pin. In the above syntax, MictorPin-
Name is the concatenation of the Mictor board HapsTrak® connector location,
the Mictor connector name, and the Mictor pin name separated with periods.
For example, 3.M1.D3e is the D3e pin of Mictor connector M1 on the Mictor
board installed in HapsTrak connector 3.
These two components together ensure that each breakpoint has a unique
name for identification purposes.
-iice iiceID|all
Used when more than one IICELO is defined to specify the IICE (iiceID) where
the breakpoint is to be added or deleted. If the argument all is specified, the
corresponding breakpoint is added to or deleted from each IICE.
Command Example
breakpoints add /beh/arb_inst/beh/process_83/case_88/arb.vhd:90
breakpoints delete -iice trap2
/beh/blk_xfer_inst/beh/process_85/case_97/xfer.vhd:107
breakpoints map /beh/process_50/case_88/if_90/alu.v:72 3.M1.D5e
See Also
• stop, on page 88
cd
Changes the present working directory in the file system to a different desig-
nated directory.
Syntax
cd directory
Specifies the designated directory name. You must use forward slashes to
describe relative and absolute path names irrespective of the operating
system. On a Windows-based platform, the directory may include a drive
letter followed by a colon.
Command Example
cd c:/temp
cd ../homedirs/adam
See Also
• pwd, on page 70
LO
chain
Sets up and manipulates the JTAG chain of devices. Because more than one
device can be connected in a JTAG chain, the commands allows you to setup
the JTAG chain representation in the debugger to select the particular device
to be debugged.
Syntax
chain add deviceName instructionRegisterWidth
chain clear
Creates and labels a device and assigns that device with an instruction
register width. Every device attached to the JTAG must be identified by a
unique name. This device name can include any alpha-numeric characters.
Spaces and other characters cannot be used.
The instruction register is an N-bit register that holds the OPCODE for the
JTAG controller. Every device has a specific instruction register width, which
can be found in the device’s Data Book.
clear
info
info -raw
info -active
Returns the name of the device that is currently selected for debugging.
Changes the name or register length of a device that has been previously
defined using the chain add command. In the command syntax, position is the
value shown by the chain info command for the device to be replaced.
select deviceName
Selects a device for system debugging. Only devices added and labeled using
chain add can be selected.
Command Example
chain add fpga 5
chain select fpga
chain info -active
chain replace 1 new_fpga 8
See Also
• device, on page 33
• com, on page 29
LO
clear
Removes all the console output in the graphical user interface. This
command is only supported in the graphical modes.
Syntax
clear
com
Sets up and manipulates communication settings between the debugger and
the Intelligent In-Circuit Emulator (IICE).
Syntax
com cabletype [type]
com check
Describes the type of cable connecting the system to the hardware being
analyzed. The supported cable types are byteblaster, xilinxparallel, xilinxusb, xilinx-
auto, Microsemi_BuiltinJTAG, JTAGTech3710, Altera_BuiltinJTAG, and demo. A umrbus
selection in also available to indicate that the UMRBus is to be used as the
communication interface between the hardware and the host machine
running the Identify debugger.
check
Specifies the host computer parallel port to which the JTAG cable is
connected. The supported ports are lpt1, lpt2, lpt3, and lpt4.
LO
Command Example
com cabletype byteblaster
com cableoptions byteblaster_port 2
com port lpt1
See Also
• chain, on page 27
compile
Prints a list of the design files and the respective order in which they are read.
Syntax
compile list
Prints a list of the design files and the respective order in which they are read.
If the -vhdl or -verilog option is included, limits the list to only the specified file
type.
Command Example
compile list -vhdl
See Also
• searchpath, on page 74
LO
device
Defines device-specific parameters used to implement the instrumented HDL
design.
Syntax
device estimate [-iice all|iiceName] [-resources | -noresources | -raw]
device skewfree
device xilinxinsertbufg
device xilinxjtagaddr1
device xilinxjtagaddr2
device xilinxusesrl16
device capimbaseaddr
Reports only estimated resource utilization for the named IICE (iiceName) for
the current implementation.
Reports only the number of instrumented signals for the named IICE
(iiceName) for the current implementation.
estimate -raw
Determines if the built-in JTAG port of the target device is used for the IICE
connection or if the Synopsys test port is used. Selection can only be set in
the instrumentor. With no argument specified, the current setting is
displayed. The following selections are available:
builtin
Specifies that the JTAG port built into the target device is the port used.
No extra user pin is required. This is the default value when the device
family specified is other than generic.
soft
umrbus
LO
Specifies that the UMRBus is to be used as the communication interface
between the hardware and the host machine running the debugger (the
JTAG port is not used).
prepare_incremental
skewfree [0|1]
technologydefinitions [0|1]
xilinxinsertbufg [0|1]
If you prefer to have the synthesis tool detect and add the BUFG component,
disable (0) this option to change this behavior. Use caution with this option; if
the JTAG clock is either not in a global clock buffer or is implemented using
skew-free hardware, the debug logic will not function properly. The skewfree
option overrides the behavior of this setting, as no BUFG is inserted for
skew-free hardware. The xilinxinsertbufg option is enabled (1) by default.
xilinxjtagaddr1 [user1|user2|user3|user4]
Selects the first user instruction register for boundary scan cells for the
built-in JTAG controller. The default is user3. This option is available only in
the instrumentor.
xilinxjtagaddr2 [user1|user2|user3|user4]
Selects the second user instruction register for boundary scan cells for the
built-in JTAG controller. The default is user4. This option is available only in
the instrumentor.
xilinxusesrl16 [0|1]
Determines if the IICE uses shift registers for the debug logic in Xilinx
Virtex-II designs when enabled (1). If shift registers are used, the area cost of
the debug logic can potentially be reduced. The xilinxusesrl16 option is enabled
(1) by default.
Note: Valid values must be set for the above options before you instru-
ment your design.
capimbaseaddr baseAddress
Command Example
device estimate -iice IICE -noresources
device jtagport builtin
device skewfree 1
See Also
• chain, on page 27
• com, on page 29
LO
encryption
Sets the current password to use before encrypting or decrypting a file. In the
instrumentor, this command sets the password to be used when writing out
an encrypted file with the write instrumentation command. In the debugger, this
command is used to set the password to enable encrypted files to be
displayed.
Note: Setting the password with this command displays the password
on the screen and in any log files that you create. If this is a
concern, use only the graphical interface when instrumenting
and debugging designs that use the encryption feature.
Syntax
encryption set_passwd password
The set_passwd argument requires a single string (password) entry. The new
password is stored for decrypting/encrypting until it is changed or until the
instrumentor or debugger is shut down.
Command Example
encryption set_passwd xyzzy
See Also
• write instrumentation, on page 99
• project, on page 69
exit
Exits the program and closes the window.
Syntax
exit
Command Example
exit
fpga
Adds an FPGA for distributed instrumentation.
Syntax
fpga add [-iice iiceID] -type fpgaType
-iice iiceID|all
Used when more than one IICE is defined to specify which IICE (iiceID) to use
for distributed instrumentation. If the argument all is specified, the FPGA type
applies to each IICE unit.
-type fpgaType
LO
haps
Queries the hardware to generate the requisite Tcl file for board generation
and performs the verification tests. For additional information, see
Chapter 2, Board Bring-up in the ProtoCompiler Debug Environment User
Guide.
Syntax
haps
board
boardtype type
settings [{setting value [setting value ...]}]
prog binFile devID
setvcc voltage [region]
setclk clockName frequency
restart
confscr scriptFileName
list [testName]
help [testName]
run [testName|All]
showinstr 0|1
vbgen tclFile
Displays the board status to the screen. Status includes clock and voltage
settings and daughter card connections.
boardtype type
Specifies the HAPS port (PORT_NAME), device (DEV_ID), and bus (BUS_NUM)
settings. With no arguments, reports the current settings. The curly braces
enclosing the arguments are required.
Programs the FPGA identified by devID with the specified bin file. The devID
value begins with 1 which corresponds to the first FPGA on the board.
Sets the I/O voltage for the specified board region. The acceptable values for
voltage are 1v5 and 1v8. If region is omitted, all regions are set to voltage.
Sets the frequency for the global input clock identified by clockName to the
specified frequency. The frequency value is in kHz unless specified otherwise.
For example, the command haps setclk GCLK1 150MHz specifies a clock
frequency of 150 MHz for GCLK1.
restart
confscr scriptFileName
Runs confprosh tcl scripts. For example, the confscr option can be used to
source a HAPS clock and voltage-region configuration script; the user could
then run clock checks to verify the on-board clock configuration.
list
help [testName]
Displays help information. If testName is included, shows help for the speci-
fied test; if testName is omitted displays complete help for haps command. The
supported test names are umr_check, con_speed, clock_check, and self_test (use
the haps list command to display the available test commands).
LO
run [testName|All]
Runs a particular test or runs all local board tests. In the above syntax,
testName is one of:
self_test – replaces the traditional self test with an STB2 test card.
When the All argument is used, runs all local tests with the individual test
parameter defaults.
showinstr 0|1
Shows or hides test run instructions. Show (1) annotates the instructions;
the default is to hide instruction detail. For more complete test details, see
Board Configuration Tests, on page 66 in the User Guide.
vbgen tclFile
Queries the HAPS system and generates a corresponding Tcl file for board
generation. ident testName
Command Example
haps run umr_check 2 180
haps setclk GCLK1 150MHz
haps setvcc 1v8
haps help con_speed
haps settings {PORT_NAME emu:1 DEV_ID 4}
LO
help
Displays the online help system and a help topic about a command.
Syntax
help [commandName]
hierarchy
Navigates through the design hierarchy and shows design and hierarchy
elements in the HDL design. These design elements include the following
types, depending on the HDL language used to describe the design:
• Entity – VHDL design unit type.
• Module – Verilog design unit type.
• Instance – VHDL or Verilog design unit type.
Syntax
hierarchy add [options] element [element ...]
hierarchy cd hierarchyPath
hierarchy pwd
hierarchy toplevel
LO
-iice iiceID|all
Used when more than one IICE is defined to specify which IICE (iiceID) to
connect. If the argument all is specified, the signals or breakpoints are
connected to each IICE.
-sample
-trigger
-breakpoint
-recursive
cd hierarchyPath
cd /
Changes the current design hierarchy to the top level of the hierarchy.
cd ..
Changes the current design hierarchy to next higher level.
-iice iiceID|all
Used when more than one IICE is defined to specify which IICE (iiceID) to
disconnect. If the argument all is specified, the signals or breakpoints are
disconnected from each IICE.
-signal
-breakpoint
Searches for specific HDL design units and lists those elements. Use this
command to locate specified design units in the compiled HDL design file.
The search is started from the specified hierarchical path. If you do not
provide hierarchyPath, the search starts from the current working hierarchy.
-iice iiceID|all
Used when more than one IICE is defined to specify the IICE (iiceID) to
be searched. If the argument all is specified, each IICE is searched.
-name elementName
LO
The HDL element name to be located.
-noequiv
Limits the search to named path only and does not search equivalent
paths.
The type of HDL element for the target search. If * is entered, search
includes all elements.
-ls
-stat status| *
-maxdepth integer
-all
Displays all information about the HDL design units within the current
design hierarchy. You can display this design unit information in a long
listing using the -long option or you can display this information recursively
using the -recursive option. The -all option shows all HDL elements including
hidden elements.
pwd
toplevel
Command Example
hierarchy cd ..
hierarchy cd /top/u1/arui
hierarchy ls -recursive
hierarchy find -type breakpoint -stat instrumented
See Also
• show, on page 77
LO
idcode
Sets up and maintains a table of device ID codes. The ID code information is
used for auto-detection of the devices on the JTAG chain during debugging. If
the chain can be successfully detected, you do not need to manually specify
the chain using the chain command.
Syntax
idcode add [-quiet] idcode deviceName instructionRegisterWidth
idcode clear
The deviceName argument can be any descriptive string. The string must be
quoted if it includes spaces.
The -quiet option adds the device, but does not display a user notification.
clear
info [-raw]
Returns a description of the device table. The table is represented by a Tcl list
of device elements where each element is a three item Tcl list specifying the
ID code, device name, and instruction register width. Example:
{11001100110011001100110011001100 device_a 8}
{00001100110011001100110011001111 device_b 10}
Command Example
idcode add 0010000000111000100010001000 device_type 8
idcode add -quiet 0010000000111000100010001000 "device type" 8
idcode clear
See Also
• device, on page 33
• chain, on page 27
LO
iice
Duplicates the functionality of the IICE Configuration dialog box.
Syntax
iice clock|controller|current|delete|info|list|new|preconfigure|rename|
sampler
Defines the signal to be used for the IICE sample clock. The signalName is the
full hierarchical path name to the signal. You can select any signal within the
HDL design as the sample clock. However, this signal cannot be sampled
itself while used as the sample clock. This option can only be used during
instrumentation. If signalName is not specified, the option returns the name
of the IICE clock.
-edge positive|negative
Specifies the active edge of the clock (positive or negative) when an IICE
sample clock is specified. The -edge option is only available in the instru-
mentor; the default edge is rising (positive).
-iice iiceID|all
Used when more than one IICE is defined to specify/report the controller
parameters for the specified IICE (iiceID). If the argument all is specified,
the controller parameters apply to each IICE.
-iice iiceID|all
Used when more than one IICE is defined to specify/report the controller
parameters for the specified IICE (iiceID). If the argument all is specified,
the controller parameters apply to each IICE.
-countermode [events|cycles|watchdog|pulsewidth]
Selects the complex counter mode. The value n referenced below is the
value set by the -counterval option (applies only to the debugger).
events
Stops sampling after the trigger condition occurs for the n+1’th time.
This is the default value for -countermode.
cycles
Stops sampling n cycles after the trigger condition occurs.
watchdog
Stops sampling if the trigger condition does not occur for n
consecutive cycles.
pulsewidth
Stops sampling when the trigger condition has met n consecutive
cycles. The number n is controlled by the current setting of -counterval.
-counterval unsignedInteger
Sets a value for the complex counter and loads that value into the
complex counter (applies only to the debugger). The value must fit into
the complex counter width as defined in the instrumentor. The default
value for the complex counter is 16.
-counterwidth integer
LO
-triggerconditions integer
-triggerstates [integer]
-exporttrigger 0|1
-importtrigger integer
Note: When using an external trigger, the pin assignment for the corre-
sponding input port must be defined in the synthesis or place
and route tool.
Enables (1) or disables an IICE to include trigger signals from other IICE
units when determining its trigger condition (applies only to the instru-
mentor). If the -iice argument is omitted, the command applies to the
current IICE.
disabled
Destination IICE triggers normally (triggers from source IICE units
are ignored).
any
Destination IICE triggers when any source IICE triggers or on its own
internal trigger.
all
Trigger occurs when all events, irrespective of order, occur at all IICE
units including local IICE unit.
Used when more than one IICE is defined to select the active IICE (iiceID). If
the iiceID argument is omitted, reports the ID of the currently active IICE.
Note that iiceID is case sensitive.
Deletes the specified IICE (iiceID). The iice delete command is only available in
the instrumentor. LO
Reports the status of the specified IICE (iiceID). If the iiceID argument is
omitted, reports the status of the currently active IICE.
iice list
Creates a new IICE with the name iiceID. If the iiceID argument is omitted, the
new IICE is named IICE_n where n is the next sequential integer. The -type
option indicates if the IICE is to be configured for real-time debugging (rtd) or
normal debugging (regular). For more information on the real-time debugging
feature, see the User Guide.
-iice iiceID|all
Used when more than one IICE is defined to identify the IICE unit; if all is
specified, effective for all IICE units.
-countermode events|cycles|pulsewidth|watchdog
-counterval integer
-crosstriggermode disabled|any|after|all
-crosstriggeriice iiceID
-triggertime early|middle|late
-samplemode normal|qualified_fill|qualified_intr|always_armed
-datacompression 0|1|off|on|false|true
-group 1|2|3|4|5|6|7|8
-notification 0|1|off|on|false|true
Renames the currently active IICE to the name specified (iiceID). The iice
rename command is only available in the instrumentor.
-triggertime early|middle|late
-samplemode normal|qualified_fill|qualified_intr|always_armed
-runselftest 0|1
LO
-datacompression 0|1
-enablemask 0|1 [-msb integer -lsb integer] signalName
-group interger
Used when more than one regular IICE is defined to specify/report the
IICE sampler parameters for the specified IICE (iiceID). If the argument
all is specified, the IICE sampler parameters apply to each qualified IICE.
internal_memory|hapssram
-compression 0|1
The -ram (or -sram) option applies only when the bufferType is set to
hapssram and an external RAM daughter board is installed. The -ram
options are described below. The -ram option applies only to regular IICE
units and is not supported by real-time debug IICE.
{board type}
Specifies the board type for HAPS-60 Series systems; recognized
values are HAPS-61, HAPS-62, and HAPS-64.
{ramlocations location}
The connector location or locations where the daughter board is
physically installed. For a HAPS-60 Series system, location is one or
more integers between 1 and 6 that identify the J1 through J6
HapsTrak II connectors on the mother board. For a HAPS-70 Series
system, location is a set of three adjacent HapsTrak 3 connectors on
the mother board where the daughter board is installed. Multiple
daughter boards can be installed, but only one daughter board can
be dedicated to deep trace debug (additional daughter boards are
allocated to user data memory).
{numberboardstack integer}
The number of SRAM daughter cards stacked at the specified RAM
location. Integer is 1 or 2 for an SRAM installed on a HAPS-70 Series
system and 1, 2, or 4 for an SRAM installed on a HAPS-60 Series
system. The integer value specified applies to all connector locations
(the stack depth must be the same at all locations).
{type value}
The RAM daughter card type according to the following table:
{clockfreq value}
Specifies the frequency of the clock source in MHz for the SRAM. For
more information on SRAM clocks, see SRAM Clocks, on page 28 in
the User Guide.
-rtd arguments
The -rtd option applies only when the IICE type is set to rtd. The -rtd
arguments for the real-time debugging feature are described below. The
-rtd option applies only to real-time debug IICE and is not supported by
regular IICE units.
board boardType
Specifies the HAPS board type. The boardType entered must be in all
caps.
-depth depthValue
-qualified_sampling 0|1
-always_armed 0|1
Controls how a detected trigger affects data sampling (applies only to the
debugger).
early
Approximately 10 percent of the sample data is pre-trigger and
approximately 90 percent is post-trigger.
middle
Approximately 50 percent of the sample data is pre-trigger and
approximately 50 percent is post-trigger. This is the default sample
trigger.
late
Approximately 90 percent of the sample data is pre-trigger and
approximately 10 percent is post-trigger.
-samplemode [normal|qualified_fill|qualified_intr|always_armed]
qualified_fill
Performs qualified sampling until the buffer is full.
qualified_intr
Performs qualified sampling until interrupted.
always_armed
Always-on triggering.
-runselftest 0|1
-datacompression 0|1
Command Example
iice clock -edge falling clk2
iice controller -counterwidth 8 statemachine
iice current IICE_2
iice sampler -triggertime late
iice sampler -datacompression 1
iice sampler -enablemask 1 -msb 3 -lsb 0 ctrlbus1a
iice sampler -iice IICE_2 -rtd {mictorloc {1 3 5}}
iice sampler -ram {ramlocations {7_8_9}}
instrumentation
Manipulates incremental instrumentations.
Syntax
instrumentation new -instr {baseName}
-ncdfile {pathtoFilename.ncd [fpgaName]} |
-dcpfile {pathtoFilename.dcp [fpgaName]}
instrumentation current
instrumentation list
instrumentation save
current
list
load name
LO
Loads an existing instrumentation into the the instrumentor.
save
Command Example
instrumentation load instr_2
instrumentation new –instr {rev_1} –dcpfile
{./proto/pr_1/post_route.dcp}
jtag_server
Configures the JTAG server.
Syntax
jtag_server set -addr {hostName|IP_address} -port {serverPort} -logf {logFfileName}
-usecs 1|0
jtag_server get
-addr {hostName|IP_address}
-port {serverPort}
The port number over which the client and server communicate.
-logf {logFfileName}
-usecs 1|0
get
Returns the server host name or IP address, port number, and log file name.
LO
start
-standalone 0|1
-cabletype xilinxusb|otherValidType
stop
-forced 0|1
Command Example
jtag_server set -addr myhost -port 58015 -logf servercom.log
jtag_server get
INFO: addr 127.0.0.1 port 57015 logf ipc_tcp_xilinx.log
jtag_server start -standalone 1
jtag_server stop
licenseinfo
Displays information about the product version and license status.
Syntax
licenseinfo
logicanalyzer
Configures the logic analyzer for real-time debugging. The scan options define
the target logic analyzer, the assignpod option describes the analyzer interface,
and the submit option sends the data to the logic analyzer. Additional options
display the most recently used logic analyzer scan settings (lastscansettings
option) and show the logic analyzer’s presently scanned pod and module
information (pods option).
Syntax
logicanalyzer scan -latype tla -hostname hostName -username userName
-script scriptName -assignpodsauto yes|no
logicanalyzer submit
logicanalyzer lastscansettings
logicanalyzer pods
-hostname
-username
-script
The name of the script (scriptName) to run to set up logic analyzer (Tektronix
only).
-assignpodsauto
-micconpingrp
The Mictor connector pin group (groupName). The connector pin group is
identified by the concatenation of the Mictor board HapsTrak connector
location, the Mictor connector name, and the Mictor odd/even pin bank
separated with periods. For example, 3.M1.e addresses the even bank of
Mictor connector M1 on the Mictor board installed in HapsTrak connector 3.
-module
-pod
Command Examples
logicanalyzer scan -latype la16900 -hostname sisyphus
-assignpodsauto yes
logicanalyzer assignpod -micconpingrp 2.M1.e -module 1
-pod A2A3CK0
log
Allows logging the console output in the graphical user interface to a file.
Syntax
log fileName|on|off
on
Starts logging to the last specified file or to the default files syn_di.log or
syn_hhd.log.
off
Stops logging.
Command Example
log on
log off
log mylog.log
See Also
• transcript, on page 90
LO
project
Opens existing projects and displays project information.
Syntax
project import projectFile
Performs a simple import of a project (prj) file by extracting the design files,
the device technology, and the design top level. This data is used to create an
implementation (applies only to the instrumentor). After extracting the files,
the design is automatically compiled.
-password password
name [-path]
Returns the name of the current project. If the -path option is specified,
includes the full path to the project.
Command Example
project open C:/space/designs/mydesign.prj
project open -password xyzzy demo_design.prj
See Also
• encryption, on page 37
pwd
Displays the current working directory.
Syntax
pwd
See Also
• cd, on page 26
remote_trigger
Triggers the event (stops data collection and downloads data).
Syntax
remote_trigger [-all|-info|-pid processID |-iice iiceID ]
Triggers the event for every IICE in all debugger instantiations on the corre-
sponding machine.
-info
-pid processID
LO
-iice iiceID
Triggers the event only on the specified IICE in the current debugger instanti-
ation. The default is to trigger every IICE in all debugger instantiations (-all).
Sets the trigger. If the -pid argument is specified, sets the trigger on every IICE
on the debugger instantiation identified by processID; if the -iice argument is
specified, sets the trigger only on the IICE unit specified by iiceID.
Clears the trigger. If the -pid argument is specified, resets the trigger on every
IICE on the debugger instantiation identified by processID; if the -iice
argument is specified, resets the trigger only on the IICE unit specified by
iiceID.
Command Example
remote_trigger
remote_trigger -info
remote_trigger -set -pid 12
remote_trigger -reset -pid 12
remote_trigger -set -iice IICE0
See also
• triggermode option – iice, on page 51
• triggertime option – iice, on page 51
run
Arms the IICE with the current trigger settings and waits until the trigger
condition has occurred and has been detected by the IICE. Once the trigger
condition has occurred, the sample data is downloaded from the IICE and is
displayed on the screen.
Syntax
run -iice iiceID|all
run -wait
Used when more than one IICE is defined to specify the active IICE (iiceID) for
triggering. If the argument all is specified, triggering applies to each IICE.
-timeout integer
Specifies the number of seconds that the debugger waits for a trigger before
stopping. Whenever a time-out occurs, the data buffer is automatically
updated. A value of 0 disables the time-out feature.
-wait
Causes the IICE to wait for the hardware to stop running before returning.
-remote_trigger pid|0
Note: The run command does not stop running until the trigger occurs.
If the trigger does not occur, the run command does not stop. To
cancel the run command, you must click the Stop button in the
debugger menu bar. There is no stop command in the command
shell.
Command Example
run -remote_trigger 1336
searchpath
Sets a search path to find HDL design files during instrumentation or debug-
ging.
Syntax
searchpath [directoryList]
[directoryList]
Searches the specified directories, in order, for design files. DirectoryList can
take the form of the following:
• On a Windows platform: a semicolon-separated list of valid directories.
Note that the Windows “\” separator is not allowed in path names.
• On a Linux platform: a colon-separated list of valid directories.
Default Value
By default, the search path is the current working directory.
Command Example
searchpath {C:/temp;D:/user/joe}
searchpath {/home/john:/home/designs}
See Also
• add option – compile, on page 32
LO
setsys
Sets and queries user customization variables.
Syntax
setsys list
setsys variables
variables
Lists all available variables with a short description explaining their function.
Specifies the device address for the parallel port. This setting overrides the
operating system defaults. Value ranges from 0 to 65535; the default value is
“0”. If no value is supplied, returns the current value.
Command Example
setsys set lpt_address 4095
set_synplify_configuration
Defines the Synplify configuration for the instrumentor.
Syntax
set_synplify_configuration -type|-locate|-current|-license
-locate synplifyPath
-current
-license synplify|identify
LO
show
Displays an HDL source code context on the command line.
Syntax
show [-integer] [+integer] fileName:lineNumber
[+integer]
fileName:lineNumber
Command Example
show -8 +16 cpu.vhd:29
signals
Instructs the instrumentor to create special debug logic for the IIICE to
sample a signal from your HDL design or to delete the debug logic and return
the signal to its “not instrumented” status. The group options assign and
report signals in multiplexed groups.
Syntax
signals add [options] sigName [sigName ... ]
signals add [options] -msb value [-lsb value] sigName
SigName is the full hierarchical path name of the signal. In the first syntax
statement, more than one signal can be specified for sampling or triggering by
including additional signal names separated by spaces. In the second syntax
statement, the -msb and -lsb arguments specify a bit or bit range of a bus.
Note that when specifying partial buses:
• Use the -msb argument (without an -lsb argument) to specify a single bit
• Observe the index order of the bus. For example, when defining a partial
bus range for bus [63:0] (or “63 downto 0”), the MSB value specified must
be greater than the LSB value. Similarly, for bus [0:63] (or “0 upto 63”),
the MSB value specified must be less that the LSB value.
LO
The following options are available with the add argument:
-iice iiceID|all
Used when more than one IICE is defined to specify the active IICE
(iiceID) for signal sampling/triggering. If the argument all is specified,
signal sampling/triggering applies to each IICE.
-sample
-silent
-field fieldName
Instruments the named field or record for the specified signal (partial
instrumentation).
-trigger
Note: The -sample and -trigger options can be combined or both options
can be omitted to specify a signal for both sampling and trig-
gering.
SigName is the full hierarchical path name of the signal. In the first syntax
statement, more than one signal can be specified for deletion by including
additional signal names. In the second syntax statement, the -msb and -lsb
arguments identify a previously specified bit or bit range of a bus.
Note: When a partial bus is defined, you must explicitly delete the indi-
vidual bus segments to return their status to non-instrumented.
-iice iiceID|all
Used when more than one IICE is defined to specify the active IICE
(iiceID) for sample signal deletion. If the argument all is specified, sample
signal deletion applies to each IICE.
-field fieldName
Removes the instrumentation from the named field or record for the
specified signal (partial instrumentation).
LO
Assigns sigName to the specified Mictor connector pin location. In the above
syntax, sigName is the full hierarchical path name to the signal or bus and
MictorPinName is the concatenation of the Mictor board HapsTrak connector
location, the Mictor connector name, and the Mictor pin name separated with
periods. For example, 3.M1.D3e is the D3e pin of Mictor connector M1 on the
Mictor board installed in HapsTrak connector 3.
-iice iiceID|all
-condition {triggerCondition}|all
-msb integer
-lsb integer
Command Example
signals add /top/u1/reset_n
signals add -iice IICE_2 -trigger /top/u1/clken
signals add -sample -field iport_mem {/Struc_P_Signed_LDDT_iport}
signals delete -msb 63 -lsb 32 /top/data_in
signals group {2 3} /top/data_in top_data_out
signals group -show_tab all
signals map /beh/blk_xfer_cntrl/req_o 4.M1.D13o
signals map /beh/blk_xfer_inst/beh/{slave_bus[0]} 4.M1.D13o
See Also
• breakpoints, on page 24
• clock option – iice, on page 51
LO
source
Runs a TCL script of commands.
Syntax
source fileName
Command Example
source /home/joe/syn.tcl
source E:/counter/load.tcl
statemachine
Configures the state machine with the desired behavior.
Syntax
statemachine addtrans -from state [-iice iiceID|all] [-to state]
[-cond "equation|titriggerInID"] [-cntval integer] [-cnten] [-trigger]
Specifies the state from which the transition is exiting. This option is required
to add a transition to the state machine.
Used when more than one IICE is defined to specify the active IICE (iiceID) for
state-machine configuration. If the argument all is specified, state-machine
configuration applies to each IICE.
Specifies the state to which the transition goes. If the -to option is not given,
the state defaults to the state given by the -from option, thus creating a transi-
tion back to the -from state.
Operators are:
• Negation: not, !, ~
• AND operators: and, &&, &
• OR operators: or, ||, |
• XOR operators: xor, ^
• NOR operators: nor, ~|
• NAND operators: nand, ~&
• XNOR operators: xnor, ~^
• Equivalence operators: ==. =
• Constants: 0, false, 1, true
Specifies that in the case when the transition is taken, the counter must be
loaded with the given value. This option is only valid if a counter was instru-
mented using the iice controller -counterwidth option.
addtrans [-cnten]
If this flag is given, the counter is decremented by ‘1’ during this transition.
This flag is only valid if a counter was instrumented using the iice controller
-counterwidth option.
addtrans [-trigger]
-iice iiceID|all
Used when more than one IICE is defined to specify the active IICE
(iiceID) for state-machine transition deletion. If the argument all is speci-
fied, transition deletion applies to each IICE.
Deletes the state transitions from the states given in the argument, or
from all states if the argument -all is specified.
-iice iiceID|all
Used when more than one IICE is defined to specify the active IICE
(iiceID) reporting the state-machine settings. If the argument all is speci-
fied, the settings for each IICE are reported.
Reports the settings for the states given in the argument or, if the option
-all is specified, for the entire state machine.
-raw
Command Example
statemachine addtrans -from 0 -to 1 -cntval 9
statemachine addtrans -from 0 -cond "(c1 | c2)" -trigger
statemachine addtrans -from 1 -cond "c1 && c2" -cnten
statemachine addtrans -from 2 -cond "c2 && cntnull" -trigger
statemachine addtransLO
-from 0 -cond "IICE_1 and IICE_2" -trigger
statemachine clear 1
See Also
• iice controller -counterwidth option – iice, on page 51
• iice controller -triggerconditions option – iice, on page 51
• iice controller -crosstrigger option – iice, on page 51
stop
Activates/deactivates an HDL source-level breakpoint that has been added
by the instrumentor. All activated breakpoints are used to form the trigger
condition of the IICE. Only breakpoints that have been instrumented using
the breakpoints add command can be activated. One or more breakpoints can
be activated/deactivated at the same time. A breakpoint name consists of two
components:
• The fully hierarchical path of the HDL design unit that denotes the
underlying control statement of the breakpoint.
• The HDL source code location given by the file name and the line
number of the breakpoint.
The combination of these two components ensures that each breakpoint has
a unique name.
Syntax
stop disable [options] breakpointName [breakpointName ...]
-iice iiceID|all
Used when more than one IICE is defined to specify the active IICE
(iiceID) containing the breakpoint to be disabled. If the argument all is
specified, disabling the breakpoint applies to each IICE.
-condition all|{conditionList}
-iice iiceID|all
Used when more than one IICE is defined to specify the active IICE
(iiceID) containing the breakpoint to be enabled. If the argument all is
specified, enabling the breakpoint applies to each IICE.
-condition all|{conditionList}
Displays information about the settings for the given HDL breakpoint. The
-raw option provides the information in a machine-readable format.
Command Example
stop disable -condition 1 /top/u1/case_128/cpu.vhd:29
See also
• breakpoints, on page 24
• iice, on page 51
transcript
Controls recording of all typed commands into a transcript file.
Syntax
transcript [fileName]
transcript [off]
transcript [on]
transcript off
transcript on
Commands system to start recording all typed commands and to store them
to the default transcript file. The default file is syn_di.scr for the instrumentor
and syn_hhd.scr for the debugger.
Default Value
By default, command recording is off.
Command Example
transcript on
See Also
• log, on page 68
LO
userprefs
Defines the instrumentation preferences and installation path for the instru-
mentor.
Syntax
userprefs option save_orig_src|encrypt_orig_src
synplify_install [installPath]
verdi
Imports or instruments signals from the Verdi essential signal database.
Syntax
verdi getsignals ESDBpath
verdi instrument
LO
watch
Activates/deactivates a watchpoint as a trigger condition for the IICE. A
watchpoint triggers when the sample value of the watched signal matches the
watch value. Only signals that have been instrumented using the signals add
command can be used for watchpoints.
Syntax
watch disable [options] signalName [signalName ...]
watch disable [options] -msb value [-lsb value] signalName
SigName is the full hierarchical path name of the signal. In the first syntax
statement, more than one signal can be deactivated for sampling or triggering
by including additional signal names separated by spaces. In the second
syntax statement, the -msb and -lsb arguments specify a bit or bit range of a
bus. Note that when specifying partial buses:
• Use the -msb argument (without an -lsb argument) to specify a single bit
• Observe the index order of the bus. For example, when defining a partial
bus range for bus [63:0] (or “63 downto 0”), the MSB value specified must
be greater than the LSB value. Similarly, for bus [0:63] (or “0 upto 63”),
the MSB value specified must be less that the LSB value.
-iice iiceID|all
Used when more than one IICE is defined to specify the active IICE
(iiceID) containing the watchpoint to be disabled. If the argument all is
specified, disabling the watchpoint applies to each IICE.
-condition all|{conditionList}
When only value is specified for signalName, gives the watchpoint signal an
exact value that the system watches for, and enables that watchpoint for
triggering. When valueFrom/valueTo is specified, gives the watchpoint signal
two values that the system watches for, and enables the watchpoint for
triggering. These formats allow you to specify a trigger condition on the value
transition of a signal. In the second syntax statement, the -msb and -lsb
arguments specify a bit or bit range of a bus. Note that when specifying
partial buses:
• Use the -msb argument (without an -lsb argument) to specify a single bit
• Observe the index order of the bus. For example, when defining a partial
bus range for bus [63:0] (or “63 downto 0”), the MSB value specified must
be greater than the LSB value. Similarly, for bus [0:63] (or “0 upto 63”),
the MSB value specified must be less that the LSB value.
-iice iiceID|all
Used when more than one IICE is defined to specify the active IICE
(iiceID) containing the watchpoint to be enabled. If the argument all is
specified, enabling the watchpoint applies to each IICE.
-condition all|{conditionList}
Displays information about the settings for the given HDL watchpoint. The
-raw option provides the information in a machine readable format.
Displays or changes the radix of the specified watchpoint signal for the
sampled data. Specifying default resets the radix to its initial intended value.
Note that the radix value is maintained in the “activation database” and that
this information will be lost if you fail to save or reload your activation. Also,
the radix set on a signal is local to the debugger and is not propagated to any
of the waveform viewers. Note that with partial buses, the radix applies to the
entire bus.
-iice iiceID|all
Used when more than one IICE is defined to specify the active IICE
(iiceID) containing signalName. If the argument all is specified, the radix
is reported/changed for each IICE.
width signalName
Reports the width of a vectored (bused) signal. Note that with partial buses,
the width reported always applies to the entire bus.
Command Example
watch enable /top/u2/current_state {red}
watch enable -condition {1 2} /top/u1/count {"0X01"} {"0010"}
watch radix current_state hex
watch enable /top/bx {4’b0010}
watch enable -msb 3 -lsb 0 /top/u2/data_sel {4’h0}
watch enable -condition all /top/done {1’b0} {1’b1}
See also
• signals, on page 78
• controller -triggerconditions option – iice, on page 51
waveform
Configures the waveform preferences and launches the desired waveform
viewer once the debugger has uploaded data from the instrumented design.
Syntax
waveform custom [userProcedure]
period [period_in_ns]
Sets/gets the period with which to display the debug data in the waveform
viewer. Since the debugger has no information about the timing of the user
design, this setting is merely used for customizing the display.
LO
show
Launches the waveform viewer that is currently selected with the current set
of sample data.
-iice iiceID|all
Used when more than one IICE is defined to specify the active IICE
(iiceID) containing the sample data to be displayed. If the argument all is
specified, the sample data is displayed for each IICE.
-showequiv
Selects the user preference for the waveform viewer. The selection custom
causes the waveform show command to call the procedure specified by the
waveform custom command.
-list
Command Example
waveform viewer -list
waveform show -showequiv
write fsdb
Writes the sample data of each specified signal in FSDB format for analysis
and display in Verdi nWave.
Syntax
write fsdb [options] fsdbFilename
Used when more than one IICE is defined to specify the active IICE (iiceID)
containing the sample data.
-showequiv
fsdbFilename
Writes the sample data to the specified fast signal database output file.
Command Example
write fsdb D:/tmp/b.fsdb
LO
write instrumentation
Writes the instrumented design files to the project directory.
Syntax
write instrumentation options
Options
-save_orig_src
Create an orig_sources directory in the project directory and copy the user's
original sources into this directory.
-encrypt_orig_src
-idc_loc directory
-idc_only
-cdc_only
Command Example
write instrumentation -encrypt_orig_scr
write instrumentation -save_orig_src
write instrumentation -idc_only
See Also
• encryption, on page 37
LO
write samples
Writes the sample data of each specified signal.
Syntax
write samples [options] signalName [signalName ...]
write samples [options] -msb value [-lsb value] signalName
In the above syntax statements, sigName is the full hierarchical path name of
the signal. In the first syntax statement, sample data can be written for more
than one signal by including additional signal names separated by spaces. In
the second syntax statement, the -msb and -lsb arguments specify a bit or bit
range of a bus. Note that when specifying partial buses:
• Use the -msb argument (without an -lsb argument) to specify a single bit
• Observe the index order of the bus. For example, when defining a partial
bus range for bus [63:0] (or “63 downto 0”), the MSB value specified must
be greater than the LSB value. Similarly, for bus [0:63] (or “0 upto 63”),
the MSB value specified must be less that the LSB value.
Used when more than one IICE is defined to specify the active IICE (iiceID)
containing the sample data for the specified signal.
Specifies the range of sample data displayed. You can view the data at
different points of the trigger event. Enter a negative cycle value to view data
sampled before the triggered event. Enter a positive cycle value to view data
samples after the trigger event. Enter a zero cycle value to view data sampled
during the trigger event.
-file fileName
Writes the sample data to a specified output file. If no file is given, the data is
displayed on the screen.
-force
-raw
Command Example
write samples -file D:/tmp/samples.txt /top/u1/count
write samples -cycle { -10 10 } /top/u2/current_state
write samples -msb 31 -lsb 0 /top/u3/data_outA
LO
write vcd
Writes the sample data of each specified signal to a Verilog Change Dump
(vcd) format.
Syntax
write vcd [options] fileName
Used when more than one IICE is defined to specify the active IICE (iiceID)
containing the sample data for the specified signal.
-comment commentText
Inserts a text comment into a file. Use curly braces ‘{ }’ to group a multi-word
comment.
-gtkwave
-showequiv
fileName
Command Example
write vcd -gtkwave D:/tmp/b.vcd
write vhdlmodel
Creates a VHDL model from sample data. This command is not supported in
Verilog-based designs or in mixed-language designs when the top-level is a
Verilog module.
Syntax
write vhdlmodel [options] fileName
Used when more than one IICE is defined to specify the active IICE (iiceID)
containing the sample data for the VHDL model.
-showequiv
fileName
Command Example
write vhdlmodel D:/tmp/b.vhd
LO
A synthesis tool 16
console output
activation command 23 logging 68
conventions
B design hierarchy 11
file system 10
board file symbol 8
generation 39 syntax 8
board query 39 tool 10
boundary scan 35 counterwidth option 52
breakpoints
activating/deactivating 88 D
searching 47
breakpoints command 24 debugger
process ID 70
buffer
sample depth 59 depth option 59
design files
C listing 32
writing 99
cable option settings 30 design hierarchy 44
cable types 29 design hierarchy conventions 11
CAPIM 36 device command 33
cd command 26 device ID codes 49
chain command 27 directories
clear command 29 changing 26
displaying working 70
clock
sampling 51 distributed instrumentation 38
clock option 51
com command 29
E
command history 90 encryption command 37
command-line options event trigger 70
synthesis tool 19 exit command 38
commands
recording 90 F
compile command 32
file system conventions 10
complex triggering 52
files
configuration
initialization 20
IICE 51