0% found this document useful (0 votes)
186 views4 pages

Wah Campus: Experiment No 12

This document summarizes a lab experiment to design a 2-bit counter using JK flip-flops. The key steps are: 1. The circuit requires four 2-input NOR gates, four 3-input AND gates, one 2-input AND gate and one 2-input XOR gate. 2. The student wired the circuit according to the logic diagram and truth table. 3. The outputs of the circuit were connected to LEDs to monitor the states as different input combinations were applied. 4. The truth table for the JK flip-flops was filled out and matched the theoretical truth table.

Uploaded by

HALLIMA SADIA
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
186 views4 pages

Wah Campus: Experiment No 12

This document summarizes a lab experiment to design a 2-bit counter using JK flip-flops. The key steps are: 1. The circuit requires four 2-input NOR gates, four 3-input AND gates, one 2-input AND gate and one 2-input XOR gate. 2. The student wired the circuit according to the logic diagram and truth table. 3. The outputs of the circuit were connected to LEDs to monitor the states as different input combinations were applied. 4. The truth table for the JK flip-flops was filled out and matched the theoretical truth table.

Uploaded by

HALLIMA SADIA
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 4

WAH CAMPUS

NAME: LAIBA AKHTER


REG NO : FA19-BCS-195
SECTION: BCS-3D
SUBJECT: DLD LAB
SUBMITTED TO: KANWAL SAEED
DATE : 28–DEC-2020

EXPERIMENT NO 12:
EXP TITLE :Design a 2- bit counter using JK Flip Flop .
 Apparatus:
 Relevant ICs (AND 7408), two JK flip flops.
 Function generator.
 wires.
 Power supply.
 Virtual breadboard.
 Procedure:

The implementation of 2 – bit binary counter with JK flip-flop requires four 2-input NOR gates, four 3-
input AND gates, one 2 – input AND gate and one 2 – input XOR gate. Get the required ICs and other
apparatus from the lab attendant. Install the ICs in the breadboard of the Logic Trainer. Connect 5Vdc
power supply and ground on pins 14 and 7 respectively. For other pin configuration consult the data sheet
(we have already used these gates in the first lab so it should not be a problem). Wire your circuit
according to the logic diagram you have drawn. Once you have wired the circuit, check it with your
instructor and, if approved, power up your circuit. The outputs should be connected to the LEDs on the
Logic Trainer for monitoring purpose. Apply different input combinations at the input and note down the
outputs (next states) and fill in the following truth table. This truth table should conform to the one given
in theory. If there are problems, consult the appendix on troubleshooting given at the end of lab manual.

 Truth table:
Inputs of comb.Cct output of comb. Cct

Present state Input Next state flip flop inputs

A B X A B JA KA JB KB
0 0 0 0 0 0 X 0 X
0 0 1 0 1 0 X 1 X
0 1 0 0 1 0 X X 0
0 1 1 1 0 1 X X 1
1 0 0 1 0 X 0 0 X
1 0 1 1 1 X 0 1 X
1 1 0 1 1 X 0 X 0
1 1 1 0 0 X 1 X 1

 Logic Diagram:
Equations:
JA = BX

KA = BX

JB = X

KB = X

 Simulation:
 Conclusion:
Circuit of 2-bit counter is implemented according to the given task.

You might also like