Maximum-Likelihood Detection for

Energy-Efficient Timing Acquisition in NB-IoT

Harald Kröll† , Matthias Korb† , Benjamin Weber‡ , Samuel Willi‡ and Qiuting Huang‡
† ACP AG, Zurich, Switzerland
‡ Integrated Systems Laboratory, ETH Zurich, Switzerland

{kroell,mkorb}@newacp.ch {weberbe,huang}@iis.ee.ethz.ch,

Abstract—Initial timing acquisition in narrow-band IoT (NB- bandwidth reduction to 200 kHz was the main simplification
IoT) devices is done by detecting a periodically transmitted of NB-IoT compared to the minimal bandwidth requirement of
known sequence. The detection has to be done at lowest possible
arXiv:1608.02427v2 [cs.NI] 7 Oct 2016

1.4 MHz in LTE. But, the RF-transceiver power consumption

latency, because the RF-transceiver, which dominates downlink
power consumption of an NB-IoT modem, has to be turned is rather proportional to the carrier frequency and to sensitivity
on throughout this time. Auto-correlation detectors show low requirements than bandwidth. While adjacent channel leakage
computational complexity from a signal processing point of ratio was reduced by 5dB compared to 1.4MHz LTE [4], the
view at the price of a higher detection latency. In contrast maximum carrier frequency is only slightly reduced from 2.6
a maximum likelihood cross-correlation detector achieves low to 2.2 GHz. Thus, the RF-transceiver is still dominating the
latency at a higher complexity as shown in this paper. We present
a hardware implementation of the maximum likelihood cross- downlink power consumption. However, power consumption
correlation detection. The detector achieves an average detection of digital baseband processing scales well with bandwidth,
latency which is a factor of two below that of an auto-correlation which is useful for NB-IoT timing acquisition.
method and is able to reduce the required energy per timing Besides data decoding timing acquisition is the most com-
acquisition by up to 34%. plex baseband task along the downlink path [3]. Hereby
energy-efficient timing acquisition is important because timing
I. I NTRODUCTION
acquisition has to be done frequently, mainly for two reasons:
Various estimates predict tens of billions devices connected Firstly, NB-IoT is designed for the exchange of short mes-
to the Internet in 2020 in what is called the Internet of sages, thus devices are in deep sleep mode most of the time
Things (IoT). IoT does not only take place in our homes and wake up e.g. every hour for a short period of time to
or in areas which are covered by WiFi and other low-range receive and transmit a few hundred bytes. To ensure years
networks, but also in remote places which are only covered of battery life, circuits providing accurate timing are turned
by cellular or satellite networks. Cellular network coverage is off during deep sleep mode, which requires timing acquisition
almost ubiquitous and does not depend on proprietary end-user after every wake-up. Hereby timing acquisition has a relatively
infrastructure. large share on the short reception interval, which requires an
To realize an IoT in which the requirements for low-power, energy-efficient implementation. Secondly, NB-IoT is likely
low-cost, and extended-coverage IoT devices will be met, to be used on vehicles and drones where devices are prone
the 3GPP consortium agreed on an LTE-Release-13 extension to timing synchronization loss due to their relatively high
called Narrow Band (NB)-IoT or LTE Cat-NB1 [1]. On the mobility and the absence of handover capability in NB-IoT.
downlink and uplink side NB-IoT mainly reuses LTE technol- For timing acquisition a periodically transmitted a pri-
ogy. However, cell search and timing acquisition procedures ori known Narrowband Primary Synchronization Sequence
have undergone major adaptions to fit into the narrow 200 kHz (NPSS) has to be detected [5]. The latency of a successful tim-
bandwidth and to meet coverage extension requirements. ing acquisition (NPSS detection) is the relevant performance
The energy efficiency of an NB-IoT device preferably metric, because it determines how long the RF-transceiver,
implemented as a system-on-chip is of great importance to which consumes the major part of the power, has to be
achieve years of battery life as aimed for emerging cellular turned on to receive data. Therefore, using low-complexity
IoT standards. Besides the power amplifier for the uplink, NPSS detectors which achieve suboptimal performance can be
which holds the lions share of overall power consumption, disadvantageous for the overall downlink energy efficiency.
it is well known that the downlink baseband signal processing Contributions: We present a maximum-likelihood (ML)
consumes only a fraction of the RF-transceiver power in re- NPSS detector which achieves an average timing acquisition
ceive mode [2]. This appears because RF-transceivers are dom- latency of 140 ms (in-band deployment, TU1.2 channel, SNR
inated by analog integrated circuits whose power consumption = -12.6 dB). Our ML detector is based on cross-correlation
especially does not scale as well with the CMOS technology metrics which are computed in frequency domain via the
feature size as it scales for the digital integrated baseband overlap-save method. The detector has high computational
circuits. Therefore, NB-IoT has undergone various simplifi- complexity but allows to reduce the required energy by up to
cations to allow energy-efficient implementations. Significant 34% per timing acquisition for state-of-the-art RF-transceivers.
 NPSS NPSS ML correlation function
40
10 ms NSSS x SC0 NSSS x SC2
frame NSSS x SC1 NSSS x SC3
12 OFDM

30
tones

20
11 OFDM
symbols 80 ms block
10

Fig. 1. NPSS and NSSS resource mapping onto an NB-IoT frame.

0
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
normalized fo
II. T IMING ACQUISITION IN NB-I OT
Fig. 2. ML function over normalized frequency offset.
The first step after power-on (or after a wake-up from a
sleep cycle) of an NB-IoT device is the detection of an NB-
IoT capable base-station. In case such a base-station exists, the after power-on or after wake-up from a sleep cycle. This
receiver does not know which OFDM symbol of the frame is heavily affects the detection complexity because the device
currently transmitted. On top of that, the frequency relation needs to analyze various frequency-offset candidates within
between the base-station and the local receiver clock is also a specified boundary, as well. To reduce the complexity it
unknown. In NB-IoT as well as in other LTE device categories, is possible to perform a coarse frequency and timing offset
the detection of a suitable base-station and the estimation of estimation on a down-sampled version of the received signal.
the timing and frequency offset is based on two periodically For example in [6] the coarse estimation is done via auto-
transmitted sequences: the NPSS and the Narrowband Sec- correlations at a sampling frequency of 240 kHz. Then, one
ondary Synchronization Sequence (NSSS). While the NPSS sub-frame consists of only 2,400 samples.
is transmitted repeatedly every sub-frame of length 10 ms, III. ML T IMING ACQUISITION WITH C ORRELATIONS
the NSSS is repeated in every second sub-frame as shown
in Fig. 1. For NB-IoT the transmitted NPSS is identical in There are two main algorithms to perform timing acqui-
every sub-frame for all base-stations. In contrast, the NSSS sition, namely auto-correlation and cross-correlation. While
depends on the base-stations cell ID and is scrambled with a auto-correlation is the only option if the transmitted, periodic
frame-dependent sequence code. sequence is unknown, for NPSS detection both algorithms can
The NPSS is used to verify the existence of an NB-IoT be applied as the transmitted sequence is known to the receiver.
capable base-station. Additionally, it enables the estimation of Auto-correlation approaches are in general more hardware
the frequency offset and timing offset with respect to the sub- efficient than cross-correlation approaches. But, since the
frame boundary. The NSSS is then used to detect the frame auto-correlation algorithm does not exploit the fact that the
boundary and cell ID. transmitted sequence is known, its performance is sub-optimal.
The NPSS is defined in frequency domain as a Zadoff-Chu In fact, cross-correlation detectors are ML detectors [7]. This is
sequence of length 11 for each sub-carrier index n given by the reason, why many applications like radar systems or GPS
receivers use a cross-correlation for signal detection [8]. In this
−j5π(n+1)
S[n] = e 11 c[l], n = 0 . . . 10 (1) paper we focus on low latency rather than low complexity.
Thus, the ML detector [7] (Page 244), which projects the
where c[l] is an element of the code cover vector received signal vector onto each of the Nf possible frequency
candidates, is a viable option for NPSS detection.
c = [1, 1, 1, 1, −1, −1, 1, 1, 1, −1, 1],
The NPSS ML detector correlation metrics are given by
with l being the symbol index in a sub-frame. This sequence θ+189
X
is mapped to 11 subsequent OFDM symbols each consisting C (r | θ, fo ) = r[k]s∗ [k]e−j2πfo k/fs , (2)
of 12 OFDM sub-carriers holding one copy of the NPSS. k=θ
After zero-padding each of the 11 copies to 128 symbols, where the received signal vector
time-domain conversion, and cyclic-prefix insertion of either T
r = [r[0] r[1] . . . r[189 − 1]]
length 9 or 10, the NPSS results in 1,508 time domain samples.
With a sub-frame length of 10 ms and a sampling rate of has a sampling rate of fs = 240 kHz and s[k] for k = 0 . . . 188
1.92 MHz 19,200 samples need to be captured in order to get is the time domain NPSS sequence given in Eq. (1) at 240 kHz.
exactly one copy of the NPSS. As the sub-frame boundary is The ML function C(r 0 | θ = 0, fo ) for a distortion-free
unknown, the NPSS can start at any of the 19,200 samples. received signal vector r 0 over the frequency offset fo is plotted
One task of the receiver is to estimate the beginning of the in Fig. 2. The ML frequency- and timing-offset estimation fˆo
NPSS to acquire sub-frame boundary timing information. In and t̂o can then be calculated according to
addition, an NB-IoT device has a random frequency offset
(fˆo , t̂o ) = arg max {C(r | fo , to )} .
because the crystal oscillator on the device is not yet tuned fo ,to
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of sizeaoperations
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r method. On respectively.
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h
f
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-POINT single
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t i
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a Nthe 2.87/10ms =90% 287.1/s
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By choosing
t r
t e aerdoth si-tcc upltrs 8u9tat leerl pcuial ovrre hedorT c n i y a e l hardware. r f
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achieve a hit rate.

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o a For ML detector correlation metrics
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by generation of the NPSS reference signals in NN different SNRs

by
c n a r n . = 189

(OLS)
l b g f e

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4

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-12 swhich
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le s. O n sfrequency omultiplications o- teor

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o average for each received block of size As can be seen
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N
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urf e cross-correlations ttations . 120 1.5 and 45.6 radix-2
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76,800 189 cross-correlations

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dauto-correlatio

low-latency
npdClelength Shift ATthe
O

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OMPLEXITY ERFORMANCE ARDWARE
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-POINT
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t d g s e l
ai
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n c e g d g p N
Considering N s different frequency candidates a -t

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Fig. 6. Energy per NPSS

t h 3 a leo r[k]s r uac

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s t hofhPSeSeither 4 u h e mi v s o e S s f l proposed
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620
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d j2⇡f f

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c. . .complexity [k]e , t PS74,400
P
ugI MPLEMENT
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136

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n n f ehigher M a

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u to be o every o

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computational elements

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i i C OMPLEXITY e

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n t g c AND ERFORMANCE
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s cross-correlation-based CsOMPLEXITY

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ee on ap relat algroerd s hkond de-als Th OuLtionintiso effihtceps s. Tohi 60uloenc0ck 9dspoint sequence given in Eq. 1. t m m i 2.87/10ms
r d p

long,of
i o a o

Ns NPSS
e

NPSS in time efficiently in VLSI and thus has a very

i o i where the S [k] received
o n s signal vector
ma complexity s
expected O to
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main computation o

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r et iomaximum-likelihood
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the FFT and 80 IFFT blocks with a required

we
d IFFTlsoperations need W
ms as elati srate co tof ehnodrt =
eThe nca ny in -1 d od rqiugenfunction q 8 foryNT Fcross-corr. t IFFT t possib

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c f for s oN-
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-POINT NAO single
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oN-pmillion
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cro oto y a rofree s d received vector efr over . . r[137 frequency e s multiplications H m ofTsize

which
r b u h n h s e r
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k for each
method . received
is well r a block
.
established s N-POINT
-POINT
especially O.0 aand
IFFTsingle 2 for I
2.87/10ms
discrete convo = 28

respectively. Even for the more demanding IFFT it is possible

tations or 1.5 and 45.6 million radix-2 operations per second,
2.87/10ms = 287.1/s and 890.0/s FFT and IFFT compu-
the FFT and IFFT blocks with a required throughput of
is shown in Figure 5. The main computational elements are

takes 620 ms to achieve a 90% hit rate.

deployment which has the most demanding SNR requirement

here for the first time, remove it and just mention the SNR

Hence, its overall computational effort per timing acquisition

not need

timing
sub-frame of the ML detector compared to theparison,
complexity
135.4
additions
Choosing
n c - w y s i t e 20 n as o d i o e c e FFT, o i n complex
t a V of
g a vector
5 tationsk 0 x -
45.6 g

Energy per NPSS detection overarea

ube sub-frame c e r n

[8]. actually below 10x that of the low-complexity timing

implemented
a - s B i n f l o w t a c 9 i i

the

the
and coarse-timing offset estimation with the overlap-save method.
d sy function f y

on
d

Table
ncofy 240 renlength

hardwareof accelerator
h s , o re2. This dbei performed.
cross-corr.

depends
o o
mcus tr[a6te] d in epar sampling a 100 point FFT, point-wise
rebe applied
complex
blorespectively.
multiplications of a vector tations or and

power consumption
t a plotted dNf IFFT operations need 8 ad foranthe

consumption of the auto-correlation

encN , and d more demanding IF

of acquisition [9] is roughly 10x higher.

he r. A ient eboundary e
aut smitt t,iscro eoffset SenSc rate
40
reliskHz

A block diagram of the cross-correlation NPSS detector

As can be seen from Figure 4, the OLS detector achieves a

The performance in terms of timing acquisition latency is

As we will
N 1.5
n
aso s ufszeoreais
-1
hFigure iev-1 evaluated in for

weitsassume
atm fetz50 inand of te150 it to and to
60 rEven
f
efes[k] igu operations
has 200 250
ive the ffic 19.200 th ransamples. ac he r ML t e folluaccording sr nhg so 8htoe8.reAc hereNquP reque s-cor tion 20 r50 qu emken= 0 . . . 136of islengthbut N , and can
ock nf F150
N IFFT also T auto-corr. need to cross-correlations.
onbe performed. em respectively. ByEven ap

RX-power
ece of r fashion e F i

MOPS, respectively
ny l

units.
s l d

thatandin
e e t f v e t o
c epaic the f f s a S f r l b i I F / s i l Fig. 5. Block diagram

in Figure 4 for in-band BW: in-band is mentioned

e n c e I n t e i er w i e 1 t cyclic t t prefix extended o i c 128-point P S RX-power tIFFT pof of the time
RF-transceiver domain
100 [mW] OLS to the NPSS cross-correlation,
. 1 m r e 200 the input stream is 25 d
i n r l

V. H ARDWARE (VLSI) I MPLEMENTATION

r t c 20ltip e N eren A wn nd 287 .6

the power consumption of the auto-correlation

a t, s beginning s c p asde rlatop tsb, e threan e i n im o

as many
h . s the i re
mate
dw Bthe u that t timal of e mof40length

implementation.
an
hi PS is pa ML vreoˆ n at a S ⇤m[k] ho overlapping a

I. 30
n fsteo NPSS e sequence given inifEq. f (1). y 100 into sequences N as illustrated

detection
T i f f o u t h i l RX-power s ofTRF-transceiver 4 5 [mW] h

the
. p o nf d s = t
and for
] G h o (f ,eot̂ ) =darg emax {C(r 50 f . : D ea 150 200 250
ary 9 fact bIn
n [ timing.
o addition, .
[6] s or an
t the h s| efo , too)} L is FF ms

FFT
ect cooys o e

270.5 MOPS. Thus, the computational

st

on its implementation.
u -

multiplications
In nM

of RF-transceiver
b i ion d be

see percent
One
he s s ctorsbecause 0]. hus, nal v qucenh th th an fo ,tood i nt-w Fig. t 6. ifieEnergy per NPSS C E detection er over the RX-power 1.5 Even

VLSI
em [1the RX-power aof RF-transceiver 10[mW]
it t nce ioffset
quency Key characteristics are sh l s h

low-complexity
t a n

sub-frames
T g e i c i r p N i g / r

Cross-Correlation
s i h e im a i 7
.8 ns o detection

size
e sy tion ity. ed s nt f r t o A

thatofthe
w ich c

in the following,
det arafter me a p e tgoen hypothesis, y h . Onper 2NPSS .
thm Energy

efficiently
a tuned s RFig.
M 6. ely over 20RX-power
s not
orm ML e rad dete mple receiv iffeHereby
c power- x re differentwh thistimebyoffset ts hich which corre- ori cantl hodCross-Correlation tio cof ivfrequency-offset candidate

per NPSSofdetection
FO

over RX-power
resultas ready
hit e - a t
area is occupied by the FFT t h g w R l g N t 50 1

To make
on e
rcomplexity ik gna because l o hethe h spond d f d , n Fig. 6. P E Energy a per fi NPSS t edetection povere RX-power

and
a l c to sub-frame boundaries,
e l y have i to s be evaluated by cross- i e l s

leading toinan VLSI

s ons r si than ts t wit tion . o lac l a f t d n g r e
Naturally, the power consumption of the auto-correlation a i hit e m o r

N
n dom insh the correlation D
a s si g n n
si vec . t
uency ti offset o r ojec within
options tes etecprocessing correlatingscheme the received reofp the itio samples A N window
n-b o be elatio O aand coarse-timing

of theaauto-correlation
can
ica ion f rathe Fig. pr 3.dida Signal cyNPSS c
cli detector which ed
onNaturally, the power To consumption fairofcom-
the auto-correlati

=
Y
dd ML I Tincludes iofractional-frequency a offset estimation. The right sub-figure

of the

[mW]
low-complexity
d

thus
n t t r of form

To
t y

the low-complexity
h S A e a r
l a y c
i shows n
method depends
a correlation S with the known its implementation. NPSS. make u aauto-correlation
In addition c correlations X
E are rperformed e l d o N s

1,
c

be
rS re hardware h c
accelerator P computation with the overlap-save
q o method. t e c n r

frequency-offset
n L r -
t e w l e N
Naturally, the power consumption r e of the t P o e c o i o e

RX-power
, t p

024
a 4) ossi b r f te rehypothesis c xp t Fig. 6. En
l
method depends on its implementation. To make a fair com. O Mfo which u ze N

make
w- 24diagram fo for every Nf frequencylaoffset ss- s defines athe ica be

estimated

Key
the ML
olock p tion of NPSS hardware accelerator a . C shallcrosupport. i e exity of si ltipl d to

has
parison, method we assume thaton theitslow-complexity re dwthe
auto-correlation

overall computational
auto-correlation
IMING ge A CQUISITION

fair com-
depends implementation. To make a fair com- V

the
p range of frequency offsets detector

is occupied
P a N f o r I d t y l u
( the ofleNPSS hardware accelerator
agram ha ose plexin i
mp block lex m s ne
e
b parison, we assume that and
the low-complexity auto-correlati

low power
can

method
ro,p which

characteristics
of viatiming -cotime-domain

over
a
Hence, the offset numberhypotheses of cross-correlations

a
number
perform acquisition

low-complexity
n Table I. 30 percent of the Hereby can be implemented
different
parison, we time efficiently
assume that in
the VLSI
low-complexity thus has a very
auto-correlation p
t m wcorre- pHowever, o n the computational complexity can be significantly

To make Fig.
a o d i

detector
Naturally, thea ve
po c e m t

to
fair
e

very
o

candidate
and
s

Naturally,
o
i While auto- requires N · N operations. Intheverye sub-frame l eivwe receive co era
stics are spond
-correlation.
shown in NTable I.p samples
30f percent s of
or, the
th thebycan c isbe implemented
when using efficiently
an overlap-savein(OLS)
VLSI and[9].thus
This has

20
to sub-frame boundaries, have to Abe evaluated cross- e reduced
op method

RX-power
135.0
reNPSS

be implemented

effortdepends
FFT units. One result ready low power consumption.
oof the

detector. consumption.

50
w inFTtime
re showncorrelating
the in Tablethe
transmitted, periodic I. received
30 percent
= 2,400 of the
and the e can
t
length d be
t
ea implemented
h t - efficiently in VLSI andforthus has a very

com-
c
c
method depends on

of
thus hasthea very
oNin NPSS

auto-correlation
s
samples in det correlation
the aretotal window IF method is wellaccelerator
established especially discrete convolutions
by the FFT and bothIFFT units. One
is NpFig. 5. result
Block ready
pdiagram for N pf ·plow
of sN· fNpower
f cross- consumption.
hardware

does
the NPSS detection domain samples. In

real
and
= 189

per
we assume that the low-complexity auto-correlation
m

by the FFT
FFT and sequence
IFFT units.
with the known One result
NPSS. ready o low
By cchoosing a g e powerN
, f = a32 n d consumption.
but it can also be applied to cross-correlations. By applying
parison, we assum

a fair
transmitted is correlations are required. r T
N for example
ave nt FF h N ,
tion approaches in In general
addition,results
correlations
in a totalare performed
number of 76,800 for
oi 189 every Nf fre- OLS
t cross-correlations of to the NPSS cross-correlation, the input stream is divided

6. com-

are
g
oss-correlationquency Key
offsetlength
approaches 189characteristics
hypothesis that need to be performed
fo , which
p
defines arele the shown
n
of every range of in
millisecond, Table
into
which I. 30sequences
overlapping percent of the
of length can be inimplemente
N as illustrated the

Energy per NPSS detection over RX-power

on its implementation. To make a fair com-
power consumption of the auto-correlation

shown
100
correlation algorithm does
area
frequency offsetsis
is occupied
detector shall by
impracticable
the for NB-IoT
the The
devices.
support. FFT minimum right part of Fig. 3. The number
and IFFT units. One result ready low power consum of overlapping samples

RX-power of RF-transceiver [mW]

and IFFT units.
mitted sequence is known, However the computational complexity can be significantly

efficiently in VLSI and thus has a very

frequency grid spacing is defined by the 240 kHz sampling depends on the NPSS length and is chosen to be NO = 188.
fact, cross-correlation de- reduced when using an overlap-and-save (OLS) methodAfterwards, [8]. the block-wise cross-correlation with the different

in
rate and the FFT and IFFT size which trades off computational
is the reason, why many This method is well established especially for discrete frequency-offset
con-

Table
candidates is performed, which can be done
GPS receivers complexity,
use a cross- memory
volution requirements,
but it can also be andapplied
processing delay for The
to cross-correlation.
in frequency domain. The main benefit of this method is that
. In this paper estimation
we focus onaccuracy. Larger FFT sizes ofwith smaller grid spac- if one

150
method is efficient in terms computational complexity

I.
Thus, the MLings improve
detector [6] offrequency offset
the sequences estimation
to be accuracy
cross-correlated butlong,
is very a cross-correlation
havewhile the in time domain is replaced by a point-

30
One result200ready
a longer
ved signal vector delay
onto each andonerequire
other is short.more
This memory.
is the case An FFT
in our size of
example wise
for which multiplication in frequency domain. Additionally, the

percent of the
1,024offsets,
different frequency results the
in areceived
grid spacing of 234 Hz
sample sequence which
(2,400 is sufficient
samples) generation
is much longer of the NPSS reference signals in frequency domain
on. than the NPSS sequence (189 samples).
for NPSS detection and was therefore chosen in this work. In gets simplified: Different frequency offsets relate to cyclic
addition, the width of the correlation peak of Fig. 2 allows to shifts which can be easily implemented in hardware.
take every fourth grid point only, while still covering 93% of
the peak amplitude. Nf trades off the minimal observed height IV. C OMPLEXITY AND P ERFORMANCE
of a correlation peak against computational complexity and
low 250
can be implemented efficiently in VLSI and thus has
As the proposed cross-correlation-based algorithm is an ML
memory size. It is a design parameter, which can be chosen detector, the complexity is expected to be significantly higher
power consumption.
to match the accuracy of the underlying crystal oscillator. compared to the low-complexity auto-correlation method. On
Choosing Nf = 31 leads to a frequency-offset range of average for each received block of size N − NO a single N -
31 · 4 · 234 Hz which allows to compensate ±14.5 kHz. point FFT, Nf point-wise complex multiplications of a vector
In every 10 ms frame we receive Ns = 2,400 samples and of length N , and Nf N -point IFFT operations need to be
the length of the NPSS in time domain is Np = 189 samples. performed. Choosing an FFT size of N = 1, 024 the number
In total Ns · Nf cross-correlations of length Np are required as of real additions and multiplications can be estimated to 135.0
shown in the left part of Fig. 3. Considering Nf = 31 different and 135.4 MOPS, respectively leading to an overall compu-
frequency candidates a total of 74,400 cross-correlations need tational complexity of 270.5 MOPS. Thus, the computational
to be performed every 10 ms, which is impractical for NB-IoT effort per sub-frame of the ML detector is roughly 10x higher
devices. than the auto-correlation timing acquisition [6].
 1 TABLE I
NPSS D ETECTOR CHARACTERISTICS IN TWO CMOS TECHNOLOGIES .
0.9

0.8 CMOS technology SMIC 130 nm GF 28 nm

0.7 Synthesized Cell Area 3.34 mm2 0.22 mm2
0.6 Voltage 1.2 V 1.0 V
90% [5] @ -12.6 dB SNR kGE 735 600
CDF

0.5
est. PML 38 mW 2.5 mW
0.4

0.3 SNR [dB]

-12.6
0.2
50% [5] @ -12.6dB SNR -13.6
-14.6
0.1
-15.6 words, but the unaltered 188 overlap samples need to be stored
0 for the next FFT computation, as well. Secondly, during the
0 100 200 300 400 500 600 700 800 900 1000
tML [ms] FFT operation further inputs r[k] need to be stored in the
memory. Furthermore, a single-port RAM has been chosen,
Fig. 4. Timing acquisition latency of cross-correlation NPSS detector. which minimizes the storage area. The introduced memory-
bandwidth bottleneck limiting the throughput to one radix-2
operation every 4 clock cycles is tolerable due to the very low
The performance in terms of timing-acquisition latency is throughput requirements of the FFT.
shown in Fig. 4 for in-band deployment which has the most
demanding SNR requirement of -12.6 dB and beyond. For In contrast such an architecture would not be sufficient to
the simulations the TU1.2 channel model was used and the meet the throughput requirement of the IFFT. Here, the mem-
threshold was set to achieve a false-alarm rate of 1%. The ory bandwidth has to be 4× higher to support a throughput
OLS detector achieves a latency of 400 ms, whereas the auto- of one radix-2 operation every cycle. Thus, the memory in
correlation detector of [6] takes 620 ms to achieve a 90% hit the IFFT block is split into four banks each still being a
rate. The average detection latency is 140 ms which is roughly single-port RAM to minimize storage area. Memory access
a factor of two below the value of [6]. conflicts are avoided by assuring that every two subsequent
radix-2 operations do not access the same register banks. After
V. H ARDWARE I MPLEMENTATION processing the FFT, the correlations in frequency domain, and
A block diagram of the cross-correlation NPSS detector is the Nf = 31 IFFTs for each received block of length N the
shown in Fig. 5. The main computational elements are the FFT results are non-coherently combined with previous correlation
and IFFT blocks with a required throughput of 2.87/10 ms = results. The size of the memory holding the intermediate, non-
287.1/s and 890.0/s FFT and IFFT computations or 1.5 and coherently combined correlation results is reduced by down-
45.6 million radix-2 operations per second, respectively. Even sampling the correlation results by a factor of 2 as proposed
for the more demanding IFFT it is possible to reuse a single in [6]. After the processing of a sub-frame, a peak-detection is
radix-2 instance for all IFFT operations when assuming typical used to decide, whether the NPSS sequence was found. Rather
VLSI clock frequencies. So, for the FFT as well as for the than using a simple peak-to-average ratio an analysis of the
IFFT block a single radix-2 in-place architecture is sufficient. four largest correlation results is considered which improves
The FFT is designed to include a RAM holding 1,360 the detection probability when combining correlation results of
complex samples which is larger than N . The reason for multiple sub-frames. Also, the existence of side-peaks (Fig. 2)
this is two-fold: Firstly, the FFT operates on 1,024 complex requires a more sophisticated peak detection as a simple peak-
to-average ratio would lead to many false detections.
We implemented the detector in VHDL and performed syn-
1024 FFT
RAM 1,024x44
thesis experiments in SMIC130 and GF28 CMOS technology
shift-
RAM 1,360x44
RAM 1,024x44
PSS
LUT related
addr.
targeting a clock frequency of 62 MHz. The key characteristics
conv. of the detector are give in Table I.
RAM 256x54

RADIX-2
RADIX-2

address With Nf = 31 a correlation RAM with 334 kbit is required.

start
This is the largest memory in the design and occupies 54%
Control address
of the entire area. However since this memory is only used
Unit Correlation
Result
for NPSS detection it can be easily shared with other building
RAM blocks. The implementation also includes the fine frequency-
37,200x9
and timing-offset estimation as proposed in [6].
peak The power consumption of the detector was estimated by
detection
hit using Cadence R
tools from post-synthesis netlist and the value
change dump file to 38 mW (1.2V, TT, 25C) and 2.5 mW (1.0V,
Fig. 5. Block diagram of NPSS detector. TT, 25C) for the 130- and 28-nm technology, respectively.
 VI. E NERGY E FFICIENCY VII. C ONCLUSION
The energy of timing acquisition is given by the power of The fact that the RF-transceiver dominates downlink power
the detector and the RF-transceiver in receive mode times the consumption in an NB-IoT device creates design space for
latency t. Given the energy of the ML approach and the auto- dedicated hardware implementations which can execute ex-
correlation (AC) approach for a certain RF-transceiver power haustive baseband algorithms. Following this guideline we
PRF we compute the savings according to have shown that the computationally complex ML approach
for NB-IoT timing acquisition can lead to significant energy
 
(PRF + PML )tML savings in NB-IoT devices. The savings were achieved by
∆E [%] = 100 1 − . the low latency of our detector which due to algorithmic
(PRF + PAC )tAC
transforms based on the OLS method and by targeting a
For the AC timing acquisition we account for a power of dedicated VLSI implementation shows a relatively low power
PAC = P10 ML
because the arithmetic load is about 10× below consumption. We were able to reduce the energy required for
the arithmetic load of the ML approach. However it shall be a single NPSS detection by 34% for 28 nm CMOS technology
denoted that this factor is dependent on the implementation. and from 9% up to 21% even in a rather mature 130 nm CMOS
In Fig. 6 the energy saving ∆E [%] per timing acquisition technology. Future research will address area reductions es-
is plotted over the power consumption of the RF-transceiver pecially by sharing memory resources with other hardware
PRF [W] for the latency of the ML detector (tML = 400 ms) building blocks.
and the AC detector (tAC = 620 ms) in [6].
R EFERENCES
40 [1] Wang, Y-P. Eric, et al. ”A Primer on 3GPP Narrowband Internet of
Things (NB-IoT).” arXiv preprint arXiv:1606.04171 (2016).
35 [2] Lin Zhong, Power Consumption by Wireless Communication, Lec-
ture ELEC518, 2011, http://www.ruf.rice.edu/∼mobile/elec518/lectures/
30 NB-IoT RF- 3-wireless.pdf
transciever [3] Intel Cooperation, R1-156524: On device complexity for NB-IoT,
region of 6.2.6.1, 3GPP TSG RAN WG1 Meeting Nr. 83, Anaheim, USA, 16-
25 interest
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∆E [%]

[4] 3GPP TS 36.101 V14.0.0, Evolved Universal Terrestrial Radio Access

20
(E-UTRA); User Equipment (UE) radio transmission and reception, July
[11] [10]
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sumption for NPSS detection (due to their reduced number 65 nm CMOS quad-band SAW-less receiver for GSM/GPRS/EDGE,” in
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The power consumption of RF-transceivers is dependent
on multiple factors whose analysis lie beyond the scope of
this paper, therefore we consider a broad range of values
for RF-transceiver power consumption. The grey rectangle in
Fig. 6 indicates the region of interest for NB-IoT dedicated
RF-transceivers which lies below the power consumption of
conventional LTE and GSM transceivers due to the simplifi-
cations made in NB-IoT. Power consumptions of state of the
art conventional LTE and GSM transceivers are indicated by
the vertical lines in Fig. 6 indicate the power consumption of
two reported RF-transceivers [11], [12].