INDUSTRIAL TRAINING REPORT

Of one month training at

EdGate Technologies Pvt. Ltd. Bangalore

Advanced Embedded System Design using Tiva C Series

Microcontroller

Submitted in partial fulfilment of the

Requirements for the award of

Degree of Bachelor of Technology in Electronics and Communication

Engineering

Submitted By:

Name:-Prasoon Raj Gaurav

University Roll No.-1709131099

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING JSS

ACADEMY OF TECHNICAL EDUCATION C-20/1 SECTOR-62, NOIDA

ACADEMIC YEAR: ODD SEM 2020

 DECLARATION

I hereby declare that the Industrial Training Report entitled “Advanced Embedded System
Design using Tiva C Series Microcontroller” is an authentic record of my own work as
requirements of Industrial Training during the period from 1st May to 30th May for the award
of degree of B.Tech. (Electronics and Communication Engineering), JSS Academy of
Technical Education, Noida.

Prasoon Raj Gaurav

Date: 7/12/2020 (1709131099)

CERTIFICATE
 ACKNOWLEDGEMENT

I take this opportunity to express my profound gratitude and deep regards to my guide Bharat
R. for his exemplary guidance, monitoring and constant encouragement throughout the
course of this thesis. The blessing, help and guidance given by him time to time shall carry
me a long way in the journey of life on which I am about to embark.

I also take this opportunity to express a deep sense of gratitude to Krishna Chaithanya,
Embedded System Engineer, of EdGate Technologies Pvt. Ltd., for his cordial support,
valuable information and guidance, which helped me in completing this task through various
stages.

I am obliged to staff members of EdGate Technologies Pvt. Ltd. for the valuable information
provided by them in their respective fields. I am grateful for their cooperation during the
period of my assignment.
Advanced Embedded System Design using
Tiva C Series Microcontroller
 ABSTRACT

This training program is focused upon Advanced Embedded System Design using Tiva C
Series Microcontroller and MIT APP Inventor.

It introduces Embedded System and features and then focuses upon Microcontroller
fundamentals for basic programming. The microcontroller used in the training is Tiva C
Series.
This program explains concepts related to timers, Pulse Width Modulation, communication
protocols and interfacing with external devices.
MIT App Inventor, a web application was also used for making an app of desired
functionality for microcontrollers.

2
Contents:-

1. Embedded System and Features

1.1 Introduction………………………………………………………………….........5
1.2 ARM Architecture……………………………………………………………….10
2. Microcontroller Fundamentals for Basic Programming
2.1 Introduction15
2.2 Programming in Embedded System…………………….
………………………..15
2.3 Programming Tiva C Series…....
………………………………………………...15
2.4 Peripheral and Memory Address……………………….
………………………...18
2.5 Programming GPIO in TIVA TM Launchpad….………………………….
…….18
2.6 Watchdog Timer… ………………………………………………………....…...19
2.7 Interrupts………………………………………………………………………...20
2.8 Low Power Microcontroller……………………………………………………..20
3. Timers and PWM
3.1 Introduction……………………………....……………………………………...21
3.2 Timers…………………………………………………………………………...21
3.3 Real Time Clock………………………………………………………………...23
3.4 Analog to Digital Converter (ADC)…………………………………………….24
3.5 Pulse Width Modulation………………………………………………………...25
4. Communication Protocols and Interfacing with External Devices
4.1 Introduction……………………………………………………………………...27
4.2 Universal Asynchronous Receiver-Transmitter (UART)……………………….28
4.3 Inter IC (I2C) Communication Protocol………………………………………...29
4.4 Serial Peripheral Interface (SPI)……………………………………………...…30
5. MIT APP Inventor
5.1 Introduction……………………………………………………………………...32
5.2 Overview………………………………………………………………………...32

3
List of Figures:-
Fig 1.1 Basic Block Diagram of an Embedded System……………………………….6
Fig 1.2 Programming Model…………………………………….……………………
13
Fig 3.1 Block Diagram of working of an ADC………………….……………………
24
Fig 3.2 ADC Module Block Diagram………………………….
……………………..24
Fig 3.3 PWM Module Block Diagram………………………….
…………………….26
Fig 3.4 PWM Generator Block Diagram……………………….
…………………….26
Fig 4.1 Frame for ASCII ‘A’………………………………….……………………...28
Fig 4.2 I2C Bus……………………………………………….………………………
29
Fig 4.3 Serial Peripheral Interface....……………………….
………………………...31
Fig 5.1 App Inventor’s design editor…………………….………………………….33
Fig 5.2 App Inventor’s blocks editor………………………………………………..33

List of Tables:-

Table 1.1 ARM Architecture Features and Benefits………………………………...10

4
Chapter 1
Embedded System and Features
1.1 Introduction

1
We live in an era where pervasive computing exists everywhere, right from a small
handheld device such as a mobile phone to the electronic control units within
automobiles or avionics. Today, large volumes of information is getting processed
and communicated over the Internet every microsecond. Buzz words such as Cloud
Computing, Big Data Mining and Internet of Things are everywhere.

An embedded system refers to any device that has some computational intelligence in
it. It is generally used as a standalone system that repeatedly performs a specific task
or as part of a large system to perform multiple tasks with the requisite hardware and
software embedded within. Systems used in printers, washing machines, mp3 players,
CT scan machines etc. are great examples of embedded systems.

An embedded system is a constrained system and its design goals vary from a general
purpose system. The constraints are: high performance, low power consumption,
small size and low cost of the system.

The basic components of an embedded system include hardware, software and some
mechanical parts. Embedded hardware includes a processing unit, block of memory
and I/O sub-unit which are called as the system resources. The embedded software
can be thought of as the application software in a small computing system or both the

5
system and the application software in case of a large complex system. The system
software mentioned here is the real time operating system (RTOS) used to manage the
usage of system resources by application software.

Hardware Components of Embedded System

The basic hardware components of an embedded system shown in a block diagram in

Fig 1.1 These include the processing unit, sensors and actuators, ADC, DAC, I/O unit
and the memory block. The processing unit could be a microprocessor, a
microcontroller, FPGA i.e. field programmable gate array or ASIC (Application
Specific IC) depending on the application requirements. Sensors such as sound
sensor, ambient temperature sensor, motion sensor etc. are generally analog in nature
since they sense the data from outside world. This data is converted from analog to
digital and sent to a processing unit, post which required action is performed by
actuators.

Processing Unit

6
 The processing unit could be a microprocessor, a microcontroller, embedded
processor, DSP, ASIC or FPGA selected for an embedded system based on the
application requirements.

This processing unit executes the application program that is saved in the program
memory ROM (read only memory). The RAM (random access memory) is used as the
data memory to hold the system stack and the variables used in the program.

Stack is a portion in the RAM reserved to hold back the status of the program when
the control is transferred by a branch instruction. To make a system interactive, input-
output (I/O) unit is required. The memory block and the I/O units communicate with
the processing unit through the system bus.

The system bus consists of three different bus systems: address bus, data bus and
control bus. Processor sends the address of the destination through the address bus.

So address bus is unidirectional from processor to the external end. Data can be sent
or received from any unit to any other unit in the diagram. So data bus is bidirectional.
Control bus is basically a group of control signals from the processing unit to the
external unit.

Microprocessor

Microprocessor is a programmable digital device which has high computational

capability to run a number of applications in general purpose systems. It does not
have memory or I/O ports built within its architecture. So, these devices need to be
added externally to make a system functional. In embedded systems, the design is
constrained with limited memory and I/O features. So microprocessors are used where
system capability needs to be expanded by adding external memory and I/O.

Microcontroller

A microcontroller has a specific amount of program and data memory, as well as I/O
ports built within the architecture along with the CPU core, making it a complete
system. As a result, most embedded systems are microcontroller based, where are
used to run one or limited number of applications.

Embedded Processor

7
Embedded processors are specifically designed for embedded systems to meet design
constraints. They have the potential to handle multitasking applications. The
performance and power efficiency requirements of embedded systems are satisfied by
the use of embedded processors.

DSP

Digital signal processors (DSP) are used for signal processing applications such as
voice or video compression, data acquisition, image processing or noise and echo
cancellation.

ASIC

Application specific integrated circuit (ASIC) is basically a proprietary device

designed and used by a company for a specific line of products (for example Samsung
cell phones or Cisco routers etc.). It is specifically an algorithm called intellectual
property core implemented on a chip.

FPGA

Field programmable gate arrays (FPGA) have programmable macro cells and their
interconnects are configured based on the design. They are used in embedded systems
when it is required to enhance the computational capability of the existing system or
to make a system reprogrammable and reconfigurable when the need arises.

Memory Block

The memory block consists of program and data memory. ROM is used as the
program memory and RAM is used as the data memory. There are two memory
architectures: Harvard and Von-Neumann. In Harvard architecture, the program and
data memories are segregated with separate address and data bus drawn to each. So
there can be parallel access to both and performance of the system can be improved at
the cost of hardware complexity. On the other-hand, the Von-Neumann architecture
has one unified memory used for both program and data. The system is comparatively
slower, but the design implementation is simple and cost effective for an embedded
system. Various ROM and RAM devices are used in embedded systems based on the
applications.

ROM

8
Read only memory (ROM) is non-volatile i.e. it retains the contents even after power
goes off. It is used as the program memory. In embedded systems, the application
program after being compiled is saved in the ROM. There are different categories of
ROM such as: programmable read only memory (PROM), erasable programmable
read only memory (EPROM), electrically erasable programmable read only memory
(EEPROM) etc. There is also flash memory which is the updated version of EEPROM
and extensively used in embedded systems.

RAM

Random access memory (RAM) is volatile i.e. it does not retain the contents after the
power goes off. It holds the variables declared in the program, the stack and
intermediate data or results during program run time. The Processing unit accesses the
RAM for instruction execution to save or retrieve data. There are different variations
of RAM such as: static RAM (SRAM), dynamic RAM (DRAM), pseudo static RAM
(PSRAM), non-volatile RAM (NVRAM), synchronous DRAM, (SDRAM) etc.

I/O Unit

Embedded systems have to interact with the external environment through the
input/output devices.

Input Device

Embedded systems receive user commands from input devices such as keypad, switch
or a touch screen device at the input port. The processing unit executes software
instructions to process these inputs to make decisions that further guide the operation
of the system. A port is a termination point that gives connectivity between the
processing unit and the peripherals.

Output Device

Output devices are used to display results from the system or to sending data to
another connected system at the output port. Some examples of output devices are:
light emitting diodes (LEDs), liquid crystal diodes (LCDs), printers etc.

I/O Communication Bus

I/O communication buses and protocols are used to communicate with the slower I/O
devices. Some of the communication protocols are: universal serial bus (USB), inter-

9
intergrated circuit (I2C), serial peripheral interface (SPI), peripheral component
interconnect (PCI), IBM standard architecture (ISA) etc. Each protocol defines a
standard way of communication between the devices. The features and usage of these
protocols have been explained in subsequent chapters.

Sensors & Actuators

Sensors and electromechanical actuators are input and output devices used in real time
embedded systems to exchange real time data between the system and the external
environment. Sensors measure physical parameters such as temperature, pressure
acceleration, proximity etc. being connected at the system input ports through analog
to digital converters (ADCs). Actuators are connected at the system output ports
through the digital to analog converters (DACs).

1.2 ARM Architecture

2
ARM cores are designed specifically for embedded systems. The needs of embedded
systems can be satisfied only if features of RISC and CISC are considered together for
processor design. So ARM architecture is not a pure RISC architecture. It has a blend
of both RISC and CISC features.

ARM 7, the basic architecture of ARM series of cores, is introduced here in this
section.

10
The Register Bank has sixteen general purpose registers (R0-R15) and a current
program status register (CPSR) which are accessible by user applications. In addition
to that, it has twenty numbers of banked registers specifically used for different
operating modes of ARM core. These are invisible to user applications. The register
bank has two read ports to read operand1 and operand2 and one write port to write
back the result of operation to the any register specified in the instruction. It has an
additional bidirectional port to update the program counter with address register and
incrementer. Address register content is incremented at every sequential byte access
by the incrementer but the program counter is incremented by four in ARM state of
the core or is incremented by 2 in Thumb state of the core at every instruction access.
ARM and Thumb states of the core are discussed in section 1.3. Address register is
directly connected to the address bus.

 The barrel shifter can shift or rotate operand 2 by specified number of bits prior to
arithmetic or logic operations.

 The 32 bit ALU performs the arithmetic and logic functions.

 The data in and data out registers hold the input and output data from and to the
memory.

 The instruction decoder and associated control logic generates appropriate control
signals for the data path after decoding the fetched instruction.

 The MAC unit is to multiply two register operands and accumulate with another
register holding the partial sum of the products.

Registers

Registers are for temporary data storage within processor architecture. ARM
processor has sixteen numbers of general purpose registers, R0-R15 and a current
program status register (CPSR) defined for user mode of operation. Each of these
registers is of 32-bits. Out of these registers, R13, R14 and R15 have special purposes.
R13: Used as the stack pointer that holds the address of the top of the stack in the
current processor mode.

11
R14: Used as the link register that saves the content of program counter on control
transfer due to the occurrence of exceptions or using the branch instructions in the
program.

R15: Used as the program counter that points to the next instruction to be executed. In
ARM state, all instructions are of 32-bits (four bytes) for which, PC is always aligned
to a word boundary. This means that the least significant two bits of the PC are
always zero.

Interrupt Handling

Interrupt is used to get service from CPU by generating a request only when it is
required. Two types of interrupts are: hardware interrupt and software interrupt.
Hardware interrupt comes from the peripherals or I/O‟s connected in a system and
software interrupt by executing an interrupt instruction. When any interrupt occurs
during program execution, CPU completes the current instruction execution, saves the
return address in the defined portion of the memory called the stack and then responds
to the interrupt. The control of program execution is transferred to the corresponding
interrupt vector address where interrupt service routine (ISR) is written. At the end of
ISR execution, the return address is retrieved from the stack and control resumes back
at the address where it had left.

Exceptions Handling

An exception is any condition, an unexpected event or error that needs to halt the
normal execution of instructions. ARM core considers hardware interrupts under
exceptions. It supports seven exceptions as follows: reset, data abort, prefetch abort,
FIQ, IRQ, SWI and undefined. Each of the ARM exceptions is associated with certain
operating mode and causes the ARM core to enter to that particular mode
automatically on exception entry. In the group of exceptions, there are supervisor calls
such as reset and software interrupts (SWI), undefined instruction trap, memory
access failure such as data abort and prefetch abort and hardware interrupts such as
fast interrupt request (FIQ) and interrupt request (IRQ). As more than one interrupt
may occur simultaneously, exceptions are prioritized.

Addressing Modes

12
Addressing mode is the way of addressing data or operand in the instruction. Every
processor instruction set offers different addressing modes to determine the address of
operands. Some fundamental addressing modes used by most of the processors are:
register addressing, immediate addressing, direct addressing and register indirect
addressing. In register addressing mode, the operand is held in a register which is
specified in the instruction. In immediate addressing mode, the operand is held in the
instruction. In direct addressing mode, the operand resides in the memory whose
address is specified in the instruction. Similarly in register indirect addressing mode,
the operand is held in the memory whose address resides in a register that is specified
in the instruction.

Programming Model

The programming model of the Cortex-M4 processors has 18 working registers.

Thirteen of them are general purpose 32-bit registers, three have special uses and two
stack pointers.

13
 Fig 1.2 Programming Model

R0 - R12

Registers R0 to R12 are general purpose registers. The first eight (R0 - R7) are called
low registers and used by most of the 16-bit instructions due to the limited available
bits in the instruction encoding format. The high registers (R8 - R12) can be used with
32-bit instructions, and a few 16-bit instructions.

R13: stack pointer (SP)

There are two different Stack Pointers in the register bank. The Main Stack Pointer
(MSP) and the process stack pointer (PSP). After reset, the processor core enters
thread mode. MSP is the default stack pointer selected. It is also used when the

14
processor enters handler mode. In normal program flow, only one of these Stack
Pointers is visible. PSP is basically used when the stack of the OS kernel and
application tasks are needed to be separated. All applications may not require
embedded OS. In such cases PSP is not used and MSP is used both in thread and
handler modes.

R14: link register (LR)

Link register is used to hold the return address to respond to a control transfer
instruction while calling a function or subroutine. At the end of the subroutine, the
value of LR is loaded into the program counter (PC), so that program control can
resume the calling program. If a function needs to call another function, it needs to
save the value of LR in the stack before entering to the new function.

R15/ program counter (PC)

Program Counter points to the next instruction to be executed. It can also be used as a
general purpose register that can be both read and updated. When PC is used as a
destination register, it causes a branch operation. Since the instructions are of 16 bits
or 32 bits length, the PC must be aligned to half-word or word boundary by making
the Least Significant Bit of it always zero. Bit [0] of PC is loaded into the EPSR T-bit
at reset and must be 1.

Program status registers (PSR)

The Program Status is composed of three status registers:

 Application PSR (APSR)

 Interrupt PSR (IPSR)

 Execution PSR (EPSR)

15
Chapter 2

Microcontroller Fundamentals for Basic Programming

2.1 Introduction

Typical embedded systems are designed using 8 to 32 bit microcontroller platforms.

32-bit controllers. Microcontrollers can provide intelligence in the overall product
design only if they are supported by libraries and necessary software components.
TIVA C series can be programed using Code Composer Studio (CCS) and is well
supported by libraries such as TIVAware, TI-RTOS etc. In this chapter, CCS is the
main tool for programming microcontrollers in C language.

To understand the controller capability we need to have knowledge about its memory
and its architecture and its peripherals. Memory addressing with respect to TIVA,
including SRAM, flash memory, internal memory, is important. A microcontroller has
General-purpose input/output (GPIO), which is used to take input and provide output
from and to several devices such as sensors, switches etc.

2.2 Programming in Embedded System

Most C programming environments are often provided with third party libraries.
Usage of these libraries has made it platform reliant and its true essence of portability
is somewhat lost. However, this aspect of C language had an immense impact on
growth in embedded development. Unlike assembly language, with few changes in
the I/O access the same code written in C, can be ported to various processors. In
today’s world, almost all hardware development kits come with bundled static
libraries and header files that is compatible with C language. C is widely accepted
language among embedded design engineers because of following reasons.

 It is a structured programming language with high code efficiency

 It has excellent readability compared to assembly language

 It offers processor level control like assembly language

2.3 Programming in TIVA CSeries

16
Tiva C Series microcontrollers can be programmed using various development tools
like Embedded Software from Mentor Graphics, IAR Systems, Keil MicroVision
from ARM Ltd., and Code Composer Studio (CCS) from Texas Instruments.

Introduction to Code Composer Studio

Code Composer Studio is used because it is free and is supported by a large TI

community commonly known as E2E. This forum is a congregation of engineers and
hobbyist working on TI products across the world.

CCS is a TI proprietary cross platform IDE used to convert C and assembly language
code to executable for TI processors, involving Digital Signal Processors, ARM, and
other microcontrollers. CCS combines editing, debugging and analysis tools into a
single IDE based on Eclipse open source development tool.

Compilation (Build Process):

CCS uses a Code Generation Tool (often called CGT) for compilation process also
called as build process. It is used to generate executables for a target device. This
process takes source codes written in C, C++ and/or Assembly Language and
produces executable at the output called binaries. This process undergoes many
intermediated stages. A normal development flow of a compilation process takes the
source files written in C/C++ and compiles them to create assembly language files
using a compiler. For projects where source code is written in assembly language, this
process is bypassed. In many projects, some of the logic functions are written in
assembly languages along with other C/C++ source codes. After the assembly
language files are generated by the compiler, an assembler converts them to re-
locatable object files. These object files are linked to the runtime libraries included in
the project by a linker. The linker produces executables from these files using
protocols mentioned in the command file.

Debugger

The CCS debugger depends on a configuration file and a general extension language
(GEL) file. The debugger initializes and loads the software on a target device using
information provided by these files. A target configuration file specifies -
(i) Connection type to the target device, (ii) Target device, and (iii) About a startup
script.

17
Organization and Building a CCS Project

In CCS, designs are organized in workspaces and projects which are merely folders in
the file system. When CCS is launched, it prompts the users to provide a folder path
to the workspace. This folder consists of individual project folders and a folder named
as ‘.metadata’. The .metadata folder consists of CCS settings and preferences for the
particular workspace. Along with source files, header files and library files, each
project folder contains the build and the tool settings for the project. It also contains
the target configuration file and the command file required by the debugger.

CCS has two predefined build configurations, namely, debug and release. It also
provides custom build configurations.

Debug – It is generally used when it is required to operate in debugging mode. It

includes the symbol tables and executes compilation without any optimization.

Release – Building project in this mode is suited when the user requires performance.
It discards all symbol tables and implements the full code optimization. It is therefore
a noted convention to use this mode only when the final version of a project is to be
deployed on the hardware. For all other intermediate versions, debug mode is rather
preferred.

Custom Configuration – CCS also provide its users to add custom build
configurations for a particular project. It can be done by going to processor options
under ‘properties -> build -> ARM Compilers‟.

TivaWareTM

TivaWareTM for C series is a free collection of libraries in the form of source codes
and static libraries. TivaWareTM caters to all TI Cortex M devices. It includes

 Peripheral driver library  USB stacks  Ethernet Stacks  Graphics library  Sensor
library

It provides a large set of libraries which reduces prototyping time. It also provides a
higher abstraction level for programmers to access the hardware peripherals of the
board. In this book, TivaWareTM has been extensively used for programming.

18
2.4 Peripheral and Memory Address

There are two complementary methods of addressing I/O devices for input and output
between CPU and peripheral. These are known as memory mapped I/O (MMIO) and
port mapped I/O (PMIO).

In MMIO, same address bus is used to address both memory and peripheral devices.
The address bus of the CPU is shared between the peripheral devices and memory
devices attached to the CPU. Thus, any address accessed by the CPU may denote an
address in the memory or a register of attached peripheral. In these architectures,
same CPU instructions used for memory access can also be used for I/O access.

In PMIO, peripheral devices possess a separate address bus from general memory
devices. This is accomplished in most architectures by providing a separate address
bus dedicated to the peripheral devices attached to the CPU. In these CPUs, the
instruction set includes separate instructions to perform I/O access.

2.5 Programming GPIO in TIVA TM Launchpad

General Purpose Input/output (GPIO) refers to pins on a board which are connected to
the microcontroller in a special configuration. Users can control the activities of these
pins in real-time.

GPIO pins can be configured as both input and output. There are generally two states
in a GPIO pin, High=1 and Low=0. These pins can be easily enabled and disabled by
the user. A GPIO pin can be configured as input and used as an interrupt pin typically
for wakeup events. We will see this later in this chapter when we use a switch to force
the system wake from hibernation. GPIO peripherals vary quite widely. In some
cases, they can exist as a group of pins that can be switched as a group to either input
or output. In others, each pin can be set up adaptable to either accept or act as a source
for different logic voltages, with configurable drive strengths and pull ups. Pin states
of the GPIOs can be accessed using software instructions. These instructions can be
represented by one or more types of interfaces. Memory mapped peripheral or a
dedicated I/O port instruction can be used in this regard. Voltage levels of GPIOs are
critical and it is necessary that users take note of these voltages before interfacing.
Tolerant voltages at GPIO pins are not same as the board supply voltage. Some

19
GPIOs have 5 V tolerant inputs: even if the device has a low supply voltage (say 2 V),
it can accept 5 V without damage.

2.6 Watchdog Timer

Every CPU has a system clock which drives the program counter. In every cycle, the
program counter executes instructions stored in the flash memory of a
microcontroller. These instructions are executed sequentially. There exist possibilities
where a remotely installed system may freeze or run into an unplanned situation
which may trigger an infinite loop. On encountering such situations, system reset or
execution of the interrupt subroutine remains the only option. Watchdog timer
provides a solution to this.

A watchdog timer counter enters a counter lapse or timeout after it reaches certain
count. Under normal operation, the program running the system continuously resets
the watchdog timer. When the system enters an infinite loop or stops responding, it
fails to reset the watchdog timer. In due time, the watchdog timer enters counter lapse.
This timeout will trigger a reset signal to the system or call for an interrupt service
routine (ISR). The TM4C123GH6PM microcontroller has two Watchdog Timer
modules, one module is clocked by the system clock (Watchdog Timer 0) and the
other (Watchdog Timer 1) is clocked by the PIOSC therefore it requires
synchronizers.

Features of Watchdog Timer in TM4C123GH6PM controller:

 32-bit down counter with a programmable load register

 Separate watchdog clock with an enable

 Programmable interrupt generation logic with interrupt masking and optional NMI
function

 Lock register protection from runaway software

 Reset generation logic with an enable/disable

 User-enabled stalling when the microcontroller asserts the CPU halt flag during
debug

20
2.7 Interrupts

In interrupt method, whenever a device requires the attention from the

microprocessors, it pings the microprocessor. This ping is called interrupt signal or
sometimes interrupt request (IRQ). Every IRQ is associated with a subroutine that
needs to be executed within the microprocessor. This subroutine is called interrupt
service routine (ISR) or sometimes interrupt handler. The microprocessor halts
current program execution and attends to the IRQ by executing the ISR. Once
execution of ISR completes, the microprocessor resumes the halted task. The current
state of the microprocessor must be saved before it attends the IRQ in order to be able
to continue from where it was before the interrupt. To achieve this, the contents of all
of its internal registers, both general purpose and special registers, are required to be
saved to a memory section called the stack. On completion of the interrupt call, these
register contents will be reinstated from the stack. This allows the microprocessor to
resume its originally halted task.

2.8 Low Power Microcontroller

Need for Low Power Microcontroller is imperative for an embedded design to be low
on its power consumption. Most embedded systems and devices run on battery. Power
demands are increasing rapidly, but battery capacity cannot keep up with its pace.
Therefore, a microcontroller which inherently consumes very less power is always
encouraging. However, embedded systems engineers usually need to optimize
between power and performance. Power and performance are inversely proportional
to each other.

Hibernation Module on TivaTM Microcontrollers

This module manages to remove and restore power to the microcontroller and its
associated peripherals. This provides a means for reducing system power
consumption. When the processor and peripherals are idle, power can be completely
removed if the Hibernation module is only the one powered.

21
Chapter 3

Timers and Pulse Width Modulation

3.1 Introduction

In our daily life, we have numerous applications of embedded systems in areas such
as automobiles, communication, home appliances etc. Consider an example of a
washing machine, which uses various modules such as temperature sensor, motor
control, display systems and timer.

A washing machine allows users to adjust motor speed, water temperature, washing
time etc. Pulse width modulation provides motor control technology, high-resolution
timers help keep track of washing time. Operation and configuration of pulse width
modulation (PWM) module of TIVA C series finds applications in motion control,
voltage regulation in inverter applications, audio effects & amplifications, power
delivery etc.

Data acquisition is the major component of any data gathering and data logging
applications, which require the support of analog comparators, high resolution ADCs,
DAC etc. Most automotive applications require sophisticated control in term of the
speed and direction of the motor. Quadrature Encoder Interface (QEI) finds
applications in automotive, motor control, mobile robot.

3.2 Timers

Timers are basic constituents of most microcontrollers. Today, just about every
microcontroller comes with one or more built-in timers. These are extremely useful to
the embedded programmer - perhaps second in usefulness only to GPIO. The timer
can be described as the counter hardware and can usually be constructed to count
either regular or irregular clock pulses. Depending on the above usage, it can be a
timer or a counter respectively. Software timers can be described as a stream of bits of
software that achieve some timing function. The TM4C123GH6PM General-Purpose
Timer Module (GPTM) contains six 16/32-bit GPTM blocks and six 32/64-bit Wide
GPTM blocks. These programmable timers can be used to count or time external
events that drive the Timer input pins. Timers can also be used to trigger μDMA

22
transfers, to trigger analog-to-digital conversions (ADC) when a time-out occurs in
periodic and one-shot modes.

The GPT Module is one timing resource available on the Tiva™ C Series
microcontrollers.

The General-Purpose Timer Module (GPTM) blocks with the following functional
options:

 16/32-bit operating modes:

-16- or 32-bit programmable one-shot timer

-16- or 32-bit programmable periodic timer

-16-bit general-purpose timer with an 8-bit prescaler

-32-bit Real-Time Clock (RTC) when using an external 32.768-KHz clock as the
input

-16-bit input-edge count- or time-capture modes with an 8-bit prescaler

-16-bit PWM mode with an 8-bit prescaler and software-programmable output

inversion of the PWM signal

 32/64-bit operating modes:

-32 or 64-bit programmable one-shot timer

-32- or 64-bit programmable periodic timer

-32-bit general-purpose timer with a 16-bit prescaler

-64-bit Real-Time Clock (RTC) when using an external 32.768-KHz clock as the
input

-32-bit input-edge count- or time-capture modes with a16-bit prescaler

-32-bit PWM mode with a 16-bit prescaler and software-programmable output

inversion of the PWM signal

 Count up or down

 Twelve 16/32-bit Capture Compare PWM pins (CCP)

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 Twelve 32/64-bit Capture Compare PWM pins (CCP)

 Daisy chaining of timer modules to allow a single timer to initiate multiple timing
events

 Timer synchronization allows selected timers to start counting on the same clock
cycle

 ADC event trigger

 User-enabled stalling when the microcontroller asserts CPU Halt flag during debug
(excluding RTC mode)

 Ability to determine the elapsed time between the assertion of the timer interrupt
and entry into the interrupt service routine

 Efficient transfers using Micro Direct Memory Access Controller (μDMA)

-Dedicated channel for each timer

-Burst request generated on timer interrupt

3.3 Real Time Clock

RTC is a mainframe clock that keeps track of the current time. RTCs are present in
approximately every electronic device which needs to maintain accurate time. The
term RTC came into picture to avoid confusion with regular hardware clocks which
are merely signals that administer digital electronics, and do not count time in human
units.

Benefits of using RTC:

 Low power consumption

 Liberates the main system for time-critical tasks

 Increases accuracy if compared to other methods

With the option of alternative power source with RTCs, they can continue to keep
time while the primary power source being unavailable. This alternate source may be
a lithium battery or a supercapacitor.

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 3.4 Analog to Digital Converter (ADC)

ADCs are peripherals that convert a continuous analog voltage to a discrete digital
number. In order to convert to digital, the signal is sampled at higher frequencies to
minimize the signal loss. Then the amplitude at those sampled moments is converted
with respect to their quantization level. Finally these levels and moments are entitled
to a unique code, which are simply the combinations of 0’s and 1’s – this is called
encoding.

Fig 3.1 Block Diagram of Working of an ADC

Fig 3.2 ADC Module Block Diagram

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3.5 Pulse Width Modulation (PWM)

Pulse width modulation (PWM) is a simple but powerful technique of using a

rectangular digital waveform to control an analog variable or simply controlling
analog circuits with a microprocessor's digital outputs. PWM is employed in a wide
variety of applications, from measurement & communications to power control and
conversion.

PWM module provides a great deal of flexibility and can generate simple PWM
signals, such as those required by a simple charge pump as well as paired PWM
signals with deadband delays, such as those required by a half-H bridge driver. Three
generator blocks can also generate the full six channels of gate controls required by a
3-phase inverter bridge.

Each PWM generator block has the following features:

 One fault-condition handling inputs to quickly provide low-latency shutdown and

prevent damage to the motor being controlled, for a total of two inputs

 One 16-bit counter

- Runs in Down or Up/Down mode

- Output frequency controlled by a 16-bit load value
- Load value updates can be synchronized
- Produces output signals at zero and load value

 Two PWM comparators

- Comparator value updates can be synchronized

- Produces output signals on match

 PWM signal generator

- Output PWM signal is constructed based on actions taken as a result of the

counter and PWM comparator output signals
- Produces two independent PWM signals

 Dead-band generator

- Produces two PWM signals with programmable dead-band delays suitable for
driving a half-H bridge.

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  Can initiate an ADC sample sequence

Fig 3.3 PWM Module Block Diagram

Fig 3.4 PWM Generator Block Diagram

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Chapter 4

Communication Protocol and Interfacing with external devices

4.1 Introduction

Microcontrollers or System on Chips (SoC) are important components of modern day

electronic systems. But microcontrollers alone can’t make systems. For any system to
work, it needs memory, displays, real time clock, interfaces to the external world etc.
This means that microcontrollers need to communicate with other devices on the same
PCB or with devices of other PCB from the same system, to achieve the system
functionality in applications such as digital audio, digital signal processing, or
telecommunications channels. Microcontroller is an intelligent component on the
system, which runs the software program to take decisions and control the other
components of the system. To take decisions, microcontroller needs data from various
input sources and to execute the decisions, it sends control signals to different
devices/actuators interfaced on the system. For example, several sensors (temperature,
pressure, sound etc.) can be thought of as the components of input system. These
sensors gather data and communicate with the controller through a set of
communication interfaces.

The modern day microcontrollers are enabled with several communication protocols
to achieve the requirement of communication. These communication protocols can be
wireline or wireless. And it is not new to have communication protocols on
microcontrollers.

Communication between the microcontroller and other peripheral devices can be

implemented in two ways: parallel and serial. In parallel communication, 8-bit or 16-
bit bus is connected with external device with other appropriate control signal to
establish meaningful communication. The simple example is interfacing memory with
microcontroller. The bus (8 or 16 or 32 bit) connected directly with memory chip and
ALE (Address Latch Enable) decides, whether bus carries address or data to write into
memory and read from memory. Parallel communication was commonly used in the
early days of microprocessor based systems.

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Serial communication protocols can be categorized as Synchronous and
Asynchronous protocols. In synchronous communication, data is transmission and
receiving is a continuous stream at a constant rate. Synchronous communication
requires the clock of transmitting device and receiving device synchronized.

In the case of asynchronous communication, the transmission of data requires no

clock signal and data transfer occurs intermittently rather than steady stream.
Handshake signals between the transmitter and receiver are important in
asynchronous communications.

4.2 Universal Asynchronous Receiver-Transmitter (UART)

Universal Asynchronous Receiver-Transmitter (UART) is commonly known as Serial

Communication Interface (SCI) when it was incorporated in microcontrollers. It is an
asynchronous protocol and used mainly in interfacing microcontrollers with personal
computers. This protocol is also known as RS-232 protocol.

In data transmission, a duplex transmission is one in which data can be transmitted as

well as received. In a simplex transmission, device is configured as transmitter or
receiver. One example is a PC communicating with printers, in which the computer
only sends data. Duplex transmissions are categorized as half or full duplex. Data is
transmitted one way at a time; it is called as half duplex. Data transfer occurs both
ways at the same time; it is referred as full duplex. Full duplex requires two data lines,
one for transmission and one for reception.

The receiver and transmitter should agree on a set of rules called protocol, to
understand the data transmitted or received. It is difficult to sense the continuous
stream of 1s and 0s. Generally protocols, define how data is packed, how many bits
make a character, how data begins and ends. Asynchronous serial data
communication is used for character transmissions. Between start and stop bits,
characters are packed. The start bit is always one bit but the stop bit can be one or two
bits. The start bit is always logic ‘0’ (low) and the stop bit is logic ‘1’ (high).

29
Fig 4.1 Frame for ASCII ‘A’ (01000001)

Data transfer rate in serial communication is measured in terms of bits per second
(bps). This is also called as baud rate.

4.3 Inter IC (I2C) Communication Protocol

Inter IC (I2C) (IIC) is important serial communication protocol in modern electronic

systems. IIC is a serial bus interface, can be implemented in software, but most of the
microcontrollers support IIC by incorporating it as hard IP (Intellectual Property). IIC
can be used to interface microcontroller with RTC, EEPROM and different variety of
sensors. IIC is used to interface chips on motherboard, generally between a processor
chip and any peripheral which supports IIC. IIC is very reliable wireline
communication protocol for an on board or short distances. I2C is a serial protocol for
two-wire interface to connect low-speed devices like microcontrollers, EEPROMs,
A/D and D/A converters, I/O interfaces and other similar peripherals in embedded
systems IIC protocol uses two pins for data transfer: Serial Data Line (SDA) and
Serial Clock Line (SCL). The reduction in number of pins in comparison with parallel
data transfer is evident. This reduces the cost of production, package size and power
consumption. IIC is also best suited protocol for battery operated devices. IIC is also
referred as two wire serial interface (TWI).

30
Fig 4.2 I2C Bus

To implement I2C (For TIVA series microcontrollers or for most of the

microcontrollers) a 4.7kilo ohm pull-up resistor for each line is needed. This is
required to implement wired-AND logic in IIC.

Bit format: I 2C data bit is transferred on the SDA line and should be synchronized by
high to low pulse of clock running on SCL line. As per the specifications of IIC, data
line can’t change when clock is high, it can change during clock line is low. This rule
is followed during data transfer and not applicable for STOP and START bits.
START and STOP bits format: I 2C has got START and STOP bits. START and
STOP bits are generated by master. These bits can be easily recognized. START and
STOP are generated by keeping the SCL high and changing the SDA line. START bit
is generated by high to low transition in SDA line when SCL is high. STOP bit is
generated by low to high transition in SDA line when SCL is low.

4.4 Serial Peripheral Interface (SPI)

Serial peripheral interface (SPI) is a serial communication interface originally

designed by Motorola in late eighties. SPI and I2C came into existence almost at the
same time. Most of the modern day microcontrollers will support SPI protocol. Both
SPI and I2C offer good support for communication with low-speed devices, but SPI is
better suited to applications in which devices transfer data streams. Some devices use
the full-duplex mode to implement an efficient, swift data stream for applications

31
such as digital audio, digital signal processing, or telecommunications channels, but
most off-the-shelf chips stick to half-duplex request/response protocols.

SPI is used to talk to a variety of peripherals, such a

 Sensors: temperature, pressure, ADC, touchscreens, video game controllers

 Control devices: audio codecs, digital potentiometers, DAC

 Camera lenses: Canon EF lens mount

 Memory: flash and EEPROM

 Real-time clocks

 LCD, sometimes even for managing image data

 Any MMC or SD card

Description

SPI is a synchronous serial communication protocol like I2C, where master generates
clock and data transfer between master and slave happens with respect to clock. Both
master and slave devices will have shift registers connected to input (MISO for master
and MOSI for slave) and output (MOSI for master and MISO for slave) as shown in
figure.

Fig 4.3 Serial Peripheral Interface

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Chapter 5

MIT APP Inventor

5.1 Introduction

3
The smartphone is an information nexus in today’s digital age, with access to a
nearly infinite supply of content on the web, coupled with rich sensors and personal
data. However, people have difficulty harnessing the full power of these ubiquitous
devices for themselves and their communities. Most smartphone users consume
technology without being able to produce it, even though local problems can often
be solved with mobile devices. How then might they learn to leverage smartphone
capabilities to solve real-world, everyday problems? MIT App Inventor is designed
to democratize this technology and is used as a tool for learning computational
thinking in a variety of educational contexts, teaching people to build apps to solve
problems in their communities.

4
MIT App Inventor is an online development platform that anyone can leverage to
solve real-world problems. It provides a web-based “What you see is what you get”
(WYSIWYG) editor for building mobile phone applications targeting the Android
and iOS operating systems. It uses a block-based programming language built on
Google Blockly (Fraser, 2013) and inspired by languages such as StarLogo TNG
(Begel & Klopfer, 2007) and Scratch (Resnick et al., 2009; Maloney, Resnick,
Rusk, Silverman, & Eastmond, 2010), empowering anyone to build a mobile phone
app to meet a need.

5.2 Overview

The MIT App Inventor user interface includes two main editors: the design editor
and the blocks editor. The design editor, or designer (see Fig. ), is a drag and drop
interface to lay out the elements of the application’s user interface (UI). The blocks
editor (see Fig. 3.2) is an environment in which app inventors can visually lay out
the logic of their apps using color-coded blocks that snap together like puzzle pieces
to describe the program. To aid in development and testing, App Inventor provides a
mobile app called the App Inventor Companion (or just “the Companion”) that
developers can use to test and adjust the behaviour of their apps in real time. In this

33
 way, anyone can quickly build a mobile app and immediately begin to iterate and
test.

Fig 5.1 App Inventor’s design editor. App inventors drag components out from the palette
(far left) to the viewer (center left) to add them to the app. Inventors can change the
properties of the components (far right)

34
Fig 5.2 App Inventor’s blocks editor. Blocks code is typically read left to right, top to
bottom. In this example, one would read “when Cat click, do call Meow play,” that is, play
the meow sound when the cat is clicked

Components are core abstractions in MIT App Inventor. Components reduce the

complexity of managing interactions with platform-specific application programming
interfaces (APIs) and details concerning state management of device hardware. This allows
the user to think about the problem at hand rather than the minutia typically required of
application developers. For example, someone planning to use MIT App Inventor to build
an app to use the global positioning system (GPS) to track movement need not be
concerned with application lifecycle management, GPS software and hardware locks, or
network connectivity (in case location detection falls back to network-based location).
Instead, the app developer adds a location sensor component that abstracts away this
complexity and provides an API for enabling and processing location updates.

Components are made up of three major elements: properties, methods, and

events. Properties control the state of the component and are readable and/or writable by
the app developer. For example, the enabled property of the location sensor includes the
functionality required to configure the GPS receiver and to manage its state while the app is
in use. Methods operate on multiple inputs and possibly return a result. Events respond to
changes in the device or app state based on external factors. For example, when the app
user changes their location, the location changed event allows the app logic to respond to
the change.

35
 CONCLUSION

This training has been an excellent and rewarding experience for me. I would like to conclude
by mentioning that there has been a lot I have learnt in the domain of Embedded System
designs from this one month training. Needless to say, the technical aspects of the work could
be improved provided enough time and experience. As someone who belongs to the field of
Electronics and Communication, I believe my time spent in learning and discovering new
aspects of this domain was worth it and contributed to enhance my understanding about this
field. As the internship was completely online, my work was totally software based and I
could not get any hands-on experience. Tiva C Series microcontroller have advanced features
and getting to learn about it motivated me to make projects on it in the future. With the help
of knowledge that I have gained from this training, I am looking forward to work upon more
projects in this field.

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 REFERENCES

1. https://www.ti.com/lit/pdf/spmy010

2. https://en.wikipedia.org/wiki/Embedded_system

3. https://appinventor.mit.edu/

4. https://en.wikipedia.org/wiki/App_Inventor_for_Android

37