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ADEC - Lab 3

This document summarizes an experiment on studying bias stabilization of BJT amplifier circuits using two different biasing configurations: 1. Voltage divider biasing uses two resistors in a voltage divider network to bias the base-emitter junction. This makes the circuit less dependent on changes in the transistor's beta. 2. Collector feedback biasing uses negative feedback from the collector to the base to automatically regulate the collector current and keep the transistor in the active region regardless of beta. The summary examines how temperature and variation in transistor parameters can cause the operating point or Q-point to shift, and describes voltage divider biasing and collector feedback biasing as techniques to improve Q-point stability.
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0% found this document useful (0 votes)
77 views

ADEC - Lab 3

This document summarizes an experiment on studying bias stabilization of BJT amplifier circuits using two different biasing configurations: 1. Voltage divider biasing uses two resistors in a voltage divider network to bias the base-emitter junction. This makes the circuit less dependent on changes in the transistor's beta. 2. Collector feedback biasing uses negative feedback from the collector to the base to automatically regulate the collector current and keep the transistor in the active region regardless of beta. The summary examines how temperature and variation in transistor parameters can cause the operating point or Q-point to shift, and describes voltage divider biasing and collector feedback biasing as techniques to improve Q-point stability.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Department of Electrical Engineering (New Campus)

EE 213L – Analog & Digital Electronic Circuits

Semester: Spring 2021

LAB 3: To study the bias-stabilization of BJT amplifier circuits (Voltage


Divider Biasing & Collector Feedback Biasing)

Submitted to: Mam Iqra Farhat

Section: “A”

Group Members: 1- Syed M. Saweiz (2019-EE-275)

2- Syed Furqan Javed (2019-EE-280)

3- Asif Khan (2019-EE-339)

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Experiment # 2
To study the bias-stabilization of BJT amplifier circuits
1. Objective:
i. To analyse biasing stability of Voltage Divider Bias configuration using 2N3904 & 2N3055
ii. To analyse biasing stability of Collector Feedback Bias configuration using 2N3904 & 2N3055

2. Apparatus:

i. Resistors (120 kΩ, 15 kΩ, 2.2 kΩ, 220 Ω, 3.3 kΩ, 765 kΩ)
ii. BJT Transistors (2N3904 & 2N3055)
iii. Voltmeter
iv. DC voltage source (12 V)

3. Theory:
1) Voltage Divider Biasing:
Here the common emitter transistor configuration is biased using a voltage divider
network to increase stability. The name of this biasing configuration comes from the fact that the
two resistors 𝑅1 and 𝑅2 form a voltage or potential divider network across the supply with their
center point junction connected the transistors base terminal as shown.

This voltage divider biasing configuration is the most widely used transistor biasing
method. The emitter terminal of the transistor is forward biased by the voltage value developed
across resistor 𝑅2 . Also, voltage divider network biasing makes the transistor circuit independent
of changes in beta as the biasing voltages set at the transistors base, emitter, and collector
terminals are not dependent on external circuit values.

To calculate the voltage developed across resistor 𝑅2 and therefore the voltage applied to
the base terminal we simply use the voltage divider formula for resistors in series. Generally, the
voltage drop across resistor 𝑅2 is much less than for resistor 𝑅1 . Clearly the transistors base
voltage 𝑉𝐵 with respect to ground, will be equal to the voltage across 𝑅2 .

The amount of biasing current flowing through resistor 𝑅2 is generally set to 10 times the
value of the required base current 𝐼𝐵 so that it is sufficiently high enough to have no effect on the
voltage divider current or changes in Beta.

2) Collector Feedback Biasing:


This self biasing collector feedback configuration is another beta dependent biasing
method which requires two resistors to provide the necessary DC bias for the transistor. The
collector to base feedback configuration ensures that the transistor is always biased in the active
region regardless of the value of Beta (β). The DC base bias voltage is derived from the collector
voltage 𝑉𝐶 , thus providing good stability.

In this circuit, the base bias resistor, 𝑅𝐵 is connected to the transistor’s collector C,
instead of to the supply voltage rail, 𝑉𝐶𝐶 . Now if the collector current increases, the collector
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voltage drops, reducing the base drive and thereby automatically reducing the collector current to
keep the transistors Q-point fixed. Therefore, this method of collector feedback biasing produces
negative feedback round the transistor as there is a direct feedback from the output terminal to
the input terminal via resistor, 𝑅𝐵 .

BIAS STABILIZATION OF BJT AMPLIFIER CIRCUITS.

A transistor can work as amplifier, only if the dc/ac voltages and currents in the circuit are
suitably fixed. The operating point or bias point or quiescent point (or simply Q-point) is the voltage
or current which, when applied to a device, causes it to operate in a certain desired fashion.

❖ Need for bias stabilization:

After fixing the operating point suitably, it should remain there only. But there are two reasons for
the operating point to shift.

1. The transistor parameters such as VBE & β changes from device to device
2. Transistor parameters are also temperature dependent.

❖ Bias Stabilization:

The maintaining of the operating point, unaffected by temperature variations or the alterations in
transistor parameters.

❖ Need for Stabilization:

𝐼𝐶 = 𝛽 ⋅ 𝐼𝐵 + (1 + 𝛽)𝐼𝐶𝑂

Reverse saturation current: Ico doubles for every 10 degree rise in temperature. Transistor Current
Gain β, increases linearly with rise in temperature. Base Emitter Voltage VBE, decreases by 2.5mV
per degree rise in temperature.

Any or all of the above factors can cause a shift in the Q-point with rise in temperature.

❖ Transistor Current Gain:

The transistor parameters among different units of same type, same number changes IE. If we
take two transistor units of same type (i.e. same number, construction, parameter specified etc.) and
use them in circuit, there is change in the value in actual practice. The biasing circuit is designed
according to the required value. Since with gain change, the operating point also shifts.

❖ Requirements of a Biasing Circuit:

1. The emitter-base junction must be forward biased and collector-base junction must be reversed
biased.
2. The transistors should be operated in the active region.
3. The circuit design should provide a degree of temperature stability.
4. The operating point should be made independent of transistor parameters like, techniques used to
maintain the Q-point stability.
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❖ Stabilization Techniques:

This refers to the use of resistive biasing circuits which keep Q-POINT Relatively constant with
variations in gain and temperature.

❖ Compensation Techniques:

This refers to the use of temperature sensitive devices such as diodes, transistors, thermistors etc.
which provide compensating voltages and current to maintain the operating point stability.

❖ Stability Factors:

1. The stability factor is a measure of stability provided by the biasing circuit.


2. Stability factor indicates the degree of change in operating point due to variation in temperature.
3. Since there are 3 temperature dependent variables, there are 3 stability factors.

❖ Biasing and Stabilization:

If circuit is not biased correctly it will

1. Work inefficiently and


2. Produce distortion in output signal

So, to use the transistor in any application it is necessary to bias it. Biasing turns the
transistor ON and places it in a region where it operates linearly and provides constant amount of
voltage gain.

By using load line analysis method one can determine the operating point for the transistor.
DC load line is the line drawn on the output characteristics of a transistor (say C-E configuration)
which gives the value of IC and VCE corresponding to zero signal condition. When signal is applied it
is called AC load line. These load lines intersect at Q-point called operating point. It is observed that
even after selecting the suitable Q point it tends to shift from its position. It is due to variation in
parameters.

❖ Variation of Transistor Parameters:

𝐼𝐶 = 𝛽 ⋅ 𝐼𝐵 + (1 + 𝛽)𝐼𝐶𝑂

All three variables β, IB & ICO are strongly dependent on temperature. This causes increase in
IC so the operating point shifts. Even the transistors of the same type have lot of variation from unit
to unit. This gives rise to instability of Q point.

❖ BJT Load Line Analysis:

Collector circuit gives, VCC = VCE + IC.RC.

Or, VCE = VCC – IC RC

Note that VCC and RC are fixed values.

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Above equation can be written as

1 𝑉𝐶𝐶
𝐼𝐶 = (− 𝑉𝐶𝐸 + )
𝑅𝐶 𝑅𝐶

Compare with standard equation of straight line

𝑦 = 𝑚𝑥 + 𝑐

When 𝐼𝐶 = 0,

𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 0 ⋅ 𝑅𝐶

𝑉𝐶𝐸 = 𝑉𝐶𝐶 (𝑃𝑜𝑖𝑛𝑡 𝐴)

IC will be maximum when 𝑉𝐶𝐸 = 0,

𝑉𝐶𝐶
𝐼𝐶 = (𝑃𝑜𝑖𝑛𝑡 𝐵)
𝑅𝐶

D.C. load line is drawn joining these two points.

❖ Operating Point:

The point obtained by the value of IC and VCE when no signal is applied at the input. Also called as
quiescent (silent or no signal) point or Q-point. In the given figure Q is operating point.

❖ Transistor Biasing:

Setting the values of IC and VCE in a transistor (sets Q point on dc load line). The circuit that
provides necessary condition of transistor biasing is known as biasing circuit.

❖ Selection of Operating Point:

The dc load line AB corresponds to RC (DC load) in collector circuit. Operating point will be
somewhere on load line. If point D is taken as operating point upper portion of the positive half
cycle of input will be clipped off near to saturation. If point E is selected, some part of negative half
cycle is clipped due to cutoff region. So distorted signal is obtained.

If point C is selected as Q point the full cycle is obtained in the amplified form and signal is
not distorted. So Q point should be selected at the center of the load line.

❖ Factors Affecting Stability of Q-point:

Even if we have selected a proper Q point it tends to shift its positions due to following.

1. Variation of transistor parameters

𝐼𝐶 = 𝛽 ⋅ 𝐼𝐵 + (1 + 𝛽)𝐼𝐶𝑂

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All three variables β, IB and ICO are dependent on temperature. This causes Q point to shift, thus
leading to distortion.

2. Variation in transistor parameters of the same type of transistor

❖ Stability Factor (S):

Defined as rate of change of collector current w.r.t. ICO keeping β and IB as constant.

𝑑𝐼𝐶
𝑆=
𝑑𝐼𝐶𝑂

at constant IB and β.

The lower the value of S greater is thermal stability of the transistor. Ideal value of S=1

A value below 25 results in satisfactory performance.

❖ Stability Factor for CE Configuration:

𝐼𝐶 = 𝛽 ⋅ 𝐼𝐵 + (𝛽 + 1)𝐼𝐶𝑂

Differentiating w.r.t. IC we get,

𝛽+1
𝑆=
𝑑𝐼
1−𝛽⋅ 𝐵
𝑑𝐼𝐶

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4. Circuit Diagram:

Fig. 1: Voltage Divider Bias Configuration (Left)

Fig. 2: Collector Feedback Bias Configuration (Right)

5. Procedure:

i. Open Proteus and connect the circuit as shown in Fig. 1 and Fig. 2.
ii. For transistors type their names (2N3904 & 2N3055) in components library.
iii. Connect the DC supply at respective terminals, mentioned in Fig.1 and 2. Then set them to 12V.
iv. Measure the DC voltage at the output and record.

6. Theoretical Calculations:

Theoretical work is done below,

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7. Proteus Simulation:
i. Voltage Divider Biasing:
Results of respective circuits are shown below,

Fig. 3: (left) Voltage Divider Biasing with 2N3904 BJT


Fig. 4: (right) Voltage Divider Biasing with 2N3055 BJT

𝑇𝑟𝑎𝑛𝑠𝑖𝑠𝑡𝑜𝑟 𝑉𝐶𝐸 (𝑉𝑜𝑙𝑡𝑠) [𝑇ℎ𝑒𝑜𝑟𝑒𝑡𝑖𝑐𝑎𝑙] 𝑉𝐶𝐸 (𝑉𝑜𝑙𝑡𝑠) [𝑃𝑟𝑜𝑡𝑒𝑢𝑠]


2N3904 6.33 6.29
2N3005 8.995 8.42

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ii. Collector Feedback Biasing:
Results of respective circuits are shown below,

Fig. 5: (left) Collector Feedback Biasing with 2N3904 BJT


Fig. 6: (right) Collector Feedback Biasing with 2N3055 BJT

𝑇𝑟𝑎𝑛𝑠𝑖𝑠𝑡𝑜𝑟 𝑉𝐶𝐸 (𝑉𝑜𝑙𝑡𝑠) [𝑇ℎ𝑒𝑜𝑟𝑒𝑡𝑖𝑐𝑎𝑙] 𝑉𝐶𝐸 (𝑉𝑜𝑙𝑡𝑠) [𝑃𝑟𝑜𝑡𝑒𝑢𝑠]


2N3904 5.98 5.90
2N3005 10.2 10.1

8. Conclusion:

Changing transistor does change the biasing stability. We used 2N3904 & 2N3055 in Voltage
Divider Biasing and Collector Feedback Biasing Configuration. Voltage Divider Bias had better
Stability also it is very less dependent on transistor gain 𝛽.
We can see the effect of changing of BJT by using the voltmeters. Bias Stability (also known
as Bias Instability) can be defined as how much deviation or drift the sensor has from its mean value of
the output rate. ... Lower Bias Instability is advantageous, as it results in a gyro producing fewer
deviations from the mean rate over time.

………………………………………………………

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