Adder Cum Subtractor
Adder Cum Subtractor
Code Principles
Reg. No. : Name :
Semester : III Semester Year : II Year
Date of : 17-9-2020 Date of : 12-10-2020
Expt. Submission
Name of the Lab Instructor: .
Introduction / Background
4 BIT ADDER CUM SUBTRACTOR –
A 4-bit adder cum subtractor is used in adding and subtracting 4-bit binary
numbers. It is made of four full adders which are connected in parallel with each
other. The Cout one full adder is connected to the Cinof the other full adder which
enhances the process of addition or subtraction. It has an input line X. For X= 0,
the circuit becomes 4-bit full adder. For X = 1, the circuit becomes 4-bit full
subtractor (Subtraction is done by 2’s complement method). Apart from X,
A3A2A1A0 andB3B2B1B0 are inputs where A0 representthe first input bit,
A1represents the second input bit, A2represents the third input bit and A3
represents the fourth input bit of the first binary number (addend) and B0 represent
the first input bit, B1 represent thesecond input bit, B2 represent the third input bit
and B3represent the fourth input bit of the second binarynumber (augend) in case of
four bit parallel adder. In case of four-bit parallel subtractor, they represent
theminuend and subtrahend respectively.
Materials / Equipment
1. 4 × IC 7486 (X-OR GATE)
2. 4 Full adders
3. Connecting wires
4. Input switches
5. LEDs
Procedure
Connect four full adders in parallel in such a way thatCout of one full adder is
connected to theCinof the other full adder.
An input X is connected to Cin of the first full adder. Inputs B0 and X are
connected to the X-ORgate. The output of the X-OR gate and A0 serves as
inputs for the first full adder. Addition operationis performed and two outputs
are obtained: sum and carry. The sum is displayed at the output andthe carry
obtained serves as the input carry for the next full adder. The same procedure is
repeatedfor the other full adders as well. The output (sum calculated by each
adder) is connected to an LED.
Once done with the connections, test the working of the circuit by giving
different values forX, A3A2A1A0 and B3B2B1B0 and verify the output with the
theoretical result.
Data
Results and Conclusion
Four-bit parallel adder and subtractor was implemented successfully and the output
obtained is matching
with the theoretical results.
References
1.Vlab
2,Logisim