Precision CMOS Single-Supply Rail-to-Rail Input/Output Wideband Operational Amplifiers
Precision CMOS Single-Supply Rail-to-Rail Input/Output Wideband Operational Amplifiers
The combination of low offsets, very low input bias currents, ⴚIN A 2 7 OUT B
AD8602
and high speed make these amplifiers useful in a wide variety of ⴙIN A 3 6 ⴚIN B
Vⴚ 4 5 ⴙIN B
applications. Filters, integrators, diode amplifiers, shunt current
sensors, and high impedance sensors all benefit from the combi-
nation of performance features. Audio and other ac applications
benefit from the wide bandwidth and low distortion. For the
most cost-sensitive applications, the D grades offer this ac per-
The AD8601, AD8602, and AD8604 are specified over the
formance with lower dc precision at a lower price point.
extended industrial (–40°C to +125°C) temperature range. The
Applications for these amplifiers include audio amplification for AD8601, single, is available in the tiny 5-lead SOT-23 package.
portable devices, portable phone headsets, bar code scanners, The AD8602, dual, is available in 8-lead MSOP and narrow
portable instruments, cellular PA controls, and multipole filters. SOIC surface-mount packages. The AD8604, quad, is available
The ability to swing rail-to-rail at both the input and output in 14-lead TSSOP and narrow SOIC packages.
enables designers to buffer CMOS ADCs, DACs, ASICs, and SOT, MSOP, and TSSOP versions are available in tape and
other wide output swing devices in single-supply systems. reel only.
REV. D
A Grade D Grade
Parameter Symbol Conditions Min Typ Max Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage (AD8601/AD8602) VOS 0 V ≤ VCM ≤ 1.3 V 80 500 1,100 6,000 µV
–40°C ≤ TA ≤ +85°C 700 7,000 µV
–40°C ≤ TA ≤ +125°C 1,100 7,000 µV
0 V ≤ VCM ≤ 3 V* 350 750 1,300 6,000 µV
–40°C ≤ TA ≤ +85°C 1,800 7,000 µV
–40°C ≤ TA ≤ +125°C 2,100 7,000 µV
Offset Voltage (AD8604) VOS VCM = 0 V to 1.3 V 80 600 1,100 6,000 µV
–40°C ≤ TA ≤ +85°C 800 7,000 µV
–40°C ≤ TA ≤ +125°C 1,600 7,000 µV
VCM = 0 V to 3.0 V* 350 800 1,300 6,000 µV
–40°C ≤ TA ≤ +85°C 2,200 7,000 µV
–40°C ≤ TA ≤ +125°C 2,400 7,000 µV
Input Bias Current IB 0.2 60 0.2 200 pA
–40°C ≤ TA ≤ +85°C 25 100 25 200 pA
–40°C ≤ TA ≤ +125°C 150 1,000 150 1,000 pA
Input Offset Current IOS 0.1 30 0.1 100 pA
–40°C ≤ TA ≤ +85°C 50 100 pA
–40°C ≤ TA ≤ +125°C 500 500 pA
Input Voltage Range 0 3 0 3 V
Common-Mode Rejection Ratio CMRR VCM = 0 V to 3 V 68 83 52 65 dB
Large Signal Voltage Gain AVO VO = 0.5 V to 2.5 V,
RL = 2 kΩ , VCM = 0 V 30 100 20 60 V/mV
Offset Voltage Drift ∆VOS/∆T 2 2 µV/°C
OUTPUT CHARACTERISTICS
Output Voltage High VOH IL = 1.0 mA 2.92 2.95 2.92 2.95 V
–40°C ≤ TA ≤ +125°C 2.88 2.88 V
Output Voltage Low VOL IL = 1.0 mA 20 35 20 35 mV
–40°C ≤ TA ≤ +125°C 50 50 mV
Output Current IOUT ± 30 ± 30 mA
Closed-Loop Output Impedance ZOUT f = 1 MHz, AV = 1 12 12 Ω
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = 2.7 V to 5.5 V 67 80 56 72 dB
Supply Current/Amplifier ISY VO = 0 V 680 1,000 680 1,000 µA
–40°C ≤ TA ≤ +125°C 1,300 1,300 µA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kΩ 5.2 5.2 V/µs
Settling Time tS To 0.01% <0.5 <0.5 µs
Gain Bandwidth Product GBP 8.2 8.2 MHz
Phase Margin ⌽o 50 50 Degrees
NOISE PERFORMANCE
Voltage Noise Density en f = 1 kHz 33 33 nV/√Hz
en f = 10 kHz 18 18 nV/√Hz
Current Noise Density in 0.05 0.05 pA/√Hz
*For VCM between 1.3 V and 1.8 V, V OS may exceed specified value.
Specifications subject to change without notice.
–2– REV. D
AD8601/AD8602/AD8604
ELECTRICAL CHARACTERISTICS (VS = 5.0 V, VCM = VS/2, TA = 25ⴗC, unless otherwise noted.)
A Grade D Grade
Parameter Symbol Conditions Min Typ Max Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage (AD8601/AD8602) VOS 0 V ≤ VCM ≤ 5 V 80 500 1,300 6,000 µV
–40°C ≤ TA ≤ +125°C 1,300 7,000 µV
Offset Voltage (AD8604) VOS VCM = 0 V to 5 V 80 600 1,300 6,000 µV
–40°C ≤ TA ≤ +125°C 1,700 7,000 µV
Input Bias Current IB 0.2 60 0.2 200 pA
–40°C ≤ TA ≤ +85°C 100 200 pA
–40°C ≤ TA ≤ +125°C 1,000 1,000 pA
Input Offset Current IOS 0.1 30 0.1 100 pA
–40°C ≤ TA ≤ +85°C 6 50 6 100 pA
–40°C ≤ TA ≤ +125°C 25 500 25 500 pA
Input Voltage Range 0 5 0 5 V
Common-Mode Rejection Ratio CMRR VCM = 0 V to 5 V 74 89 56 67 dB
Large Signal Voltage Gain AVO VO = 0.5 V to 4.5 V, 30 80 20 60 V/mV
RL = 2 kΩ, VCM = 0 V
Offset Voltage Drift ∆VOS/∆T 2 2 µV/°C
OUTPUT CHARACTERISTICS
Output Voltage High VOH IL = 1.0 mA 4.925 4.975 4.925 4.975 V
IL = 10 mA 4.7 4.77 4.7 4.77 V
–40°C ≤ TA ≤ +125°C 4.6 4.6 V
Output Voltage Low VOL IL = 1.0 mA 15 30 15 30 mV
IL = 10 mA 125 175 125 175 mV
–40°C ≤ TA ≤ +125°C 250 250 mV
Output Current IOUT ± 50 ± 50 mA
Closed-Loop Output Impedance ZOUT f = 1 MHz, AV = 1 10 10 Ω
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = 2.7 V to 5.5 V 67 80 56 72 dB
Supply Current/Amplifier ISY VO = 0 V 750 1,200 750 1,200 µA
–40°C ≤ TA ≤ +125°C 1,500 1,500 µA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kΩ 6 6 V/µs
Settling Time tS To 0.01% <1.0 <1.0 µs
Full Power Bandwidth BWp < 1% Distortion 360 360 kHz
Gain Bandwidth Product GBP 8.4 8.4 MHz
Phase Margin ⌽o 55 55 Degrees
NOISE PERFORMANCE
Voltage Noise Density en f = 1 kHz 33 33 nV/√Hz
en f = 10 kHz 18 18 nV/√Hz
Current Noise Density in f = 1 kHz 0.05 0.05 pA/√Hz
Specifications subject to change without notice.
REV. D –3–
AD8601/AD8602/AD8604
ABSOLUTE MAXIMUM RATINGS*
Package Type JA* JC Unit
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to VS 5-Lead SOT-23 (RT) 230 92 °C/W
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ± 6 V 8-Lead SOIC (R) 158 43 °C/W
Storage Temperature Range 8-Lead MSOP (RM) 210 45 °C/W
R, RM, RT, RU Packages . . . . . . . . . . . . –65°C to +150°C 14-Lead SOIC (R) 120 36 °C/W
Operating Temperature Range 14-Lead TSSOP (RU) 180 35 °C/W
AD8601/AD8602/AD8604 . . . . . . . . . . . . –40°C to +125°C *JA is specified for worst-case conditions, i.e., JA is specified for device in
Junction Temperature Range socket for PDIP packages; JA is specified for device soldered onto a circuit
R, RM, RT, RU Packages . . . . . . . . . . . . –65°C to +150°C board for surface-mount packages.
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV HBM
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ORDERING GUIDE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD8601/AD8602/AD8604 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
–4– REV. D
Typical Performance Characteristics– AD8601/AD8602/AD8604
3,000 60
VS = 3V VS = 5V
TA = 25ⴗC TA = 25ⴗC TO 85ⴗC
2,500 VCM = 0V TO 3V 50
QUANTITY – Amplifiers
QUANTITY – Amplifiers
2,000 40
1,500 30
1,000 20
500 10
0 0
ⴚ1.0 ⴚ0.8 ⴚ0.6 ⴚ0.4 ⴚ0.2 0 0.2 0.4 0.6 0.8 1.0 0 1 2 3 4 5 6 7 8 9 10
INPUT OFFSET VOLTAGE – mV TCVOS – V/ⴗC
TPC 1. Input Offset Voltage Distribution TPC 4. Input Offset Voltage Drift Distribution
3,000 1.5
VS = 3V
VS = 5V
TA = 25ⴗC
TA = 25ⴗC
1.0
2,500 VCM = 0V TO 5V
0.5
2,000
0
1,500
ⴚ0.5
1,000
ⴚ1.0
500 ⴚ1.5
0 ⴚ2.0
ⴚ1.0 ⴚ0.8 ⴚ0.6 ⴚ0.4 ⴚ0.2 0 0.2 0.4 0.6 0.8 1.0 0 0.5 1.0 1.5 2.0 2.5 3.0
INPUT OFFSET VOLTAGE – mV COMMON-MODE VOLTAGE – V
TPC 2. Input Offset Voltage Distribution TPC 5. Input Offset Voltage vs. Common-Mode Voltage
60 1.5
VS = 3V VS = 5V
TA = 25ⴗC TO 85ⴗC TA = 25ⴗC
1.0
50
INPUT OFFSET VOLTAGE – mV
QUANTITY – Amplifiers
0.5
40
0
30
ⴚ0.5
20
ⴚ1.0
10 ⴚ1.5
0 ⴚ2.0
0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5
TCVOS – V/ⴗC COMMON-MODE VOLTAGE – V
TPC 3. Input Offset Voltage Drift Distribution TPC 6. Input Offset Voltage vs. Common-Mode Voltage
REV. D –5–
AD8601/AD8602/AD8604
300 30
VS = 3V VS = 3V
250 25
200 20
150 15
100 10
50 5
0 0
ⴚ40 ⴚ25 ⴚ10 5 20 35 50 65 80 95 110 125 ⴚ40 ⴚ25 ⴚ10 5 20 35 50 65 80 95 110 125
TEMPERATURE – ⴗC TEMPERATURE – ⴗC
TPC 7. Input Bias Current vs. Temperature TPC 10. Input Offset Current vs. Temperature
300 30
VS = 5V VS = 5V
250 25
200 20
150 15
100 10
50 5
0 0
ⴚ40 ⴚ25 ⴚ10 5 20 35 50 65 80 95 110 125 ⴚ40 ⴚ25 ⴚ10 5 20 35 50 65 80 95 110 125
TEMPERATURE – ⴗC TEMPERATURE – ⴗC
TPC 8. Input Bias Current vs. Temperature TPC 11. Input Offset Current vs. Temperature
5 10k
VS = 5V VS = 2.7V
TA = 25ⴗC TA = 25ⴗC
4 1k
INPUT BIAS CURRENT – pA
OUTPUT VOLTAGE – mV
3 100
SOURCE
SINK
2 10
1 1
0 0.1
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.001 0.01 0.1 1 10 100
COMMON-MODE VOLTAGE – V LOAD CURRENT – mA
TPC 9. Input Bias Current vs. Common-Mode Voltage TPC 12. Output Voltage to Supply Rail vs. Load Current
–6– REV. D
AD8601/AD8602/AD8604
10k 35
VS = 5V VS = 2.7V
TA = 25ⴗC
30
1k
OUTPUT VOLTAGE – mV
OUTPUT VOLTAGE – mV
25
SOURCE
VOL @ 1mA LOAD
100
20
SINK
15
10
10
1
5
0.1 0
0.001 0.01 0.1 1 10 100 ⴚ40 ⴚ25 ⴚ10 5 20 35 50 65 80 95 110 125
LOAD CURRENT – mA TEMPERATURE – ⴗC
TPC 13. Output Voltage to Supply Rail vs. Load Current TPC 16. Output Voltage Swing vs. Temperature
5.1 2.67
VS = 5V VS = 2.7V
5.0
2.66
VOH @ 1mA LOAD
OUTPUT VOLTAGE – V
OUTPUT VOLTAGE – V
4.9
2.65
2.63
4.6
4.5 2.62
ⴚ40 ⴚ25 ⴚ10 5 20 35 50 65 80 95 110 125 ⴚ40 ⴚ25 ⴚ10 5 20 35 50 65 80 95 110 125
TEMPERATURE – ⴗC TEMPERATURE – ⴗC
TPC 14. Output Voltage Swing vs. Temperature TPC 17. Output Voltage Swing vs. Temperature
250
VS = 3V
VS = 5V RL = NO LOAD
100
TA = 25ⴗC
200 80
OUTPUT VOLTAGE – mV
150 40 90
GAIN – dB
100 0 180
–20
50 –40
VOL @ 1mA LOAD –60
0
ⴚ40 ⴚ25 ⴚ10 5 20 35 50 65 80 95 110 125 1k 10k 100k 1M 10M 100M
TEMPERATURE – ⴗC FREQUENCY – Hz
TPC 15. Output Voltage Swing vs. Temperature TPC 18. Open-Loop Gain and Phase vs. Frequency
REV. D –7–
AD8601/AD8602/AD8604
3.0
VS = 5V
100 RL = NO LOAD
TA = 25ⴗC 2.5
80
VS = 2.7V
AV = 1
20 135 1.5
0 180
1.0
–20
–40
0.5
–60
0
1k 10k 100k 1M 10M 100M 1k 10k 100k 1M 10M
FREQUENCY – Hz FREQUENCY – Hz
TPC 19. Open-Loop Gain and Phase vs. Frequency TPC 22. Closed-Loop Output Voltage Swing vs. Frequency
6
VS = 3V
TA = 25ⴗC
AV = 100 5
40
VS = 5V
CLOSED-LOOP GAIN – dB
0
1k 10k 100k 1M 10M 100M 1k 10k 100k 1M 10M
FREQUENCY – Hz FREQUENCY – Hz
TPC 20. Closed-Loop Gain vs. Frequency TPC 23. Closed-Loop Output Voltage Swing vs. Frequency
200
VS = 5V VS = 3V
180
TA = 25ⴗC TA = 25ⴗC
AV = 100
40 160
CLOSED-LOOP GAIN – dB
OUTPUT IMPEDANCE – ⍀
140
AV = 10 AV = 100
20 120
100
AV = 1 AV = 10
0 80
AV = 1
60
40
20
0
1k 10k 100k 1M 10M 100M 100 1k 10k 100k 1M 10M
FREQUENCY – Hz FREQUENCY – Hz
TPC 21. Closed-Loop Gain vs. Frequency TPC 24. Output Impedance vs. Frequency
–8– REV. D
AD8601/AD8602/AD8604
200 160
VS = 5V VS = 5V
180 140
TA = 25ⴗC TA = 25ⴗC
140 100
120 80
AV = 100
100 60
AV = 10
80 40
AV = 1
60 20
40 0
20 ⴚ20
0 ⴚ40
100 1k 10k 100k 1M 10M 100 1k 10k 100k 1M 10M
FREQUENCY – Hz FREQUENCY – Hz
TPC 25. Output Impedance vs. Frequency TPC 28. Power Supply Rejection Ratio vs. Frequency
160 70
VS = 3V
140 VS = 2.7V
TA = 25ⴗC
60 RL =
COMMON-MODE REJECTION – dB
120 TA = 25ⴗC
0
10
ⴚ20
ⴚ40 0
1k 10k 100k 1M 10M 20M 10 100 1k
FREQUENCY – Hz CAPACITANCE – pF
TPC 26. Common-Mode Rejection Ratio vs. Frequency TPC 29. Small Signal Overshoot vs. Load Capacitance
160 70
VS = 5V
140 VS = 5V
TA = 25ⴗC
60 RL =
COMMON-MODE REJECTION – dB
120 TA = 25ⴗC
SMALL SIGNAL OVERSHOOT – %
50 AV = 1
100
80
40
60
30
40
20 20
0 ⴚOS
10
ⴚ20
+OS
ⴚ40 0
1k 10k 100k 1M 10M 20M 10 100 1k
FREQUENCY – Hz CAPACITANCE – pF
TPC 27. Common-Mode Rejection Ratio vs. Frequency TPC 30. Small Signal Overshoot vs. Load Capacitance
REV. D –9–
AD8601/AD8602/AD8604
1.2 0.1
VS = 5V VS = 5V
SUPPLY CURRENT PER AMPLIFIER – mA
TA = 25ⴗC RL = 600⍀
1.0
RL = 2k⍀
G = 10
THD + N – %
RL = 2k⍀
0.4 0.001
0.2
0 0.0001
ⴚ40 ⴚ25 ⴚ10 5 20 35 50 65 80 95 110 125 20 100 1k 10k 20k
TEMPERATURE – ⴗC FREQUENCY – Hz
TPC 31. Supply Current per Amplifier vs. Temperature TPC 34. Total Harmonic Distortion + Noise vs. Frequency
1.0 64
VS = 3V VS = 2.7V
SUPPLY CURRENT PER AMPLIFIER – mA
56
TA = 25ⴗC
40
0.6
32
0.4
24
16
0.2
0 0
ⴚ40 ⴚ25 ⴚ10 5 20 35 50 65 80 95 110 125 0 5 10 15 20 25
TEMPERATURE – ⴗC FREQUENCY – kHz
TPC 32. Supply Current per Amplifier vs. Temperature TPC 35. Voltage Noise Density vs. Frequency
0.8 208
VS = 2.7V
SUPPLY CURRENT PER AMPLIFIER – mA
0.7 182
VOLTAGE NOISE DENSITY – nV/ Hz
TA = 25ⴗC
0.6 156
0.5 130
0.4 104
0.3 78
0.2 52
0.1 26
0 0
0 1 2 3 4 5 6 0 0.5 1.0 1.5 2.0 2.5
SUPPLY VOLTAGE – V FREQUENCY – kHz
TPC 33. Supply Current per Amplifier vs. Supply Voltage TPC 36. Voltage Noise Density vs. Frequency
–10– REV. D
AD8601/AD8602/AD8604
208
VS = 5V
VS = 5V TA = 25ⴗC
182
TA = 25ⴗC
VOLTAGE NOISE DENSITY – nV/ Hz
156
VOLTAGE – 2.5V/DIV
130
104
78
52
26
0
0 0.5 1.0 1.5 2.0 2.5
FREQUENCY – kHz TIME – 1s/DIV
TPC 37. Voltage Noise Density vs. Frequency TPC 40. 0.1 Hz to 10 Hz Input Voltage Noise
64
VS = 5V
VS = 5V RL = 10k⍀
56
TA = 25ⴗC CL = 200pF
VOLTAGE NOISE DENSITY – nV/ Hz
TA = 25ⴗC
48
40
32
24
16
8
50.0mV/DIV 200ns/DIV
0
0 5 10 15 20 25
FREQUENCY – kHz
TPC 38. Voltage Noise Density vs. Frequency TPC 41. Small Signal Transient Response
VS = 2.7V VS = 2.7V
TA = 25ⴗC RL = 10k⍀
CL = 200pF
TA = 25ⴗC
VOLTAGE – 2.5V/DIV
50.0mV/DIV 200ns/DIV
TIME – 1s/DIV
TPC 39. 0.1 Hz to 10 Hz Input Voltage Noise TPC 42. Small Signal Transient Response
REV. D –11–
AD8601/AD8602/AD8604
VS = 5V VS = 5V
RL = 10k⍀ RL = 10k⍀
VIN AV = 1
CL = 200pF
AV = 1 TA = 25ⴗC
TA = 25ⴗC
VOLTAGE – 1.0V/DIV
VOLTAGE – 1V/DIV
VOUT
TPC 43. Large Signal Transient Response TPC 46. No Phase Reversal
VS = 2.7V VS = 5V
RL = 10k⍀ RL = 10k⍀
CL = 200pF VO = 2V p-p
AV = 1
TA = 25ⴗC
TA = 25ⴗC
VOLTAGE – 500mV/DIV
VIN
VOLTAGE – V
+0.1%
ERROR
VOUT
ⴚ0.1%
ERROR
TIME – 100ns/DIV
TIME – 400ns/DIV
TPC 44. Large Signal Transient Response TPC 47. Settling Time
2.0
VS = 2.7V
RL = 10k⍀ VS = 2.7V
1.5
AV = 1 TA = 25ⴗC
VIN TA = 25ⴗC
1.0
0.1% 0.01%
OUTPUT SWING – V
VOLTAGE – 1V/DIV
0.5
VOUT 0
ⴚ0.5
0.1% 0.01%
ⴚ1.0
ⴚ1.5
ⴚ2.0
300 350 400 450 500 550 600
TIME – 2.0s/DIV SETTLING TIME – ns
TPC 45. No Phase Reversal TPC 48. Output Swing vs. Settling Time
–12– REV. D
AD8601/AD8602/AD8604
5 Rail-to-Rail Input Stage
4
VS = 5V The input common-mode voltage range of the AD860x extends
TA = 25ⴗC
to both positive and negative supply voltages. This maximizes the
3
usable voltage range of the amplifier, an important feature for
2 single-supply and low voltage applications. This rail-to-rail
OUTPUT SWING – V
1
input range is achieved by using two input differential pairs, one
0.1% 0.01% NMOS and one PMOS, placed in parallel. The NMOS pair is
0
active at the upper end of the common-mode voltage range, and
0.1% 0.01%
ⴚ1 the PMOS pair is active at the lower end.
ⴚ2 The NMOS and PMOS input stages are separately trimmed
ⴚ3 using DigiTrim to minimize the offset voltage in both differen-
ⴚ4
tial pairs. Both NMOS and PMOS input differential pairs are
active in a 500 mV transition region, when the input common-
ⴚ5
0 200 400 600 800 1,000 mode voltage is between approximately 1.5 V and 1 V below the
SETTLING TIME – ns positive supply voltage. Input offset voltage will shift slightly in
TPC 49. Output Swing vs. Settling Time this transition region, as shown in TPCs 5 and 6. Common-
mode rejection ratio will also be slightly lower when the input
THEORY OF OPERATION common-mode voltage is within this transition band. Compared
The AD8601/AD8602/AD8604 family of amplifiers are rail-to- to the Burr Brown OPA2340 rail-to-rail input amplifier, shown
rail input and output precision CMOS amplifiers that operate in Figure 1, the AD860x, shown in Figure 2, exhibits lower
from 2.7 V to 5.0 V of power supply voltage. These amplifiers offset voltage shift across the entire input common-mode range,
use Analog Devices’ DigiTrim® technology to achieve a higher including the transition region.
degree of precision than available from most CMOS amplifiers.
0.7
DigiTrim technology is a method of trimming the offset volt-
age of the amplifier after it has already been assembled. The
0.4
advantage in post-package trimming lies in the fact that it cor-
rects any offset voltages due to the mechanical stresses of 0.1
assembly. This technology is scalable and used with every
package option, including SOT-23-5, providing lower offset
VOS – mV
ⴚ0.2
voltages than previously achieved in these small packages.
The DigiTrim process is done at the factory and does not add ⴚ0.5
ⴚ0.2
The open-loop gain of the AD860x is 80 dB, typical, with a load
of 2 kΩ. Because of the rail-to-rail output configuration, the ⴚ0.5
gain of the output stage and the open-loop gain of the amplifier
ⴚ0.8
are dependent on the load resistance. Open-loop gain will de-
crease with smaller load resistances. Again, this is a characteristic
ⴚ1.1
inherent to all rail-to-rail output amplifiers.
ⴚ1.4
0 1 2 3 4 5
VCM – V
REV. D –13–
AD8601/AD8602/AD8604
Input Overvoltage Protection 10pF
(OPTIONAL)
As with any semiconductor device, if a condition could exist
that would cause the input voltage to exceed the power supply, 4.7M⍀
the device’s input overvoltage characteristic must be considered.
Excess input voltage will energize internal PN junctions in the
D1 VOUT
AD860x, allowing current to flow from the input to the supplies. 4.7V/A
This input current will not damage the amplifier, provided it is AD8601
limited to 5 mA or less. This can be ensured by placing a resis- Figure 3. Amplifier Photodiode Circuit
tor in series with the input. For example, if the input voltage
could exceed the supply by 5 V, the series resistor should be at High- and Low-Side Precision Current Monitoring
least (5 V/5 mA) = 1 kΩ. With the input voltage within the Because of its low input bias current and low offset voltage, the
supply rails, a minimal amount of current is drawn into the AD860x can be used for precision current monitoring. The true
inputs, which, in turn, causes a negligible voltage drop across rail-to-rail input feature of the AD860x allows the amplifier to
the series resistor. Therefore, adding the series resistor will monitor current on either high-side or low-side. Using both
not adversely affect circuit performance. amplifiers in an AD8602 provides a simple method for monitoring
both current supply and return paths for load or fault detec-
Overdrive Recovery tion. Figures 4 and 5 demonstrate both circuits.
Overdrive recovery is defined as the time it takes the output of
an amplifier to come off the supply rail when recovering from 3V
an overload signal. This is tested by placing the amplifier in a
R2
closed-loop gain of 10 with an input square wave of 2 V p-p while 2.49k⍀
the amplifier is powered from either 5 V or 3 V. MONITOR
OUTPUT
The AD860x has excellent recovery time from overload condi- Q1
2N3904
tions. The output recovers from the positive supply rail within 3V
that has a high source impedance or must use large value resis- MONITOR
OUTPUT
tances around the amplifier. For example, the photodiode R2
2.49k⍀
amplifier circuit shown in Figure 3 requires a low input bias
current op amp to reduce output voltage error. The AD8601
minimizes offset errors due to its low input bias current and low Figure 5. A High-Side Current Monitor
offset voltage. Voltage drop is created across the 0.1 Ω resistor that is propor-
The current through the photodiode is proportional to the inci- tional to the load current. This voltage appears at the inverting
dent light power on its surface. The 4.7 MΩ resistor converts input of the amplifier due to the feedback correction around the
this current into a voltage, with the output of the AD8601 op amp. This creates a current through R1 which, in turn, pulls
increasing at 4.7 V/µA. The feedback capacitor reduces excess current through R2. For the low-side monitor, the monitor
noise at higher frequencies by limiting the bandwidth of the output voltage is given by
circuit to
R
1 Monitor Output = 3V – R2 × SENSE × IL (2)
BW = R1
2π(4.7 MΩ)CF (1)
–14– REV. D
AD8601/AD8602/AD8604
For the high-side monitor, the monitor output voltage is The AD8601, AD7476, and AD5320 are all available in space-
saving SOT-23 packages.
R
Monitor Output = R2 × SENSE × IL (3) PC100 Compliance for Computer Audio Applications
R1
Because of its low distortion and rail-to-rail input and output,
Using the components shown, the monitor output transfer func- the AD860x is an excellent choice for low-cost, single-supply
tion is 2.5 V/A. audio applications, ranging from microphone amplification to
line output buffering. TPC 34 shows the total harmonic distor-
Using the AD8601 in Single-Supply Mixed-Signal Applications
tion plus noise (THD + N) figures for the AD860x. In unity
Single-supply mixed-signal applications requiring 10 or more
gain, the amplifier has a typical THD + N of 0.004%, or –86 dB,
bits of resolution demand both a minimum of distortion and a
even with a load resistance of 600 Ω. This is compliant with the
maximum range of voltage swing to optimize performance. To
PC100 specification requirements for audio in both portable
ensure that the A/D or D/A converters achieve their best perfor-
and desktop computers.
mance, an amplifier often must be used for buffering or signal
conditioning. The 750 µV maximum offset voltage of the Figure 8 shows how an AD8602 can be interfaced with an AC’97
AD8601 allows the amplifier to be used in 12-bit applications codec to drive the line output. Here, the AD8602 is used as a
powered from a 3 V single supply, and its rail-to-rail input unity-gain buffer from the left and right outputs of the AC’97
and output ensure no signal clipping. codec. The 100 µF output coupling capacitors block dc cur-
rent and the 20 Ω series resistors protect the amplifier from
Figure 6 shows the AD8601 used as an input buffer amplifier to
short circuits at the jack.
the AD7476, a 12-bit 1 MHz A/D converter. As with most A/D
converters, total harmonic distortion (THD) increases with 5V
higher source impedances. By using the AD8601 in a buffer
configuration, the low output impedance of the amplifier mini- VDD 5V
mizes THD while the high input impedance and low bias current 2
8
C1
100F
R4
V DD 28 20⍀
of the op amp minimizes errors due to source impedance. The U1-A
1
3V
1F
VOUT
4 5
4 1 0V TO 3.0V
3-WIRE 5 1 3
SERIAL AD5320 2 AD8601 RL
INTERFACE 6
REV. D –15–
AD8601/AD8602/AD8604
OUTLINE DIMENSIONS
14-Lead Thin Shrink Small Outline Package [TSSOP] 5-Lead Small Outline Transistor Package [SOT-23]
(RU-14) (RT-5)
Dimensions shown in millimeters Dimensions shown in millimeters
5 4
14 8 2.80 BSC
1.60 BSC
4.50 1 2 3
6.40
4.40 BSC
4.30 PIN 1
1 7
0.95 BSC
1.90
1.30 BSC
PIN 1 1.15
1.05 0.65 0.90
1.00 BSC
0.20
0.80 1.20 1.45 MAX 0.22
MAX 0.09 0.75
8ⴗ 0.08
0.15 0.60
0.30 0ⴗ 0.45 10ⴗ
0.05 SEATING COPLANARITY 0.15 MAX 5ⴗ 0.60
0.19 PLANE 0.50 SEATING
0.10 0.30 PLANE 0ⴗ 0.45
COMPLIANT TO JEDEC STANDARDS MO-153AB-1 0.30
COMPLIANT TO JEDEC STANDARDS MO-178AA
14-Lead Standard Small Outline Package [SOIC] 8-Lead Mini Small Outline Package [MSOP]
(R-14) (RM-8)
Dimensions shown in millimeters and (inches) Dimensions shown in millimeters
14 8 8 5
4.00 (0.1575) 6.20 (0.2441)
3.80 (0.1496) 1 7 5.80 (0.2283) 3.00 4.90
BSC BSC
1 4
8ⴗ
0.51 (0.0201)
COPLANARITY SEATING 0.25 (0.0098) 0ⴗ 1.27 (0.0500) 0.15 1.10 MAX
0.31 (0.0122) PLANE 0.00
0.10 0.17 (0.0067) 0.40 (0.0157)
0.80
0.38 0.23 8ⴗ 0.60
COMPLIANT TO JEDEC STANDARDS MS-012AB 0ⴗ
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS 0.22 0.08 0.40
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR COPLANARITY SEATING
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 0.10 PLANE
COMPLIANT TO JEDEC STANDARDS MO-187AA
5.00 (0.1968)
4.80 (0.1890)
8 5
4.00 (0.1574) 6.20 (0.2440)
3.80 (0.1497) 1 4 5.80 (0.2284)
–16– REV. D
AD8601/AD8602/AD8604
Revision History
Location Page
11/03—Data Sheet changed from REV. C to REV. D.
Changes to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3/03—Data Sheet changed from REV. B to REV. C.
Changes to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3/03—Data Sheet changed from REV. A to REV. B.
Change to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Change to FUNCTIONAL BLOCK DIAGRAMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Change to TPC 39 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Changes to Figures 4 and 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Changes to Equations 2 and 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14, 15
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
REV. D –17–
–18–
–19–
–20–
C01525–0–11/03(D)