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Quanta ZBA - ZBB - DA0ZBAMB6A0

This document contains a system block diagram for the Octopus_A/B device which uses a Gemini Lake processor. It shows connections between the processor and various components including up to 8GB of LPDDR4 RAM in 4 channels, EDP display and touchscreen, camera, stylus, USB ports, I2C and SPI interfaces, UART, PDM/I2S audio, and more. The diagram is labeled with component names and interface types.

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julio cesar mina
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© © All Rights Reserved
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100% found this document useful (1 vote)
237 views45 pages

Quanta ZBA - ZBB - DA0ZBAMB6A0

This document contains a system block diagram for the Octopus_A/B device which uses a Gemini Lake processor. It shows connections between the processor and various components including up to 8GB of LPDDR4 RAM in 4 channels, EDP display and touchscreen, camera, stylus, USB ports, I2C and SPI interfaces, UART, PDM/I2S audio, and more. The diagram is labeled with component names and interface types.

Uploaded by

julio cesar mina
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 45

5 4 3 2 1

Octopus_A/B (Gemini Lake)


PCB: 651-01771-03
D TABLE OF CONTENTS TABLE OF CONTENTS D

SHEET NO. SHEET NAME SHEET NO. SHEET NAME


1 TABLE OF CONTENTS 31 USB C CONNECTOR ( MLB )
2 SYSTEM BLOCK DIAGRAM 32 USB C VBUS CONTROL
3 USB TYPE-C BLOCK DIAGRAM 33 PMIC
4 POWER TREE 34 POWER: 1.8V(EC) 3.3V AND 5V
5 I2C MAP 35 POWER - LOAD SWITCHES
6 SOC DRAM I/F 36 INAs
7 SOC EDP/MIPI/DDI 37 BATTERY CHARGER

C 8 SOC PCIE/USB/SATA 38 LTE C

9 SOC AUDIO/EMMC/LPC/SPI 39 CONNECTORS TO SUB BOARD


10 SOC I2C/CNVI/UART/SPI 40 AR CONNECCTOR
11 SOC PMU/RTC/SVID/THERMAL/MISC 41 BLANK
12 SOC JTAG/GPIO/ITP 42 BLANK
13 SOC GROUND 43 MOV DIAGRAM
14 SOC POWER 44 POWER SEQUENCE
15 SOC DECOUPLING 45 SOC STRAPPING
16 MEMORY CH 00/01 LPDDR4
17 MEMORY CH 10/11 LPDDR4
B B

18 EC-NUVOTON
19 SPI ROM
20 MIPI60 DEBUG HEADER
21 H1 SECURE MICROCONTROLLER
22 SERVO
23 eMMC/SD
24 AUDIO
25 KB, TP, PEN
26 LID: eDP, CAM, TOUCH, SENSOR
A
27 SENSOR: COMPASS, GYRO A

28 WIFI/BT CONNECTOR
29 USB C TCPC/MUX
Quanta Computer Inc.
30 USB A CONNECTIONS (MLB) PROJECT : ZBA/ZBB
Size Document Number Rev
1A
TABLE OF CONTENTS
Date: Friday, May 31, 2019 Sheet 1 of 45
5 4 3 2 1
5 4 3 2 1

DISPLAY(EDP)11.6" ? Backlight DMIC


Octopus_A/B(Gemini Lake)
CAMERA Stylus 1366x768 ? (Dual?) Block Diagram ver:1.0
(B-Panel) (EMR)
Touch
FAB#LZ274
Screen EDP UART-AP
UART
rbox
D
UART-EC D

UART
H1

EDP(2 Lnes)
BACKLIT CTL SBU1,2
USB I2C

PDM
USB2.0 I2C INA

I2C

I2C
MAX 8GB DDR4 OR LPDDR4
SPI-AP-SPI
SPI
LPDDR4 LPDDR4 LPDDR4 LPDDR4
x32 x32 x32 x32 UART-H1
(2400) (2400) (2400) (2400)
2GB 2GB 2GB 2GB USB2-6 I2C-0 I2C-7 EDP PDM
/I2S
SPI Servo Header I2C
DRAM Keyboard
DRAM I/F
AP SPI ROM
(BIOS) 16MB UART-AP
EMMC EMMC
16/32/64GB EMMC 5.1* UART-EC
UART-0
EC-SPI
GMR/Hall
PCIe Gen2 x1 Sensor
WiFi-BT Module PCIe0
C
(2x2 801.11AC) I2S (WoV) C

DMIC
PCIE M.2 1216 USB2.0
USB2-2 EC(Nuvoton)
JFP2 CNVi CNVi NPCX79_0BX
CNVi IMU/Accel I2C
I2S SPI-Sensor (6-Axis)
I2S-0 I2S
I2C-Sensor

GLK
USB2.0 SPI-AP-EC with option
USB-to-SD USB2-5 eSPI of WoV
Micro-SD GL3213S I2C-Battery E-Compass
(104MB/s) USB3.0
USB3-5 (Optional)
I2C-Charger

MIPI160 Debug Header Debug


I2C-PMIC
PMIC_I2C Lid Accel
USB2.0
USB2-4
Track Pad I2C
I2C-6
USB3.0
USB3-4
DP
DDI-1
I2C
Audio Audio Jack I2C-5
B B
Codec DA7219 I2S
Jack I2S-2 Li-lon
Charger Battery
(Buck-Boost) Pack
USB3.0
USB3-0 2S or 3S
Speaker Amp. I2S ISL9238B 45Whr+
Speakers x2 Max98357A x2 I2S-1 DP
DDI-0

I2C-PMIC
USB3-2
USB2-3 USB2-1
USB2-7 USB3-3 USB3-1 USB2-0

PMIC
USB3.0

USB2.0

USB2.0

USB3.0

USB2.0

USB3.0

USB3.0

USB3.0

USB2.0
USB2.0

SBU1,2
DP

DP
I2C

I2C
RT5077A

BC1.2 BC1.2 BC1.2 TCPC+Mux+VCONN TCPC+Mux+VCONN BC1.2


AR Camera-W Camera-W SLGC55545VTR SLGC55545VTR MAX14637 ANX7447 PS8751BQFN52GTR-A3 MAX14637

optional
A A

SS TYPE-C SS
TYPE-A TYPE-A TYPE-C
CC/SBU Port0 CC/SBU
Port1 Port0 Port1

PPC PPC
(NX20P3483) (NX20P3483) Quanta Computer Inc.
PROJECT :ZBA/ZBB
PPVAR_PWR_IN PPVAR_PWR_IN Size Document Number Rev
1A
PP5000_A PP5000_A SYSTEM BLOCK DIAGRAM
Date: Friday, May 31, 2019 Sheet 2 of 45
5 4 3 2 1
5 4 3 2 1

PPVAR_PWR_IN
Charger Vout PPVAR_Cx_VBUS
PP5000_A
NX20P3483
D
Vin D

(Power Mux)

Vbus Sink/Source
EC
I2C CC 1,2
ANX7447
C C

SBU 1,2

SSRX0,1
DDI(0,1,2,3) -SS Mux
AUX -VCONN
USB-C
SSTX0,1
USB3-AP -Sink control
B
SoC (SSTX) -Source control B

USB3-AP
(SSRx)
HDP
MAX14637 USB2.0
(BC 1.2)
USB2.0
A
Quanta Computer Inc. A

PROJECT :ZBA/ZBB
Size Document Number Rev
1A
USB TYPE-C BLOCK DIAGRAM
Date: Friday, May 31, 2019 Sheet 3 of 45
5 4 3 2 1
5 4 3 2 1

Power Tree

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
Power Tree
Date: Friday, May 31, 2019 Sheet 4 of 45
5 4 3 2 1
5 4 3 2 1

D D

C C

B VBUS VBUS LID ACCEL B

0xE4 0xE4 0x3E


PMIC

PEN P-Sensor Intel Debug Audio Trackpad TouchScreen BASE IMU


0x09 0x28 H1 0x1A 0x15 0x10 BATT USB_C0 USB_C0 EEPROM Charger
0x58 0x16 0xA0 0x12 0xD0

LPSS_I2C0 LPSS_I2C1 LPSS_I2C3 LPSS_I2C4 ISH_I2C0 ISH_I2C1 ISH_I2C2


PMC_I2C

LPSS_I2C5 LPSS_I2C6 LPSS_I2C7 I2C0 I2C1 I2C2 I2C3 I2C4 I2C7

A
PCH EC(Nuvoton) A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
I2C MAP
Date: Friday, May 31, 2019 Sheet 5 of 45
5 4 3 2 1
5 4 3 2 1

(CPU)
U4A U4B
DDR4_LP3_LP4 DDR4_LP3_LP4 DDR4_LP3_LP4 DDR4_LP3_LP4
D D
BJ36 AT53 AY3 BJ24
(16) DDR_0B_DQ<8> MEM_CH0_DQB8 MEM_CH0_DQSA0_P DDR_0A_DQS_0_P (16) (17) DDR_1B_DQ<8> MEM_CH1_DQB8 MEM_CH1_DQSA0_P DDR_1A_DQS_0_P (17)
BK37 AT55 DDR_0A_DQS_0_N (16) BD3 BK25 DDR_1A_DQS_0_N (17)
(16) DDR_0B_DQ<9> BJ35 MEM_CH0_DQB9 MEM_CH0_DQSA0 (17) DDR_1B_DQ<9> BD1 MEM_CH1_DQB9 MEM_CH1_DQSA0
(16) DDR_0B_DQ<10> MEM_CH0_DQB10 (17) DDR_1B_DQ<10> MEM_CH1_DQB10
BL36 AW49 DDR_0A_DQS_1_P (16) BC3 BD25 DDR_1A_DQS_1_P (17)
(16) DDR_0B_DQ<11> MEM_CH0_DQB11 MEM_CH0_DQSA1_P (17) DDR_1B_DQ<11> MEM_CH1_DQB11 MEM_CH1_DQSA1_P
BJ39 AW48 AY1 BF25 DDR_1A_DQS_1_N (17)
(16) DDR_0B_DQ<12> MEM_CH0_DQB12 MEM_CH0_DQSA1 DDR_0A_DQS_1_N (16) (17) DDR_1B_DQ<12> MEM_CH1_DQB12 MEM_CH1_DQSA1
BL40 BA3
(16) DDR_0B_DQ<13> MEM_CH0_DQB13 (17) DDR_1B_DQ<13> MEM_CH1_DQB13
BJ40 BC54 DDR_0A_DQS_2_P (16) BA2 BL18 DDR_1A_DQS_2_P (17)
(16) DDR_0B_DQ<14> BK41 MEM_CH0_DQB14 MEM_CH0_DQSA2_P BB53 (17) DDR_1B_DQ<14> BE2 MEM_CH1_DQB14 MEM_CH1_DQSA2_P BJ18
(16) DDR_0B_DQ<15> MEM_CH0_DQB15 MEM_CH0_DQSA2 DDR_0A_DQS_2_N (16) (17) DDR_1B_DQ<15> MEM_CH1_DQB15 MEM_CH1_DQSA2 DDR_1A_DQS_2_N (17)
BA35 AR8
(16) DDR_0B_DQ<0> MEM_CH0_DQB0 (17) DDR_1B_DQ<0> MEM_CH1_DQB0
AY33 AR41 DDR_0A_DQS_3_P (16) AN15 AV19 DDR_1A_DQS_3_P (17)
(16) DDR_0B_DQ<1> MEM_CH0_DQB1 MEM_CH0_DQSA3_P (17) DDR_1B_DQ<1> MEM_CH1_DQB1 MEM_CH1_DQSA3_P
BA33 AR43 DDR_0A_DQS_3_N (16) AN17 AV21 DDR_1A_DQS_3_N (17)
(16) DDR_0B_DQ<2> AY35 MEM_CH0_DQB2 MEM_CH0_DQSA3 (17) DDR_1B_DQ<2> AU12 MEM_CH1_DQB2 MEM_CH1_DQSA3
(16) DDR_0B_DQ<3> BA37 MEM_CH0_DQB3 AV37 (17) DDR_1B_DQ<3> AN12 MEM_CH1_DQB3 AR13
(16) DDR_0B_DQ<4> MEM_CH0_DQB4 MEM_CH0_DQSB0_P DDR_0B_DQS_0_P (16) (17) DDR_1B_DQ<4> MEM_CH1_DQB4 MEM_CH1_DQSB0_P DDR_1B_DQS_0_P (17)
AY37 AV35 DDR_0B_DQS_0_N (16) AN13 AR15 DDR_1B_DQS_0_N (17)
(16) DDR_0B_DQ<5> AY39 MEM_CH0_DQB5 MEM_CH0_DQSB0 (17) DDR_1B_DQ<5> AU13 MEM_CH1_DQB5 MEM_CH1_DQSB0
(16) DDR_0B_DQ<6> MEM_CH0_DQB6 (17) DDR_1B_DQ<6> MEM_CH1_DQB6
BA39 BL38 DDR_0B_DQS_1_P (16) AU15 BB3 DDR_1B_DQS_1_P (17)
(16) DDR_0B_DQ<7> BL34 MEM_CH0_DQB7 MEM_CH0_DQSB1_P BJ38 (17) DDR_1B_DQ<7> AP3 MEM_CH1_DQB7 MEM_CH1_DQSB1_P BC2
(16) DDR_0B_DQ<24> MEM_CH0_DQB24 MEM_CH0_DQSB1 DDR_0B_DQS_1_N (16) (17) DDR_1B_DQ<24> MEM_CH1_DQB24 MEM_CH1_DQSB1 DDR_1B_DQS_1_N (17)
BL30 AU2
(16) DDR_0B_DQ<25> BJ29 MEM_CH0_DQB25 BF31 (17) DDR_1B_DQ<25> AV3 MEM_CH1_DQB25 AW7
(16) DDR_0B_DQ<26> MEM_CH0_DQB26 MEM_CH0_DQSB2_P DDR_0B_DQS_2_P (16) (17) DDR_1B_DQ<26> MEM_CH1_DQB26 MEM_CH1_DQSB2_P DDR_1B_DQS_2_P (17)
BK29 BD31 DDR_0B_DQS_2_N (16) AW3 AW8 DDR_1B_DQS_2_N (17)
(16) DDR_0B_DQ<27> BJ33 MEM_CH0_DQB27 MEM_CH0_DQSB2 (17) DDR_1B_DQ<27> AN2 MEM_CH1_DQB27 MEM_CH1_DQSB2
(16) DDR_0B_DQ<28> MEM_CH0_DQB28 (17) DDR_1B_DQ<28> MEM_CH1_DQB28
BK33 BJ32 DDR_0B_DQS_3_P (16) AP1 AT1 DDR_1B_DQS_3_P (17)
(16) DDR_0B_DQ<29> BJ34 MEM_CH0_DQB29 MEM_CH0_DQSB3_P BK31 (17) DDR_1B_DQ<29> AR3 MEM_CH1_DQB29 MEM_CH1_DQSB3_P AT3
(16) DDR_0B_DQ<30> MEM_CH0_DQB30 MEM_CH0_DQSB3 DDR_0B_DQS_3_N (16) (17) DDR_1B_DQ<30> MEM_CH1_DQB30 MEM_CH1_DQSB3 DDR_1B_DQS_3_N (17)
BJ30 AV1
(16) DDR_0B_DQ<31> BD29 MEM_CH0_DQB31 BG54 (17) DDR_1B_DQ<31> AR5 MEM_CH1_DQB31 BH9
(16) DDR_0B_DQ<16> MEM_CH0_DQB16 DDR0 MEM_CH0_CKE1B DDR_0B_CKE<1> (16) (17) DDR_1B_DQ<16> MEM_CH1_DQB16 DDR1 NCTF9
BF29 BH54 DDR_0B_CKE<0> (16) BA8 BC13
(16) DDR_0B_DQ<17> MEM_CH0_DQB17 MEM_CH0_CKE0B (17) DDR_1B_DQ<17> MEM_CH1_DQB17 NCTF3
BH29 BJ42 DDR_0B_CS<0> (16) AU7 BD11 DDR_1B_CA<5> (17)
(16) DDR_0B_DQ<18> BF33 MEM_CH0_DQB18 MEM_CH0_CS0B BF39 (17) DDR_1B_DQ<18> AU5 MEM_CH1_DQB18 MEM_CH1_CAB5 BD13
(16) DDR_0B_DQ<19> BC29 MEM_CH0_DQB19 NCTF5 BK43 (17) DDR_1B_DQ<19> BA5 MEM_CH1_DQB19 NCTF6 BF11
(16) DDR_0B_DQ<20> MEM_CH0_DQB20 MEM_CH0_CS1B DDR_0B_CS<1> (16) (17) DDR_1B_DQ<20> MEM_CH1_DQB20 NCTF7
BD33 BA7 BE5 DDR_1B_CA<0> (17)
(16) DDR_0B_DQ<21> MEM_CH0_DQB21 (17) DDR_1B_DQ<21> MEM_CH1_DQB21 MEM_CH1_CAB0
BF35 BL44 DDR_0A_CS<1> (16) AU8 BH5 DDR_1B_CA<3> (17)
(16) DDR_0B_DQ<22> MEM_CH0_DQB22 MEM_CH0_CS1A (17) DDR_1B_DQ<22> MEM_CH1_DQB22 MEM_CH1_CAB3
BH35 BD39 BA10 BH6
(16) DDR_0B_DQ<23> MEM_CH0_DQB23 NCTF3 (17) DDR_1B_DQ<23> MEM_CH1_DQB23 MEM_CH1_CAB4 DDR_1B_CA<4> (17)
BJ43 BF13
MEM_CH0_CS0A DDR_0A_CS<0> (16) NCTF8
AR53 BF54 DDR_0A_CKE<1> (16) BJ26 BG4 DDR_1B_CA<2> (17)
(16) DDR_0A_DQ<0> MEM_CH0_DQA0 MEM_CH0_CKE1A (17) DDR_1A_DQ<0> MEM_CH1_DQA0 MEM_CH1_CAB2
AP55 BF55 BL26 BE7 DDR_1B_CA<1> (17)
(16) DDR_0A_DQ<1> MEM_CH0_DQA1 MEM_CH0_CKE0A DDR_0A_CKE<0> (16) (17) DDR_1A_DQ<1> MEM_CH1_DQA1 MEM_CH1_CAB1
AP53 BJ27
(16) DDR_0A_DQ<2> MEM_CH0_DQA2 (17) DDR_1A_DQ<2> MEM_CH1_DQA2
AN54 BE49 BK27 BK11
(16) DDR_0A_DQ<3> MEM_CH0_DQA3 MEM_CH0_CLKB_P DDR_0B_CLK_P (16) (17) DDR_1A_DQ<3> MEM_CH1_DQA3 NCTF13
C AU54 BE51 BJ23 BJ12 C
(16) DDR_0A_DQ<4> MEM_CH0_DQA4 MEM_CH0_CLKB DDR_0B_CLK_N (16) (17) DDR_1A_DQ<4> MEM_CH1_DQA4 NCTF11
AV53 BK23 BK9
(16) DDR_0A_DQ<5> MEM_CH0_DQA5 (17) DDR_1A_DQ<5> MEM_CH1_DQA5 NCTF14
AV55 BC49 BJ22 BJ11
(16) DDR_0A_DQ<6> MEM_CH0_DQA6 MEM_CH0_CLKA_P DDR_0A_CLK_P (16) (17) DDR_1A_DQ<6> MEM_CH1_DQA6 NCTF10
AW53 BC48 BL22 BJ10 DDR_1A_CA<5> (17)
(16) DDR_0A_DQ<7> MEM_CH0_DQA7 MEM_CH0_CLKA DDR_0A_CLK_N (16) (17) DDR_1A_DQ<7> MEM_CH1_DQA7 MEM_CH1_CAA5
AU51 BD27 BJ4
(16) DDR_0A_DQ<8> AU48 MEM_CH0_DQA8 BD45 (17) DDR_1A_DQ<8> BF27 MEM_CH1_DQA8 NCTF12 BL6
(16) DDR_0A_DQ<9> MEM_CH0_DQA9 NCTF4 (17) DDR_1A_DQ<9> MEM_CH1_DQA9 MEM_CH1_CAA2 DDR_1A_CA<2> (17)
AU49 BH50 BH27 BJ5
(16) DDR_0A_DQ<10> MEM_CH0_DQA10 NCTF8 (17) DDR_1A_DQ<10> MEM_CH1_DQA10 MEM_CH1_CAA1 DDR_1A_CA<1> (17)
BA46 BH47 DDR_0B_CA<5> (16) BC27 BJ9 DDR_1A_CA<3> (17)
(16) DDR_0A_DQ<11> BA48 MEM_CH0_DQA11 MEM_CH0_CAB5 BF45 (17) DDR_1A_DQ<11> BH21 MEM_CH1_DQA11 MEM_CH1_CAA3 BJ6
(16) DDR_0A_DQ<12> MEM_CH0_DQA12 NCTF6 (17) DDR_1A_DQ<12> MEM_CH1_DQA12 MEM_CH1_CAA0 DDR_1A_CA<0> (17)
BA49 BH43 DDR_0B_CA<0> (16) BF23 BJ8
(16) DDR_0A_DQ<13> MEM_CH0_DQA13 MEM_CH0_CAB0 (17) DDR_1A_DQ<13> MEM_CH1_DQA13 MEM_CH1_CAA4 DDR_1A_CA<4> (17)
BA51 BD41 BD23
(16) DDR_0A_DQ<14> MEM_CH0_DQA14 MEM_CH0_CAB3 DDR_0B_CA<3> (16) (17) DDR_1A_DQ<14> MEM_CH1_DQA14
AR51 BH51 BF21 BF17
(16) DDR_0A_DQ<15> MEM_CH0_DQA15 NCTF9 (17) DDR_1A_DQ<15> MEM_CH1_DQA15 MEM_CH1_CLKB_P DDR_1B_CLK_P (17)
AY55 BD43 DDR_0B_CA<4> (16) BK19 BD17 DDR_1B_CLK_N (17)
(16) DDR_0A_DQ<16> MEM_CH0_DQA16 MEM_CH0_CAB4 (17) DDR_1A_DQ<16> MEM_CH1_DQA16 MEM_CH1_CLKB
BA54 BF43 BJ20
(16) DDR_0A_DQ<17> MEM_CH0_DQA17 MEM_CH0_CAB2 DDR_0B_CA<2> (16) (17) DDR_1A_DQ<17> MEM_CH1_DQA17
BA53 BF41 BL20 BF15
(16) DDR_0A_DQ<18> MEM_CH0_DQA18 MEM_CH0_CAB1 DDR_0B_CA<1> (16) (17) DDR_1A_DQ<18> MEM_CH1_DQA18 MEM_CH1_CLKA_P DDR_1A_CLK_P (17)
AY53 BG52 BJ21 BH15
(16) DDR_0A_DQ<19> MEM_CH0_DQA19 NCTF7 (17) DDR_1A_DQ<19> MEM_CH1_DQA19 MEM_CH1_CLKA DDR_1A_CLK_N (17)
BC53 BJ17
(16) DDR_0A_DQ<20> MEM_CH0_DQA20 (17) DDR_1A_DQ<20> MEM_CH1_DQA20
BD55 BK45 BJ16 BJ13
(16) DDR_0A_DQ<21> MEM_CH0_DQA21 NCTF14 (17) DDR_1A_DQ<21> MEM_CH1_DQA21 MEM_CH1_CKE0B DDR_1B_CKE<0> (17)
BE54 BJ46 BK15 BL12
(16) DDR_0A_DQ<22> MEM_CH0_DQA22 MEM_CH0_CAA2 DDR_0A_CA<2> (16) (17) DDR_1A_DQ<22> MEM_CH1_DQA22 MEM_CH1_CKE1B DDR_1B_CKE<1> (17)
BD53 BJ44 BL16 BF1
(16) DDR_0A_DQ<23> MEM_CH0_DQA23 MEM_CH0_CAA1 DDR_0A_CA<1> (16) (17) DDR_1A_DQ<23> MEM_CH1_DQA23 MEM_CH1_CS0B DDR_1B_CS<0> (17)
AN43 BJ47 BA21 BF2
(16) DDR_0A_DQ<24> MEM_CH0_DQA24 MEM_CH0_CAA3 DDR_0A_CA<3> (16) (17) DDR_1A_DQ<24> MEM_CH1_DQA24 MEM_CH1_CS1B DDR_1B_CS<1> (17)
AN44 BJ45 AY23 BC7
(16) DDR_0A_DQ<25> MEM_CH0_DQA25 MEM_CH0_CAA0 DDR_0A_CA<0> (16) (17) DDR_1A_DQ<25> MEM_CH1_DQA25 NCTF4
AR48 BK47 BA23
(16) DDR_0A_DQ<26> MEM_CH0_DQA26 MEM_CH0_CAA4 DDR_0A_CA<4> (16) (17) DDR_1A_DQ<26> MEM_CH1_DQA26
AU41 BJ51 BA17 BH2
(16) DDR_0A_DQ<27> MEM_CH0_DQA27 NCTF12 (17) DDR_1A_DQ<27> MEM_CH1_DQA27 MEM_CH1_CS0A DDR_1A_CS<0> (17)
AU43 BJ52 AY21 BC8
(16) DDR_0A_DQ<28> AN41 MEM_CH0_DQA28 NCTF13 BJ48 (17) DDR_1A_DQ<28> AY17 MEM_CH1_DQA28 NCTF5 BG2
(16) DDR_0A_DQ<29> MEM_CH0_DQA29 NCTF10 (17) DDR_1A_DQ<29> MEM_CH1_DQA29 MEM_CH1_CS1A DDR_1A_CS<1> (17)
AN39 BJ50 AY19 BK13
(16) DDR_0A_DQ<30> MEM_CH0_DQA30 NCTF11 (17) DDR_1A_DQ<30> MEM_CH1_DQA30 MEM_CH1_CKE0A DDR_1A_CKE<0> (17)
AU44 BL50 BA19 BJ14
(16) DDR_0A_DQ<31> MEM_CH0_DQA31 MEM_CH0_CAA5 DDR_0A_CA<5> (16) (17) DDR_1A_DQ<31> MEM_CH1_DQA31 MEM_CH1_CKE1A DDR_1A_CKE<1> (17)
AY31 DDR_VREF_DQ_CH0 TP141 AY29 DDR_RCOMP_CH0
NCTF2 AV29 DDR_VREF_CA_CH0 TP142 MEM_CH0_RCOMP
NCTF1 BC15 DDR_RST_CH1_L
MEM_CH1_RESET DDR_RCOMP_CH1 DDR_RST_CH1_L (17)
AY27
1 OF 13 MEM_CH1_RCOMP
AV27 DDR_VREF_CA_CH1 TP143
NCTF1 AY25 DDR_VREF_DQ_CH1 TP144
NCTF2
BC43 DDR_RST_CH0_L
B MEM_CH0_RESET DDR_RST_CH0_L (16) B

2 OF 13

PP1100_VDDQ

DDR_RCOMP_CH0

DDR_RCOMP_CH1
R26 R29
*1K_1%_2 *1K_1%_2
R307
110_1%_4 R309
110_1%_4 DDR_RST_CH0_L

DDR_RST_CH1_L

PLACE AS CLOSE TO SOC AS POSSIBLE

A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
SOC DRAM I/F 1A

Date: Friday, May 31, 2019 Sheet 6 of 45


5 4 3 2 1
5 4 3 2 1

Gemini lake (DISPLAY,eDP)


(CPU) U4C

AH1 AL2 TP_MDSIA_CLKP


PP3300_PD_A (29) DDI0_TX0_P DDI0_TXP_0 MDSI_A_CLKP
AH3 AM3 TP_MDSIA_CLKN
(29) DDI0_TX0_N DDI0_TXN_0 MDSI_A_CLKN
AE2 AG13 TP_MDSIC_CLKP
(29) DDI0_TX1_P DDI0_TXP_1 MDSI_C_CLKP
AE3 AG12 TP_MDSIC_CLKN
(29) DDI0_TX1_N DDI0_TXN_1 MDSI_C_CLKN
DDI0/DDI_B
USB C PORT 0 (29) DDI0_TX2_P AJ2
DDI0_TXP_2
AJ3 AN5 TP_MDSIA_D0_P
D (29) DDI0_TX2_N DDI0_TXN_2 MDSI_A_DP_0 D
R21 AN7 TP_MDSIA_D0_N
AG2 MDSI_A_DN_0
100K_5%_2 (29) DDI0_TX3_P DDI0_TXP_3
AG3 AJ15 TP_MDSIA_D1_P
(29) DDI0_TX3_N DDI0_TXN_3 MDSI_A_DP_1 AJ17 TP_MDSIA_D1_N
C336 0.1u/16V_4 DDI0_AUX_C_P AC12 MDSI MDSI_A_DN_1
(29) DDI0_AUX_P
C337 0.1u/16V_4 DDI0_AUX_C_N AC10 DDI0_AUXP AJ7 TP_MDSIA_D2_P
(29) DDI0_AUX_N DDI0_AUXN MDSI_A_DP_2 AJ5 TP_MDSIA_D2_N
C39 MDSI_A_DN_2
(18,29) USB_C0_HPD_1V8_ODL DDI0_HPD
R22 AJ10 TP_MDSIA_D3_P
100K_5%_2 B43
DDI0_DDC_SCL
1.8V/3.3V MDSI_A_DP_3
MDSI_A_DN_3
AJ12 TP_MDSIA_D3_N ALL NC
C84Q C43 DDI0_DDC_SDA
*10p/25V_2 AG15 TP_MDSIC_D0_P
MDSI_C_DP_0 AG17 TP_MDSIC_D0_N
AA2 MDSI_C_DN_0
(39) DDI1_TX0_P DDI1_TXP_0
AA3 AG8 TP_MDSIC_D1_P
USB C PORT 1 (39) DDI1_TX0_N DDI1_TXN_0 MDSI_C_DP_1
MDSI_C_DN_1
AG10 TP_MDSIC_D1_N
(39) DDI1_TX1_P Y3
PP3300_PD_A Y1 DDI1_TXP_1 DDI1/DDI_C AG7 TP_MDSIC_D2_P
(39) DDI1_TX1_N DDI1_TXN_1 MDSI_C_DP_2 AG5 TP_MDSIC_D2_N
AD1 MDSI_C_DN_2
(39) DDI1_TX2_P DDI1_TXP_2
AD3 AE15 TP_MDSIC_D3_P
(39) DDI1_TX2_N DDI1_TXN_2 MDSI_C_DP_3
R459 AE17 TP_MDSIC_D3_N
AC2 MDSI_C_DN_3
(39) DDI1_TX3_P DDI1_TXP_3
*2AC@100K_5%_2 (39) DDI1_TX3_N
AC3
DDI1_TXN_3
C338 *Short_0201 DDI1_AUX_C_P AC7
(39) DDI1_AUX_P
C339 *Short_0201 DDI1_AUX_C_N AC5 DDI1_AUXP
(39) DDI1_AUX_N DDI1_AUXN
1228_Q_Changed C338/C339 to a short pad C42 R53 TP_PCH_GPIO47 TP31
C A42 DDI1_DDC_SCL MIPI_I2C_SCL C
R460 C38 DDI1_DDC_SDA 1.8V/3.3V R54 TP_PCH_GPIO46 TP37
(18,39) USB_C1_HPD_1V8_ODL DDI1_HPD MIPI_I2C_SDA GP_INTD_DSI_TE2 (20)
*2AC@100K_5%_2 1.8V
T53 R502 *0_5%_2 GP_INTD_DSI_TE2 TP72
AE12 MDSI_C_TE T55
(26) EDP_TX0_P EDP_TXP_0 MDSI_A_TE
(26) EDP_TX0_N AE13
EDP_TXN_0
AC15 TP_WIFI_RST_N TP135
(26) EDP_TX1_P EDP_TXP_1
(26) EDP_TX1_N
AC17 eDP/DDI_A
EDP_TXN_1 AL5 MCSI1_RCOMP
AE10 MDSI_RCOMP
(26) EDP_TX2_P EDP_TXP_2
AE8
LOCAL DISPLAY PANEL (26) EDP_TX2_N EDP_TXN_2 R1
(26) EDP_TX3_P
AE5 150_1%_2
AE7 EDP_TXP_3
(26) EDP_TX3_N EDP_TXN_3
(26) EDP_AUX_PANEL_P W 17
(26) EDP_AUX_PANEL_N W 15 EDP_AUXP
EDP_AUXN
EDP_HPD_PANEL_1V8_ODL B39
EDP_HPD
(26) SOC_EDP_BKLTCTL_1V8 B41
(26) SOC_EDP_BKLTEN
C40 PNL0_BKLCTL 1.8V/3.3V
C41 PNL0_BKLTEN
(35) EN_PP3300_EDP_DX PNL0_VDDEN
R2 100_1%_2 EDP_PLLOBS_DP AA5
EDP_RCOMP_P
EDP_PLLOBS_DN AA7
B
EDP_RCOMP B

GLK_SOC_RVP2 3 OF 13

(LDS) PP1800_SOC_A

R731

100K_5%_2

EDP_HPD_PANEL_1V8_ODL

3
(26) EDP_HPD_PANEL 2 Q78
PJE138K

1
A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
SOC EDP/MIPI/DDI
Date: Friday, May 31, 2019 Sheet 7 of 45
5 4 3 2 1
5 4 3 2 1

Gemini lake (SATA , ODD, CLK ,USB,PCIE)

(CPU) U4D SD CARD I/F FOR HIGHER SPEED DEVICE


CLKDRV_RCOMP L10 H1 USB3_P5_SD_TX_C_P C346 0.1u/10V_2 SD CARD
PCIE_REF_CLK_RCOMP SATA_P1_USB3_P5_TXP USB3_P5_SD_TX_C_N USB3_P5_SD_TX_P (23)
H2 C349 0.1u/10V_2 USB3_P5_SD_TX_N (23)
TP162 R12 SATA_P1_USB3_P5_TXN
R7 TP163 R10 PCIE_CLKOUT0P SATA/USB3 H4
PCIE_CLKOUT0N SATA_P1_USB3_P5_RXP USB3_P5_SD_RX_P (23)
56_1%_4 G5 USB3_P5_SD_RX_N (23)
TP112 N7 SATA_P1_USB3_P5_RXN
TP113 N5 PCIE_CLKOUT1P 0102_Q_Changed C272/C303 to a short pad
D PCIE_CLKOUT1N PCIe B15 USB3_P0_C0_TX_C_P C272 *Short_0201
D
USB3_P0_TXP USB3_P0_C0_TX_P (29)
R7 C15 USB3_P0_C0_TX_C_N C303 *Short_0201 TYPE C PORT 0
USB3_P0_TXN USB3_P0_C0_TX_N (29)
R5 PCIE_CLKOUT2P
PCIE_CLKOUT2N F15
USB3_P0_RXP USB3_P0_C0_RX_P (29)
(28) PCIE_WLAN_CLK_P N8 D15 USB3_P0_C0_RX_N (29)
N10 PCIE_CLKOUT3P USB3_P0_RXN
(28) PCIE_WLAN_CLK_N PCIE_CLKOUT3N USB3 C14 USB3_P1_A0_TX_C_P C305 0.1u/10V_2
USB3_P1_TXP USB3_P1_A0_TX_P (30)
A14 USB3_P1_A0_TX_C_N C307 0.1u/10V_2 USB3_P1_A0_TX_N (30) TYPE A PORT 0
E2 USB3_P1_TXN
(28) PCIE_PCH_TX_WLAN_RX_C_P PCIE_P0_TXP
(28) PCIE_PCH_TX_WLAN_RX_C_N F2 J11 USB3_P1_A0_RX_P (30)
PCIE_P0_TXN USB3_P1_RXP H11
USB3_P1_RXN USB3_P1_A0_RX_N (30)
G7
(28) PCIE_PCH_RX_WLAN_TX_P PCIE_P0_RXP
(28) PCIE_PCH_RX_WLAN_TX_N H6
PCIE_P0_RXN C10
PCIE_P3_USB3_P4_TXP USB3_P4_C1_TX_P (39)
A10
PCIE_P3_USB3_P4_TXN USB3_P4_C1_TX_N (39)
A7
C7 PCIE_P1_TXP PCIe/USB3 H9
PCIE_P1_TXN PCIE_P3_USB3_P4_RXP USB3_P4_C1_RX_P (39) TYPE C PORT 1, sub board
F9
D4 PCIE_P3_USB3_P4_RXN USB3_P4_C1_RX_N (39)
E5 PCIE_P1_RXP C11
PCIE_P1_RXN PCIE_P4_USB3_P3_TXP USB3_P3_A1_TX_P (39)
B11
C9 PCIE_P4_USB3_P3_TXN USB3_P3_A1_TX_N (39)
PCIE_P2_TXP TYPE A PORT 1, sub board
B9
PCIE_P2_TXN PCIE_P4_USB3_P3_RXP
D11
USB3_P3_A1_RX_P (39) IF YOU KEEP CAPS ON THE MLB FOR TYPE-A AND TYPE-C TX LINES
F11 MAKE SURE TO REMOVE THEM FROM THE DAUGHTERBOARD
PCIE_P4_USB3_P3_RXN USB3_P3_A1_RX_N (39)
E7
F6 PCIE_P2_RXP B13 USB3_P2_TX_C_P C365 [email protected]/10V_2
PCIE_P2_RXN PCIE_P5_USB3_P2_TXP C13 USB3_P2_TX_C_N USB3_P2_WCAM_TX_P (40)
C410 [email protected]/10V_2
PCIE_CLKREQ0_ODL PCIE_P5_USB3_P2_TXN USB3_P2_WCAM_TX_N (40)
TP157
TP145 PCIE_CLKREQ1_ODL F13 AR WFC
PCIE_CLKREQ2_ODL PCIE_P5_USB3_P2_RXP USB3_P2_WCAM_RX_P (40)
TP171 D13
PCIE_P5_USB3_P2_RXN USB3_P2_WCAM_RX_N (40)
A46
C45 PCIE_CLKREQ0 C5 R3 100_1%_2
B45 PCIE_CLKREQ1 PCIE2_USB3_SATA3_RCOMP C6
WLAN_PCIE_CLKREQ_ODL C44 PCIE_CLKREQ2 PCIE2_USB3_SATA3_RCOMP_P
PCIE_CLKREQ3
1.8V/3.3V
F47 AA10
(28) WIFI_DISABLE_L PCIE_WAKE0 NC1
D47 AA8
(38) LTE_WAKE_L PCIE_WAKE1 NC2
C F45 C
TP164 WLAN_PCIE_WAKE_ODL D50 PCIE_WAKE2 W13
PCIE_WAKE3 SSIC NC5 W12
NC4
3V3 IO TOLERANT
U15
SATA NC3

J3 U7
SATA_P0_TXP USB2_DP0 USB2_P0_C0_P (31)
J2 U5 TYPE C PORT 0
SATA_P0_TXN USB2_DN0 USB2_P0_C0_N (31)
J7 N2
SATA_P0_RXP USB2_DP1 USB2_P1_A0_P (30)
J5 N3 USB2_P1_A0_N (30) TYPE A PORT 0
SATA_P0_RXN USB2_DN1
L2
USB2_DP2 USB2_P2_BT_P (28)
L3 USB2_P2_BT_N (28) WIFI-BT
USB2_DN2
R13 USB2_P3_A1_P (39)
USB2_DP3 R15
USB2
USB2_DN3 USB2_P3_A1_N (39) TYPE A PORT 1
M1 USB2_P4_C1_P (39)
USB2_DP4 M3
USB2_DN4 USB2_P4_C1_N (39) TYPE C PORT 1
R2
USB2_DP5 USB2_P5_SD_P (23)
R3 USB-USD CARD
USB2_DN5 USB2_P5_SD_N (23)
P1 PP1800_SOC_A
USB2_DP6 USB2_P6_UCAM_P (26)
P3 USB2_P6_UCAM_N (26) CAMERA UFC
USB2_DN6
U8
USB2_DP7 USB2_P7_WCAM_P (26)
U10 USB2_P7_WCAM_N (26) CAMERA WFC R9093
USB2_DN7 100K_5%_2
U12 USB2_RCOMP R9 113_1%_2
USB2_RCOMP
V1 USB_OTG_ID_HOSTORSLAVE R747 *Short_0201
USB2_DUALROLE V3 USB_OTG
USB2_VBUS_SNS U54
USB2_OC0
1.8V U53 1226_Q_added DNS 10pF on USB_A0_OC_ODL for
B USB2_OC1 B
PPVAR_VBUS_IN noise coupling
C110Q *10p/25V_2
4 OF 13

R331 *Short_0201
USB_A0_OC_ODL (30)
USB_A_OC_ODL R332 *Short_0201
USB_A1_OC_ODL (39)
USB_C_OC_ODL R326 *Short_0201
USB_C_OC (18)
INTERNAL PULL-UP R329 *0_5%_2 USB_C1_OC_ODL
PP1800_SOC_A PP3300_WLAN_DX
(NGF)

R10

10K_1%_2
2

WLAN_PCIE_CLKREQ_ODL 1 6 3 4
WLAN_PCIE_CLKREQ_3V3_ODL (28)

Q1B Q1A
*PMDXB600UNE *PMDXB600UNE

PP1800_SOC_A PP3300_WLAN_DX

0107_Q_DNS Q1,Q2 since pin53, pin55 of M.2 are


not used in Jefferson peak 9560
A A

R11

10K_1%_2
2

WLAN_PCIE_WAKE_ODL 1 6 3 4
WLAN_PCIE_WAKE_3V3_ODL (28)

Q2B
*PMDXB600UNE
Q2A
*PMDXB600UNE
Quanta Computer Inc.
AVOIDS ANY LEAKAGE WITHOUT SOFTWARE EFFORTS PROJECT : ZBA/ZBB
Size Document Number Rev
1A
SOC PCIE/USB/SATA
Date: Friday, May 31, 2019 Sheet 8 of 45
5 4 3 2 1
5 4 3 2 1

Gemini lake (EMMC/LPC/I2C/GPIO/HDA)


(CPU)
(MIC) DMIC_CLK1 (26) TP66

I2S0_SCLK_R PCH_SLP_S0_L (11,33)


R281 20_1%_2
(18) EC_I2S_SCLK
R295 20_1%_2 I2S0_SFRM_R Q40
(18) EC_I2S_SFRM

1
D D

R298 20_1%_2 I2S0_PCH_RX


(18) EC_I2S_TX_PCH_RX DMIC_CLK1_R R300 20_1%_2

2
DMIC_CLK1_G (26)
C571 C572 C573

2.2p/25V_2 2.2p/25V_2 2.2p/25V_2


WOV PMZ370UNE

R173 *0_5%_2

DMIC_DATA_R R317 20_1%_2


DMIC_DATA (26)

PP1800_SOC_A

R407 R187 R283 R358 R363


20K_1%_2 *20K_1%_2 *20K_1%_2 *20K_1%_2 *20K_1%_2

ESPI_CS_L
ESPI_IO0
ESPI_IO1
ESPI_IO2
(CPU) ESPI_IO3
U4J ESPI_CLK

C TP70 C26 L29 C


AVS_I2S0_MCLK RSVD6
TO-EC TP53 I2S0_SCLK_R B25 RSVD
TP54 I2S0_SFRM_R C25 AVS_I2S0_BCLK M29 R365
TP57 I2S0_PCH_RX C24 AVS_I2S0_WS_SYNC RSVD5 P29 20K_1%_2
TP59 I2S0_PCH_TX B23 AVS_I2S0_SDI RSVD7 M27
AVS_I2S0_SDO AUDIO-AVS RSVD8 P27
RSVD9
(38) LTE_OFF_ODL
M23
AVS_I2S1_MCLK
RSVD RSVD3
L27

SPEAKER AMP (24) I2S_SCLK_SPKR


(24) I2S_SFRM_SPKR
L21
J21
M21
AVS_I2S1_BCLK
AVS_I2S1_WS_SYNC
RSVD4
RSVD2
L25
P25
L23
native SD card support dropped
(28) WLAN_PE_RST AVS_I2S1_SDI RSVD10
(24) I2S_PCH_TX_SPKR_RX P23 1.8V
AVS_I2S1_SDO J25 ESPI_CLK_R R285 33_5%_2 ESPI_CLK
I2S2_SCLK_R RSVD1 ESPI_CLK (18)
(24) I2S_SCLK_HP R32 20_1%_2 A22
R33 20_1%_2 I2S2_SFRM_R C23 AVS_HDA_BCLK
(24) I2S_SFRM_HP AVS_HDA_WS_SYNC
HEADPHONE R36 20_1%_2 I2S2_PCH_RX B21
(24) I2S_PCH_RX_HP_TX I2S2_PCH_TX AVS_HDA_SDI
(24) I2S_PCH_TX_HP_RX R37 20_1%_2 C22 C37
R40 20_1%_2 I2S2_MCLK_R C21 AVS_HDA_SDO LPC_CLKOUT0 A38 R67 *33_5%_2
(24) I2S_MCLK_HP AVS_HDA_RST LPC_CLKOUT1
TP51 DMIC_CLK1_R B19 LPC/eSPI A34 ESPI_IO0_R R71 33_5%_2 ESPI_IO0
DMIC_CLK2_R C20 AVS_DMIC_CLK_A1 LPC_AD0 C34 ESPI_IO1_R ESPI_IO1 ESPI_IO0 (18)
R189 33_1%_2 R73 33_5%_2
(26,40) DMIC_CLK2 AVS_DMIC_CLK_B1 LPC set 3.3V LPC_AD1 ESPI_IO1 (18)
TO-EC
DMIC'S R282 4.7K_5%_2
TP52
TP61
DMIC_DATA_R
TP_GPIO_174
C19
C18
A18
AVS_DMIC_DATA_1
AVS_DMIC_CLK_AB2
1.8V/3.3V
LPC_AD2
LPC_AD3
B35
C35
ESPI_IO2_R
ESPI_IO3_R
R74
R76
33_5%_2
33_5%_2
ESPI_IO2
ESPI_IO3 ESPI_IO2
ESPI_IO3
(18)
(18)
PP1800_SOC_A AVS_DMIC_DATA_2 C33 R90 *33_5%_2
(40) DMIC_CAM2_DATA LPC_CLKRUN B33 ESPI_CS_L_R ESPI_CS_L
R93 33_5%_2
LPC_FRAME ESPI_RESET_L_R ESPI_CS_L (18)
TP44 J13 B37 R128 33_5%_2
(23) EMMC_CLK L15 EMMC_CLK LPC_SERIRQ ESPI_RESET_L (18)
(23) EMMC_RCLK TP41
EMMC_RCLK
M19
(23) EMMC_DAT0 EMMC_D0 PCH_SPI_CLK_R
H19 B29 R591 33_5%_2
(23) EMMC_DAT1 EMMC_D1 FST_SPI_CLK PCH_SPI_CLK (19)
R590 (23) EMMC_DAT2 TP42 J19 R198
100K_1%_6 P17 EMMC_D2 B31 PCH_SPI_MOSI_R R592 33_5%_2 100K_1%_6
(23) EMMC_DAT3 EMMC_D3 FST_SPI_MOSI_IO0 PCH_SPI_MISO PCH_SPI_MOSI (19)
(23) EMMC_DAT4 P19 C30 R593 33_5%_2
EMMC_D4 FST_SPI_MISO_IO1 PCH_SPI_MISO_R (19)
J15 eMMC FAST_SPI 1.8V A30 R640 *33_5%_2
(23)
(23)
EMMC_DAT5
EMMC_DAT6
L17
M17
EMMC_D5
EMMC_D6
1.8V FST_SPI_IO2
FST_SPI_IO3
C29 R642 *33_5%_2 TO-FLASH
(23) EMMC_DAT7 EMMC_D7 PCH_SPI_CS0_L_R
TP43 M13 C31 R643 33_5%_2
(23) EMMC_CMD EMMC_CMD FST_SPI_CS0 SPK_PA_EN_R PCH_SPI_CS0_L (19)
C32 R644 33_5%_2
B FST_SPI_CS1 SPK_PA_EN (24) B
U44
(23) EMMC_RST_ODL TP_EN_PP3300_EMMC EMMC_RST
G51
EMMC_PWR_EN
TP30 RCOMP_EMMC0 L13 1.8V/3.3V
EMMC_RCOMP
TEST POINTS ON EMMC CLOSE TO SOC
R284
7 OF 13
200_1%_2

A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
No extermal PU/PD on GPIO_174, using internal PD for setting VDD2 to 1.2v (GPIO_174) Size Document Number Rev
1A
R282 is for strapping high to enable eSPI mode (GPIO_175)
SOC AUDIO/EMMC/LPC/SPI
Date: Friday, May 31, 2019 Sheet 9 of 45
5 4 3 2 1
5 4 3 2 1

PP1800_SOC_A

(CPU)
MODE SELECTION: PULL HI =1.8V
R395 R660 R312
2.2K_1%_2 4.7K_5%_2 2.2K_1%_2 PP1800_SOC_A

I2C MAY BE PROBLEM IF THE I2C PULL-UP VOLTAGE IS TURNED OFF WHEN DEVICE IS OFF.
R396 R661 R313
2.2K_1%_2 4.7K_5%_2 2.2K_1%_2 R438
U4I
4.7K_5%_2
PCH_I2C_PEN_SCL U49 M39
PCH_I2C_PEN_SDA SIO_I2C0_SCL SIO_SPI_0_CLK H1_SLAVE_SPI_CLK_R (21)
U51 LPSS_SPI
D SIO_I2C0_SDA J37 D
LPSS_I2C SIO_SPI_0_TXD H1_SLAVE_SPI_MOSI_R (21)
U46 L39
(38) PCH_I2C_P_SENSOR_SCL SIO_I2C1_SCL SIO_SPI_0_RXD H1_SLAVE_SPI_MISO (21)
(38) PCH_I2C_P_SENSOR_SDA U48 L37 H1_SLAVE_SPI_CS_L_R (21)
SIO_I2C1_SDA SIO_SPI_0_FS0 J39 R239 *33_5%_2
SIO_SPI_0_FS1 GPIO_81_DEBUG (12) TP64
TP77 AA39
SIO_I2C2_SCL
TP78 AA41
SIO_I2C2_SDA
1.8V SIO_SPI_2_CLK
M37
1.8V
(20) DBG_PCH_I2C_SCL R44 M33 R230 *33_5%_2 TP50 R23
R43 SIO_I2C3_SCL SIO_SPI_2_TXD P35 3.3K_1%_2
(20) DBG_PCH_I2C_SDA SIO_I2C3_SDA SIO_SPI_2_RXD TP62
P33 R231 *33_5%_2 TP63
R49 SIO_SPI_2_FS0 P37
(21) PCH_I2C_H1_SCL SIO_I2C4_SCL SIO_SPI_2_FS1 TP_PCH_GPIO_87_PD_DURING_RSMRST TP47
R51 L35
(21) PCH_I2C_H1_SDA SIO_I2C4_SDA SIO_SPI_2_FS2 TP36
PCH_I2C_AUDIO_SCL_Q C50
PCH_I2C_AUDIO_SDA_Q A50 SIO_I2C5_SCL
SIO_I2C5_SDA
PCH_I2C_TRACKPAD_SCL C48
SIO_I2C6_SCL
PCH_I2C_TRACKPAD_SDA C47 1.8V/3.3V N54 R327 *Short_0201 PCHTX_MIPI60RX_UART
PCHTX_MIPI60RX_UART (20)
SIO_I2C6_SDA SIO_UART0_TXD P53 R328 *Short_0201 PCHRX_MIPI60TX_UART
PCH_I2C_TOUCHSCREEN_SCL SIO_UART0_RXD PCHRX_MIPI60TX_UART (20)
B47 N53 TP48 H1_PCH_INT_ODL (21)
PCH_I2C_TOUCHSCREEN_SDA C46 SIO_I2C7_SCL SIO_UART0_RTS M55
SIO_I2C7_SDA SIO_UART0_CTS
1.8V GPIO65 USED FOR DNXMODE WITH PULL-UP R311 *4.7K_5%_2
PP1800_SOC_A
R5 10K_1%_2 TP_SMB_ALERT_N A26 L54 PCHTX_UART2
PP1800_SOC_A TP_PCH_SMB_CLK SMB_ALERT SIO_UART2_TXD PCHRX_UART2
TP160 B27
SMB_CLK
1.8V/3.3V SIO_UART2_RXD
M53
TP161 C27 LPSS SMBus K53
(35) EN_PP3300_WLAN_L SMB_DATA SIO_UART2_RTS TP1
L53
PP1800_SOC_A SMBUS set 3.3V SIO_UART2_CTS EN_PP3300_DX_LTE_SOC (38)

H29 R336 *Short_0201


(28) CNVI_CLK_PCH_RX_WLAN_TX_P CNV_WGR_CLK_P PCHTX_SERVORX_UART (21,22)
R573 (28) CNVI_CLK_PCH_RX_WLAN_TX_N H31
CNV_WGR_CLK R337 *0_5%_2 PCHTX_MIPI60RX_UART
20K_1%_2
M31
(28) CNVI_D0_PCH_RX_WLAN_TX_P CNV_WGR_D0_P LPSS_UART
(28) CNVI_D0_PCH_RX_WLAN_TX_N P31
CNV_WGR_D0 R338 *Short_0201
CNVI_BRI_DT_R PCHRX_SERVOTX_UART (21,22)
R574 33_1%_2 D29
CNVI_BRI_DT (28) (28) CNVI_D1_PCH_RX_WLAN_TX_P CNV_WGR_D1_P PCHRX_MIPI60TX_UART
F29 R342 *0_5%_2
CNVI_RGI_DT_R (28) CNVI_D1_PCH_RX_WLAN_TX_N CNV_WGR_D1 CNVI
R575 33_1%_2
CNVI_RGI_DT (28)
C F35 C
(28) CNVI_CLK_PCH_TX_WLAN_RX_P D35 CNV_WT_CLK_P
(28) CNVI_CLK_PCH_TX_WLAN_RX_N CNV_WT_CLK
J35
(28) CNVI_D0_PCH_TX_WLAN_RX_P H35 CNV_WT_D0_P
(28) CNVI_D0_PCH_TX_WLAN_RX_N CNV_WT_D0
L31
(28) CNVI_D1_PCH_TX_WLAN_RX_P CNV_WT_D1_P
J31
(28) CNVI_D1_PCH_TX_WLAN_RX_N CNV_WT_D1
J29
(28) WLAN_CLKOUT_LCP
F19 CLKIN_XTAL_LCP
(28) WLAN_CLKREQ0 XTAL_CLKREQ
R717 CNVI_BRI_DT_R H17
(28) CNVI_BRI_RSP
CNVI_BRI_RSP J17 CNV_BRI_DT
CNV_BRI_RSP
(ADO)
10K_1%_2 CNVI_RGI_DT_R D19 1.8V
CNVI_RGI_RSP D17 CNV_RGI_DT
(28) CNVI_RGI_RSP CNVI_RF_RESET_L F17 CNV_RGI_RSP
(28) CNVI_RF_RESET_L CNV_RF_RESET
Close To SoC R6 150_1%_2 CNVI_WT_RCOMP F33 PCH_I2C_AUDIO_SCL_Q R8Q *Short_0201
CNV_WT_RCOMP PCH_I2C_AUDIO_SCL (24)
PCH_I2C_AUDIO_SDA_Q R9Q *Short_0201
PCH_I2C_AUDIO_SDA (24)
PP1800_SOC_A
6 OF 13

R422 *20K_1%_2 CNVI_RGI_RSP PLACEMENMT OF THE LEVEL SHIFTERS AND PULL-UPS DON'T NEED TO BE NEAR AP
R287 *20K_1%_2 CNVI_BRI_RSP

B CNVI_RF_RESET_L B
R1132 75K_1%_4
(PEN)

(TSN) PP1800_SOC_A PP3300_TRACKPAD_DX PP1800_SOC_A PP1800_PEN_DX


(TPD)
PP1800_SOC_A PP3300_TOUCHSCREEN_DX

R638 R110
R100 2.2K_1%_2 R555 2.2K_1%_2 R155
2.2K_1%_2 R104 1.5K_5%_2 [email protected]_5%_2
[email protected]_5%_2
2

5
PCH_I2C_TOUCHSCREEN_SCL 1 6 3 4 PCH_I2C_TRACKPAD_SCL 1 6 3 4 PCH_I2C_PEN_SCL 3 4
PCH_I2C_TOUCHSCREEN_3V3_SCL (26) PCH_I2C_TRACKPAD_3V3_SCL (25) PCH_I2C_PEN_1V8_SCL (25)
Q35A PEN@PMDXB600UNE
Q11B Q11A Q14B Q14A R4Q *PEN@0_5%_2
TN@PMDXB600UNE TN@PMDXB600UNE PMDXB600UNE PMDXB600UNE
PP1800_SOC_A
PP3300_TRACKPAD_DX PP1800_SOC_A PP1800_PEN_DX
PP1800_SOC_A PP3300_TOUCHSCREEN_DX

R554 R143
2.2K_1%_2 R556 2.2K_1%_2 R160
R101 1.5K_5%_2 [email protected]_5%_2
2.2K_1%_2 R105
2

2
[email protected]_5%_2
2

A PCH_I2C_TRACKPAD_SDA 1 6 3 4 PCH_I2C_PEN_SDA 6 1 A
PCH_I2C_TOUCHSCREEN_SDA 1 6 3 4 PCH_I2C_TRACKPAD_3V3_SDA (25) PCH_I2C_PEN_1V8_SDA (25)
Q35B PEN@PMDXB600UNE
PCH_I2C_TOUCHSCREEN_3V3_SDA (26)
Q15B Q15A R5Q *PEN@0_5%_2
Q30B Q30A PMDXB600UNE PMDXB600UNE
TN@PMDXB600UNE TN@PMDXB600UNE

Quanta Computer Inc.


R23 is for strapping low boot from SPI (GPIO_84) PROJECT : ZBA/ZBB
R438 is for strapping high to set LPC to 1.8V mode (GPIO_83) Size Document Number Rev
1A
R311 is reserved for strapping high to force DNX FW load(GPIO_65)
SOC I2C/CNVI/UART/SPI
Date: Friday, May 31, 2019 Sheet 10 of 45
5 4 3 2 1
5 4 3 2 1

PP1800_SOC_A
(CPU)

R371 R376 R382 R399

100K_5%_2 *100K_5%_2 100K_5%_2 *100K_5%_2 SEL BOM: 9H03280012


DRAM_ID0 DRAM_ID3 PCH_RTC_X2
Quanta suggested 20ppm/12.5pF
DRAM_ID1 DRAM_ID2

R373 R378 R385 R402 X2 32.768KHZ/20ppm/12.5pF


PP3300_RTC PCH_RTC_X1 1 2
*100K_5%_2 100K_5%_2 *100K_5%_2 100K_5%_2
D D
9H03200031
U4E
Gemini lake (PMU/PMIC/RTC) R45 10M_1%_2
PP3300_SOC_A R46 B17 TXC/9H03200031
(33) PCH_PMIC_I2C_SCL PMC_I2C_SCL OSC_CLK_OUT_0 EC_IN_RW_OD (21)
(33) PCH_PMIC_I2C_SDA
R48
PMC_I2C_SDA
1.8V OSC_CLK_OUT_1
C17
PCH_WP_OD (19) R8 C2
2nd source: C3
U2 PCH_OSCIN 100K_5%_2 18p/25V_2 18p/25V_2
TP_AP_PMC_SPI_CLK L48 iCLK OSCIN T1 PCH_OSCOUT EPSON/FC-135
DRAM_ID0 N48 PMC_SPI_CLK OSCOUT
PMC_SPI_FS0
DRAM_ID1 N44 1.8V D23 PCH_RTC_X1
DRAM_ID2 L49 PMC_SPI_FS1 RTC_X1 F23 PCH_RTC_X2
R557 R276 DRAM_ID3 L51 PMC_SPI_FS2 RTC RTC_X2 J23 RTC_EXPAD
TP_AP_PMC_SPI_TX N49 PMC_SPI_RXD VCC_RTC_EXTPAD H25 INTRUDER
100K_5%_2 100K_5%_2 PMC_SPI_TXD PMC INTRUDER D25 EC_PCH_PWROK
RTC is 3.3V SOC_PWROK F27 PCH_RSMRST_L EC_PCH_PWROK
PCH_RSMRST_L
(18)
(12,18) C360
PP1050_VCCRAM_S PLT_RST_L D54 RSM_RST F25 PCH_RTEST_ODL 0.1u/10V_2
(12,18,21,23,28) PLT_RST_L PMU_PLTRST RTC_TEST PCH_RTCRST_ODL
E54 D27
(12,18) EC_PCH_PWR_BTN_ODL
(9,33) PCH_SLP_S0_L
PCH_SLP_S0_L C52 PMU_PWRBTN PMU set 3.3V RTC_RST
PCH_SLP_S3_L D51 PMU_SLP_S0 J53
(33) PCH_SLP_S3_L PMU_SLP_S3 THERMTRIP THERMTRIP_L (33)
(33) PCH_SLP_S4_L
PCH_SLP_S4_L J49
PMU_SLP_S4 1.8V 1.8V
PROCHOT
J54 PCH_PROCHOT_ODL (18,37) SEL BOM: CS325-19.200MABJ-UT
(18) SUSPWRDNACK SUSPWRDNACK
PMU_BATLOW_L
F54
SUSPWRDNACK Thermal NC3
AG43 R735
PCH_OSCOUT
Quanta suggested 20ppm/12pF
J48 H53 *Short_0201
PMU_BATLOW NC15
R56 R58 R63 (12,18,21,22) SYS_RST_ODL C51 1.8V/3.3V AG44 R46
*68_1%_2 *169_1%_4 *84.5_1%_4 G49 PMU_RSTBTN PMU NC4 H55 100K_5%_2 X3
(28) PCH_SUSCLK PMU_SUSCLK NC16
(28) BT_DISABLE_L E52 19.2MHZ/20ppm1/12pF
SUS_STAT A4 PCH_OSCIN 1 3
TP81 TP_PCH_GPIO_78 F55 NC1 BH1 2 4
SVID0_CLK NC5
TP82 TP_PCH_GPIO_77 G53 1.05V SVID A53
TP83 TP_PCH_GPIO_76 G54 SVID0_DATA Spare SKTOCC F37
SVID0_ALERT NC14
NC6
BL2 7V19200001
TP87 DEBUG_OBS_PORT_A0 D1 BL3
TP88 DEBUG_OBS_PORT_A1 D2 DEBUG_PORT_A0 Misc NC7 BL53 R722 200K_1%_2
A54 DEBUG_PORT_A1 NC8 C2
NC2 NC9
C54
NC11 NC10
C3 TXC/7V19200001
R41 C1 C4
NC17 15p/25V_2
2nd source: 15p/25V_2
Hosonic/E3FB19E0X0008E
C 8 OF 13 Interquip/5YEA19200122SF50Q2 C

PP3300_A PLT_RST_L

R190 R191 R120Q C120Q


100K_1%_2 1K_1%_2 *100K_1%_2 *1u/6.3V_2
PP3300_A
3

Q56 Q57 0109_Q_added DNS resistor/cap on R508


PCH_SLP_S3_L 2 SLP_S3 2 PLT_RST_L for potential issue 499K_1%_2
PJE138K PJE138K
PCH_RSMRST_OD
1

PCH_RSMRST_L

3
PCH_RSMRST_L 2 Q80 C447
PJE138K
*1u/6.3V_2
R587

1
100K_1%_2
B B

CHECK RTCRST SIGNAL


PP3300_RTC
PP3300_RTC
CHECK RTCRST SIGNAL
R740
20K_1%_2 PCH_RSMRST_OD PCH_RSMRST_OD PCH_RSMRST_OD

R50 PCH_RTEST_ODL
20K_1%_2
1

1
3

PCH_RTCRST_ODL EC_PCH_RTCRST 2 PCH_SLP_S0_L 2 3 SLP_S0_L PCH_SLP_S3_L 2 3 SLP_S3_L PCH_SLP_S4_L 2 3 SLP_S4_L


(18) EC_PCH_RTCRST SLP_S0_L (18) SLP_S3_L (18,35) SLP_S4_L (18,35)
Q86
3

Q7 PJE138K C582 Q79 Q81 Q82


EC_PCH_RTCRST 2 1u/25V_4 PMZB670UPE PMZB670UPE PMZB670UPE
1

PJE138K R739 R507 R509 R510


C5 100K_1%_2 499K_1%_2 499K_1%_2 499K_1%_2
1u/25V_4
1

R516 *0_5%_2 R517 *0_5%_2 R518 *0_5%_2

A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
SOC PMU/RTC/SVID/THERMAL/MISC
Date: Friday, May 31, 2019 Sheet 11 of 45
5 4 3 2 1
5 4 3 2 1
LAYOUT NOTE: PLACE THE R62, 65, 55, 57, R393 WITHIN 1" OF J5 MIPI60 CONNECTOR.
(CPU) PP1800_SOC_A

U4H

R65 R393 R62 AG53


JTAG GPIO_8 DBG_PTI_CLK0 (20)
51_1%_2 150_1%_2 51_1%_2 AG54
GPIO_9 AE54 DBG_PTI_DATA_0 (20)
TP_GPIO5 GPIO_10 DBG_PTI_DATA_1 (20)
AH53 AE53
AM53 JTAGX GPIO_11 AD55 DBG_PTI_DATA_2 (20)
(20) TCK JTAG_TCK GPIO_12 DBG_PTI_DATA_3 (20)
AJ54 AD53
(20) TDI JTAG_TDI GPIO_13 DBG_PTI_DATA_4 (20)
AL53 AC54
(20) TDO AL54 JTAG_TDO GPIO_14 AC53 DBG_PTI_DATA_5 (20)
(20) TMS JTAG_TMS GPIO_15 DBG_PTI_DATA_6 (20)
AK53 AB53
(20) TRST_L JTAG_TRST GPIO_16 DBG_PTI_DATA_7 (20)
PP1800_SOC_A 1.8V AA49
D GPIO_17 DBG_PTI_CLK1 (20) D
ITP AC48
GPIO_18 AC46 DBG_PTI_DATA_8 (20)
GPIO_19 DBG_PTI_DATA_9 (20)
AE51
AH55 GPIO_20 AE49 CNVI_MFUART2_RXD_PTI_11 DBG_PTI_DATA_10 (20)
R57 R55 R397 R394 AJ53 JTAG_PRDY GPIO_21 AC51 CNVI_MFUART2_TXD_PTI_12
*51_1%_2 51_1%_2 150_1%_2 51_1%_2 JTAG_PREQ GPIO_22 AC49 CNVI_GNSS_PA_BLANKING_PTI_13
GPIO_23 AA51
GPIO_24 DBG_PTI_DATA_14 (20)
AA46
GPIO_25 DBG_PTI_DATA_15 (20)
(20) CX_PRDY_L
AE41
(20) CX_PREQ_L GPIO_26 DBG_PTI_CLK2 (20)
AE39
GPIO_27 AE46 DBG_PTI_DATA_16 (20)
GPIO_28 DBG_PTI_DATA_17 (20)
AE44
PP1800_A PP3300_A GPIO_29 AC41 DBG_PTI_DATA_18 (20)
GPIO_30 DBG_PTI_DATA_19 (20)
1.8V AC39
DBG_PTI_DATA_20 (20)
GPIO_31 AC44
GPIO_32 AC43 DBG_PTI_DATA_21 (20)
GPIO_33 DBG_PTI_DATA_22 (20)
AA44
GPIO_34 DBG_PTI_DATA_23 (20)
R391,R392,R341,R352 can't be
R380 AA54
un-stuffed in MP even if removing R391 R392 GPIO_35 AA53
DCI_CLK_PTICLK3 (20)
debugging related stuffs from MP *4.7K_5%_2 1K_5%_2 1K_5%_2 GPIO_36 Y55 DCI_DATA_PTITRACE3_0 (20)
GPIO_37 DBG_PTI_DATA_TRACE3_1 (20)
Y53
GPIO_38 W54 DBG_PTI_DATA_TRACE3_3 DBG_PTI_DATA_TRACE3_2 (20)
R340 1K_5%_2 GPIO_39 W53 DBG_PTI_DATA_TRACE3_4
(10) GPIO_81_DEBUG BOOT_HALT_L (20) GPIO_40 DBG_PTI_DATA_TRACE3_5
V53
GPIO_41
L46
GPIO_105 H45 EC_AP_INT_ODL TOUCHSCREEN_RST (26)
(11,18,21,22) SYS_RST_ODL R341 *Short_0201
DBG_PMU_RSTBTN_L (20) GPIO_134 TRACKPAD_INT1_1V8_ODL EC_AP_INT_ODL (18)
H47 TP65
GPIO_135 L43 PMIC_PCH_INT_1V8_ODL
GPIO_136 M43 C85Q *10p/25V_2
GPIO_137 HP_INT_ODL (24)
(11,18) EC_PCH_PWR_BTN_ODL R352 *Short_0201 H37
DBG_PMU_PWRBTN_L (20) GPIO_138 PEN_PDCT_ODL (25) PP1800_SOC_A
1.8V/3.3V GPIO_139
H43
PEN_INT_ODL (25)
J43
GPIO_140 EC_PCH_WAKE_1V8_ODL PEN_RESET (25)
R361 1K_5%_2 D43
(11,18,21,23,28) PLT_RST_L DBG_PMU_PLTRST_L (20) GPIO_141 TRACKPAD_INT2_1V8_ODL
F43
GPIO_142 H41 R289 100K_5%_2
C C
GPIO_143 F39 PEN_EJECT LTE_SAR_ODL (38)
R379 *1K_5%_2 GPIO_144 L41 PEN_EJECT TP49
(11,18) PCH_RSMRST_L DBG_RSMRST_L (20) GPIO_145 PEN_EJECT (25)
F41 R558 *Short_0201 TP74
GPIO GPIO_146 H27 TP_GPIO210 EN_PP3300_TOUCHSCREEN (25,35)
GPIO_210 EN_PP3300_CAMERA (35)
U43 TP68
GPIO_212 TP_AP_GPIO213 TOUCHSCREEN_INT_ODL (26)
1.8V GPIO_213
U41
U39 TP172
GPIO_214 P_SENSOR_INT_L (38)
TP69
1226_Q_made R289 stuffed for no matter
internal PU is available or not

PEN_EJECT
C86Q *10p/25V_2

5 OF 13

PP1800_SOC_A R524 *Short_0201 TRACKPAD_INT1_1V8_ODL

TRACKPAD_INT_1V8_ODL R531 *Short_0201 TRACKPAD_INT2_1V8_ODL


DBG_PTI_DATA_16 (18,25) TRACKPAD_INT_1V8_ODL
0102_Q_Changed R531 to a short pad
R362
1K_5%_2 R28973
20K_1%_2

R14 *Short_0201
CNVI_GNSS_PA_BLANKING (28)
EC_AP_INT_ODL CNVI_GNSS_PA_BLANKING_PTI_13 R16 *0_5%_2
DBG_PTI_DATA_13 (20)

B B

(PMC) PP1800_SOC_A

R17 *Short_0201
CNVI_MFUART2_RXD (28)
CNVI_MFUART2_RXD_PTI_11 R24 *0_5%_2
DBG_PTI_DATA_11 (20)
R880
10K_2

PMIC_PCH_INT_1V8_ODL R887 *Short_0201


PMIC_PCH_INT_ODL (33)
R25 *Short_0201
CNVI_MFUART2_TXD (28)
CNVI_MFUART2_TXD_PTI_12 R61 *0_5%_2
DBG_PTI_DATA_12 (20)

(CPU) PP1800_SOC_A

R881
*10K_2

EC_PCH_WAKE_1V8_ODL R888 *Short_0201


EC_PCH_WAKE_ODL (18)

A A

R380 is reserved for strapping high (GPIO_81) Quanta Computer Inc.


R877 is for strapping low to not allow eMMC as a boot source (GPIO_27) PROJECT : ZBA/ZBB
No extermal PU/PD on GPIO_28, using internal PD for allowing SPI as a boot source Size Document Number Rev
1A
SOC JTAG/GPIO/ITP
Date: Friday, May 31, 2019 Sheet 12 of 45
5 4 3 2 1
5 4 3 2 1

GLK ULT (GND)


(CPU)

D U4K U4M U4L D


AL23
A3 AF44 AN48 BC11 BJ54 VSS1 J51
A6 VSS6 VSS53 AF45 AN49 VSS_111 VSS_165 BC17 BK1 VSS2 VSS51 K1
A12 VSS13 VSS54 AF47 AN51 VSS_112 VSS_166 BC19 BK17 VSS3 VSS53 K3
A16 VSS1 VSS55 AF48 AN53 VSS_113 VSS_167 BC21 BK21 VSS4 VSS55 K28
A20 VSS2 VSS56 AF50 AP23 VSS_114 VSS_168 BC23 BK35 VSS5 VSS54 K55
A24 VSS3 VSS57 AF52 AP27 VSS_115 VSS_169 BC25 BK39 VSS6 VSS56 L5
A28 VSS4 VSS58 AF53 AP28 VSS_116 VSS_170 BC31 BK55 VSS7 VSS59 L7
A32 VSS5 VSS59 AF55 AP29 VSS_117 VSS_171 BC33 BL5 VSS8 VSS60 L8
A36 VSS7 VSS60 AG20 AP33 VSS_118 VSS_172 BC35 BL8 VSS17 VSS61 L19
A40 VSS8 VSS64 AL21 AP35 VSS_119 VSS_173 BC37 BL10 VSS19 VSS57 L33
A44 VSS9 VSS87 AG25 AR2 VSS_120 VSS_174 BC39 BL14 VSS9 VSS58 M15
A48 VSS10 VSS65 AG29 AR7 VSS_124 VSS_175 BC41 BL24 VSS10 VSS62 M25
A51 VSS11 VSS66 AG35 AR10 VSS_130 VSS_176 BC45 BL28 VSS11 VSS63 M28
AA12 VSS12 VSS67 AG38 AR12 VSS_121 VSS_177 BC51 BL32 VSS12 VSS64 M35
AA13 VSS14 VSS68 AJ8 AR17 VSS_122 VSS_179 BD9 BL42 VSS13 VSS65 M41
AA15 VSS15 VSS77 AJ13 AR39 VSS_123 VSS_187 BD15 BL46 VSS14 VSS66 N12
AA17 VSS16 VSS69 AJ18 AR44 VSS_125 VSS_180 BD19 BL48 VSS15 VSS67 N28
AA21 VSS17 VSS70 AJ25 AR46 VSS_126 VSS_181 BD21 BL51 VSS16 VSS68 N46
AA23 VSS18 VSS71 AJ29 AR49 VSS_127 VSS_182 BD28 C1 VSS18 VSS69 N51
AA25 VSS19 VSS72 AJ36 AR54 VSS_128 VSS_183 BD35 C12 VSS20 VSS70 P21
AA27 VSS20 VSS73 AJ38 AT23 VSS_129 VSS_184 BD37 C16 VSS21 VSS71 P55
AA35 VSS21 VSS74 AJ39 AT33 VSS_131 VSS_185 BD47 C28 VSS22 VSS72 R8
C VSS22 VSS75 VSS_132 VSS_186 VSS23 VSS74 C
AA43 AJ44 AU3 BE3 C36 R28
AA48 VSS23 VSS76 AK1 AU10 VSS_135 VSS_189 BE28 D6 VSS24 VSS73 T27
AB1 VSS24 VSS78 AK3 AU28 VSS_133 VSS_188 BE53 D9 VSS30 VSS75 T38
AB3 VSS25 VSS79 AK55 AU46 VSS_134 VSS_190 BF9 D21 VSS31 VSS77 U13
AB55 VSS26 VSS80 AL3 AU53 VSS_136 VSS_194 BF19 D28 VSS25 VSS78 V27
AC8 VSS27 VSS90 AL7 AV15 VSS_137 VSS_191 BF37 D41 VSS26 VSS80 V38
AC13 VSS33 VSS97 AL8 AV17 VSS_138 VSS_192 BF47 D45 VSS27 VSS81 V55
AC23 VSS28 VSS98 AL10 AV23 VSS_139 VSS_193 BG1 D55 VSS28 VSS82 W2
AC25 VSS29 VSS81 AL12 AV25 VSS_140 VSS_195 BG6 E28 VSS29 VSS84 W3
AC27 VSS30 VSS82 AL13 AV31 VSS_141 VSS_199 BG28 E50 VSS32 VSS85 W5
AC29 VSS31 VSS83 AL15 AV33 VSS_142 VSS_196 BG50 E55 VSS33 VSS93 W7
AE18 VSS32 VSS84 AL17 AV39 VSS_143 VSS_197 BG55 F1VSS34
VSS35 VSS95 W8
AE23 VSS34 VSS85 AL20 AV41 VSS_144 VSS_198 BH11 F4 VSS96 W10
AE25 VSS35 VSS86 AL25 AW2 VSS_145 VSS_200 BH13 F21 VSS38 VSS83 W39
AE27 VSS36 VSS88 AL29 AW5 VSS_147 VSS_201 BH17 VSS36VSS37
F31 VSS86 W41
AE43 VSS37 VSS89 AL39 AW10 VSS_150 VSS_202 BH19 G28 VSS87 W43
AE48 VSS38 VSS91 AL41 AW28 VSS_146 VSS_203 BH23 VSS39 VSS40
H13 VSS88 W44
AF1 VSS39 VSS92 AL43 AW46 VSS_148 VSS_204 BH25 H15 VSS89 W46
AF3 VSS40 VSS93 AL44 AW51 VSS_149 VSS_205 BH28 H21 VSS41 VSS90 W48
AF4 VSS49 VSS94 AL46 AW54 VSS_151 VSS_206 BH31 VSS42 VSS43
H23 VSS91 W49
AF6 VSS50 VSS95 AL51 AY13 VSS_152 VSS_207 BH33 H28 VSS92 W51
AF8 VSS61 VSS96 AM1 AY15 VSS_153 VSS_208 BH37 H33 VSS44 VSS94 Y21
AF9 VSS62 VSS99 AM21 AY28 VSS_154 VSS_209 BH39 H39 VSS45 VSS97 Y23
AF11 VSS63 VSS100 AM23 AY41 VSS_155 VSS_210 BH41 J8 VSS46 VSS98 Y25
B B
AF12 VSS41 VSS101 AM25 AY43 VSS_156 VSS_211 BH45 VSS52VSS47
J27 VSS99 Y27
AF14 VSS42 VSS102 AM29 B2 VSS_157 VSS_212 BJ2 J33 VSS100 Y31
AF16 VSS43 VSS103 AM31 B55 VSS_158 VSS_215 BJ15 VSS48VSS49
J41 VSS101 T3
AF18 VSS44 VSS104 AM38 BA27 VSS_159 VSS_213 BJ19 J45 VSS76 U3
AF23 VSS45 VSS105 AM55 BA29 VSS_160 VSS_214 BJ25 VSS50 VSS79
AF25 VSS46 VSS106 AN3 BB1 VSS_161 VSS_216 BJ28
AF29 VSS47 VSS108 AN8 BB28 VSS_162 VSS_217 BJ31 13 OF 13
AF40 VSS48 VSS110 AN10 BB55 VSS_163 VSS_218 BJ37
AF42 VSS51 VSS107 AN46 BC5 VSS_164 VSS_219 BJ41
VSS52 VSS109 VSS_178 VSS_220
11 OF 13
12 OF 13

A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
SOC GROUND
Date: Friday, May 31, 2019 Sheet 13 of 45
5 4 3 2 1
5 4 3 2 1

SHOULD CONSIDER SPLITTING THE RAILS FOR NOISE ISOLATION Gemini (POWER)
PP1100_VDDQ_SOC
U4G PP1050_VCCRAM_S PPVAR_VCCGI PPVAR_VNN
(CPU) U4F
AP18 AC33
AP21 VDDQ1 VCCRAM_1P053 AC35 AA28 AF35
AP36 VDDQ2 VCCRAM_1P054 AE33 AA29 VCC_VCG1 VNN1 AG27
AP38 VDDQ3 VCCRAM_1P057 AE35 AA31 VCC_VCG2 VNN2 AG28
AT18 VDDQ4 VCCRAM_1P058 AE36 AA33 VCC_VCG3 VNN3 AG36
D AT20 VDDQ5 DDR IO VCCRAM_1P059 AE38 AC28 VCC_VCG4 VNN4 AG46 D
AT21 VDDQ6 VCCRAM_1P0510 AF27 AC31 VCC_VCG5 VNN5 AG48
AT35 VDDQ7 VCCRAM_1P0511 AF28 AE28 VCC_VCG6 VNN6 AJ27
AT36 VDDQ8 3A VCCRAM_1P0512 AF36 AE29 VCC_VCG7 VNN7 AJ28
AT38 VDDQ9 VCCRAM_1P0513 AF38 AE31 VCC_VCG8 4A VNN8 AJ46
BA13 VDDQ10 VCCRAM_1P0514 AF31 VCC_VCG9 VNN9 AJ48
BA15 VDDQ11 AG51 AF33 VCC_VCG10 VNN10 AL27
BA25 VDDQ12
4.5A VCC_1P05_INT2 AG49 AG31 VCC_VCG11 VNN11 AL28
VCC_1P05_INT1 VCC_VCG12 VNN12
BA31 VDDQ13 AG33
VCC_VCG13
GLM+ module, GFx VNN13
AL48
PP1100_VDDQ_IOA BA41 VDDQ14 AJ51 AJ31 AL49
BA43 VDDQ15 VCC_1P05_INT3 AJ33 VCC_VCG14 VNN14 AM27
VDDQ16 AA36 AJ35 VCC_VCG15 VNN15 AM28
AP25 VCCRAM_1P051 AA38 AL31 VCC_VCG16 VNN16
AP31 VCCIOA1 VCCRAM_1P052 AC36 AL33 VCC_VCG17 SA,D-unit,GMM,PCIe,DE,fabrics,
AT25 VCCIOA2 DDR IO logic VCCRAM_1P055 AC38 PP3300_RTC AL35 VCC_VCG18
&USB controllers
AT27 VCCIOA3 VCCRAM_1P056 Y36 AM33 VCC_VCG19
AT28 VCCIOA4 VCCRAM_1P0515 Y38 AM35 VCC_VCG20
PP1800_SOC_A AT29 VCCIOA5 VCCRAM_1P0516 AM36 VCC_VCG21 25A
AT31 VCCIOA6 VCC_VCG22
D31 VCC_VCG23
VCCIOA7 VCCRAM(1.05V) D33 VCC_VCG24 NON CPU Core AON DOMAIN NC1
AJ49 NC_VNNAON TP123
T21 D37
T23 VCC_1P8V_A3 P15 C342 C411 D39 VCC_VCG25
T25 VCC_1P8V_A4
VDD1(1.8V) RTC VCCRTC_3P3V P39 VCC_VCG26
1u/16V_4 1u/16V_4 VCC_VCG27
V 21 VCC_1P8V_A5
VCC_1P8V_A6 P41 VCC_VCG28
23 V VCC_1P8V_A7 AJ21 T28 VCC_VCG29
V25 0.4A VCC_3P3V_A2 PP3300_SOC_A T29
VCC_1P8V_A8 VDD1(1.8V) U17 T31 VCC_VCG30
AJ23 VCC_3P3V_A5 VCC_VCG31
T33 VCC_VCG32 AW44 TP89
AG23 VCC_1P8V_A2 T35 VCC_VCG33 NC2
PP1200_SOC_A VCC_1P8V_A1 T36 BH55 TP90
VCC_VCG34 NC3
VDD2(1.2V) 0.15A V28
VCC_VCG35
AC21 AG21 V29 AG41 PPVAR_VCCGI_SENSE_P
AE20 VDD2_1P2_MPHY1 VCC_3P3V_A1 T18
PP3300_SOC_A 31 V VCC_VCG36
VCC_VCG37 VCC_VCG_SENSE AG39 PPVAR_VCCGI_SENSE_N PPVAR_VCCGI_SENSE_P (33)
PPVAR_VCCGI_SENSE_N (33)
E21 A VDD2_1P2_MPHY2
AF20 VDD2_1P2_MPHY3 VCC_3P3V_A3 T20 33 V VCC_VCG38 VSS_VCG_SENSE
VCC_3P3V_A4 V18 V35 AJ41 PPVAR_VNN_SENSE_P
VCC_3P3V_A6 VCC_VCG39 VNN_SENSE PPVAR_VNN_SENSE_N PPVAR_VNN_SENSE_P (33)
AF21 VDD2_1P2_MPHY4 V20 V36 AJ43
VDD2_1P2_MPHY5 VDD3(3.3V)
VCC_3P3V_A7 Y18 28 Y VCC_VCG40
VCC_VCG41 VNN_VSS_SENSE
C C
VCC_3P3V_A8 Y20 29 Y VCC_VCG42 BL54 TP91
AC18 VCC_3P3V_A9 Y33 NC4
AC20 VDD2_1P2_AUD_ISH1 Y35 VCC_VCG43 Sense
VDD2_1P2_AUD_ISH2 VCC_VCG44
AW12 9 OF 13
VDD2_1P2_DSI_CSI
AL36
3A
AL38 VDD2_1P2_GLM1
AP20 VDD2_1P2_GLM2
VDD2_1P2_GLM4
AM20
VDD2_1P2_GLM3
AL18
AM18 VDD2_1P2_PLL1
VDD2_1P2_PLL2
AA18
AA20 VDD2_1P2_VNNAON1
VDD2_1P2_VNNAON2
AG18
AJ20 VDD2_1P2_USB2
VDD2_1P2_USB3
VDD2(1.2V)
10 OF 13 SHOULD CONSIDER SPLITTING THE RAILS FOR NOISE ISOLATION

PPVAR_VNN

R12 PP1200_A PP1200_SOC_A

100_1%_2
R461 *short92*32
B B
PPVAR_VNN_SENSE_P PP1050_VCCRAM_S
PPVAR_VNN_SENSE_N C298 PP1050_S
0.01u/10V_2
R464 *short92*32

C293 C295 R13 PP1100_VDDQ_SOC


0.01u/10V_2 0.01u/10V_2 100_1%_2 PP1100_VDDQ_S

R465 *short92*32

PLEASE THESE COMPONENTS NEAR THE PMIC FB PINS PPVAR_VCCGI 03/20 Change FP to SHORT92X32

R476
100_1%_2

PPVAR_VCCGI_SENSE_P
PPVAR_VCCGI_SENSE_N C297
0.01u/10V_2

C294 C296 R477


0.01u/10V_2 0.01u/10V_2 100_1%_2

A A

Quanta Computer Inc.


PROJECT :ZBA/ZBB
Size Document Number Rev
1A
SOC POWER
Date: Friday, May 31, 2019 Sheet 14 of 45
5 4 3 2 1
5 4 3 2 1

PP1050_VCCRAM_S: 1uF_0402x10 , 22uF_0603 x3


(CPU) PP1050_VCCRAM_S
PPVAR_VNN PPVAR_VNN PP1050_VCCRAM_S

DECOUPLING VALUES AND NUMBER BASED ON THE REFERENCE DOC


C277 C79 C84
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 C33 C42
C28 C37 C46 C129 C29 C83 C38 C47 C51 1u/6.3V_4 1u/6.3V_4
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
D D

PPVAR_VNN: 5 X 1UF_0402_6.3V, 4 X 22UF_0603_6.3V PP1050_VCCRAM_S PP1050_VCCRAM_S

PPVAR_VCCGI

C80 C85 C419 C88 C34 C43 C437 C57 C61


1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 22u/6.3V_6

C6 C10 C95 C101 C105 C130 C156 C199 C200 C201 C204
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6

PPVAR_VCCGI: 12 X 1UF_0402_6.3V, 8 X 22UF_0603_6.3V, 2 X 0.1UF_0402_16V


PPVAR_VCCGI PP1200_SOC_A PP1200_SOC_A
PPVAR_VCCGI PP1200_SOC_A

C
C144 C440 C493 C496 C441 C494 C497 C499 C
C203 C205 C206 22u/6.3V_6 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 22u/6.3V_6
C9 C94 C99 C104 C115 C155 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6

PP1200_SOC_A
PP1200_SOC_A
PPVAR_VCCGI

C207 C278 C89 C438 C465 C495 C498 C500 C501 C502
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
0.1u/16V_4 0.1u/16V_4

PP1200_SOC_A: 1uF_0402x9 , 22uF_0603 x7


PP1100_VDDQ_SOC PP1100_VDDQ_SOC
EDGE CAP FOR EXPOSED POWER PLANES PP1800_SOC_A: 1uF_0402x4 , 22uF_0603 x1
PP1800_SOC_A

B C31 C40 C322 C327 C334 C335 B


1u/6.3V_4 1u/6.3V_4
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 C97 C100 C98 C102 C106
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6

PP1100_VDDQ_SOC PP1100_VDDQ_SOC
PP3300_SOC_A

PP3300_SOC_A

C30 C39 C52 C56 C60 C64 C67 C69 C332 C333
1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 1u/6.3V_4 1u/6.3V_4 C90
1u/6.3V_4
C414 C416 C417 C418 C432
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6

PP1100_VDDQ_S PP1100_VDDQ_IOA PP3300_SOC_A: 1uF_0402x8 , 22uF_0603 x2


A W1 *short92*32 PP3300_SOC_A A
PP3300_SOC_A

C288 C289 C291 C304 C313 C319


03/20 Change FP to SHORT92X32 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
C91 C92 C103
Quanta Computer Inc.
1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 C107
1u/6.3V_4 PROJECT : ZBA/ZBB
VDDQI: 1uF_0402x8 , 22uF_0603 x10 , 0.1uF_0402x4 Size Document Number
SOC DECOUPLING
Rev
1A

Date: Friday, May 31, 2019 Sheet 15 of 45


5 4 3 2 1
5 4 3 2 1

(OBM)
LPDDR4_SDRAM LPDDR4_SDRAM
U22B U22A
H4 B2 PP1800_DRAM_U F1 P12
(6,16) DDR_0A_CS<0> CS0_A DQ0_A DDR_0A_DQ<7> (6) VDD1_1 VSS#P12
H3 C2 U1 G12
(6,16) DDR_0A_CS<1> CS1_A/NC DQ1_A DDR_0A_DQ<6> (6) VDD1_2 VSS#G12
K5 E2 G4 K11
DNU#K5 DQ2_A DDR_0A_DQ<5> (6) VDD1_3 VSS#K11
F2 T4 P10
DQ3_A DDR_0A_DQ<4> (6) VDD1_4 VSS#P10
F4 G9 G10
DQ4_A DDR_0A_DQ<0> (6) VDD1_5 VSS#G10
H2 E4 T9 K9
(6,16) DDR_0A_CA<0> CA0_A DQ5_A DDR_0A_DQ<3> (6) VDD1_6 VSS#K9
J2 C4 U12 G8 PP1100_VDDQ
(6,16) DDR_0A_CA<1> CA1_A DQ6_A DDR_0A_DQ<1> (6) VDD1_7 VSS#G8
H9 B4 F12 G5
(6,16) DDR_0A_CA<2> CA2_A DQ7_A DDR_0A_DQ<2> (6) VDD1_8 VSS#G5
H10 K4
(6,16) DDR_0A_CA<3> CA3_A VSS#K4
H11 P3
(6,16) DDR_0A_CA<4> CA4_A VSS#P3
J11 B11 PP1100_VDDQ H1 G3
(6,16) DDR_0A_CA<5> CA5_A DQ8_A DDR_0A_DQ<11> (6)
C11 K1 VDD2_1 VSS#G3 K2
DQ9_A DDR_0A_DQ<12> (6)
PP1100_VDDQ G2 E11 N1 VDD2_2 VSS#K2 P1 C234 C235 C236 C238 C240 C242 C404 C405 C244 C246 C407
ODT_CA_A DQ10_A DDR_0A_DQ<13> (6)
F11 R1 VDD2_3 VSS#P1 G1 1u/16V_4 1u/16V_4 1u/16V_4 1u/16V_4 1u/16V_4 1u/16V_4 0.1u/50V_4 0.1u/50V_4 10u/10V_4 10u/10V_4 10u/10V_4
DQ11_A DDR_0A_DQ<14> (6)
J4 F9 K3 VDD2_4 VSS#G1 J1
(6,16) DDR_0A_CKE<0> CKE_A DQ12_A DDR_0A_DQ<8> (6)
J5 E9 N3 VDD2_5 VSS#J1 T1
(6,16) DDR_0A_CKE<1> CKE1_A/NC DQ13_A DDR_0A_DQ<10> (6)
K8 C9 A4 VDD2_6 VSS#T1 N2
DNU#K8 DQ14_A DDR_0A_DQ<15> (6)
AB4 VDD2_7 VSS#N2
D
DQ15_A
B9
DDR_0A_DQ<9> (6)
F5 VDD2_8 VSS#J3
J3
T3 U22 VDDQ caps:1uFx6, 0.1uFx2, 10uFx3 D

J8 H5 VDD2_9 VSS#T3 N4
(6,16) DDR_0A_CLK_P CLK_P_A/CK_t_A
J9 C3 R5 VDD2_10 VSS#N4 T5
(6,16) DDR_0A_CLK_N CLK_N_A/CK_c_A DMI0_A C10 U5 VDD2_11 VSS#T5 T8
DMI1_A F8 VDD2_12 VSS#T8 N9 PP1800_DRAM_U
D3 H8 VDD2_13 VSS#N9 J10
DQS0_t_A DDR_0A_DQS_0_P (6)
E3 R8 VDD2_14 VSS#J10 T10
DQS0_c_A DDR_0A_DQS_0_N (6)
U8 VDD2_15 VSS#T10 N11
D10 A9 VDD2_16 VSS#N11 J12
DQS1_t_A DDR_0A_DQS_1_P (6)
E10 AB9 VDD2_17 VSS#J12 T12
DQS1_c_A DDR_0A_DQS_1_N (6)
K10 VDD2_18 VSS#T12 E1 C237 C239 C241 C243 C245 C406
R4 AA2 N10 VDD2_19 VSS#E1 Y1 1u/16V_4 1u/16V_4 1u/16V_4 1u/16V_4 10u/10V_4 10u/10V_4
(6,16) DDR_0A_CS<0> CS_B DQ0_B DDR_0A_DQ<19> (6)
R3 Y2 H12 VDD2_20 VSS#Y1 W2
(6,16) DDR_0A_CS<1> CS1_B/NC DQ1_B DDR_0A_DQ<16> (6)
N5 V2 K12 VDD2_21 VSS#W2 AB3
DNU#N5 DQ2_B DDR_0A_DQ<17> (6)
U2 N12 VDD2_22 VSS#AB3 W4
DQ3_B DDR_0A_DQ<18> (6)
12 RVDD2_23 VSS#W4
(6,16)
(6,16)
DDR_0A_CA<0>
DDR_0A_CA<1>
2 R
P2
CA0_B
DQ4_B
U4
V4
DDR_0A_DQ<21>
DDR_0A_DQ<22>
(6)
(6)
VDD2_24
VSS#E5
E5
Y5 U22 VDD caps:1uFx4, 10uFx2
R9 CA1_B DQ5_B Y4 VSS#Y5 C8
(6,16) DDR_0A_CA<2> DDR_0A_DQ<23> (6)
R10 CA2_B DQ6_B AA4 PP1100_VDDQ D1 VSS#C8 V8
(6,16) DDR_0A_CA<3> DDR_0A_DQ<20> (6)
R11 CA3_B DQ7_B W1 VDDQ_1 VSS#V8 AB8
(6,16) DDR_0A_CA<4> CA4_B VDDQ_2 VSS#AB8
P11 B3 W9
(6,16) DDR_0A_CA<5> CA5_B VDDQ_3 VSS#W9
AA11 F3 AB10
DQ8_B DDR_0A_DQ<31> (6) VDDQ_4 VSS#AB10
PP1100_VDDQ T2 Y11 U3 W11
ODT_B/ODT_ca_B DQ9_B DDR_0A_DQ<26> (6) VDDQ_5 VSS#W11
V11 AA3 E12
DQ10_B DDR_0A_DQ<28> (6) VDDQ_6 VSS#E12
P4 U11 B5 Y12
(6,16) DDR_0A_CKE<0> CKE_B DQ11_B DDR_0A_DQ<27> (6) VDDQ_7 VSS#Y12
P5 U9 D5 V12
(6,16) DDR_0A_CKE<1> CKE1_B/NC DQ12_B DDR_0A_DQ<30> (6) VDDQ_8 VSS#V12
N8 V9 W5 C12
DNU#N8 DQ13_B DDR_0A_DQ<29> (6) VDDQ_9 VSS#C12
Y9 AA5 D11
DQ14_B DDR_0A_DQ<24> (6) VDDQ_10 VSS#D11
P8 AA9 B8 A10
(6,16) DDR_0A_CLK_P CLK_P_B/CK_t_B DQ15_B DDR_0A_DQ<25> (6) VDDQ_11 VSS#A10
P9 D8 D9
(6,16) DDR_0A_CLK_N CLK_N_B/CK_c_b VDDQ_12 VSS#D9
Y3 W8 Y8
DMI0_B Y10 AA8 VDDQ_13 VSS#Y8 E8
DMI1_B B10 VDDQ_14 VSS#E8 AB5
W3 F10 VDDQ_15 VSS#AB5 V5 PP1100_VDDQ
DQS0_t_B DDR_0A_DQS_2_P (6) VDDQ_16 VSS#V5
V3 U10 C5
DQS0_c_B DDR_0A_DQS_2_N (6) VDDQ_17 VSS#C5
AA10 D4
W10 D12 VDDQ_18 VSS#D4 A3
DQS1_t_B DDR_0A_DQS_3_P (6) VDDQ_19 VSS#A3
V10 W12 D2
DQS1_c_B DDR_0A_DQS_3_N (6) VDDQ_20 VSS#D2 V1
A1 VSS#V1 C1 R272 R273
T11 B1 DNU_1 VSS#C1 240_1%_2 240_1%_2
(6,16) DDR_RST_CH0_L RESET_L/RESET_n DNU_2
AA1
2 OF 2 AB1 DNU_3 A5 DDQ_0A_ZQ<0>
A2 DNU_4 ZQ_a A8 DDQ_0A_ZQ<1>
C
AB2 DNU_5 NC/ZQ1 G11 C
A11 DNU_6 DNU#G11
AB11 DNU_7
A12 DNU_8
B12 DNU_9
AA12 DNU_10
AB12 DNU_11
DNU_12
1 OF 2

LPDDR4_SDRAM LPDDR4_SDRAM
U23B U23A
H4 B2 PP1800_DRAM_U F1 P12
(6,16) DDR_0B_CS<0> CS0_A DQ0_A DDR_0B_DQ<3> (6) VDD1_1 VSS#P12
H3 C2 U1 G12
(6,16) DDR_0B_CS<1> CS1_A/NC DQ1_A DDR_0B_DQ<0> (6) VDD1_2 VSS#G12
K5 E2 G4 K11
DNU#K5 DQ2_A DDR_0B_DQ<2> (6) VDD1_3 VSS#K11
F2 T4 P10
DQ3_A DDR_0B_DQ<1> (6) VDD1_4 VSS#P10
F4 G9 G10
DQ4_A DDR_0B_DQ<5> (6) VDD1_5 VSS#G10
H2 E4 T9 K9
(6,16) DDR_0B_CA<0> CA0_A DQ5_A DDR_0B_DQ<4> (6) VDD1_6 VSS#K9
J2 C4 U12 G8
(6,16) DDR_0B_CA<1> CA1_A DQ6_A DDR_0B_DQ<6> (6) VDD1_7 VSS#G8
H9 B4 F12 G5
(6,16) DDR_0B_CA<2> CA2_A DQ7_A DDR_0B_DQ<7> (6) VDD1_8 VSS#G5
H10 K4 PP1100_VDDQ
(6,16) DDR_0B_CA<3> CA3_A VSS#K4
H11 P3
(6,16) DDR_0B_CA<4> CA4_A VSS#P3
J11 B11 PP1100_VDDQ H1 G3
(6,16) DDR_0B_CA<5> CA5_A DQ8_A DDR_0B_DQ<12> (6) VDD2_1 VSS#G3
C11 K1 K2
DQ9_A DDR_0B_DQ<13> (6) VDD2_2 VSS#K2
PP1100_VDDQ G2 E11 N1 P1
ODT_CA_A DQ10_A DDR_0B_DQ<15> (6) VDD2_3 VSS#P1
F11 R1 G1
DQ11_A DDR_0B_DQ<14> (6) VDD2_4 VSS#G1
J4 F9 K3 J1 C247 C248 C249 C251 C253 C255 C408 C409 C257 C259
(6,16) DDR_0B_CKE<0> CKE_A DQ12_A DDR_0B_DQ<11> (6) VDD2_5 VSS#J1
J5 E9 N3 T1 1u/16V_4 1u/16V_4 1u/16V_4 1u/16V_4 1u/16V_4 1u/16V_4 0.1u/50V_4 0.1u/50V_4 10u/10V_4 10u/10V_4
(6,16) DDR_0B_CKE<1> CKE1_A/NC DQ13_A DDR_0B_DQ<10> (6) VDD2_6 VSS#T1
K8 C9 A4 N2
DNU#K8 DQ14_A DDR_0B_DQ<9> (6) VDD2_7 VSS#N2
B9 AB4 J3
DQ15_A DDR_0B_DQ<8> (6) VDD2_8 VSS#J3
F5 T3
VDD2_9 VSS#T3
(6,16)
(6,16)
DDR_0B_CLK_P
DDR_0B_CLK_N
J8
J9 CLK_P_A/CK_t_A
CLK_N_A/CK_c_A DMI0_A
C3
H5
R5 VDD2_10
VDD2_11
VSS#N4
VSS#T5
N4
T5 U23 VDDQ caps:1uFx6, 0.1uFx2, 10uFx2
C10 U5 T8
DMI1_A F8 VDD2_12 VSS#T8 N9
B B
D3 H8 VDD2_13 VSS#N9 J10
DQS0_t_A DDR_0B_DQS_0_P (6) VDD2_14 VSS#J10
E3 R8 T10 PP1800_DRAM_U
DQS0_c_A DDR_0B_DQS_0_N (6) VDD2_15 VSS#T10
U8 N11
D10 A9 VDD2_16 VSS#N11 J12
DQS1_t_A DDR_0B_DQS_1_P (6) VDD2_17 VSS#J12
E10 AB9 T12
DQS1_c_A DDR_0B_DQS_1_N (6) VDD2_18 VSS#T12
K10 E1
R4 AA2 N10 VDD2_19 VSS#E1 Y1
(6,16) DDR_0B_CS<0> CS_B DQ0_B DDR_0B_DQ<19> (6) VDD2_20 VSS#Y1
R3 Y2 H12 W2 C250 C252 C254 C256 C258
(6,16) DDR_0B_CS<1> CS1_B/NC DQ1_B DDR_0B_DQ<21> (6) VDD2_21 VSS#W2
N5 V2 K12 AB3 1u/16V_4 1u/16V_4 1u/16V_4 1u/16V_4 10u/10V_4
DNU#N5 DQ2_B DDR_0B_DQ<22> (6) VDD2_22 VSS#AB3
U2 N12 W4
DQ3_B DDR_0B_DQ<23> (6) VDD2_23 VSS#W4
R2 U4 R12 E5
(6,16) DDR_0B_CA<0> CA0_B DQ4_B DDR_0B_DQ<16> (6) VDD2_24 VSS#E5
P2 V4 Y5
(6,16) DDR_0B_CA<1> CA1_B DQ5_B DDR_0B_DQ<17> (6) VSS#Y5
(6,16)
(6,16)
DDR_0B_CA<2>
DDR_0B_CA<3>
R9
R10 CA2_B
CA3_B
DQ6_B
DQ7_B
Y4
AA4
DDR_0B_DQ<18>
DDR_0B_DQ<20>
(6)
(6) PP1100_VDDQ D1
VDDQ_1
VSS#C8
VSS#V8
C8
V8 U23 VDD caps:1uFx4, 10uFx1
R11 W1 AB8
(6,16) DDR_0B_CA<4> CA4_B VDDQ_2 VSS#AB8
P11 B3 W9
(6,16) DDR_0B_CA<5> CA5_B VDDQ_3 VSS#W9
AA11 F3 AB10
DQ8_B DDR_0B_DQ<26> (6) VDDQ_4 VSS#AB10
PP1100_VDDQ T2 Y11 U3 W11
ODT_B/ODT_ca_B DQ9_B DDR_0B_DQ<27> (6) VDDQ_5 VSS#W11
V11 AA3 E12
DQ10_B DDR_0B_DQ<25> (6) VDDQ_6 VSS#E12
P4 U11 B5 Y12
(6,16) DDR_0B_CKE<0> CKE_B DQ11_B DDR_0B_DQ<31> (6) VDDQ_7 VSS#Y12
P5 U9 D5 V12
(6,16) DDR_0B_CKE<1> CKE1_B/NC DQ12_B DDR_0B_DQ<28> (6) VDDQ_8 VSS#V12
N8 V9 W5 C12
DNU#N8 DQ13_B DDR_0B_DQ<29> (6) VDDQ_9 VSS#C12
Y9 AA5 D11
DQ14_B DDR_0B_DQ<24> (6) VDDQ_10 VSS#D11
P8 AA9 B8 A10
(6,16) DDR_0B_CLK_P CLK_P_B/CK_t_B DQ15_B DDR_0B_DQ<30> (6) VDDQ_11 VSS#A10
P9 D8 D9
(6,16) DDR_0B_CLK_N CLK_N_B/CK_c_b VDDQ_12 VSS#D9
Y3 W8 Y8
DMI0_B Y10 AA8 VDDQ_13 VSS#Y8 E8
DMI1_B B10 VDDQ_14 VSS#E8 AB5
W3 F10 VDDQ_15 VSS#AB5 V5 PP1100_VDDQ
DQS0_t_B DDR_0B_DQS_2_P (6) VDDQ_16 VSS#V5
V3 U10 C5
DQS0_c_B DDR_0B_DQS_2_N (6) VDDQ_17 VSS#C5
AA10 D4
W10 D12 VDDQ_18 VSS#D4 A3
DQS1_t_B DDR_0B_DQS_3_P (6) VDDQ_19 VSS#A3
V10 W12 D2
DQS1_c_B DDR_0B_DQS_3_N (6) VDDQ_20 VSS#D2 V1
A1 VSS#V1 C1 R274 R275
T11 B1 DNU_1 VSS#C1 240_1%_2 240_1%_2
(6,16) DDR_RST_CH0_L RESET_L/RESET_n DNU_2
AA1
2 OF 2 AB1 DNU_3 A5 DDQ_0B_ZQ<0>
A2 DNU_4 ZQ_a A8 DDQ_0B_ZQ<1>
AB2 DNU_5 NC/ZQ1 G11
A11 DNU_6 DNU#G11
AB11 DNU_7
A12 DNU_8
B12 DNU_9
A
AA12 DNU_10 A
AB12 DNU_11
DNU_12
1 OF 2

Quanta Computer Inc.


PROJECT :ZBA/ZBB
Size Document Number Rev
1A
MEMORY CH 00/01 LPDDR4
Date: Friday, May 31, 2019 Sheet 16 of 45
5 4 3 2 1
5 4 3 2 1

(OBM)
LPDDR4_SDRAM LPDDR4_SDRAM
U20B U20A PP1100_VDDQ
H4 B2 PP1800_DRAM_U F1 P12
(6,17) DDR_1A_CS<0> CS0_A DQ0_A DDR_1A_DQ<23> (6) VDD1_1 VSS#P12
H3 C2 U1 G12
(6,17) DDR_1A_CS<1> CS1_A/NC DQ1_A DDR_1A_DQ<21> (6) VDD1_2 VSS#G12
K5 E2 G4 K11
DNU#K5 DQ2_A DDR_1A_DQ<22> (6) VDD1_3 VSS#K11
F2 T4 P10
DQ3_A DDR_1A_DQ<20> (6) VDD1_4 VSS#P10
F4 G9 G10
DQ4_A DDR_1A_DQ<16> (6) VDD1_5 VSS#G10
H2 E4 T9 K9 C208 C209 C210 C212 C214 C216
(6,17) DDR_1A_CA<0> CA0_A DQ5_A DDR_1A_DQ<17> (6) VDD1_6 VSS#K9
J2 C4 U12 G8 CHB@1u/16V_4 CHB@1u/16V_4 CHB@1u/16V_4 CHB@1u/16V_4 CHB@1u/16V_4 CHB@1u/16V_4
(6,17) DDR_1A_CA<1> CA1_A DQ6_A DDR_1A_DQ<19> (6) VDD1_7 VSS#G8
H9 B4 F12 G5
(6,17) DDR_1A_CA<2> CA2_A DQ7_A DDR_1A_DQ<18> (6) VDD1_8 VSS#G5
H10 K4
(6,17) DDR_1A_CA<3> CA3_A VSS#K4
H11 P3
(6,17) DDR_1A_CA<4> CA4_A VSS#P3
J11 B11 PP1100_VDDQ H1 G3
(6,17) DDR_1A_CA<5> CA5_A DQ8_A DDR_1A_DQ<24> (6)
C11 K1 VDD2_1 VSS#G3 K2
DQ9_A DDR_1A_DQ<28> (6)
PP1100_VDDQ G2 E11 N1 VDD2_2 VSS#K2 P1
ODT_CA_A DQ10_A DDR_1A_DQ<26> (6)
F11 R1 VDD2_3 VSS#P1 G1
DQ11_A DDR_1A_DQ<25> (6)
J4 F9 K3 VDD2_4 VSS#G1 J1 C398 C399 C218 C220 C401
(6,17) DDR_1A_CKE<0> CKE_A DQ12_A DDR_1A_DQ<30> (6)
J5 E9 N3 VDD2_5 VSS#J1 T1 [email protected]/50V_4 [email protected]/50V_4 CHB@10u/10V_4 CHB@10u/10V_4 CHB@10u/10V_4
(6,17) DDR_1A_CKE<1> CKE1_A/NC DQ13_A DDR_1A_DQ<31> (6)
K8 C9 A4 VDD2_6 VSS#T1 N2
DNU#K8 DQ14_A DDR_1A_DQ<27> (6)
D B9 AB4 VDD2_7 VSS#N2 J3 D
DQ15_A DDR_1A_DQ<29> (6)
F5 VDD2_8 VSS#J3

(6,17) DDR_1A_CLK_P
J8
CLK_P_A/CK_t_A
H5 VDD2_9 VSS#T3
T3
N4 U20 VDDQ caps:1uFx6, 0.1uFx2, 10uFx3
J9 C3 R5 VDD2_10 VSS#N4 T5
(6,17) DDR_1A_CLK_N CLK_N_A/CK_c_A DMI0_A C10 U5 VDD2_11 VSS#T5 T8
DMI1_A F8 VDD2_12 VSS#T8 N9 PP1800_DRAM_U
D3 H8 VDD2_13 VSS#N9 J10
DQS0_t_A DDR_1A_DQS_2_P (6)
E3 R8 VDD2_14 VSS#J10 T10
DQS0_c_A DDR_1A_DQS_2_N (6)
U8 VDD2_15 VSS#T10 N11
D10 A9 VDD2_16 VSS#N11 J12
DQS1_t_A DDR_1A_DQS_3_P (6)
E10 AB9 VDD2_17 VSS#J12 T12
DQS1_c_A DDR_1A_DQS_3_N (6)
K10 VDD2_18 VSS#T12 E1 C211 C213 C215 C217 C219 C400
R4 AA2 N10 VDD2_19 VSS#E1 Y1 CHB@1u/16V_4 CHB@1u/16V_4 CHB@1u/16V_4 CHB@1u/16V_4 CHB@10u/10V_4 CHB@10u/10V_4
(6,17) DDR_1A_CS<0> CS_B DQ0_B DDR_1A_DQ<11> (6)
R3 Y2 H12 VDD2_20 VSS#Y1 W2
(6,17) DDR_1A_CS<1> CS1_B/NC DQ1_B DDR_1A_DQ<14> (6)
N5 V2 K12 VDD2_21 VSS#W2 AB3
DNU#N5 DQ2_B DDR_1A_DQ<13> (6)
U2 N12 VDD2_22 VSS#AB3 W4
DQ3_B DDR_1A_DQ<15> (6)
12 RVDD2_23 VSS#W4
(6,17)
(6,17)
DDR_1A_CA<0>
DDR_1A_CA<1>
2 R
P2
CA0_B
DQ4_B
U4
V4
DDR_1A_DQ<12>
DDR_1A_DQ<10>
(6)
(6)
VDD2_24
VSS#E5
E5
Y5 U20 VDD caps:1uFx4, 10uFx2
R9 CA1_B DQ5_B Y4 VSS#Y5 C8
(6,17) DDR_1A_CA<2> DDR_1A_DQ<9> (6)
R10 CA2_B DQ6_B AA4 PP1100_VDDQ D1 VSS#C8 V8
(6,17) DDR_1A_CA<3> DDR_1A_DQ<8> (6)
R11 CA3_B DQ7_B W1 VDDQ_1 VSS#V8 AB8
(6,17) DDR_1A_CA<4> CA4_B VDDQ_2 VSS#AB8
P11 B3 W9
(6,17) DDR_1A_CA<5> CA5_B VDDQ_3 VSS#W9
AA11 F3 AB10
DQ8_B DDR_1A_DQ<4> (6) VDDQ_4 VSS#AB10
PP1100_VDDQ T2 Y11 U3 W11
ODT_B/ODT_ca_B DQ9_B DDR_1A_DQ<5> (6) VDDQ_5 VSS#W11
V11 AA3 E12
DQ10_B DDR_1A_DQ<6> (6) VDDQ_6 VSS#E12
P4 U11 B5 Y12
(6,17) DDR_1A_CKE<0> CKE_B DQ11_B DDR_1A_DQ<7> (6) VDDQ_7 VSS#Y12
P5 U9 D5 V12
(6,17) DDR_1A_CKE<1> CKE1_B/NC DQ12_B DDR_1A_DQ<3> (6) VDDQ_8 VSS#V12
N8 V9 W5 C12
DNU#N8 DQ13_B DDR_1A_DQ<2> (6) VDDQ_9 VSS#C12
Y9 AA5 D11
DQ14_B DDR_1A_DQ<1> (6) VDDQ_10 VSS#D11
P8 AA9 B8 A10
(6,17) DDR_1A_CLK_P CLK_P_B/CK_t_B DQ15_B DDR_1A_DQ<0> (6) VDDQ_11 VSS#A10
P9 D8 D9
(6,17) DDR_1A_CLK_N CLK_N_B/CK_c_b VDDQ_12 VSS#D9
Y3 W8 Y8
DMI0_B Y10 AA8 VDDQ_13 VSS#Y8 E8
DMI1_B B10 VDDQ_14 VSS#E8 AB5
W3 F10 VDDQ_15 VSS#AB5 V5 PP1100_VDDQ
DQS0_t_B DDR_1A_DQS_1_P (6) VDDQ_16 VSS#V5
V3 U10 C5
DQS0_c_B DDR_1A_DQS_1_N (6) VDDQ_17 VSS#C5
AA10 D4
W10 D12 VDDQ_18 VSS#D4 A3
DQS1_t_B DDR_1A_DQS_0_P (6) VDDQ_19 VSS#A3
V10 W12 D2
DQS1_c_B DDR_1A_DQS_0_N (6) VDDQ_20 VSS#D2 V1
A1 VSS#V1 C1 R268 R269
T11 B1 DNU_1 VSS#C1 CHB@240_1%_2
CHB@240_1%_2
(6,17) DDR_RST_CH1_L RESET_L/RESET_n DNU_2
AA1
2 OF 2 AB1 DNU_3 A5 DDQ_1A_ZQ<0>
A2 DNU_4 ZQ_a A8 DDQ_1A_ZQ<1>
C
AB2 DNU_5 NC/ZQ1 G11 C
A11 DNU_6 DNU#G11
AB11 DNU_7
A12 DNU_8
B12 DNU_9
AA12 DNU_10
AB12 DNU_11
DNU_12
1 OF 2

LPDDR4_SDRAM LPDDR4_SDRAM
U21B U21A
H4 B2 PP1800_DRAM_U F1 P12
(6,17) DDR_1B_CS<0> CS0_A DQ0_A DDR_1B_DQ<19> (6) VDD1_1 VSS#P12
H3 C2 U1 G12 PP1100_VDDQ
(6,17) DDR_1B_CS<1> CS1_A/NC DQ1_A DDR_1B_DQ<18> (6) VDD1_2 VSS#G12
K5 E2 G4 K11
DNU#K5 DQ2_A DDR_1B_DQ<22> (6) VDD1_3 VSS#K11
F2 T4 P10
DQ3_A DDR_1B_DQ<16> (6) VDD1_4 VSS#P10
F4 G9 G10
DQ4_A DDR_1B_DQ<23> (6) VDD1_5 VSS#G10
H2 E4 T9 K9
(6,17) DDR_1B_CA<0> CA0_A DQ5_A DDR_1B_DQ<17> (6) VDD1_6 VSS#K9
J2 C4 U12 G8
(6,17) DDR_1B_CA<1> CA1_A DQ6_A DDR_1B_DQ<20> (6) VDD1_7 VSS#G8
H9 B4 F12 G5 C221 C222 C223 C225 C227 C229
(6,17) DDR_1B_CA<2> CA2_A DQ7_A DDR_1B_DQ<21> (6) VDD1_8 VSS#G5
H10 K4 CHB@1u/16V_4 CHB@1u/16V_4 CHB@1u/16V_4 CHB@1u/16V_4 CHB@1u/16V_4 CHB@1u/16V_4
(6,17) DDR_1B_CA<3> CA3_A VSS#K4
H11 P3
(6,17) DDR_1B_CA<4> CA4_A VSS#P3
J11 B11 PP1100_VDDQ H1 G3
(6,17) DDR_1B_CA<5> CA5_A DQ8_A DDR_1B_DQ<27> (6) VDD2_1 VSS#G3
C11 K1 K2
DQ9_A DDR_1B_DQ<26> (6) VDD2_2 VSS#K2
PP1100_VDDQ G2 E11 N1 P1
ODT_CA_A DQ10_A DDR_1B_DQ<25> (6) VDD2_3 VSS#P1
F11 R1 G1
DQ11_A DDR_1B_DQ<31> (6) VDD2_4 VSS#G1
J4 F9 K3 J1
(6,17) DDR_1B_CKE<0> CKE_A DQ12_A DDR_1B_DQ<30> (6) VDD2_5 VSS#J1
J5 E9 N3 T1
(6,17) DDR_1B_CKE<1> CKE1_A/NC DQ13_A DDR_1B_DQ<29> (6) VDD2_6 VSS#T1
K8 C9 A4 N2 C402 C403 C231 C233
DNU#K8 DQ14_A DDR_1B_DQ<24> (6) VDD2_7 VSS#N2
B9 AB4 J3 [email protected]/50V_4 [email protected]/50V_4 CHB@10u/10V_4 CHB@10u/10V_4
DQ15_A DDR_1B_DQ<28> (6) VDD2_8 VSS#J3
F5 T3
J8 H5 VDD2_9 VSS#T3 N4
(6,17) DDR_1B_CLK_P CLK_P_A/CK_t_A VDD2_10 VSS#N4
J9 C3 R5 T5
(6,17) DDR_1B_CLK_N CLK_N_A/CK_c_A DMI0_A VDD2_11 VSS#T5
C10 U5 T8
DMI1_A VDD2_12 VSS#T8
B

DQS0_t_A
D3
DDR_1B_DQS_2_P (6)
F8
H8 VDD2_13
VDD2_14
VSS#N9
VSS#J10
N9
J10 U21 VDDQ caps:1uFx6, 0.1uFx2, 10uFx2 B

E3 R8 T10 PP1800_DRAM_U
DQS0_c_A DDR_1B_DQS_2_N (6) VDD2_15 VSS#T10
U8 N11
D10 A9 VDD2_16 VSS#N11 J12
DQS1_t_A DDR_1B_DQS_3_P (6) VDD2_17 VSS#J12
E10 AB9 T12
DQS1_c_A DDR_1B_DQS_3_N (6) VDD2_18 VSS#T12
K10 E1
R4 AA2 N10 VDD2_19 VSS#E1 Y1
(6,17) DDR_1B_CS<0> CS_B DQ0_B DDR_1B_DQ<0> (6) VDD2_20 VSS#Y1
R3 Y2 H12 W2 C224 C226 C228 C230 C232
(6,17) DDR_1B_CS<1> CS1_B/NC DQ1_B DDR_1B_DQ<3> (6) VDD2_21 VSS#W2
N5 V2 K12 AB3 CHB@1u/16V_4 CHB@1u/16V_4 CHB@1u/16V_4 CHB@1u/16V_4 CHB@10u/10V_4
DNU#N5 DQ2_B DDR_1B_DQ<7> (6) VDD2_22 VSS#AB3
U2 N12 W4
DQ3_B DDR_1B_DQ<6> (6) VDD2_23 VSS#W4
R2 U4 R12 E5
(6,17) DDR_1B_CA<0> CA0_B DQ4_B DDR_1B_DQ<1> (6) VDD2_24 VSS#E5
P2 V4 Y5
(6,17) DDR_1B_CA<1> CA1_B DQ5_B DDR_1B_DQ<5> (6) VSS#Y5
R9 Y4 C8
(6,17) DDR_1B_CA<2> CA2_B DQ6_B DDR_1B_DQ<4> (6) VSS#C8
(6,17)
(6,17)
DDR_1B_CA<3>
DDR_1B_CA<4>
R10
R11 CA3_B
CA4_B
DQ7_B
AA4
DDR_1B_DQ<2> (6) PP1100_VDDQ D1
W1 VDDQ_1
VDDQ_2
VSS#V8
VSS#AB8
V8
AB8 U20 VDD caps:1uFx4, 10uFx1
P11 B3 W9
(6,17) DDR_1B_CA<5> CA5_B VDDQ_3 VSS#W9
AA11 F3 AB10
DQ8_B DDR_1B_DQ<14> (6) VDDQ_4 VSS#AB10
PP1100_VDDQ T2 Y11 U3 W11
ODT_B/ODT_ca_B DQ9_B DDR_1B_DQ<13> (6) VDDQ_5 VSS#W11
V11 AA3 E12
DQ10_B DDR_1B_DQ<12> (6) VDDQ_6 VSS#E12
P4 U11 B5 Y12
(6,17) DDR_1B_CKE<0> CKE_B DQ11_B DDR_1B_DQ<8> (6) VDDQ_7 VSS#Y12
P5 U9 D5 V12
(6,17) DDR_1B_CKE<1> CKE1_B/NC DQ12_B DDR_1B_DQ<9> (6) VDDQ_8 VSS#V12
N8 V9 W5 C12
DNU#N8 DQ13_B DDR_1B_DQ<10> (6) VDDQ_9 VSS#C12
Y9 AA5 D11
DQ14_B DDR_1B_DQ<15> (6) VDDQ_10 VSS#D11
P8 AA9 B8 A10
(6,17) DDR_1B_CLK_P CLK_P_B/CK_t_B DQ15_B DDR_1B_DQ<11> (6) VDDQ_11 VSS#A10
P9 D8 D9
(6,17) DDR_1B_CLK_N CLK_N_B/CK_c_b VDDQ_12 VSS#D9
Y3 W8 Y8
DMI0_B Y10 AA8 VDDQ_13 VSS#Y8 E8
DMI1_B B10 VDDQ_14 VSS#E8 AB5
W3 F10 VDDQ_15 VSS#AB5 V5 PP1100_VDDQ
DQS0_t_B DDR_1B_DQS_0_P (6) VDDQ_16 VSS#V5
V3 U10 C5
DQS0_c_B DDR_1B_DQS_0_N (6) VDDQ_17 VSS#C5
AA10 D4
W10 D12 VDDQ_18 VSS#D4 A3
DQS1_t_B DDR_1B_DQS_1_P (6) VDDQ_19 VSS#A3
V10 W12 D2
DQS1_c_B DDR_1B_DQS_1_N (6) VDDQ_20 VSS#D2 V1
A1 VSS#V1 C1 R270 R271
T11 B1 DNU_1 VSS#C1 CHB@240_1%_2
CHB@240_1%_2
(6,17) DDR_RST_CH1_L RESET_L/RESET_n DNU_2
AA1
2 OF 2 AB1 DNU_3 A5 DDQ_1B_ZQ<0>
A2 DNU_4 ZQ_a A8 DDQ_1B_ZQ<1>
AB2 DNU_5 NC/ZQ1 G11
A11 DNU_6 DNU#G11
AB11 DNU_7
A12 DNU_8
B12 DNU_9
A
AA12 DNU_10 A
AB12 DNU_11
DNU_12
1 OF 2

Quanta Computer Inc.


PROJECT :ZBA/ZBB
Size Document Number Rev
1A
MEMORY CH 10/11 LPDDR4
Date: Friday, May 31, 2019 Sheet 17 of 45
5 4 3 2 1
5 4 3 2 1

(KBC)
PP1800_SENSOR_U PP3300_EC PP3300_PD_ANA

R129 R130 R656 R657 R425 R430 R449 R454


2.2K_1%_2 2.2K_1%_2 2.2K_1%_2 2.2K_1%_2 2.2K_1%_2 2.2K_1%_2 1.8K_1%_2 1.8K_1%_2 U45A

M1 C1 PCH_PROCHOT_ODL
(9) ESPI_CLK L2 PCI_CLK/ESPI_CLK/GPIO55 GPIO37/ADC5 H10 PCH_PROCHOT_ODL (11,37)
(9) ESPI_CS_L LFRAME_L/ESPI_CS_L/GPIO53 GPIOC2/PWM1/I2C6_SCL0 PCH_RSMRST_L (11,12)
H1 H9
D (9) ESPI_IO0 LAD0/ESPI_IO0/GPIO46 eSPI SOC GPIOC1/I2C6_SDA0 EC_PCH_PWR_BTN_ODL (11,12) D
J1 J5
(9) ESPI_IO1 K1 LAD1/ESPI_IO1/GPIO47 GPIO76/EC_SCI_L H5 EC_PCH_WAKE_ODL EC_PCH_RTCRST (11)
(9) ESPI_IO2 LAD2/ESPI_IO2/GPIO51 GPIO74 SYS_RST_ODL EC_PCH_WAKE_ODL (12)
L1 B2
(9) ESPI_IO3 K3 LAD3/ESPI_IO3/GPIO52 GPIO34/ADC6 F7 EC_RST_ODL SYS_RST_ODL (11,12,21,22)
(9) ESPI_RESET_L LRESET_L/ESPI_RST_L/GPIO54 GPIO02/PSL_IN4 H7
GPIOC5/KBRST_L USB_C0_HPD_1V8_ODL (7,29)
D10
GPIOC6/SMI_L F10 USB_C1_HPD_1V8_ODL (7,39)
GPIOC7 PLT_RST_L (11,12,21,23,28)
K8
(29,32) EC_I2C_USB_C0_MUX_SCL K7 GPIO90/I2C1_SCL0
(29,32) EC_I2C_USB_C0_MUX_SDA GPIO87/I2C1_SDA0
L8
(39) EC_I2C_USB_C1_MUX_SCL GPIO92/I2C2_SCL0
K9 E9
(39) EC_I2C_USB_C1_MUX_SDA D5 GPIO91/I2C2_SDA0 GPIOF4/I2C5_SDA1 A11 PMIC_EC_PWROK_OD (33)
(35) EN_PP3300_TRACKPAD_ODL GPIO33/I2C5_SCL0/CTS_L GPIOE2 MECH_PWR_BTN_ODL PMIC_EC_RSMRST_ODL (33)
TP71 D4 E6
(8) USB_C_OC F8 GPIO36/I2C5_SDA0/RTS_L I2C GPIO01/PSL_IN3 J8 TP158
TP28
(19) EC_I2C_EEPROM_SCL GPIOD1/I2C3_SCL0 PSL_OUT/GPIO85 TP67 EN_EC_PWR (34,35)
TP29 F9 G6
(19) EC_I2C_EEPROM_SDA GPIOD0/I2C3_SDA0 GPIO60/PWM7 PP3300_PG_OD (34,35)
C12 G5
(37) EC_I2C_BATTERY_3V3_SCL B12 GPIOB5/I2C0_SCL0 GPIO73 J7 EN_PP5000_A (34)
(37) EC_I2C_BATTERY_3V3_SDA GPIOB4/I2C0_SDA0 POWER SEQ GPIOB7/PWM5 EC_PCH_PWROK (11)
J10 H8
(26,27) EC_I2C_SENSOR_U_SCL K10 GPIOB3/I2C7_SCL0 GPIOC0/PWM6 L5 EC_PIN_L5 R264 PP5000_PG_OD (34)
*Short_0201
(26,27) EC_I2C_SENSOR_U_SDA GPIOB2/I2C7_SDA0 GPIOD7 TP85 LED_3_L (39)
F5 H11
(37) EC_I2C_CHARGER_3V3_SCL GPIOF3/I2C4_SCL1 GPIOA4 SLP_S0_L (11)
F6 K12
(37) EC_I2C_CHARGER_3V3_SDA GPIOF2/I2C4_SDA1 SPIP_MOSI/GPIOA3 F11 SLP_S4_L (11,35)
GPIOA6 SLP_S3_L (11,35)
PP3300_EC A9
TO ENABLE UART PROGRAMMING, H4 HAS TO BE LOW POWER UP GPIOD4 E7 TP22 EN_PP3300_A (34)
PSL_IN2/GPIO00 ACOK_OD (21,37)
TP105 H4 A10
(21,22) UART_EC_TX_SERVO_RX GPO65/CR_SOUT1/FLPRG_L UART GPIOD5 SUSPWRDNACK (11)
TP106 G4
(21,22) UART_SERVO_TX_EC_RX GPIO64/CR_SIN1
R131 R141 R158 R163 R224 R226 R227 R228 0102_Q_Changed R184 to a short pad
*10K_1%_2 *10K_1%_2 *10K_1%_2 *10K_1%_2 *10K_1%_2 *10K_1%_2 10K_1%_2 *10K_1%_2 J3 R184
GPIO67 EC_GPIO_03 EN_USB_A0_5V (30)
A2 D9 *Short_0201
KSI0/GPIO31/TRACEDATA3/GP_MOSI KSO16/GPIO03 WFCAM_VSYNC (40)
A3 K4
A4 KSI1/GPIO30/GP_CS_L GPIO61/PWROFF_L H2 USB_C0_MUX_INT_ODL (29)
R738 *Short_0201 R137 100K_1%_2
KSI_00 KSI2/GPIO27/GP_MISO GPIO62 KB_BL_PWR_EN (25)
B3 D6
(25) KSI_00 KSI_01_EC_SPI_FLASH_CS_L B4 KSI3/GPIO26/GP_MOSI USB PD KSO14/GPIO82 J4 KSO_14 (25)
(22) KSI_01_EC_SPI_FLASH_CS_L KSI_02_EC_SPI_FLASH_MISO R60 KSI4/GPIO25/GP_SCLK GPIO7 USB_C1_PD_RST_ODL (29,39)
33_1%_2 KSI_02_EC_SPI_FLASH_MISO_R C3 D11
(22) KSI_02_EC_SPI_FLASH_MISO KSI_03_EC_SPI_FLASH_MOSI KSI5/GPIO24/GP_MISO KSO13/GPIO04 USB_C1_MUX_INT_ODL KSO_13 (25)
C4 E8
(22) KSI_03_EC_SPI_FLASH_MOSI KSI_04_EC_SPI_FLASH_CLK C5 KSI6/GPIO23 GPIOF5/I2C5_SCL1 D7 USB_C1_MUX_INT_ODL (39)
(22) KSI_04_EC_SPI_FLASH_CLK KSI_05 KSI7/GPIO22 KSO15/GPIO83 TP24 USB_C0_PD_RST (29)
C D8 C
(25) KSI_05 KSI_06 KEYBOARD KSO17/GPIOB1 J2 USB_C1_BC12_VBUS_ON (39)
(25) KSI_06 KSI_07 GPIO63 USB_C0_BC12_VBUS_ON (31)
E5
(25) KSI_07 GPIO40 EC_VOLDN_BTN_ODL (39)
B5 M12
(25) KSO_00 B6 KSO00/GPIO21 SPIP_MISO/GPIO95 L6 USB_C0_BC12_CHG_DET_L (31)
(25) KSO_01 KSO01/GPIO20 GPIOE4/I2C6_SCL1 USB_C1_BC12_CHG_DET_L (39)
B7 F4
(21) EC_KSO_02_INV B8 KSO02/GPIO17 GPIOE0 F12 TP25 USB_PD_C0_INT_ODL (32)
(25) KSO_03 KSO03/GPIO16 GPIOA2 USB_A0_CHARGE_EN_L (30)
C7
(25) KSO_04 KSO04/GPIO15
C6
PP3300_EC_VSBY
(25) KSO_05 C8 KSO05/GPIO14
(25) KSO_06 KSO06/GPIO13/GP_SEL1_L
B9 G11
(25) KSO_07 C9 KSO07/GPO12/JEN0_L GPIOA0 G3 USB_A1_CHARGE_EN_L (39)
(25) KSO_08 KSO08/GPIO11/CR_SOUT1 GPIOF1/ADC8 USB_PD_C1_INT_ODL (39)
C10 E2
(25) KSO_09 KSO09/GPIO10/CR_SIN1 GPIO43/ADC2 CHARGER_IADP (37)
B11 D3
(25) KSO_10 B10 KSO10/GPIO07 GPIO42/ADC3 CHARGER_PMON (37)
(25) KSO_11 KSO11/GPIO06
(25) KSO_12
C11 0102_Q_added DNS C111Q,C1112Q
C517 C516 KSO12/GPIO05
0.1u/6.3V_2 0.1u/6.3V_2 EC_RST_ODL 1 2 EC_VCC1_RST_ODL M2 C111Q C112Q
(21,22,38) EC_RST_ODL GPIO56/CLKRUN_L BASE_SIXAXIS_INT_L (27)
G10 *0.01u/16V_2 *0.01u/16V_2
U45B K6 GPIO50 L7 CCD_MODE_EC_L LID_ACCEL_INT_L (26)
D1 C96 0.1u/6.3V_2
VCC1_RST_L/GPO77 GPIOE3/I2C6_SDA1 CCD_MODE_EC_L (31) EC_AVSS
SDM20U30-7 A12
GPIOE5 EC_BATT_PRES_L (37)
A1
VSS#1 VBAT
L4 VF=0.35V@20mA GPIOE1/ADC7
F3
EC_WP_ODL EC_ENTERING_RW (21)
A5 M10 L12
A8 VSS#2 VSTANDBY M4 SPIP_SCLK/GPIOA1 K5 GPIO80_PWM3 R18 *Short_0201 R257 1M_1%_2
E12 VSS#3 M5 32KXIN/32KCLKIN CLK GPIO80/PWM3 G9 KB_BL_PWM (25)
32KXOUT
VSS#4 TP107 32KXOUT GPIOC3/PWM0 LED_1_L (27)
G1 PP3300_EC_A FB2 PP3300_EC G8
J12 VSS#5 GPIOC4/PWM2 E10 LED_2_L (27)
BLM03AX241SN1D
VSS#6 GPIOD3 LID_OPEN EC_BL_EN_OD (26)
M3 D1 1 2 G7
VSS#7 AVCC PSL_IN1/GPIOD2 LID_OPEN (22,26,27,39)
M9 M11 F2
VSS#8 (12) EC_AP_INT_ODL TP_EC_GPIO97 L10 GPIO94/DMIC_CLK WoV MISC GPIO45/ADC0 E3 TEMP_SENSOR_AMB (24)
TP173 GPIO97/DMIC_DATA GPIO44/ADC1 TEMP_SENSOR_CHARGER (37)
0102_Q_Changed R10Q to (9) EC_I2S_SCLK
J11 G12
EN_USB_A1_5V (39)
GPIOA7/I2S_CLK GPIO96 TRACKPAD_INT_1V8_ODL
C522 C510 a short pad R59
(9) EC_I2S_TX_PCH_RX
L11
GPIOB0/I2S_DATA GPIO93
E11
0.1u/6.3V_2 4.7u/6.3V_4 2.2_5%_4 K11 D2 EC_GPIOF0_ADC9 C531 C532
EC_AVSS (9) EC_I2S_SFRM GPIOA5/A20M/I2S_SYNC GPIOF0/ADC9 EC_GPIO41_ADC4 TP75
E1 R10Q *Short_0402 C2 0.1u/6.3V_2 0.1u/6.3V_2
AVSS GPIO41/ADC4 TP76
EC_AVSS (24) PP3300_EC_R
A7 H3 EC_AVSS
VCC1#1 TP5 GPO32_TRIS_L GPOD6/JEN1_L
B1 E4 J6
B VCC1#2 TP2 GPO35_TEST_L GPO32/TRIS_L GPIO75/32KHZ_OUT/RXD/CR_SIN2 EC_VOLUP_BTN_ODL (39) B
D12 K2 J9
VCC1#4 M8 TP3 GPO66_ARM_L_X86 G2 GPO35/TEST_L STRAPS GPIO86/TXD/CR_SOUT2 L3 TP_EC_GPIO57 TABLET_MODE_L (27,39)
C519 C523 C526 C529 C76
VCC1#3 TP4 GPO66/ARM_L/X86 SER_IRQ/ESPI_ALERT_L/GPIO57 TP130
10u/10V_4 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 L9
(22) EC_GP_SEL_ODL GPOB6/PWM4/GP_SEL0_L
GND OF C531, 532 GOES TO E1 OF U45
H6 NPCX796FB0BX
GPIO72/PWRGD PMIC_EN (33)

3
Q8
2 PP3300_RTC
PLACE R444 CLOSE TO PIN M7 PP1800_EC
(21) EC_GP_SEL
PJE138K
M7 EC_VSS_PLL R444 *0_5%_2 PP3300_EC
VSS_PLL PP1800_EC_R R9096 *SP@0_5%_2
PP3300_EC
1

F1 R54 2.2_5%_4 R153 R154 R157


VHIF H12 R474 100K_1%_2 USB_C1_MUX_INT_ODL 499K_1%_2 100K_1%_2 10K_1%_2
VSPI
C521 C525 C527
10u/10V_4 0.1u/6.3V_2 0.1u/6.3V_2
LID_OPEN R40Q R41Q
EC_RST_ODL [email protected]_1%_2 [email protected]_1%_2
M6 VREF_PECI_VCAP_PLL R446 *0_5%_2 PP3300_SOC_A
VREF_PECI/VCAP_PLL MECH_PWR_BTN_ODL EC_BRD_01
(21) MECH_PWR_BTN_ODL EC_BRD_02
A6 R429 *10_1%_2 PP1800_SOC_A
CAP C528 R20 100K_1%_2 EC_PCH_WAKE_ODL
*Short_0402 R42Q R43Q
NPCX796FB0BX C518 R139 1K_1%_2 PCH_PROCHOT_ODL [email protected]_1%_4 [email protected]_1%_4
1u/10V_2 EC_WP_ODL R467 100K_1%_2 EC_FLASH_WP_ODL R140 100K_1%_2 TRACKPAD_INT_1V8_ODL
EC_FLASH_WP_ODL (19,21,22) TRACKPAD_INT_1V8_ODL (12,25)

0102_Q_Changed C528 to a short pad

PPVAR_USB_C0_VBUS SUB_GPIO_ADC (39) R40Q/R41Q | R42Q/R43Q | VOLTAGE | LEVEL


(25) KSI_01 ----------------------------------------------------
(21) EC_KSI_02
A
(21) EC_KSI_03 51.1 KOHM | 2 KOHM | 0.124 V | 1 A

(25) KSI_04
DIVIDES VOLTAGE BY 10 FOR ADC 51.1 KOHM | 4.7 KOHM | 0.278 V | 2
R147 R149 51.1 KOHM | 8.2 KOHM | 0.456 V | 3
200K_1%_4 200K_1%_4 51.1 KOHM | 12.4 KOHM | 0.644 V | 4
51.1 KOHM | 18 KOHM | 0.860 V | 5
EC_GPIOF0_ADC9 51.1 KOHM | 22 KOHM | 0.993 V | 6
R492 R493 R494 R499 EC_GPIO41_ADC4 51.1 KOHM | 27.4 KOHM | 1.152 V | 7
499_1%_2 499_1%_2 499_1%_2 499_1%_2 51.1 KOHM | 34 KOHM | 1.318 V | 8
51.1 KOHM | 40.2 KOHM | 1.453 V | 9
KSI_01_EC_SPI_FLASH_CS_L 10 KOHM | 10 KOHM | 1.650 V | 10
KSI_02_EC_SPI_FLASH_MISO 10 KOHM | 12.4 KOHM | 1.827 V | 11
KSI_03_EC_SPI_FLASH_MOSI C530 R148 R150 10 KOHM | 18 KOHM | 2.121 V | 12 Quanta Computer Inc.
KSI_04_EC_SPI_FLASH_CLK *0.1u/25V_4 22K_1%_4 22K_1%_4 C561 10 KOHM | 22 KOHM | 2.269 V | 13
*0.1u/25V_4 10 KOHM | 27.4 KOHM | 2.418 V | 14 PROJECT : ZBA/ZBB
EC_AVSS 10 KOHM | 34 KOHM | 2.550 V | 15
GND OF ADC FUNCTION MUST GO TO E1 OF U45 10 KOHM | 47 KOHM | 2.721 V | 16 Size Document Number Rev
1A
ADC CIRCUIT OR MONITORING VBUS IS OPTIONAL AND PARTNERS CAN CHOOSE TO USE OR NOT
EC-NUVOTON
Date: Friday, May 31, 2019 Sheet 18 of 45
5 4 3 2 1
5 4 3 2 1

PCH SPI FLASH (CPU) PP1800_A


PP3300_A

R175
100K_5%_2
R520
100K_5%_2 PCH_WP_OD (11)
D D
D40
H1_AP_FLASH_SEL_ODL 1 2 H1_AP_FLASH_SEL_3V3_ODL
H1_AP_FLASH_SEL (19,21)

3
Q16
2
RB500V-40

1
Q60 Q65 Q62 PJE138K
VF=0.45V@10mA
PP1800_BIOS_SPI

3
PP1800_A PP1800_RTC

1
PMZ370UNE R91 R736 PMZ370UNE PMZ370UNE
C7 100K_5%_2 100K_5%_2
U5 4.7u/10V_4 PP1800_BIOS_SPI
5 8 PP3300_RTC
(9) PCH_SPI_MOSI 2 DI(IO0) VCC 3 BIOS_FLASH_WP_ODL
(9) PCH_SPI_MISO_R DO(IO1) WP(IO2) SERVO_PCH_SPI_HOLD_L
1 7
(9) PCH_SPI_CS0_L 6 CS HOLD(IO3) 4 SERVO_PCH_SPI_HOLD_L (22)
(9) PCH_SPI_CLK CLK GND 9
TPAD R176

A2
R77 0_5%_2 W25Q128FWPIF U7 499K_1%_2
(21,22) SERVO_PCH_SPI_MOSI
VCC
(21,22) SERVO_PCH_SPI_MISO
R78 0_5%_2 WINBOND: W25Q128FWPIF
R79 0_5%_2
GIGADEVICES: 25LQ128CWIG B2 Y A A1
C (21,22) SERVO_PCH_SPI_CS_L 16MB PCH FLASH EC_FLASH_WP_ODL (18,21,22) C

(21,22) SERVO_PCH_SPI_CLK
R80 0_5%_2 STANDBY CURRENT: 50 UA 74LVC1G07
MAX CURRENT: 25MA PP3300_EC
GND 1.65-5.5V
SN74LVC1G07YZVR

B1
CN5
PCH_SPI_MOSI 5 4 R471
PCH_SPI_CLK 6 DIO GND 3 BIOS_FLASH_WP_ODL
CLK WP 100K_5%_2
SERVO_PCH_SPI_HOLD_L 7 2 PCH_SPI_MISO_R
PP1800_BIOS_SPI HOLD DO PCH_SPI_CS0_L
8 1
VCC CS H1_AP_FLASH_SEL_ODL
50951-0084N-V01

3
0531 Add BIOS socket CN5 2 Q61
(19,21) H1_AP_FLASH_SEL
PJE138K

1
B B

SKU EEPROM
(KBC)
PP3300_EC

PP3300_EC R359 R360 C429 U28


2.2K_1%_2 2.2K_1%_2 0.01u/16V_2 8 1
VCC E0 2
6 E1 3
SCL E2
(18) EC_I2C_EEPROM_SCL 5 SDA
R136
(18) EC_I2C_EEPROM_SDA 4
2.2K_1%_2
7 VSS
EEPROM_WP_OD WP

A M34E02-FDW6TP A
3

WC_L : LOW = WRITE PROTECT DISABLE


EC_FLASH_WP_ODL 2
WC_L : HI = WRITE PROTECT ENABLE
Q22
PJE138K
Quanta Computer Inc.
1

PROJECT : ZBA/ZBB
Size Document Number Rev
1A
SPI ROM
Date: Friday, May 31, 2019 Sheet 19 of 45
5 4 3 2 1
5 4 3 2 1

(INT) PP1800_A PP1800_A

LAYOUT NOTE: PLACING THE SERIAL R'S WITHIN 1 " OF THE DEBUG CONNECTOR
C505
C506 C507 C508
D D
*1u/16V_4 *0.1u/16V_2 PP1800_A PP1800_A *1u/16V_4 *0.1u/16V_2

J5

1 2 TMS (12)
(12) TCK 3 4 DBG_PMU_RSTBTN_L TDO (12)
(12) TDI DBG_PMU_PLTRST_L 5 6 TRSTPD
7 8
(12) TRST_L 9 10 CX_PREQ_L (12)
(12) CX_PRDY_L 11 12
R627 *0_5%_2 R602 *0_5%_2 R199
(12) DBG_PTI_CLK0 13 14 DBG_PTI_CLK2 (12)
(7) GP_INTD_DSI_TE2 15 16 *10K_1%_2
17 18 DBG_PTI_DATA_16 (12)
(12) DBG_PTI_DATA_0 19 20 DBG_PTI_DATA_17 (12)
(12) DBG_PTI_DATA_1 21 22 DBG_PTI_DATA_18 (12)
C C
(12) DBG_PTI_DATA_2 23 24 DBG_PTI_DATA_19 (12)
(12) DBG_PTI_DATA_3 25 26 DBG_PTI_DATA_20 (12)
(12) DBG_PTI_DATA_4 27 28 DBG_PTI_DATA_21 (12) DBG_PMU_RSTBTN_L
(12) DBG_PTI_DATA_5 29 30 DBG_PTI_DATA_22 (12)
(12) DBG_PTI_DATA_6 31 32 DBG_PMU_RSTBTN_L DBG_PTI_DATA_23 (12)
C93
(12) DBG_PTI_DATA_7 33 34 DBG_PMU_RSTBTN_L (12)
*0.01u/16V_2
(12) DBG_PTI_DATA_8 35 36 DBG_PMU_PLTRST_L BOOT_HALT_L (12)
(12) DBG_PTI_DATA_9 37 38 DBG_PMU_PWRBTN_L DBG_PMU_PLTRST_L (12)
(12) DBG_PTI_DATA_10 39 40 DBG_PMU_PWRBTN_L (12) DBG_PMU_PWRBTN_L
(12) DBG_PTI_DATA_11 41 42 DBG_RSMRST_L (12)
(12) DBG_PTI_DATA_12 43 44 DCI_DATA_PTITRACE3_0 (12)
(12) DBG_PTI_DATA_13 45 46 DBG_PTI_DATA_TRACE3_1 (12)
C78
(12) DBG_PTI_DATA_14 47 48 DBG_PCH_I2C_SCL (10)
*0.01u/16V_2
(12) DBG_PTI_DATA_15 49 50 DBG_PCH_I2C_SDA (10)
51 52 DBG_PTI_DATA_TRACE3_2 (12)
53 54 PCHTX_MIPI60RX_UART (10)
55 56 PCHRX_MIPI60TX_UART (10)
B
R601 *0_5%_2 57 58 R623 *0_5%_2 B
(12) DBG_PTI_CLK1 59 60 DCI_CLK_PTICLK3 (12)
66
65
64
63
62
61 *QSH-030-01-L-D-A-K-TR

A
Quanta Computer Inc. A

PROJECT :ZBA/ZBB
Size Document Number Rev
1A
MIPI60 DEBUG HEADER
Date: Friday, May 31, 2019 Sheet 20 of 45
5 4 3 2 1
5 4 3 2 1

(H1C)
KEEP NEAR TPM/SPI ROM TO MINIMIZE SPI STUBS
PLACE TERMINATION NEAR DIVIDE

R782 33_5%_2 H1_SLAVE_SPI_MOSI


(10) H1_SLAVE_SPI_MOSI_R
R792 33_5%_2 H1_SLAVE_SPI_CLK
(10) H1_SLAVE_SPI_CLK_R
R793 33_5%_2 H1_SLAVE_SPI_CS_L
(10) H1_SLAVE_SPI_CS_L_R PP3300_VDDIOM
PP3300_RTC
R813 *Short_0603
R794 33_5%_2 H1_SLAVE_SPI_MISO_R
(10) H1_SLAVE_SPI_MISO PP3300_VDDIOB
R450 *Short_0603

D D
PP1800_RTC
R451 *Short_0603 C386
0.1u/10V_2

PP3300_VDDIOM
PP1800_VDDIOA C378 C387 C388 C389
4.7u/6.3V_4 0.1u/10V_2 0.1u/10V_2 0.1u/10V_2
R857 PP3300_VDDIOM
30.9K_1%_2
C382 1226_Q_added 499K PU to PP3300_VDDIOM on H1_BATT_PRES_L as in 2.82 change list
0.1u/10V_2

ADDED TO MATCH 3MS DELAY R90Q

H1
499K_1%_2 PP3300_VDDIOM

E9

A7
B2
J4
PP1800_SOC_A C439 U37
0.1u/10V_2

VDD3P3_IOM_1
VDD3P3_IOM_2
VDD3P3_IOM_3
VDD3P3_IOA
VDD3P3_IOB
G1 C1 DIOM0 R873 *Short_0201 R561
(22) RESET_H1_ODL RESETB DIOM0 SYS_RST_ODL (11,12,18,22)
R443 B1 DIOM1 R874 *Short_0201 10K_5%_2
DIOM1 A1 CCD_MODE_ODL (31)
10K_5%_2 D33 DIOM2 R875 *Short_0201
DIOM2 H1_BATT_PRES_L (37)
SDM20U30-7 A2 DIOM3 R876 *Short_0201
DIOM3 PLT_RST_L (11,12,18,23,28)
A3 DIOM4 PP3300_VDDIOM PP1800_SOC_A
DIOM4
(10) H1_PCH_INT_ODL
2 1
(22) H1_BOOT_UART_TX
TP60 B9
DIOA0
1.8V
R334 *0_5%_2 DIOA1 D8
(10) PCH_I2C_H1_SDA DIOA1
VF=0.35V@20mA H1_SLAVE_SPI_MOSI C9
DIOA2
E8 B3 R529 R448
(10,22) PCHTX_SERVORX_UART H1_SPI_MOSI DIOA3 DIOR0 EC_RST_ODL (18,22,38)
PP1800_VDDIOA D9 A4 100K_1%_2 100K_5%_2
H1_PCH_INT_L F8 DIOA4 DIOR1 B4 MECH_PWR_BTN_IN_ODL (22,25)
DIOR2
H1_SLAVE_SPI_CLK F9 DIOA5 DIOR2 A5
G8 DIOA6 DIOR3 B5 EC_KSO_02_INV (18)
(10,22) PCHRX_SERVOTX_UART H1_SPI_CLK DIOA7 DIOR4 ACOK_OD EC_ENTERING_RW (18)
G9 A6
DIOA8 DIOR5 ACOK_OD (18,37)
R445 R501 R335 *0_5%_2 DIOA9 H8 B6 R999 1K_1%_2
(10) PCH_I2C_H1_SCL H1_SLAVE_SPI_MISO_R DIOA9 DIOR6 EC_FLASH_WP_ODL (18,19,22)
10K_5%_2 10K_5%_2 H9
DIOA10
1.8V DIOR7
B7
MECH_PWR_BTN_ODL (18)
H1_SPI_MISO J9 A8 DIOR8
H1_SLAVE_SPI_CS_L J8 DIOA11 DIOR8 B8
H1_BOOT_UART_RX DIOA12 DIOR9 EC_IN_RW_OD KSO_02 (25)
TP58 H7 A9
(22) H1_BOOT_UART_RX H1_SPI_CS_L DIOA13 DIOR10 EC_IN_RW_OD (11)
J7 C8
DIOA14 DIOR11 BAT_DISABLE_ODL (37)
C C
J6 D1 H1_RDCC1 R859 *0_5%_2 USB_C0_CC1
(22,36) DEBUG_I2C_SCL DIOB0 RDCC1 H1_RDCC2 USB_C0_CC1 (29,31)
H6 D2 R860 *0_5%_2 USB_C0_CC2
(22,36) DEBUG_I2C_SDA EC_GP_SEL DIOB1 RDCC2 USB_C0_CC2 (29,31)
J5
(18) EC_GP_SEL H1_AP_FLASH_SEL DIOB2
(19) H1_AP_FLASH_SEL
H5
DIOB3
3.3V
H1_BOOT_CONFIG J3 H2 PP5000_LDO
(22) H1_BOOT_CONFIG H4 DIOB4 NC#1 H3
(18,22) UART_SERVO_TX_EC_RX DIOB5 NC#2
J2
(18,22) UART_EC_TX_SERVO_RX DIOB6
R472 R473 R203 J1 C3
(36) EN_PP3300_INA_H1_ODL DIOB7 NC#3 C4
10K_5%_2 10K_5%_2 10K_5%_2
DIOB4 - GND, BUT HAD INTERNAL PD - TIE MAY NOT BE NECESSARY NC#4 C5 C577
R304 *0_5%_2 E1 NC#5 C7 0.1u/10V_2
R308 *0_5%_2 F1 USBAN NC#6 D7
USBAP NC#7 E3
NC#8

8
R855 *Short_0201 H1_USB_C0_SBU1 E7 U8
(31) USB_C0_SBU1 NC#9
R856 *Short_0201 H1_USB_C0_SBU2 R310 *Short_0201 E2 F3 VDD -
6 OP_OUT2
(31) USB_C0_SBU2 F2 USBBN NC#10 F7 OP_OUT2 7 IN2_N
R306 *Short_0201 R718 10K_1%_2
USBBP NC#11 G3 OUT2 5 R720 100K_1%_2 USB_C0_CC2
NC#12 + IN2_P
0102_Q_Changed R306,R310 G5

VSS_10
VSS_11
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
NC#13 OP_OUT1
to a short pad NC#14
G6
- IN1_N
2
R169 R204 G7 R719 10K_1%_2 OP_OUT1 1
2M_1%_2 2M_1%_2 R172 R178 NC#15 OUT1 3 R721 100K_1%_2 USB_C0_CC1
+ IN1_P
2M_1%_2 2M_1%_2 UR0605B-FT021 VSS

C2
D4
D5
D6
E4
E5
E6
F4
F5
F6
G2
TLV8802DGKR

4
FOR EC FLASH PROGRAMMING

H1_SPI_CS_L R417 33_5%_2 SERVO_PCH_SPI_CS_L


B H1_SPI_MISO SERVO_PCH_SPI_MISO B
R409 33_5%_2
H1_SPI_MOSI R410 33_5%_2 SERVO_PCH_SPI_MOSI
H1_SPI_CLK R413 33_5%_2 SERVO_PCH_SPI_CLK

PP1800_VDDIOA PP1800_VDDIOA

stuffing option for different KB R412 R414 R416 R419


*1M_1%_2 1M_1%_2 1M_1%_2 *4.7K_1%_2
C445
*0.1u/10V_2
H1_SLAVE_SPI_CLK
DIOR2 R565 0_5%_2 KSI_02 DIOA1
14

KSI_02 (25)
U56 DIOA9
R566 *0_5%_2 KSI_03 H1_SLAVE_SPI_CS_L
VCC

KSI_03 (25)
H1_AP_FLASH_SEL 1
1OE EC_KSI_03 R5671 0_5%_2 KSI_03 R162 R165 R166 R432
H1_SPI_CS_L 2 3 SERVO_PCH_SPI_CS_L 1M_1%_2 *1M_1%_2 *1M_1%_2 1M_1%_2
1A 1Y SERVO_PCH_SPI_CS_L (19,22)
4
2OE EC_KSI_02 R567 *0_5%_2 KSI_02
H1_SPI_MOSI 5 6 SERVO_PCH_SPI_MOSI
2A 2Y SERVO_PCH_SPI_MOSI (19,22) STRAPS : SPI FOR CONVERTIBLE/CLAMPSHELL
10 DIOR8 R568 0_5%_2 EC_KSI_02
3OE EC_KSI_02 (18)
H1_SPI_CLK 9 8 SERVO_PCH_SPI_CLK R569 *0_5%_2 EC_KSI_03
3A 3Y SERVO_PCH_SPI_CLK (19,22) EC_KSI_03 (18)
13
4OE
SERVO_PCH_SPI_MISO 12 11 H1_SPI_MISO
(19,22) SERVO_PCH_SPI_MISO 4A 4Y
EPAD
VIA#1
VIA#2
VIA#3
VIA#4

GND

A A

*SN74LVC126ARGYRG4
16
17
18
19
15
7

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
H1 SECURE MICROCONTROLLER
Date: Friday, May 31, 2019 Sheet 21 of 45
5 4 3 2 1
5 4 3 2 1

(GOG)
P18 IS PCH UART REF VOLTAGE
P34 IS EC UART REF VOLTAGE
PCH SPI IS 1.8V CAN REMOVE U44, R519 IF J1 IS DNS
J1

1 2 SERVO_PCH_SPI_CLK (19,21)
(19,21) SERVO_PCH_SPI_CS_L 3 4 SERVO_PCH_SPI_MOSI (19,21)
D (19,21) SERVO_PCH_SPI_MISO 5 6 PP1800_BIOS_SPI PP3300_EC D
(19) SERVO_PCH_SPI_HOLD_L KSI_04_EC_SPI_FLASH_CLK 7 8 KSI_01_EC_SPI_FLASH_CS_L 1
TP124 1 TP127
(18) KSI_04_EC_SPI_FLASH_CLK 9 10 KSI_01_EC_SPI_FLASH_CS_L (18)
EC SPI IS 3.3V (18) KSI_03_EC_SPI_FLASH_MOSI
TP125 1 KSI_03_EC_SPI_FLASH_MOSI
11 12
KSI_02_EC_SPI_FLASH_MISO 1 TP128
KSI_02_EC_SPI_FLASH_MISO (18)
PP3300_SERVO_EC TP126 1
13 14 EC_RST_ODL (18,21,38)
15 16 PCHRX_SERVOTX_UART (10,21)

A2
PP1800_A R519
(10,21) PCHTX_SERVORX_UART 17 18
P29 IS PD UART REF VOLTAGE TP95 1
19 20
TP6 1 SV@1M_1%_2 VCC
(21) H1_BOOT_UART_RX 1 SERVO_TP2 21 22 1 MECH_PWR_BTN_IN_ODL (21,25)
TP7 TP15
TP8 1 23 24 1 TP16
(21) H1_BOOT_UART_TX SERVO_TP4 25 26 SYS_RST_SERVO_ODL Y
TP9 1 A1 A B2
27 28 SERVO_TP30 1 SYS_RST_ODL (11,12,18,21)
PP1800_RTC R278 *SV@Short_0201 TP17
29 30
31 32 UART_SERVO_TX_EC_RX (18,21)
(18,21) UART_EC_TX_SERVO_RX 33 34 PP3300_EC GND
PP3300_INA_SERVO I2C_SERVO_SDA 35 36 I2C_SERVO_SCL

B1
TP10 1 SERVO_TP39 37 38 U44
39 40 EC_FLASH_WP_ODL (18,19,21)
TP56 1 SV@SN74LVC1G07YZVR
(18) EC_GP_SEL_ODL 1 41 42
TP11
(21) H1_BOOT_CONFIG 43 44 LID_OPEN (18,26,27,39)
TP12 1 1 TP18
(21) RESET_H1_ODL 45 46
TP13 1 1 TP19
TP14 1 47 48 1 TP20
49 50

SV@AXK750147G

SERVO HEADER (H1C)


POWER FOR FLASHING EC THROUGH SERVO CAN REMOVE U44, U26, Q77, C578, C579, R128, R47, R138 R519 IF J1 IS DNS
R730
*SV@0_5%_2

C C

U26 PP3300_EC_PROG R4 R19


*SV@0_5%_2 *Short_0402
PP3300_SERVO_EC 2 7 PP3300_RTC
IN#1 OUT#1
3 8
C578 C579 IN#2 OUT#2
*[email protected]/6.3V_4 *[email protected]/6.3V_2 4 9
R728 IN#3 OUT#3
PP3300_EC_VSBY
*SV@499K_1%_2

10 C580
FAULT 4.7u/6.3V_4
5 1
EN GND
6 11
ILIM EPAD
3

R47 *SV@100K_5%_2 2 Q77 *SV@TPS2559DRCR


PP5000_LDO
*SV@BSS138 R729

*[email protected]_1%_2
1

R138
*SV@499K_1%_2

B B

CAN REMOVE Q68, Q69 IF J1 IS DNS


PP5000_LDO
2

PP5000_LDO
PP3300_INA 1 3 PP3300_INA_SERVO
2

C442
Q75 C443
I2C_SERVO_SDA 3 1 *SV@1u/10V_2 *SV@BSS138 *[email protected]/10V_4
DEBUG_I2C_SDA (21,36)
*SV@PJE138K
Q68

0103_Q_DNS Q68,Q69,C442,Q75,C443 no matter servo board is


stuffed or not, the INA feasrure was removed from DVT build
PP5000_LDO
2

I2C_SERVO_SCL 3 1
DEBUG_I2C_SCL (21,36)
A A
*SV@PJE138K
Q69

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
SERVO
Date: Friday, May 31, 2019 Sheet 22 of 45
5 4 3 2 1
5 4 3 2 1

U13B
(MMC) 32 GB EMMC STORAGE 1 A NC#A1
NC#H2
H2
A2 H3
A7 NC#A2 NC#H3
150 UA SLEEP CURRENT A8 RFU#A7/NC NC#H12
H12
H13
A9 NC#A8 NC#H13 H14
A10 NC#A9 NC#H14 J1
A11 NC#A10 NC#J1 J2
A12 NC#A11 NC#J2 J3
A13 NC#A12 NC#J3 J12
A14 NC#A13 NC#J12 J13
B1 NC#A14 NC#J13 J14
B7 NC#B1 NC#J14 K1
B8 NC#B7 NC#K1 K2
B9 NC#B8 NC#K2 K3
D PP3300_EMMC_DX B10 NC#B9 NC#K3 K6 D

U13A B11 NC#B10 RFU#K6/NC K7


E6 A3 EMMC_DAT0_R R205 10_1%_2 B12 NC#B11 RFU#K7/NC K12
VCC#1 DAT0 EMMC_DAT1_R EMMC_DAT0 (9) NC#B12 NC#K12
F5 A4 R206 10_1%_2 B13 K13
VCC#2 DAT1 EMMC_DAT1 (9)
C147 C149 J10 A5 EMMC_DAT2_R R207 10_1%_2 EMMC_DAT2 (9) B14 NC#B13 NC#K13 K14
K9 VCC#3 DAT2 B2 EMMC_DAT3_R R208 10_1%_2 C1 NC#B14 NC#K14 L1
VCC#4 DAT3 EMMC_DAT3 (9)
4.7u/10V_4 0.1u/10V_2 B3 EMMC_DAT4_R R209 10_1%_2 C3 NC#C1 NC#L1 L2
DAT4 EMMC_DAT5_R EMMC_DAT4 (9) NC#C3 NC#L2
B4 R210 10_1%_2 EMMC_DAT5 (9) C5 L3
A6 DAT5 B5 EMMC_DAT6_R R211 10_1%_2 PP1800_EMMC_DX C7 NC#C5 NC#L3 L12
VSS#5/NC DAT6 EMMC_DAT6 (9)
E7 B6 EMMC_DAT7_R R212 10_1%_2 EMMC_DAT7 (9) C8 NC#C7 NC#L12 L13
J5 VSS#1 DAT7 C9 NC#C8 NC#L13 L14
K8 VSS#6/NC M6 EMMC_CLK_R R213 10_1%_2 C10 NC#C9 NC#L14 M1
VSS#4 CLK EMMC_CLK (9)
G5 M5 EMMC_CMD_R R214 10_1%_2 EMMC_CMD (9) R323 C11 NC#C10 NC#M1 M2
H10 VSS#2 CMD H5 EMMC_RCLK_R R215 10_1%_2 C12 NC#C11 NC#M2 M3
VSS#3 DS/NC EMMC_RCLK (9)
PP1800_EMMC_DX 100K_5%_2 R427 C13 NC#C12 NC#M3 M7
*
0_5%_2 C14 NC#C13 NC#M7 M8
C6 K5 EMMC_RST_L_R D1 NC#C14 NC#M8 M9
VCCQ#1 RSTN EMMC_RST_ODL (9)
M4 D2 NC#D1 NC#M9 M10
C148 C150 N4 VCCQ#2 P10 D13 D3 NC#D2 NC#M10 M11
P5 VCCQ#3 VSF#7/NC E8 SDM20U30-7 D4 NC#D3 NC#M11 M12
4.7u/10V_4 0.1u/10V_2 P3 VCCQ#5 VSF#6/NC G10 D12 NC_Index#D4 NC#M12 M13
VCCQ#4 VSF#5/NC K10 2 1 D13 NC#D12 NC#M13 M14
VSF#4/NC PLT_RST_L (11,12,18,21,28)
P6 D14 NC#D13 NC#M14 N1
VSSQ#5 E1 NC#D14 NC#N1
P4
VSSQ#4 VF=0.35V@20mA N3
N5 F10 E2 NC#E1 NC#N3 N6
VSSQ#3 VSF#3/NC E3 NC#E2 NC#N6
N2
VSSQ#2 VSF#2/NC
E10 NOT SURE HW RESET IS NEED. SW WILL RESET THE DEVICE UPON INIT N7
C4 E9 E5 NC#E3 NC#N7 N8
VSSQ#1 VSF#1/NC E12 RFU#E5/NC NC#N8 N9
EMMC_VDDI_BYP C2 E13 NC#E12 NC#N9 N10
VDDI E14 NC#E13 NC#N10 N11
THGBMHG8C2LBAIL F1 NC#E14 NC#N11 N12
C146 F2 NC#F1 NC#N12 N13
1u/6.3V_2 F3 NC#F2 NC#N13 N14
F12 NC#F3 NC#N14 P1
F13 NC#F12 NC#P1 P2
F14 NC#F13 NC#P2 P7
G1 NC#F14 NC#P7/RFU P8
G2 NC#G1 NC#P8 P9
C C
G3 NC#G2 NC#P9 P11
G12 RFU#G3/NC NC#P11 P12
G13 NC#G12 NC#P12 P13
G14 NC#G13 NC#P13 P14
H1 NC#G14 NC#P14
NC#H1

THGBMHG8C2LBAIL

(CRD)
MICRO SD CARD
PP3300_SD_DX

C340 C116

4.7u/10V_4 0.1u/10V_2

FB4 PP3300_SD_DX_AVDD33
B B
BLM03AX241SN1D R233
1 2
4.7K_5%_2 PP3300_SD
240ohms/350mA C140 C142

0.1u/10V_2 2.2u/6.3V_2
C151 C152
PP3300_SD
U1 R51 4.7u/10V_4 0.1u/10V_2 R5677
PP1200_SD FB5 DVDD12_GL3213 *10K_1%_4
BLM03AX241SN1D 13 10 C559 *100K_1%_2
1 2 22 V33IN SD_WP
9 DVDD33 23 4.7u/10V_4
AVDD33#1 PMOS
240ohms/350mA C431 25
AVDD33#2
2.2u/6.3V_2 12 SD_DATA3 158-1000902625 J8
DVDD12 15 R217 10_1%_2 SD_DATA3_R 2
SD_D0 14 SD_CMD R218 10_1%_2 SD_CMD_R 3 CD_DAT3
SD_D1 20 6 CMD
SD_D2 19 4 VSS
C372 C421 C341 3 SD_D3 SD_CLK R219 10_1%_2 SD_CLK_R 5 VDD
28 AVDD12#1 16 SD_DATA0 R220 10_1%_2 SD_DATA0_R 7 CLK
0.1u/10V_2 0.1u/10V_2 1u/6.3V_2 C430 C143 21 AVDD12#2 SD_CLK SD_DATA1 R221 10_1%_2 SD_DATA1_R 8 DAT0
VUHSI 18 SD_DATA2 R222 10_1%_2 SD_DATA2_R 1 DAT1
100p/25V_2 1u/6.3V_2 SD_CMD SD_CD_3V3_OD 9 DAT2
27 11 10 CD
26 DM SD_CDZ GND1
DP

GND2
GND4
GND3
GND5
24
(8) USB2_P5_SD_N 1 RSTZ
(8) USB2_P5_SD_P TXN
2 17 C433
TXP GND
2

2
C138 0.1u/10V_2 USB3_P5_SD_RX_C_N
(8) USB3_P5_SD_RX_N

11
12
13
14
C139 0.1u/10V_2 USB3_P5_SD_RX_C_P 4 0.1u/10V_2 D14 C314 D15 C415 D16 C320 D17 C363 D18 C380 D19 C381
(8) USB3_P5_SD_RX_P RXN
5 6
RXP X1
*TPD1E6B06DPLR

*10p/25V_2

*TPD1E6B06DPLR

*10p/25V_2

*TPD1E6B06DPLR

*10p/25V_2

*TPD1E6B06DPLR

*10p/25V_2

*TPD1E6B06DPLR

*10p/25V_2

*TPD1E6B06DPLR

*10p/25V_2
7
(8) USB3_P5_SD_TX_N
1

1
X2 R234
(8) USB3_P5_SD_TX_P
29 8 *200K_1%_2
EPAD RTERM
A GL3213S-OHY05
Normal Open A
R232
R286
680_1%_2 *1K_1%_2
SD_CDZ:0 card insert
Y1
*XRCGB25M000F3M00R0
3 1
4 2

C154
Quanta Computer Inc.
C153
*12p/25V_2
*Short_0201 PROJECT : ZBA/ZBB
0102_Q_Changed C154 to a short pad Size Document Number Rev
1A
eMMC/SD
Date: Friday, May 31, 2019 Sheet 23 of 45
5 4 3 2 1
5 4 3 2 1

LEFT CHANNEL CSP PACKAGE, BUT CAN BE ROUTED ON TYPE-3


(AMP) <10UA IN DEEP SLEEP
PP5000_A
C11 C12 (AMP)
PP3300_A
U27 10u/10V_4 0.1u/10V_2
SPK_PA_EN R99 2K_1%_2 LSPK_PA_EN A1 A2
(9) SPK_PA_EN SD_MODE VDD
I2S_SCLK_SPKR R43 *Short_0201 I2S_SCLK_SPKR_LC_R C1 B2 PP1800_A C17
(9) I2S_SCLK_SPKR BCLK GAIN_SLOT

(9) I2S_SFRM_SPKR
I2S_SFRM_SPKR R44 *Short_0201 I2S_SFRM_SPKR_LC_R C3
LRCLK
1u/16V_4 FILTER IF LEFT NOT ISOLATED
U10
A3 SPKR_LEFT_P_R R103 *Short_0603 SPKR_LEFT_P C14 C13
I2S_PCH_TX_SPKR_RX R96 *Short_0201 I2S_PCH_TX_SPKR_RX_LC_R B1 OUTP C5 A3 HP_LEFT
D (9) I2S_PCH_TX_SPKR_RX DIN SPKR_LEFT_N_R SPKR_LEFT_N VDD HP_L HP_RIGHT PP3300_A D
B3 R102 *Short_0603 1u/16V_4 1u/16V_4 A13 A5
OUTN D4 VDD_MIC HP_R
C2 VDDIO
GND A1 HP_CHARGE_PUMP_P C25 1u/16V_4
MAX98357AEWL MIC_N A15 HPCSP C1 HP_CHARGE_PUMP_N C24 1u/16V_4 R113
MIC_P B16 MIC_N HPCSN C3 HP_FLY_CAP_N
MIC_P HPCFN D2 HP_FLY_CAP_P C20 1u/16V_4 *100K_1%_2
HPCFP
C7 D16 HP_JACK_DET_L
(9) I2S_PCH_TX_HP_RX DATIN JACKDET
LEFT CHANNEL = SHORT (OR 2K FOR SAFETY) TO 1.8V (9) I2S_PCH_RX_HP_TX
C9
DATOUT SLEEVE
A11 HP_SLEEVE
GAIN_SLOT: 100K TO GND = 15 DB GAIN B6 HP_SLEEVE_SENSE C273
SLEEVE_SENSE C13 HP_RING2
GAIN_SLOT: 0 TO GND = 12 DB GAIN D8 RING2 B4 HP_RING2_SENSE *1u/16V_4
GAIN_SLOT: UNCONNECTED = 9 DB GAIN (9) I2S_SFRM_HP D6 WLCK RING2_SENSE C15
GAIN_SLOT: 0 TO VDD = 6 DB GAIN (9) I2S_SCLK_HP
C11 BCLK MIC
(9) I2S_MCLK_HP MCLK
GAIN_SLOT: 100K TO VDD = 3 DB GAIN HP_MIC_PWR R112 2.2K_1%_2 HP_MICBIAS

D12 A9 HP_VMID C23 1u/16V_4


(10) PCH_I2C_AUDIO_SCL D14 SCL VMID A7 HP_VREF C22 1u/16V_4
(10) PCH_I2C_AUDIO_SDA SDA VREF HP_DACREF
B8 C19 1u/16V_4
R107 10K_1%_2 DACREF
PP1800_SOC_A
RIGHT CHANNEL (12) HP_INT_ODL
D10
nIRQ B14 HP_MICBIAS
MICBIAS
PP5000_A
B2 C18
GND_CP
C269 C271 I2C ADDRESSES: B12
GNDCHP GND
B10
0X18 1u/16V_4
U3 10u/10V_4 0.1u/10V_2
SPK_PA_EN R343 69.8K_1%_2 RSPK_PA_EN A1 A2
0X19 DA7219-02VBA
SD_MODE VDD 0X1A (DEFAULT)
I2S_SCLK_SPKR R344 *Short_0201 I2S_SCLK_SPKR_RC_R C1 B2 0X1B
BCLK GAIN_SLOT
I2S_SFRM_SPKR R339 *Short_0201 I2S_SFRM_SPKR_RC_R C3
LRCLK
A3 SPKR_RIGHT_P_R R374 *Short_0603 SPKR_RIGHT_P
I2S_PCH_TX_SPKR_RX R366 *Short_0201 I2S_PCH_TX_SPKR_RX_RC_R B1 OUTP
DIN B3 SPKR_RIGHT_N_R R388 *Short_0603 SPKR_RIGHT_N
OUTN
C C
C2
GND (ADO)
MAX98357AEWL

5K TO FILTER LEFT IF NOT ISOLATED


RIGHT CHANNEL = 69.8K TO 1.8V
GAIN_SLOT: GND = 12 DB GAIN
HP_RING2_SENSE R28 *Short_0201

J2
MIC_N C15 1u/16V_4 HP_RING2 3 7
HP_LEFT R108 *Short_0402 HP_TIP 1

5
R106 HP_JACK_DET_L R305 *Short_0402 HP_TERM_MAKETERM 6
HP_RIGHT R109 *Short_0402 HP_RING1 2
*5.11K_1%_4 MIC_P C16 1u/16V_4 HP_SLEEVE 4
(ADO) R223 2SJ3080-120111F
HP_SLEEVE_SENSE R27 *Short_0201
*5.11K_1%_4

2
D3 D4 D32 D5 D6

TPD1E6B06DPLR

TPD1E6B06DPLR

TPD1E6B06DPLR

TPD1E6B06DPLR

TPD1E6B06DPLR
1

1
CN4
SPKR_LEFT_N
SPKR_LEFT_P 3
SPKR_RIGHT_N 4
SPKR_RIGHT_P 1 5
2 6
50278-00401-V01
C21 C145 C343 C357
B B

*10p/25V_2 *10p/25V_2 *10p/25V_2 *10p/25V_2

CHANGED MIC SERIES CAPS TO 1UF TO MATCH 10HZ 3DB


FREQUENCY RECOMMENDED IN THE DA7219 DATASHEET
THE TWO SENSE SIGNALS NEED TO BE CLOSE TO THE JACK CONNECTOR
ROUTE HP_RING2 AND HP_RING2_SENSE TOGETHER (TREAT AS DIFF PAIR EXCEPT NO NEED FOR IMPEDANCE CONTROL
THE SAME APPLIES TO HP_SLEEVE AND HP_SLEEVE_SENSE SIGNALS
ROUTE HP_RING2, HP_RING2_SENSE, HP_SLEEVE, HP_SLEEVE_SENSE BETWEEN HP_LEFT AND HP_RIGHT WHERE POSSIBLE

(THM)

PP3300_A

R353

51.1K_1%_2

TEMP_SENSOR_AMB
1

R354

47K_NTC_4_1%
A A
2

EC_AVSS (18)
Note for placement, it
needs to be placed near CPU
requested by thermal team

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
AUDIO
Date: Friday, May 31, 2019 Sheet 24 of 45
5 4 3 2 1
5 4 3 2 1

(PEN)
PP1800_A
PEN/STYLUS CONNECTOR
TOUCHSCREEN + STYLUS ( IF AVAILABLE ) PEN 7-BIT I2C ADDRESS = 0X09
PP1800_EC C344
TOUCHSCREEN AND PEN/STYLUS POWER TOGETHER ~ 100 MA
Q59 R684
[email protected]/10V_4 PEN@AO3415 PP1800_PEN_R *Short_0.1_1%_4 PP1800_PEN_DX (PEN)
PP1800_PEN_DX
R682 1 3

PEN@100K_5%_2 C345
PP1800_A PP1800_PEN_DX

2
[email protected]/10V_2 R514 R515
J22
*PEN@100K_5%_2 *PEN@100K_5%_2 1 10
(10) PCH_I2C_PEN_1V8_SDA
2 9
D (10) PCH_I2C_PEN_1V8_SCL D
R683 R5148 3
PP3300_PEN_DX
4
PEN@200_1%_2 100K_5%_2 PP1800_PEN_DX 5

2
PEN_PDCT_CONN_ODL 6
PEN_INT_CONN_ODL 7
3 1 PEN_PDCT_CONN_ODL PEN_RESET_ODL 8
(12) PEN_PDCT_ODL

3
2 *PEN@PJE138K PP3300_PEN_DX PEN@50208-00801-V02
(12,35) EN_PP3300_TOUCHSCREEN
Q58 Q835
PEN@PJE138K
R5157 *PEN@Short_0201

1
R513
0102_Q_Changed R5157,R5158 to a short pad
PEN@100K_5%_2
PP1800_A PP1800_PEN_DX

3
R5159 2 Q83
(12) PEN_RESET
PEN@PJE138K
100K_5%_2

1
3 1 PEN_INT_CONN_ODL
(12) PEN_INT_ODL
*PEN@PJE138K
Q837
(KBL)
J19
PEN@196479-04041-3_PEN_4Pin
R5158 *PEN@Short_0201
PPVAR_SYS PPVAR_SYS_KB_BL_DX_R R164 PPVAR_SYS_KB_BL_DX 1
(12) PEN_EJECT 2 1 5
1 3 3 2 5 6
3 6
STUFF R5148,R5159,R5157,R5158 DEFAULT Q90
4
4
IF LEAKAGE FOUND, STUFF Q835,Q837,R514,R515 R751 *KBL@AO3415 *[email protected]_1%_4

2
C C

AND DEPOP R5157,R5158,R5148,R5159 *KBL@100K_5%_2

PEN_EJECT FOR GARAGED STYLUS. IT WILL BE A WAKE SOURCE

3
2
(18) KB_BL_PWR_EN
Q89
*KBL@PJE138K
R750
(KBC)

1
*KBL@100K_5%_2

KEYBOARD (KBL) KEYBOARD BACKLIGHT CONN


IF=0.2A, VF=0.3~0.35V @IF=20~40mA
CM TO CHOOSE CONNECTOR- THIS ONE WILL SUPPORT THE KEYPAD SO THE PINOUT MAY NEED TO CHANGE PPVAR_SYS_KB_BL_DX
L17
*KBL@22uH_2.5x2.0x1.2
D31
*KBL@PMEG3002AEL
*KBL@50505-00401-V01
J9 1 2 2 1
4 6
1
1 KSO_12
KSO_12 (18) PHT25201B-220MS 3 5
2 KSO_08 C585
2 3 KSO_09 KSO_08 (18) 2
C583
3 KSO_11 KSO_09 (18) 1
4 *[email protected]/50V_6
4 5 KSO_10 KSO_11 (18) J23
*KBL@1u/25V_4 U30
5 KSO_10 (18)
6 *KBL@TPS61161DRVR
6 7 6 4
7 8 KSO_05 VIN SW 1
8 KSO_06 KSO_05 (18) FB
9 5

TPAD1
TPAD2
9 10 KSO_06 (18) (18) KB_BL_PWM CTRL 3
10 11 KSO_03 2 GND 7
11 KSO_02 KSO_03 (18) COMP PAD
12 R754
12 13 KSI_00 KSO_02 (21)
C584
KSI_00 (18)

8
9
13 14 KSO_01 *[email protected]_5%_2
14 15 KSO_04 KSO_01 (18)
*[email protected]/10V_2
15 KSI_03 KSO_04 (18)
16
B 16 KSI_02 KSI_03 (21) B
17
17 18 KSO_00 KSI_02 (21)
18 KSI_05 KSO_00 (18)
19
19 20 KSI_04 KSI_05 (18)
20 KSO_07 KSI_04 (18)
21
21 KSI_06 KSO_07 (18)
22
22 KSI_06 (18)

TRACKPAD CONNECTOR
23 KSI_07
23 KSI_01 KSI_07 (18)
24
24 25 KBD_PWR_BTN_ODL KSI_01 (18)
25
26
26
27
KSO_13
KSO_13 (18) CM TO CHOOSE CONNECTOR
27 28 KSO_14
28 KSO_14 (18)
32 29 1 TP40
31 G2
G1
29
30
30 1 TP46 (TPD)
1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

D26 D27 D28 D25 D30 D29 PP3300_TRACKPAD_DX


51646-0300N-V01 0102_Q_Changed R72 to a short pad
1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

R72 R253 C190 C192 C195


GND

GND

GND

GND

GND

GND

PP1800_SOC_A *Short_0201 10K_5%_2 10u/10V_4 1u/6.3V_2 0.1u/10V_2


*TPD4E101DPWR *TPD4E101DPWR *TPD4E101DPWR *TPD4E101DPWR *TPD4E101DPWR *TPD4E101DPWR
5

J12
STUFF THESE FOR KEYBOARD LOCK BUTTON 6 7
5 6 G1 8
(10) PCH_I2C_TRACKPAD_3V3_SDA 5 G2

5
KSO_09 KSI_03 4
(10) PCH_I2C_TRACKPAD_3V3_SCL
0 ohm for BOM option 3 4
1 6 3 4 TRACKPAD_INT_3V3_ODL 2 3
(12,18) TRACKPAD_INT_1V8_ODL 1 TRACKPAD_BTN_L 1 2
R246 R248 TP32
(FSW) 1
SW@0_5%_2 SW@0_5%_2 Q47B Q47A 50506-00601-V01
PP3300_RTC PMDXB600UNE PMDXB600UNE
KBD_PWR_BTN_GND KBD_PWR_BTN_ODL

A
R247 R249 R250
AVOIDS ANY LEAKAGE WITHOUT SOFTWARE EFFORTS A

SW3
THE PURPOSE OF THIS CIRCUIT NSW@0_5%_2 NSW@0_5%_2 10K_5%_2
IS TO ALLOW A SINGLE KEYBOARD MECH_PWR_BTN_IN_ODL 1 3
MATRIX FOR BOTH A CONVERTIBLE
AND CLAMSHELL SKU
2

(21,22) MECH_PWR_BTN_IN_ODL 2 4
D21
STUFF THESE FOR KEYBOARD POWER BUTTON TPD1E6B06DPLR
SW@NTC316-AD1T-A160T-A Quanta Computer Inc.
1

Convertible R246,R248,SW3 STUFF ; R247,R249 NC PROJECT : ZBA/ZBB


Size Document Number Rev
Clamshell R247,R249 STUFF ; R246,R248,SW3 NC KB, TP, PEN 1A

Date: Friday, May 31, 2019 Sheet 25 of 45


5 4 3 2 1
5 4 3 2 1

EDP2-EDP3 DOES NOT NEED TO ROUTE TO CONNECTOR


(LDS)
L2
C8 0.1u/10V_2 EDP_TX1_C_N 2 1 EDP_TX1_L_N
(7) EDP_TX1_N EDP_TX1_C_P EDP_TX1_L_P
C71 0.1u/10V_2 3 4
(7) EDP_TX1_P
DLP11SA900HL2L

Q13B
PMDXB600UNE
(7) EDP_TX0_N
C117 0.1u/10V_2 EDP_TX0_C_N 2
L21
1 EDP_TX0_L_N
EDP + MIC + SENSOR +CAMERA CONNECTOR
C118 0.1u/10V_2 EDP_TX0_C_P 3 4 EDP_TX0_L_P
CON_EDP_BKLTCTL_3V3 (7) EDP_TX0_P
1 6
D (7) SOC_EDP_BKLTCTL_1V8 D
DLP11SA900HL2L
R117
10K_5%_2 (MIC)

2
1 TP23 R320 *0_5%_2
(7) EDP_TX3_N (9) DMIC_CLK1_G
PP1800_S PP3300_EDP_DX 1 TP33
(7) EDP_TX3_P DMIC_CLK2 DMIC_CLK2_J
R225 *Short_0201
(9,40) DMIC_CLK2

5
R116 100K_5%_2 R118 R263 0102_Q_Changed R225 to a short pad
10K_5%_2 *200K_1%_2
4 3 CON_EDP_BKLTEN_3V3 1 TP34
(18) EC_BL_EN_OD (7) EDP_TX2_N
1 TP35
(7) EDP_TX2_P
1 2 Q13A
DMIC 1.8V POWER J15
(7) SOC_EDP_BKLTEN
PMDXB600UNE PP1800_A 1
D8 Vgs(th)=0.95V EDP_TX1_L_N 2
RB500V-40
3
VF=0.45V@10mA C422 EDP_TX1_L_P
4
0.1u/6.3V_2 5
1 2
(18,22,27,39) LID_OPEN (9) DMIC_DATA 6
(9) DMIC_CLK1 DMIC_CLK2_J 7
D12
RB500V-40 L1 8
9
VF=0.45V (FCM) (8) USB2_P6_UCAM_N
2 1 USB2_P6_UCAM_CMC_N
10
3 4 USB2_P6_UCAM_CMC_P
(8) USB2_P6_UCAM_P 11
DLP11SA900HL2L 12
PP3300_CAMERA_S 13
14
C423 EDP_TX0_L_N 15
EDP_TX0_L_P 16
0.1u/6.3V_2 17
(LDS) (7) EDP_AUX_PANEL_P
C119 0.1u/10V_2 EDP_AUX_PANEL_C_P 18
19
C120 0.1u/10V_2 EDP_AUX_PANEL_C_N
(7) EDP_AUX_PANEL_N 20
21
(7) EDP_HPD_PANEL CON_EDP_BKLTEN_3V3 22
CON_EDP_BKLTCTL_3V3 23
R125 24
C C
25
100K_5%_2 26
PP3300_EDP_DX 27
PPVAR_SYS PPVAR_BL_PWR 28
F2 29
1 2 30
31
1812L150/24MR C122 32
C123 33
34
2nd source:
LID ACCEL-CORAL
22u/25V_8 0.01u/50V_4 PP3300_TOUCHSCREEN_DX 35
(FCM) DK150VPU002/LP-MSM150/24 (10) PCH_I2C_TOUCHSCREEN_3V3_SDA
(10) PCH_I2C_TOUCHSCREEN_3V3_SCL
36
37
PP1800_SENSOR_U PP3300_CAMERA_S TOUCHSCREEN_INT_3V3_ODL
(ACS) TOUCHSCREEN_RST_3V3_ODL 38
39 41
40 42
C108
C109 C110 C121 196522-40041-3
[email protected]/10V_4 [email protected]/6.3V_2 0.1u/6.3V_2 1000p/50V_4

(LDS)
PP3300_EDP_DX
(TSN)
PP1800_SOC_A PP3300_TOUCHSCREEN_DX
PP1800_SENSOR_U C124 C125
4.7u/10V_4 0.1u/6.3V_2 R123 R126

5
10K_5%_2 TN@10K_5%_2
J24
1 1 6 3 4 TOUCHSCREEN_INT_3V3_ODL
2 1 (12) TOUCHSCREEN_INT_ODL
LID_ACCEL_INT_L 3 2
B (18) LID_ACCEL_INT_L EC_I2C_SENSOR_U_SDA 3 B
4 Q10B Q10A
(18,27) EC_I2C_SENSOR_U_SDA EC_I2C_SENSOR_U_SCL 5 4 7 TN@PMDXB600UNE TN@PMDXB600UNE
(18,27) EC_I2C_SENSOR_U_SCL 5 7
6 8
6 8
GS@50208-00601-V02

I2C MODE: ( SET BY NCS TIE TO VDDIO )


WFC CAMERA
I2C 8bit ADDRESS: 0X3E (SDO_ADDR = VDDIO) (RCM) (TSN)
I2C MAX SPEED = 3.4MHZ
WFC INTERFACE PINOUT TBD. PENDING CHANGE
PP3300_TOUCHSCREEN_DX

C126

[email protected]/10V_4
PP3300_TOUCHSCREEN_DX

L12 J20
2CM@DLP11SA900HL2L 1
2 1 USB2_P7_WCAM_CMC_P 2 1 R127
(8) USB2_P7_WCAM_P USB2_P7_WCAM_CMC_N 2
3 4 3
(8) USB2_P7_WCAM_N 4 3 TN@10K_5%_2
5 4 7
6 5 7 8 TOUCHSCREEN_RST_3V3_ODL
PP3300_CAMERA_S 6 8
C444 2CM@50208-00601-V02

3
Q9
[email protected]/10V_4 2
(12) TOUCHSCREEN_RST
TN@PJE138K

1
A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
LID(eDP/CAM/TOUCH/SENSOR)
Date: Friday, May 31, 2019 Sheet 26 of 45
5 4 3 2 1
5 4 3 2 1

(GRS)

PP1800_SENSOR_U_IMU PP1800_SENSOR_U

R434 [email protected]_1%_4

C511 C512
D D
U35 R398 R404
EC_I2C_SENSOR_U_SCL 13 5 [email protected]/6.3V_2 GY@1u/6.3V_4
(18,26) EC_I2C_SENSOR_U_SCL EC_I2C_SENSOR_U_SDA SCL VDDIO
14 8 GY@10K_5%_2 GY@10K_5%_2
(18,26) EC_I2C_SENSOR_U_SDA
R377 *GY@Short_0201 1 SDA
SDO/SA0
VDD
CS
12 (ECS)
10 3 COMPASS_I2C_SCL
11 NC1 SCX 2 COMPASS_I2C_SDA
NC2 SDX
PP1800_SENSOR_U_MAG R701 PP1800_SENSOR_U
BASE_SIXAXIS_INT_L 4 6 PP1800_SENSOR_U U36 *[email protected]_1%_2
(18) BASE_SIXAXIS_INT_L 1 BASE_SIXAXIS_INT2_L 9 INT1 GND1 7 9
TP55
INT2 GND2 VDD 10
GY@BMI160 VDDIO C514 C515
R75 COMPASS_I2C_SDA 4 3
COMPASS_I2C_SCL 1 SDA/SDI/SDO CS *[email protected]/6.3V_2 *ECS@10u/10V_4
*ECS@10K_5%_2 SCL/SPC 2
RES_1
IMU
11
TP99 1 COMPASS_INT_L 7 RES_2 12
INT/DRDY RES_3
6
5 GND_1 8
C1 GND_2
MODE 2 (SLAVE TO EC, MASTER TO MAG)
C513 *ECS@LIS2MDLTR
I2C MODE: SET BY CS PIN TO HI *[email protected]/6.3V_2
I2C ADDR: 7'0X68 (LSB SET BY SD0/SA0) -->8'0xD0h

(ACM) 0 ohm for BOM option


MAGNETOMETER
R30Q~R32Q place near to IMU U35
EC_I2C_SENSOR_U_SCL R30Q ACM@0_5%_2
EC_I2C_SENSOR_U_SCL_WFC (40) SLAVE TO IMU SENSOR
EC_I2C_SENSOR_U_SDA R31Q ACM@0_5%_2
BASE_SIXAXIS_INT_L EC_I2C_SENSOR_U_SDA_WFC (40)
R32Q ACM@0_5%_2
C
BASE_SIXAXIS_INT_L_WFC (40) I2C MODE: SET BY CS PIN TO HI C

I2C ADDR: 0X1E

for AR Camera, IMU can be DNS, but R30Q,R31Q,R32Q need to be stuffed

GMR SENSOR (RESERVED FOR ON BOARD SITUATIOM (UIF)

(GMR_MLB) For on board GMR

(18,22,26,39) LID_OPEN
LID_OPEN R293 *1K_1%_2 LID_OPEN_MLB 4
OUT1
U19
OUT2
1 TABLET_MODE_L_MLB R294 *0_5%_2
TABLET_MODE_L (18,39)
CHARGE/BATTERY LED
PP3300_RTC 3 2
VDD GND
C70 *HGDEDM013A

*0.1u/6.3V_2

B B

MAKE SURE TO CHECK THE POLARITY OF MAGNET TO ASSIGN THE PIN LID-OPEN AND TABLET-MODE PP3300_EC

IF THE GMR SENSOR IS NOT PLACED ON THE MLB, PLEASE CAREFULLY PLAN THE PINOUT ON THE SUB-BOARD INTERFACE.

3
D7
LED_AMBER/BLUE

Orange Blue RED LED AT ~13 MA

2
GREEN LED AT ~5 MA
TUNE VALUES BASED ON LEDS
EC CAN DRIVE 12MA
R114 R115

4.7K_1%_4 2K_1%_4

LED_2_L (18)

LED_1_L (18)

A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
SENSOR(COMPASS/GYRO)(OP1)
Date: Friday, May 31, 2019 Sheet 27 of 45
5 4 3 2 1
5 4 3 2 1

WIFI
CM TO CHOOSE CONNECTOR

(NGF)
0107_Q_DNS R34,R35 since pin53, pin55 of M.2 are
PP3300_WLAN_DX not used in Jefferson peak 9560
D D
C73 J4
C3565 C111 PP3300_WLAN_DX
0.01u/10V_2 10u/10V_4 0.1u/10V_2
74 75
72 3.3V#4 GND#11 73
3.3V#3 REFCLKN1 CNVI_CLK_PCH_TX_WLAN_RX_P (10)
70 71
UIM_POWER_SRC REFCLKP1 CNVI_CLK_PCH_TX_WLAN_RX_N (10)
0102_Q_Changed R711 to a short pad 68
UIM_POWER_SNK GND#10
69 R34 R35
R711 *Short_0201 66 67
64 UIM_SWP PERN1 65 CNVI_D0_PCH_TX_WLAN_RX_P (10)
*100K_5%_2 *100K_5%_2
(10) WLAN_CLKOUT_LCP RESERVED PERP1 CNVI_D0_PCH_TX_WLAN_RX_N (10)
62 63
60 ALERT_L GND#9 61
58 I2C_CLK PETN1 59 CNVI_D1_PCH_TX_WLAN_RX_P (10)
WIFI_DISABLE_3V3_L I2C_DATA PETP1 CNVI_D1_PCH_TX_WLAN_RX_N (10)
TP92 1 56 57
TP93 1 BT_DISABLE_3V3_L 54 W_DISABLE1_L GND#8 55
WLAN_PLT_RST_ODL_L W_DISABLE2_L PEWAKE0# WLAN_PCIE_WAKE_3V3_ODL (8)
52 53
WLAN_SUSCLK PERST0_L CLKREQ0_L WLAN_PCIE_CLKREQ_3V3_ODL (8)
R705 0_5%_2 50 51
(12) CNVI_MFUART2_RXD 48 SUSCLK GND#7 49
TP154 1 R706 *0_5%_2
(38) COEX1 COEX1 REFCLKN0 PCIE_WLAN_CLK_N (8)
R707 0_5%_2 46 47
(12) CNVI_MFUART2_TXD 44 COEX2 REFCLKP0 45 PCIE_WLAN_CLK_P (8)
TP155 1 R708 *0_5%_2
(38) COEX2 COEX3 GND#6
R709 0_5%_2 42 43
(12) CNVI_GNSS_PA_BLANKING VENDOR DEF#3 PERN0 PCIE_PCH_RX_WLAN_TX_N (8)
TP156 1 R710 *0_5%_2 40 41
(38) COEX3 38 VENDOR DEF#2 PERP0 39 PCIE_PCH_RX_WLAN_TX_P (8)
CNVI_BRI_DT 36 VENDOR DEF#1 GND#5 37 PCIE_PCH_TX_WLAN_RX_N C113 *0.1u/10V_2
(10) CNVI_BRI_DT CNVI_RGI_RSP_R 34 UART RTS PETN0 35 PCIE_PCH_TX_WLAN_RX_P PCIE_PCH_TX_WLAN_RX_C_N (8)
R30 33_1%_2 C114 *0.1u/10V_2
(10) CNVI_RGI_RSP UART CTS PETP0 PCIE_PCH_TX_WLAN_RX_C_P (8)
(10) CNVI_RGI_DT
32 1.8V 33
UART TXD GND#4
These 0 ohm are used in 0107_Q_DNS C113,C114 since pin35, pin37 of M.2 are
option BOM for PCIe, or PCIE M.2 NGFF not used in Jefferson peak 9560
CNVi
E-KEY SOCKET

R31 33_1%_2 CNVI_BRI_RSP_R 22 1.8V 23


(10) CNVI_BRI_RSP UART RXD SDIO RESET_L CNVI_CLK_PCH_RX_WLAN_TX_P (10)
20 21
UART WAKE_L SDIO WAKE_L CNVI_CLK_PCH_RX_WLAN_TX_N (10)
18 19
16 GND#3 SDIO DATA3 17
LED2 SDIO DATA2 CNVI_D0_PCH_RX_WLAN_TX_P (10)
C 14 15 C
(10) WLAN_CLKREQ0 12 PCM_OUT SDIO DATA1 13 CNVI_D0_PCH_RX_WLAN_TX_N (10)
PCM_IN SDIO DATA0
(10) CNVI_RF_RESET_L
10 1.8V 11
CNVI_D1_PCH_RX_WLAN_TX_P (10)
R15 8 PCM_SYNC SDIO CMD 9
6 PCM_CLK SDIO CLK 7 CNVI_D1_PCH_RX_WLAN_TX_N (10)
10K_5%_2 4 LED1 GND#2 5
PP3300_WLAN_DX 3.3V#2 USB_DN USB2_P2_BT_N (8)
2 3
3.3V#1 USB_DP USB2_P2_BT_P (8)

GND#12
GND#13
C75 1
C112 GND#1

NC#1
NC#2
C3566 10u/10V_4 0.1u/10V_2
0.01u/10V_2

78
79

76
77
NGFF_E-KEY
PP1800_SOC_A

R290
*20K_1%_2

CNVI_BRI_DT

PLACE THE PULL-UP R CLOSE TO M.2. ( FOR DEBUG )


PP3300_WLAN_DX

PP1800_SOC_A PP3300_WLAN_DX
R38
R714

A2
D9 *100K_5%_2 U46 *SN74LVC1G17YZVR
2

4.7K_5%_2 *RB500V-40

A2
B B
1 6 3 4 WIFI_DISABLE_3V3_L 1 2 WLAN_PLT_RST_ODL A1 B2 WLAN_PLT_RST_ODL_L
(8) WIFI_DISABLE_L (11,12,18,21,23) PLT_RST_L A1 B2
VF=0.45V@10mA

B1
Q72B Q72A
PMDXB600UNE PMDXB600UNE R1402

B1
3
100K_5%_2
2
(9) WLAN_PE_RST
Q45 R536 *0_2
*PJE138K
PP3300_WLAN_DX

1
0107_Q_DNS U46,R38,D9,Q45 since pin52, pin66 of M.2 are
R715 not used in Jefferson peak 9560
*4.7K_5%_2

R1400 *Short_0201 BT_DISABLE_3V3_L


(11) BT_DISABLE_L

PP3300_WLAN_DX

R39

D10 10K_5%_2
*RB500V-40

1 2 WLAN_SUSCLK
(11) PCH_SUSCLK
A VF=0.45V@10mA A

U46,R38,D9,Q45,C113,C114,R34,R35,Q1,Q2 need to be
stuffed for WiFi flexible design

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
WIFI/BT CONNECTOR
Date: Friday, May 31, 2019 Sheet 28 of 45
5 4 3 2 1
5 4 3 2 1

0102_Q_Changed R581 to a short pad PP3300_PD_A

R581 *Short_0402

1 2
FB1Q *BLM03AX241SN1D
PP3300_PD_ANA
PP3300_ANX

R878 *0_5%_4
(UTC1)
FB3
D D

FOR USB-C PORT 0


BLM03AX241SN1D
1 2

C159 C158 C576 240ohms/350mA C157

0.1u/10V_2 0.1u/10V_2 1u/10V_2 0.1u/10V_2


PP1800_SOC_A
U16

1 13
(7) DDI0_TX0_P DP_LN_0P AVDD33_1
R301 2 24
(7) DDI0_TX0_N DP_LN_0N AVDD33_2 39
100K_5%_2 DVDD_IO
7
(7) DDI0_TX1_P 8 DP_LN_1P 25 USB_C0_TX1_C_P C566 0.1u/10V_2
(7) DDI0_TX1_N DP_LN_1N SSTXP1 USB_C0_TX1_C_N USB_C0_TX1_P (31)
26 C568 0.1u/10V_2
(7,18) USB_C0_HPD_1V8_ODL SSTXN1 USB_C0_TX1_N (31)
9
(7) DDI0_TX2_P 10 DP_LN_2P 31
(7) DDI0_TX2_N DP_LN_2N SSRXP1 USB_C0_RX1_P (31)
3

TO MLB CONNECTOR
32
2 3 SSRXN1 USB_C0_RX1_N (31)
(7) DDI0_TX3_P DP_LN_3P
AP
4 30 USB_C0_TX2_C_P C569 0.1u/10V_2
(7) DDI0_TX3_N DP_LN_3N SSTXP2 USB_C0_TX2_C_N USB_C0_TX2_P (31)
Q18 29 C570 0.1u/10V_2
16 SSTXN2 USB_C0_TX2_N (31)
PJE138K R200
(7) DDI0_AUX_P
1

AUXP
100K_5%_2 (7) DDI0_AUX_N
17
AUXN SSRXP2
34
USB_C0_RX2_P (31) leave USB_C0_DISCHARGE/EN_USB_C0_5V_3A_ILIM
33
12 SSRXN2 USB_C0_RX2_N (31) NC and keep components being stuffed for
(8) USB3_P0_C0_TX_P
11 SSTX_P 22 debug purpose
(8) USB3_P0_C0_TX_N SSTX_N CC1 21 USB_C0_CC1 (21,31)
CC2 USB_C0_CC2 (21,31)
6 19
(8) USB3_P0_C0_RX_P 5 SSRX_P SBU1 18 USB_C0_SBU1_ANX (31)
(8) USB3_P0_C0_RX_N SSRX_N SBU2 USB_C0_SBU2_ANX (31)
PP3300_PD_ANA USB_C0_HPD_3V3 36 44 R563 *Short_0201
HPD SOURCE_CTRL EN_USB_C0_5V_OUT (32)
35 R564 *Short_0201 USB_C0_DISCHARGE R315 R319
PP3300_ANX USB_C0_DRP_EN 28 DISCH_CTRL 43 R651 *Short_0201
ROLE_SEL SINK_CTRL USB_C0_CHARGE_ON (32)
*2M_1%_2 *2M_1%_2
TP45 1 USB_C0_PD_RST 46 41 EN_USB_C0_5V_3A_ILIM 1 TP98
R428 R562 R303 TP84 1 TP_TEST_EN 45 TEST_R FF0 42 1 TP100
100K_5%_2 TEST_EN FF1
C *4.7K_1%_2 4.7K_1%_2 38 15 VBUS_DIV R330 348K_1%_4 C
(18,32) EC_I2C_USB_C0_MUX_SCL CFG_SCL VBUS_SENSE VBUS_OCP_CURRENT_SENSE PPVAR_USB_C0_VBUS
37 20 1 TP104
(18,32) EC_I2C_USB_C0_MUX_SDA CFG_SDA VBUS_OCP
USB_I2C_ADR0_C0 48 23 R333
USB_I2C_ADR1_C0 I2C_ADR_0 VCONN_PWR PP5000_A
47
I2C_ADR_1 14 C267 49.9K_1%_2
USB_C0_MUX_INT_ODL 40 NC_1 27
(18) USB_C0_MUX_INT_ODL INTP_OUT NC_2 4.7u/10V_4
49
EP_GND
DEFAULT I2C ADDRESS: 0X58
IF ADR1 IS PULLED UP: 0X7C ANX3447QN-AC-R

WITH THE NX20P3483, THE VBUS DISCHARGE CAN BE SW CONTROL

Q32
*AO3415

1 3
PP3300_PD_A USB_C0_PD_RST (18)

R435
2

*100K_1%_2 C64Q
*10p/25V_2
(18,39) USB_C1_PD_RST_ODL

B USB_C0_PD_RST IS ACTIVE HIGH WITH 100K INTERNAL PD B

A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
USB C TCPC/MUX(OP2)
Date: Friday, May 31, 2019 Sheet 29 of 45
5 4 3 2 1
5 4 3 2 1

BC 1.2 FOR THE TYPE-A PORT A0


(UBC1)
PP5000_A R677 PP5000_A_BC12_A0 PP5000_USB_A0_VBUS

D D

C196
*Short_0.1_1%_4 R256 R258 R260 R262 U18 (UB31)
22u/10V_6 1 12
100K_5%_2 100K_5%_2 100K_5%_2 100K_5%_2 IN OUT

(8) USB2_P1_A0_N
(8) USB2_P1_A0_P
2
3 DM_OUT
DP_OUT
DM_IN
DP_IN
11
10
USB2_A0_S_N
USB2_A0_S_P
CM TO CHOOSE CONNECTOR
6
7 CTL1 9
8 CTL2 STATUS_L USB_A0_STATUS_L (39)
CTL3 PP5000_USB_A0_VBUS
5 13
(18) EN_USB_A0_5V EN FAULT_L USB_A0_OC_ODL (8)
R254 USB_A0_ILIM_SEL 4
(39) USB_A1_STATUS_L ILIM_SEL
*2AC@Short_0201
15 17 + C202
16 ILIM_LO PAD 14 150U/6.3V/ESR35_3528
ILIM_HI GND

3
SLGC55545VTR
2 L5B
(18) USB_A0_CHARGE_EN_L B2
R679 PCMF3USB3S
Q21 R265 R267
PJE138K 100K_5%_2 48.7K_1%_4 29.4K_1%_4 C4 A4

1
C3 A3

CN1
USB3_9P
1
USB2_A0_L_N 2 VBUS
L5A USB2_A0_L_P 3 DM
PCMF3USB3S B1 4 DP
GND
C2 A2 USB3_A0_RX_L_P 6
(8) USB3_P1_A0_RX_P C1 A1 USB3_A0_RX_L_N 5 SSRX_P
(8) USB3_P1_A0_RX_N SSRX_N
C C
7
GND_DRAIN
USB3_A0_TX_L_P 9
USB3_A0_TX_L_N 8 SSTX_P
SSTX_N
L5C

13
12
11
10
PCMF3USB3S B3

13
12
11
10
C6 A6
(8) USB3_P1_A0_TX_P
C5 A5
(8) USB3_P1_A0_TX_N

B B

A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
USB A CONNECTIONS(MLB)
Date: Friday, May 31, 2019 Sheet 30 of 45
5 4 3 2 1
5 4 3 2 1

PP3300_EC

(UTC1) PP5000_A

R692 Q66
100K_5%_2 BSS84AKM

2
3
USB_C0_BC12_CHG_DET_L
USB_C0_BC12_CHG_DET_L (18)
C82

1
1u/10V_2 R694
100K_5%_2
3
D D
Q63 2
PJE138K
TYPE-C PORT 0 BC1.2 PPVAR_USB_C0_VBUS
A9
J13
1

VBUS1

3
B4
Q71 2 USB_C0_BC12_VBUS_ON A4 VBUS2
USB_C0_BC12_VBUS_ON (18) B9 VBUS3
U54 PJE138K C82Q
*10u/35V_6 VBUS4
R196

1
USB_C0_BC12_CHG_DET 10 CHG_DET 9 VBUS_C0_BC12 100K_5%_2 USB_C0_CC1 A5 CC1
VBUS (21,29) USB_C0_CC1 USB_C0_CC2 B5
USB2_P0_C0_P 3 7 USB2_0_C0_P (21,29) USB_C0_CC2 USB_C0_SBU1 A8 CC2
(8) USB2_P0_C0_P USB2_P0_C0_N 2 DP_HOST DP_CON 8 USB2_0_C0_N (21) USB_C0_SBU1 USB_C0_SBU2 B8 RFU1
(8) USB2_P0_C0_N DM_HOST DM_CON (21) USB_C0_SBU2 RFU2
L6A
VBUS_C0_BC12 R5678 *100K_5%_2 1 C1 A1 USB2_0_C0_L_N A7
SW_OPEN C2 A2 USB2_0_C0_L_P A6 DM1
TP122 4 B7 DP1
CHG_AL_N B6 DM2
VBUS_C0_BC12 5 R886 R893 DP2
GOOD_BAT PCMF3USB3S B1
1M_1%_2 1M_1%_2
6 USB_C0_RX1_L_N B10
GND USB_C0_RX1_L_P B11 SSRX1_N
USB_C0_TX1_L_N A3 SSRX1_P
MAX14637CVB+T L6B USB_C0_TX1_L_P A2 SSTX1_N
C3 A3 SSTX1_P
(29) USB_C0_RX1_N C4 A4
(29) USB_C0_RX1_P USB_C0_RX2_L_N A10
R182 *0_5%_4
R183 *0_5%_4 USB_C0_RX2_L_P A11 SSRX2_N
USB_C0_TX2_L_N B3 SSRX2_P
PCMF3USB3S B2 SSTX2_N
USB_C0_TX2_L_P B2
C SSTX2_P 1 C
L6C GND5 2
C5 A5 A1 GND6 3
(29) USB_C0_TX1_N C6 A6 A12 GND1 SHIELD1 4
(29) USB_C0_TX1_P B12 GND2 SHIELD2
B1 GND3 5
GND4 NC#1 6
PCMF3USB3S B3 NC#2

AUSB0295-P007A
L7A

B1
0102_Q_Changed J13 Footprint
C2 A2
(29) USB_C0_RX2_N C1 A1
(29) USB_C0_RX2_P
PCMF2USB3S

L7B
B2

C4 A4
(29) USB_C0_TX2_N C3 A3
(29) USB_C0_TX2_P
PCMF2USB3S
PP3300_VDDIOM PP3300_VDDIOM PP3300_EC PP3300_EC

R41 R89
100K_5%_2 100K_5%_2
B B
2

CCD_MODE_ODL 1 6 3 4
(21) CCD_MODE_ODL CCD_MODE_EC_L (18)

Q300B
(UTC1)
Q300A
PMDXB600UNE PMDXB600UNE
ONLY TIME CCD_DISENGAGE_SBU IS HIGH WHEN CCD_MODE IS INACTIVE AN THERE IS POWER TO THE TCPC USB_C0_CC1
R437 *0_5%_2 USB_C0_CC2
0102_Q_Changed R3109 to a short pad USB_C0_SBU1
USB_C0_SBU2
D23 Q25
PP5000_A R3109 *Short_0201
2 1 PMZ370UNE

R3111 *0_5%_2 USB_C0_SBU1 D22


PP5000_LDO RB500V-40 (29) USB_C0_SBU1_ANX

1
2
3
4
2

R291 C86 C181 C18002 C18003

1
2
3
4
22K_1%_4
1

1000p/25V_2 1000p/25V_2 *330p/50V_4 *330p/50V_4


CCD_DISENGAGE_SBU

GND
1

TPD4E101DPWR

5
C3112 USB_C0_SBU2
2

(29) USB_C0_SBU2_ANX
0.01u/16V_2

PMZ370UNE
Q28
A A
R439 *0_5%_2
3

2 Q3108
PP3300_VDDIOM
PJE138K
CAREFULLY PLACE THE FETS, AVOID LONG STUB
Quanta Computer Inc.
1

PROJECT : ZBA/ZBB
CCD_MODE_ODL Size Document Number Rev
USB C CONNECTOR ( MLB ) 1A

Date: Friday, May 31, 2019 Sheet 31 of 45


5 4 3 2 1
5 4 3 2 1

PORT 0
32
PROVIDES ESD PROTECTION, PLACE CLOSE TO CONNECTOR

(PUB1)
U2

C2 C6 PPVAR_VBUS_IN
D PPVAR_USB_C0_VBUS
C3 VBUS1
VBUS2
VCHG1
VCHG2
D6
PPVAR_VBUS_IN TO-CHARGER D
C4 E6
TYPE-C CONN C65 C5 VBUS3
VBUS4
VCHG3
VCHG4
F6 C285 C81Q
4.7u/35V_6 D4 G6 10u/35V_6 *10u/35V_6
D5 VBUS5 VCHG5
E4 VBUS6
E5 VBUS7 D2 PP5000_POWER_MUX_C0 R674 *Short_0603
VBUS8 V5V1 PP5000_A
F4 D3
F5 VBUS9 V5V2 E2
PP3300_PD_A VBUS10 V5V3
G4 F2
G5 VBUS11 V5V4 G2 C77 C325 C362
C59 C63 VBUS12 V5V5 E3 PP3300_VBUS_LDO 22u/10V_6 22u/10V_6 10u/10V_4
4.7u/6.3V_4 V5V6 F3
0.1u/10V_2 V5V7 G3
A1 V5V8
VDD
TP26 USB_PD_C0_EN_L A2 A5 C81
EN_L VLDO 4.7u/6.3V_4

F1 C1 R201 *Short_0201
(29) USB_C0_CHARGE_ON EN_SNK SDA EC_I2C_USB_C0_MUX_SDA (18,29)
G1 B1 R202 *Short_0201
(29) EN_USB_C0_5V_OUT EN_SRC SCL EC_I2C_USB_C0_MUX_SCL (18,29)
TP73 USB_C_FRS_EN B6
FRS_EN E1
ADDR PP3300_PD_A
R288 R346 R355
100K_5%_2 100K_5%_2 100K_5%_2 A3 D1 R216
A6 CAP1 INT_L
CAP2 *Short_0201
A4 R324
C66 C74 GND1 B3 47K_5%_2
1000p/16V_2 0.01u/50V_4 GND2 B4
GND3 B5
GND4 B2 USB_PD_C0_INT_ODL (18)
GND5

C PPVAR_VBUS_IN C
NX20P3483

B B

A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
USB C VBUS CONTROL
Date: Friday, May 31, 2019 Sheet 32 of 45
5 4 3 2 1
5 4 3 2 1

(PMC)
33
L3 PPVAR_VCCGI
0.22uH_7x7x1.8 INDUCTOR SAT I IS 26A PEAK CURRENT:25A
1 2
CMLB061H-R22MS-73
DNS
C134 C137 C186 C189 C194 C265 C276 C283 C286 C328 + C351 + C396
0.1u/10V_2 0.1u/10V_2 0.1u/10V_2 0.1u/10V_2 0.1u/10V_2 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 330u/2V_7343H1.9 *330u/2V_7343H1.9
D D
R696 C128
2.94K_1%_4 0.1u/10V_2

1
R697 C135 C184 C187 C191 C260 C266 C279 C284 C287 C347 + C352 C18004 C18005
R52 R53 C593 0.1u/10V_2 0.1u/10V_2 0.1u/10V_2 0.1u/10V_2 0.1u/10V_2 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 330u/2V_7343H1.9 22u/6.3V_6 22u/6.3V_6
120_1%_4 10K_NTC_4_1% 536_1%_4 1u/16V_4

2 R69
*Short_0201 03/20 Add C18004,C18005
PMIC_ISENSE2_N
R68
*Short_0201
PMIC_ISENSE2_P

PPVAR_SYS PP5000_A
PPVAR_SYS
R145 R146
C41 C48 C50 PP5000_A 2.2_1%_4 2.2_1%_4
10u/25V_6 10u/25V_6 10u/25V_6 PPVAR_SYS
R87
1

2.2_1%_4 PP1800_A R151


100K_1%_2
C367 C377
VIN

C R82 C292 0.1u/16V_2 1u/16V_4 C


*Short_0201 U12 2.2u/10V_4
TG 3DRV2_UGATE DRV2_UGATE_R 3
6 UGATE 8 C262
7 TGR/VSW 4 C132 R85 4 VCC 1u/16V_4 R152 C454
8 0.1u/10V_2 *Short_0201 BOOT 1 127K_1%_4 0.1u/16V_2
DRV2_PHASE EN PP1800_DRAM_U PP1800_DRAM_U_R
2 U24
PHASE 5 52 7
PWM VIN_CT VCC
BG 5DRV2_LGATE R83 DRV2_LGATE_R 7 C504 R168 11
LGATE VSYS
*Short_0201 6 10u/16V_6 *Short_0.1_1%_4 20
GND GATE_VIN
DNS 9 4
PGND

R42 PP1100_VDDQ_S
EPAD VTT_IN
*10_1%_4 19
GATE_VOUT
RT9610CGQW 3 TP_VTT_SRC
VTT
9

Q5 R124 9 2 C464
OCSET2 VTT_SNS PPVAR_VNN
CSD87330Q3D 28.7K_1%_2 PP5000_A 10u/16V_6 0103_Q_Changed R724,R725 to short pad
PMIC_DRV_EN2

10u/16V_6

10u/16V_6
DNS

0.1u/16V_4
C127 44 47 C463 PEAK CURRENT:4A
PMIC_PWM2 DRV_EN2 VIN1#1

C55

C453

C460
*1000p/50V_4 42 48 10u/16V_6 R724
DRV2_PHASE DRV2_PHASE_R PWM2 VIN1#2
R119 43 L14 *short92*32
PHASE2
*Short_0201 45 0.47uH_2.5x2.0x1 C469 C473 C477 C481 C485 C487 C489 C491 C492
(14) PPVAR_VCCGI_SENSE_P LX1#1 PPVAR_VNN_R
PPVAR_SYS R95 35 46 1 2 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
VOUT2 LX1#2
R94 9.1K_1%_4 C316 1 HMMR25201T-R47MSR
VOUT1 PPVAR_VNN_SENSE_P (14) 1W
1K_1%_4 2200p/50V_4 33
COMP2 PP1050_S
C36 C45 C49 R88 34 40 PP5000_A
FB2 VIN3#1

10u/16V_6

10u/16V_6
0.1u/16V_4
10u/25V_6 10u/25V_6 10u/25V_6 PP5000_A 10K_1%_4 41 R725 PEAK CURRENT: 4.5A
PMIC_ISENSE2_P VIN3#2 PP1050_S_R

C53

C435

C457
32 L9 *short92*32
PMIC_ISENSE2_N ISENSEP2
C268 31 37 0.47uH_2.5x2.0x1
ISENSEN2 LX3#1
R86 10p/50V_4 38 1 2 C466 C470 C474 C478 C482 C486 C488 C490
LX3#2
2.2_1%_4 C263 8 24 HMMR25201T-R47MSR PP1050_VCCRAM_S 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
(14) PPVAR_VCCGI_SENSE_N VSSSENSE2 VOUT3
1000p/50V_4 PP5000_A 1W
1

10u/16V_6

10u/16V_6
0.1u/16V_4
R111 10 25 R170
OCSET6 VIN4 PP1800_A_R PP1800_A

C58

C436

C458
R70 10.7K_1%_4 L8 *Short_0.02_1%_6
*Short_0201 U9 PMIC_DRV_EN6 51 28 1uH_2016 PEAK CURRENT: 1.5 A
VIN

DRV6_UGATE DRV6_UGATE_R PMIC_PWM6 DRV_EN6 LX4#1


B 3 49 29 1 2 1W B
UGATE DRV6_PHASE DRV6_PHASE_R PWM6 LX4#2
8 C261 R120 50 26 1286AS-H-1R0M
VCC PHASE6 VOUT4
TG 3 C131 R84 4 1u/16V_4 *Short_0201 C467 C471 C475 C479 C483
6 0.1u/10V_2 *Short_0201 BOOT 1 5 22 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
TGR/VSW DRV6_PHASE EN PP1100_VDDQ VOUT6 VIN5 PP5000_A

10u/16V_6

10u/16V_6
0.1u/16V_4
7 4 2
PHASE

C54

C449

C459
8 5 39 21 R171
DRV6_LGATE DRV6_LGATE_R PWM (12) PMIC_PCH_INT_ODL IRQ LX5 PP1200_A_R PP1200_A
R81 7 18 L10 *Short_0.02_1%_6
LGATE (18) PMIC_EC_RSMRST_ODL VOUT5
*Short_0201 6 R411 10K_1%_2 36 1uH_2016 PEAK CURRENT: 2A
GND RSMRST
BG 5 9 17 1 2 1W
EPAD (11) THERMTRIP_L PMIC_EN THERMTRIP
30 1286AS-H-1R0M
(18) PMIC_EN PMIC_EN
DNS 13
PGND

RT9610CGQW
PMIC_DDR_SEL I2C_SDA
R698 *100K_5%_2 23 12 PP1800_SOC_A C468 C472 C476 C480 C484
DDR_SEL I2C_SCL
22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
(18) PMIC_EC_PWROK_OD
9

Q4 PP3300_A R646 10K_1%_2 27


PCH_PWROK
CSD87330Q3D 6
AGND
14 53 R547 R552 03/20 Change to 1K
(9,11) PCH_SLP_S0_L SLP_S0 E-PAD
15 1K_1%_2 1K_1%_2
(11) PCH_SLP_S3_L SLP_S3
16
(11) PCH_SLP_S4_L SLP_S4
PMIC_EN PCH_PMIC_I2C_SDA (11)
R699 RT5077AGQW
PCH_PMIC_I2C_SCL (11)
100K_5%_2

R1181
100K_5%_2

R723
PP1100_VDDQ_S_R *short92*32 PP1100_VDDQ_S PP1100_VDDQ
L4
A PP1100_VDDQ_SW 1 2 W2 *short92*32 A
0.47uH_2.5x2.0x1
HMMR25201T-R47MSR 1W DNS PEAK CURRENT:4.0A
C133 C136 C185 C188 C193 C264 C270 C282 + C290 + C374 03/20 Change FP to SHORT92X32
0.1u/10V_2 0.1u/10V_2 0.1u/10V_2 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 330u/2V_7343H1.9 *330u/2V_7343H1.9 C87 C160 C198 C274 C275
22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
DNS R195
*10_1%_4 0103_Q_Changed R723 to a short pad
Quanta Computer Inc.
DNS C44 PROJECT : ZBA/ZBB
*1000p/50V_4 Size Document Number Rev
1A
PMIC (OPTION 1)
Date: Friday, May 31, 2019 Sheet 33 of 45
5 4 3 2 1
5 4 3 2 1

(SYP) PP3300_A
PPVAR_SYS

C564 C358
UVLO 4.5V- IF VBAT IS 2S, THEN WATCH OUT.
U34
RT6258BGQUF
34
D256 22u/25V_8 22u/25V_8
RB500V-40 C354 5 10
EN_EC_PWR 1 2 1u/16V_4 VIN VOUT
9 12 C574 PP3300_A_R R92 PP3300_A
D VCC FF D
VF=0.45V@10mA R194 1K_5%_2 10p/25V_2 L11 *Short_0.002_1%_12
1uH_5x5x1.2
6 2 PP3300_SW 1 2
(18) EN_PP3300_A EN LX#1
R192 1K_5%_2 3
R133 LX#2 R64 C586 CMLB051B-1R0MS C589 C590 C591
10_5%_6 0.1u/10V_2 0.1u/10V_2 47u/6.3V_8 47u/6.3V_8
R685 PP3300_LDO_OUT 11 1
100K_1%_2 LDO3 BOOT
4
*Short_0.1_1%_4 C364 8 PGND 7
AGND PGOOD PP3300_PG_OD (18,35)
4.7u/10V_4

0102_Q_Changed R292 to a short pad R142


100K_1%_2
R292 *Short_0402 LDO AUTO SWICH AFTER PG
LDO 150MA MAX, AUTO SWITCH WHEN PG IS GOOD PP3300_EC
U25
5
VIN VOUT
1 PP3300_RTC LDO AUTO SWITCH AFTER PG
R687

4 PP3300_LDO
EN PP3300_EC_WAKE
R415
2 3 *Short_0.1_1%_4 U31
GND FLG 5 1
VIN VOUT PP3300_EC
*RT9742CNGJ5

EN_EC_PWR 4 *Short_0.1_1%_4
(18,35) EN_EC_PWR EN
C C
R495 0102_Q_Changed R495 to a short pad
2 3
R134 GND FLG
PP3300_PD_SW_A
499K_1%_2 RT9742CGJ5

(SYP) PP5000_A *Short_0.1_1%_4

PPVAR_SYS UVLO 5.4V - IF VBAT IS 2S, THEN WATCH OUT FOR VOLTAGE LOCK OUT FOR 1.8V
C356 C3561 U40
22u/25V_8 22u/25V_8 RT6258CGQUF

C306 5 10
1u/10V_2 VIN VOUT
11 9 PP5000_A_R R421 PP5000_A
VCC FF R193 1K_5%_2 C587 10p/25V_2 L15 *Short_0.002_1%_12
1uH_7x7x3
6 2 PP5000_SW 1 2
(18) EN_PP5000_A EN LX#1
R188 1K_5%_2 3
LX#2 R66 C588 PCMC063T-1R0MN
R686 PP5000_LDO
12 10_5%_6 0.1u/10V_2 C592 C394 C379
100K_1%_2 LDO5 1 0.1u/10V_2 47u/10V_8 47u/10V_8
BOOT
C330 4 7 PP3300_EC
4.7u/10V_4 8 PGND PGOOD
AGND R431
499K_1%_2
B B

PP5000_PG_OD (18)

LDO 150MA MAX, AUTO SWITCH WHEN PG IS GOOD

PP1800_RTC, PP1800_EC
PP1800_RTC CAN BE GENERATED BY A SEPARATE DC-DC R PP1800_EC CAN BE GENERATED BY A SEPARATE REGULATOR
(DCD) CAN USE RT9078N-08GJ5 FOR LOWER COST
PP1800_RTC PP1800_EC
U38
PP3300_LDO U14

PP5000_LDO 1 5 A2 A1
R181 *0.51_1%_4 VIN VOUT VIN VOUT
EN_EC_PWR B2 B1
C565 R97 C567 ON GND C72
1u/10V_2 20K_1%_2 1u/10V_2 1u/10V_2
TPS22914BYFPR

R3484 0_5%_2 3 4
EN SNS/NC
A for timing tuning A

R98
C3485 16K_1%_4
*0.1u/10V_2

2
GND Quanta Computer Inc.
RT9078N-08GJ5
VOUT = (R1 + R2 )/ R2 * VSNS (0.8V) PROJECT : ZBA/ZBB
Size Document Number Rev

CHOICES FOR THE REGULATORS CAN BE SUBSTITUE AFTER CONFIRM THE FUNCTIONALITY. Date:
POWER: 1.8V(EC) 3.3V AND 5V
Friday, May 31, 2019 Sheet 34 of 45
1A

5 4 3 2 1
5 4 3 2 1

R390
35
1/4 W *Short_0.02_1%_6
(DCD_CRD)
(DCD_FCM) R364 PP3300_A PP3300_SD_DX
Q33 *Short_0.02_1%_6 R1Q
AO3415 *Short_0603
1 3 PP3300_S_R PP3300_S
PP3300_A PP3300_CAMERA_S

PP3300_EC
C311

2
4.7u/10V_4
C317
R347 0.22u/10V_2
D 100K_1%_2 D

1/4 W
R356 (DCD)
200_1%_2 R383
*Short_0.02_1%_6

0102_Q_Changed R70Q to a short pad PP3300_A PP3300_SOC_A

3
R70Q *Short_0201 EN_PP3300_CAMERA_R 2 Q27
(11,18) SLP_S3_L
PJE138K R167
R71Q *0_5%_2 *Short_0.1_1%_4 R384
(12) EN_PP3300_CAMERA PP3300_PD_SW_A
Q73 *Short_0.1_1%_4

1
PP3300_PEN_DX AO3415
3 1 PP3300_PD_A

1/6 W

2
R369 R491
(DCD_TSN) Q34 *Short_0.1_1%_4 100K_1%_2
TN@AO3415 C434
1 3 PP3300_TOUCHSCREEN_DX_R 4.7u/6.3V_4
PP3300_A PP3300_TOUCHSCREEN_DX

PP3300_EC
C312

3
[email protected]/10V_4
C318 2 Q74
(18,34) PP3300_PG_OD
R348 [email protected]/10V_2 1/6 W PJE138K
TN@100K_1%_2

1
R357
TN@200_1%_2

U10Q
C R63Q C
3

1 5PP3200_LDO *0.1_1%_4
PPVAR_SYS VIN OUT
2 Q29
(12,25) EN_PP3300_TOUCHSCREEN EN_Hi=2V 2
TN@PJE138K C60Q PP3300_PD_SW_A
GND
*1u/50V_6 R60Q *0_5%_2 3 EN 4
1

ADJ
DNS
R1 R61Q
*AP2204K-ADJTRG1 *13.7K/F_4 C61Q
(18,34) EN_EC_PWR *2.2u/16V_6

Vref=1.24V
1/4 W R62Q
R2 *8.66K_4
(DCD_MMC) R370
*Short_0.02_1%_6
Vo =1.24*(1+R1/R2)
PP3300_A PP3300_EMMC_DX =3.2V
Note : (R1+R2) = 10K~100K

R368
Q31 *Short_0.1_1%_4
(DCD_TPD) AO3415
PP3300_A 1 3 P3300_TRACKPAD_DX_R
PP3300_TRACKPAD_DX
(DCD_ACS)
1/6 W
PP3300_EC PP1800_S
C309 1/6 W
2

4.7u/10V_4 Q39 R387


C315 AO3415
R345 0.22u/10V_2 PP1800_A 1 3 PP1800_SENSOR_U
100K_1%_2
B PP3300_EC B
C321 *Short_0.1_1%_4

2
4.7u/10V_4 ALS, GYRO, COMPASS
R351 C326
2K_1%_2 R372 0.22u/10V_2
100K_1%_2
(18) EN_PP3300_TRACKPAD_ODL
BOM option for CNVi and PCIe module,
it can be changed to 0 ohm in PVT
R375
200_1%_2
FOR PCIE MODULE, STUFF U15 AND DNS R186.
FOR CNVI MODULE, DNS U15 AND BYPASS WITH RESISTOR
R186 0_5%_6

3
1/4 W
2 Q37
PP3300_WLAN_DX_R (11,18) SLP_S4_L
R389 PJE138K
*Short_0.02_1%_6
(DCD_NGF) U15

1
PP3300_A 5 1 PP3300_WLAN_DX
VIN VOUT

R321 C324 4 C26 C32


10u/6.3V_4 EN 0.1u/10V_2 4.7u/10V_4
*2.2K_1%_2

2 3
GND FLG
1/4 W
*RT9742DGJ5
(10) EN_PP3300_WLAN_L
R386
(DCD_MMC) *Short_0.02_1%_6

PP1800_A PP1800_EMMC_DX
1/4 W EMMC
PP3300_EDP_DX_R
180MA
R367
(DCD_LDS) *Short_0.02_1%_6 1/4 W
A U60 A
5 1 R381
PP3300_A VIN VOUT PP3300_EDP_DX (DCD) *Short_0.02_1%_6

C310 4 C27 C35 PP1800_A PP1800_SOC_A


(7) EN_PP3300_EDP_DX EN
10u/6.3V_4 0.1u/10V_2 4.7u/10V_4

2 3
GND FLG
RT9742CGJ5

Quanta Computer Inc.


PROJECT :ZBA/ZBB
Size Document Number Rev
1A
POWER - LOAD SWITCHES
Date: Friday, May 31, 2019 Sheet 35 of 45
5 4 3 2 1
5 4 3 2 1

PP3300_INA
(INA) PP3300_INA

U77
*INA3221AIRGVR U79
*INA3221AIRGVR
R741 R742 16 12
VPU IN+1 PP3300_EDP_DX_R
*4.7K_5%_2 *4.7K_5%_2 C673 4 11 16 12
VS IN-1 PP3300_EDP_DX VPU IN+1 PP1200_A_R
*0.1U/10V_2 4 11 PP1200_A
VS IN-1
DEBUG_I2C_SCL 6
(21,22) DEBUG_I2C_SCL DEBUG_I2C_SDA SCL DEBUG_I2C_SCL
7 6
(21,22) DEBUG_I2C_SDA SDA 15 DEBUG_I2C_SDA 7 SCL
IN+2 PP5000_A_R SDA
5 14 PP5000_A 15 PP1100_VDDQ_S_R
A0 IN-2 5 IN+2 14
A0 IN-2 PP1100_VDDQ_S
D D
10
8 PV 10
9 WARNING 2 C675 8 PV
CRITICAL IN+3 PP1800_A_R WARNING
13 1 *0.1U/10V_2 9 2
TC IN-3 PP1800_A CRITICAL IN+3 PP1050_S_R

TPAD
13 1

GND
TC IN-3 PP1050_S
ROUTE TO SENSE RESISTOR DIFFERENTIALLY

TPAD
GND
3
17

3
17
I2C ADDR: 0X41
I2C ADDR: 0X40

PP3300_INA
PP3300_INA

U78 U80
*INA3221AIRGVR *INA3221AIRGVR

16 12 INA_CUSTOM_P TP38 16 12
VPU IN+1 VPU IN+1 PP3300_WLAN_DX_R
4
VS IN-1
11 INA_CUSTOM_N TP39 INA_CUSTOM IS FOR JUMPER WIRE 4
VS IN-1
11
PP3300_WLAN_DX

DEBUG_I2C_SCL 6 DEBUG_I2C_SCL 6
DEBUG_I2C_SDA 7 SCL DEBUG_I2C_SDA 7 SCL
SDA 15 SDA 15
IN+2 PP3300_EC_WAKE IN+2 PP3300_A_R
C 5 14 PP3300_EC 5 14 PP3300_A C
A0 IN-2 A0 IN-2

C674 10 10
8 PV C676 8 PV
*0.1U/10V_2 WARNING WARNING
9 2 PP3300_A *0.1U/10V_2 9 2 PP3300_PD_SW_A
13 CRITICAL IN+3 1 13 CRITICAL IN+3 1
TC IN-3 PP3300_SOC_A TC IN-3 PP3300_PD_A
TPAD

TPAD
GND

GND
3
17

3
17
I2C ADDR: 0X42 I2C ADDR: 0X43

Q17
*AO3415

PP3300_RTC
1 3
PP3300_INA
HOLES (OTH)
POWER TEST PAD (OTH)
HOLE2 HOLE4
2

B B
R159 *H-ZHT-3 *h-zhy-2
C280 *100K_5%_2 C281
*4.7U/10V_4 *0.22U/10V_2
1

1
HOLE6 HOLE7 HOLE8
*h-tic236bc276d98p2 *h-tic236bc276d98p2 *h-tic256bc315d189p2 PPVAR_VCCGI
R161 *200_1%_2 PP3300_A PP1800_A PP1050_VCCRAM_S PPVAR_VNN
(21) EN_PP3300_INA_H1_ODL
1

1
PAD

PAD

PAD

PAD

PAD

PAD
HOLE9 HOLE10 HOLE11 HOLE1
*H-ZHT-4 *h-zhy-1 *H-C256D118P2 *H-TC256BC315D118P2
PAD1 PAD2 PAD3 PAD7 PAD8 PAD9
*PWR_PAD_40mil *PWR_PAD_40mil *PWR_PAD_40mil *PWR_PAD_70mil *PWR_PAD_70mil *PWR_PAD_70mil

PP1100_VDDQ_S PPVAR_SYS PP5000_A


1

1
PAD

PAD

PAD
HOLE12 HOLE13 HOLE14 HOLE15
*h-o118x98d118x98n *h-c98d98n *SPAD-RE236X98NP *SPAD-RE236X98NP
A A

PAD10 PAD11 PAD12


*PWR_PAD_70mil *PWR_PAD_70mil *PWR_PAD_70mil
1

1
PAD

PAD
Quanta Computer Inc.
PAD13 PAD14
*2D-BARCODE-8X8-S *2D-BARCODE-6X6-S PROJECT : ZBA/ZBB
Size Document Number Rev
1A
INAs
Date: Friday, May 31, 2019 Sheet 36 of 45
5 4 3 2 1
5 4 3 2 1

(CRG)

PPVAR_VBUS_IN
INTERSIL BUCK - BOOST CHARGER
37
C101Q C100Q
*0.1u/50V_4 *0.1u/50V_4
INCREASE OR ADD POSCAPS IF AUDIBLE NOISE IS HEARD
RECOMMENDED VALUE
FROME DATASHEET PPVAR_PWR_IN_BB
D D
R522
0.02_0.5%_0612
3 1
PPVAR_VBUS_IN
RC SNUBBER 4 2
REQUIRED? C538
*10u/50V_12 C90Q C91Q C92Q C93Q C94Q C95Q C96Q C97Q C98Q C99Q C545 RECOMMENDED VALUE
DNS 10u/35V_6 10u/35V_6 10u/35V_6 10u/35V_6 10u/35V_6 10u/35V_6 10u/35V_6 10u/35V_6 10u/35V_6 *10u/35V_6 0.1u/50V_4
FROME DATASHEET
PPVAR_SYS PPVAR_BAT_G
R505 R526 DNS R542
1_5%_2 1_5%_2 0.01_0.5%_0612
3 1

C536 4 2
4.7u/10V_4 C550 C552 C554 C555 C3563 C560
BB_CSP BB_CSN 0.1u/50V_4 22u/25V_8 22u/25V_8 *22u/25V_8 *22u/25V_8 22u/25V_8
DNS DNS
Q23
Q12 R541 R543

1
CSD87330Q3D CSD87330Q3D REQUIRE HIGHER 1_5%_2 1_5%_2
C534 C537 D L13 D C557
1u/50V_6 1u/50V_6 3 8 2.2uH_10x10x3 8 3 OUTPUT CAPACITANCE 1u/10V_4
7 BB_SWITCH_1 1 2 BB_SWITCH_2 7
4 6 6 4 BATTERY_SRP_BB BATTERY_SRN_BB

5 5 C556 C558
*1u/50V_6 *1u/50V_6
S C548 C549 S
0.22u/25V_4 0.22u/25V_4 DNS DNS

9
PPVAR_SYS

PPVAR_VBUS_IN
BUCK LEG BOOST LEG
PPVAR_VBUS_IN
1

Q6
DIODE OR LDRIVE_1 LDRIVE_2
PPVAR_BAT_G CSD25402Q3A PPVAR_BAT
D11 RATING
BAT54CT-7-F
C
HIGH ENOUGH? 5

D
C
3

3 2 1

HDRIVE_1 HDRIVE_2

IC
R506
1_1%_4

4
0102_Q_removed R475,R479.R480,R481 used as 0 ohm in BATTERY_GATE_L

11
10
12
9

7
4

6
5
EVT/DVT builds for layout optimazation
U6

UGATE1
PHASE1
BOOT1
LGATE1

LGATE2
BOOT2

PHASE2
UGATE2
PPVAR_BB_IN 17 ISL9238HRTZ-T C141
VDD_BB_GATE_DRIVE 8 DCIN *4700p/25V_4
C535 R528 PP5000_BB_LDO_OUT VDDP
1u/50V_6 4.7_1%_4 18
R503 VDD
392K_1%_4 C540 C544 BB_CSN 14
4.7u/10V_4 4.7u/10V_4 BB_CSP 15 CSIN
ADAPTER VOLTAGE CSIP
VALID IF > 3.4V BB_ACIN 19 3 BB_PPVAR_SYS R539 *Short_0201
ACIN VSYS PPVAR_SYS
PULL-UP FROM EC OR H1? BB_ASGATE
TP109 13 C551
PPVAR_VBUS_IN 16 ASGATE 2 BATTERY_SRP_BB *1u/50V_6
C533 R504 ADP CSOP
0.1u/50V_4 120K_1%_4 21
(18) EC_I2C_CHARGER_3V3_SDA 22 SDA 1 BATTERY_SRN_BB
(18) EC_I2C_CHARGER_3V3_SCL SCL CSON
24
(18,21) ACOK_OD BB_CHARGER_PROCHOT_ODL 23 ACOK
R527 100_1%_2 R540
(11,18) PCH_PROCHOT_ODL CHARGER_PMON 30 PROCHOT# 31 BB_PPVAR_BAT 100_1%_2 PPVAR_BAT
(18) CHARGER_PMON PSYS VBAT
R530 *Short_0201 29 C553
(18) CHARGER_IADP AMON/BMON *1u/50V_6
BB_CMIN 20 32 BATTERY_GATE_L
PP3300_EC BB_CMOUT OTGEN/CMIN BGATE
R521 TP110 26
*0_5%_2 BB_COMP 28 OTGPG/CMOUT
COMP CHARGER_BAT_PRES_L
DNS R525 C541
BATGONE
25
100K_1%_2 0.01u/16V_4 R538
PROG
*0_5%_2
GND

R532
698_1%_4 R537 BATGONE LOW
C546 100K_1%_2
INDICATES
33

27

B B
C541 GND PIN SHOULD GOES TO PIN E1 AVSS OF U45 *470p/25V_2
DNS BATTERY PRESENT
C547
0.022u/25V_4
R405
105K_1%_4

FOR 0.476A ADAPTER CURRENT LIMIT


AND 733KHZ SWITCHING FREQUENCY:
2CELL : 93.1K
R436
100K_1%_2
CV: 12.6V
3CELL : 105K
0102_Q_Changed R424 to a short pad 3S1P Battery
I2C ADDR : 0X12
R424 *Short_0201 J10
(21) H1_BATT_PRES_L
1
2
(18) EC_I2C_BATTERY_3V3_SDA 3
R426
(DCD_THM) (18) EC_BATT_PRES_L
100K_1%_2
(18) EC_I2C_BATTERY_3V3_SCL BATT_TEMP 4
5
BATT_DISABLE_OD
6
PP3300_A CHARGER_PMON PPVAR_BAT 7 9

3
Q838
2 *2N7002K 8 10
PP3300_RTC
R702 50458-00801-V02
13.7K_1%_2
R420

1
C594 R174 100K_1%_2
0.01u/50V_4 6.04K_1%_2 SETS GAIN
TEMP_SENSOR_CHARGER (18)
1

3
Q55
R703 2 2N7002K
47K_NTC_4_1% (21) BAT_DISABLE_ODL

PLACE NEAR HOTSPOT

1
OF THE CHARGER
2

C299
1u/6.3V_4
A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
BATTERY CHARGER(OPTION 1) 1A

Date: Friday, May 31, 2019 Sheet 37 of 45


5 4 3 2 1
5 4 3 2 1

PPVAR_SYS
GPIO for LTE (MBB)
Coral sub board
-LTE_SAR_ODL has pullup to PP1800_DX_LTE
C581 J21
-LTE_OFF_OFL has pullup to PP1800_DX_LTE
-LTE_WAKE_L has pullup to PP1800_SOC_A, R773 still needs *[email protected]/50V_4 12
(SYS_THM)
to be stuffed if sub board is not attached 1
D EN_PP3300_DX_LTE 2 D
3

R732
(8) LTE_WAKE_L
**LTE@100K_1%_2
(12) LTE_SAR_ODL
(9) LTE_OFF_ODL
R891

(28) COEX3
*LTE@0_5%_2 LTE_OFF_ODL_R 4
5
6
7
Thermal Protector Need fine tune
for thermal protect point
(28) COEX2 8 Note placement position
R733
(28) COEX1 9
100K_1%_2 PP1800_SOC_A TEMP=76.3C
10 R20Q *THM@0_5%_2
11 PP3300_EC PP3300_THRM_R

PP3300_RTC R21Q *THM@Short_0201


*LTE@50506-01001-V01
PP1800_SOC_A 0102_Q_Changed R21Q to a short pad Rset(Kohm)=0.0012T*T-0.9308T+96.147
LEVERAGING CORAL BOARD! R23Q *THM@22K_1%_4
PP1800_SOC_A PP3300_WLAN_DX
PP1800_SOC_A PP3300_WLAN_DX
U1Q
PP3300_THRM_R R22Q THM@150_1%_2PP3300_THRM 5 1 THRM_SET R24Q THM@30K_1%_4
VCC SET
R734 2
C21Q GND
*LTE@100K_1%_2
[email protected]/10V_2
2

5
4 3 EC_RST_R_L R25Q *THM@Short_0201
C
+1.8V HYST OT# EC_RST_ODL (18,21,22) C

1 6 3 4 EN_PP3300_DX_LTE THM@TMP708AIDBVR
(10) EN_PP3300_DX_LTE_SOC HYST=VCC for 10
degree Hys.
P-SENSOR Q38B
*LTE@PMDXB600UNE
Q38A
*LTE@PMDXB600UNE HYST=GND for 30
PP1800_DX_LTE degree Hys.
(PXS)
R314
2

*[email protected]_5%_2

6 1
(10) PCH_I2C_P_SENSOR_SCL
Q91B *PSR@PMDXB600UNE

R6Q **PSR@0_5%_2

B J14 B
PP3300_WLAN_DX
PP1800_DX_LTE
*PSR@50506-00601-V01
PP1800_DX_LTE 1
2 1
R316 I2C_P_SENSOR_1V8_SCL 3 2
I2C_P_SENSOR_1V8_SDA 4 3
*[email protected]_5%_2 5 4 8
6 5 G2 7
5

6 G1
3 4
(10) PCH_I2C_P_SENSOR_SDA
Q91A *PSR@PMDXB600UNE

PP1800_DX_LTE R7Q **PSR@0_5%_2

R318
EN_PP3300_DX_LTE
*[email protected]_5%_2

(12) P_SENSOR_INT_L
2

A PP1800_SOC_A PP1800_DX_LTE A

3 1

*PSR@PJE138K C619 Quanta Computer Inc.


Q92
*PSR@1u/10V_2
PROJECT : ZBA/ZBB
Size Document Number Rev
1A
LTE,STEST
Date: Friday, May 31, 2019 Sheet 38 of 45
5 4 3 2 1
5 4 3 2 1

(UTC2) (18,22,26,27) LID_OPEN


R132 *Short_0201
EC_GPIO1,2 CAN BE USED FOR CONNECTING THE GMR SENSOR ON THESUB-BOARD
(18) LED_3_L
R255 *0_5%_2 EC_GPIO_1
OR IT CAN BE USED TO CONNECT AN SPARE EC GPIO PINS FOR ADDITIONAL CONTROL FROM EC
R197
*100K_5%_2
PPVAR_VBUS_IN

7
1
2 J6
R322 *Short_0201 3 2AC@51288-0060N-001
(18,27) TABLET_MODE_L 4
C87Q C80Q C62 C68
D EC_GPIO_2 *10u/50V_12 *10u/35V_6 10u/35V_6 [email protected]/50V_4 5 D
6

8
PULL-DOWN RESISTORS TO AVOID
FLOATING INPUT W/O SUB-BOARD
PP3300_RTC

PP3300_PD_A C424
0.1u/16V_4 J17

PP3300_PD_A DDI1_AUX_P 1
(7) DDI1_AUX_P DDI1_AUX_N 2
(7) DDI1_AUX_N 3
R48 R49 R259 C425
1.8K_1%_2 1.8K_1%_2 [email protected]/16V_4 EC_GPIO_1 4 30
100K_5%_2 5 (8) USB3_P4_C1_TX_P 29
6 (8) USB3_P4_C1_TX_N 28
7 27
USB_PD_C1_INT_ODL 8 (8) USB2_P3_A1_N 26
(18) USB_PD_C1_INT_ODL 9 (8) USB2_P3_A1_P 25
EC_I2C_USB_C1_MUX_SCL 10 24
(18) EC_I2C_USB_C1_MUX_SCL EC_I2C_USB_C1_MUX_SDA 11 (8) USB3_P4_C1_RX_P 23
(18) EC_I2C_USB_C1_MUX_SDA EC_GPIO_2 12 (8) USB3_P4_C1_RX_N 22
USB_C1_HPD_3V3 13 21
USB_C1_PD_RST_ODL 14 (8) USB2_P4_C1_P 20
(18,29) USB_C1_PD_RST_ODL EC_VOLUP_BTN_ODL 15 (8) USB2_P4_C1_N 19
(18) EC_VOLUP_BTN_ODL EC_VOLDN_BTN_ODL 16 18
C (18) EC_VOLDN_BTN_ODL 17 (7) DDI1_TX3_N 17 C
C3562
(30) USB_A0_STATUS_L 18 (7) DDI1_TX3_P 16
*2AC@1u/6.3V_2 USB_C1_CC1 19 15
TP79 USB_C1_CC2 20 (7) DDI1_TX2_N 14
CC1, CC2 ARE FOR BIP INTERFACE TP80 21
22
(7) DDI1_TX2_P 13
12
USB_C1_BC12_CHG_DET_L
(18) USB_C1_BC12_CHG_DET_L 23 (7) DDI1_TX1_N 11
PP3300_EC (18) USB_C1_BC12_VBUS_ON 24 (7) DDI1_TX1_P 10
(18) USB_C1_MUX_INT_ODL 25 9
26 (7) DDI1_TX0_N 8
(18) USB_A1_CHARGE_EN_L 27 (7) DDI1_TX0_P 7
(18) EN_USB_A1_5V 28 6
(8) USB_A1_OC_ODL 29 (8) USB3_P3_A1_TX_N 5
R229 R185 R693
(30) USB_A1_STATUS_L 30 (8) USB3_P3_A1_TX_P 4 32
100K_5%_2 100K_5%_2 100K_5%_2 31 3 31
PP5000_A 32 (8) USB3_P3_A1_RX_N 2 [email protected](50)
USB_C1_BC12_CHG_DET_L 33 (8) USB3_P3_A1_RX_P 1
EC_VOLUP_BTN_ODL 34
EC_VOLDN_BTN_ODL C426 35
[email protected]/16V_4 36
37 J18
38
R135 *2AC@Short_0201 39 41
(18) SUB_GPIO_ADC
0102_Q_Changed R135 to a short pad
40 42
SELECT PER SEL SI TEAM

SUB_GPIO_ADC GOES TO AN ADC PIN OF EC WITH STUFFING OPTIONS FH34SRJ-40S-0.5SH(50)


THE PIN CAN BE USED FOR VBUS DETECT OR FOR BOARD ID DETECT, OR USE AS A GENERAL GPIO FROM EC
B B

SELECT PER SEL SI TEAM


CM TO ADJUST PINOUT/PIN COUNT

PP1800_SOC_A

R240
100K_5%_2

USB_C1_HPD_1V8_ODL
(7,18) USB_C1_HPD_1V8_ODL
3

2 USB_C1_HPD_3V3

Q19
2AC@PJE138K R1401
1

A 2AC@499K_1%_2 A

MOTHER BOARD INTERFACE Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
CONNECTORS TO SUB BOARD
Date: Friday, May 31, 2019 Sheet 39 of 45
5 4 3 2 1
5 4 3 2 1

AR CAMERA CONN

D
(ACM) D

CN2
R5676 *Short_0402 PP3300_CAMERA_AR

17
PP3300_CAMERA_S 7 8 WFCAM_VSYNC (18)
6 9
PP1800_SENSOR_AR 5 10 USB3_P2_WCAM_TX_P (8)
PP1800_SENSOR_U R5673 *Short_0402
4 11 USB3_P2_WCAM_TX_N (8)
12
(27) EC_I2C_SENSOR_U_SCL_WFC 3 13 USB3_P2_WCAM_RX_P (8)
(27) EC_I2C_SENSOR_U_SDA_WFC 2 14 USB3_P2_WCAM_RX_N (8)
C302

16
(27) BASE_SIXAXIS_INT_L_WFC 1 15
[email protected]/6.3V_4 C300 C301
[email protected]/6.3V_2 [email protected]/6.3V_2
ACM@50696-0150M-V02

C C

DMIC CONN
(MIC2)

5
J25
2DM@50208-00401-V02
1
PP1800_A
2
(9,26) DMIC_CLK2
3
(9) DMIC_CAM2_DATA 4
C3564

*[email protected]/6.3V_2 6

PREFERRED DMIC CHANNEL CONFIG


INTERFACE 1: STRAP MIC TO LEFT=CHANNEL 0
INTERFACE 2: STRAP MIC TO RIGHT=CHANNEL 3

B B

A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
AR CONNECTORS
Date: Friday, May 31, 2019 Sheet 40 of 45
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
Blank
Date: Friday, May 31, 2019 Sheet 41 of 45
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
Blank
Date: Friday, May 31, 2019 Sheet 42 of 45
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
WOV DIAGRAM
Date: Friday, May 31, 2019 Sheet 43 of 45
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
POWER SEQUENCE
Date: Friday, May 31, 2019 Sheet 44 of 45
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : ZBA/ZBB
Size Document Number Rev
1A
SOC-STRAPPING
Date: Friday, May 31, 2019 Sheet 45 of 45
5 4 3 2 1

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