Analysis and design of a buck-boost converter
• Basic operating principles
• Steady-state analysis
• Average model
• Waveforms in buck and boost modes
• Design methods for L, C and switches
Schematic of buck-boost converter
iin S1
A D1
+
+
+
qA iL
Vin vL C R
D Vo
L
_
_ iC Io +
• Step up as well as step down depending on D
• Negative output (with respect to input ground)
• Isolated version – flyback converter quite popular at
low (~100 W) power level
Raja Ayyanar, ASU
Equivalent circuits in the sub-intervals
qA
DTS (1-D)TS
1 D
0
t
_ _
iin iL iL
+ +
Vin
Vin vL L C R Vo vL L
C R Vo
_ _ Io
iC Io + iC +
• vL = -Vo
• vL = Vin
• iL and energy stored in L decrease,
• iL and energy stored in L increase
energy fed to C and R
• C supports load and discharges
• iC positive and C charges up
• C large enough to maintain voltage
• C large enough to maintain voltage
almost constant (small ripple)
almost constant (small ripple)
Raja Ayyanar, ASU
Input-output relationships
iin S1 D1
A
Buck operation for
_
+
+
+ D ≤ 0.5
qA
Vin vL C R Boost operation for
D Vo
_
L D ≥ 0.5
_ Io +
qA DTS (1-D)TS
1 Vin DTs Vo 1 D Ts 0
0 t Vin D Vo 1 D
vL Vin
Vo D Input-output voltage
relationship for
Vin 1 D buck-boost
0
-Vo
I in D
Input-output current relationship
I o 1 D using power balance
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Comparison of vL in buck, boost and buck-boost
vL V − V
in o
Buck
Vo Vin
t
−Vo
vL Vin
Boost
Vo Vin
t
Vin − Vo
vL Vin
Buck-boost
Step-up and
t step-down
−Vo
Raja Ayyanar, ASU
Input-output voltage relationship
10
8
Ideal
Vo 6
Vin 4
2
With resistance
Buck mode of L considered
0
0 0.2 0.4 0.6 0.8 1
D
Vo D • Resistances of inductor and MOSFET, and voltage
drop across diode affect voltage conversion ratio
Vin 1 D • Effect is dominant at high D
• Difficult to achieve large conversion ratios ( > 10)
Ideal input-output
relationship
• No power transfer at D = 1
Raja Ayyanar, ASU
Salient waveforms: Buck mode, D<0.5
Vin
Vo
0
DTS (1 − D)TS t
vL
Vin
0 −Vo t
iL
iL = iS1 + iD1 = I in + I o i=
L I in + I o
0 t
D
I in = Io iS1 , iin iin= I=
D
Io
1− D in
1− D
D
0 t
Io
iL I o =+ 1 iD1 iD1 = I o
1− D 1− D
0
iC t
I in < I o for buck mode
0
t
Raja Ayyanar, ASU
Salient waveforms: Boost mode, D>0.5
Vo
Vin
0 DTS (1 − D)TS t
vL
Vin
0
t
−Vo
iL = iS1 + iD1 = I in + I o iL
i=
L I in + I o
D
=
0 t
I in Io iS1 or iin iin = I in
1− D
D Io iD10
=iL I o =
+ 1 iD1 = I o
t
1− D 1− D
0 t
iC
I in > I o for boost mode
0 t
Raja Ayyanar, ASU
Selection of L
vL Vin
0
DTS -Vo
iL
Peak-peak ripple
I L in inductor current
Iin+Io
0
•L selected to limit peak-peak
inductor current ripple to a chosen value Consider the TOFF interval
• For example, 10-20% of max (Iin +Io) IL
L Vo
• CCM considerations 1 DTS
• Worst-case condition is minimum D Vo 1 D TS
L
IL
• Choice of L does not significantly
affect capacitor selection
Raja Ayyanar, ASU
Design parameters for inductor
iL
I
IL
iL Iin I o o
1 D
0
Vo 1 D TS I o,max
L DC bias : I o I in
IL 1 Dmax
I o,max IL L
2
I L, peak I L , RMS I o I in
2 I
1 Dmax 2 12
Raja Ayyanar, ASU
Selection of C
• Capacitor selection dictated mostly by the RMS current requirement
(which can be larger than the maximum load current)
iC Iin
0 t
-Io Considering the inductor current ripple
Neglecting the inductor current ripple
1 D I 2
2
D
IC ,RMS I o 1
1 D D 12 I o2
I C , RMS I o2 D I in2 1 D 2
0% Iripp le
20% Iripp le
D 50% Iripp le
substitute, I in I o
1.5
1 D I crms
1
Io
D
IC ,RMS I o 0.5
1 D 0
0 0.2 0.4 0.6
D
Raja Ayyanar, ASU
Selection of C
• Choose C based on RMS current requirement
• Worst case condition is max. load and max. D
• Verify if Vo specification is satisfied with the chosen C and ESR
iC Iin
0 t
-Io
Vo due to capacitive impedance
Consider the ON interval
I o DTS
Vo
C
ESR limit
Vo Vo
ESR
I Co , max I o I in Voltage rating: Vo
Raja Ayyanar, ASU
Switch ratings
iin S1
A D1
+
+
iL
Vin C R
D Vo
L
_ Io +
MOSFET Diode
Voltage rating: Vin Vo
Voltage rating: Vin Vo
Peak current rating:
I L Peak current rating:
isw, pk iL, pk I o,max I in I L
2 iD , pk I o,max I in
RMS current rating: 2
Average current rating:
D
isw, RMS I o I in D I o,max iD ,avg I o,max
1 D
Raja Ayyanar, ASU
Other discussions
• Negative output may not be suitable for many applications;
other topologies with buck-boost characteristics (SEPIC)
provide positive output voltages
• Buck-boost is not a good choice if the application requires
only step-down or step-up function; in that case buck or
boost converter is the better choice in terms of efficiency,
size and cost
• Both input and output currents are pulsating which is a
main disadvantage of buck-boost
• Easy to obtain isolated outputs (flyback converter)
Raja Ayyanar, ASU