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Diia Specification: Dali Part 251 - Memory Bank 1 Extension

Dali Specification Part 251

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0% found this document useful (0 votes)
965 views12 pages

Diia Specification: Dali Part 251 - Memory Bank 1 Extension

Dali Specification Part 251

Uploaded by

tufta tufta
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
  • NVM-RW: Details the attributes of non-volatile memory that are readable and writable.
  • Terms and definitions: Clarifies key terms and definitions used within the document.
  • Scope: Defines the purpose and applications of the standard, focusing on memory bank 1 extension.
  • NVM-RO: Discusses non-volatile memory read-only attributes that cannot be changed.
  • References: Lists normative references and the contexts in which the documents are applied.
  • Transmission protocol structure: Outlines the requirements for transmission protocol in line with IEC standards.
  • RAM-RW: Describes the characteristics of RAM with read-write capability.
  • Interface power supply: Details requirements for the interface power supply in compliance with IEC.
  • Electrical specification: Describes electrical specifications aligned with IEC standards.
  • Version number: Specifies versioning requirements according to IEC guidelines.
  • General: Outlines general requirements as defined by relevant IEC standards.
  • Memory banks: Describes the functionality, protection, and operations concerning memory banks.
  • Timing: Provides specifications for timing-related requirements and operations.
  • Method of operation: Explains the operational procedures and methods for memory banks.
  • Declaration of variables: Describes the declaration process for system variables as per applicable standards.
  • Definition of commands: Specifies the command definitions used in the device type applications.
  • Application extended commands: Details application-specific commands extended to support device operations.

DiiA Specification

DALI Part 251 – Memory Bank 1 Extension


(Device Type 50)

Version 1.1
October 2019

DiiA(SW)171e DiiA Specification DALI Part 251 - Memory Bank 1 Extension.docx


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This document is published by the Digital Illumination Interface Alliance, further called DiiA. All rights
are reserved. This document is property of the DiiA and reproduction in whole or in part is
prohibited without express and prior written permission of the DiiA.

Elements of DiiA Specifications may be subject to third party intellectual property rights, including
without limitation, patent, copyright or trademark rights (such a third party may or may not be
member of DiiA). DiiA is not responsible and shall not be held responsible in any manner for
identifying or failing to identify any or all such third-party intellectual property rights. The furnishing
of this Specification does not grant any license to any intellectual property of the DiiA or its
members.

THIS DOCUMENT IS PROVIDED "AS IS" WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY
WARRANTY OF MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE,
OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE. DiiA
and the Copyright Holder disclaim all liability, including liability for infringement of any proprietary
rights, relating to use of information in this specification. No license, express or implied, by estoppel
or otherwise, to any intellectual property rights is granted herein.

For any further explanation of the contents of this document, or in case of any perceived
inconsistency or ambiguity of interpretation, please contact the DiiA:

E-mail: TM@digitalilluminationinterface.org

Website: www.dali2.org

Document History
Publication Date Status Comments
August 2018 First publication.
22 October 2019 V1.1 Corrections/clarifications, formatting, CRI
correction, range clarifications including MASK.

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Table of contents
1 Scope ............................................................................................................................................... 5
2 References ...................................................................................................................................... 5
2.1 Normative references ................................................................................................................ 5
2.2 Informative references .............................................................................................................. 5
3 Terms and definitions ..................................................................................................................... 5
3.1 NVM-RO ..................................................................................................................................... 5
3.2 NVM-RW .................................................................................................................................... 5
3.3 ROM ........................................................................................................................................... 5
3.4 RAM-RO ..................................................................................................................................... 5
3.5 RAM-RW..................................................................................................................................... 6
4 General............................................................................................................................................ 6
4.1 General....................................................................................................................................... 6
4.2 Version number ......................................................................................................................... 6
5 Electrical specification .................................................................................................................... 6
6 Interface power supply ................................................................................................................... 6
7 Transmission protocol structure ..................................................................................................... 6
8 Timing.............................................................................................................................................. 6
9 Method of operation ...................................................................................................................... 6
9.1 Introduction ............................................................................................................................... 6
9.2 Memory banks ........................................................................................................................... 6
9.2.1 General ............................................................................................................................ 6
9.2.2 Vendor-specific protection ............................................................................................. 7
9.2.3 Memory bank writing...................................................................................................... 8
9.2.4 Memory bank reading ..................................................................................................... 8
9.2.5 Memory bank 1 (Mandatory).......................................................................................... 8
10 Declaration of variables ........................................................................................................... 10
11 Definition of commands .......................................................................................................... 10
11.1 General .................................................................................................................................. 10
11.2 Overview sheets .................................................................................................................... 10
11.3 Application extended commands ......................................................................................... 12
11.3.1 General .......................................................................................................................... 12
11.3.2 QUERY EXTENDED VERSION NUMBER .......................................................................... 12
11.4 Special commands ................................................................................................................ 12

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11.4.1 General .......................................................................................................................... 12
11.4.2 ENABLE DEVICE TYPE (data) .......................................................................................... 12

Table 1 – Memory bank Read-Only and Read-Write attributes ............................................................. 7


Table 2 – Declaration of variables......................................................................................................... 10
Table 3 – Standard commands.............................................................................................................. 11

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DALI Part 251 – Memory Bank 1 Extension

1 Scope
This standard specifies an extension to memory bank 1 to enable asset management functionality.
This standard builds on the Digital Addressable Lighting Interface as specified in the IEC62386 series
of standards.

2 References
2.1 Normative references
The following normative documents are adopted, in whole or in part as indicated, in this Standards
Publication. The latest edition of the publication applies (including amendments).

IEC 62386-102:2014, Digital addressable lighting interface – Part 102: General requirements –
control gear

IEC 62386-102:2014/AMD1:2018, Digital addressable lighting interface – Part 102: General


requirements – control gear

IES 901.11, Diagram 5

2.2 Informative references


This standard is intended to be used in conjunction with the following publications. The latest
edition of the publication applies (including amendments).

None

3 Terms and definitions


For the purposes of this document, the terms and definitions given in IEC 62386-102:2014 and IEC
62386-102:2014/AMD1:2018, Clause 3 and the following apply.

3.1 NVM-RO
Non-Volatile Memory Read-Only (cannot be changed through DALI)

3.2 NVM-RW
Non-Volatile Memory Read-Write

3.3 ROM
Read Only Memory (cannot be changed by the control gear)

3.4 RAM-RO
Random Access Memory Read-Only (cannot be changed through DALI)

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3.5 RAM-RW
Random Access Memory Read-Write

4 General
4.1 General
The requirements of IEC 62386-102:2014 and IEC 62386-102:2014/AMD1:2018, Clause 4 apply,
with the restrictions, changes and additions identified below.

4.2 Version number


In 4.2 of IEC 62386-102:2014 and IEC 62386-102:2014/AMD1:2018, “102” shall be replaced by
“251”, “version number” shall be replaced by “extended version number” and “versionNumber” shall
be replaced by “extendedVersionNumber”.

5 Electrical specification
The requirements of IEC 62386-102:2014 and IEC 62386-102:2014/AMD1:2018, Clause 5 apply.

6 Interface power supply


The requirements of IEC 62386-102:2014 and IEC 62386-102:2014/AMD1:2018, Clause 6 apply.

7 Transmission protocol structure


The requirements of IEC 62386-102:2014 and IEC 62386-102:2014/AMD1:2018, Clause 7 apply.

8 Timing
The requirements of IEC 62386-102:2014 and IEC 62386-102:2014/AMD1:2018, Clause 8 apply.

9 Method of operation
9.1 Introduction
IEC 62386-102:2014 defines memory bank 1 for basic luminaire information. This document expands
memory bank 1 to enable asset management functionality.

9.2 Memory banks


9.2.1 General
The requirements of Clause 9.10 of IEC 62386-102:2014 and IEC 62386-102:2014/AMD1:2018 apply
with the following additions and changes.

This standard adds Read-Only and Read-Write attributes to locations in a memory bank as per the
following table.

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Table 1 – Memory bank Read-Only and Read-Write attributes

Memory Accessibility via V: volatile May be Description


Type DALI bus (reset at power changed
RO: Read-Only down) autonomously
RW: Read-Write NV: non- by the control
volatile gear during
run time
ROM RO NV No ROM as defined in IEC62386-
102:2014.
For all fixed value that will not
change during run time of control
gear.
Note: ROM is RO by its nature.
A ROM value may change if control
gear is programmed during
production.
RAM-RO RO V Yes For all measured values and flags
that will be reset at power down.
RAM-RW RW V Yes For all input values that will be reset
at power down.
NVM-RO RO NV Yes NVM as defined in IEC62386-
102:2014 but with additional
specification RO

For all counter values.


No reset at power down.
NVM-RW RW NV Yes NVM as defined in IEC62386-
102:2014

For all input values that are non-


volatile.

9.2.2 Vendor-specific protection


Requirements of Clause 9.11.2 “Memory map” of IEC62386-102:2014 and IEC 62386-
102:2014/AMD1:2018 apply with the following additions and changes.

A manufacturer may provide a vendor-specific means to prevent read and/or write access to
individual memory locations. Locations featuring this vendor-specific protection mechanism are
marked as: “(protectable)”.

The read/write properties of such (protectable) locations are set by the vendor-specific protection
mechanism and are specified with each location.

For protectable writable memory locations that are currently protected, an attempt to write a value
shall result in the same behaviour as if the memory location is not implemented.

Note: This means no reply to the WRITE MEMORY LOCATION command when attempting to write to a
protected location.

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9.2.3 Memory bank writing
Requirements of Clause 9.10.5 “Memory bank writing” in IEC 62386-102:2014 and IEC 62386-
102:2014/AMD1:2018 apply with the following additions and changes.

All writable memory locations other than location 0x02 shall be lockable.

For writable memory locations, unless specified otherwise in the memory bank table, if any of the
following conditions are true when attempting to write to a location, the result shall be the same
behaviour as if the memory location is not implemented:

• an attempt to write a value outside of the permitted range, or


• an attempt to write a value to a lockable memory location other than the lock byte, when
the value of the lock byte is not 0x55, or
• an attempt to write a value to a protectable writable memory location that is currently
protected.

Note: This means that when any of the above conditions apply, there will be no reply to the WRITE MEMORY
LOCATION command.

9.2.4 Memory bank reading


Requirements of Clause 9.11.4 “Memory bank reading” in IEC 62386-102:2014 and IEC 62386-
102:2014/AMD1:2018 apply.

9.2.5 Memory bank 1 (Mandatory)


Memory bank 1 is reserved for use by an OEM (original equipment manufacturer, e.g. a luminaire
manufacturer) to store additional information, which has no impact on the functionality of the
control gear. The control gear manufacturer shall implement at least the memory locations up to
and including address 0x77.

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Address Description Default RESET Memory type
value value b
(factory)
0x00 Address of last addressable memory location; factory No change ROM
Range [0x77,0xFE] burn-in

0x01 Indicator byte Manufacturer Manufacturer Manufacturer


specific specific specific

0x02 Lock byte 0xFF 0xFF c RAM-RW


Lockable bytes in the memory bank shall be
read-only while the lock byte has a value
different from 0x55.
[0x03, Luminaire manufacturer GTIN 0xFF No change NVM-RW
0x08] with manufacturer specific prefix to derive (protectable) e
manufacturer name
[0x09, Luminaire identification number 0xFF No change NVM-RW
0x10] (protectable) e
0x11 Content Format ID a (MSB) 0x00 No change NVM-RW
(protectable) e
0x12 Content Format ID a (LSB) 0x03 No change NVM-RW
(protectable) e
0x13 Luminaire year of manufacture [YY] 0xFF No change NVM-RW
[0,99] = YY; [100,MASK] = unknown (protectable) e

0x14 Luminaire week of manufacture [WW] 0xFF No change NVM-RW


[1,53] = WW; 0,[54,MASK] = unknown (protectable) e

0x15 Nominal Input Power [W] (MSB) 0xFF No change NVM-RW


(protectable) e
0x16 Nominal Input Power [W] (LSB); 0xFF No change NVM-RW
[0,MASK-1] = Power; MASK = unknown (protectable) e

0x17 Power at minimum dim level [W] (MSB) 0xFF No change NVM-RW
(protectable) e

0x18 Power at minimum dim level [W] (LSB); 0xFF No change NVM-RW
[0,MASK-1] = Power; MASK = unknown (protectable) e

0x19 Nominal Minimum AC mains voltage [V] (MSB) 0xFF No change NVM-RW
(protectable) e
0x1A Nominal Minimum AC mains voltage [V] (LSB); 0xFF No change NVM-RW
[90,480] = Voltage; [0,89],[481,MASK] = (protectable) e
unknown
0x1B Nominal Maximum AC mains voltage [V] 0xFF No change NVM-RW
(MSB) (protectable) e
0x1C Nominal Maximum AC mains voltage [V] 0xFF No change NVM-RW
(LSB); (protectable) e
[90,480] = Voltage; [0,89],[481,MASK] =
unknown
0x1D Nominal light output [Lm] (MSB) 0xFF No change NVM-RW
(protectable) e
0x1E Nominal light output [Lm] 0xFF No change NVM-RW
(protectable) e
0x1F Nominal light output [Lm] (LSB); 0xFF No change NVM-RW
[0,MASK-1] = Light output; MASK = unknown (protectable) e

0x20 CRI 0xFF No change NVM-RW


[0,100] = CRI; [101,MASK] = unknown (protectable) e

0x21 CCT [K] (MSB) 0xFF No change NVM-RW


(protectable) e

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Address Description Default RESET Memory type
value value b
(factory)
0x22 CCT [K] (LSB); 0xFF No change NVM-RW
[0,17000] = CCT; [17001,MASK-2],MASK = (protectable) e
unknown; MASK – 1 = Part 209 implemented
0x23 Light Distribution Type; 0 = not specified; 0xFF No change NVM-RW
1 = Type I; 2 = Type II; 3 = Type III; 4 = Type (protectable) e
IV;
5 = Type V; 6-254 = reserved for additional types

MASK = unknown
According to IES 901.11, Diagram 5
[0x24, Luminaire color [24 ascii character string, first 0x00 No change NVM-RW
0x3B] char at 0x24] d (protectable) e
Range [0, 0xFF]
[0x3C, Luminaire identification [60 ascii character 0x00 No change NVM-RW
0x77] string, first char at 0x3C] d (protectable) e
Range [0, 0xFF]
[0x78, Manufacturer-specific. Undefined Undefined Undefined
0xFE]
0xFF Reserved – not implemented Answer NO No change n.a.
a Must be set to 0x0003 when this format is used.
b Reset value after “RESET MEMORY BANK”.
c Also used as power on value.
d
Null terminated if shorter than defined length.
e This field is write protectable.

10 Declaration of variables
The requirements of IEC 62386-102:2014 and IEC 62386-102:2014/AMD1:2018, Clause 10 apply,
with the following additional variables for this device type, as indicated in following Table.
Table 2 – Declaration of variables

VARIABLE DEFAULT RESET VALUE POWER ON RANGE OF MEMORY


VALUE VALUE VALIDITY TYPE
(factory)
“extendedversionNumber” 2.0 no change no change 00001000b ROM
“deviceType” 50 no change no change 50 ROM

11 Definition of commands
11.1 General
The requirements of IEC 62386-102:2014 and IEC 62386-102:2014/AMD1:2018, Clause 11, apply
with the following additions.

11.2 Overview sheets


Following Table gives an overview of the application extended commands for this device type.
Unused opcodes of application extended commands shall be reserved for future needs.

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Table 3 – Standard commands

Command name Address Opcode References Command

Ed. 1 cmd number


byte byte reference

Send twice
Answer
See Error! R

DTR0

DTR1

DTR2
Selector bit
eference source not
found.

QUERY EXTENDED VERSION NUMBER Device 1 0xFF - ✓ 11.3.2

ENABLE DEVICE TYPE 0xC1 0x32 11.4.2

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11.3 Application extended commands
11.3.1 General
Application extended commands as defined in this document shall be preceded by “ENABLE DEVICE
TYPE (data)” where data equals “deviceType”. For device types other than “deviceType” these
commands may be used in a different way.

11.3.2 QUERY EXTENDED VERSION NUMBER


The answer shall be “extendedVersionNumber”.

11.4 Special commands


11.4.1 General
The requirements of IEC 62386-102:2014 and IEC 62386-102:2014/AMD1:2018, Clause 11.7 apply
with the following additions.

11.4.2 ENABLE DEVICE TYPE (data)


To enable the command set as defined in this document, “data” shall be “deviceType”.

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