Heaven’s light is our guide
Rajshahi University of Engineering & Technology
Course No : EEE 2214
Course Title : Digital Electronics I Sessional
Submitted To : Dr. Md. Shahidul Islam
Professor
Dept. of EEE, RUET
Submitted By
Name : Nafis Hasan Alif
Roll : 1801015
Dept. : EEE
Date : 31-08-21
Experiment No: 01
Experiment Name: Design A Full Adder Circuit
Objectives:
1.To know the circuit of full adder.
2.To know how a full adder add bits.
Theory:
A full adder circuit is an arithmetic circuit block that can be used to add three bits to produce
sum and carry. It is so called because it adds together two binary bits and a carry-in bit to
produce a sum and carry-out bit.
Truth Table for Full Adder:
Input bits Output bits
X Y Z C S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
Using K-Map Method, we get the simplified expression:
Sum= X ⊕ Y ⊕ Z
Carry= XY+YZ+XZ
Required Apparatus:
1. 74HC86 (XOR gate) – 1 piece
2. 74HC08 (AND gate) – 1piece
3. 74HC32 (OR gate) – 1 piece
4. Switch (3 pieces)
5. LED (2 pieces)
6. Power supply (+5v)
7.Resistors-2 pieces
8.Connecting wires
Circuit Diagram:
Output:
X=0,Y=0,Z=0;S=0,C=0
X=0,Y=0,Z=1;S=1,C=0
X=0,Y=1,Z=0;S=1,C=0
X=0,Y=1,Z=1;S=0,C=1
X=1,Y=0,Z=0;S=1,C=0
X=1,Y=0,Z=1;S=0,C=1
X=1,Y=1,Z=0;S=0,C=1
X=1,Y=1,Z=1;S=1,C=1
Discussion & conclusion:
We used Quad AND gate, Quad OR gate, Quad XOR gate to design the circuit so that we can get
the desired sum and carry output. We used 2 resistors so that excess current can’t damage our
LED. We applied little amount 5V power supply so our IC chips did not get damaged. We
maintained all types of precautions so our experiment was successful.
Experiment No: 02
Experiment Name: Design a BCD to Excess 3 Code Converter
Objectives:
1.To knows BCD and Excess 3 code.
2. To know BCD and Excess 3 code and their conversion.
3. To know the implementation of their conversion expression.
Theory:
If each digit of a decimal number is represented by its equivalent binary number, the result
is a code called binary coded decimal. The BCD code represents each digit of decimal number
by a 4bit binary number. The BCD code does not use the numbers 1010, 1011, 1100, 1101,
1110, and 1111. Excess-3 codes are non-weighted and can be obtained by adding 3 to each
decimal digit then it can be represented by using 4bit binary number for each digit. BCD to
Excess-3 conversion has 4 inputs and 4 outputs.
Truth Table:
Input BCD Code Output Excess-3 Code
A B C D E3 E2 E1 E0
0 0 0 0 0 0 1 1
0 0 0 1 0 1 0 0
0 0 1 0 0 1 0 1
0 0 1 1 0 1 1 0
0 1 0 0 0 1 1 1
0 1 0 1 1 0 0 0
0 1 1 0 1 0 0 1
0 1 1 1 1 0 1 0
1 0 0 0 1 0 1 1
1 0 0 1 1 1 0 0
1 0 1 0 x x x x
1 0 1 1 x x x x
1 1 0 0 x x x x
1 1 0 1 x x x x
1 1 1 0 x x x x
1 1 1 1 x x x x
Using K-Map method, we get the simplified expression:
E3= A+ B(C+D)
E2= B (C+D)’ + B’(C+D)
E1= (C+D)’ + CD
E0= D’
Required Apparatus:
1.74HC32(Quad OR gate)-1 piece
2.74HC08(Quad AND gate)-1 piece
3.74HC86(Quad XOR gate)-1 piece
4.74HC04(Hex inverter)-1 piece
5.Switch-4 pieces
6.LED-4 pieces
7.Resistors-4 pieces
8.Power supply
9.Connecting wires
Circuit Diagram:
Input:A=0,B=0,C=0,D=0
Input: A=0,B=0,C=0,D=1
Input: A=0,B=0,C=1,D=0
Input: A=0,B=0,C=1,D=1
Input: A=0,B=1,C=0,D=0
Input: A=0,B=1,C=0,D=1
Input: A=0,B=1,C=1,D=0
Input: A=0,B=1,C=1,D=1
Input: A=1,B=0,C=0,D=0
Input: A=1, B=0, C=0,D=1
Discussion & Conclusion:
We used Quad AND gate, Quad OR gate, Quad XOR gate and hex inverter to design the circuit
so that we can get the desired excess 3 output. We used four resistors so that excess current
can’t damage our LED. We applied little amount 5V power supply so our IC chips did not get
damaged. We maintained all types of precautions so our experiment was successful.
Experiment No: 03
Experiment Name: Design & Implement 4 to 1 Multiplexer
Objectives:
1.To know the working principle of multiplexer.
2.To know the design of a multiplexer.
Theory:
A multiplexer is a device allowing one or more low-speed analog or digital input signals to be
selected, combined and transmitted at a higher speed on a single shared medium or within a
single shared device. It is also known as Data selector.
Truth Table: 4 to 1 multiplexer
S1 S0 A B C D Y=output
0 0 A 0 0 0 A
0 1 0 B 0 0 B
1 0 0 0 C 0 C
1 1 0 0 0 D D
Using K-Map we get the simplified expression:
Y= S0’S1’A+S0S1’B+S0’S1C+ S0S1D
Required Apparatus:
1.74HC04(Hex inverter)-1 piece
2.74HC11(Triple 3 input AND gate)-2 pieces
3.74HC32(Quad OR gate)-1 piece
4.LED-1piece
5.Switches-6 pieces
6.Resistor-1 piece
7.Power Supply
8.Connecting wires
Circuit diagram:
Output:
input:S0=0,S1=0:O/P: Y=A
input:S0=1,S1=0:O/P: Y=B
input:S0=0,S1=1:O/P: Y=C
input:S0=1,S1=1:O/P: Y=D
Discussion & conclusion:
We used triple 3 input AND gate, Quad OR gate and hex inverter to design the circuit so that we
can get the selected output. We used resistor so that excess current can’t damage our LED. We
applied little amount 5V power supply so our IC chips did not get damaged. We maintained all
types of precautions so our experiment was successful .
Experiment No:04
Experiment Name: Design & Implement Three Bits Comparator
Objectives:
1.To Know about comparator and it’s working process.
2.To know the design of three bits comparator.
Theory:
A comparator that compares two binary numbers (each number having 3 bits) and produces
three outputs based on the relative magnitudes of given binary bits is called a 3 bit magnitude
comparator.
Truth table:
A2 A1 A0 B2 B1 B0 A>B A<B A=B
0 0 0 0 0 0 0 0 1
0 0 0 0 0 1 0 1 0
0 0 0 0 1 0 0 1 0
. . . . . . . . .
. . . . . . . . .
1 1 1 0 1 1 1 0 0
1 1 1 0 0 0 1 0 0
1 1 1 1 0 1 1 0 0
1 1 1 1 1 0 1 0 0
1 1 1 1 1 1 0 0 1
Using K-Map method,we get the simplified expression:
A=B : (A0 xnor B0).(A1 xnor B1).(A2 xnor B2)
A>B : (A2.B2’)+(A2 xnor B2)A1.B1’+(A2 xnor B2)(A1 xnor B1)A0.B0’
A<B : (A2’.B2)+(A2 xnor B2)A1’.B1+(A2 xnor B2)(A1 xnor B1)A0’.B0
Required Apparatus:
1.74HC04(hex inverter)-2pieces
2.74HC08(AND gate)-2pieces
3.74HC86(XOR gate)-1 piece
4.74HC11(triple 3 input AND gate)-1 piece
5.74HC32(OR gate)-1 piece
6.LED-3 pieces
7.Resistor-3 pieces
8.switch-6 pieces
9.power supply & connecting wire
Circuit Diagram:
Output:
A=000, B=000 ; A=B
A=000, B=001 ; A<B
A=000, B=010 ; A<B
A=111, B=011 ; A>B
A=111, B=000 ; A>B
A=111, B=101 ; A>B
A=111, B=110 ; A>B
A=111, B=111 ; A=B
Discussion & conclusion:
We used Quad AND gate, Quad OR gate, Quad XOR gate, Triple 3 input AND gate and hex
inverter to design the circuit so that we can get the output. We used resistors so that excess
current can’t damage our LED. We applied little amount 5V power supply so our IC chips did not
get damaged. We maintained all types of precautions so our experiment was successful.
Experiment No: 05
Experiment Name: Design Adder Circuit Using 4-Bit Adder IC
Objectives:
1.To know how adder works and produce output when input is given.
2.To know about 4-bit adder ic and its connection.
Theory:
The Parallel binary adder is a combinational circuit consists of various full adders in parallel
structure so that when more than 1-bit numbers are to be added, and then there can be full
adder for every column for the addition. The number of full adders in a parallel binary adder
depends on the number of bits present in the number for the addition. If 4-bits numbers are to
be added, then there will be 4-full adder in the parallel binary adder.
Required Apparatus:
1.74HC283(4-bit adder)-1 piece
2.74HC86(Quad XOR gate)-1 piece
3.Switches-9 pieces
4.LED-5 pieces
5.Resistors-5 pieces
6.Power supply
7.Connecting wires
Circuit Diagram:
Output:
A=0000,B=0000,Co=0,S=0000
A=0001,B=0000,Co=0,S=0001
A=0001,B=0001,Co=0,S=0010
A=0011,B=0011,Co=0,S=0110
A=0111,B=0011,Co=0,S=1010
A=0111,B=0111,Co=0,S=1110
A=1000,B=1000,Co=1,S=0000
A=1111,B=1111,Co=1,S=1110
Discussion & conclusion:
We used Quad XOR gate and 4 Bit Adder IC to design the circuit so that we can get the sum
output. We used resistors so excess current didn’t damage our LED. We applied little amount
5V power supply so our IC chips did not get damaged. We maintained all types of precautions
so our experiment was successful.
Experiment No: 06
Experiment Name: Design & Construct MOD 8 Asynchronous
Up/Down Counter
Objectives:
1.To know about asynchronous counter.
2.To know the circuit of MOD 8 asynchronous counter and its implementation.
Theory:
Asynchronous counters are those whose output is free from the clock signal. Because the flip
flops in asynchronous counters are supplied with different clock signals, there may be delay in
producing output. Up/Down counter is the combination of both the counters in which we can
perform up or down counting by changing the Mode control input.
Output Table:
Counter State Q2 Q1 Q0
0 0 0 0
1 0 0 1
2 0 1 0
3 0 1 1
4 1 0 0
5 1 0 1
6 1 1 0
7 1 1 1
Required Apparatus:
1.74HC73(Dual J-K flipflop)-2 pieces
2.74HC04(hex inverter)-1 piece
3.74HC08(Quad AND gate)-1 piece
4.74HC32(Quad OR gate)-1 piece
5.LED -4 pieces
6.Resistor-4 pieces
7.Switches-1piece
8.Power supply & connecting wire
9.Fucntion generator-1 piece
Circuit Diagram:
Output:
1.Up counter when Mode selection Switch is logic 1.
2.Down Counter when Mode selection switch is logic 0
Discussion & Conclusion:
We used Dual J-K flipflop, Quad AND gate,Quad OR gate and hex inverter to design the circuit
so that we can get the counter output. We used resistor so that excess current can’t damage
our LED. We applied little amount 5V power supply so our IC chips did not get damaged.we
have used function generator to provide initial clock signal. We maintained all types of
precautions so our experiment was successful.
