Relion® 670 SERIES

Transformer protection RET670

Version 2.2 IEC
Technical manual
 Document ID: 1MRK 504 164-UEN
Issued: June 2021
Revision: N
Product version: 2.2

© 2017 - 2021 Hitachi Power Grids. All rights reserved

Copyright
This document and parts thereof must not be reproduced or copied without written permission from
Hitachi Power Grids, and the contents thereof must not be imparted to a third party, nor used for any
unauthorized purpose.

The software and hardware described in this document is furnished under a license and may be used
or disclosed only in accordance with the terms of such license.

This product includes software developed by the OpenSSL Project for use in the OpenSSL Toolkit.
(https://www.openssl.org/) This product includes cryptographic software written/developed by: Eric
Young (eay@cryptsoft.com) and Tim Hudson (tjh@cryptsoft.com).

Trademarks
ABB is a registered trademark of ABB Asea Brown Boveri Ltd. Manufactured by/for a Hitachi Power
Grids company. All other brand or product names mentioned in this document may be trademarks or
registered trademarks of their respective holders.

Warranty
Please inquire about the terms of warranty from your nearest Hitachi Power Grids representative.
Disclaimer
The data, examples and diagrams in this manual are included solely for the concept or product
description and are not to be deemed as a statement of guaranteed properties. All persons
responsible for applying the equipment addressed in this manual must satisfy themselves that each
intended application is suitable and acceptable, including that any applicable safety or other
operational requirements are complied with. In particular, any risks in applications where a system
failure and/or product failure would create a risk for harm to property or persons (including but not
limited to personal injuries or death) shall be the sole responsibility of the person or entity applying
the equipment, and those so responsible are hereby requested to ensure that all measures are taken
to exclude or mitigate such risks.

This document has been carefully checked by Hitachi Power Grids but deviations cannot be
completely ruled out. In case any errors are detected, the reader is kindly requested to notify the
manufacturer. Other than under explicit contractual commitments, in no event shall Hitachi Power
Grids be responsible or liable for any loss or damage resulting from the use of this manual or the
application of the equipment.
Conformity
This product complies with the directive of the Council of the European Communities on the
approximation of the laws of the Member States relating to electromagnetic compatibility (EMC
Directive 2004/108/EC) and concerning electrical equipment for use within specified voltage limits
(Low-voltage directive 2006/95/EC). This conformity is the result of tests conducted by Hitachi Power
Grids in accordance with the product standard EN 60255-26 for the EMC directive, and with the
product standards EN 60255-1 and EN 60255-27 for the low voltage directive. The product is
designed in accordance with the international standards of the IEC 60255 series.
1MRK 504 164-UEN Rev. N Table of contents

Table of contents

Section 1 Introduction..................................................................................................49
1.1 This manual.........................................................................................................................49
1.1.1 Presumptions for Technical Data.......................................................................................49
1.2 Intended audience...............................................................................................................49
1.3 Product documentation....................................................................................................... 50
1.3.1 Product documentation set................................................................................................50
1.3.2 Document revision history................................................................................................. 51
1.3.3 Related documents........................................................................................................... 52
1.4 Document symbols and conventions...................................................................................53
1.4.1 Symbols.............................................................................................................................53
1.4.2 Document conventions......................................................................................................53
1.5 IEC 61850 edition 1 / edition 2 mapping............................................................................. 56

Section 2 Available functions...................................................................................... 61

2.1 Main protection functions.................................................................................................... 61
2.2 Back-up protection functions............................................................................................... 63
2.3 Control and monitoring functions.........................................................................................64
2.4 Communication................................................................................................................... 70
2.5 Basic IED functions............................................................................................................. 74

Section 3 Analog inputs...............................................................................................77

3.1 Introduction..........................................................................................................................77
3.2 Function block..................................................................................................................... 77
3.3 Signals.................................................................................................................................77
3.4 Settings............................................................................................................................... 79
3.5 Monitored data.................................................................................................................... 86
3.6 Operation principle.............................................................................................................. 86
3.7 Technical data..................................................................................................................... 87

Section 4 Binary input and output modules.............................................................. 89

4.1 Binary input......................................................................................................................... 89
4.1.1 Binary input debounce filter...............................................................................................89
4.1.2 Oscillation filter.................................................................................................................. 89
4.1.3 Settings............................................................................................................................. 89
4.1.3.1 Setting parameters for binary input modules............................................................... 89
4.1.3.2 Setting parameters for binary input/output module...................................................... 90

Section 5 Local Human-Machine-Interface LHMI ......................................................91

5.1 Local HMI screen behaviour................................................................................................91
5.1.1 Identification...................................................................................................................... 91
5.1.2 Settings............................................................................................................................. 91
5.2 Local HMI signals................................................................................................................ 91

Transformer protection RET670 1

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

5.2.1 Identification...................................................................................................................... 91
5.2.2 Function block................................................................................................................... 91
5.2.3 Signals...............................................................................................................................92
5.3 Basic part for LED indication module.................................................................................. 92
5.3.1 Identification...................................................................................................................... 92
5.3.2 Function block................................................................................................................... 92
5.3.3 Signals...............................................................................................................................93
5.3.4 Settings............................................................................................................................. 93
5.4 LCD part for HMI function keys control module ..................................................................94
5.4.1 Identification...................................................................................................................... 94
5.4.2 Function block................................................................................................................... 94
5.4.3 Signals...............................................................................................................................94
5.4.4 Settings............................................................................................................................. 95
5.5 Operation principle.............................................................................................................. 96
5.5.1 Local HMI.......................................................................................................................... 96
5.5.1.1 Keypad......................................................................................................................... 97
5.5.1.2 Display......................................................................................................................... 99
5.5.1.3 LEDs.......................................................................................................................... 101
5.5.2 LED configuration alternatives........................................................................................ 102
5.5.2.1 Functionality .............................................................................................................. 102
5.5.2.2 Status LEDs............................................................................................................... 102
5.5.2.3 Indication LEDs.......................................................................................................... 103
5.5.3 Function keys.................................................................................................................. 110
5.5.3.1 Functionality .............................................................................................................. 110
5.5.3.2 Operation principle .................................................................................................... 110
5.5.3.3 Enabling and Disabling Authority on Function keys....................................................111

Section 6 Wide area measurement system.............................................................. 113

6.1 IEC/IEEE 60255-118 (C37.118) Phasor Measurement Data Streaming Protocol
Configuration PMUCONF.................................................................................................. 113
6.1.1 Identification.................................................................................................................... 113
6.1.2 Functionality ................................................................................................................... 113
6.1.3 Operation principle.......................................................................................................... 113
6.1.3.1 IEEE C37.118 Message Framework.......................................................................... 114
6.1.3.2 Short guidance for use of TCP................................................................................... 114
6.1.3.3 Short guidance for use of UDP...................................................................................115
6.1.4 Settings............................................................................................................................117
6.2 Protocol reporting via IEEE 1344 and IEC/IEEE 60255-118 (C37.118) PMUREPORT.....119
6.2.1 Identification.................................................................................................................... 119
6.2.2 Functionality ................................................................................................................... 119
6.2.3 Function block................................................................................................................. 121
6.2.4 Signals.............................................................................................................................123
6.2.5 Settings........................................................................................................................... 126
6.2.6 Monitored data................................................................................................................ 137
6.2.7 Operation principle.......................................................................................................... 140
6.2.7.1 Frequency reporting................................................................................................... 142
6.2.7.2 Reporting filters.......................................................................................................... 143

2 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

6.2.7.3 Scaling Factors for ANALOGREPORT channels.......................................................144

6.2.8 Technical data................................................................................................................. 145

Section 7 Differential protection............................................................................... 147

7.1 Transformer differential protection T2WPDIF and T3WPDIF ........................................... 147
7.1.1 Identification.................................................................................................................... 147
7.1.2 Functionality ................................................................................................................... 147
7.1.3 Function block................................................................................................................. 149
7.1.4 Signals.............................................................................................................................150
7.1.5 Settings........................................................................................................................... 152
7.1.6 Monitored data................................................................................................................ 157
7.1.7 Operation principle.......................................................................................................... 157
7.1.7.1 Function calculation principles................................................................................... 158
7.1.7.2 Logic diagram.............................................................................................................175
7.1.8 Technical data................................................................................................................. 179
7.2 High impedance differential protection, single phase HZPDIF .........................................180
7.2.1 Identification.................................................................................................................... 180
7.2.2 Functionality ................................................................................................................... 180
7.2.3 Function block................................................................................................................. 181
7.2.4 Signals.............................................................................................................................181
7.2.5 Settings........................................................................................................................... 181
7.2.6 Monitored data................................................................................................................ 181
7.2.7 Operation principle.......................................................................................................... 182
7.2.7.1 Logic diagram.............................................................................................................183
7.2.8 Technical data................................................................................................................. 184
7.3 Low impedance restricted earth fault protection REFPDIF .............................................. 184
7.3.1 Function revision history..................................................................................................184
7.3.2 Identification.................................................................................................................... 185
7.3.3 Functionality.................................................................................................................... 185
7.3.4 Function block................................................................................................................. 185
7.3.5 Signals.............................................................................................................................186
7.3.6 Settings........................................................................................................................... 186
7.3.7 Monitored data................................................................................................................ 187
7.3.8 Operation principle.......................................................................................................... 187
7.3.8.1 Fundamental principles of the restricted earth fault protection.................................. 187
7.3.8.2 Restricted earth fault protection, low impedance differential protection ....................189
7.3.8.3 Calculation of differential current and bias current.....................................................190
7.3.8.4 Detection of external earth faults............................................................................... 191
7.3.8.5 Algorithm of the restricted earth fault protection........................................................ 193
7.3.9 Technical data................................................................................................................. 193
7.4 Additional security logic for differential protection LDRGFC ............................................ 194
7.4.1 Identification.................................................................................................................... 194
7.4.2 Functionality ................................................................................................................... 194
7.4.3 Function block................................................................................................................. 195
7.4.4 Signals.............................................................................................................................195
7.4.5 Settings........................................................................................................................... 196

Transformer protection RET670 3

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

7.4.6 Monitored data................................................................................................................ 196

7.4.7 Operation principle.......................................................................................................... 197
7.4.8 Technical data................................................................................................................. 200
7.5 Self-adaptive differential protection for two-winding power transformers PSTPDIF..........201
7.5.1 Identification.................................................................................................................... 201
7.5.2 Functionality ................................................................................................................... 201
7.5.3 Function block................................................................................................................. 202
7.5.4 Signals.............................................................................................................................203
7.5.5 Settings........................................................................................................................... 204
7.5.6 Monitored data................................................................................................................ 206
7.5.7 Operation principle.......................................................................................................... 206
7.5.7.1 Function calculation principles................................................................................... 208
7.5.7.2 Logic diagram.............................................................................................................219
7.5.8 Technical data................................................................................................................. 223
7.5.8.1 Technical data............................................................................................................ 223

Section 8 Impedance protection............................................................................... 225

8.1 Distance measuring zones, quadrilateral characteristic ZMQPDIS,
ZMQAPDIS, ZDRDIR........................................................................................................ 225
8.1.1 Identification.................................................................................................................... 225
8.1.2 Functionality ................................................................................................................... 225
8.1.3 Function block................................................................................................................. 226
8.1.4 Signals.............................................................................................................................227
8.1.5 Settings........................................................................................................................... 228
8.1.6 Monitored data................................................................................................................ 231
8.1.7 Operation principle.......................................................................................................... 231
8.1.7.1 Full scheme measurement.........................................................................................231
8.1.7.2 Impedance characteristic .......................................................................................... 232
8.1.7.3 Minimum operating current........................................................................................ 235
8.1.7.4 Measuring principles.................................................................................................. 236
8.1.7.5 Directional impedance element for quadrilateral characteristics................................238
8.1.7.6 Simplified logic diagrams........................................................................................... 240
8.1.8 Technical data................................................................................................................. 243
8.2 Phase selection, quad, fixed angle, load encroachment FDPSPDIS................................ 244
8.2.1 Identification.................................................................................................................... 244
8.2.1.1 Identification............................................................................................................... 244
8.2.2 Functionality ................................................................................................................... 244
8.2.3 Function block................................................................................................................. 245
8.2.4 Signals.............................................................................................................................245
8.2.5 Settings........................................................................................................................... 246
8.2.6 Operation principle.......................................................................................................... 247
8.2.6.1 Phase-to-earth fault....................................................................................................248
8.2.6.2 Phase-to-phase fault.................................................................................................. 250
8.2.6.3 Three-phase faults..................................................................................................... 251
8.2.6.4 Load encroachment................................................................................................... 252
8.2.6.5 Minimum operate currents......................................................................................... 255
8.2.6.6 Simplified logic diagrams........................................................................................... 255

4 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

8.2.7 Technical data................................................................................................................. 260

8.3 Distance measuring zone, quadrilateral characteristic for series compensated lines
ZMCPDIS, ZMCAPDIS, ZDSRDIR....................................................................................260
8.3.1 Identification.................................................................................................................... 260
8.3.2 Functionality ................................................................................................................... 260
8.3.3 Function block................................................................................................................. 261
8.3.4 Signals.............................................................................................................................262
8.3.5 Settings........................................................................................................................... 263
8.3.6 Monitored data................................................................................................................ 267
8.3.7 Operation principle.......................................................................................................... 267
8.3.7.1 Full scheme measurement.........................................................................................267
8.3.7.2 Impedance characteristic........................................................................................... 268
8.3.7.3 Minimum operating current........................................................................................ 271
8.3.7.4 Measuring principles.................................................................................................. 271
8.3.7.5 Directionality for series compensation....................................................................... 273
8.3.7.6 Simplified logic diagrams........................................................................................... 275
8.3.8 Technical data................................................................................................................. 278
8.4 Full-scheme distance measuring, Mho characteristic ZMHPDIS ..................................... 278
8.4.1 Identification.................................................................................................................... 278
8.4.2 Functionality ................................................................................................................... 278
8.4.3 Function block................................................................................................................. 279
8.4.4 Signals.............................................................................................................................279
8.4.5 Settings........................................................................................................................... 280
8.4.6 Operation principle.......................................................................................................... 281
8.4.6.1 Full scheme measurement.........................................................................................281
8.4.6.2 Impedance characteristic .......................................................................................... 281
8.4.6.3 Basic operation characteristics.................................................................................. 282
8.4.6.4 Theory of operation.................................................................................................... 284
8.4.6.5 Simplified logic diagrams........................................................................................... 292
8.4.7 Technical data................................................................................................................. 295
8.5 Full-scheme distance protection, quadrilateral for earth faults ZMMPDIS, ZMMAPDIS... 296
8.5.1 Identification.................................................................................................................... 296
8.5.2 Functionality ................................................................................................................... 296
8.5.3 Function block................................................................................................................. 297
8.5.4 Signals.............................................................................................................................297
8.5.5 Settings........................................................................................................................... 298
8.5.6 Operation principle.......................................................................................................... 299
8.5.6.1 Full scheme measurement.........................................................................................299
8.5.6.2 Impedance characteristic........................................................................................... 300
8.5.6.3 Minimum operating current........................................................................................ 301
8.5.6.4 Measuring principles.................................................................................................. 302
8.5.6.5 Directionality...............................................................................................................304
8.5.6.6 Simplified logic diagrams........................................................................................... 305
8.5.7 Technical data................................................................................................................. 308
8.6 Directional impedance element for mho characteristic and additional distance
protection directional function for earth faults ZDMRDIR, ZDARDIR................................ 308

Transformer protection RET670 5

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

8.6.1 Identification.................................................................................................................... 308

8.6.2 Functionality ................................................................................................................... 308
8.6.3 Function block................................................................................................................. 309
8.6.4 Signals.............................................................................................................................309
8.6.5 Settings........................................................................................................................... 310
8.6.6 Monitored data.................................................................................................................311
8.6.7 Operation principle.......................................................................................................... 311
8.6.7.1 Directional impedance element for mho characteristic ZDMRDIR ............................ 311
8.6.7.2 Additional distance protection directional function for earth faults ZDARDIR ........... 313
8.7 Mho impedance supervision logic ZSMGAPC.................................................................. 315
8.7.1 Identification.................................................................................................................... 315
8.7.2 Functionality ................................................................................................................... 315
8.7.3 Function block................................................................................................................. 315
8.7.4 Signals.............................................................................................................................316
8.7.5 Settings........................................................................................................................... 316
8.7.6 Operation principle.......................................................................................................... 317
8.7.6.1 Fault inception detection............................................................................................ 317
8.8 Faulty phase identification with load encroachment FMPSPDIS...................................... 318
8.8.1 Identification.................................................................................................................... 318
8.8.2 Functionality ................................................................................................................... 318
8.8.3 Function block................................................................................................................. 318
8.8.4 Signals.............................................................................................................................318
8.8.5 Settings........................................................................................................................... 319
8.8.6 Operation principle.......................................................................................................... 320
8.8.6.1 The phase selection function..................................................................................... 320
8.8.7 Technical data................................................................................................................. 329
8.9 Distance protection zone, quadrilateral characteristic, separate settings ZMRPDIS,
ZMRAPDIS and ZDRDIR.................................................................................................. 329
8.9.1 Identification.................................................................................................................... 329
8.9.2 Functionality ................................................................................................................... 330
8.9.3 Function block................................................................................................................. 330
8.9.4 Signals.............................................................................................................................331
8.9.5 Settings........................................................................................................................... 332
8.9.6 Operation principle.......................................................................................................... 334
8.9.6.1 Full scheme measurement.........................................................................................334
8.9.6.2 Impedance characteristic........................................................................................... 335
8.9.6.3 Minimum operating current........................................................................................ 338
8.9.6.4 Measuring principles.................................................................................................. 338
8.9.6.5 Directional impedance element for quadrilateral characteristics................................340
8.9.6.6 Simplified logic diagrams........................................................................................... 342
8.9.7 Technical data................................................................................................................. 345
8.10 Phase selection, quadrilateral characteristic with settable angle FRPSPDIS................... 346
8.10.1 Identification.................................................................................................................... 346
8.10.2 Functionality ................................................................................................................... 346
8.10.3 Function block................................................................................................................. 347
8.10.4 Signals.............................................................................................................................347

6 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

8.10.5 Settings........................................................................................................................... 348

8.10.6 Operation principle.......................................................................................................... 349
8.10.6.1 Phase-to-earth fault....................................................................................................350
8.10.6.2 Phase-to-phase fault.................................................................................................. 352
8.10.6.3 Three-phase faults..................................................................................................... 353
8.10.6.4 Load encroachment................................................................................................... 354
8.10.6.5 Minimum operate currents......................................................................................... 358
8.10.6.6 Simplified logic diagrams........................................................................................... 358
8.10.7 Technical data................................................................................................................. 362
8.11 High speed distance protection ZMFPDIS ....................................................................... 363
8.11.1 Function revision history..................................................................................................363
8.11.2 Identification.................................................................................................................... 363
8.11.3 Functionality ................................................................................................................... 363
8.11.4 Function block................................................................................................................. 365
8.11.5 Signals.............................................................................................................................366
8.11.6 Settings........................................................................................................................... 368
8.11.7 Monitored data................................................................................................................ 374
8.11.8 Operation principle.......................................................................................................... 375
8.11.8.1 Filtering...................................................................................................................... 376
8.11.8.2 Distance measuring zones.........................................................................................376
8.11.8.3 Phase-selection element............................................................................................377
8.11.8.4 Directional criteria...................................................................................................... 378
8.11.8.5 Fuse failure................................................................................................................ 379
8.11.8.6 Measuring principles.................................................................................................. 379
8.11.8.7 Under-impedance phase selection with load enchroachment....................................392
8.11.8.8 Simplified logic schemes............................................................................................393
8.11.8.9 Measurement............................................................................................................. 399
8.11.9 Technical data................................................................................................................. 408
8.12 High speed distance protection for series compensated lines ZMFCPDIS ......................409
8.12.1 Function revision history..................................................................................................409
8.12.2 Identification.................................................................................................................... 409
8.12.3 Functionality ................................................................................................................... 409
8.12.4 Function block................................................................................................................. 411
8.12.5 Signals.............................................................................................................................412
8.12.6 Settings........................................................................................................................... 414
8.12.7 Monitored data................................................................................................................ 422
8.12.8 Operation principle.......................................................................................................... 423
8.12.8.1 Filtering...................................................................................................................... 423
8.12.8.2 Distance measuring zones.........................................................................................424
8.12.8.3 Phase-selection element............................................................................................424
8.12.8.4 Directional criteria...................................................................................................... 425
8.12.8.5 Transient directional element..................................................................................... 426
8.12.8.6 Fuse failure................................................................................................................ 427
8.12.8.7 Power swings............................................................................................................. 428
8.12.8.8 Measurement principles............................................................................................. 428
8.12.8.9 Load encroachment and under-impedance starting element.....................................441

Transformer protection RET670 7

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

8.12.8.10 Simplified logic schemes............................................................................................442

8.12.8.11 Measurement............................................................................................................. 448
8.12.9 Technical data................................................................................................................. 453
8.13 Power swing detection, blocking and unblocking ZMBURPSB......................................... 454
8.13.1 Function revision history..................................................................................................454
8.13.2 Identification.................................................................................................................... 454
8.13.3 Functionality ................................................................................................................... 454
8.13.4 Function block................................................................................................................. 455
8.13.5 Signals.............................................................................................................................455
8.13.6 Settings........................................................................................................................... 456
8.13.7 Monitored data................................................................................................................ 457
8.13.8 Operation principle.......................................................................................................... 457
8.13.8.1 Power swing detection and blocking.......................................................................... 457
8.13.8.2 Power swing unblocking.............................................................................................462
8.13.9 Technical data................................................................................................................. 466
8.14 Automatic switch onto fault logic ZCVPSOF .................................................................... 466
8.14.1 Function revision history..................................................................................................466
8.14.2 Identification.................................................................................................................... 466
8.14.3 Functionality ................................................................................................................... 467
8.14.4 Function block................................................................................................................. 467
8.14.5 Signals.............................................................................................................................467
8.14.6 Settings........................................................................................................................... 467
8.14.7 Monitored data................................................................................................................ 468
8.14.8 Operation principle ......................................................................................................... 468
8.14.9 Technical data................................................................................................................. 469
8.15 Power swing logic PSLPSCH ...........................................................................................470
8.15.1 Function revision history..................................................................................................470
8.15.2 Identification.................................................................................................................... 470
8.15.3 Functionality ................................................................................................................... 470
8.15.4 Function block................................................................................................................. 471
8.15.5 Signals.............................................................................................................................471
8.15.6 Settings........................................................................................................................... 472
8.15.7 Operation principle.......................................................................................................... 472
8.15.7.1 Communication and tripping logic.............................................................................. 472
8.15.7.2 Blocking logic............................................................................................................. 473
8.16 Pole slip protection PSPPPAM .........................................................................................474
8.16.1 Identification.................................................................................................................... 474
8.16.2 Functionality.................................................................................................................... 474
8.16.3 Function block................................................................................................................. 474
8.16.4 Signals.............................................................................................................................475
8.16.5 Settings........................................................................................................................... 475
8.16.6 Monitored data................................................................................................................ 476
8.16.7 Operation principle.......................................................................................................... 476
8.16.8 Technical data................................................................................................................. 479
8.17 Out-of-step protection OOSPPAM.....................................................................................480
8.17.1 Identification.................................................................................................................... 480

8 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

8.17.2 Functionality ................................................................................................................... 480

8.17.3 Function block................................................................................................................. 480
8.17.4 Signals.............................................................................................................................481
8.17.5 Settings........................................................................................................................... 481
8.17.6 Monitored data................................................................................................................ 482
8.17.7 Operation principle.......................................................................................................... 483
8.17.7.1 Lens characteristic..................................................................................................... 485
8.17.7.2 Detecting an out-of-step condition............................................................................. 487
8.17.7.3 Maximum slip frequency............................................................................................ 487
8.17.7.4 Taking care of the circuit breaker .............................................................................. 488
8.17.7.5 Design........................................................................................................................ 490
8.17.8 Technical data................................................................................................................. 490
8.18 Phase preference logic PPLPHIZ......................................................................................491
8.18.1 Function revision history..................................................................................................491
8.18.2 Identification.................................................................................................................... 491
8.18.3 Functionality ................................................................................................................... 491
8.18.4 Function block................................................................................................................. 492
8.18.5 Signals.............................................................................................................................492
8.18.6 Settings........................................................................................................................... 492
8.18.7 Operation principle ......................................................................................................... 493
8.18.7.1 Residual current criteria............................................................................................. 494
8.18.7.2 Phase selection..........................................................................................................495
8.18.7.3 Preference logic......................................................................................................... 496
8.18.7.4 Output........................................................................................................................ 498
8.19 Phase preference logic PPL2PHIZ....................................................................................500
8.19.1 Function revision history..................................................................................................500
8.19.2 Identification.................................................................................................................... 500
8.19.3 Functionality ................................................................................................................... 500
8.19.4 Function block................................................................................................................. 501
8.19.5 Signals.............................................................................................................................501
8.19.6 Settings........................................................................................................................... 501
8.19.7 Operation principle.......................................................................................................... 502
8.19.7.1 Residual current criteria............................................................................................. 503
8.19.7.2 Phase selection..........................................................................................................504
8.19.7.3 Preference logic......................................................................................................... 505
8.19.7.4 Output........................................................................................................................ 507
8.19.8 Technical data................................................................................................................. 508
8.20 Under impedance protection for generators and transformers ZGVPDIS.........................509
8.20.1 Identification.................................................................................................................... 509
8.20.2 Functionality ................................................................................................................... 509
8.20.3 Function block................................................................................................................. 509
8.20.4 Signals.............................................................................................................................510
8.20.5 Settings........................................................................................................................... 510
8.20.6 Monitored data.................................................................................................................511
8.20.7 Operation principle.......................................................................................................... 512
8.20.7.1 Operation principle of zone 1..................................................................................... 514

Transformer protection RET670 9

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

8.20.7.2 Operation principle of zone 2..................................................................................... 516

8.20.7.3 Operation principle of zone 3..................................................................................... 519
8.20.7.4 Load encroachment................................................................................................... 519
8.20.7.5 Under voltage seal-in................................................................................................. 520
8.20.8 Technical data................................................................................................................. 521

Section 9 Current protection..................................................................................... 523

9.1 Instantaneous phase overcurrent protection PHPIOC ..................................................... 523
9.1.1 Identification.................................................................................................................... 523
9.1.2 Functionality ................................................................................................................... 523
9.1.3 Function block................................................................................................................. 523
9.1.4 Signals.............................................................................................................................523
9.1.5 Settings........................................................................................................................... 524
9.1.6 Monitored data................................................................................................................ 524
9.1.7 Operation principle ......................................................................................................... 524
9.1.8 Technical data................................................................................................................. 525
9.2 Directional phase overcurrent protection, four steps OC4PTOC ..................................... 525
9.2.1 Function revision history..................................................................................................526
9.2.2 Identification.................................................................................................................... 526
9.2.3 Functionality ................................................................................................................... 526
9.2.4 Function block................................................................................................................. 527
9.2.5 Signals.............................................................................................................................527
9.2.6 Settings........................................................................................................................... 529
9.2.7 Monitored data................................................................................................................ 534
9.2.8 Operation principle.......................................................................................................... 535
9.2.9 Technical data................................................................................................................. 540
9.3 Instantaneous residual overcurrent protection EFPIOC ...................................................541
9.3.1 Identification.................................................................................................................... 541
9.3.2 Functionality ................................................................................................................... 541
9.3.3 Function block................................................................................................................. 541
9.3.4 Signals.............................................................................................................................541
9.3.5 Settings........................................................................................................................... 542
9.3.6 Monitored data................................................................................................................ 542
9.3.7 Operation principle ......................................................................................................... 542
9.3.8 Technical data................................................................................................................. 543
9.4 Directional residual overcurrent protection, four steps EF4PTOC ................................... 544
9.4.1 Function revision history..................................................................................................544
9.4.2 Identification.................................................................................................................... 544
9.4.3 Functionality ................................................................................................................... 544
9.4.4 Function block................................................................................................................. 545
9.4.5 Signals.............................................................................................................................545
9.4.6 Settings........................................................................................................................... 546
9.4.7 Monitored data................................................................................................................ 552
9.4.8 Operation principle.......................................................................................................... 552
9.4.8.1 Operating quantity within the function........................................................................ 552
9.4.8.2 Internal polarizing.......................................................................................................553

10 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

9.4.8.3 External polarizing for earth-fault function..................................................................555

9.4.8.4 Directional detection for earth fault function ..............................................................555
9.4.8.5 Base quantities within the protection..........................................................................555
9.4.8.6 Internal earth-fault protection structure...................................................................... 555
9.4.8.7 Four residual overcurrent steps................................................................................. 555
9.4.8.8 Directional supervision element with integrated directional comparison function...... 557
9.4.8.9 Second harmonic blocking element........................................................................... 559
9.4.8.10 Switch on to fault feature............................................................................................561
9.4.8.11 Phase selection element............................................................................................ 563
9.4.9 Technical data................................................................................................................. 564
9.5 Four step directional negative phase sequence overcurrent protection NS4PTOC .........564
9.5.1 Function revision history..................................................................................................565
9.5.2 Identification.................................................................................................................... 565
9.5.3 Functionality ................................................................................................................... 565
9.5.4 Function block................................................................................................................. 566
9.5.5 Signals.............................................................................................................................566
9.5.6 Settings........................................................................................................................... 567
9.5.7 Monitored data................................................................................................................ 571
9.5.8 Operation principle ......................................................................................................... 571
9.5.8.1 Operating quantity within the function........................................................................ 572
9.5.8.2 Internal polarizing facility of the function.................................................................... 572
9.5.8.3 External polarizing for negative sequence function....................................................573
9.5.8.4 Internal negative sequence protection structure........................................................ 573
9.5.8.5 Four negative sequence overcurrent stages..............................................................573
9.5.8.6 Directional supervision element with integrated directional comparison function...... 574
9.5.9 Technical data................................................................................................................. 576
9.6 Sensitive directional residual overcurrent and power protection SDEPSDE ....................577
9.6.1 Identification.................................................................................................................... 577
9.6.2 Functionality ................................................................................................................... 577
9.6.3 Function block................................................................................................................. 579
9.6.4 Signals.............................................................................................................................579
9.6.5 Settings........................................................................................................................... 580
9.6.6 Monitored data................................................................................................................ 582
9.6.7 Operation principle.......................................................................................................... 582
9.6.7.1 Function inputs...........................................................................................................582
9.6.8 Technical data................................................................................................................. 588
9.7 Thermal overload protection, one time constant, Celsius/Fahrenheit LCPTTR/LFPTTR..589
9.7.1 Identification.................................................................................................................... 589
9.7.2 Functionality ................................................................................................................... 589
9.7.3 Function block................................................................................................................. 590
9.7.4 Signals.............................................................................................................................590
9.7.5 Settings........................................................................................................................... 591
9.7.6 Monitored data................................................................................................................ 592
9.7.7 Operation principle.......................................................................................................... 593
9.7.8 Technical data................................................................................................................. 596
9.8 Thermal overload protection, two time constants TRPTTR ..............................................596

Transformer protection RET670 11

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

9.8.1 Identification.................................................................................................................... 596

9.8.2 Functionality ................................................................................................................... 596
9.8.3 Function block................................................................................................................. 597
9.8.4 Signals.............................................................................................................................597
9.8.5 Settings........................................................................................................................... 597
9.8.6 Monitored data................................................................................................................ 599
9.8.7 Operation principle ......................................................................................................... 599
9.8.8 Technical data................................................................................................................. 603
9.9 Breaker failure protection CCRBRF ................................................................................. 603
9.9.1 Function revision history..................................................................................................603
9.9.2 Identification.................................................................................................................... 604
9.9.3 Functionality ................................................................................................................... 604
9.9.4 Function block................................................................................................................. 604
9.9.5 Signals.............................................................................................................................605
9.9.6 Settings........................................................................................................................... 605
9.9.7 Monitored data................................................................................................................ 607
9.9.8 Operation principle ......................................................................................................... 607
9.9.9 Technical data................................................................................................................. 612
9.10 Stub protection STBPTOC ............................................................................................... 612
9.10.1 Function revision history..................................................................................................612
9.10.2 Identification.................................................................................................................... 613
9.10.3 Functionality ................................................................................................................... 613
9.10.4 Function block................................................................................................................. 613
9.10.5 Signals.............................................................................................................................613
9.10.6 Settings........................................................................................................................... 614
9.10.7 Monitored data................................................................................................................ 614
9.10.8 Operation principle.......................................................................................................... 614
9.10.9 Technical data................................................................................................................. 615
9.11 Overcurrent protection with binary release BRPTOC........................................................615
9.11.1 Function revision history..................................................................................................615
9.11.2 Identification.................................................................................................................... 616
9.11.3 Functionality ................................................................................................................... 616
9.11.4 Function block................................................................................................................. 616
9.11.5 Signals.............................................................................................................................616
9.11.6 Settings........................................................................................................................... 617
9.11.7 Monitored data................................................................................................................ 617
9.11.8 Operation principle.......................................................................................................... 617
9.11.9 Technical data................................................................................................................. 618
9.12 Pole discordance protection CCPDSC..............................................................................619
9.12.1 Identification.................................................................................................................... 619
9.12.2 Functionality ................................................................................................................... 620
9.12.3 Function block................................................................................................................. 620
9.12.4 Signals.............................................................................................................................620
9.12.5 Settings........................................................................................................................... 621
9.12.6 Monitored data................................................................................................................ 621
9.12.7 Operation principle.......................................................................................................... 621

12 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

9.12.7.1 Pole discordance signaling from circuit breaker ........................................................623

9.12.7.2 Unsymmetrical current detection................................................................................624
9.12.8 Technical data................................................................................................................. 624
9.13 Directional underpower protection GUPPDUP..................................................................624
9.13.1 Identification.................................................................................................................... 624
9.13.2 Functionality ................................................................................................................... 624
9.13.3 Function block................................................................................................................. 625
9.13.4 Signals.............................................................................................................................626
9.13.5 Settings........................................................................................................................... 626
9.13.6 Monitored data................................................................................................................ 627
9.13.7 Operation principle.......................................................................................................... 628
9.13.7.1 Low pass filtering....................................................................................................... 629
9.13.7.2 Calibration of analog inputs........................................................................................630
9.13.8 Technical data................................................................................................................. 631
9.14 Directional overpower protection GOPPDOP ...................................................................631
9.14.1 Identification.................................................................................................................... 631
9.14.2 Functionality.................................................................................................................... 631
9.14.3 Function block................................................................................................................. 632
9.14.4 Signals.............................................................................................................................632
9.14.5 Settings........................................................................................................................... 633
9.14.6 Monitored data................................................................................................................ 634
9.14.7 Operation principle.......................................................................................................... 634
9.14.7.1 Low pass filtering....................................................................................................... 636
9.14.7.2 Calibration of analog inputs........................................................................................636
9.14.8 Technical data................................................................................................................. 637
9.15 Broken conductor check BRCPTOC ................................................................................ 637
9.15.1 Function revision history..................................................................................................638
9.15.2 Identification.................................................................................................................... 638
9.15.3 Functionality ................................................................................................................... 638
9.15.4 Function block................................................................................................................. 638
9.15.5 Signals.............................................................................................................................638
9.15.6 Settings........................................................................................................................... 639
9.15.7 Monitored data................................................................................................................ 639
9.15.8 Operation principle ......................................................................................................... 639
9.15.9 Technical data................................................................................................................. 640
9.16 Capacitor bank protection CBPGAPC...............................................................................641
9.16.1 Identification.................................................................................................................... 641
9.16.2 Functionality ................................................................................................................... 641
9.16.3 Function block................................................................................................................. 641
9.16.4 Signals.............................................................................................................................642
9.16.5 Settings........................................................................................................................... 643
9.16.6 Monitored data................................................................................................................ 644
9.16.7 Operation principle.......................................................................................................... 644
9.16.7.1 Measured quantities...................................................................................................644
9.16.7.2 Reconnection inhibit feature.......................................................................................646
9.16.7.3 Overcurrent feature.................................................................................................... 647

Transformer protection RET670 13

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

9.16.7.4 Undercurrent feature.................................................................................................. 648

9.16.7.5 Capacitor harmonic overload feature......................................................................... 648
9.16.7.6 Capacitor reactive power overload feature................................................................ 650
9.16.8 Technical data................................................................................................................. 650
9.17 Negativ sequence time overcurrent protection for machines NS2PTOC ......................... 651
9.17.1 Identification.................................................................................................................... 651
9.17.2 Functionality ................................................................................................................... 651
9.17.3 Function block................................................................................................................. 652
9.17.4 Signals.............................................................................................................................652
9.17.5 Settings........................................................................................................................... 653
9.17.6 Monitored data................................................................................................................ 654
9.17.7 Operation principle.......................................................................................................... 654
9.17.7.1 Start sensitivity .......................................................................................................... 655
9.17.7.2 Alarm function............................................................................................................ 655
9.17.7.3 Logic diagram.............................................................................................................656
9.17.8 Technical data................................................................................................................. 656
9.18 Voltage-restrained time overcurrent protection VRPVOC ................................................ 657
9.18.1 Identification.................................................................................................................... 657
9.18.2 Functionality ................................................................................................................... 657
9.18.3 Function block................................................................................................................. 657
9.18.4 Signals.............................................................................................................................658
9.18.5 Settings........................................................................................................................... 658
9.18.6 Monitored data................................................................................................................ 659
9.18.7 Operation principle.......................................................................................................... 659
9.18.7.1 Measured quantities...................................................................................................659
9.18.7.2 Base quantities...........................................................................................................659
9.18.7.3 Overcurrent protection............................................................................................... 660
9.18.7.4 Logic diagram.............................................................................................................661
9.18.7.5 Undervoltage protection............................................................................................. 662
9.18.8 Technical data................................................................................................................. 662
9.19 Average Power Transient Earth Fault Protection, APPTEF.............................................. 663
9.19.1 Identification.................................................................................................................... 663
9.19.2 Functionality.................................................................................................................... 663
9.19.3 Function block................................................................................................................. 664
9.19.4 Signals.............................................................................................................................664
9.19.5 Settings........................................................................................................................... 665
9.19.6 Monitored data................................................................................................................ 666
9.19.7 Operation principle.......................................................................................................... 666
9.19.7.1 Fundamental frequency signals behavior during an EF in a high-impedance
grounded system........................................................................................................668
9.19.7.2 Higher harmonic signals behavior during an EF in a high-impedance grounded
system........................................................................................................................672
9.19.7.3 Summary of the measurement principle for transient EF protection.......................... 674
9.19.7.4 Simplified Boolean logic diagrams ............................................................................ 675

Section 10 Voltage protection..................................................................................... 679

10.1 Two step undervoltage protection UV2PTUV ...................................................................679

14 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

10.1.1 Identification.................................................................................................................... 679

10.1.2 Functionality ................................................................................................................... 679
10.1.3 Function block................................................................................................................. 679
10.1.4 Signals.............................................................................................................................680
10.1.5 Settings........................................................................................................................... 681
10.1.6 Monitored data................................................................................................................ 683
10.1.7 Operation principle ......................................................................................................... 683
10.1.7.1 Measurement principle...............................................................................................683
10.1.7.2 Time delay..................................................................................................................684
10.1.7.3 Blocking......................................................................................................................689
10.1.7.4 Design........................................................................................................................ 690
10.1.8 Technical data................................................................................................................. 691
10.2 Two step overvoltage protection OV2PTOV .....................................................................691
10.2.1 Identification.................................................................................................................... 691
10.2.2 Functionality OV2PTOV ................................................................................................. 691
10.2.3 Function block................................................................................................................. 692
10.2.4 Signals.............................................................................................................................692
10.2.5 Settings........................................................................................................................... 693
10.2.6 Monitored data................................................................................................................ 695
10.2.7 Operation principle ......................................................................................................... 695
10.2.7.1 Measurement principle...............................................................................................696
10.2.7.2 Time delay..................................................................................................................696
10.2.7.3 Blocking......................................................................................................................701
10.2.7.4 Design........................................................................................................................ 701
10.2.8 Technical data................................................................................................................. 702
10.3 Two step residual overvoltage protection ROV2PTOV .................................................... 703
10.3.1 Function revision history..................................................................................................703
10.3.2 Identification.................................................................................................................... 703
10.3.3 Functionality ................................................................................................................... 703
10.3.4 Function block................................................................................................................. 704
10.3.5 Signals.............................................................................................................................704
10.3.6 Settings........................................................................................................................... 704
10.3.7 Monitored data................................................................................................................ 706
10.3.8 Operation principle.......................................................................................................... 706
10.3.8.1 Measurement principle...............................................................................................706
10.3.8.2 Time delay..................................................................................................................707
10.3.8.3 Blocking......................................................................................................................712
10.3.8.4 Design........................................................................................................................ 712
10.3.9 Technical data................................................................................................................. 713
10.4 Overexcitation protection OEXPVPH ............................................................................... 713
10.4.1 Identification.................................................................................................................... 713
10.4.2 Functionality ................................................................................................................... 713
10.4.3 Function block................................................................................................................. 714
10.4.4 Signals.............................................................................................................................714
10.4.5 Settings........................................................................................................................... 714
10.4.6 Monitored data................................................................................................................ 715

Transformer protection RET670 15

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

10.4.7 Operation principle.......................................................................................................... 715

10.4.7.1 Measured voltage.......................................................................................................717
10.4.7.2 Operate time of the overexcitation protection............................................................ 718
10.4.7.3 Cooling....................................................................................................................... 721
10.4.7.4 Overexcitation protection function measurands......................................................... 721
10.4.7.5 Overexcitation alarm.................................................................................................. 722
10.4.7.6 Logic diagram.............................................................................................................722
10.4.8 Technical data................................................................................................................. 723
10.5 Voltage differential protection VDCPTOV .........................................................................723
10.5.1 Function revision history..................................................................................................723
10.5.2 Identification.................................................................................................................... 724
10.5.3 Functionality ................................................................................................................... 724
10.5.4 Function block................................................................................................................. 724
10.5.5 Signals.............................................................................................................................724
10.5.6 Settings........................................................................................................................... 725
10.5.7 Monitored data................................................................................................................ 725
10.5.8 Operation principle.......................................................................................................... 725
10.5.9 Technical data................................................................................................................. 727
10.6 Loss of voltage check LOVPTUV ..................................................................................... 727
10.6.1 Identification.................................................................................................................... 727
10.6.2 Functionality ................................................................................................................... 727
10.6.3 Function block................................................................................................................. 727
10.6.4 Signals.............................................................................................................................728
10.6.5 Settings........................................................................................................................... 728
10.6.6 Operation principle.......................................................................................................... 728
10.6.7 Technical data................................................................................................................. 730

Section 11 Unbalance protection................................................................................ 731

11.1 Shunt capacitor cascading failure protection SCCFPVOC ...............................................731
11.1.1 Function revision history..................................................................................................731
11.1.2 Identification.................................................................................................................... 731
11.1.3 Functionality.................................................................................................................... 731
11.1.4 Function block................................................................................................................. 732
11.1.5 Signals.............................................................................................................................732
11.1.6 Settings........................................................................................................................... 733
11.1.7 Monitored data................................................................................................................ 734
11.1.8 Operation principle.......................................................................................................... 734
11.1.9 Technical data................................................................................................................. 738
11.2 Current unbalance protection of SCB, SCUCPTOC......................................................... 739
11.2.1 Identification.................................................................................................................... 739
11.2.2 Functionality Functionality............................................................................................... 739
11.2.3 Function block................................................................................................................. 742
11.2.4 Signals.............................................................................................................................742
11.2.5 Settings........................................................................................................................... 744
11.2.6 Monitored data................................................................................................................ 745
11.2.7 Operation principle.......................................................................................................... 746

16 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

11.2.8 Technical data................................................................................................................. 754

11.3 Phase voltage differential based capacitor bank unbalanced protection, SCPDPTOV.....754
11.3.1 Identification.................................................................................................................... 754
11.3.2 Functionality.................................................................................................................... 754
11.3.3 Function block................................................................................................................. 755
11.3.4 Signals.............................................................................................................................756
11.3.5 Settings........................................................................................................................... 757
11.3.6 Monitored data................................................................................................................ 758
11.3.7 Operation principle.......................................................................................................... 759
11.3.7.1 Voltage ratio calculation and trigger update............................................................... 760
11.3.7.2 Differential voltage calculation................................................................................... 761
11.3.7.3 Minimum voltage check..............................................................................................764
11.3.7.4 Warning, Alarm, and Trip logic................................................................................... 764
11.3.7.5 Blocking logic............................................................................................................. 767
11.3.7.6 IEC 61850 reporting................................................................................................... 767
11.3.8 Technical data................................................................................................................. 769
11.4 Voltage unbalance protection of shunt capacitor bank, SCUVPTOV................................ 770
11.4.1 Identification.................................................................................................................... 770
11.4.2 Functionality.................................................................................................................... 770
11.4.3 Function block................................................................................................................. 771
11.4.4 Signals.............................................................................................................................771
11.4.5 Settings........................................................................................................................... 772
11.4.6 Monitored data................................................................................................................ 773
11.4.7 Operation principle.......................................................................................................... 773
11.4.8 Technical data................................................................................................................. 781

Section 12 Frequency protection................................................................................ 783

12.1 Underfrequency protection SAPTUF ................................................................................783
12.1.1 Identification.................................................................................................................... 783
12.1.2 Functionality ................................................................................................................... 783
12.1.3 Function block................................................................................................................. 783
12.1.4 Signals.............................................................................................................................783
12.1.5 Settings........................................................................................................................... 784
12.1.6 Operation principle.......................................................................................................... 784
12.1.6.1 Measurement principle...............................................................................................785
12.1.6.2 Time delay..................................................................................................................785
12.1.6.3 Voltage dependent time delay....................................................................................785
12.1.6.4 Blocking......................................................................................................................786
12.1.6.5 Design........................................................................................................................ 787
12.1.7 Technical data................................................................................................................. 788
12.2 Overfrequency protection SAPTOF ..................................................................................788
12.2.1 Identification.................................................................................................................... 789
12.2.2 Functionality ................................................................................................................... 789
12.2.3 Function block................................................................................................................. 789
12.2.4 Signals.............................................................................................................................789
12.2.5 Settings........................................................................................................................... 790

Transformer protection RET670 17

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

12.2.6 Operation principle.......................................................................................................... 790

12.2.6.1 Measurement principle...............................................................................................790
12.2.6.2 Time delay..................................................................................................................790
12.2.6.3 Blocking......................................................................................................................791
12.2.6.4 Design........................................................................................................................ 791
12.2.7 Technical data................................................................................................................. 792
12.3 Rate-of-change of frequency protection SAPFRC ........................................................... 792
12.3.1 Identification.................................................................................................................... 792
12.3.2 Functionality ................................................................................................................... 793
12.3.3 Function block................................................................................................................. 793
12.3.4 Signals.............................................................................................................................793
12.3.5 Settings........................................................................................................................... 794
12.3.6 Operation principle.......................................................................................................... 794
12.3.6.1 Measurement principle...............................................................................................794
12.3.6.2 Time delay..................................................................................................................794
12.3.6.3 Blocking......................................................................................................................795
12.3.6.4 Design........................................................................................................................ 795
12.3.7 Technical data................................................................................................................. 796

Section 13 Multipurpose protection............................................................................799

13.1 General current and voltage protection CVGAPC.............................................................799
13.1.1 Function revision history..................................................................................................799
13.1.2 Identification.................................................................................................................... 799
13.1.3 Functionality.................................................................................................................... 799
13.1.4 Function block................................................................................................................. 800
13.1.5 Signals.............................................................................................................................800
13.1.6 Settings........................................................................................................................... 802
13.1.7 Monitored data................................................................................................................ 808
13.1.8 Operation principle.......................................................................................................... 809
13.1.8.1 Measured quantities within CVGAPC........................................................................ 809
13.1.8.2 Base quantities for CVGAPC function........................................................................810
13.1.8.3 Built-in overcurrent protection steps...........................................................................811
13.1.8.4 Built-in undercurrent protection steps........................................................................ 815
13.1.8.5 Built-in overvoltage protection steps.......................................................................... 815
13.1.8.6 Built-in undervoltage protection steps........................................................................ 816
13.1.8.7 Logic diagram.............................................................................................................816
13.1.9 Technical data................................................................................................................. 820

Section 14 System protection and control.................................................................823

14.1 Multipurpose filter SMAIHPAC.......................................................................................... 823
14.1.1 Identification.................................................................................................................... 823
14.1.2 Functionality ................................................................................................................... 823
14.1.3 Function block................................................................................................................. 823
14.1.4 Signals.............................................................................................................................823
14.1.5 Settings........................................................................................................................... 824
14.1.6 Operation principle.......................................................................................................... 824
14.1.7 Filter calculation example................................................................................................827

18 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

Section 15 Secondary system supervision................................................................829

15.1 Current circuit supervision CCSSPVC ............................................................................. 829
15.1.1 Identification.................................................................................................................... 829
15.1.2 Functionality ................................................................................................................... 829
15.1.3 Function block................................................................................................................. 829
15.1.4 Signals.............................................................................................................................829
15.1.5 Settings........................................................................................................................... 830
15.1.6 Operation principle.......................................................................................................... 830
15.1.7 Technical data................................................................................................................. 831
15.2 Fuse failure supervision FUFSPVC...................................................................................832
15.2.1 Identification.................................................................................................................... 832
15.2.2 Functionality ................................................................................................................... 832
15.2.3 Function block................................................................................................................. 832
15.2.4 Signals.............................................................................................................................833
15.2.5 Settings........................................................................................................................... 833
15.2.6 Monitored data................................................................................................................ 834
15.2.7 Operation principle.......................................................................................................... 834
15.2.7.1 Zero and negative sequence detection...................................................................... 834
15.2.7.2 Delta current and delta voltage detection...................................................................836
15.2.7.3 Dead line detection.................................................................................................... 839
15.2.7.4 Main logic................................................................................................................... 840
15.2.8 Technical data................................................................................................................. 843
15.3 Fuse failure supervision VDSPVC.....................................................................................843
15.3.1 Identification.................................................................................................................... 843
15.3.2 Functionality ................................................................................................................... 843
15.3.3 Function block................................................................................................................. 844
15.3.4 Signals.............................................................................................................................844
15.3.5 Settings........................................................................................................................... 844
15.3.6 Monitored data................................................................................................................ 845
15.3.7 Operation principle.......................................................................................................... 845
15.3.8 Technical data................................................................................................................. 846
15.4 Voltage based delta supervision DELVSPVC....................................................................847
15.4.1 Identification.................................................................................................................... 847
15.4.2 Functionality.................................................................................................................... 847
15.4.3 Function block................................................................................................................. 847
15.4.4 Signals.............................................................................................................................847
15.4.5 Settings........................................................................................................................... 848
15.4.6 Monitored data................................................................................................................ 849
15.4.7 Operation principle.......................................................................................................... 849
15.4.7.1 Minimum signal level check....................................................................................... 849
15.4.7.2 Mode of operation...................................................................................................... 849
15.4.7.3 Instantaneous 1 cycle / 2 cycle ................................................................................. 850
15.4.7.4 RMS/DFT based supervision..................................................................................... 850
15.4.7.5 Angle based supervision or vector shift supervision.................................................. 851
15.4.8 Technical data................................................................................................................. 852

Transformer protection RET670 19

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

15.5 Current based delta supervision DELISPVC.....................................................................852

15.5.1 Identification.................................................................................................................... 852
15.5.2 Functionality.................................................................................................................... 852
15.5.3 Function block................................................................................................................. 853
15.5.4 Signals.............................................................................................................................853
15.5.5 Settings........................................................................................................................... 854
15.5.6 Monitored data................................................................................................................ 854
15.5.7 Operation principle.......................................................................................................... 854
15.5.7.1 Minimum signal level check....................................................................................... 855
15.5.7.2 Mode of operation...................................................................................................... 855
15.5.7.3 Instantaneous 1 cycle / 2 cycle ................................................................................. 855
15.5.7.4 RMS/DFT based supervision..................................................................................... 856
15.5.7.5 2nd Harmonic blocking................................................................................................856
15.5.7.6 3rd Harmonic based adaption.....................................................................................857
15.5.8 Technical data................................................................................................................. 858
15.6 Delta supervision of real input DELSPVC......................................................................... 858
15.6.1 Identification.................................................................................................................... 858
15.6.2 Functionality.................................................................................................................... 858
15.6.3 Function block................................................................................................................. 858
15.6.4 Signals.............................................................................................................................859
15.6.5 Settings........................................................................................................................... 859
15.6.6 Operation principle.......................................................................................................... 859

Section 16 Control........................................................................................................ 861

16.1 Synchrocheck, energizing check, and synchronizing SESRSYN......................................861
16.1.1 Identification.................................................................................................................... 861
16.1.2 Functionality ................................................................................................................... 861
16.1.3 Function block................................................................................................................. 862
16.1.4 Signals.............................................................................................................................862
16.1.5 Settings........................................................................................................................... 864
16.1.6 Monitored data................................................................................................................ 866
16.1.7 Operation principle.......................................................................................................... 867
16.1.7.1 Basic functionality...................................................................................................... 867
16.1.7.2 Logic diagrams...........................................................................................................867
16.1.8 Technical data................................................................................................................. 877
16.2 Autorecloser for 1 phase, 2 phase and/or 3 phase operation SMBRREC ....................... 878
16.2.1 Identification.................................................................................................................... 879
16.2.2 Functionality ................................................................................................................... 879
16.2.3 Function block................................................................................................................. 879
16.2.4 Signals.............................................................................................................................880
16.2.5 Settings........................................................................................................................... 881
16.2.6 Operation principle.......................................................................................................... 882
16.2.6.1 Terminology explanation............................................................................................ 882
16.2.6.2 Status descriptions.....................................................................................................882
16.2.6.3 Description of the status transition............................................................................. 883
16.2.6.4 Functional sequence description................................................................................884

20 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

16.2.6.5 Time sequence diagrams........................................................................................... 894

16.2.7 Technical data................................................................................................................. 897
16.3 Interlocking ....................................................................................................................... 897
16.3.1 Functionality ................................................................................................................... 897
16.3.2 Operation principle ......................................................................................................... 898
16.3.3 Logical node for interlocking SCILO ...............................................................................900
16.3.3.1 Identification............................................................................................................... 900
16.3.3.2 Functionality .............................................................................................................. 900
16.3.3.3 Function block............................................................................................................ 900
16.3.3.4 Signals....................................................................................................................... 900
16.3.3.5 Logic diagram.............................................................................................................901
16.3.4 Interlocking for busbar earthing switch BB_ES .............................................................. 901
16.3.4.1 Identification............................................................................................................... 901
16.3.4.2 Functionality .............................................................................................................. 901
16.3.4.3 Function block............................................................................................................ 902
16.3.4.4 Logic diagram.............................................................................................................902
16.3.4.5 Signals....................................................................................................................... 902
16.3.5 Interlocking for bus-section breaker A1A2_BS................................................................903
16.3.5.1 Identification............................................................................................................... 903
16.3.5.2 Functionality .............................................................................................................. 903
16.3.5.3 Function block............................................................................................................ 904
16.3.5.4 Logic diagram.............................................................................................................904
16.3.5.5 Signals....................................................................................................................... 905
16.3.6 Interlocking for bus-section disconnector A1A2_DC ...................................................... 906
16.3.6.1 Identification............................................................................................................... 906
16.3.6.2 Functionality .............................................................................................................. 907
16.3.6.3 Function block............................................................................................................ 907
16.3.6.4 Logic diagram.............................................................................................................908
16.3.6.5 Signals....................................................................................................................... 908
16.3.7 Interlocking for bus-coupler bay ABC_BC ......................................................................909
16.3.7.1 Identification............................................................................................................... 909
16.3.7.2 Functionality .............................................................................................................. 909
16.3.7.3 Function block............................................................................................................ 910
16.3.7.4 Logic diagram.............................................................................................................911
16.3.7.5 Signals....................................................................................................................... 913
16.3.8 Interlocking for 1 1/2 CB BH ...........................................................................................915
16.3.8.1 Identification............................................................................................................... 915
16.3.8.2 Functionality .............................................................................................................. 915
16.3.8.3 Function blocks.......................................................................................................... 917
16.3.8.4 Logic diagrams...........................................................................................................919
16.3.8.5 Signals....................................................................................................................... 922
16.3.9 Interlocking for double CB bay DB ................................................................................. 926
16.3.9.1 Identification............................................................................................................... 927
16.3.9.2 Functionality .............................................................................................................. 927
16.3.9.3 Logic diagrams...........................................................................................................928
16.3.9.4 Function block............................................................................................................ 931

Transformer protection RET670 21

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

16.3.9.5 Signals....................................................................................................................... 932

16.3.10 Interlocking for line bay ABC_LINE ................................................................................ 935
16.3.10.1 Identification............................................................................................................... 935
16.3.10.2 Functionality .............................................................................................................. 935
16.3.10.3 Function block............................................................................................................ 936
16.3.10.4 Logic diagram.............................................................................................................937
16.3.10.5 Signals....................................................................................................................... 942
16.3.11 Interlocking for transformer bay AB_TRAFO ..................................................................944
16.3.11.1 Identification............................................................................................................... 944
16.3.11.2 Functionality .............................................................................................................. 944
16.3.11.3 Function block............................................................................................................ 945
16.3.11.4 Logic diagram.............................................................................................................946
16.3.11.5 Signals....................................................................................................................... 947
16.3.12 Position evaluation POS_EVAL.......................................................................................949
16.3.12.1 Identification............................................................................................................... 949
16.3.12.2 Functionality .............................................................................................................. 949
16.3.12.3 Function block............................................................................................................ 949
16.3.12.4 Logic diagram.............................................................................................................949
16.3.12.5 Signals....................................................................................................................... 950
16.4 Apparatus control.............................................................................................................. 950
16.4.1 Function revision history..................................................................................................950
16.4.2 Functionality ................................................................................................................... 950
16.4.3 Operation principle.......................................................................................................... 951
16.4.4 Error handling..................................................................................................................951
16.4.5 Bay control QCBAY......................................................................................................... 954
16.4.5.1 Functionality .............................................................................................................. 954
16.4.5.2 Function block............................................................................................................ 955
16.4.5.3 Signals....................................................................................................................... 955
16.4.5.4 Settings...................................................................................................................... 955
16.4.5.5 Operation principle..................................................................................................... 955
16.4.6 Local/Remote switch LOCREM.......................................................................................957
16.4.6.1 Function block............................................................................................................ 957
16.4.6.2 Signals....................................................................................................................... 958
16.4.6.3 Settings...................................................................................................................... 959
16.4.6.4 Operation principle..................................................................................................... 959
16.4.7 Switch controller SCSWI................................................................................................. 960
16.4.7.1 Functionality .............................................................................................................. 960
16.4.7.2 Function block............................................................................................................ 961
16.4.7.3 Signals....................................................................................................................... 961
16.4.7.4 Settings...................................................................................................................... 963
16.4.7.5 Operation principle..................................................................................................... 963
16.4.8 Circuit breaker SXCBR....................................................................................................968
16.4.8.1 Functionality .............................................................................................................. 968
16.4.8.2 Function block............................................................................................................ 968
16.4.8.3 Signals....................................................................................................................... 969
16.4.8.4 Settings...................................................................................................................... 970

22 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

16.4.8.5 Operation principle..................................................................................................... 970

16.4.9 Circuit switch SXSWI.......................................................................................................973
16.4.9.1 Functionality .............................................................................................................. 974
16.4.9.2 Function block............................................................................................................ 974
16.4.9.3 Signals....................................................................................................................... 974
16.4.9.4 Settings...................................................................................................................... 975
16.4.9.5 Operation principle..................................................................................................... 975
16.4.10 Proxy for signals from switching device via GOOSE XLNPROXY ................................. 979
16.4.10.1 Functionality .............................................................................................................. 979
16.4.10.2 Function block............................................................................................................ 979
16.4.10.3 Signals....................................................................................................................... 979
16.4.10.4 Settings...................................................................................................................... 980
16.4.10.5 Operation principle..................................................................................................... 981
16.4.10.6 Position supervision................................................................................................... 981
16.4.10.7 Command response evaluation................................................................................. 981
16.4.11 Bay reserve QCRSV....................................................................................................... 982
16.4.11.1 Functionality .............................................................................................................. 982
16.4.11.2 Function block............................................................................................................ 983
16.4.11.3 Signals....................................................................................................................... 983
16.4.11.4 Settings...................................................................................................................... 984
16.4.11.5 Operation principle..................................................................................................... 984
16.4.12 Reservation input RESIN................................................................................................ 986
16.4.12.1 Functionality .............................................................................................................. 986
16.4.12.2 Function block............................................................................................................ 986
16.4.12.3 Signals....................................................................................................................... 986
16.4.12.4 Settings...................................................................................................................... 987
16.4.12.5 Operation principle..................................................................................................... 987
16.5 Voltage control...................................................................................................................989
16.5.1 Identification.................................................................................................................... 989
16.5.2 Functionality ................................................................................................................... 990
16.5.3 Automatic voltage control for tap changer, TR1ATCC and TR8ATCC ........................... 990
16.5.3.1 Operation principle..................................................................................................... 990
16.5.4 Tap changer control and supervision, 6 binary inputs TCMYLTC and TCLYLTC ........... 999
16.5.4.1 Operation principle..................................................................................................... 999
16.5.5 Connection between TR1ATCC or TR8ATCC and TCMYLTCor TCLYLTC.................. 1002
16.5.6 Function block............................................................................................................... 1005
16.5.7 Signals...........................................................................................................................1007
16.5.8 Settings......................................................................................................................... 1013
16.5.9 Monitored data.............................................................................................................. 1020
16.5.10 Operation principle........................................................................................................ 1021
16.5.11 Technical data............................................................................................................... 1022
16.6 Logic rotating switch for function selection and LHMI presentation SLGAPC.................1023
16.6.1 Identification.................................................................................................................. 1023
16.6.2 Functionality ................................................................................................................. 1023
16.6.3 Function block............................................................................................................... 1024
16.6.4 Signals...........................................................................................................................1024

Transformer protection RET670 23

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

16.6.5 Settings......................................................................................................................... 1025

16.6.6 Monitored data.............................................................................................................. 1026
16.6.7 Operation principle........................................................................................................ 1026
16.6.7.1 Graphical display......................................................................................................1026
16.7 Selector mini switch VSGAPC.........................................................................................1027
16.7.1 Identification.................................................................................................................. 1027
16.7.2 Functionality ................................................................................................................. 1027
16.7.3 Function block............................................................................................................... 1028
16.7.4 Signals...........................................................................................................................1028
16.7.5 Settings......................................................................................................................... 1028
16.7.6 Operation principle........................................................................................................ 1029
16.8 Generic communication function for Double Point indication DPGAPC..........................1029
16.8.1 Identification.................................................................................................................. 1029
16.8.2 Functionality ................................................................................................................. 1029
16.8.3 Function block............................................................................................................... 1030
16.8.4 Signals...........................................................................................................................1030
16.8.5 Settings......................................................................................................................... 1030
16.8.6 Operation principle........................................................................................................ 1030
16.9 Single point generic control 8 signals SPC8GAPC......................................................... 1031
16.9.1 Identification.................................................................................................................. 1031
16.9.2 Functionality ................................................................................................................. 1031
16.9.3 Function block............................................................................................................... 1031
16.9.4 Signals...........................................................................................................................1031
16.9.5 Settings......................................................................................................................... 1032
16.9.6 Operation principle........................................................................................................ 1032
16.10 AutomationBits, command function for DNP3.0 AUTOBITS........................................... 1033
16.10.1 Identification.................................................................................................................. 1033
16.10.2 Functionality ................................................................................................................. 1033
16.10.3 Function block............................................................................................................... 1033
16.10.4 Signals...........................................................................................................................1034
16.10.5 Settings......................................................................................................................... 1035
16.10.6 Operation principle ....................................................................................................... 1035
16.11 Single command, 16 signals SINGLECMD..................................................................... 1035
16.11.1 Identification.................................................................................................................. 1035
16.11.2 Functionality ................................................................................................................. 1035
16.11.3 Function block............................................................................................................... 1036
16.11.4 Signals...........................................................................................................................1036
16.11.5 Settings......................................................................................................................... 1037
16.11.6 Operation principle........................................................................................................ 1037

Section 17 Scheme communication......................................................................... 1039

17.1 Scheme communication logic for distance or overcurrent protection ZCPSCH ............. 1039
17.1.1 Function revision history................................................................................................1039
17.1.2 Identification.................................................................................................................. 1039
17.1.3 Functionality ................................................................................................................. 1039
17.1.4 Function block............................................................................................................... 1040

24 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

17.1.5 Signals...........................................................................................................................1040
17.1.6 Settings......................................................................................................................... 1041
17.1.7 Operation principle........................................................................................................ 1041
17.1.7.1 Blocking scheme...................................................................................................... 1041
17.1.7.2 Delta blocking scheme............................................................................................. 1042
17.1.7.3 Permissive underreaching scheme.......................................................................... 1043
17.1.7.4 Permissive overreaching scheme............................................................................ 1043
17.1.7.5 Unblocking scheme..................................................................................................1043
17.1.7.6 Intertrip scheme....................................................................................................... 1044
17.1.7.7 Simplified logic diagram........................................................................................... 1044
17.1.8 Technical data............................................................................................................... 1045
17.2 Phase segregated scheme communication logic for distance protection ZPCPSCH .... 1046
17.2.1 Function revision history................................................................................................1046
17.2.2 Identification.................................................................................................................. 1046
17.2.3 Functionality ................................................................................................................. 1047
17.2.4 Function block............................................................................................................... 1047
17.2.5 Signals...........................................................................................................................1048
17.2.6 Settings......................................................................................................................... 1049
17.2.7 Operation principle........................................................................................................ 1049
17.2.7.1 Blocking scheme...................................................................................................... 1049
17.2.7.2 Permissive underreach scheme...............................................................................1050
17.2.7.3 Permissive overreach scheme................................................................................. 1050
17.2.7.4 Unblocking scheme..................................................................................................1050
17.2.7.5 Intertrip scheme....................................................................................................... 1050
17.2.7.6 Simplified logic diagram........................................................................................... 1051
17.2.8 Technical data............................................................................................................... 1052
17.3 Current reversal and Weak-end infeed logic for distance protection 3-phase
ZCRWPSCH ...................................................................................................................1052
17.3.1 Function revision history................................................................................................1052
17.3.2 Identification.................................................................................................................. 1052
17.3.3 Functionality ................................................................................................................. 1052
17.3.4 Function block............................................................................................................... 1053
17.3.5 Signals...........................................................................................................................1053
17.3.6 Settings......................................................................................................................... 1054
17.3.7 Operation principle........................................................................................................ 1054
17.3.7.1 Current reversal logic............................................................................................... 1054
17.3.7.2 Weak-end infeed logic..............................................................................................1055
17.3.8 Technical data............................................................................................................... 1056
17.4 Current reversal and weak-end infeed logic for phase segregated communication
ZPCWPSCH ...................................................................................................................1057
17.4.1 Function revision history................................................................................................1057
17.4.2 Identification.................................................................................................................. 1057
17.4.3 Functionality ................................................................................................................. 1057
17.4.4 Function block............................................................................................................... 1058
17.4.5 Signals...........................................................................................................................1058
17.4.6 Settings......................................................................................................................... 1059

Transformer protection RET670 25

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

17.4.7 Operation principle........................................................................................................ 1060

17.4.7.1 Current reversal logic .............................................................................................. 1060
17.4.7.2 Weak-end infeed logic..............................................................................................1060
17.4.8 Technical data............................................................................................................... 1062
17.5 Scheme communication logic for residual overcurrent protection ECPSCH ..................1063
17.5.1 Function revision history................................................................................................1063
17.5.2 Identification.................................................................................................................. 1063
17.5.3 Functionality ................................................................................................................. 1063
17.5.4 Function block............................................................................................................... 1064
17.5.5 Signals...........................................................................................................................1064
17.5.6 Settings......................................................................................................................... 1065
17.5.7 Operation principle........................................................................................................ 1065
17.5.7.1 Blocking scheme...................................................................................................... 1065
17.5.7.2 Permissive under/overreaching scheme.................................................................. 1066
17.5.7.3 Unblocking scheme..................................................................................................1067
17.5.8 Technical data............................................................................................................... 1068
17.6 Current reversal and weak-end infeed logic for residual overcurrent protection
ECRWPSCH................................................................................................................... 1068
17.6.1 Identification.................................................................................................................. 1068
17.6.2 Functionality.................................................................................................................. 1068
17.6.3 Function block............................................................................................................... 1069
17.6.4 Signals...........................................................................................................................1069
17.6.5 Settings......................................................................................................................... 1070
17.6.6 Operation principle........................................................................................................ 1070
17.6.6.1 Directional comparison logic function.......................................................................1070
17.6.6.2 Fault current reversal logic.......................................................................................1070
17.6.6.3 Weak-end infeed logic..............................................................................................1071
17.6.7 Technical data............................................................................................................... 1072

Section 18 Logic......................................................................................................... 1073

18.1 Tripping logic SMPPTRC ................................................................................................1073
18.1.1 Function revision history................................................................................................1073
18.1.2 Identification.................................................................................................................. 1073
18.1.3 Functionality ................................................................................................................. 1073
18.1.4 Function block............................................................................................................... 1074
18.1.5 Signals...........................................................................................................................1074
18.1.6 Settings......................................................................................................................... 1075
18.1.7 Operation principle........................................................................................................ 1075
18.1.7.1 Logic diagram...........................................................................................................1079
18.1.8 Technical data............................................................................................................... 1082
18.2 General start matrix block SMAGAPC............................................................................ 1083
18.2.1 Identification.................................................................................................................. 1083
18.2.2 Functionality ................................................................................................................. 1083
18.2.3 Function block............................................................................................................... 1083
18.2.4 Signals...........................................................................................................................1083
18.2.5 Settings......................................................................................................................... 1084
18.2.6 Operation principle........................................................................................................ 1084

26 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

18.3 Trip matrix logic TMAGAPC............................................................................................ 1088

18.3.1 Identification.................................................................................................................. 1088
18.3.2 Functionality ................................................................................................................. 1088
18.3.3 Function block............................................................................................................... 1089
18.3.4 Signals...........................................................................................................................1089
18.3.5 Settings......................................................................................................................... 1090
18.3.6 Operation principle........................................................................................................ 1091
18.3.7 Technical data............................................................................................................... 1092
18.4 Logic for group alarm ALMCALH.................................................................................... 1092
18.4.1 Identification.................................................................................................................. 1092
18.4.2 Functionality ................................................................................................................. 1092
18.4.3 Function block............................................................................................................... 1093
18.4.4 Signals...........................................................................................................................1093
18.4.5 Settings......................................................................................................................... 1094
18.4.6 Operation principle........................................................................................................ 1094
18.4.7 Technical data............................................................................................................... 1094
18.5 Logic for group warning WRNCALH................................................................................1094
18.5.1 Identification.................................................................................................................. 1094
18.5.2 Functionality ................................................................................................................. 1094
18.5.3 Function block............................................................................................................... 1095
18.5.4 Signals...........................................................................................................................1095
18.5.5 Settings......................................................................................................................... 1096
18.5.6 Operation principle........................................................................................................ 1096
18.5.7 Technical data............................................................................................................... 1096
18.6 Logic for group indication INDCALH............................................................................... 1096
18.6.1 Identification.................................................................................................................. 1096
18.6.2 Functionality ................................................................................................................. 1096
18.6.3 Function block............................................................................................................... 1097
18.6.4 Signals...........................................................................................................................1097
18.6.5 Settings......................................................................................................................... 1098
18.6.6 Operation principle........................................................................................................ 1098
18.6.7 Technical data............................................................................................................... 1098
18.7 Basic configurable logic blocks....................................................................................... 1098
18.7.1 AND function block AND............................................................................................... 1099
18.7.1.1 Function block.......................................................................................................... 1099
18.7.1.2 Signals..................................................................................................................... 1099
18.7.1.3 Technical data.......................................................................................................... 1100
18.7.2 Controllable gate function block GATE..........................................................................1100
18.7.2.1 Function block.......................................................................................................... 1100
18.7.2.2 Signals......................................................................................................................1100
18.7.2.3 Settings.................................................................................................................... 1100
18.7.2.4 Technical data.......................................................................................................... 1101
18.7.3 Inverter function block INV............................................................................................ 1101
18.7.3.1 Function block.......................................................................................................... 1101
18.7.3.2 Signals......................................................................................................................1101
18.7.3.3 Technical data.......................................................................................................... 1101

Transformer protection RET670 27

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

18.7.4 Loop delay function block LLD...................................................................................... 1101

18.7.4.1 Function block.......................................................................................................... 1101
18.7.4.2 Signals......................................................................................................................1102
18.7.4.3 Technical data.......................................................................................................... 1102
18.7.5 OR function block.......................................................................................................... 1102
18.7.5.1 Function block.......................................................................................................... 1102
18.7.5.2 Signals......................................................................................................................1102
18.7.5.3 Technical data.......................................................................................................... 1103
18.7.6 Pulse timer function block PULSETIMER......................................................................1103
18.7.6.1 Function block.......................................................................................................... 1103
18.7.6.2 Signals......................................................................................................................1103
18.7.6.3 Settings.................................................................................................................... 1103
18.7.6.4 Technical data.......................................................................................................... 1104
18.7.7 Reset-set with memory function block RSMEMORY.....................................................1104
18.7.7.1 Function block.......................................................................................................... 1104
18.7.7.2 Signals......................................................................................................................1104
18.7.7.3 Settings.................................................................................................................... 1105
18.7.7.4 Technical data.......................................................................................................... 1105
18.7.8 Set-reset with memory function block SRMEMORY..................................................... 1105
18.7.8.1 Function block.......................................................................................................... 1105
18.7.8.2 Signals......................................................................................................................1105
18.7.8.3 Settings.................................................................................................................... 1106
18.7.8.4 Technical data.......................................................................................................... 1106
18.7.9 Settable timer function block TIMERSET...................................................................... 1106
18.7.9.1 Function block.......................................................................................................... 1106
18.7.9.2 Signals......................................................................................................................1107
18.7.9.3 Settings.................................................................................................................... 1107
18.7.9.4 Technical data.......................................................................................................... 1107
18.7.10 Exclusive OR function block XOR................................................................................. 1107
18.7.10.1 Function block.......................................................................................................... 1107
18.7.10.2 Signals......................................................................................................................1108
18.7.10.3 Technical data.......................................................................................................... 1108
18.8 Configurable logic blocks Q/T .........................................................................................1108
18.8.1 ANDQT function block................................................................................................... 1109
18.8.1.1 Function block.......................................................................................................... 1109
18.8.1.2 Signals......................................................................................................................1109
18.8.1.3 Technical data...........................................................................................................1110
18.8.2 Single point indication related signals combining function block INDCOMBSPQT....... 1110
18.8.2.1 Function block...........................................................................................................1110
18.8.2.2 Signals...................................................................................................................... 1110
18.8.2.3 Technical data........................................................................................................... 1111
18.8.3 Single point input signal attributes converting function block INDEXTSPQT.................1111
18.8.3.1 Function block...........................................................................................................1111
18.8.3.2 Signals...................................................................................................................... 1111
18.8.3.3 Technical data...........................................................................................................1112
18.8.4 Invalid logic function block INVALIDQT......................................................................... 1112

28 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

18.8.4.1 Function block...........................................................................................................1112

18.8.4.2 Signals...................................................................................................................... 1112
18.8.4.3 Technical data...........................................................................................................1113
18.8.5 Inverter function block INVERTERQT............................................................................1113
18.8.5.1 Function block...........................................................................................................1114
18.8.5.2 Signals...................................................................................................................... 1114
18.8.5.3 Technical data...........................................................................................................1114
18.8.6 ORQT function block..................................................................................................... 1114
18.8.6.1 Function block...........................................................................................................1114
18.8.6.2 Signals...................................................................................................................... 1114
18.8.6.3 Technical data...........................................................................................................1115
18.8.7 Pulse timer function block PULSETIMERQT.................................................................1115
18.8.7.1 Function block...........................................................................................................1115
18.8.7.2 Signals...................................................................................................................... 1115
18.8.7.3 Settings.....................................................................................................................1116
18.8.7.4 Technical data...........................................................................................................1116
18.8.8 Reset/Set function block RSMEMORYQT..................................................................... 1116
18.8.8.1 Function block...........................................................................................................1116
18.8.8.2 Signals...................................................................................................................... 1117
18.8.8.3 Settings.....................................................................................................................1117
18.8.8.4 Technical data...........................................................................................................1117
18.8.9 Set/Reset function block SRMEMORYQT..................................................................... 1117
18.8.9.1 Function block...........................................................................................................1118
18.8.9.2 Signals...................................................................................................................... 1118
18.8.9.3 Settings.....................................................................................................................1118
18.8.9.4 Technical data...........................................................................................................1118
18.8.10 Settable timer function block TIMERSETQT................................................................. 1118
18.8.10.1 Function block...........................................................................................................1119
18.8.10.2 Signals...................................................................................................................... 1119
18.8.10.3 Settings.....................................................................................................................1119
18.8.10.4 Technical data...........................................................................................................1119
18.8.11 Exclusive OR function block XORQT............................................................................ 1119
18.8.11.1 Function block.......................................................................................................... 1120
18.8.11.2 Signals......................................................................................................................1120
18.8.11.3 Technical data.......................................................................................................... 1120
18.9 Extension logic package..................................................................................................1120
18.10 Fixed signals FXDSIGN...................................................................................................1121
18.10.1 Functionality ................................................................................................................. 1121
18.10.2 Function block............................................................................................................... 1121
18.10.3 Signals...........................................................................................................................1122
18.10.4 Settings..........................................................................................................................1122
18.10.5 Operation principle........................................................................................................ 1122
18.11 Boolean 16 to Integer conversion B16I........................................................................... 1122
18.11.1 Identification.................................................................................................................. 1122
18.11.2 Functionality ................................................................................................................. 1122
18.11.3 Function block............................................................................................................... 1123

Transformer protection RET670 29

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

18.11.4 Signals...........................................................................................................................1123
18.11.5 Monitored data...............................................................................................................1124
18.11.6 Settings..........................................................................................................................1124
18.11.7 Operation principle........................................................................................................ 1124
18.11.8 Technical data................................................................................................................1125
18.12 Boolean to integer conversion with logical node representation, 16 bit BTIGAPC..........1125
18.12.1 Identification.................................................................................................................. 1125
18.12.2 Functionality ................................................................................................................. 1125
18.12.3 Function block............................................................................................................... 1125
18.12.4 Signals...........................................................................................................................1126
18.12.5 Settings..........................................................................................................................1126
18.12.6 Monitored data...............................................................................................................1126
18.12.7 Operation principle........................................................................................................ 1126
18.12.8 Technical data................................................................................................................1127
18.13 Integer to boolean 16 conversion IB16............................................................................1127
18.13.1 Identification.................................................................................................................. 1127
18.13.2 Functionality ................................................................................................................. 1127
18.13.3 Function block............................................................................................................... 1128
18.13.4 Signals...........................................................................................................................1128
18.13.5 Setting parameters ....................................................................................................... 1129
18.13.6 Operation principle........................................................................................................ 1129
18.13.7 Technical data................................................................................................................1130
18.14 Integer to Boolean 16 conversion with logic node representation ITBGAPC.................. 1130
18.14.1 Identification.................................................................................................................. 1130
18.14.2 Functionality ................................................................................................................. 1130
18.14.3 Function block............................................................................................................... 1130
18.14.4 Signals...........................................................................................................................1131
18.14.5 Settings..........................................................................................................................1131
18.14.6 Operation principle........................................................................................................ 1131
18.14.7 Technical data................................................................................................................1132
18.15 Elapsed time integrator with limit transgression and overflow supervision TEIGAPC.....1133
18.15.1 Identification.................................................................................................................. 1133
18.15.2 Functionality.................................................................................................................. 1133
18.15.3 Function block............................................................................................................... 1133
18.15.4 Signals...........................................................................................................................1134
18.15.5 Settings..........................................................................................................................1134
18.15.6 Operation principle........................................................................................................ 1134
18.15.6.1 Operation accuracy.................................................................................................. 1135
18.15.6.2 Memory storage....................................................................................................... 1136
18.15.7 Technical data................................................................................................................1136
18.16 Comparator for integer inputs INTCOMP........................................................................ 1136
18.16.1 Identification.................................................................................................................. 1136
18.16.2 Functionality ................................................................................................................. 1136
18.16.3 Function block............................................................................................................... 1136
18.16.4 Signals...........................................................................................................................1137
18.16.5 Settings..........................................................................................................................1137

30 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

18.16.6 Monitored data...............................................................................................................1137

18.16.7 Operation principle........................................................................................................ 1137
18.17 Comparator for real inputs REALCOMP..........................................................................1138
18.17.1 Function revision history................................................................................................1138
18.17.2 Identification.................................................................................................................. 1138
18.17.3 Functionality ................................................................................................................. 1138
18.17.4 Function block............................................................................................................... 1138
18.17.5 Signals...........................................................................................................................1139
18.17.6 Settings..........................................................................................................................1139
18.17.7 Operation principle........................................................................................................ 1139
18.17.8 Technical data................................................................................................................1140
18.18 Hold maximum and minimum of input HOLDMINMAX....................................................1140
18.18.1 Identification.................................................................................................................. 1140
18.18.2 Functionality ................................................................................................................. 1140
18.18.3 Function block............................................................................................................... 1141
18.18.4 Signals...........................................................................................................................1141
18.19 Converter for Integer to Real INT_REAL.........................................................................1141
18.19.1 Identification.................................................................................................................. 1141
18.19.2 Functionality ................................................................................................................. 1141
18.19.3 Function block............................................................................................................... 1141
18.19.4 Signals...........................................................................................................................1142
18.20 Definable constant for logic function CONST_INT.......................................................... 1142
18.20.1 Identification.................................................................................................................. 1142
18.20.2 Functionality ................................................................................................................. 1142
18.20.3 Function block............................................................................................................... 1142
18.20.4 Signals...........................................................................................................................1142
18.20.5 Settings..........................................................................................................................1142
18.21 Analog input selector for integer values INTSEL.............................................................1143
18.21.1 Identification.................................................................................................................. 1143
18.21.2 Functionality ................................................................................................................. 1143
18.21.3 Function block............................................................................................................... 1143
18.21.4 Signals...........................................................................................................................1143
18.22 Definable limiter LIMITER................................................................................................1144
18.22.1 Identification.................................................................................................................. 1144
18.22.2 Functionality ................................................................................................................. 1144
18.22.3 Function block............................................................................................................... 1144
18.22.4 Signals...........................................................................................................................1145
18.22.5 Settings..........................................................................................................................1145
18.23 Absolute value ABS.........................................................................................................1145
18.23.1 Identification.................................................................................................................. 1145
18.23.2 Functionality ................................................................................................................. 1145
18.23.3 Function block............................................................................................................... 1145
18.23.4 Signals...........................................................................................................................1146
18.24 Polar to rectangular converter POL_REC....................................................................... 1146
18.24.1 Identification.................................................................................................................. 1146
18.24.2 Functionality ................................................................................................................. 1146

Transformer protection RET670 31

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

18.24.3 Function block............................................................................................................... 1146

18.24.4 Signals...........................................................................................................................1146
18.25 Radians to degree angle converter RAD_DEG............................................................... 1147
18.25.1 Identification.................................................................................................................. 1147
18.25.2 Functionality ................................................................................................................. 1147
18.25.3 Function block............................................................................................................... 1147
18.25.4 Signals...........................................................................................................................1147
18.25.5 Monitored data...............................................................................................................1147
18.26 Definable constant for logic function CONST_REAL.......................................................1148
18.26.1 Identification.................................................................................................................. 1148
18.26.2 Functionality ................................................................................................................. 1148
18.26.3 Function block............................................................................................................... 1148
18.26.4 Signals...........................................................................................................................1148
18.26.5 Signals...........................................................................................................................1148
18.27 Analog input selector for real values REALSEL.............................................................. 1148
18.27.1 Identification.................................................................................................................. 1148
18.27.2 Functionality ................................................................................................................. 1149
18.27.3 Function block............................................................................................................... 1149
18.27.4 Signals...........................................................................................................................1149
18.28 Store value for integer inputs STOREINT....................................................................... 1150
18.28.1 Identification.................................................................................................................. 1150
18.28.2 Functionality ................................................................................................................. 1150
18.28.3 Function block............................................................................................................... 1150
18.28.4 Signals...........................................................................................................................1150
18.29 Store value for real inputs STOREREAL.........................................................................1151
18.29.1 Identification.................................................................................................................. 1151
18.29.2 Functionality ................................................................................................................. 1151
18.29.3 Function block............................................................................................................... 1151
18.29.4 Signals...........................................................................................................................1151
18.30 Degree to radians angle converter DEG_RAD................................................................1151
18.30.1 Identification.................................................................................................................. 1151
18.30.2 Functionality ................................................................................................................. 1152
18.30.3 Function block............................................................................................................... 1152
18.30.4 Signals...........................................................................................................................1152
18.30.5 Monitored data...............................................................................................................1152

Section 19 Monitoring................................................................................................ 1153

19.1 Measurements.................................................................................................................1153
19.1.1 Function revision history................................................................................................1153
19.1.2 Function revision history................................................................................................1153
19.1.3 Identification.................................................................................................................. 1153
19.1.4 Functionality ................................................................................................................. 1154
19.1.5 Function block............................................................................................................... 1155
19.1.6 Signals...........................................................................................................................1156
19.1.7 Settings..........................................................................................................................1159
19.1.8 Monitored data...............................................................................................................1170

32 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

19.1.9 Operation principle........................................................................................................ 1172

19.1.9.1 Measurement supervision........................................................................................ 1172
19.1.9.2 Measurements CVMMXN.........................................................................................1176
19.1.9.3 Phase current measurement CMMXU..................................................................... 1180
19.1.9.4 Phase-phase and phase-neutral voltage measurements VMMXU, VNMMXU........ 1181
19.1.9.5 Voltage and current sequence measurements VMSQI, CMSQI.............................. 1181
19.1.10 Technical data................................................................................................................1181
19.2 Gas medium supervision SSIMG.................................................................................... 1183
19.2.1 Function revision history................................................................................................1183
19.2.2 Identification.................................................................................................................. 1183
19.2.3 Functionality ................................................................................................................. 1183
19.2.4 Function block............................................................................................................... 1183
19.2.5 Signals...........................................................................................................................1184
19.2.6 Settings..........................................................................................................................1184
19.2.7 Monitored data...............................................................................................................1185
19.2.8 Operation principle........................................................................................................ 1185
19.2.9 Technical data................................................................................................................1186
19.3 Liquid medium supervision SSIML ................................................................................. 1187
19.3.1 Function revision history................................................................................................1187
19.3.2 Identification.................................................................................................................. 1187
19.3.3 Functionality ................................................................................................................. 1187
19.3.4 Function block............................................................................................................... 1187
19.3.5 Signals...........................................................................................................................1188
19.3.6 Settings..........................................................................................................................1188
19.3.7 Monitored data...............................................................................................................1189
19.3.8 Operation principle........................................................................................................ 1189
19.3.9 Technical data................................................................................................................1190
19.4 Breaker monitoring SSCBR.............................................................................................1190
19.4.1 Identification.................................................................................................................. 1190
19.4.2 Functionality ................................................................................................................. 1191
19.4.3 Function block............................................................................................................... 1191
19.4.4 Signals...........................................................................................................................1191
19.4.5 Settings..........................................................................................................................1192
19.4.6 Monitored data...............................................................................................................1193
19.4.7 Operation principle........................................................................................................ 1194
19.4.7.1 Circuit breaker contact travel time............................................................................1196
19.4.7.2 Circuit breaker status............................................................................................... 1197
19.4.7.3 Remaining life of circuit breaker .............................................................................. 1197
19.4.7.4 Accumulated energy ................................................................................................1198
19.4.7.5 Circuit breaker operation cycles .............................................................................. 1199
19.4.7.6 Circuit breaker operation monitoring........................................................................ 1200
19.4.7.7 Circuit breaker spring charge monitoring ................................................................ 1201
19.4.7.8 Circuit breaker gas pressure indication ...................................................................1201
19.4.8 Technical data............................................................................................................... 1202
19.5 Event function EVENT.....................................................................................................1202
19.5.1 Identification.................................................................................................................. 1202

Transformer protection RET670 33

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

19.5.2 Functionality ................................................................................................................. 1202

19.5.3 Function block............................................................................................................... 1203
19.5.4 Signals...........................................................................................................................1203
19.5.5 Settings......................................................................................................................... 1204
19.5.6 Operation principle........................................................................................................ 1206
19.6 Disturbance report DRPRDRE........................................................................................ 1207
19.6.1 Function revision history................................................................................................1207
19.6.2 Identification.................................................................................................................. 1207
19.6.3 Functionality ................................................................................................................. 1207
19.6.4 Function block............................................................................................................... 1208
19.6.5 Signals...........................................................................................................................1209
19.6.6 Settings..........................................................................................................................1211
19.6.7 Monitored data.............................................................................................................. 1220
19.6.8 Operation principle........................................................................................................ 1223
19.6.9 Technical data............................................................................................................... 1229
19.7 Logical signal status report BINSTATREP...................................................................... 1229
19.7.1 Identification.................................................................................................................. 1229
19.7.2 Functionality.................................................................................................................. 1229
19.7.3 Function block............................................................................................................... 1230
19.7.4 Signals...........................................................................................................................1230
19.7.5 Settings......................................................................................................................... 1231
19.7.6 Operation principle........................................................................................................ 1231
19.8 Measured value expander block RANGE_XP.................................................................1231
19.8.1 Identification.................................................................................................................. 1232
19.8.2 Functionality ................................................................................................................. 1232
19.8.3 Function block............................................................................................................... 1232
19.8.4 Signals...........................................................................................................................1232
19.8.5 Operation principle ....................................................................................................... 1232
19.9 Limit counter L4UFCNT...................................................................................................1233
19.9.1 Identification.................................................................................................................. 1233
19.9.2 Functionality ................................................................................................................. 1233
19.9.3 Operation principle........................................................................................................ 1233
19.9.3.1 Design...................................................................................................................... 1233
19.9.3.2 Reporting..................................................................................................................1234
19.9.4 Function block............................................................................................................... 1235
19.9.5 Signals...........................................................................................................................1235
19.9.6 Settings......................................................................................................................... 1235
19.9.7 Monitored data.............................................................................................................. 1236
19.9.8 Technical data............................................................................................................... 1236
19.10 Running hour-meter TEILGAPC .....................................................................................1236
19.10.1 Identification.................................................................................................................. 1236
19.10.2 Functionality ................................................................................................................. 1236
19.10.3 Function block............................................................................................................... 1237
19.10.4 Signals...........................................................................................................................1237
19.10.5 Settings......................................................................................................................... 1238
19.10.6 Operation principle........................................................................................................ 1238

34 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

19.10.6.1 Operation accuracy.................................................................................................. 1239

19.10.6.2 Memory storage....................................................................................................... 1239
19.10.7 Technical data............................................................................................................... 1240
19.11 Estimation of transformer insulation life LOLSPTR ........................................................ 1240
19.11.1 Identification.................................................................................................................. 1240
19.11.2 Functionality ................................................................................................................. 1240
19.11.3 Function block............................................................................................................... 1241
19.11.4 Signals...........................................................................................................................1241
19.11.5 Settings......................................................................................................................... 1242
19.11.6 Monitored data.............................................................................................................. 1245
19.11.7 Operation principle........................................................................................................ 1245
19.11.7.1 Hot spot temperature calculation............................................................................. 1245
19.11.7.2 Top oil temperature calculation................................................................................ 1247
19.11.7.3 Transformer parameters selection........................................................................... 1248
19.11.7.4 Calculation of constants and losses.........................................................................1249
19.11.7.5 Load factor calculation............................................................................................. 1250
19.11.7.6 Function handling with less CT’s..............................................................................1251
19.11.7.7 Temperature unit selection....................................................................................... 1251
19.11.7.8 Insulation loss of life calculation...............................................................................1251
19.11.7.9 Warning and alarm................................................................................................... 1252
19.11.7.10 Blocking the function................................................................................................ 1253
19.11.8 Technical data............................................................................................................... 1253
19.12 Through fault monitoring PTRSTHR .............................................................................. 1253
19.12.1 Identification.................................................................................................................. 1253
19.12.2 Functionality.................................................................................................................. 1254
19.12.3 Function block............................................................................................................... 1254
19.12.4 Signals...........................................................................................................................1254
19.12.5 Settings......................................................................................................................... 1255
19.12.6 Monitored data.............................................................................................................. 1258
19.12.7 Operation principle........................................................................................................ 1259
19.12.7.1 Transformer winding currents calculation.................................................................1259
19.12.7.2 Through fault detection............................................................................................ 1261
19.12.7.3 Through fault duration and count of occurrence calculation.................................... 1261
19.12.7.4 Through fault withstand capability calculation..........................................................1262
19.12.7.5 Preparation of data for reporting.............................................................................. 1264
19.12.8 Technical data............................................................................................................... 1267
19.13 Current harmonic monitoring CHMMHAI.........................................................................1267
19.13.1 Function revision history................................................................................................1267
19.13.2 Identification.................................................................................................................. 1267
19.13.3 Functionality.................................................................................................................. 1268
19.13.4 Function block............................................................................................................... 1268
19.13.5 Signals...........................................................................................................................1269
19.13.6 Settings......................................................................................................................... 1270
19.13.7 Monitored data.............................................................................................................. 1271
19.13.8 Graphical display configurable data.............................................................................. 1272
19.13.9 Operation principle........................................................................................................ 1273

Transformer protection RET670 35

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

19.13.9.1 Total harmonic distortion (THD)............................................................................... 1274

19.13.9.2 Individual harmonic distortion (IHD)......................................................................... 1275
19.13.9.3 Total demand distortion (TDD)................................................................................. 1276
19.13.9.4 Crest factor (CF)...................................................................................................... 1276
19.13.9.5 Blocking and alarm logic.......................................................................................... 1277
19.13.10 Technical data............................................................................................................... 1278
19.14 Voltage harmonic monitoring VHMMHAI.........................................................................1278
19.14.1 Function revision history................................................................................................1278
19.14.2 Identification.................................................................................................................. 1278
19.14.3 Functionality.................................................................................................................. 1279
19.14.4 Function block............................................................................................................... 1279
19.14.5 Signals...........................................................................................................................1280
19.14.6 Settings......................................................................................................................... 1281
19.14.7 Monitored data.............................................................................................................. 1282
19.14.8 Graphical display configurable data.............................................................................. 1284
19.14.9 Operation principle........................................................................................................ 1285
19.14.9.1 Total harmonic distortion (THD)............................................................................... 1286
19.14.9.2 Individual harmonic distortion (IHD)......................................................................... 1287
19.14.9.3 Crest factor (CF)...................................................................................................... 1288
19.14.9.4 Blocking and alarm logic.......................................................................................... 1288
19.14.10 Technical data............................................................................................................... 1289
19.15 Fault current and voltage monitoring function FLTMMXU .............................................. 1290
19.15.1 Function revision history................................................................................................1290
19.15.2 Identification.................................................................................................................. 1290
19.15.3 Functionality.................................................................................................................. 1290
19.15.4 Function block............................................................................................................... 1291
19.15.5 Signals...........................................................................................................................1291
19.15.6 Settings......................................................................................................................... 1292
19.15.7 Monitored data.............................................................................................................. 1293
19.15.8 Operation principle........................................................................................................ 1294
19.15.9 Technical data............................................................................................................... 1297
19.16 Fault locator LMBRFLO...................................................................................................1298
19.16.1 Function revision history................................................................................................1298
19.16.2 Identification.................................................................................................................. 1298
19.16.3 Functionality ................................................................................................................. 1298
19.16.4 Function block............................................................................................................... 1299
19.16.5 Signals...........................................................................................................................1299
19.16.6 Settings......................................................................................................................... 1300
19.16.7 Monitored data.............................................................................................................. 1301
19.16.8 Operation principle........................................................................................................ 1301
19.16.8.1 Measuring Principle..................................................................................................1302
19.16.8.2 Accurate algorithm for measurement of distance to fault.........................................1302
19.16.8.3 The non-compensated impedance model................................................................1305
19.16.8.4 Exception handling...................................................................................................1305
19.16.8.5 IEC 60870-5-103......................................................................................................1305
19.16.9 Technical data............................................................................................................... 1306

36 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

Section 20 Metering....................................................................................................1307
20.1 Pulse-counter logic PCFCNT.......................................................................................... 1307
20.1.1 Identification.................................................................................................................. 1307
20.1.2 Functionality ................................................................................................................. 1307
20.1.3 Function block............................................................................................................... 1307
20.1.4 Signals...........................................................................................................................1307
20.1.5 Settings......................................................................................................................... 1308
20.1.6 Monitored data.............................................................................................................. 1308
20.1.7 Operation principle........................................................................................................ 1308
20.1.8 Technical data............................................................................................................... 1310
20.2 Function for energy calculation and demand handling ETPMMTR................................. 1310
20.2.1 Identification.................................................................................................................. 1310
20.2.2 Functionality ................................................................................................................. 1310
20.2.3 Function block............................................................................................................... 1311
20.2.4 Signals...........................................................................................................................1311
20.2.5 Settings......................................................................................................................... 1312
20.2.6 Monitored data.............................................................................................................. 1313
20.2.7 Operation principle........................................................................................................ 1313
20.2.8 Technical data............................................................................................................... 1316

Section 21 Ethernet.................................................................................................... 1317

21.1 Access point.................................................................................................................... 1317
21.1.1 Introduction ...................................................................................................................1317
21.1.2 Settings......................................................................................................................... 1317
21.2 Access point diagnostics................................................................................................. 1319
21.2.1 Functionality ................................................................................................................. 1319
21.2.2 Function block............................................................................................................... 1320
21.2.3 Signals...........................................................................................................................1320
21.2.4 Monitored data.............................................................................................................. 1321
21.3 Redundant communication..............................................................................................1321
21.3.1 Identification.................................................................................................................. 1321
21.3.2 Functionality.................................................................................................................. 1321
21.3.3 Operation principle........................................................................................................ 1322
21.4 Merging unit.....................................................................................................................1323
21.4.1 Introduction ...................................................................................................................1323
21.4.2 Settings......................................................................................................................... 1323
21.4.3 Monitored data.............................................................................................................. 1324
21.5 Routes............................................................................................................................. 1329
21.5.1 Introduction ...................................................................................................................1329
21.5.2 Settings......................................................................................................................... 1329
21.5.3 Monitored data.............................................................................................................. 1329

Section 22 Station communication........................................................................... 1331

22.1 Communication protocols................................................................................................1331
22.2 Communication protocol diagnostics...............................................................................1331
22.3 DNP3 protocol................................................................................................................. 1332

Transformer protection RET670 37

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

22.4 IEC 61850-8-1 communication protocol.......................................................................... 1332

22.4.1 Functionality ................................................................................................................. 1332
22.4.2 Communication interfaces and protocols ..................................................................... 1333
22.4.3 Settings......................................................................................................................... 1333
22.4.4 Technical data............................................................................................................... 1333
22.4.5 Generic communication function for Single Point indication SPGAPC, SP16GAPC.... 1334
22.4.5.1 Functionality ............................................................................................................ 1334
22.4.5.2 Function block.......................................................................................................... 1334
22.4.5.3 Signals..................................................................................................................... 1334
22.4.5.4 Settings.................................................................................................................... 1335
22.4.5.5 Monitored data......................................................................................................... 1335
22.4.5.6 Operation principle .................................................................................................. 1336
22.4.6 Generic communication function for Measured Value MVGAPC.................................. 1336
22.4.6.1 Functionality ............................................................................................................ 1336
22.4.6.2 Function block.......................................................................................................... 1336
22.4.6.3 Signals..................................................................................................................... 1337
22.4.6.4 Settings.................................................................................................................... 1337
22.4.6.5 Monitored data......................................................................................................... 1338
22.4.6.6 Operation principle .................................................................................................. 1338
22.4.7 GOOSE function block to receive a double point value GOOSEDPRCV..................... 1338
22.4.7.1 Identification............................................................................................................. 1338
22.4.7.2 Functionality ............................................................................................................ 1338
22.4.7.3 Function block.......................................................................................................... 1338
22.4.7.4 Signals..................................................................................................................... 1339
22.4.7.5 Settings.................................................................................................................... 1339
22.4.7.6 Operation principle .................................................................................................. 1339
22.4.8 GOOSE function block to receive an integer value GOOSEINTRCV........................... 1340
22.4.8.1 Identification............................................................................................................. 1340
22.4.8.2 Functionality ............................................................................................................ 1340
22.4.8.3 Function block.......................................................................................................... 1340
22.4.8.4 Signals..................................................................................................................... 1341
22.4.8.5 Settings.................................................................................................................... 1341
22.4.8.6 Operation principle .................................................................................................. 1341
22.4.9 GOOSE function block to receive a measurand value GOOSEMVRCV.......................1342
22.4.9.1 Identification............................................................................................................. 1342
22.4.9.2 Functionality ............................................................................................................ 1342
22.4.9.3 Function block.......................................................................................................... 1342
22.4.9.4 Signals..................................................................................................................... 1343
22.4.9.5 Settings.................................................................................................................... 1343
22.4.9.6 Operation principle .................................................................................................. 1343
22.4.10 GOOSE function block to receive a single point value GOOSESPRCV....................... 1344
22.4.10.1 Identification............................................................................................................. 1344
22.4.10.2 Functionality ............................................................................................................ 1344
22.4.10.3 Function block.......................................................................................................... 1344
22.4.10.4 Signals..................................................................................................................... 1345
22.4.10.5 Settings.................................................................................................................... 1345

38 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

22.4.10.6 Operation principle .................................................................................................. 1345

22.4.11 GOOSE VCTR configuration for send and receive GOOSEVCTRCONF..................... 1346
22.4.11.1 Identification............................................................................................................. 1346
22.4.11.2 Functionality ............................................................................................................ 1346
22.4.11.3 Settings.................................................................................................................... 1347
22.4.12 GOOSE voltage control receiving block GOOSEVCTRRCV........................................ 1347
22.4.12.1 Identification............................................................................................................. 1347
22.4.12.2 Functionality ............................................................................................................ 1347
22.4.12.3 Function block.......................................................................................................... 1348
22.4.12.4 Signals..................................................................................................................... 1348
22.4.13 Horizontal communication via GOOSE for interlocking GOOSEINTLKRCV.................1348
22.4.13.1 Functionality............................................................................................................. 1348
22.4.13.2 Function block.......................................................................................................... 1349
22.4.13.3 Signals..................................................................................................................... 1349
22.4.13.4 Settings.................................................................................................................... 1351
22.4.13.5 Operation principle................................................................................................... 1351
22.4.14 GOOSE binary receive GOOSEBINRCV...................................................................... 1353
22.4.14.1 Function block.......................................................................................................... 1353
22.4.14.2 Signals..................................................................................................................... 1353
22.4.14.3 Settings.................................................................................................................... 1355
22.4.14.4 Operation principle................................................................................................... 1355
22.4.15 GOOSE function block to receive a switching device GOOSEXLNRCV ......................1356
22.4.15.1 Identification............................................................................................................. 1356
22.4.15.2 Functionality ............................................................................................................ 1356
22.4.15.3 Function block.......................................................................................................... 1356
22.4.15.4 Signals..................................................................................................................... 1356
22.4.15.5 Settings.................................................................................................................... 1358
22.4.15.6 Operation principle................................................................................................... 1358
22.5 IEC/UCA 61850-9-2LE communication protocol............................................................. 1358
22.5.1 Introduction....................................................................................................................1358
22.5.2 Function block............................................................................................................... 1358
22.5.3 Signals...........................................................................................................................1359
22.5.3.1 Output signals.......................................................................................................... 1359
22.5.4 Settings......................................................................................................................... 1360
22.5.5 Monitored data.............................................................................................................. 1360
22.5.6 Operation principle........................................................................................................ 1365
22.5.6.1 Conditional blocking................................................................................................. 1367
22.5.6.2 IEC 61850 quality expander QUALEXP...................................................................1371
22.5.7 Technical data............................................................................................................... 1372
22.6 LON communication protocol.......................................................................................... 1372
22.6.1 Functionality ................................................................................................................. 1372
22.6.2 Settings......................................................................................................................... 1373
22.6.3 Operation principle........................................................................................................ 1373
22.6.4 Technical data............................................................................................................... 1389
22.7 SPA communication protocol.......................................................................................... 1389
22.7.1 Functionality ................................................................................................................. 1389

Transformer protection RET670 39

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

22.7.2 Design........................................................................................................................... 1390

22.7.3 Settings......................................................................................................................... 1390
22.7.4 Operation principle........................................................................................................ 1390
22.7.4.1 Communication ports............................................................................................... 1397
22.7.5 Technical data............................................................................................................... 1398
22.8 IEC 60870-5-103 communication protocol...................................................................... 1398
22.8.1 Introduction ...................................................................................................................1398
22.8.2 Measurands for IEC 60870-5-103 I103MEAS...............................................................1399
22.8.2.1 Functionality............................................................................................................. 1399
22.8.2.2 Identification............................................................................................................. 1399
22.8.2.3 Function block.......................................................................................................... 1399
22.8.2.4 Signals..................................................................................................................... 1400
22.8.2.5 Settings.................................................................................................................... 1400
22.8.3 Measurands user defined signals for IEC 60870-5-103 I103MEASUSR...................... 1400
22.8.3.1 Functionality............................................................................................................. 1400
22.8.3.2 Identification............................................................................................................. 1401
22.8.3.3 Function block.......................................................................................................... 1401
22.8.3.4 Signals..................................................................................................................... 1401
22.8.3.5 Settings.................................................................................................................... 1401
22.8.4 Function status auto-recloser for IEC 60870-5-103 I103AR......................................... 1402
22.8.4.1 Functionality............................................................................................................. 1402
22.8.4.2 Identification............................................................................................................. 1402
22.8.4.3 Function block.......................................................................................................... 1402
22.8.4.4 Signals..................................................................................................................... 1402
22.8.4.5 Settings.................................................................................................................... 1403
22.8.5 Function status earth-fault for IEC 60870-5-103 I103EF.............................................. 1403
22.8.5.1 Functionality............................................................................................................. 1403
22.8.5.2 Identification............................................................................................................. 1403
22.8.5.3 Function block.......................................................................................................... 1403
22.8.5.4 Signals..................................................................................................................... 1403
22.8.5.5 Settings.................................................................................................................... 1403
22.8.6 Function status fault protection for IEC 60870-5-103 I103FLTPROT............................1404
22.8.6.1 Functionality............................................................................................................. 1404
22.8.6.2 Identification............................................................................................................. 1404
22.8.6.3 Function block.......................................................................................................... 1404
22.8.6.4 Signals..................................................................................................................... 1405
22.8.6.5 Settings.................................................................................................................... 1405
22.8.7 IED status for IEC 60870-5-103 I103IED...................................................................... 1406
22.8.7.1 Functionality............................................................................................................. 1406
22.8.7.2 Identification............................................................................................................. 1406
22.8.7.3 Function block.......................................................................................................... 1406
22.8.7.4 Signals..................................................................................................................... 1406
22.8.7.5 Settings.................................................................................................................... 1406
22.8.8 Supervison status for IEC 60870-5-103 I103SUPERV................................................. 1407
22.8.8.1 Functionality............................................................................................................. 1407
22.8.8.2 Identification............................................................................................................. 1407

40 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

22.8.8.3 Function block.......................................................................................................... 1407

22.8.8.4 Signals..................................................................................................................... 1407
22.8.8.5 Settings.................................................................................................................... 1407
22.8.9 Status for user defined signals for IEC 60870-5-103 I103USRDEF............................. 1408
22.8.9.1 Functionality............................................................................................................. 1408
22.8.9.2 Identification............................................................................................................. 1408
22.8.9.3 Function block.......................................................................................................... 1408
22.8.9.4 Signals..................................................................................................................... 1408
22.8.9.5 Settings.................................................................................................................... 1409
22.8.10 Function commands for IEC 60870-5-103 I103CMD.................................................... 1410
22.8.10.1 Functionality............................................................................................................. 1410
22.8.10.2 Identification............................................................................................................. 1410
22.8.10.3 Function block.......................................................................................................... 1410
22.8.10.4 Signals......................................................................................................................1411
22.8.10.5 Settings.................................................................................................................... 1411
22.8.11 IED commands for IEC 60870-5-103 I103IEDCMD...................................................... 1411
22.8.11.1 Functionality............................................................................................................. 1411
22.8.11.2 Identification............................................................................................................. 1411
22.8.11.3 Function block.......................................................................................................... 1411
22.8.11.4 Signals..................................................................................................................... 1412
22.8.11.5 Settings.................................................................................................................... 1412
22.8.12 Function commands user defined for IEC 60870-5-103 I103USRCMD........................1412
22.8.12.1 Functionality............................................................................................................. 1412
22.8.12.2 Identification............................................................................................................. 1412
22.8.12.3 Function block.......................................................................................................... 1412
22.8.12.4 Signals..................................................................................................................... 1413
22.8.12.5 Settings.................................................................................................................... 1413
22.8.13 Function commands generic for IEC 60870-5-103 I103GENCMD................................1413
22.8.13.1 Functionality............................................................................................................. 1413
22.8.13.2 Identification............................................................................................................. 1414
22.8.13.3 Function block.......................................................................................................... 1414
22.8.13.4 Signals..................................................................................................................... 1414
22.8.13.5 Settings.................................................................................................................... 1414
22.8.14 IED commands with position and select for IEC 60870-5-103 I103POSCMD.............. 1414
22.8.14.1 Functionality............................................................................................................. 1414
22.8.14.2 Identification............................................................................................................. 1415
22.8.14.3 Function block.......................................................................................................... 1415
22.8.14.4 Signals..................................................................................................................... 1415
22.8.14.5 Settings.................................................................................................................... 1415
22.8.15 IED commands with position for IEC 60870-5-103 I103POSCMDV............................. 1416
22.8.15.1 Functionality............................................................................................................. 1416
22.8.15.2 Identification............................................................................................................. 1416
22.8.15.3 Function block.......................................................................................................... 1416
22.8.15.4 Signals..................................................................................................................... 1416
22.8.15.5 Settings.................................................................................................................... 1416
22.8.16 Operation principle ....................................................................................................... 1417

Transformer protection RET670 41

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

22.8.16.1 General ................................................................................................................... 1417

22.8.16.2 Communication ports............................................................................................... 1425
22.8.17 Technical data............................................................................................................... 1425
22.9 MULTICMDRCV and MULTICMDSND............................................................................1426
22.9.1 Functionality ................................................................................................................. 1426
22.9.2 Design........................................................................................................................... 1426
22.9.2.1 General.................................................................................................................... 1426
22.9.3 Function block............................................................................................................... 1426
22.9.4 Signals...........................................................................................................................1427
22.9.5 Settings......................................................................................................................... 1428
22.9.6 Operation principle........................................................................................................ 1429
22.10 Security events on protocols SECALARM...................................................................... 1429
22.10.1 Security alarm SECALARM...........................................................................................1429
22.10.1.1 Signals..................................................................................................................... 1429
22.10.1.2 Settings.................................................................................................................... 1429
22.11 Activity logging parameters ACTIVLOG.......................................................................... 1429
22.11.1 Activity logging ACTIVLOG........................................................................................... 1429
22.11.2 Settings......................................................................................................................... 1430
22.12 IEC61850SIM.................................................................................................................. 1431
22.12.1 IEC61850 simulation mode........................................................................................... 1431
22.12.1.1 Functionality............................................................................................................. 1431
22.12.1.2 Function block.......................................................................................................... 1431
22.12.1.3 Signals..................................................................................................................... 1431
22.12.1.4 Settings.................................................................................................................... 1431
22.12.1.5 Monitored Data.........................................................................................................1431

Section 23 Remote communication.......................................................................... 1433

23.1 Binary signal transfer.......................................................................................................1433
23.1.1 Identification.................................................................................................................. 1433
23.1.2 Functionality ................................................................................................................. 1433
23.1.3 Signals...........................................................................................................................1433
23.1.4 Settings......................................................................................................................... 1440
23.1.5 Monitored data.............................................................................................................. 1447
23.1.6 Operation principle........................................................................................................ 1456
23.2 Transmission of local analog data via LDCM to remote end, function block
LDCMTRN called LDCMTransmit................................................................................... 1457
23.2.1 Identification.................................................................................................................. 1457
23.2.2 Function block............................................................................................................... 1457
23.2.3 Signals...........................................................................................................................1459

Section 24 Security.....................................................................................................1463
24.1 Authority check ATHCHCK..............................................................................................1463
24.1.1 Identification.................................................................................................................. 1463
24.1.2 Functionality ................................................................................................................. 1463
24.1.3 Operation principle ....................................................................................................... 1463
24.1.3.1 Authorization with Central Account Management enabled IED............................... 1465
24.2 Authority management AUTHMAN................................................................................. 1467

42 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

24.2.1 Identification.................................................................................................................. 1467

24.2.2 AUTHMAN.....................................................................................................................1467
24.2.3 Settings......................................................................................................................... 1467
24.3 FTP access with password FTPACCS............................................................................ 1468
24.3.1 Identification.................................................................................................................. 1468
24.3.2 FTP access with TLS, FTPACCS..................................................................................1468
24.3.3 Settings......................................................................................................................... 1468
24.4 Authority status ATHSTAT............................................................................................... 1468
24.4.1 Identification.................................................................................................................. 1468
24.4.2 Functionality ................................................................................................................. 1468
24.4.3 Function block............................................................................................................... 1469
24.4.4 Signals...........................................................................................................................1469
24.4.5 Settings......................................................................................................................... 1469
24.4.6 Operation principle ....................................................................................................... 1469
24.5 Self supervision with internal event list INTERRSIG....................................................... 1469
24.5.1 Functionality ................................................................................................................. 1469
24.5.2 Function block............................................................................................................... 1469
24.5.3 Signals...........................................................................................................................1470
24.5.4 Settings......................................................................................................................... 1470
24.5.5 Operation principle........................................................................................................ 1470
24.5.5.1 Internal signals......................................................................................................... 1471
24.5.5.2 Supervision of analog inputs.................................................................................... 1473
24.5.6 Technical data............................................................................................................... 1474
24.6 ChangeLock function CHNGLCK.................................................................................... 1474
24.6.1 Functionality ................................................................................................................. 1474
24.6.2 Function block............................................................................................................... 1474
24.6.3 Signals...........................................................................................................................1474
24.6.4 Operation principle ....................................................................................................... 1474
24.7 Denial of service DOS..................................................................................................... 1475
24.7.1 Functionality ................................................................................................................. 1475
24.7.2 Operation principle ....................................................................................................... 1475

Section 25 Basic IED functions................................................................................. 1477

25.1 Time synchronization TIMESYNCHGEN.........................................................................1477
25.1.1 Functionality ................................................................................................................. 1477
25.1.2 Settings......................................................................................................................... 1477
25.1.3 Description of SyncLostMode........................................................................................1481
25.1.4 Operation principle ....................................................................................................... 1482
25.1.4.1 General concepts..................................................................................................... 1482
25.1.4.2 Real-time clock (RTC) operation..............................................................................1484
25.1.4.3 Synchronization alternatives.................................................................................... 1485
25.1.4.4 Process bus IEC/UCA 61850-9-2LE synchronization.............................................. 1488
25.1.4.5 Precision Time Protocol (PTP) ................................................................................ 1488
25.1.5 Technical data............................................................................................................... 1489
25.2 Parameter setting groups................................................................................................ 1490
25.2.1 Functionality ................................................................................................................. 1490

Transformer protection RET670 43

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

25.2.2 Function block............................................................................................................... 1490

25.2.3 Signals...........................................................................................................................1490
25.2.4 Settings......................................................................................................................... 1491
25.2.5 Operation principle........................................................................................................ 1491
25.3 Test mode functionality TESTMODE...............................................................................1492
25.3.1 Functionality ................................................................................................................. 1492
25.3.2 Function block............................................................................................................... 1492
25.3.3 Signals...........................................................................................................................1493
25.3.4 Settings......................................................................................................................... 1493
25.3.5 Operation principle ....................................................................................................... 1493
25.4 IED identifiers TERMINALID........................................................................................... 1494
25.4.1 Functionality ................................................................................................................. 1494
25.4.2 Settings ........................................................................................................................ 1494
25.5 Product information PRODINF........................................................................................ 1494
25.5.1 Functionality ................................................................................................................. 1494
25.5.2 Settings ........................................................................................................................ 1495
25.5.3 Factory defined settings................................................................................................ 1495
25.6 Signal matrix for binary inputs SMBI............................................................................... 1496
25.6.1 Functionality.................................................................................................................. 1496
25.6.2 Function block............................................................................................................... 1496
25.6.3 Signals...........................................................................................................................1496
25.6.4 Operation principle........................................................................................................ 1497
25.7 Signal matrix for binary outputs SMBO .......................................................................... 1497
25.7.1 Functionality.................................................................................................................. 1497
25.7.2 Function block............................................................................................................... 1497
25.7.3 Signals...........................................................................................................................1498
25.7.4 Operation principle........................................................................................................ 1498
25.8 Signal matrix for mA inputs SMMI................................................................................... 1498
25.8.1 Functionality.................................................................................................................. 1498
25.8.2 Function block............................................................................................................... 1498
25.8.3 Signals...........................................................................................................................1499
25.8.4 Operation principle........................................................................................................ 1499
25.9 Signal matrix for analog inputs SMAI.............................................................................. 1499
25.9.1 Functionality ................................................................................................................. 1499
25.9.2 Function block............................................................................................................... 1500
25.9.3 Signals...........................................................................................................................1501
25.9.4 Settings......................................................................................................................... 1502
25.9.5 Operation principle ....................................................................................................... 1503
25.9.5.1 Frequency values.....................................................................................................1503
25.9.6 SMAI incorrect calculated phase-earth......................................................................... 1504
25.10 Summation block 3 phase 3PHSUM............................................................................... 1505
25.10.1 Functionality ................................................................................................................. 1505
25.10.2 Function block............................................................................................................... 1505
25.10.3 Signals...........................................................................................................................1505
25.10.4 Settings......................................................................................................................... 1505
25.10.5 Operation principle ....................................................................................................... 1506

44 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

25.11 Primary system values PRIMVAL....................................................................................1506

25.11.1 Identification.................................................................................................................. 1506
25.11.2 Functionality ................................................................................................................. 1506
25.11.3 Settings......................................................................................................................... 1506

Section 26 IED hardware............................................................................................1507

26.1 Overview......................................................................................................................... 1507
26.1.1 Variants of case size with local HMI display..................................................................1507
26.1.2 Case from the front and rear sides................................................................................1508
26.2 Hardware modules.......................................................................................................... 1512
26.2.1 Overview....................................................................................................................... 1512
26.2.2 Numeric module (NUM).................................................................................................1513
26.2.2.1 Introduction ............................................................................................................. 1513
26.2.2.2 Functionality............................................................................................................. 1514
26.2.2.3 Technical data.......................................................................................................... 1514
26.2.3 Power supply module (PSM).........................................................................................1515
26.2.3.1 Introduction ............................................................................................................. 1515
26.2.3.2 Design...................................................................................................................... 1515
26.2.3.3 Technical data.......................................................................................................... 1515
26.2.4 Local human-machine interface (Local HMI).................................................................1516
26.2.5 Transformer input module (TRM).................................................................................. 1516
26.2.5.1 Introduction ............................................................................................................. 1516
26.2.5.2 Design...................................................................................................................... 1516
26.2.5.3 Technical data.......................................................................................................... 1518
26.2.6 Analog digital conversion module (ADM)...................................................................... 1519
26.2.6.1 Introduction.............................................................................................................. 1519
26.2.6.2 Design...................................................................................................................... 1519
26.2.7 Binary input module (BIM).............................................................................................1520
26.2.7.1 Introduction ............................................................................................................. 1520
26.2.7.2 Design...................................................................................................................... 1521
26.2.7.3 Signals..................................................................................................................... 1523
26.2.7.4 Settings.................................................................................................................... 1524
26.2.7.5 Monitored data......................................................................................................... 1524
26.2.7.6 Technical data.......................................................................................................... 1524
26.2.8 Binary output modules (BOM)....................................................................................... 1526
26.2.8.1 Introduction ............................................................................................................. 1526
26.2.8.2 Design...................................................................................................................... 1526
26.2.8.3 Signals..................................................................................................................... 1527
26.2.8.4 Settings.................................................................................................................... 1528
26.2.8.5 Monitored data......................................................................................................... 1528
26.2.8.6 Technical data.......................................................................................................... 1531
26.2.9 Static binary output module (SOM)............................................................................... 1532
26.2.9.1 Function revision history.......................................................................................... 1532
26.2.9.2 Introduction ............................................................................................................. 1533
26.2.9.3 Design...................................................................................................................... 1533
26.2.9.4 Signals..................................................................................................................... 1535

Transformer protection RET670 45

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

26.2.9.5 Settings.................................................................................................................... 1535

26.2.9.6 Monitored data......................................................................................................... 1535
26.2.9.7 Technical data.......................................................................................................... 1537
26.2.10 Binary input/output module (IOM)................................................................................. 1539
26.2.10.1 Introduction ............................................................................................................. 1539
26.2.10.2 Design...................................................................................................................... 1539
26.2.10.3 Signals..................................................................................................................... 1541
26.2.10.4 Settings.................................................................................................................... 1541
26.2.10.5 Monitored data......................................................................................................... 1542
26.2.10.6 Technical data.......................................................................................................... 1544
26.2.11 mA input module (MIM)................................................................................................. 1546
26.2.11.1 Introduction ............................................................................................................. 1546
26.2.11.2 Design...................................................................................................................... 1546
26.2.11.3 Signals..................................................................................................................... 1547
26.2.11.4 Settings.................................................................................................................... 1548
26.2.11.5 Monitored data......................................................................................................... 1549
26.2.11.6 Technical data.......................................................................................................... 1550
26.2.12 Serial and LON communication module (SLM) ............................................................ 1550
26.2.12.1 Introduction ............................................................................................................. 1550
26.2.12.2 Design...................................................................................................................... 1550
26.2.12.3 Technical data.......................................................................................................... 1552
26.2.13 Galvanic RS485 communication module...................................................................... 1552
26.2.13.1 Introduction ............................................................................................................. 1552
26.2.13.2 Design...................................................................................................................... 1552
26.2.13.3 Serial optical and RS485 communication channel settings..................................... 1553
26.2.13.4 Parameter list for optical and RS485 communication channel.................................1555
26.2.13.5 Technical data.......................................................................................................... 1555
26.2.14 Optical Ethernet module................................................................................................1555
26.2.14.1 Introduction ............................................................................................................. 1555
26.2.14.2 Functionality............................................................................................................. 1555
26.2.14.3 Design...................................................................................................................... 1555
26.2.14.4 Technical data.......................................................................................................... 1556
26.2.15 Line data communication module (LDCM).................................................................... 1556
26.2.15.1 Introduction.............................................................................................................. 1556
26.2.15.2 Design...................................................................................................................... 1556
26.2.15.3 Technical data.......................................................................................................... 1557
26.2.16 Galvanic X.21 line data communication (X.21-LDCM).................................................. 1558
26.2.16.1 Introduction ............................................................................................................. 1558
26.2.16.2 Design ..................................................................................................................... 1558
26.2.16.3 Functionality............................................................................................................. 1560
26.2.16.4 Technical data.......................................................................................................... 1561
26.2.17 GPS time synchronization module (GTM).....................................................................1561
26.2.17.1 Introduction ............................................................................................................. 1561
26.2.17.2 Design...................................................................................................................... 1561
26.2.17.3 Monitored data......................................................................................................... 1562
26.2.17.4 Technical data.......................................................................................................... 1562

46 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Table of contents

26.2.18 GPS antenna.................................................................................................................1562

26.2.18.1 Introduction.............................................................................................................. 1562
26.2.18.2 Design...................................................................................................................... 1562
26.2.18.3 Technical data.......................................................................................................... 1564
26.2.19 IRIG-B time synchronization module IRIG-B.................................................................1564
26.2.19.1 Introduction ............................................................................................................. 1564
26.2.19.2 Design...................................................................................................................... 1564
26.2.19.3 Encoding.................................................................................................................. 1565
26.2.19.4 TimeZoneAs1344..................................................................................................... 1565
26.2.19.5 Settings.................................................................................................................... 1565
26.2.19.6 Technical data.......................................................................................................... 1565
26.3 Dimensions......................................................................................................................1566
26.3.1 Case with protective cover............................................................................................ 1566
26.3.2 Case without protective cover....................................................................................... 1569
26.3.3 Flush mounting dimensions...........................................................................................1571
26.3.4 Side-by-side flush mounting dimensions.......................................................................1571
26.3.5 Wall mounting dimensions............................................................................................ 1572
26.3.6 External resistor unit for high impedance differential protection....................................1573
26.4 Mounting alternatives...................................................................................................... 1574
26.4.1 Flush mounting..............................................................................................................1574
26.4.1.1 Overview.................................................................................................................. 1574
26.4.1.2 Mounting procedure for flush mounting....................................................................1574
26.4.2 Wall mounting................................................................................................................1575
26.4.2.1 Overview.................................................................................................................. 1575
26.4.2.2 Mounting procedure for wall mounting..................................................................... 1576
26.4.2.3 How to reach the rear side of the IED...................................................................... 1576
26.4.3 19” panel rack mounting................................................................................................1577
26.4.3.1 Overview.................................................................................................................. 1577
26.4.3.2 Mounting procedure for 19” panel rack mounting.................................................... 1578
26.4.4 Side-by-side 19” rack mounting.....................................................................................1579
26.4.4.1 Overview.................................................................................................................. 1579
26.4.4.2 Mounting procedure for side-by-side rack mounting................................................ 1579
26.4.4.3 IED mounted with a RHGS6 case............................................................................1579
26.4.5 Side-by-side flush mounting..........................................................................................1580
26.4.5.1 Overview.................................................................................................................. 1580
26.4.5.2 Mounting procedure for side-by-side flush mounting............................................... 1581
26.5 Technical data................................................................................................................. 1581
26.5.1 Enclosure...................................................................................................................... 1581
26.5.2 Electrical safety............................................................................................................. 1582
26.5.3 Connection system........................................................................................................1582
26.5.4 Influencing factors......................................................................................................... 1582
26.5.5 Type tests according to standard.................................................................................. 1583

Section 27 Labels....................................................................................................... 1587

27.1 Labels on IED..................................................................................................................1587

Section 28 Connection diagrams ............................................................................. 1589

Transformer protection RET670 47

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Table of contents 1MRK 504 164-UEN Rev. N

Section 29 Inverse time characteristics................................................................... 1591

29.1 Application.......................................................................................................................1591
29.2 Principle of operation ......................................................................................................1593
29.2.1 Mode of operation......................................................................................................... 1593
29.3 Inverse characteristics ....................................................................................................1597

Section 30 Glossary................................................................................................... 1625

48 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 1
Introduction

Section 1 Introduction
1.1 This manual GUID-AB423A30-13C2-46AF-B7FE-A73BB425EB5F v20

The technical manual contains operation principle descriptions, and lists function blocks, logic
diagrams, input and output signals, setting parameters and technical data, sorted per function. The
manual can be used as a technical reference during the engineering phase, installation and
commissioning phase, and during normal service.

1.1.1 Presumptions for Technical Data GUID-1E949E38-E04D-4374-A086-912C25E9F93C v3

The technical data stated in this document are only valid under the following circumstances:

1. Main current transformers with 1 A or 2 A secondary rating are wired to the IED 1 A rated CT
inputs.
2. Main current transformer with 5 A secondary rating are wired to the IED 5 A rated CT inputs.
3. CT and VT ratios in the IED are set in accordance with the associated main instrument
transformers. Note that for functions which measure an analogue signal which do not have
corresponding primary quantity the 1:1 ratio shall be set for the used analogue inputs on the
IED. Example of such functions are: HZPDIF, ROTIPHIZ and STTIPHIZ.
4. Parameter IBase used by the tested function is set equal to the rated CT primary current.
5. Parameter UBase used by the tested function is set equal to the rated primary phase-to-phase
voltage.
6. Parameter SBase used by the tested function is set equal to:
• √3 × IBase × UBase
7. The rated secondary quantities have the following values:
• Rated secondary phase current Ir is either 1 A or 5 A depending on selected TRM.
• Rated secondary phase-to-phase voltage Ur is within the range from 100 V to 120 V.
• Rated secondary power for three-phase system Sr = √3 × Ur × Ir
8. For operate and reset time testing, the default setting values of the function and BOM module
are used if not explicitly stated otherwise.
All reset times are measured using BOM output contacts if not explicitly stated otherwise. The
operate/reset times are determined by characteristics of the output module used.
9. During testing, signals with rated frequency have been injected if not explicitly stated otherwise.
10. All declared operate times are with BOM module unless specified. All the declared operate (trip)
times can be reduced by 3-4 ms when using SOM module.

1.2 Intended audience GUID-C9B8127F-5748-4BEA-9E4F-CC762FE28A3A v11

This manual addresses system engineers and installation and commissioning personnel, who use
technical data during engineering, installation and commissioning, and in normal service.

The system engineer must have a thorough knowledge of protection systems, protection equipment,
protection functions and the configured functional logic in the IEDs. The installation and
commissioning personnel must have a basic knowledge in handling electronic equipment.

Transformer protection RET670 49

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 1 1MRK 504 164-UEN Rev. N
Introduction

1.3 Product documentation

1.3.1 Product documentation set GUID-3AA69EA6-F1D8-47C6-A8E6-562F29C67172 v16

Deinstalling & disposal

Planning & purchase

Decommissioning
Commissioning

Maintenance
Engineering

Operation
Installing
Engineering manual
Installation manual

Commissioning manual
Operation manual

Application manual

Technical manual

Communication
protocol manual
Cyber security
deployment guideline
IEC07000220-4-en.vsd
IEC07000220 V4 EN-US

Figure 1: The intended use of manuals throughout the product lifecycle

The engineering manual contains instructions on how to engineer the IEDs using the various tools
available within the PCM600 software. The manual provides instructions on how to set up a PCM600
project and insert IEDs to the project structure. The manual also recommends a sequence for the
engineering of protection and control functions, as well as communication engineering for IEC 61850.

The installation manual contains instructions on how to install the IED. The manual provides
procedures for mechanical and electrical installation. The chapters are organized in the chronological
order in which the IED should be installed.

The commissioning manual contains instructions on how to commission the IED. The manual can
also be used by system engineers and maintenance personnel for assistance during the testing
phase. The manual provides procedures for the checking of external circuitry and energizing the IED,
parameter setting and configuration as well as verifying settings by secondary injection. The manual
describes the process of testing an IED in a substation which is not in service. The chapters are
organized in the chronological order in which the IED should be commissioned. The relevant
procedures may be followed also during the service and maintenance activities.

The operation manual contains instructions on how to operate the IED once it has been
commissioned. The manual provides instructions for the monitoring, controlling and setting of the
IED. The manual also describes how to identify disturbances and how to view calculated and
measured power grid data to determine the cause of a fault.

50 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 1
Introduction

The application manual contains application descriptions and setting guidelines sorted per function.
The manual can be used to find out when and for what purpose a typical protection function can be
used. The manual can also provide assistance for calculating settings.

The technical manual contains operation principle descriptions, and lists function blocks, logic
diagrams, input and output signals, setting parameters and technical data, sorted per function. The
manual can be used as a technical reference during the engineering phase, installation and
commissioning phase, and during normal service.

The communication protocol manual describes the communication protocols supported by the IED.
The manual concentrates on the vendor-specific implementations.

The point list manual describes the outlook and properties of the data points specific to the IED. The
manual should be used in conjunction with the corresponding communication protocol manual.

The cyber security deployment guideline describes the process for handling cyber security when
communicating with the IED. Certification, Authorization with role based access control, and product
engineering for cyber security related events are described and sorted by function. The guideline can
be used as a technical reference during the engineering phase, installation and commissioning
phase, and during normal service.

1.3.2 Document revision history GUID-34B323E4-1319-4D42-80CE-29B0F2D36E2C v5

Document Date Product version History

revision
— 2017–05 2.2.0 First release for product version 2.2
A 2017–10 2.2.1 Ethernet ports with RJ45 connector added. enhancements/
updates made to ZMFPDIS and ZMFCPDIS.
B 2017–11 2.2.1 ZMFPDIS and ZMFCPDIS - Added missing setting tables
C 2018–03 2.2.1 Document enhancements and corrections
D Document not released
E 2018–06 2.2.2 LDCM galvanic X.21 added. Function PTRSTHR added.
Technical data updated for PSM, EF4PTOC and T2WPDIF/
T3WPDIF. Corrections/enhancements made to OC4PTOC,
TRPTTR, UV2PTUV and OV2PTOV. Case dimensions
updated.
F 2018–09 2.2.2 Updated KEMA test values
G 2018–11 2.2.3 Functions PSTPDIF, CHMMHAI, VHMMHAI, DELVSPVC,
DELSPVC and DELISPVC added. Updates/enhancements
made to ZMFPDIS, ZMFCPDIS, CCRBRF, REALCOMP,
PTRSTHR and FNKEYMDx. Ordering section updated.
H 2019-05 2.2.3 PTP enhancements and corrections
J 2019-10 2.2.3 Heavy duty SOM added
K Document not released
Table continues on next page

Transformer protection RET670 51

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 1 1MRK 504 164-UEN Rev. N
Introduction

Document Date Product version History

revision
L Document not released
M 2020-09 2.2.4 Functions ZMBURPSB, APPTEF, SCCFPVOC, SCUCPTOC,
SCPDPTOV, SCUVPTOV, IEC 61850SIM, ALGOS and
SMBRREC added. Updates/enhancements made to functions
REFPDIF, ZMFPDIS, ZMFCPDIS, PPLPHIZ, PPL2PHIZ,
ZCVPSOF, EF4PTOC, ROV2PTOV, SAPTUF, SAPTOF,
CCSSPVC, FUFSPVC, SESRSYN, SMPPTRC, SSIMG, and
SSIML. Previous revisions of SOM removed, heavy duty SOM
only alternative.
N 2021-06 2.2.5 Functions BRPTOC, FLTMMXU, LMBRFLO, HOLDMINMAX,
INT_REAL, CONST_INT, INTSEL, LIMITER, ABS,
POL_REC, RAD_DEG, CONST_REAL, REALSEL,
STOREINT, STOREREAL, DEG_RAD and RSTP added.
Updates/enhancements made to functions ZMFPDIS,
ZMFCPDIS, SAPTUF, STBPTOC, CHMMHAI, VHMMHAI,
OC4PTOC, EF4PTOC, NS4PTOC, SCCFPVOC, DRPRDRE,
SXSWI and SXCBR.

1.3.3 Related documents GUID-94E8A5CA-BE1B-45AF-81E7-5A41D34EE112 v8

Documents related to RET670 Document numbers

Application manual 1MRK 504 163-UEN
Commissioning manual 1MRK 504 165-UEN
Product guide 1MRK 504 166-BEN
Technical manual 1MRK 504 164-UEN
Type test certificate 1MRK 504 166-TEN

670 series manuals Document numbers

Operation manual 1MRK 500 127-UEN
Engineering manual 1MRK 511 398-UEN
Installation manual 1MRK 514 026-UEN
Communication protocol manual, DNP3 1MRK 511 391-UUS
Communication protocol manual, IEC 60870-5-103 1MRK 511 394-UEN
Communication protocol manual, IEC 61850 Edition 1 1MRK 511 392-UEN
Communication protocol manual, IEC 61850 Edition 2 1MRK 511 393-UEN
Communication protocol manual, LON 1MRK 511 395-UEN
Communication protocol manual, SPA 1MRK 511 396-UEN
Point list manual, DNP3 1MRK 511 397-UUS
Accessories guide 1MRK 514 012-BEN
Cyber security deployment guideline 1MRK 511 399-UEN
Connection and Installation components 1MRK 513 003-BEN
Test system, COMBITEST 1MRK 512 001-BEN
Application guide, Communication set-up 1MRK 505 382-UEN

52 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 1
Introduction

1.4 Document symbols and conventions

1.4.1 Symbols GUID-2945B229-DAB0-4F15-8A0E-B9CF0C2C7B15 v13

The electrical warning icon indicates the presence of a hazard which could result in
electrical shock.

The warning icon indicates the presence of a hazard which could result in personal
injury.

The caution hot surface icon indicates important information or warning about the
temperature of product surfaces.

Class 1 Laser product. Take adequate measures to protect the eyes and do not view
directly with optical instruments.

The caution icon indicates important information or warning related to the concept
discussed in the text. It might indicate the presence of a hazard which could result in
corruption of software or damage to equipment or property.

The information icon alerts the reader of important facts and conditions.

The tip icon indicates advice on, for example, how to design your project or how to
use a certain function.

Although warning hazards are related to personal injury, it is necessary to understand that under
certain operational conditions, operation of damaged equipment may result in degraded process
performance leading to personal injury or death. It is important that the user fully complies with all
warning and cautionary notices.

1.4.2 Document conventions GUID-96DFAB1A-98FE-4B26-8E90-F7CEB14B1AB6 v9

• Abbreviations and acronyms in this manual are spelled out in the glossary. The glossary also
contains definitions of important terms.
• Push button navigation in the LHMI menu structure is presented by using the push button icons.
For example, to navigate between the options, use and .
• HMI menu paths are presented in bold.
For example, select Main menu/Settings.
• LHMI messages are shown in Courier font.
For example, to save the changes in non-volatile memory, select Yes and press .
• Parameter names are shown in italics.
For example, the function can be enabled and disabled with the Operation setting.
• Each function block symbol shows the available input/output signal.

Transformer protection RET670 53

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 1 1MRK 504 164-UEN Rev. N
Introduction

• the character ^ in front of an input/output signal name indicates that the signal name may
be customized using the PCM600 software.
• the character * after an input signal name indicates that the signal must be connected to
another function block in the application configuration to achieve a valid application
configuration.
• Dimensions are provided both in inches and millimeters. If it is not specifically mentioned then
the dimension is in millimeters.
• Logic diagrams describe the signal logic of the function block and are bordered by dashed lines.
In a logic diagram, input and output signal paths are shown as lines that touch the outer border
of the diagram. Input signals are always on the left-hand side and output signals are on the
right-hand side.
Input and output signals can be configured using PCM600. They can be connected to the inputs
and outputs of other functions and to binary inputs and outputs. Examples of input signals are
BLKTR, BLOCK, and VTSZ. Examples of output signals are TRIP, START, STL1, STL2, and
STL3.
• Frames with a shaded area on the right-hand side represent setting parameters. These
parameters can only be set via the PST or LHMI. Their values are high (1) only when the
corresponding setting parameter is set to the symbolic value specified within the frame.
Example is the signal Timer tPP=On. Their logical values correspond automatically to the
selected setting value.
• Internal signals are illustrated graphically and end approximately 2 mm from the frame
edge. If an internal signal path cannot be drawn with a continuous line, the same signal
name is used where the signal should continue, see figure 2 and figure 3. Example of the
internal signal is BLK.
• Signal paths that extend beyond the logic diagram and continue in another diagram will be
approximately 2 mm from the frame edge, see figure 3 and figure 4. Examples are
STNDL1N, STNDL2N, STNDL3N, STNDL1L2, STNDL2L3, and STNDL3L1.

54 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 1
Introduction

STZMPP
OR
STCND

AND STNDL1L2
L1L2

STNDL2L3
L2L3 AND

L3L1 AND STNDL3L1

AND STNDL1N
L1N

AND STNDL2N
L2N

STNDL3N
L3N AND

OR STPE

OR
VTSZ STND
OR AND
BLOCK
BLOCFUNC BLK

99000557-2.vsd
IEC99000557-TIFF V3 EN-US

Figure 2: Logic diagram example with intermediate output signals

IEC00000488-TIFF V1 EN-US

Figure 3: Logic diagram example with intermediate input signals

Transformer protection RET670 55

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 1 1MRK 504 164-UEN Rev. N
Introduction

Timer tPP=On
STZMPP AND tPP
AND
t

BLOCFUNC
OR OR
tPE
t
AND
Timer tPE=On AND
STZMPE 15ms
BLKTR AND t
TRIP
BLK OR

STL1 AND TRL1

STL2 AND TRL2

STL3 AND TRL3

IEC09000887-3-en.vsdx

IEC09000887 V3 EN-US

Figure 4: Logic diagram example with a parameter input

Illustrations are used as an example and might show other products than the one the
manual describes. The example that is illustrated is still valid.

1.5 IEC 61850 edition 1 / edition 2 mapping GUID-C5133366-7260-4C47-A975-7DBAB3A33A96 v9

Function block names are used in ACT and PST to identify functions. Respective function block
names of Edition 1 logical nodes and Edition 2 logical nodes are shown in the table below.

Table 1: IEC 61850 edition 1 / edition 2 mapping

Function block name Edition 1 logical nodes Edition 2 logical nodes

- - ALSVS
AGSAL AGSAL AGSAL
SECLLN0
ALMCALH ALMCALH ALMCALH
ALTIM - ALTIM
ALTMS - ALTMS
ALTRK - ALTRK
APPTEF
BRCPTOC BRCPTOC BRCPTOC
BRPTOC BRPTOC BRPTOC
BTIGAPC B16IFCVI BTIGAPC
Table continues on next page

56 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 1
Introduction

Function block name Edition 1 logical nodes Edition 2 logical nodes

CBPGAPC CBPLLN0 CBPMMXU
CBPMMXU CBPPTRC
CBPPTRC HOLPTOV
HOLPTOV HPH1PTOV
HPH1PTOV PH3PTOC
PH3PTUC PH3PTUC
PH3PTOC RP3PDOP
RP3PDOP
CCPDSC CCRPLD CCPDSC
CCRBRF CCRBRF CCRBRF
CCSSPVC CCSRDIF CCSSPVC
CHMMHAI
CMMXU CMMXU CMMXU
CMSQI CMSQI CMSQI
CVGAPC GF2LLN0 GF2MMXN
GF2MMXN GF2PHAR
GF2PHAR GF2PTOV
GF2PTOV GF2PTUC
GF2PTUC GF2PTUV
GF2PTUV GF2PVOC
GF2PVOC PH1PTRC
PH1PTRC
CVMMXN CVMMXN CVMMXN
DPGAPC DPGGIO DPGAPC
DRPRDRE DRPRDRE DRPRDRE
ECPSCH ECPSCH ECPSCH
ECRWPSCH ECRWPSCH ECRWPSCH
EF4PTOC EF4LLN0 EF4PTRC
EF4PTRC EF4RDIR
EF4RDIR GEN4PHAR
GEN4PHAR PH1PTOC
PH1PTOC
EFPIOC EFPIOC EFPIOC
ETPMMTR ETPMMTR ETPMMTR
FDPSPDIS FDPSPDIS FDPSPDIS
FLTMMXU
FMPSPDIS FMPSPDIS FMPSPDIS
FRPSPDIS FPSRPDIS FPSRPDIS
FUFSPVC SDDRFUF FUFSPVC
SDDSPVC
GOPPDOP GOPPDOP GOPPDOP
PH1PTRC
GUPPDUP GUPPDUP GUPPDUP
PH1PTRC
HZPDIF HZPDIF HZPDIF
INDCALH INDCALH INDCALH
ITBGAPC IB16FCVB ITBGAPC
L4UFCNT L4UFCNT L4UFCNT
LCPTTR LCPTTR LCPTTR
LD0LLN0 LLN0 -
Table continues on next page

Transformer protection RET670 57

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 1 1MRK 504 164-UEN Rev. N
Introduction

Function block name Edition 1 logical nodes Edition 2 logical nodes

LDRGFC STSGGIO LDRGFC
LFPTTR LFPTTR LFPTTR
LMBRFLO LMBRFLO LMBRFLO
LOLSPTR LOLSPTR LOLSPTR
LOVPTUV LOVPTUV LOVPTUV
LPHD LPHD
MVGAPC MVGGIO MVGAPC
NS2PTOC NS2LLN0 NS2PTOC
NS2PTOC NS2PTRC
NS2PTRC
NS4PTOC EF4LLN0 EF4PTRC
EF4PTRC EF4RDIR
EF4RDIR PH1PTOC
GEN4PHAR
PH1PTOC
OC4PTOC OC4LLN0 GEN4PHAR
GEN4PHAR PH3PTOC
PH3PTOC PH3PTRC
PH3PTRC
OEXPVPH OEXPVPH OEXPVPH
OOSPPAM OOSPPAM OOSPPAM
OOSPTRC
OV2PTOV GEN2LLN0 OV2PTOV
OV2PTOV PH1PTRC
PH1PTRC
PCFCNT PCGGIO PCFCNT
PHPIOC PHPIOC PHPIOC
PSLPSCH ZMRPSL PSLPSCH
PSPPPAM PSPPPAM PSPPPAM
PSPPTRC
PSTPDIF
PTRSTHR PTRSTHR PTRSTHR
QCBAY QCBAY BAY/LLN0
QCRSV QCRSV QCRSV
RCHLCCH RCHLCCH RCHLCCH
REFPDIF REFPDIF REFPDIF
ROV2PTOV GEN2LLN0 PH1PTRC
PH1PTRC ROV2PTOV
ROV2PTOV
SAPFRC SAPFRC SAPFRC
SAPTOF SAPTOF SAPTOF
SAPTUF SAPTUF SAPTUF
SCCFPVOC
SCHLCCH SCHLCCH SCHLCCH
SCILO SCILO SCILO
SCUCPTOC
SCPDPTOV
Table continues on next page

58 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 1
Introduction

Function block name Edition 1 logical nodes Edition 2 logical nodes

SCUVPTOV
SCSWI SCSWI SCSWI
SDEPSDE SDEPSDE SDEPSDE
SDEPTOC
SDEPTOV
SDEPTRC
SESRSYN RSY1LLN0 AUT1RSYN
AUT1RSYN MAN1RSYN
MAN1RSYN SYNRSYN
SYNRSYN
SLGAPC SLGGIO SLGAPC
SMBRREC SMBRREC SMBRREC
SMPPTRC SMPPTRC SMPPTRC
SP16GAPC SP16GGIO SP16GAPC
SPC8GAPC SPC8GGIO SPC8GAPC
SPGAPC SPGGIO SPGAPC
SSCBR SSCBR SSCBR
SSIMG SSIMG SSIMG
SSIML SSIML SSIML
STBPTOC STBPTOC BBPMSS
STBPTOC
SXCBR SXCBR SXCBR
SXSWI SXSWI SXSWI
T2WPDIF T2WPDIF T2WGAPC
T2WPDIF
T2WPHAR
T2WPTRC
T3WPDIF T3WPDIF T3WGAPC
T3WPDIF
T3WPHAR
T3WPTRC
TCLYLTC TCLYLTC TCLYLTC
TCSLTC
TCMYLTC TCMYLTC TCMYLTC
TEIGAPC TEIGGIO TEIGAPC
TEIGGIO
TEILGAPC TEILGGIO TEILGAPC
TMAGAPC TMAGGIO TMAGAPC
TR1ATCC TR1ATCC TR1ATCC
TR8ATCC TR8ATCC TR8ATCC
TRPTTR TRPTTR TRPTTR
UV2PTUV GEN2LLN0 PH1PTRC
PH1PTRC UV2PTUV
UV2PTUV
VDCPTOV VDCPTOV VDCPTOV
VDSPVC VDRFUF VDSPVC
VHMMHAI
VMMXU VMMXU VMMXU
Table continues on next page

Transformer protection RET670 59

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 1 1MRK 504 164-UEN Rev. N
Introduction

Function block name Edition 1 logical nodes Edition 2 logical nodes

VMSQI VMSQI VMSQI
VNMMXU VNMMXU VNMMXU
VRPVOC VRLLN0 PH1PTRC
PH1PTRC PH1PTUV
PH1PTUV VRPVOC
VRPVOC
VSGAPC VSGGIO VSGAPC
WRNCALH WRNCALH WRNCALH
ZCLCPSCH ZCLCPLAL ZCLCPSCH
ZCPSCH ZCPSCH ZCPSCH
ZCRWPSCH ZCRWPSCH ZCRWPSCH
ZCVPSOF ZCVPSOF ZCVPSOF
ZGVPDIS ZGVLLN0 PH1PTRC
PH1PTRC ZGVPDIS
ZGVPDIS ZGVPTUV
ZGVPTUV
ZMCAPDIS ZMCAPDIS ZMCAPDIS
ZMCPDIS ZMCPDIS ZMCPDIS
ZMFCPDIS ZMFCLLN0 PSFPDIS
PSFPDIS ZMFPDIS
ZMFPDIS ZMFPTRC
ZMFPTRC ZMMMXU
ZMMMXU
ZMFPDIS ZMFLLN0 PSFPDIS
PSFPDIS PSFPDIS
ZMFPDIS ZMFPDIS
ZMFPTRC ZMFPTRC
ZMMMXU ZMMMXU
ZMHPDIS ZMHPDIS ZMHPDIS
ZMMAPDIS ZMMAPDIS ZMMAPDIS
ZMMPDIS ZMMPDIS ZMMPDIS
ZMQAPDIS ZMQAPDIS ZMQAPDIS
ZMQPDIS ZMQPDIS ZMQPDIS
ZMRAPDIS ZMRAPDIS ZMRAPDIS
ZMRPDIS ZMRPDIS ZMRPDIS
ZMBURPSB ZMBURPSB ZMBURPSB
ZPCPSCH
ZSMGAPC ZSMGAPC ZSMGAPC

60 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 2
Available functions

Section 2 Available functions

GUID-F5776DD1-BD04-4872-BB89-A0412B4B5CC3 v1

The following tables list all the functions available in the IED. Those functions that
are not exposed to the user or do not need to be configured are not described in this
manual.

2.1 Main protection functions GUID-66BAAD98-851D-4AAC-B386-B38B57718BD2 v17

Table 2: Example of quantities

2 = number of basic instances

0-3 = option quantities
3-A03 = optional function included in packages A03 (refer to ordering details)
C30 =1/2 CB application. For the pre-configured variants

IEC 61850 or ANSI Function description Transformer

function name

RET670 (A10)

RET670 (B30)

RET670 (B40)

RET670 (A25)
RET670
(Customized)

Differential protection
T2WPDIF 87T Transformer differential protection, two 1-3 1
winding
T3WPDIF 87T Transformer differential protection, three 1-3 1
winding
HZPDIF 87 High impedance differential protection, single 0-6 1 3-A02 3-A02
phase
REFPDIF 87N Restricted earth fault protection, low 0-3 1 2 2B
impedance 1-A01
LDRGFC 11REL Additional security logic for differential 0-1
protection
PSTPDIF 87T Self-adaptive differential protection for two- 1
winding power transformers
Impedance protection
ZMQPDIS, 21 Distance protection zone, quadrilateral 0-5
ZMQAPDIS characteristic
ZDRDIR 21D Directional impedance quadrilateral 0-2
ZMCPDIS, 21 Distance measuring zone, quadrilateral 0-5
ZMCAPDIS characteristic for series compensated lines
ZDSRDIR 21D Directional impedance quadrilateral, including 0-2
series compensation
FDPSPDIS 21 Phase selection, quadrilateral characteristic 0-2
with fixed angle
ZMHPDIS 21 Full-scheme distance protection, mho 0-5
characteristic
Table continues on next page

Transformer protection RET670 61

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 2 1MRK 504 164-UEN Rev. N
Available functions

IEC 61850 or ANSI Function description Transformer

function name

RET670 (A10)

RET670 (B30)

RET670 (B40)

RET670 (A25)
RET670
(Customized)

ZMMPDIS, 21 Full-scheme distance protection, quadrilateral 0-5

ZMMAPDIS for earth faults
ZDMRDIR 21D Directional impedance element for mho 0-2
characteristic
ZDARDIR Additional distance protection directional 0-1
function for earth faults
ZSMGAPC Mho impedance supervision logic 0-1
FMPSPDIS 21 Faulty phase identification with load 0-2
enchroachment
ZMRPDIS, 21 Distance measuring zone, quad characteristic 0-5
ZMRAPDIS separate Ph-Ph and Ph-E settings
FRPSPDIS 21 Phase selection, quadrilateral characteristic 0-2
with settable angle
ZMFPDIS 21 High speed distance protection, quad and 0-2 1-B35 1-B35
mho characteristic
ZMFCPDIS 21 High speed distance protection for series 0-2
comp. lines, quad and mho characteristic
PPLPHIZ Phase preference logic 0-1
PPL2PHIZ Phase preference logic 0-1
ZMBURPSB 68 Power swing detection, blocking and 0-1 1-B35 1-B35
unblocking
PSLPSCH Power swing logic 0-1 1-B35 1-B35
PSPPPAM 78 Poleslip/out-of-step protection 0-1
OOSPPAM 78 Out-of-step protection 0-1
ZCVPSOF Automatic switch onto fault logic, voltage and 0-1 1-B35 1-B35
current based
ZGVPDIS 21 Underimpedance protection for generators 0–2 1-B14 1-B14
and transformers

62 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 2
Available functions

2.2 Back-up protection functions GUID-A8D0852F-807F-4442-8730-E44808E194F0 v17

IEC 61850 or ANSI Function description Transformer

function name

RET670 (A10)

RET670 (B30)

RET670 (B40)

RET670 (A25)
RET670
(Customized)

Current protection
PHPIOC 50 Instantaneous phase overcurrent protection 0-8 3 2 3 2-C19
OC4PTOC 51_671) Directional phase overcurrent protection, 0-8 3 2 3 2-C19
four steps
EFPIOC 50N Instantaneous residual overcurrent 0-8 3 2 3 2-C19
protection
EF4PTOC 51N_67N Directional residual overcurrent protection, 0-8 3 3 3 2-C19
four steps
NS4PTOC 46I2 Directional negative phase sequence 0-8 2-C42 2-C42 3-C43 2-C19
overcurrent protection, four steps
SDEPSDE 67N Sensitive directional residual overcurrent 0-3 1 1-C16 1-C16 1-C16
and power protection
LCPTTR 26 Thermal overload protection, one time 0-2
constant, Celsius
LFPTTR 26 Thermal overload protection, one time 0-2
constant, Fahrenheit
TRPTTR 49 Thermal overload protection, two time 0-6 1 1B 2B
constants 1-C05 1-C05
CCRBRF 50BF Breaker failure protection 0-6 3 4 6
STBPTOC 50STB Stub protection 0-3 3-B26 3-B26 3-B26
CCPDSC 52PD Pole discordance protection 0-6 3 4 6
GUPPDUP 37 Directional underpower protection 0-2 1-C35 1-C35 1-C35
GOPPDOP 32 Directional overpower protection 0-2 1-C35 1-C35 1-C35
BRCPTOC 46 Broken conductor check 1 1 1 1 1
CBPGAPC Capacitor bank protection 0-6
NS2PTOC 46I2 Negative sequence time overcurrent 0-2
protection for machines, two steps
VRPVOC 51V Voltage restrained overcurrent protection 0-3 1-C35 1-C35 1-C35
APPTEF 67NT Average power transient earth fault 0-2 1-C54 1-C54 1-C54
protection
BRPTOC 50 Overcurrent protection with binary release 0-8 3 2 3 2-C19

Voltage protection
UV2PTUV 27 Two step undervoltage protection 0-3 1-D01 1B 1B 2-D02
1-D01 2-D02
OV2PTOV 59 Two step overvoltage protection 0-3 1-D01 1B 1B 2-D02
1-D01 2-D02
Table continues on next page

Transformer protection RET670 63

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 2 1MRK 504 164-UEN Rev. N
Available functions

IEC 61850 or ANSI Function description Transformer

function name

RET670 (A10)

RET670 (B30)

RET670 (B40)

RET670 (A25)
RET670
(Customized)

ROV2PTOV 59N Residual overvoltage protection, two steps 0-4 1-D01 1B 1B 2-D02
1-D01 2-D02
OEXPVPH 24 Overexcitation protection 0-2 2-D04 1-D03 2-D04
VDCPTOV 60 Voltage differential protection 0-2 2 2 2 2
LOVPTUV 27 Loss of voltage check 1 1 1 1 1

Unbalance protection
SCCFPVOC 51V Cascading failure protection for shunt 0-3
capacitor bank
SCUCPTOC 60N Current unbalance protection for shunt 0-3
capacitor bank
SCPDPTOV 87V Phase voltage differential based capacitor 0-3
bank unbalanced protection
SCUVPTOV 60V Voltage unbalance protection for shunt 0-3
capacitor bank

Frequency protection
SAPTUF 81 Underfrequency protection 0-10 6-E01 6-E01 6-E01
SAPTOF 81 Overfrequency protection 0-6 6-E01 6-E01 6-E01
SAPFRC 81 Rate-of-change of frequency protection 0-6 6-E01 6-E01 6-E01

Multipurpose protection
CVGAPC General current and voltage protection 0-9 6-F02 6-F02

General calculation
SMAIHPAC Multipurpose filter 0-6

1) 67 requires voltage

2.3 Control and monitoring functions GUID-E3777F16-0B76-4157-A3BF-0B6B978863DE v21

IEC 61850 or ANSI Function description Transformer

function name
RET670 (A10)

RET670 (B30)

RET670 (B40)

RET670 (A25)

RET670
(Customized)

Control
SESRSYN 25 Synchrocheck, energizing check and 0-6 1 1B 1B
synchronizing 2-H01 4-H03
SMBRREC 79 Autorecloser 1
Table continues on next page

64 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 2
Available functions

IEC 61850 or ANSI Function description Transformer

function name

RET670 (A10)

RET670 (B30)

RET670 (B40)

RET670 (A25)
RET670
(Customized)

APC30 3 Control functionality for up to 6 bays, max 30 0-1 1-H39 1-H39 1-H39
objects (6CBs), including interlocking (see
Table 4)
QCBAY Bay control 1+5/APC30 1 1+5/ 1+5/ 1+5/
APC30 APC30 APC30
LOCREM Handling of LR-switch positions 1+5/APC30 1 1+5/ 1+5/ 1+5/
APC30 APC30 APC30
LOCREMCTRL LHMI control of PSTO 1 1 1 1 1
SXCBR Circuit breaker 18 12 18 18 18
TR1ATCC 90 Automatic voltage control for tap changer, 0-4 1 2 2B
single control 2-H16
TR8ATCC 90 Automatic voltage control for tap changer, 0-4 1-H15 1-H15 2B
parallel control 2-H18 2-H18
TCMYLTC 84 Tap changer control and supervision, 6 binary 0-4 4 4 4
inputs
TCLYLTC 84 Tap changer control and supervision, 32 binary 0-4 4 4 4
inputs
SLGAPC Logic rotating switch for function selection and 15 15 15 15 15
LHMI presentation
VSGAPC Selector mini switch 30 30 30 30 30
DPGAPC Generic communication function for Double 32 32 32 32 32
Point indication
SPC8GAPC Single point generic control function, 8 signals 5 5 5 5 5
AUTOBITS Automation bits, command function for DNP3.0 3 3 3 3 3
SINGLECMD Single command, 16 signals 8 8 8 8 8
I103CMD Function commands for 1 1 1 1 1
IEC 60870-5-103
I103GENCMD Function commands generic for 50 50 50 50 50
IEC 60870-5-103
I103POSCMD IED commands with position and select for 50 50 50 50 50
IEC 60870-5-103
I103POSCMDV IED direct commands with position for 50 50 50 50 50
IEC 60870-5-103
I103IEDCMD IED commands for 1 1 1 1 1
IEC 60870-5-103
I103USRCMD Function commands user defined for 4 4 4 4 4
IEC 60870-5-103
Secondary
system
supervision
CCSSPVC 87 Current circuit supervision 0-6 4 6 4
FUFSPVC Fuse failure supervision 0-4 1 3 3
VDSPVC 60 Fuse failure supervision based on voltage 0-2 1-G03 1-G03 1-G03 1-G03
difference
Table continues on next page

Transformer protection RET670 65

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 2 1MRK 504 164-UEN Rev. N
Available functions

IEC 61850 or ANSI Function description Transformer

function name

RET670 (A10)

RET670 (B30)

RET670 (B40)

RET670 (A25)
RET670
(Customized)

DELVSPVC 7V_78V Voltage delta supervision, 2 phase 4 4 4 4 4

DELISPVC 71 Current delta supervision, 2 phase 4 4 4 4 4

DELSPVC 78 Real delta supervision, real 4 4 4 4 4
Logic
SMPPTRC 94 Tripping logic 12 12 12 12 12
SMAGAPC General start matrix block 12 12 12 12 12
STARTCOMB Start combinator 32 32 32 32 32
TMAGAPC Trip matrix logic 12 12 12 12 12
ALMCALH Logic for group alarm 5 5 5 5 5
WRNCALH Logic for group warning 5 5 5 5 5
INDCALH Logic for group indication 5 5 5 5 5
AND, GATE, INV, Basic configurable logic blocks (see Table 3) 40-420 40-420 40-420 40-420 40-420
LLD, OR,
PULSETIMER,
RSMEMORY,
SRMEMORY,
TIMERSET, XOR
ANDQT, Configurable logic blocks Q/T (see Table 5) 0-1
INDCOMBSPQT,
INDEXTSPQT,
INVALIDQT,
INVERTERQT,
ORQT,
PULSETIMERQT,
RSMEMORYQT,
SRMEMORYQT,
TIMERSETQT,
XORQT
AND, GATE, INV, Extension logic package (see Table 6) 0-1
LLD, OR,
PULSETIMER,
RSMEMORY,
SLGAPC,
SRMEMORY,
TIMERSET,
VSGAPC, XOR
FXDSIGN Fixed signal function block 1 1 1 1 1
B16I Boolean to integer conversion, 16 bit 18 18 18 18 18
BTIGAPC Boolean to integer conversion with logical node 16 16 16 16 16
representation, 16 bit
IB16 Integer to Boolean 16 conversion 24 24 24 24 24
ITBGAPC Integer to Boolean 16 conversion with Logic 16 16 16 16 16
Node representation
TEIGAPC Elapsed time integrator with limit transgression 12 12 12 12 12
and overflow supervision
INTCOMP Comparator for integer inputs 30 30 30 30 30
REALCOMP Comparator for real inputs 30 30 30 30 30
Table continues on next page

66 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 2
Available functions

IEC 61850 or ANSI Function description Transformer

function name

RET670 (A10)

RET670 (B30)

RET670 (B40)

RET670 (A25)
RET670
(Customized)

HOLDMINMAX Hold minimum and maximum of input 20 20 20 20 20

INT_REAL Converter integer to real 20 20 20 20 20
CONST_INT Definable constant for logic functions 10 10 10 10 10
INTSEL Analog input selector for integer values 5 5 5 5 5
LIMITER Definable limiter 20 20 20 20 20
ABS Absolute value 20 20 20 20 20
POL_REC Polar to rectangular converter 20 20 20 20 20
RAD_DEG Radians to degree angle converter 20 20 20 20 20
CONST_REAL Definable constant for logic functions 10 10 10 10 10
REALSEL Analog input selctor for real values 5 5 5 5 5
STOREINT Store value for integer inputs 10 10 10 10 10
STOREREAL Store value for real inputs 10 10 10 10 10
DEG_RAD Degree to radians angle converter 20 20 20 20 20

IEC 61850 or ANSI Function description Transformer

function name

RET670 (A10)

RET670 (B30)

RET670 (B40)

RET670 (A25)
RET670
(Customized)

Monitoring
CVMMXN Power system measurement 6 6 6 6 6
CMMXU Current measurement 10 10 10 10 10
VMMXU Voltage measurement phase-phase 6 6 6 6 6
CMSQI Current sequence measurement 6 6 6 6 6
VMSQI Voltage sequence measurement 6 6 6 6 6
VNMMXU Voltage measurement phase-earth 6 6 6 6 6
AISVBAS General service value presentation of analog 1 1 1 1 1
inputs
EVENT Event function 20 20 20 20 20
DRPRDRE, Disturbance report 1 1 1 1 1
A1RADR-
A4RADR,
B1RBDR-
B22RBDR
SPGAPC Generic communication function for single point 96 96 96 96 96
indication
SP16GAPC Generic communication function for single point 16 16 16 16 16
indication, 16 inputs
MVGAPC Generic communication function for measured 60 60 60 60 60
values
BINSTATREP Logical signal status report 3 3 3 3 3
Table continues on next page

Transformer protection RET670 67

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 2 1MRK 504 164-UEN Rev. N
Available functions

IEC 61850 or ANSI Function description Transformer

function name

RET670 (A10)

RET670 (B30)

RET670 (B40)

RET670 (A25)
RET670
(Customized)

RANGE_XP Measured values expander block 66 66 66 66 66

SSIMG 63 Insulation supervision for gas medium 21 21 21 21 21
SSIML 71 Insulation supervision for liquid medium 4 4 4 4 4
SSCBR Circuit breaker condition monitoring 0-18 9 12 18
LOLSPTR 26/49 Transformer insulation loss of life monitoring 0-4 4-M21 4-M21 4-M21
HS
I103MEAS Measurands for 1 1 1 1 1
IEC 60870-5-103
I103MEASUSR Measurands user defined signals for 3 3 3 3 3
IEC 60870-5-103
I103AR Function status auto-recloser for 1 1 1 1 1
IEC 60870-5-103
I103EF Function status earth-fault for 1 1 1 1 1
IEC 60870-5-103
I103FLTPROT Function status fault protection for 1 1 1 1 1
IEC 60870-5-103
I103IED IED status for 1 1 1 1 1
IEC 60870-5-103
I103SUPERV Supervison status for 1 1 1 1 1
IEC 60870-5-103
I103USRDEF Status for user defined signals for 20 20 20 20 20
IEC 60870-5-103
L4UFCNT Event counter with limit supervision 30 30 30 30 30
TEILGAPC Running hour meter 6 6 6 6 6
PTRSTHR 51TF Through fault monitoring 0-2 2-M22 2-M22 2-M22 2-M22
CHMMHAI ITHD Current harmonic monitoring, 3 phase 0-3 3-M23 3-M23 3-M23 3-M23
VHMMHAI VTHD Voltage harmonic monitoring, 3 phase 0-3 3-M23 3-M23 3-M23 3-M23
FLTMMXU Fault current and voltage monitoring 3 3 3 3 3
LMBRFLO Fault locator 0-1 1-M01 1-M01
Metering
PCFCNT Pulse-counter logic 16 16 16 16 16
ETPMMTR Function for energy calculation and demand 6 6 6 6 6
handling

Table 3: Total number of instances for basic configurable logic blocks

Basic configurable logic block Total number of instances

AND 280
GATE 40
INV 420
LLD 40
OR 298
Table continues on next page

68 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 2
Available functions

Basic configurable logic block Total number of instances

PULSETIMER 40
RSMEMORY 40
SRMEMORY 40
TIMERSET 60
XOR 40

Table 4: Number of function instances in APC30

Function name Function description Total number of instances

SCILO Interlocking 30
BB_ES 6
A1A2_BS 4
A1A2_DC 6
ABC_BC 2
BH_CONN 2
BH_LINE_A 2
BH_LINE_B 2
DB_BUS_A 3
DB_BUS_B 3
DB_LINE 3
ABC_LINE 6
AB_TRAFO 4
SCSWI Switch controller 30
SXSWI Circuit switch 24
QCRSV Reservation function block for 6
apparatus control
RESIN1 1
RESIN2 59
POS_EVAL Evaluation of position indication 30
QCBAY Bay control 5
LOCREM Handling of LR-switch positions 5
XLNPROXY Proxy for signals from switching 42
device via GOOSE
GOOSEXLNRCV GOOSE function block to receive a 42
switching device

Table 5: Total number of instances for configurable logic blocks Q/T

Configurable logic blocks Q/T Total number of instances

ANDQT 120
INDCOMBSPQT 20
INDEXTSPQT 20
INVALIDQT 22
INVERTERQT 120
ORQT 120
PULSETIMERQT 40
Table continues on next page

Transformer protection RET670 69

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 2 1MRK 504 164-UEN Rev. N
Available functions

Configurable logic blocks Q/T Total number of instances

RSMEMORYQT 40
SRMEMORYQT 40
TIMERSETQT 40
XORQT 40

Table 6: Total number of instances for extended logic package

Extended configurable logic block Total number of instances

AND 220
GATE 49
INV 220
LLD 49
OR 220
PULSETIMER 89
RSMEMORY 40
SLGAPC 74
SRMEMORY 130
TIMERSET 113
VSGAPC 120
XOR 89

2.4 Communication GUID-5F144B53-B9A7-4173-80CF-CD4C84579CB5 v19

IEC 61850 or function ANSI Function description Transformer

name
RET670 (A10)

RET670 (B30)

RET670 (B40)

RET670 (A25)
RET670
(Customized)

Station communication
ADE LON communication protocol 1 1 1 1 1
HORZCOMM Network variables via LON 1 1 1 1 1
PROTOCOL Operation selection between SPA and 1 1 1 1 1
IEC60870-5-103 for SLM
RS485PROT Operation selection for RS485 1 1 1 1 1
RS485GEN RS485 1 1 1 1 1
DNPGEN DNP3.0 communication general protocol 1 1 1 1 1
CHSERRS485 DNP3.0 for EIA-485 communication protocol 1 1 1 1 1
CH1TCP, CH2TCP, DNP3.0 for TCP/IP communication protocol 1 1 1 1 1
CH3TCP, CH4TCP
CHSEROPT DNP3.0 for TCP/IP and EIA-485 1 1 1 1 1
communication protocol
MSTSER DNP3.0 serial master 1 1 1 1 1
Table continues on next page

70 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 2
Available functions

IEC 61850 or function ANSI Function description Transformer

name

RET670 (A10)

RET670 (B30)

RET670 (B40)

RET670 (A25)
RET670
(Customized)

DNPFREC DNP3.0 fault records for TCP/IP and EIA-485 1 1 1 1 1

communication protocol
IEC 61850-8-1 IEC 61850 1 1 1 1 1
GOOSEINTLKRCV Horizontal communication via GOOSE for 59 59 59 59 59
interlocking
IEC 61850SIM IEC 61850 simulation mode 1 1 1 1 1
GOOSEBINRCV GOOSE binary receive 16 16 16 16 16
GOOSEDPRCV GOOSE function block to receive a double 64 64 64 64 64
point value
GOOSEINTRCV GOOSE function block to receive an integer 32 32 32 32 32
value
GOOSEMVRCV GOOSE function block to receive a 60 60 60 60 60
measurand value
GOOSESPRCV GOOSE function block to receive a single 64 64 64 64 64
point value
VCTRSEND Horizontal communication via GOOSE for 1 1 1 1 1
VCTR
GOOSEVCTRRCV Horizontal communication via GOOSE for 7 7 7 7 7
VCTR
GOOSEVCTRCONF GOOSE VCTR configuration for send and 1 1 1 1 1
receive
ALGOS Supervision of GOOSE subscription 100 100 100 100 100
MULTICMDRCV, Multiple command and transmit 60/10 60/10 60/10 60/10 60/10
MULTICMDSND
AGSAL Generic security application component 1 1 1 1 1
LD0LLN0 IEC 61850 LD0 LLN0 1 1 1 1 1
SYSLLN0 IEC 61850 SYS LLN0 1 1 1 1 1
LPHD Physical device information 1 1 1 1 1
PCMACCS IED configuration protocol 1 1 1 1 1
SECALARM Component for mapping security events on 1 1 1 1 1
protocols such as DNP3 and IEC103
FSTACCSNA Field service tool access via SPA protocol 1 1 1 1 1
over Ethernet communication
FSTACCS Field service tool access 1 1 1 1 1
IEC 61850-9-2 Process bus communication, 8 0-1 1-P30 1-P30 1-P30 1-P30
merging units
ACTIVLOG Activity logging 1 1 1 1 1
ALTRK Service tracking 1 1 1 1 1
PRP IEC 62439-3 Parallel redundancy protocol 0-1 1-P23 1-P23 1-P23 1-P23
HSR IEC 62439-3 High-availability seamless 0-1 1-P24 1-P24 1-P24 1-P24
redundancy
RSTP Rapid spanning tree protocol 0-1 1-P25 1-P25 1-P25 1-P25
Table continues on next page

Transformer protection RET670 71

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 2 1MRK 504 164-UEN Rev. N
Available functions

IEC 61850 or function ANSI Function description Transformer

name

RET670 (A10)

RET670 (B30)

RET670 (B40)

RET670 (A25)
RET670
(Customized)

PMUCONF Synchrophasor report, 24 phasors (see Table 0-1 1-P33 1-P33 1-P33 1-P33
PMUREPORT 7)
PHASORREPORT1
PHASORREPORT2
PHASORREPORT3
ANALOGREPORT1
BINARYREPORT1
SMAI1 - SMAI12
3PHSUM
PMUSTATUS
AP_1-AP_6 AccessPoint_ABS 1 1 1 1 1
AP_FRONT Access point front 1 1 1 1 1
PTP Precision time protocol 1 1 1 1 1
ROUTE_1-ROUTE_6 Route_ABS 1 1 1 1 1
FRONTSTATUS Access point diagnostic for front Ethernet port 1 1 1 1 1
SCHLCCH Access point diagnostic for non-redundant 6 6 6 6 6
Ethernet port
RCHLCCH Access point diagnostic for redundant 3 3 3 3 3
Ethernet ports
DHCP DHCP configuration for front access point 1 1 1 1 1
QUALEXP IEC 61850 quality expander 96 96 96 96 96
Remote communication
BinSignRec1_1 Binary signal transfer, receive 3/3/6 3/3/6 3/3/6 3/3/6 3/3/6
BinSignRec1_2
BinSignReceive2
BinSignTrans1_1 Binary signal transfer, transmit 3/3/6 3/3/6 3/3/6 3/3/6 3/3/6
BinSignTrans1_2
BinSignTransm2
BSR2M_305 Binary signal transfer, 2Mbit receive 1 1 1 1 1
BSR2M_312
BSR2M_322
BSR2M_306
BSR2M_313
BSR2M_323
BST2M_305 Binary signal transfer, 2Mbit transmit 1 1 1 1 1
BST2M_312
BST2M_322
BST2M_306
BST2M_313
BST2M_323
LDCMTRN Transmission of analog data from LDCM 1 1 1 1 1
LDCMTRN_2M_305 Transmission of analog data from LDCM, 1 1 1 1 1
LDCMTRN_2M_306 2Mbit
LDCMTRN_2M_312
LDCMTRN_2M_313
LDCMTRN_2M_322
LDCMTRN_2M_323
LDCMRecBinStat1 Receive binary status from remote LDCM 6/3 6/3 6/3 6/3 6/3
LDCMRecBinStat3
LDCMRecBinStat2 Receive binary status from LDCM 3 3 3 3 3
Table continues on next page

72 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 2
Available functions

IEC 61850 or function ANSI Function description Transformer

name

RET670 (A10)

RET670 (B30)

RET670 (B40)

RET670 (A25)
RET670
(Customized)

LDCM2M_305 Receive binary status from LDCM, 2Mbit 1 1 1 1 1

LDCM2M_312
LDCM2M_322
LDCM2M_306 Receive binary status from remote LDCM, 1 1 1 1 1
LDCM2M_313 2Mbit
LDCM2M_323
Scheme communication
ZCPSCH 85 Scheme communication logic for distance or 0-2 1-B35 1-B35
overcurrent protection 1-K01 1-K01
ZPCPSCH 85 Phase segregated scheme communication 0-2
logic for distance protection
ZCRWPSCH 85 Current reversal and weak-end infeed logic for 0-2 1-B35 1-B35
distance protection 1-K01 1-K01
ZPCWPSCH 85 Current reversal and weak-end infeed logic for 0-2
phase segregated communication
ZCLCPSCH Local acceleration logic 0-1 1-B35 1-B35
1-K01 1-K01
ECPSCH 85 Scheme communication logic for residual 0-1 1 1
overcurrent protection
ECRWPSCH 85 Current reversal and weak-end infeed logic for 0-1 1 1
residual overcurrent protection

Table 7: Number of function instances in Synchrophasor report, 24 phasors

Function name Function description Total number of

instances
PMUCONF Configuration parameters for IEC/IEEE 60255-118 (C37.118) 2011 and 1
IEEE1344 protocol
PMUREPORT Protocol reporting via IEEE 1344 and IEC/IEEE 60255-118 (C37.118) 1
PHASORREPORT1 Protocol reporting of phasor data via IEEE 1344 and IEC/IEEE 60255-118 1
(C37.118), phasors 1-8
PHASORREPORT2 Protocol reporting of phasor data via IEEE 1344 and IEC/IEEE 60255-118 1
(C37.118), phasors 9-16
PHASORREPORT3 Protocol reporting of phasor data via IEEE 1344 and IEC/IEEE 60255-118 1
(C37.118), phasors 17-24
ANALOGREPORT1 Protocol reporting of analog data via IEEE 1344 and IEC/IEEE 60255-118 1
(C37.118), analogs 1-8
BINARYREPORT1 Protocol reporting of binary data via IEEE 1344 and IEC/IEEE 60255-118 1
(C37.118), binary 1-8
SMAI1–SMAI12 Signal Matrix for analog inputs 1
3PHSUM Summation block 3 phase 6
PMUSTATUS Diagnostics for IEC/IEEE 60255-118 (C37.118) 2011 and IEEE1344 protocol 1

Transformer protection RET670 73

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 2 1MRK 504 164-UEN Rev. N
Available functions

2.5 Basic IED functions GUID-C8F0E5D2-E305-4184-9627-F6B5864216CA v15

Table 8: Basic IED functions

IEC 61850 or function Description

name
INTERRSIG
Self supervision with internal event list
SELFSUPEVLST
TIMESYNCHGEN Time synchronization module
BININPUT, Time synchronization
SYNCHCAN,
SYNCHGPS,
SYNCHCMPPS,
SYNCHLON,
SYNCHPPH,
SYNCHPPS, SNTP,
TIMEZONE
DSTBEGIN GPS time synchronization module
DSTENABLE Enables or disables the use of daylight saving time
DSTEND GPS time synchronization module
IRIG-B Time synchronization
SETGRPS Number of setting groups
ACTVGRP Active parameter setting group
TESTMODE Test mode functionality
CHNGLCK Change lock function
TERMINALID IED identifiers
PRODINF Product information
SYSTEMTIME System time
LONGEN LON communication
RUNTIME IED Runtime component
SMBI Signal matrix for binary inputs
SMBO Signal matrix for binary outputs
SMMI Signal matrix for mA inputs
SMAI1 - SMAI12 Signal matrix for analog inputs
3PHSUM Summation block 3 phase
ATHSTAT Authority status
ATHCHCK Authority check
AUTHMAN Authority management
FTPACCS FTP access with password
SPACOMMMAP SPA communication mapping
SPATD Date and time via SPA protocol
BCSCONF Basic communication system
GBASVAL Global base values for settings
PRIMVAL Primary system values
SAFEFILECOPY Safe file copy function
Table continues on next page

74 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 2
Available functions

IEC 61850 or function Description

name
ALTMS Time master supervision
ALTIM Time management
CAMCONFIG Central account management configuration
CAMSTATUS Central account management status
TOOLINF Tools information
COMSTATUS Protocol diagnostic

Table 9: Local HMI functions

IEC 61850 or function Description

name
LHMICTRL Local HMI signals
LANGUAGE Local human machine language
SCREEN Local HMI Local human machine screen behavior
FNKEYTY1– Parameter setting function for HMI in PCM600
FNKEYTY5
FNKEYMD1–
FNKEYMD5
LEDGEN General LED indication part for LHMI
OPENCLOSE_LED LHMI LEDs for open and close keys
GRP1_LED1– Basic part for CP HW LED indication module
GRP1_LED15
GRP2_LED1–
GRP2_LED15
GRP3_LED1–
GRP3_LED15

Transformer protection RET670 75

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
76
1MRK 504 164-UEN Rev. N Section 3
Analog inputs

Section 3 Analog inputs SEMOD55010-1 v3

3.1 Introduction SEMOD55003-5 v11

Analog input channels must be configured and set properly in order to get correct measurement
results and correct protection operations. For power measuring, all directional and differential
functions, the directions of the input currents must be defined in order to reflect the way the current
transformers are installed/connected in the field ( primary and secondary connections ). Measuring
and protection algorithms in the IED use primary system quantities. Setting values are in primary
quantities as well and it is important to set the data about the connected current and voltage
transformers properly.

An AISVBAS reference PhaseAngleRef can be defined to facilitate service values reading. This
analog channel's phase angle will always be fixed to zero degrees and remaining analog channel's
phase angle information will be shown in relation to this analog input. During testing and
commissioning of the IED, the reference channel can be changed to facilitate testing and service
values reading.

The IED has the ability to receive analog values from primary equipment, that are
sampled by Merging units (MU) connected to a process bus, via the IEC 61850-9-2
LE protocol.

The availability of VT inputs depends on the ordered transformer input module

(TRM) type.

3.2 Function block SEMOD116577-1 v5

The hardware channels appear in the signal matrix tool (SMT) and in ACT when a
TRM is included in the configuration with the hardware configuration tool. In the SMT
or the ACT, they can be mapped to the desired virtual input (SMAI) of the IED and
used internally in the configuration.

3.3 Signals
PID-3920-OUTPUTSIGNALS v6

Table 10: TRM_12I Output signals

Name Type Description

STATUS BOOLEAN Analogue input module status
CH1(I) STRING Analogue current input 1
CH2(I) STRING Analogue current input 2
CH3(I) STRING Analogue current input 3
CH4(I) STRING Analogue current input 4
CH5(I) STRING Analogue current input 5
CH6(I) STRING Analogue current input 6
CH7(I) STRING Analogue current input 7
Table continues on next page

Transformer protection RET670 77

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 3 1MRK 504 164-UEN Rev. N
Analog inputs

Name Type Description

CH8(I) STRING Analogue current input 8
CH9(I) STRING Analogue current input 9
CH10(I) STRING Analogue current input 10
CH11(I) STRING Analogue current input 11
CH12(I) STRING Analogue current input 12

PID-3921-OUTPUTSIGNALS v7

Table 11: TRM_6I_6U Output signals

Name Type Description

STATUS BOOLEAN Analogue input module status
CH1(I) STRING Analogue current input 1
CH2(I) STRING Analogue current input 2
CH3(I) STRING Analogue current input 3
CH4(I) STRING Analogue current input 4
CH5(I) STRING Analogue current input 5
CH6(I) STRING Analogue current input 6
CH7(U) STRING Analogue voltage input 7
CH8(U) STRING Analogue voltage input 8
CH9(U) STRING Analogue voltage input 9
CH10(U) STRING Analogue voltage input 10
CH11(U) STRING Analogue voltage input 11
CH12(U) STRING Analogue voltage input 12

PID-3922-OUTPUTSIGNALS v6

Table 12: TRM_6I Output signals

Name Type Description

STATUS BOOLEAN Analogue input module status
CH1(I) STRING Analogue current input 1
CH2(I) STRING Analogue current input 2
CH3(I) STRING Analogue current input 3
CH4(I) STRING Analogue current input 4
CH5(I) STRING Analogue current input 5
CH6(I) STRING Analogue current input 6

PID-3923-OUTPUTSIGNALS v7

Table 13: TRM_7I_5U Output signals

Name Type Description

STATUS BOOLEAN Analogue input module status
CH1(I) STRING Analogue current input 1
CH2(I) STRING Analogue current input 2
CH3(I) STRING Analogue current input 3
CH4(I) STRING Analogue current input 4
CH5(I) STRING Analogue current input 5
CH6(I) STRING Analogue current input 6
Table continues on next page

78 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 3
Analog inputs

Name Type Description

CH7(I) STRING Analogue current input 7
CH8(U) STRING Analogue voltage input 8
CH9(U) STRING Analogue voltage input 9
CH10(U) STRING Analogue voltage input 10
CH11(U) STRING Analogue voltage input 11
CH12(U) STRING Analogue voltage input 12

PID-3924-OUTPUTSIGNALS v7

Table 14: TRM_9I_3U Output signals

Name Type Description

STATUS BOOLEAN Analogue input module status
CH1(I) STRING Analogue current input 1
CH2(I) STRING Analogue current input 2
CH3(I) STRING Analogue current input 3
CH4(I) STRING Analogue current input 4
CH5(I) STRING Analogue current input 5
CH6(I) STRING Analogue current input 6
CH7(I) STRING Analogue current input 7
CH8(I) STRING Analogue current input 8
CH9(I) STRING Analogue current input 9
CH10(U) STRING Analogue voltage input 10
CH11(U) STRING Analogue voltage input 11
CH12(U) STRING Analogue voltage input 12

PID-6598-OUTPUTSIGNALS v6

Table 15: TRM_10I_2U Output signals

Name Type Description

STATUS BOOLEAN Analogue input module status
CH1(I) STRING Analogue current input 1
CH2(I) STRING Analogue current input 2
CH3(I) STRING Analogue current input 3
CH4(I) STRING Analogue current input 4
CH5(I) STRING Analogue current input 5
CH6(I) STRING Analogue current input 6
CH7(I) STRING Analogue current input 7
CH8(I) STRING Analogue current input 8
CH9(I) STRING Analogue current input 9
CH10(I) STRING Analogue current input 10
CH11(U) STRING Analogue voltage input 11
CH12(U) STRING Analogue voltage input 12

3.4 Settings
SEMOD129840-4 v2
Dependent on ordered IED type.

Transformer protection RET670 79

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 3 1MRK 504 164-UEN Rev. N
Analog inputs

PID-4153-SETTINGS v8

Table 16: AISVBAS Non group settings (basic)

Name Values (Range) Unit Step Default Description

PhaseAngleRef TRM40-Ch1 - Ch12 - - TRM40-Ch1 Reference channel
TRM41-Ch1 - Ch12 for phase angle
MU1-L1I - L4I presentation
MU1-L1U - L4U
MU2-L1I - L4I
MU2-L1U - L4U
MU3-L1I - L4I
MU3-L1U - L4U
MU4-L1I - L4I
MU4-L1U - L4U
MU5-L1I - L4I
MU5-L1U - L4U
MU6-L1I - L4I
MU6-L1U - L4U
MU7-L1I - L4I
MU7-L1U - L4U
MU8-L1I - L4I
MU8-L1U - L4U
MU9-L1I - L4I
MU9-L1U - L4U
MU10-L1I - L4I
MU10-L1U - L4U
MU11-L1I - L4I
MU11-L1U - L4U
MU12-L1I - L4I
MU12-L1U - L4U

PID-3920-SETTINGS v7

Table 17: TRM_12I Non group settings (basic)

Name Values (Range) Unit Step Default Description

CTStarPoint1 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec1 1 - 10 A 1 1 Rated CT secondary current
CTprim1 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint2 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec2 1 - 10 A 1 1 Rated CT secondary current
CTprim2 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint3 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec3 1 - 10 A 1 1 Rated CT secondary current
CTprim3 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint4 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec4 1 - 10 A 1 1 Rated CT secondary current
CTprim4 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint5 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec5 1 - 10 A 1 1 Rated CT secondary current
CTprim5 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint6 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec6 1 - 10 A 1 1 Rated CT secondary current
Table continues on next page

80 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 3
Analog inputs

Name Values (Range) Unit Step Default Description

CTprim6 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint7 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec7 1 - 10 A 1 1 Rated CT secondary current
CTprim7 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint8 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec8 1 - 10 A 1 1 Rated CT secondary current
CTprim8 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint9 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec9 1 - 10 A 1 1 Rated CT secondary current
CTprim9 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint10 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec10 1 - 10 A 1 1 Rated CT secondary current
CTprim10 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint11 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec11 1 - 10 A 1 1 Rated CT secondary current
CTprim11 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint12 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec12 1 - 10 A 1 1 Rated CT secondary current
CTprim12 1 - 99999 A 1 3000 Rated CT primary current

PID-3921-SETTINGS v7

Table 18: TRM_6I_6U Non group settings (basic)

Name Values (Range) Unit Step Default Description

CTStarPoint1 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec1 1 - 10 A 1 1 Rated CT secondary current
CTprim1 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint2 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec2 1 - 10 A 1 1 Rated CT secondary current
CTprim2 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint3 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec3 1 - 10 A 1 1 Rated CT secondary current
CTprim3 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint4 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec4 1 - 10 A 1 1 Rated CT secondary current
CTprim4 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint5 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
Table continues on next page

Transformer protection RET670 81

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 3 1MRK 504 164-UEN Rev. N
Analog inputs

Name Values (Range) Unit Step Default Description

CTsec5 1 - 10 A 1 1 Rated CT secondary current
CTprim5 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint6 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec6 1 - 10 A 1 1 Rated CT secondary current
CTprim6 1 - 99999 A 1 3000 Rated CT primary current
VTsec7 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim7 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
VTsec8 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim8 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
VTsec9 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim9 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
VTsec10 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim10 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
VTsec11 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim11 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
VTsec12 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim12 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage

PID-3922-SETTINGS v7

Table 19: TRM_6I Non group settings (basic)

Name Values (Range) Unit Step Default Description

CTStarPoint1 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec1 1 - 10 A 1 1 Rated CT secondary current
CTprim1 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint2 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec2 1 - 10 A 1 1 Rated CT secondary current
CTprim2 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint3 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec3 1 - 10 A 1 1 Rated CT secondary current
CTprim3 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint4 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec4 1 - 10 A 1 1 Rated CT secondary current
CTprim4 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint5 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec5 1 - 10 A 1 1 Rated CT secondary current
CTprim5 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint6 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec6 1 - 10 A 1 1 Rated CT secondary current
CTprim6 1 - 99999 A 1 3000 Rated CT primary current

82 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 3
Analog inputs

PID-3923-SETTINGS v7

Table 20: TRM_7I_5U Non group settings (basic)

Name Values (Range) Unit Step Default Description

CTStarPoint1 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec1 1 - 10 A 1 1 Rated CT secondary current
CTprim1 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint2 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec2 1 - 10 A 1 1 Rated CT secondary current
CTprim2 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint3 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec3 1 - 10 A 1 1 Rated CT secondary current
CTprim3 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint4 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec4 1 - 10 A 1 1 Rated CT secondary current
CTprim4 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint5 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec5 1 - 10 A 1 1 Rated CT secondary current
CTprim5 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint6 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec6 1 - 10 A 1 1 Rated CT secondary current
CTprim6 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint7 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec7 1 - 10 A 1 1 Rated CT secondary current
CTprim7 1 - 99999 A 1 3000 Rated CT primary current
VTsec8 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim8 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
VTsec9 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim9 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
VTsec10 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim10 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
VTsec11 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim11 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
VTsec12 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim12 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage

Transformer protection RET670 83

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 3 1MRK 504 164-UEN Rev. N
Analog inputs

PID-3924-SETTINGS v7

Table 21: TRM_9I_3U Non group settings (basic)

Name Values (Range) Unit Step Default Description

CTStarPoint1 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec1 1 - 10 A 1 1 Rated CT secondary current
CTprim1 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint2 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec2 1 - 10 A 1 1 Rated CT secondary current
CTprim2 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint3 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec3 1 - 10 A 1 1 Rated CT secondary current
CTprim3 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint4 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec4 1 - 10 A 1 1 Rated CT secondary current
CTprim4 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint5 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec5 1 - 10 A 1 1 Rated CT secondary current
CTprim5 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint6 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec6 1 - 10 A 1 1 Rated CT secondary current
CTprim6 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint7 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec7 1 - 10 A 1 1 Rated CT secondary current
CTprim7 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint8 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec8 1 - 10 A 1 1 Rated CT secondary current
CTprim8 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint9 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec9 1 - 10 A 1 1 Rated CT secondary current
CTprim9 1 - 99999 A 1 3000 Rated CT primary current
VTsec10 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim10 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
VTsec11 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim11 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
VTsec12 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim12 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage

84 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 3
Analog inputs

PID-6598-SETTINGS v6

Table 22: TRM_10I_2U Non group settings (basic)

Name Values (Range) Unit Step Default Description

CTStarPoint1 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec1 1 - 10 A 1 1 Rated CT secondary current
CTprim1 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint2 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec2 1 - 10 A 1 1 Rated CT secondary current
CTprim2 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint3 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec3 1 - 10 A 1 1 Rated CT secondary current
CTprim3 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint4 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec4 1 - 10 A 1 1 Rated CT secondary current
CTprim4 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint5 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec5 1 - 10 A 1 1 Rated CT secondary current
CTprim5 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint6 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec6 1 - 10 A 1 1 Rated CT secondary current
CTprim6 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint7 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec7 1 - 10 A 1 1 Rated CT secondary current
CTprim7 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint8 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec8 1 - 10 A 1 1 Rated CT secondary current
CTprim8 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint9 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec9 1 - 10 A 1 1 Rated CT secondary current
CTprim9 1 - 99999 A 1 3000 Rated CT primary current
CTStarPoint10 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec10 1 - 10 A 1 1 Rated CT secondary current
CTprim10 1 - 99999 A 1 3000 Rated CT primary current
VTsec11 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim11 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
VTsec12 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim12 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage

Transformer protection RET670 85

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 3 1MRK 504 164-UEN Rev. N
Analog inputs

3.5 Monitored data

PID-6531-MONITOREDDATA v3

Table 23: AISVBAS Monitored data

Name Type Values (Range) Unit Description

Status INTEGER 0=Ok - Service value status
1=Error
2=AngRefLow
3=Uncorrelated

PID-3920-MONITOREDDATA v6

Table 24: TRM_12I Monitored data

Name Type Values (Range) Unit Description

STATUS BOOLEAN 0=Ok - Analogue input module status
1=Error

PID-3921-MONITOREDDATA v6

Table 25: TRM_6I_6U Monitored data

Name Type Values (Range) Unit Description

STATUS BOOLEAN 0=Ok - Analogue input module status
1=Error

PID-3922-MONITOREDDATA v6

Table 26: TRM_6I Monitored data

Name Type Values (Range) Unit Description

STATUS BOOLEAN 0=Ok - Analogue input module status
1=Error

PID-3923-MONITOREDDATA v6

Table 27: TRM_7I_5U Monitored data

Name Type Values (Range) Unit Description

STATUS BOOLEAN 0=Ok - Analogue input module status
1=Error

PID-3924-MONITOREDDATA v6

Table 28: TRM_9I_3U Monitored data

Name Type Values (Range) Unit Description

STATUS BOOLEAN 0=Ok - Analogue input module status
1=Error

PID-6598-MONITOREDDATA v6

Table 29: TRM_10I_2U Monitored data

Name Type Values (Range) Unit Description

STATUS BOOLEAN 0=Ok - Analogue input module status
1=Error

3.6 Operation principle SEMOD55028-5 v9

The direction of a measured current depends on the connection of the CT. The main CTs are typically
star connected and can be connected with the star point towards the object or away from the object.
This information must be set in the IED.

Once the CT direction settings is correctly entered the internal IED convention of the directionality is
defined as follows:

86 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 3
Analog inputs

• Positive value of current or power means that the quantity has the direction into the protected
object.
• Negative value of current or power means that the quantity has the direction out from the
protected object.

For directional functions the directional conventions are defined as follows (see Figure 5)

• Forward means the direction is into the object.

• Reverse means the direction is out from the object.

Definition of direction Definition of direction

for directional functions for directional functions
Reverse Forward Forward Reverse
Protected Object
Line, transformer, etc
e.g. P, Q, I e.g. P, Q, I
Measured quantity is Measured quantity is
positive when flowing positive when flowing
towards the object towards the object

Set parameter Set parameter

CTStarPoint CTStarPoint
Correct Setting is Correct Setting is
"ToObject" "FromObject"

en05000456.vsd
IEC05000456 V1 EN-US

Figure 5: Internal convention of the directionality in the IED

If the settings of the primary CT is correct, that is CTStarPoint set as FromObject or ToObject
according to the plant condition, then a positive quantity always flows towards the protected object,
and a Forward direction always looks towards the protected object.

The settings of the IED is performed in primary values. The ratios of the main CTs and VTs are,
therefore, basic data for the IED. The user has to set the rated secondary and primary currents and
voltages of the CTs and VTs to provide the IED with their rated ratios.

The CT and VT ratio and the name on respective channel is done under Main menu /Hardware /
Analog modules in the Parameter Settings tool or on the HMI.

3.7 Technical data SEMOD55412-1 v1

M16988-1 v11

Table 30: TRM - Energizing quantities, rated values and limits for protection transformer

Description Value
Frequency
Rated frequency fr 50/60 Hz

Operating range fr ± 10%

Current inputs
Rated current Ir 1 or 5 A

Operating range (0-100) x Ir

Thermal withstand 100 × Ir for 1 s *)

30 × Ir for 10 s
10 × Ir for 1 min
4 × Ir continuously

Table continues on next page

Transformer protection RET670 87

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 3 1MRK 504 164-UEN Rev. N
Analog inputs

Description Value
Dynamic withstand 250 × Ir one half wave

Burden < 20 mVA at Ir = 1 A

< 150 mVA at Ir = 5 A

*) max. 350 A for 1 s when COMBITEST test switch is included.

Voltage inputs **)
Rated voltage Ur 110 or 220 V

Operating range 0 - 340 V

Thermal withstand 450 V for 10 s
420 V continuously
Burden < 20 mVA at 110 V
< 80 mVA at 220 V
**) all values for individual voltage inputs
Note! All current and voltage data are specified as RMS values at rated frequency

Table 31: TRM - Energizing quantities, rated values and limits for measuring transformer

Description Value
Frequency
Rated frequency fr 50/60 Hz

Operating range fr ± 10%

Current inputs
Rated current Ir 1A 5A

Operating range (0-1.8) × Ir (0-1.6) × Ir

Thermal withstand 80 × Ir for 1 s 65 × Ir for 1 s

25 × Ir for 10 s 20 × Ir for 10 s
10 × Ir for 1 min 8 × Ir for 1 min
1.8 × Ir for 30 min 1.6 × Ir for 30 min
1.1 × Ir continuously 1.1 × Ir continuously

Burden < 200 mVA at Ir < 350 mVA at Ir

Voltage inputs *)
Rated voltage Ur 110 or 220 V

Operating range 0 - 340 V

Thermal withstand 450 V for 10 s
420 V continuously
Burden < 20 mVA at 110 V
< 80 mVA at 220 V
*) all values for individual voltage inputs
Note! All current and voltage data are specified as RMS values at rated frequency

SEMOD53376-2 v6

Table 32: CT and VT circuit connectors

Connector type Rated voltage and current Maximum conductor area

Screw compression type 250 V AC, 20 A 4 mm2 (AWG12)
2 x 2.5 mm2 (2 x AWG14)
Terminal blocks suitable for ring lug terminals 250 V AC, 20 A 4 mm 2 (AWG12)

88 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 4
Binary input and output modules

Section 4 Binary input and output modules

4.1 Binary input

4.1.1 Binary input debounce filter GUID-AE43976C-E966-484C-AF39-89B2B12F56DC v5

The debounce filter eliminates bounces and short disturbances on a binary input.

A time counter is used for filtering. The time counter is increased once in a millisecond when a binary
input is high, or decreased when a binary input is low. A new debounced binary input signal is
forwarded when the time counter reaches the set DebounceTime value and the debounced input
value is high or when the time counter reaches 0 and the debounced input value is low. The default
setting of DebounceTime is 1 ms.

The binary input ON-event gets the time stamp of the first rising edge, after which the counter does
not reach 0 again. The same happens when the signal goes down to 0 again.

4.1.2 Oscillation filter GUID-41B89E6F-50C3-44BF-9171-3CC82EB5CA15 v5

Binary input wiring can be very long in substations and there are electromagnetic fields from for
example nearby breakers. An oscillation filter is used to reduce the disturbance from the system
when a binary input starts oscillating.

An oscillation counter counts the debounced signal state changes during 1 s. If the counter value is
greater than the set value OscBlock, the input signal is blocked. The input signal is ignored until the
oscillation counter value during 1 s is below the set value OscRelease.

4.1.3 Settings
GUID-07348953-4A72-444B-A31A-030ABEA8E0C4 v1

OscBlock must always be set to a value greater than OscRelease. If this is not done,
oscillation detection will not function correctly, and the resulting behaviour will be
undefined.

4.1.3.1 Setting parameters for binary input modules

PID-3473-SETTINGS v2

Table 33: BIM Non group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - On Operation Off/On
On
DebounceTime 0.001 - 0.020 s 0.001 0.001 Debounce time for binary inputs
OscBlock 1 - 40 Hz 1 40 Oscillation block limit
OscRelease 1 - 30 Hz 1 30 Oscillation release limit

Transformer protection RET670 89

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 4 1MRK 504 164-UEN Rev. N
Binary input and output modules

4.1.3.2 Setting parameters for binary input/output module

PID-4050-SETTINGS v2

Table 34: IOMIN Non group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - On Binary input/output module in operation
On (On) or not (Off)
DebounceTime 0.001 - 0.020 s 0.001 0.001 Debounce time for binary inputs
OscBlock 1 - 40 Hz 1 40 Oscillation block limit
OscRelease 1 - 30 Hz 1 30 Oscillation release limit

90 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 5
Local Human-Machine-Interface LHMI

Section 5 Local Human-Machine-Interface LHMI

5.1 Local HMI screen behaviour

5.1.1 Identification
GUID-84392EFF-4D3F-4A67-A6ED-34C6E98574D6 v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Local HMI screen behaviour SCREEN - -

5.1.2 Settings
PID-7235-SETTINGS v1

Table 35: SCREEN Non group settings (basic)

Name Values (Range) Unit Step Default Description

DisplayTimeout 1 - 120 Min 1 10 Local HMI display timeout
ContrastLevel -100 - 100 % 10 0 Contrast level for display
DefaultScreen - 0 Default screen
EvListSrtOrder Latest on top - - Latest on top Sort order of event list
Oldest on top
AutoIndicationDRP Off - - Off Automatic indication of disturbance
On report
SubstIndSLD No - - No Substitute indication on single line
Yes diagram
InterlockIndSLD No - - No Interlock indication on single line
Yes diagram
BypassCommands No - - No Enable bypass of commands
Yes

5.2 Local HMI signals

5.2.1 Identification
GUID-03AB7AEE-87D3-4F3C-B6B9-B1EB1B538E38 v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Local HMI signals LHMICTRL - -

5.2.2 Function block GUID-A8AC51E9-5BD7-4A80-9576-4816F14DD08D v2

Transformer protection RET670 91

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 5 1MRK 504 164-UEN Rev. N
Local Human-Machine-Interface LHMI

LHMICTRL
CLRLEDS HMI-ON
RED-S
YELLOW-S
YELLOW-F
CLRPULSE
LEDSCLRD

IEC09000320-1-en.vsd
IEC09000320 V1 EN-US

Figure 6: LHMICTRL function block

5.2.3 Signals
PID-3992-INPUTSIGNALS v6

Table 36: LHMICTRL Input signals

Name Type Default Description

CLRLEDS BOOLEAN 0 Input to clear the LCD-HMI LEDs

PID-3992-OUTPUTSIGNALS v6

Table 37: LHMICTRL Output signals

Name Type Description

HMI-ON BOOLEAN Backlight of the LCD display is active
RED-S BOOLEAN Red LED on the LCD-HMI is steady
YELLOW-S BOOLEAN Yellow LED on the LCD-HMI is steady
YELLOW-F BOOLEAN Yellow LED on the LCD-HMI is flashing
CLRPULSE BOOLEAN A pulse is provided when the LEDs on the LCD-HMI are cleared
LEDSCLRD BOOLEAN Active when the LEDs on the LCD-HMI are not active

5.3 Basic part for LED indication module

5.3.1 Identification
GUID-6E36C0BC-F284-4C88-A4A8-9535D3BE8B14 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Basic part for LED indication module LEDGEN - -
Basic part for LED indication HW GRP1_LED1 - - -
module GRP1_LED15

GRP2_LED1 -
GRP2_LED15

GRP3_LED1 -
GRP3_LED15

5.3.2 Function block GUID-BDB5797F-F27E-4FEE-9FDB-1C9E2F572BB6 v3

LEDGEN
BLOCK NEWIND
RESET ACK

IEC09000321-1-en.vsd
IEC09000321 V1 EN-US

Figure 7: LEDGEN function block

92 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 5
Local Human-Machine-Interface LHMI

GRP1_LED1
^HM1L01R
^HM1L01Y
^HM1L01G
IEC09000322 V1 EN-US

Figure 8: GRP1_LED1 function block

The GRP1_LED1 function block is an example. The 15 LEDs in each of the three groups have a
similar function block.

5.3.3 Signals
PID-4114-INPUTSIGNALS v5

Table 38: LEDGEN Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Input to block the operation of the LEDs
RESET BOOLEAN 0 Input to acknowledge/reset the indication LEDs

PID-4114-OUTPUTSIGNALS v5

Table 39: LEDGEN Output signals

Name Type Description

NEWIND BOOLEAN New indication signal if any LED indication input is set
ACK BOOLEAN A pulse is provided when the LEDs are acknowledged

PID-1697-INPUTSIGNALS v18

Table 40: GRP1_LED1 Input signals

Name Type Default Description

HM1L01R BOOLEAN 0 Red indication of LED1, local HMI alarm group 1
HM1L01Y BOOLEAN 0 Yellow indication of LED1, local HMI alarm group 1
HM1L01G BOOLEAN 0 Green indication of LED1, local HMI alarm group 1

5.3.4 Settings
PID-4114-SETTINGS v6

Table 41: LEDGEN Non group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - On Operation Off/On
On
tRestart 0.0 - 100.0 s 0.1 0.0 Defines the disturbance length
tMax 0.1 - 100.0 s 0.1 1.0 Maximum time for the definition of a
disturbance

Transformer protection RET670 93

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 5 1MRK 504 164-UEN Rev. N
Local Human-Machine-Interface LHMI

PID-1697-SETTINGS v18

Table 42: GRP1_LED1 Non group settings (basic)

Name Values (Range) Unit Step Default Description

SequenceType Follow-S - - Follow-S Sequence type for LED 1, local HMI
Follow-F alarm group 1
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
LabelOff 0 - 18 - 1 G1L01_OFF Label string shown when LED 1, alarm
group 1 is off
LabelRed 0 - 18 - 1 G1L01_RED Label string shown when LED 1, alarm
group 1 is red
LabelYellow 0 - 18 - 1 G1L01_YELLOW Label string shown when LED 1, alarm
group 1 is yellow
LabelGreen 0 - 18 - 1 G1L01_GREEN Label string shown when LED 1, alarm
group 1 is green

5.4 LCD part for HMI function keys control module GUID-EECAE7FA-7078-472C-A429-F7607DB884EB v2

5.4.1 Identification
GUID-E6611022-5EA3-420D-ADCD-9D1E7604EFEB v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
LCD part for HMI Function Keys FNKEYMD1 - - -
Control module FNKEYMD5

5.4.2 Function block

GUID-A803A728-5CFC-4606-98E4-793E873B99D4 v3

FNKEYMD1
ENABLE ^FKEYOUT1
^LEDCTL1

IEC09000327 V2 EN-US

Figure 9: FNKEYMD1 function block

Only the function block for the first button is shown above. There is a similar block for every function
key button.

5.4.3 Signals
PID-7424-INPUTSIGNALS v1

Table 43: FNKEYMD1 Input signals

Name Type Default Description

ENABLE BOOLEAN 1 Enable input for function key
LEDCTL1 BOOLEAN 0 LED control input for function key

PID-7424-OUTPUTSIGNALS v1

Table 44: FNKEYMD1 Output signals

Name Type Description

FKEYOUT1 BOOLEAN Output controlled by function key

94 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 5
Local Human-Machine-Interface LHMI

5.4.4 Settings
PID-7424-SETTINGS v1

Table 45: FNKEYMD1 Non group settings (basic)

Name Values (Range) Unit Step Default Description

Mode Off - - Off Output operation mode
Toggle
Pulsed
PulseTime 0.001 - 60.000 s 0.001 0.200 Pulse time for output controlled by
LCDFn1
LabelOn 0 - 18 - 1 LCD_FN1_ON Label for LED on state
LabelOff 0 - 18 - 1 LCD_FN1_OFF Label for LED off state
ReqAuthority Off - - On User authorization needed for function
On key operation

PID-7606-SETTINGS v1

Table 46: FNKEYTY1 Non group settings (basic)

Name Values (Range) Unit Step Default Description

Type Off - - Off Function key type
Menu shortcut
Control
MenuShortcut - 0 Menu shortcut for function key

GUID-BCE87D54-C836-40EE-8DA7-779B767059AB v2

For setting ReqAuthority, when users are configured through local or central account
management, the default behavior of the function keys are to only operate if a user is
logged in, and the user have the required rights. This authentication check can be
configured to be bypassed per function key by changing the ReqAuthority from ON
to OFF. To be able to change this, the user changing it have to have the Security
advanced right.

MenuShortcut values are product dependent and created dynamically depending on the product
main menu.

Transformer protection RET670 95

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 5 1MRK 504 164-UEN Rev. N
Local Human-Machine-Interface LHMI

5.5 Operation principle

5.5.1 Local HMI AMU0600442 v15

IEC13000239-3-en.vsd
IEC13000239 V3 EN-US

Figure 10: Local human-machine interface

The LHMI of the IED contains the following elements

• Keypad
• Display (LCD)
• LED indicators
• Communication port for PCM600

The LHMI is used for setting, monitoring and controlling.

96 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 5
Local Human-Machine-Interface LHMI

5.5.1.1 Keypad AMU0600428 v19

The LHMI keypad contains push-buttons which are used to navigate in different views or menus. The
push-buttons are also used to acknowledge alarms, reset indications, provide help and switch
between local and remote control mode.

The keypad also contains programmable push-buttons that can be configured either as menu
shortcut or control buttons.

Transformer protection RET670 97

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 5 1MRK 504 164-UEN Rev. N
Local Human-Machine-Interface LHMI

24

1
23
2
18
3

19
4

6 20

21

7 22

8 9 10 11 12 13 14 15 16 17

IEC15000157-2-en.vsd

IEC15000157 V2 EN-US

Figure 11: LHMI keypad with object control, navigation and command push-buttons and
RJ-45 communication port

1...5 Function button

6 Close
7 Open
8 Escape
9 Left
10 Down
11 Up
12 Right
13 Key
14 Enter
15 Remote/Local
16 Uplink LED
17 Not in use
18 Multipage
19 Menu
20 Clear
21 Help

98 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 5
Local Human-Machine-Interface LHMI

22 Communication port
23 Programmable indication LEDs
24 IED status LEDs

5.5.1.2 Display GUID-55739D4F-1DA5-4112-B5C7-217AAF360EA5 v13

The LHMI includes a graphical monochrome liquid crystal display (LCD) with a resolution of 320 x
240 pixels. The character size can vary. The amount of characters and rows fitting the view depends
on the character size and the view that is shown.

The display view is divided into four basic areas.

IEC15000270-1-en.vsdx

IEC15000270 V1 EN-US

Figure 12: Display layout

1 Path
2 Content
3 Status
4 Scroll bar (appears when needed)

• The path shows the current location in the menu structure. If the path is too long to be shown, it
is truncated from the beginning, and the truncation is indicated with three dots.
• The content area shows the menu content.
• The status area shows the current IED time, the user that is currently logged in and the object
identification string which is settable via the LHMI or with PCM600.
• If text, pictures or other items do not fit in the display, a vertical scroll bar appears on the right.
The text in content area is truncated from the beginning if it does not fit in the display
horizontally. Truncation is indicated with three dots.

Transformer protection RET670 99

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 5 1MRK 504 164-UEN Rev. N
Local Human-Machine-Interface LHMI

IEC15000138-1-en.vsdx

IEC15000138 V1 EN-US

Figure 13: Truncated path

The number after : (colon sign) at the end of the function instance, for example, 1 in SMAI1:1,
indicates the number of that function instance.

The function key button panel shows on request what actions are possible with the function buttons.
Each function button has a LED indication that can be used as a feedback signal for the function
button control action. The LED is connected to the required signal with PCM600.

IEC13000281-1-en.vsd
GUID-C98D972D-D1D8-4734-B419-161DBC0DC97B V1 EN-US

Figure 14: Function button panel

The indication LED panel shows on request the alarm text labels for the indication LEDs. Three
indication LED pages are available.

100 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 5
Local Human-Machine-Interface LHMI

IEC13000240-1-en.vsd
GUID-5157100F-E8C0-4FAB-B979-FD4A971475E3 V1 EN-US

Figure 15: Indication LED panel

The function button and indication LED panels are not visible at the same time. Each panel is shown
by pressing one of the function buttons or the Multipage button. Pressing the ESC button clears the
panel from the display. Both panels have a dynamic width that depends on the label string length.

5.5.1.3 LEDs AMU0600427 v15

The LHMI includes three status LEDs above the display: Ready, Start and Trip.

There are 15 programmable indication LEDs on the front of the LHMI. Each LED can indicate three
states with the colors: green, yellow and red. The texts related to each three-color LED are divided
into three panels.

There are 3 separate panels of LEDs available. The 15 physical three-color LEDs in one LED group
can indicate 45 different signals. Altogether, 135 signals can be indicated since there are three LED
groups. The LEDs are lit according to priority, with red being the highest and green the lowest priority.
For example, if on one panel there is an indication that requires the green LED to be lit, and on
another panel there is an indication that requires the red LED to be lit, the red LED takes priority and
is lit. The LEDs can be configured with PCM600 and the operation mode can be selected with the
LHMI or PCM600.

Information panels for the indication LEDs are shown by pressing the Multipage button. Pressing that
button cycles through the three pages. A lit or un-acknowledged LED is indicated with a highlight.
Such lines can be selected by using the Up/Down arrow buttons. Pressing the Enter key shows
details about the selected LED. Pressing the ESC button exits from information pop-ups as well as
from the LED panel as such.

The Multipage button has a LED. This LED is lit whenever any LED on any panel is lit. If there are
un-acknowledged indication LEDs, then the Multipage LED blinks. To acknowledge LEDs, press the
Clear button to enter the Reset menu (refer to description of this menu for details).

There are two additional LEDs which are next to the control buttons and . These LEDs can
indicate the status of two arbitrary binary signals by configuring the OPENCLOSE_LED function
block. For instance, OPENCLOSE_LED can be connected to a circuit breaker to indicate the breaker
open/close status on the LEDs.

Transformer protection RET670 101

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 5 1MRK 504 164-UEN Rev. N
Local Human-Machine-Interface LHMI

IEC16000076-1-en.vsd
IEC16000076 V1 EN-US

Figure 16: OPENCLOSE_LED connected to SXCBR

5.5.2 LED configuration alternatives

5.5.2.1 Functionality GUID-1A03E0EF-C10F-4797-9D9F-5CCA86CA29EB v5

The function blocks LEDGEN and GRP1_LEDx, GRP2_LEDx and GRP3_LEDx (x=1-15) controls
and supplies information about the status of the indication LEDs. The input and output signals of the
function blocks are configured with PCM600. The input signal for each LED is selected individually
using SMT or ACT. Each LED is controlled by the GRPn_LEDx (n=1-3) function block that controls
the color and the operating mode.

Each indication LED on local HMI can be set individually to operate in 6 different sequences; two as
follow type and four as latch type. Two of the latching sequence types are intended to be used as a
protection indication system, either in collecting or restarting mode, with reset functionality. The other
two are intended to be used as signalling system in collecting mode with acknowledgment
functionality.

5.5.2.2 Status LEDs GUID-4822DF9C-E343-442B-B3F1-3FA8CD8DF234 v4

There are three status LEDs above the LCD in front of the IED: green, yellow and red.

The green LED has a fixed function that presents the healthy status of the IED. The yellow and red
LEDs are user configured. The yellow LED can be used to indicate that a disturbance report is
triggered (steady) or that the IED is in test mode (flashing). The red LED can be used to indicate a
trip command.

Here is a typical configuration of the status LEDs:

• Green LED: unlit > no power; blinking > startup or abnormal situation (IED is not in service);
steady > IED is in service
• Yellow LED: unlit > no attention required; blinking > IED is in Testmode (IED is not in normal
service); steady > at least one of the signals configured to turn the yellow LED on has been
active
• Red LED: unlit > no attention required; blinking > user performs a common write from PCM600;
steady > at least one of the signals configured to turn the red LED on has been active

The yellow and red status LEDs are configured in the disturbance recorder function, DRPRDRE, by
connecting a start or trip signal from the actual function to a BxRBDR binary input function block
using the PCM600, and configuring the setting to Off, Start or Trip for that particular signal.

102 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 5
Local Human-Machine-Interface LHMI

5.5.2.3 Indication LEDs

Operating modes GUID-B67F1ED3-900B-4D34-8EEB-A3005999CE50 v4

Collecting mode

• LEDs that are used in the collecting mode of operation are accumulated continuously until the
unit is acknowledged manually. This mode is suitable when the LEDs are used as a simplified
alarm system. When all three inputs (red, yellow and green) are connected to different sources
of events for the same function block, collecting mode shows the highest priority LED color that
was activated since the latest acknowledgment was made. If a number of different indications
were made since the latest acknowledgment, it is not possible to get a clear view of what
triggered the latest event without looking at the sequence of events list. A condition for getting
the sequence of events is that the signals have been engineered in the disturbance recorder.

Re-starting mode

• In the re-starting mode of operation each new start resets all previous active LEDs and activates
only those which appear during one disturbance. Only LEDs defined for re-starting mode with
the latched sequence type 6 (LatchedReset-S) will initiate a reset and a restart at a new
disturbance. A disturbance is defined to end a settable time after the reset of the activated input
signals or when the maximum time limit has elapsed. In sequence 6, the restarting or reset
mode means that upon occurrence of any new event, all previous indications will be reset. This
facilitates that only the LED indications related to the latest event is shown.

Acknowledgment/reset GUID-E6727E8F-C28B-4295-AE21-BC5643363805 v3

• From local HMI

• The active LED indications can be acknowledged/reset manually. Manual
acknowledgment and manual reset have the same meaning and is a common signal for all
the operating sequences and LEDs. The function is positive edge triggered, not level
triggered. The acknowledgment/reset is performed via the button and menus on the
LHMI.

• From function input

• The active LED indications can also be acknowledged/reset via an input, CLRLEDS, to
the function block LHMICTRL. This input can for example be configured to a binary input
operated from an external push button or a function button. The function is positive edge
triggered, not level triggered. This means that even if the button is continuously pressed,
the acknowledgment/reset only affects indications active at the moment when the button is
first pressed.

• Automatic reset
• The automatic reset can only be performed for LED indications defined for re-starting
mode with the latched sequence type 6 (LatchedReset-S). When the automatic reset of
the LEDs has been performed, still persisting indications will be indicated with a steady
light.

Operating sequence GUID-DFCA880B-308C-4334-94DF-97C7765E8C13 v5

The sequences can be of type Follow or Latched. For the Follow type, the LED follows the input
signal completely. For the Latched type, each LED latches to the corresponding input signal until it is
reset.

The figures below show the function of available sequences selectable for each LED separately. The
following 6 sequences are available:

Transformer protection RET670 103

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 5 1MRK 504 164-UEN Rev. N
Local Human-Machine-Interface LHMI

• Sequence 1: Follow-S
• Sequence 2: Follow-F
• Sequence 3: LatchedAck-F-S
• Sequence 4: LatchedAck-S-F
• Sequence 5: LatchedColl-S
• Sequence 6: LatchedReset-S

For sequence 1 and 2, which are of the Follow type, the acknowledgment (Ack ) /reset function is not
applicable because the indication shown by the LED follows its input signal. Sequence 3 and 4,
which are of the Latched type with acknowledgement, are only working in collecting (Coll) mode.
Sequence 5 is working according to Latched type and collecting mode while Sequence 6 is working
according to Latched type and re-starting (Reset) mode. The letters S and F in the sequence names
have the meaning S = Steady and F = Flash.

At the activation of the input signal to any LED, the indication on the corresponding LED obtains a
color that corresponds to the activated input, and operates according to the selected sequence
diagrams shown below.

In the sequence diagrams the different statuses of the LEDs are shown using the following symbols:

= No indication = Steady light = Flash

G= Green Y= Yellow R= Red

IEC09000311.vsd
IEC09000311 V1 EN-US

Figure 17: Symbols used in the sequence diagrams

Sequence 1 (Follow-S) SEMOD56072-39 v4

This sequence follows the corresponding input signals all the time with a steady light. It does not
react on acknowledgment or reset. Every LED is independent of the other LEDs in its operation.

Activating
signal

LED

IEC01000228_2_en.vsd
IEC01000228 V2 EN-US

Figure 18: Operating Sequence 1 (Follow-S)

GUID-107FE952-3B4C-4C01-831A-3147E652327C v4
If inputs for two or more colors are active at the same time to the same LED, the priority color it
shows is in accordance with the color described above. An example of the operation when two colors
are activated in parallel to the same LED is shown in figure19.

Activating
signal GREEN

Activating
signal RED

LED G G R G

IEC09000312_1_en.vsd
IEC09000312 V1 EN-US

Figure 19: Operating sequence 1, two colors

104 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 5
Local Human-Machine-Interface LHMI

Sequence 2 (Follow-F) SEMOD56072-47 v2

This sequence is the same as Sequence 1, Follow-S, but the LEDs are flashing instead of showing
steady light.

Sequence 3 LatchedAck-F-S SEMOD56072-50 v2

This sequence has a latched function and works in collecting mode. Every LED is independent of the
other LEDs in its operation. At the activation of the input signal, the indication starts flashing. After
acknowledgment the indication disappears if the signal is not present any more. If the signal is still
present after acknowledgment it gets a steady light.

Activating
signal

LED

Acknow.
en01000231.vsd
IEC01000231 V1 EN-US

Figure 20: Operating Sequence 3 LatchedAck-F-S

GUID-CC607709-5344-4C88-AA97-6395FD335E55 v5

The sequence described below is valid only if the same function block is used for all
three colour LEDs.

When an acknowledgment is performed, all indications that appear before the indication with higher
priority has been reset, will be acknowledged, independent of if the low priority indication appeared
before or after acknowledgment. In figure 21 it is shown the sequence when a signal of lower priority
becomes activated after acknowledgment has been performed on a higher priority signal. The low
priority signal will be shown as acknowledged when the high priority signal resets.

Activating
signal GREEN

Activating
signal RED

R R G
LED

Acknow
IEC09000313_1_en.vsd
IEC09000313 V1 EN-US

Figure 21: Operating Sequence 3 (LatchedAck-F-S), 2 colors involved

GUID-A652A49D-F016-472D-8D38-6D3E75DAB1DB v3
If all three signals are activated the order of priority is still maintained. Acknowledgment of indications
with higher priority will acknowledge also low priority indications, which are not visible according to
figure 22.

Transformer protection RET670 105

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 5 1MRK 504 164-UEN Rev. N
Local Human-Machine-Interface LHMI

Activating
signal GREEN

Activating
signal YELLOW
Activating
signal RED

LED G Y R R Y

Acknow.
IEC09000314-1-en.vsd
IEC09000314 V1 EN-US

Figure 22: Operating sequence 3, three colors involved, alternative 1

GUID-071B9EB5-A1D2-49C5-9458-4D21B7E068BE v3
If an indication with higher priority appears after acknowledgment of a lower priority indication the
high priority indication will be shown as not acknowledged according to figure 23.

Activating
signal GREEN

Activating
signal YELLOW
Activating
signal RED

LED G G R R Y

Acknow.
IEC09000315-1-en.vsd
IEC09000315 V1 EN-US

Figure 23: Operating sequence 3, three colors involved, alternative 2

Sequence 4 (LatchedAck-S-F) SEMOD56072-64 v1

This sequence has the same functionality as sequence 3, but steady and flashing light have been
alternated.

Sequence 5 LatchedColl-S SEMOD56072-67 v4

This sequence has a latched function and works in collecting mode. At the activation of the input
signal, the indication will light up with a steady light. The difference to sequence 3 and 4 is that
indications that are still activated will not be affected by the reset that is, immediately after the
positive edge of the reset has been executed a new reading and storing of active signals is
performed. Every LED is independent of the other LEDs in its operation.

106 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 5
Local Human-Machine-Interface LHMI

Activating
signal

LED

Reset

IEC01000235_2_en.vsd
IEC01000235 V2 EN-US

Figure 24: Operating Sequence 5 LatchedColl-S

GUID-4D52D221-F54F-4966-95B1-6ED6C536CEC9 v3
That means if an indication with higher priority has reset while an indication with lower priority still is
active at the time of reset, the LED will change color according to figure25.

Activating
signal GREEN

Activating
signal RED

R G
LED

Reset
IEC09000316_1_en.vsd
IEC09000316 V1 EN-US

Figure 25: Operating sequence 5, two colors

Sequence 6 LatchedReset-S SEMOD56072-75 v4

In this mode all activated LEDs, which are set to Sequence 6 (LatchedReset-S), are automatically
reset at a new disturbance when activating any input signal for other LEDs set to Sequence 6
LatchedReset-S. Also in this case indications that are still activated will not be affected by manual
reset, that is, immediately after the positive edge of that the manual reset has been executed a new
reading and storing of active signals is performed. LEDs set for sequence 6 are completely
independent in its operation of LEDs set for other sequences.

Timing diagram for sequence 6 SEMOD56072-86 v4

Figure 26 shows the timing diagram for two indications within one disturbance.

Transformer protection RET670 107

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 5 1MRK 504 164-UEN Rev. N
Local Human-Machine-Interface LHMI

Disturbance
tRestart

Activating
signal 1

Activating
signal 2

LED 1

LED 2

Automatic
reset

Manual
reset
IEC01000239_2-en.vsd
IEC01000239 V2 EN-US

Figure 26: Operating sequence 6 (LatchedReset-S), two indications within same disturbance
Figure 27 shows the timing diagram for a new indication after tRestart time has elapsed.

Disturbance Disturbance

tRestart tRestart

Activating
signal 1

Activating
signal 2

LED 1

LED 2

Automatic
reset

Manual
reset
IEC01000240_2_en.vsd
IEC01000240 V2 EN-US

Figure 27: Operating sequence 6 (LatchedReset-S), two different disturbances

Figure 28 shows the timing diagram when a new indication appears after the first one has reset but
before tRestart has elapsed.

108 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 5
Local Human-Machine-Interface LHMI

Disturbance

tRestart

Activating
signal 1

Activating
signal 2

LED 1

LED 2

Automatic
reset

Manual
reset
IEC01000241_2_en.vsd
IEC01000241 V2 EN-US

Figure 28: Operating sequence 6 (LatchedReset-S), two indications within same disturbance
but with reset of activating signal between
Figure 29 shows the timing diagram for manual reset.

Disturbance

tRestart

Activating
signal 1

Activating
signal 2

LED 1

LED 2

Automatic
reset

Manual
reset
IEC01000242_2_en.vsd
IEC01000242 V2 EN-US

Figure 29: Operating sequence 6 (LatchedReset-S), manual reset

Transformer protection RET670 109

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 5 1MRK 504 164-UEN Rev. N
Local Human-Machine-Interface LHMI

5.5.3 Function keys

5.5.3.1 Functionality GUID-BED38E9A-C90D-4B7F-AA20-42821C4F6A1C v3

Local Human-Machine-Interface (LHMI) has five function buttons, directly to the left of the LCD, that
can be configured either as menu shortcut or control buttons. Each button has an indication LED that
can be configured in the application configuration.

When used as a menu shortcut, a function button provides a fast way to navigate between default
nodes in the menu tree. When used as a control, the button can control a binary signal.

5.5.3.2 Operation principle GUID-977C3829-B19B-457E-8A4D-45317226EF22 v3

Each output on the FNKEYMD1 - FNKEYMD5 function blocks can be controlled from the LHMI
function keys. By pressing a function button on the LHMI, the output status of the actual function
block will change. These binary outputs can in turn be used to control other function blocks, for
example, switch control blocks, binary I/O outputs etc.

FNKEYMD1 - FNKEYMD5 function block also has a number of settings and parameters that control
the behavior of the function block. These settings and parameters are normally set using the PST.

Operating sequence GUID-84CA7C61-4F83-4F86-A07F-BF9EC4E309BF v5

The operation mode is set individually for each output, either OFF, TOGGLE or PULSED.

Setting OFF

This mode always sets the outputs to a low value (0).

Input value

Output value

IEC09000330-2-en.vsd

IEC09000330 V2 EN-US

Figure 30: Sequence diagram for setting OFF

Setting TOGGLE

In this mode the output toggles each time the function key has been pressed for more than 500ms.
Note that the input attribute is reset each time the function block executes. The function block
execution is marked with a dotted line below.

Input value
500ms 500ms 500ms

Output value

IEC09000331_1_en.vsd

IEC09000331 V2 EN-US

Figure 31: Sequence diagram for setting TOGGLE

Setting PULSED

110 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 5
Local Human-Machine-Interface LHMI

In this mode the output sets high (1) when the function key has been pressed for more than 500ms
and remains high according to set pulse time. After this time the output will go back to 0. The input
attribute is reset when the function block detects it being high and there is no output pulse.

Note that the third positive edge on the input attribute does not cause a pulse, since the edge was
applied during pulse output. A new pulse can only begin when the output is zero; else the trigger
edge is lost.

Input value
500ms 500ms 500ms 500ms

pulse time pulse time pulse time

Output value

IEC09000332_2_en.vsd

IEC09000332 V2 EN-US

Figure 32: Sequence diagram for setting PULSED

Input function GUID-8EA4AE21-7A74-403A-84AE-D5CEF9292A63 v2

All function keys work the same way: When the LHMI is configured so that a certain function button is
of type CONTROL, then the corresponding input on this function block becomes active, and will light
the yellow function button LED when high. This functionality is active even if the function block
operation setting is set to off. It has been implemented this way for safety reasons; the idea is that
the function key LEDs should always reflect the actual status of any primary equipment monitored by
these LEDs.

5.5.3.3 Enabling and Disabling Authority on Function keys GUID-27413370-00F4-477D-886F-30359C788B55 v1

When users are configured through local or central account management, the default behavior of the
function keys are to only operate if a user is logged in, and the user have the required rights. This
authentication check can be configured to be bypassed per function key by changing the
ReqAuthority from ON to OFF. To be able to change this, the user changing it have to have the
Security advanced right.

Authority can be disabled using parameter Authority. Each function key has the parameter Authority,
which can be enabled or disabled using LHMI or PCM 600. User must have Security Advanced rights
to configure the Authority parameter of the function key.

The possible values for the Authority parameter are as below:

• Enabled: Requires authentication

• Disabled: No user authentication

If there is no User Account Management or Central Account Management configured

in the IED then this parameter has no effect and the function key can be operated
without any authentication.

Transformer protection RET670 111

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
112
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

Section 6 Wide area measurement system

6.1 IEC/IEEE 60255-118 (C37.118) Phasor Measurement
Data Streaming Protocol Configuration PMUCONF GUID-747C6AD7-E6A1-466E-92D1-68865681F92F v2

6.1.1 Identification
GUID-1E140EA0-D198-443A-B445-47CEFD2E6134 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Configuration parameters for IEEE PMUCONF - -
1344 and IEC/IEEE 60255-118.1–2011
protocol

6.1.2 Functionality GUID-33694C62-A109-4D8F-9063-CEFA5D0E78BC v5

The IED supports the following IEEE synchrophasor standards:

• IEEE 1344-1995 (Both measurements and data communication)

• IEEE Std IEC/IEEE 60255-118 (C37.118) (Both measurements and data communication)
• IEEE Std IEC/IEEE 60255-118 (C37.118) and IEC/IEEE 60255-118 (C37.118).1a-2014
(Measurements)
• IEEE Std IEC/IEEE 60255-118 (C37.118) (Data communication)

PMUCONF contains the PMU configuration parameters for both IEC/IEEE 60255-118 (C37.118) and
IEEE 1344 protocols. This means all the required settings and parameters in order to establish and
define a number of TCP and/or UDP connections with one or more PDC clients (synchrophasor
client). This includes port numbers, TCP/UDP IP addresses, and specific settings for IEC/IEEE
60255-118 (C37.118) as well as IEEE 1344 protocols.

6.1.3 Operation principle GUID-2608FBC4-9036-476A-942B-13452019BC11 v2

The Figure 33 demonstrates the communication configuration diagram. As can be seen, the IED can
support communication with maximum 8 TCP clients and 6 UDP client groups, simultaneously. Every
client can communicate with only one instance of the two available PMUREPORT function block
instances at a time. It means that one client cannot communicate with both PMUREPORT:1 and
PMUREPORT:2 at the same time. However, multiple clients can communicate with the same
instance of PMUREPORT function block at the same time. For TCP clients, each client can decide to
communicate with an existing instance of PMUREPORT by knowing the corresponding PMU ID for
that PMUREPORT instance. Whereas, for UDP clients, the PMUREPORT instance for each UDP
channel is defined by the user in the PMU and the client has to know the PMU ID corresponding to
that instance in order to be able to communicate. More information is available in the sections Short
guidance for the use of TCP and Short guidance for the use of UDP.

Transformer protection RET670 113

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

IED
PMU ID

1344/C37.118
PMUREPORT: 1 PMUREPORT: 2 TCP Client_1
1344/C37.118
TCP Client_2
1344/C37.118
TCP Client_3
PMU ID: X
1344/C37.118
TCP IP TCP Client_4
PMU ID: Y 1344/C37.118
TCP Port TCP Client_5
1344/C37.118 TCP Client_6
1344/C37.118 TCP Client_7
1344/C37.118 TCP Client_8

PMU ID

PMUREPORT Instance: 1 or 2 1344/C37.118

UDP 1 Unicast/Multicast
UDP Client Group_1

PMUREPORT Instance: 1 or 2 1344/C37.118

UDP 2 Unicast/Multicast
UDP Client Group_2

PMUREPORT Instance: 1 or 2 1344/C37.118

UDP 3 Unicast/Multicast
UDP Client Group_3

PMUREPORT Instance: 1 or 2 1344/C37.118

UDP 4 Unicast/Multicast
UDP Client Group_4

PMUREPORT Instance: 1 or 2 1344/C37.118

UDP 5 Unicast/Multicast
UDP Client Group_5

PMUREPORT Instance: 1 or 2 1344/C37.118

UDP 6 Unicast/Multicast
UDP Client Group_6

IEC140000117-1.en.vsd
IEC140000117 V2 EN-US

Figure 33: The communication configuration (PMUCONF) structure in the IED

6.1.3.1 IEEE C37.118 Message Framework GUID-B8CC9D53-1CC5-43CC-9AF0-9B4D8CDC1922 v2

Four message types are defined in IEEE C37.118 standard: data, configuration, header, and
command frames. The first three message types are transmitted from the PMU/PDC that serves as
the data source, and the last one (command frame) is received by the PMU/PDC.

These four message types are defined in IEEE C37.118 standard as follows:

• Data messages are the measurements made by a PMU.

• Configuration is a machine-readable message describing the data types, calibration factors, and
other metadata for the data that the PMU/PDC sends.
• Header information is human readable descriptive information sent from the PMU/PDC but
provided by the user.

There is a default header file, named "ieee1344header.txt", located in the "tools" folder in the IED.
The user is allowed to access and update this text file and write it back to the IED using a FTP client
(e.g. Filezilla).

If the user-defined (updated) header file is larger than 1400 bytes, then it will be truncated to 1400
bytes in both IEEE C37.118 and IEEE1344 protocols.

Both PMU reporting instances are using the same header file (ieee1344header.txt) and this header
file is used for both IEEE C37.118 and IEEE1344 protocols.

• Commands are machine-readable codes sent to the PMU/PDC for control or configuration.

6.1.3.2 Short guidance for use of TCP GUID-700B2618-3719-4C17-A1F8-3B8F5834FE95 v3

Port 7001 is used by the SPA on TCP/IP (field service tool). If the port is used for any
other protocol, for example C37.118, the SPA on TCP/IP stops working.

114 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

The IED supports 8 concurrent TCP connections using IEEE1344 and/or C37.118 protocol. The
following parameters are used to define the TCP connection between the IED and the TCP clients:

1. 1344TCPport– TCP port for control of IEEE 1344 data for TCP clients
2. C37.118TCPport – TCP port for control of IEEE C37.118 data for TCP clients

As can be seen, there are two separate parameters in the IED for selecting port numbers for TCP
connections; one for IEEE1344 protocol (1344TCPport) and another one for C37.118 protocol
(C37.118 TCPport). Client can communicate with the IED over IEEE1344 protocol using the selected
TCP port defined in 1344TCPport, and can communicate with the IED over IEEE C37.118 protocol
using the selected TCP port number in C37.118TCPport.

All the frames (the header frame, configuration frame, command frame and data frame) are
communicated over the same TCP port. The client can request (by sending a command frame) a
configuration and/or header via the TCP channel and the requested configuration and/or header will
be sent back to the client (as Configuration frame/Header frame) over the same TCP channel.

Once the TCP client connects to the IED, the client has to necessarily send a command frame to
start a communication. As shown in Figure 33, the IED can support 2 PMUREPORT instances and
the client has to specify the PMU ID Code in order to know which PMUREPORT data needs to be
sent out to that client. In this figure, X and Y are referring to the user-defined PMU ID Codes for
PMUREPORT instances 1 or 2, respectively. It is up to the TCP client to decide which PMUREPORT
function block shall communicate with that client. Upon successful reception of the first command by
the IED, the PMU ID will be extracted out of the command; if there is a PMUREPORT instance
configured in the IED with matching PMU ID, then the client connection over TCP with the IED will be
established and further communication will take place. Otherwise, the connection will be terminated
and the TCPCtrlCfgErrCnt is incremented in the PMU Diagnostics on the Local HMI under Main
menu /Diagnostics /Communication /PMU diagnostics /PMUSTATUS:1

It is possible to turn off/on the TCP data communication by sending a IEEE1344 or C37.118
command frame remotely from the client to the PMU containing RTDOFF/RTDON command.

At any given point of time maximum of 8 TCP clients can be connected to the IED for IEEE1344/
C37.118 protocol. If there is an attempt made by the 9th client, the connection to the new client will
be terminated without influencing the connection of the other clients already connected. A list of
active clients can be seen on the Local HMI in the diagnostics menu under Main menu /
Diagnostics /Communication /PMU diagnostics /PMUSTATUS:1

6.1.3.3 Short guidance for use of UDP GUID-F5BCBBF7-4EED-4E79-9E86-AF046D201BB1 v3

The IED supports maximum of 6 concurrent UDP streams. They can be individually configured to
send IEEE1344 or C37.118 data frames as unicast / multicast. Note that [x] at the end of each
parameter is referring to the UDP stream number (UDP client group) and is a number between 1 and
6. Each of the 6 UDP groups in the IED has the following settings:

1. SendDataUDP[x] – Enable / disable UDP data stream

2. ProtocolOnUDP[x] – Send IEEE1344 or C37.118 on UDP
3. PMUReportUDP[x] – Instance number of PMUREPORT function block that must send data on
this UDP stream (UDP client group[x])
4. UDPDestAddres[x] – UDP destination address for UDP client group[x] (unicast / multicast
address range)
5. UDPDestPort[x] – UDP destination port number for UDP client group[x]
6. TCPportUDPdataCtrl[x] – TCP port to control of data sent over UDP client group[x], i.e. to
receive commands and send configuration frames
7. SendCfgOnUDP[x] – Send configuration frame 2 (CFG-2) on UDP for client group[x]

It is possible to turn off/on the UDP data communication either by setting the parameter
SendDataUDP[x] to Off/On locally in the PMU or by sending a C37.118 or IEEE1344 command
frame (RTDOFF/RTDON) remotely from the client to the PMU as defined in IEEE 1344/C37.118
standard.

Transformer protection RET670 115

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

However, such a remote control to stop the streams from the client is only possible when the
parameter SendDataUDP[x] is set to SetByProtocol. The command RTDOFF/RTDON sent by the
client is stored in the IED, i.e. if the IED is rebooted for some reason, the state of the stream will
remain the same.

If the parameter SendDataUDP[x] is set toOn the RTDOFF/RTDON commands received from the
clients are ignored in the IED.

It is recommended not to set the parameter SendDataUDP[x] to SetByProtocol in case of a multicast.

This is because if one of the clients sends the RTDOFF command, all the clients will stop receiving
the frames.

The UDP implementation in the IED is a UDP_TCP. This means that by default, only the data frames
are sent out on UDP stream and the header frame, configuration frame and command frame are sent
over TCP. This makes the communication more reliable especially since commands are sent over
TCP which performs request/acknowledgment exchange to ensure that no data (command in this
case) is lost.

However, by setting the parameter SendCfgOnUDP[x] to On, the configuration frame 2 (CFG-2) of
IEEEC37.118 data stream is cyclically sent on the corresponding UDP stream (UDP client group[x])
once per minute. This is useful in case of multicast UDP data stream when a lot of PMU clients are
receiving the same UDP stream from the same UDP group (UDP client group[x]).

As shown in Figure 33, there are maximum 2 instances of PMUREPORT function blocks available in
the IED. Each UDP client group[x] can only connect to one of the PMUREPORT instances at the
same time. This is defined in the PMU by the parameter PMUReportUDP[x] which is used to define
the instance number of PMUREPORT function block that must send data on this UDP stream (UDP
client group[x]).

The data streams in the IED can be sent as unicast or as multicast. The user-defined IP address set
in the parameter UDPDestAddress[x] for each UDP stream defines if it is a Unicast or Multicast. The
address range 224.0.0.0 to 239.255.255.255 (Class D IP addresses) is treated as multicast. Any
other IP address outside this range is treated as unicast and the UDP data will be only sent to that
specific unicast IP address. In addition to UDPDestAddress[x] parameter, UDPDestPort[x] parameter
is used to define the UDP destination port number for UDP client group[x].

In case of multicast IP, it will be the network switches and routers that take care of replicating the
packet to reach multiple receivers. Multicast mechanism uses network infrastructure efficiently by
requiring the IED to send a packet only once, even if it needs to be delivered to a large number of
receivers.

If there are more than one UDP client group defined as multicast, the user shall set different multicast
IP addresses for each UDP group.

The PMU clients receiving the UDP frames can also connect to the IED to request (command frame)
config frame 1, config frame 2, config frame 3, or header frame, and to disable/enable real time data.
This can be done by connecting to the TCP port selected in TCPportUDPdataCtrl[x] for each UDP
group. This connection is done using TCP. The IED allows 4 concurrent client connections for every
TCPportUDPdataCtrl[x] port (for each UDP client group[x]).

If the client tries to connect on TCPportUDPdataCtrl[x] port using a PMU-ID other than what is
configured for that PMUREPORT instance (PMUReportUDP[x]), then that client is immediately
disconnected and the UDPCtrlCfgErrCnt is incremented in PMU Diagnostics on LHMI at Main
menu /Diagnostics /Communication /PMU diagnostics /PMUSTATUS:1

Even if the parameter SendDataUDP[x] is set to Off it is still possible for the clients to connect on the
TCP port and request the configuration frames.

116 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

6.1.4 Settings SEMOD119927-1 v2

PID-6710-SETTINGS v4

Table 47: PMUCONF Non group settings (basic)

Name Values (Range) Unit Step Default Description

1344TCPport 1024 - 65534 - 1 4711 TCP port for control of IEEE 1344 data
for TCP clients
C37.118TCPport 1024 - 65534 - 1 4712 TCP port for control of IEEE C37.118
data for TCP clients
TCPportUDPdataCtrl1 1024 - 65534 - 1 4713 TCP port for control of data sent over
UDP client group1
SendDataUDP1 Off - - Off Send data to UDP client group1
On
SetByProtocol
ProtocolOnUDP1 IEEE1344 - - C37.118 Select protocol for UDP client group1
C37.118
PMUReportUDP1 1-2 - 1 1 PMUREPORT instance used for UDP
client group1
UDPDestAddres1 0 - 16 IP 1 234.5.6.7 UDP destination address for UDP client
Address group1
UDPDestPort1 1024 - 65534 - 1 8910 UDP destination port for UDP client
group1
SendCfgOnUDP1 Off - - Off Send Config frame2 on UDP for group1
On
TCPportUDPdataCtrl2 1024 - 65534 - 1 4714 TCP port for control of data sent over
UDP client group2
SendDataUDP2 Off - - Off Send data to UDP client group2
On
SetByProtocol
ProtocolOnUDP2 IEEE1344 - - C37.118 Select protocol for UDP client group2
C37.118
PMUReportUDP2 1-2 - 1 1 PMUREPORT instance used for UDP
client group2
UDPDestAddres2 0 - 16 IP 1 234.5.6.8 UDP destination address for UDP client
Address group2
UDPDestPort2 1024 - 65534 - 1 8911 UDP destination port for UDP client
group2
SendCfgOnUDP2 Off - - Off Send Config frame2 on UDP for group2
On
TCPportUDPdataCtrl3 1024 - 65534 - 1 4715 TCP port for control of data sent over
UDP client group3
SendDataUDP3 Off - - Off Send data to UDP client group3
On
SetByProtocol
ProtocolOnUDP3 IEEE1344 - - C37.118 Select protocol for UDP client group3
C37.118
PMUReportUDP3 1-2 - 1 1 PMUREPORT instance used for UDP
client group3
UDPDestAddres3 0 - 16 IP 1 234.5.6.9 UDP destination address for UDP client
Address group3
UDPDestPort3 1024 - 65534 - 1 8912 UDP destination port for UDP client
group3
Table continues on next page

Transformer protection RET670 117

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

Name Values (Range) Unit Step Default Description

SendCfgOnUDP3 Off - - Off Send Config frame2 on UDP for group3
On
TCPportUDPdataCtrl4 1024 - 65534 - 1 4716 TCP port for control of data sent over
UDP client group4
SendDataUDP4 Off - - Off Send data to UDP client group4
On
SetByProtocol
ProtocolOnUDP4 IEEE1344 - - C37.118 Select protocol for UDP client group4
C37.118
PMUReportUDP4 1-2 - 1 1 PMUREPORT instance used for UDP
client group4
UDPDestAddres4 0 - 16 IP 1 234.5.6.10 UDP destination address for UDP client
Address group4
UDPDestPort4 1024 - 65534 - 1 8913 UDP destination port for UDP client
group4
SendCfgOnUDP4 Off - - Off Send Config frame2 on UDP for group4
On
TCPportUDPdataCtrl5 1024 - 65534 - 1 4717 TCP port for control of data sent over
UDP client group5
SendDataUDP5 Off - - Off Send data to UDP client group5
On
SetByProtocol
ProtocolOnUDP5 IEEE1344 - - C37.118 Select protocol for UDP client group5
C37.118
PMUReportUDP5 1-2 - 1 1 PMUREPORT instance used for UDP
client group5
UDPDestAddres5 0 - 16 IP 1 234.5.6.11 UDP destination address for UDP client
Address group5
UDPDestPort5 1024 - 65534 - 1 8914 UDP destination port for UDP client
group5
SendCfgOnUDP5 Off - - Off Send Config frame2 on UDP for group5
On
TCPportUDPdataCtrl6 1024 - 65534 - 1 4718 TCP port for control of data sent over
UDP client group6
SendDataUDP6 Off - - Off Send data to UDP client group6
On
SetByProtocol
ProtocolOnUDP6 IEEE1344 - - C37.118 Select protocol for UDP client group6
C37.118
PMUReportUDP6 1-2 - 1 1 PMUREPORT instance used for UDP
client group6
UDPDestAddres6 0 - 16 IP 1 234.5.6.12 UDP destination address for UDP client
Address group6
UDPDestPort6 1024 - 65534 - 1 8915 UDP destination port for UDP client
group6
SendCfgOnUDP6 Off - - Off Send Config frame2 on UDP for group6
On

118 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

6.2 Protocol reporting via IEEE 1344 and IEC/IEEE

60255-118 (C37.118) PMUREPORT GUID-0C45D2FA-1B95-4FCA-B23B-A28C2770B817 v2

6.2.1 Identification
GUID-0090956B-48F1-4E8B-9A40-90044C71DF20 v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Protocol reporting via IEEE 1344 and PMUREPORT - -
C37.118

6.2.2 Functionality GUID-8DF29209-252A-4E51-9F4A-B14B669E71AB v5

The phasor measurement reporting block moves the phasor calculations into an IEC/IEEE
60255-118 (C37.118) and/or IEEE 1344 synchrophasor frame format. The PMUREPORT block
contains parameters for PMU performance class and reporting rate, the IDCODE and Global PMU
ID, format of the data streamed through the protocol, the type of reported synchrophasors, as well as
settings for reporting analog and digital signals.

The message generated by the PMUREPORT function block is set in accordance with the IEC/IEEE
60255-118 (C37.118) and/or IEEE 1344 standards.

There are settings for Phasor type (positive sequence, negative sequence or zero sequence in case
of 3-phase phasor and L1, L2 or L3 in case of single phase phasor), PMU's Service class (Protection
or Measurement), Phasor representation (polar or rectangular) and the data types for phasor data,
analog data and frequency data.

Synchrophasor data can be reported to up to 8 clients over TCP and/or 6 UDP group clients for
multicast or unicast transmission of phasor data from the IED. More information regarding
synchrophasor communication structure and TCP/UDP configuration is available in section IEC/IEEE
60255-118 (C37.118) Phasor Measurement Data Streaming Protocol Configuration.

Multiple PMU functionality can be configured in the IED, which can stream out same or different data
at different reporting rates or different performance (service) classes. There are 2 instances of PMU
functionality available in the IED. Each instance of PMU functionality includes a set of PMU reporting
function blocks tagged by the same instance number (1 or 2). As shown in the following figures, each
set of PMU reporting function blocks includes PMUREPORT, PHASORREPORT1-4,
ANALOGREPORT1-3, and BINARYREPORT1-3 function blocks. In general, each instance of PMU
functionality has 32 configurable phasor channels (PHASORREPORT1–4 blocks), 24 analog
channels (ANALOGREPORT1-3 blocks), and 28 digital channels (24 digital-report channels in
BINARYREPORT1-3 and 4 trigger-report channels in PMUREPORT function block). Special rules
shall be taken into account in PCM600 for Application Configuration and Parameter Settings of
multiple PMUREPORT blocks. These rules are explained in the Application Manual in section PMU
Report Function Blocks Connection Rules.

Figure 34 shows both instances of the PMUREPORT function block. As seen, each PMUREPORT
instance has 4 predefined binary input signals corresponding to the Bits 03-00: Trigger Reason
defined in STAT field of the Data frame in IEC/IEEE 60255-118 (C37.118) standard. These are
predefined inputs for Frequency Trigger, Rate of Change of Frequency trigger, Magnitude High and
Magnitude Low triggers.

Transformer protection RET670 119

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

IEC140000118-2-en.vsd
IEC140000118 V2 EN-US

Figure 34: Multiple instances of PMUREPORT function block

Figure 35 shows both instances of the PHASORREPORT function blocks. The instance number is
visible in the bottom of each function block. For each instance, there are four separate
PHASORREPORT blocks including 32 configurable phasor channels (8 phasor channels in each
PHASORREPORT block). Each phasor channel can be configured as a 3-phase (symmetrical
components positive/negative/zero) or single-phase phasor (L1/L2/L3).

IEC140000119-2-en.vsd
IEC140000119 V2 EN-US

Figure 35: Multiple instances of PHASORREPORT blocks

Figure 36 shows both instances of ANALOGREPORT function blocks. The instance number is visible
in the bottom of each function block. For each instance, there are three separate ANALOGREPORT
blocks capable of reporting up to 24 Analog signals (8 Analog signals in each ANALOGREPORT
block). These can include for example transfer of active and reactive power or reporting the
milliampere input signals to the PDC clients as defined in IEEE IEC/IEEE 60255-118 (C37.118) data
frame format.

IEC140000120-2-en.vsd
IEC140000120 V2 EN-US

Figure 36: Multiple instances of ANALOGREPORT blocks

Figure 37 shows both instances of BINARYREPORT function blocks. The instance number is visible
in the bottom of each function block. For each instance, there are three separate BINARYREPORT
blocks capable of reporting up to 24 Binary signals (8 Binary signals in each BINARYREPORT

120 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

block). These binary signals can be for example dis-connector or breaker position indications or
internal/external protection alarm signals.

IEC140000121-2-en.vsd
IEC140000121 V2 EN-US

Figure 37: Multiple instances of BINARYREPORT blocks

6.2.3 Function block GUID-45150D7E-3231-4661-A8B4-17364AF25035 v2

PMUREPORT
BLOCK TIMESTAT
^FREQTRIG
^DFDTTRIG
^MAGHIGHTRIG
^MAGLOWTRIG

IEC140000102-1_en.vsd
IEC140000102 V1 EN-US

ANALOGREPORT1
^ANALOG1
^ANALOG2
^ANALOG3
^ANALOG4
^ANALOG5
^ANALOG6
^ANALOG7
^ANALOG8
IEC140000107-1_en.vsd
IEC140000107 V1 EN-US

ANALOGREPORT2
^ANALOG9
^ANALOG10
^ANALOG11
^ANALOG12
^ANALOG13
^ANALOG14
^ANALOG15
^ANALOG16
IEC140000108-1_en.vsd
IEC140000108 V1 EN-US

ANALOGREPORT3
^ANALOG17
^ANALOG18
^ANALOG19
^ANALOG20
^ANALOG21
^ANALOG22
^ANALOG23
^ANALOG24

IEC140000109-1_en.vsd
IEC140000109 V1 EN-US

Transformer protection RET670 121

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

BINARYREPORT1
^BINARY1
^BINARY2
^BINARY3
^BINARY4
^BINARY5
^BINARY6
^BINARY7
^BINARY8
IEC140000110-1_en.vsd
IEC140000110 V1 EN-US

BINARYREPORT2
^BINARY9
^BINARY10
^BINARY11
^BINARY12
^BINARY13
^BINARY14
^BINARY15
^BINARY16
IEC140000111-1_en.vsd
IEC140000111 V1 EN-US

BINARYREPORT3
^BINARY17
^BINARY18
^BINARY19
^BINARY20
^BINARY21
^BINARY22
^BINARY23
^BINARY24
IEC140000112-1_en.vsd
IEC140000112 V1 EN-US

PHASORREPORT1
^PHASOR1
^PHASOR2
^PHASOR3
^PHASOR4
^PHASOR5
^PHASOR6
^PHASOR7
^PHASOR8

IEC140000103-1_en.vsd
IEC140000103 V1 EN-US

PHASORREPORT2
^PHASOR9
^PHASOR10
^PHASOR11
^PHASOR12
^PHASOR13
^PHASOR14
^PHASOR15
^PHASOR16

IEC140000104-1_en.vsd
IEC140000104 V1 EN-US

PHASORREPORT3
^PHASOR17
^PHASOR18
^PHASOR19
^PHASOR20
^PHASOR21
^PHASOR22
^PHASOR23
^PHASOR24

IEC140000105-1_en.vsd
IEC140000105 V1 EN-US

122 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

PHASORREPORT4
^PHASOR25
^PHASOR26
^PHASOR27
^PHASOR28
^PHASOR29
^PHASOR30
^PHASOR31
^PHASOR32

IEC140000106-1_en.vsd
IEC140000106 V1 EN-US

6.2.4 Signals SEMOD55830-1 v2

PID-6244-INPUTSIGNALS v2

Table 48: PMUREPORT Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of output signals
FREQTRIG BOOLEAN 0 Frequency trigger
DFDTTRIG BOOLEAN 0 Rate of change of frequency trigger
MAGHIGHTRIG BOOLEAN 0 Magnitude high trigger
MAGLOWTRIG BOOLEAN 0 Magnitude low trigger

PID-6244-OUTPUTSIGNALS v2

Table 49: PMUREPORT Output signals

Name Type Description

TIMESTAT BOOLEAN Time synchronization status

PID-6238-INPUTSIGNALS v2

Table 50: ANALOGREPORT1 Input signals

Name Type Default Description

ANALOG1 REAL 0.0 Analog input channel 1
ANALOG2 REAL 0.0 Analog input channel 2
ANALOG3 REAL 0.0 Analog input channel 3
ANALOG4 REAL 0.0 Analog input channel 4
ANALOG5 REAL 0.0 Analog input channel 5
ANALOG6 REAL 0.0 Analog input channel 6
ANALOG7 REAL 0.0 Analog input channel 7
ANALOG8 REAL 0.0 Analog input channel 8

PID-6239-INPUTSIGNALS v2

Table 51: ANALOGREPORT2 Input signals

Name Type Default Description

ANALOG9 REAL 0.0 Analog input channel 9
ANALOG10 REAL 0.0 Analog input channel 10
ANALOG11 REAL 0.0 Analog input channel 11
ANALOG12 REAL 0.0 Analog input channel 12
ANALOG13 REAL 0.0 Analog input channel 13
ANALOG14 REAL 0.0 Analog input channel 14
ANALOG15 REAL 0.0 Analog input channel 15
ANALOG16 REAL 0.0 Analog input channel 16

Transformer protection RET670 123

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

PID-6240-INPUTSIGNALS v2

Table 52: ANALOGREPORT3 Input signals

Name Type Default Description

ANALOG17 REAL 0.0 Analog input channel 17
ANALOG18 REAL 0.0 Analog input channel 18
ANALOG19 REAL 0.0 Analog input channel 19
ANALOG20 REAL 0.0 Analog input channel 20
ANALOG21 REAL 0.0 Analog input channel 21
ANALOG22 REAL 0.0 Analog input channel 22
ANALOG23 REAL 0.0 Analog input channel 23
ANALOG24 REAL 0.0 Analog input channel 24

PID-6241-INPUTSIGNALS v3

Table 53: BINARYREPORT1 Input signals

Name Type Default Description

BINARY1 BOOLEAN 0 Binary input channel1
BINARY2 BOOLEAN 0 Binary input channel2
BINARY3 BOOLEAN 0 Binary input channel3
BINARY4 BOOLEAN 0 Binary input channel4
BINARY5 BOOLEAN 0 Binary input channel5
BINARY6 BOOLEAN 0 Binary input channel6
BINARY7 BOOLEAN 0 Binary input channel7
BINARY8 BOOLEAN 0 Binary input channel8

PID-6242-INPUTSIGNALS v2

Table 54: BINARYREPORT2 Input signals

Name Type Default Description

BINARY9 BOOLEAN 0 Binary input channel 9
BINARY10 BOOLEAN 0 Binary input channel 10
BINARY11 BOOLEAN 0 Binary input channel 11
BINARY12 BOOLEAN 0 Binary input channel 12
BINARY13 BOOLEAN 0 Binary input channel 13
BINARY14 BOOLEAN 0 Binary input channel 14
BINARY15 BOOLEAN 0 Binary input channel 15
BINARY16 BOOLEAN 0 Binary input channel 16

PID-6243-INPUTSIGNALS v2

Table 55: BINARYREPORT3 Input signals

Name Type Default Description

BINARY17 BOOLEAN 0 Binary input channel 17
BINARY18 BOOLEAN 0 Binary input channel 18
BINARY19 BOOLEAN 0 Binary input channel 19
BINARY20 BOOLEAN 0 Binary input channel 20
BINARY21 BOOLEAN 0 Binary input channel 21
BINARY22 BOOLEAN 0 Binary input channel 22
BINARY23 BOOLEAN 0 Binary input channel 23
BINARY24 BOOLEAN 0 Binary input channel 24

124 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

PID-6252-INPUTSIGNALS v3

Table 56: PHASORREPORT1 Input signals

Name Type Default Description

PHASOR1 GROUP - Group signal Input for Phasor1
SIGNAL
PHASOR2 GROUP - Group signal Input for Phasor2
SIGNAL
PHASOR3 GROUP - Group signal Input for Phasor3
SIGNAL
PHASOR4 GROUP - Group signal Input for Phasor4
SIGNAL
PHASOR5 GROUP - Group signal Input for Phasor 5
SIGNAL
PHASOR6 GROUP - Group signal Input for Phasor6
SIGNAL
PHASOR7 GROUP - Group signal Input for Phasor7
SIGNAL
PHASOR8 GROUP - Group signal Input for Phasor8
SIGNAL

PID-6253-INPUTSIGNALS v2

Table 57: PHASORREPORT2 Input signals

Name Type Default Description

PHASOR9 GROUP - Group signal Input for Phasor9
SIGNAL
PHASOR10 GROUP - Group signal Input for Phasor10
SIGNAL
PHASOR11 GROUP - Group signal Input for Phasor11
SIGNAL
PHASOR12 GROUP - Group signal Input for Phasor12
SIGNAL
PHASOR13 GROUP - Group signal Input for Phasor13
SIGNAL
PHASOR14 GROUP - Group signal Input for Phasor14
SIGNAL
PHASOR15 GROUP - Group signal Input for Phasor15
SIGNAL
PHASOR16 GROUP - Group signal Input for Phasor16
SIGNAL

PID-6254-INPUTSIGNALS v2

Table 58: PHASORREPORT3 Input signals

Name Type Default Description

PHASOR17 GROUP - Group signal Input for Phasor17
SIGNAL
PHASOR18 GROUP - Group signal Input for Phasor18
SIGNAL
PHASOR19 GROUP - Group signal Input for Phasor19
SIGNAL
PHASOR20 GROUP - Group signal Input for Phasor20
SIGNAL
PHASOR21 GROUP - Group signal Input for Phasor21
SIGNAL
Table continues on next page

Transformer protection RET670 125

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

Name Type Default Description

PHASOR22 GROUP - Group signal Input for Phasor22
SIGNAL
PHASOR23 GROUP - Group signal Input for Phasor23
SIGNAL
PHASOR24 GROUP - Group signal Input for Phasor24
SIGNAL

PID-6255-INPUTSIGNALS v2

Table 59: PHASORREPORT4 Input signals

Name Type Default Description

PHASOR25 GROUP - Group signal Input for Phasor25
SIGNAL
PHASOR26 GROUP - Group signal Input for Phasor26
SIGNAL
PHASOR27 GROUP - Group signal Input for Phasor27
SIGNAL
PHASOR28 GROUP - Group signal Input for Phasor28
SIGNAL
PHASOR29 GROUP - Group signal Input for Phasor29
SIGNAL
PHASOR30 GROUP - Group signal Input for Phasor30
SIGNAL
PHASOR31 GROUP - Group signal Input for Phasor31
SIGNAL
PHASOR32 GROUP - Group signal Input for Phasor32
SIGNAL

6.2.5 Settings SEMOD119927-1 v2

PID-6895-SETTINGS v2

Table 60: PMUREPORT Non group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - On Operation mode off/on
On
SvcClass P class - - P class Service class
M class
Global_PMU_ID 0 - 16 - 1 0 Global PMU Identifier (G_PMU_ID)
PMUdataStreamIDCOD 1 - 65534 - 1 1 PMU Data Stream ID Number (IDCODE)
E
PhasorFormat Rectangular - - Rectangular Select phasor format
Polar
PhasorDataType Float - - Float Select phasor datatype
Integer
FrequencyDataType Float - - Float Select frequency datatype
Integer
AnalogDataType Float - - Float Select analog data type
Integer
Table continues on next page

126 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

Name Values (Range) Unit Step Default Description

SendFreqInfo Off - - On Send frequency and rate of change of
On frequency information
ReportRate 10/10 fr/s - - 10/10 fr/s Phasor data report rate
(60/50Hz) (60/50Hz)
12/10 fr/s
(60/50Hz)
15/10 fr/s
(60/50Hz)
20/25 fr/s
(60/50Hz)
30/25 fr/s
(60/50Hz)
60/50 fr/s
(60/50Hz)
RptTimetag FirstSample - - MiddleSample Method of phasor timetag
MiddleSample
LastSample

PID-6238-SETTINGS v2

Table 61: ANALOGREPORT1 Non group settings (basic)

Name Values (Range) Unit Step Default Description

Analog1Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 1 in
10000000000.0 integer format
Analog1UnitType Single point-on- - - RMS of analog Unit type for analog 1
wave input
RMS of analog
input
Peak of analog
input
Analog2Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 2 in
10000000000.0 integer format
Analog2UnitType Single point-on- - - RMS of analog Unit type for analog 2
wave input
RMS of analog
input
Peak of analog
input
Analog3Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 3 in
10000000000.0 integer format
Analog3UnitType Single point-on- - - RMS of analog Unit type for analog 3
wave input
RMS of analog
input
Peak of analog
input
Analog4Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 4 in
10000000000.0 integer format
Analog4UnitType Single point-on- - - RMS of analog Unit type for analog 4
wave input
RMS of analog
input
Peak of analog
input
Analog5Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 5 in
10000000000.0 integer format
Table continues on next page

Transformer protection RET670 127

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

Name Values (Range) Unit Step Default Description

Analog5UnitType Single point-on- - - RMS of analog Unit type for analog 5
wave input
RMS of analog
input
Peak of analog
input
Analog6Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 6 in
10000000000.0 integer format
Analog6UnitType Single point-on- - - RMS of analog Unit type for analog 6
wave input
RMS of analog
input
Peak of analog
input
Analog7Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 7 in
10000000000.0 integer format
Analog7UnitType Single point-on- - - RMS of analog Unit type for analog 7
wave input
RMS of analog
input
Peak of analog
input
Analog8Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 8 in
10000000000.0 integer format
Analog8UnitType Single point-on- - - RMS of analog Unit type for analog 8
wave input
RMS of analog
input
Peak of analog
input

PID-6239-SETTINGS v2

Table 62: ANALOGREPORT2 Non group settings (basic)

Name Values (Range) Unit Step Default Description

Analog9Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 9 in
10000000000.0 integer format
Analog9UnitType Single point-on- - - RMS of analog Unit type for analog 9
wave input
RMS of analog
input
Peak of analog
input
Analog10Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 10 in
10000000000.0 integer format
Analog10UnitType Single point-on- - - RMS of analog Unit type for analog 10
wave input
RMS of analog
input
Peak of analog
input
Analog11Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 11 in
10000000000.0 integer format
Analog11UnitType Single point-on- - - RMS of analog Unit type for analog 11
wave input
RMS of analog
input
Peak of analog
input
Table continues on next page

128 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

Name Values (Range) Unit Step Default Description

Analog12Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 12 in
10000000000.0 integer format
Analog12UnitType Single point-on- - - RMS of analog Unit type for analog 12
wave input
RMS of analog
input
Peak of analog
input
Analog13Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 13 in
10000000000.0 integer format
Analog13UnitType Single point-on- - - RMS of analog Unit type for analog 13
wave input
RMS of analog
input
Peak of analog
input
Analog14Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 14 in
10000000000.0 integer format
Analog14UnitType Single point-on- - - RMS of analog Unit type for analog 14
wave input
RMS of analog
input
Peak of analog
input
Analog15Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 15 in
10000000000.0 integer format
Analog15UnitType Single point-on- - - RMS of analog Unit type for analog 15
wave input
RMS of analog
input
Peak of analog
input
Analog16Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 16 in
10000000000.0 integer format
Analog16UnitType Single point-on- - - RMS of analog Unit type for analog 16
wave input
RMS of analog
input
Peak of analog
input

PID-6240-SETTINGS v2

Table 63: ANALOGREPORT3 Non group settings (basic)

Name Values (Range) Unit Step Default Description

Analog17Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 17 in
10000000000.0 integer format
Analog17UnitType Single point-on- - - RMS of analog Unit type for analog 17
wave input
RMS of analog
input
Peak of analog
input
Analog18Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 18 in
10000000000.0 integer format
Table continues on next page

Transformer protection RET670 129

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

Name Values (Range) Unit Step Default Description

Analog18UnitType Single point-on- - - RMS of analog Unit type for analog 18
wave input
RMS of analog
input
Peak of analog
input
Analog19Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 19 in
10000000000.0 integer format
Analog19UnitType Single point-on- - - RMS of analog Unit type for analog 19
wave input
RMS of analog
input
Peak of analog
input
Analog20Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 20 in
10000000000.0 integer format
Analog20UnitType Single point-on- - - RMS of analog Unit type for analog 20
wave input
RMS of analog
input
Peak of analog
input
Analog21Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 21 in
10000000000.0 integer format
Analog21UnitType Single point-on- - - RMS of analog Unit type for analog 21
wave input
RMS of analog
input
Peak of analog
input
Analog22Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 22 in
10000000000.0 integer format
Analog22UnitType Single point-on- - - RMS of analog Unit type for analog 22
wave input
RMS of analog
input
Peak of analog
input
Analog23Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 23 in
10000000000.0 integer format
Analog23UnitType Single point-on- - - RMS of analog Unit type for analog 23
wave input
RMS of analog
input
Peak of analog
input
Analog24Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 24 in
10000000000.0 integer format
Analog24UnitType Single point-on- - - RMS of analog Unit type for analog 24
wave input
RMS of analog
input
Peak of analog
input

130 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

PID-6252-SETTINGS v2

Table 64: PHASORREPORT1 Non group settings (basic)

Name Values (Range) Unit Step Default Description

Phasor2 POSSEQ - - POSSEQ Group selector for Phasor2
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor3 POSSEQ - - POSSEQ Group selector for Phasor3
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor4 POSSEQ - - POSSEQ Group selector for Phasor4
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor5 POSSEQ - - POSSEQ Group selector for phasor5
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor6 POSSEQ - - POSSEQ Group selector for Phasor6
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor7 POSSEQ - - POSSEQ Group selector for Phasor7
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor8 L1 - - POSSEQ Group selector for phasor8
L2
L3
POSSEQ
NEGSEQ
ZEROSEQ
Phasor1Report Off - - On Reporting phasor 1
On
Phasor1UseFreqSrc Off - - On Include phasor 1 for automatic frequency
On source selection
Phasor2Report Off - - On Reporting phasor 2
On
Phasor2UseFreqSrc Off - - On Include phasor 2 for automatic frequency
On source selection
Phasor3Report Off - - On Reporting phasor 3
On
Phasor3UseFreqSrc Off - - On Include phasor 3 for automatic frequency
On source selection
Phasor4Report Off - - On Reporting phasor 4
On
Table continues on next page

Transformer protection RET670 131

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

Name Values (Range) Unit Step Default Description

Phasor4UseFreqSrc Off - - On Include phasor 4 for automatic frequency
On source selection
Phasor5Report Off - - On Reporting phasor 5
On
Phasor5UseFreqSrc Off - - On Include phasor 5 for automatic frequency
On source selection
Phasor6Report Off - - On Reporting phasor 6
On
Phasor6UseFreqSrc Off - - On Include phasor 6 for automatic frequency
On source selection
Phasor7Report Off - - On Reporting phasor 7
On
Phasor7UseFreqSrc Off - - On Include phasor 7 for automatic frequency
On source selection
Phasor8Report Off - - On Reporting phasor 8
On
Phasor8UseFreqSrc Off - - On Include phasor 8 for automatic frequency
On source selection
Phasor1 POSSEQ - - POSSEQ Group Selector for Phasor1
NEGSEQ
ZEROSEQ
L1
L2
L3

PID-6253-SETTINGS v3

Table 65: PHASORREPORT2 Non group settings (basic)

Name Values (Range) Unit Step Default Description

Phasor9 POSSEQ - - POSSEQ Group selector for Phasor9
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor10 POSSEQ - - POSSEQ Group selector for Phasor10
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor11 POSSEQ - - POSSEQ Group selector for Phasor 11
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor12 POSSEQ - - POSSEQ Group selector for Phasor12
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor13 POSSEQ - - POSSEQ Group selector for Phasor13
NEGSEQ
ZEROSEQ
L1
L2
L3
Table continues on next page

132 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

Name Values (Range) Unit Step Default Description

Phasor14 POSSEQ - - POSSEQ Group selector for Phasor14
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor15 POSSEQ - - POSSEQ Group selector for Phasor15
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor16 POSSEQ - - POSSEQ Group selector for Phasor16
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor9Report Off - - On Reporting phasor 9
On
Phasor9UseFreqSrc Off - - On Include phasor 9 for automatic frequency
On source selection
Phasor10Report Off - - On Reporting phasor 10
On
Phasor10UseFreqSrc Off - - On Include phasor 10 for automatic
On frequency source selection
Phasor11Report Off - - On Reporting phasor 11
On
Phasor11UseFreqSrc Off - - On Include phasor 11 for automatic
On frequency source selection
Phasor12Report Off - - On Reporting phasor 12
On
Phasor12UseFreqSrc Off - - On Include phasor 12 for automatic
On frequency source selection
Phasor13Report Off - - On Reporting phasor 13
On
Phasor13UseFreqSrc Off - - On Include phasor 13 for automatic
On frequency source selection
Phasor14Report Off - - On Reporting phasor 14
On
Phasor14UseFreqSrc Off - - On Include phasor 14 for automatic
On frequency source selection
Phasor15Report Off - - On Reporting phasor 15
On
Phasor15UseFreqSrc Off - - On Include phasor 15 for automatic
On frequency source selection
Phasor16Report Off - - On Reporting phasor 16
On
Phasor16UseFreqSrc Off - - On Include phasor 16 for automatic
On frequency source selection

Transformer protection RET670 133

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

PID-6254-SETTINGS v2

Table 66: PHASORREPORT3 Non group settings (basic)

Name Values (Range) Unit Step Default Description

Phasor17 POSSEQ - - POSSEQ Group selector for Phasor17
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor18 POSSEQ - - POSSEQ Group selector for Phasor18
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor19 POSSEQ - - POSSEQ Group selector for Phasor19
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor20 POSSEQ - - POSSEQ Group selector for Phasor20
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor21 POSSEQ - - POSSEQ Group selector for Phasor21
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor22 POSSEQ - - POSSEQ Group selector for Phasor22
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor23 POSSEQ - - POSSEQ Group selector for Phasor23
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor24 POSSEQ - - POSSEQ Group selector for Phasor24
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor17Report Off - - On Reporting phasor 17
On
Phasor17UseFreqSrc Off - - On Include phasor 17 for automatic
On frequency source selection
Phasor18Report Off - - On Reporting phasor 18
On
Phasor18UseFreqSrc Off - - On Include phasor 18 for automatic
On frequency source selection
Table continues on next page

134 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

Name Values (Range) Unit Step Default Description

Phasor19Report Off - - On Reporting phasor 19
On
Phasor19UseFreqSrc Off - - On Include phasor 19 for automatic
On frequency source selection
Phasor20Report Off - - On Reporting phasor 20
On
Phasor20UseFreqSrc Off - - On Include phasor 20 for automatic
On frequency source selection
Phasor21Report Off - - On Reporting phasor 21
On
Phasor21UseFreqSrc Off - - On Include phasor 21 for automatic
On frequency source selection
Phasor22Report Off - - On Reporting phasor 22
On
Phasor22UseFreqSrc Off - - On Include phasor 22 for automatic
On frequency source selection
Phasor23Report Off - - On Reporting phasor 23
On
Phasor23UseFreqSrc Off - - On Include phasor 23 for automatic
On frequency source selection
Phasor24Report Off - - On Reporting phasor 24
On
Phasor24UseFreqSrc Off - - On Include phasor 24 for automatic
On frequency source selection

PID-6255-SETTINGS v2

Table 67: PHASORREPORT4 Non group settings (basic)

Name Values (Range) Unit Step Default Description

Phasor25 POSSEQ - - POSSEQ Group selector for Phasor25
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor26 POSSEQ - - POSSEQ Group selector for Phasor26
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor27 POSSEQ - - POSSEQ Group selector for Phasor27
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor28 POSSEQ - - POSSEQ Group selector for Phasor28
NEGSEQ
ZEROSEQ
L1
L2
L3
Table continues on next page

Transformer protection RET670 135

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

Name Values (Range) Unit Step Default Description

Phasor29 POSSEQ - - POSSEQ Group selector for Phasor29
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor30 POSSEQ - - POSSEQ Group selector for Phasor30
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor31 POSSEQ - - POSSEQ Group selector for Phasor31
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor32 POSSEQ - - POSSEQ Group selector for Phasor32
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor25Report Off - - On Reporting phasor 25
On
Phasor25UseFreqSrc Off - - On Include phasor 25 for automatic
On frequency source selection
Phasor26Report Off - - On Reporting phasor 26
On
Phasor26UseFreqSrc Off - - On Include phasor 26 for automatic
On frequency source selection
Phasor27Report Off - - On Reporting phasor 27
On
Phasor27UseFreqSrc Off - - On Include phasor 27 for automatic
On frequency source selection
Phasor28Report Off - - On Reporting phasor 28
On
Phasor28UseFreqSrc Off - - On Include phasor 28 for automatic
On frequency source selection
Phasor29Report Off - - On Reporting phasor 29
On
Phasor29UseFreqSrc Off - - On Include phasor 29 for automatic
On frequency source selection
Phasor30Report Off - - On Reporting phasor 30
On
Phasor30UseFreqSrc Off - - On Include phasor 30 for automatic
On frequency source selection
Phasor31Report Off - - On Reporting phasor 31
On
Phasor32Report Off - - On Reporting phasor 32
On
Phasor31UseFreqSrc Off - - On Include phasor 31 for automatic
On frequency source selection
Phasor32UseFreqSrc Off - - On Include phasor 32 for automatic
On frequency source selection

136 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

6.2.6 Monitored data

PID-6244-MONITOREDDATA v2

Table 68: PMUREPORT Monitored data

Name Type Values (Range) Unit Description

TIMESTAT BOOLEAN 1=Ready - Time synchronization status
0=Fail
FREQ REAL - Hz Frequency
FREQGRAD REAL - - Rate of change of frequency
FREQREFCHSEL INTEGER - - Frequency reference channel number
selected
FREQREFCHERR BOOLEAN 0=Freq ref not - Frequency reference channel error
available
1=Freq ref error
2=Freq ref
available
FREQTRIG BOOLEAN - - Frequency trigger
DFDTTRIG BOOLEAN - - Rate of change of frequency trigger
MAGHIGHTRIG BOOLEAN - - Magnitude high trigger
MAGLOWTRIG BOOLEAN - - Magnitude low trigger

PID-6238-MONITOREDDATA v2

Table 69: ANALOGREPORT1 Monitored data

Name Type Values (Range) Unit Description

ANALOG1 REAL - - Analog input channel 1
ANALOG2 REAL - - Analog input channel 2
ANALOG3 REAL - - Analog input channel 3
ANALOG4 REAL - - Analog input channel 4
ANALOG5 REAL - - Analog input channel 5
ANALOG6 REAL - - Analog input channel 6
ANALOG7 REAL - - Analog input channel 7
ANALOG8 REAL - - Analog input channel 8

PID-6239-MONITOREDDATA v2

Table 70: ANALOGREPORT2 Monitored data

Name Type Values (Range) Unit Description

ANALOG9 REAL - - Analog input channel 9
ANALOG10 REAL - - Analog input channel 10
ANALOG11 REAL - - Analog input channel 11
ANALOG12 REAL - - Analog input channel 12
ANALOG13 REAL - - Analog input channel 13
ANALOG14 REAL - - Analog input channel 14
ANALOG15 REAL - - Analog input channel 15
ANALOG16 REAL - - Analog input channel 16

Transformer protection RET670 137

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

PID-6240-MONITOREDDATA v2

Table 71: ANALOGREPORT3 Monitored data

Name Type Values (Range) Unit Description

ANALOG17 REAL - - Analog input channel 17
ANALOG18 REAL - - Analog input channel 18
ANALOG19 REAL - - Analog input channel 19
ANALOG20 REAL - - Analog input channel 20
ANALOG21 REAL - - Analog input channel 21
ANALOG22 REAL - - Analog input channel 22
ANALOG23 REAL - - Analog input channel 23
ANALOG24 REAL - - Analog input channel 24

PID-6241-MONITOREDDATA v2

Table 72: BINARYREPORT1 Monitored data

Name Type Values (Range) Unit Description

BINARY1 BOOLEAN - - Binary input channel 1
BINARY2 BOOLEAN - - Binary input channel 2
BINARY3 BOOLEAN - - Binary input channel 3
BINARY4 BOOLEAN - - Binary input channel 4
BINARY5 BOOLEAN - - Binary input channel 5
BINARY6 BOOLEAN - - Binary input channel 6
BINARY7 BOOLEAN - - Binary input channel 7
BINARY8 BOOLEAN - - Binary input channel 8

PID-6242-MONITOREDDATA v2

Table 73: BINARYREPORT2 Monitored data

Name Type Values (Range) Unit Description

BINARY9 BOOLEAN - - Binary input channel 9
BINARY10 BOOLEAN - - Binary input channel 10
BINARY11 BOOLEAN - - Binary input channel 11
BINARY12 BOOLEAN - - Binary input channel 12
BINARY13 BOOLEAN - - Binary input channel 13
BINARY14 BOOLEAN - - Binary input channel 14
BINARY15 BOOLEAN - - Binary input channel 15
BINARY16 BOOLEAN - - Binary input channel 16

PID-6243-MONITOREDDATA v2

Table 74: BINARYREPORT3 Monitored data

Name Type Values (Range) Unit Description

BINARY17 BOOLEAN - - Binary input channel 17
BINARY18 BOOLEAN - - Binary input channel 18
BINARY19 BOOLEAN - - Binary input channel 19
BINARY20 BOOLEAN - - Binary input channel 20
BINARY21 BOOLEAN - - Binary input channel 21
BINARY22 BOOLEAN - - Binary input channel 22
BINARY23 BOOLEAN - - Binary input channel 23
BINARY24 BOOLEAN - - Binary input channel 24

138 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

PID-6252-MONITOREDDATA v3

Table 75: PHASORREPORT1 Monitored data

Name Type Values (Range) Unit Description

PHASOR1 REAL - - Phasor 1 amplitude
PHASOR1 REAL - deg Phasor 1 angle
PHASOR2 REAL - - Phasor 2 amplitude
PHASOR2 REAL - deg Phasor 2 angle
PHASOR3 REAL - - Phasor 3 amplitude
PHASOR3 REAL - deg Phasor 3 angle
PHASOR4 REAL - - Phasor 4 amplitude
PHASOR4 REAL - deg Phasor 4 angle
PHASOR5 REAL - - Phasor 5 amplitude
PHASOR5 REAL - deg Phasor 5 angle
PHASOR6 REAL - - Phasor 6 amplitude
PHASOR6 REAL - deg Phasor 6 angle
PHASOR7 REAL - - Phasor 7 amplitude
PHASOR7 REAL - deg Phasor 7 angle
PHASOR8 REAL - - Phasor 8 amplitude
PHASOR8 REAL - deg Phasor 8 angle

PID-6253-MONITOREDDATA v2

Table 76: PHASORREPORT2 Monitored data

Name Type Values (Range) Unit Description

PHASOR9 REAL - - Phasor 9 amplitude
PHASOR9 REAL - deg Phasor 9 angle
PHASOR10 REAL - - Phasor 10 amplitude
PHASOR10 REAL - deg Phasor 10 angle
PHASOR11 REAL - - Phasor 11 amplitude
PHASOR11 REAL - deg Phasor 11 angle
PHASOR12 REAL - - Phasor 12 amplitude
PHASOR12 REAL - deg Phasor 12 angle
PHASOR13 REAL - - Phasor 13 amplitude
PHASOR13 REAL - deg Phasor 13 angle
PHASOR14 REAL - - Phasor 14 amplitude
PHASOR14 REAL - deg Phasor 14 angle
PHASOR15 REAL - - Phasor 15 amplitude
PHASOR15 REAL - deg Phasor 15 angle
PHASOR16 REAL - - Phasor 16 amplitude
PHASOR16 REAL - deg Phasor 16 angle

Transformer protection RET670 139

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

PID-6254-MONITOREDDATA v2

Table 77: PHASORREPORT3 Monitored data

Name Type Values (Range) Unit Description

PHASOR17 REAL - - Phasor 17 amplitude
PHASOR17 REAL - deg Phasor 17 angle
PHASOR18 REAL - - Phasor 18 amplitude
PHASOR18 REAL - deg Phasor 18 angle
PHASOR19 REAL - - Phasor 19 amplitude
PHASOR19 REAL - deg Phasor 19 angle
PHASOR20 REAL - - Phasor 20 amplitude
PHASOR20 REAL - deg Phasor 20 angle
PHASOR21 REAL - - Phasor 21 amplitude
PHASOR21 REAL - deg Phasor 21 angle
PHASOR22 REAL - - Phasor 22 amplitude
PHASOR22 REAL - deg Phasor 22 angle
PHASOR23 REAL - - Phasor 23 amplitude
PHASOR23 REAL - deg Phasor 23 angle
PHASOR24 REAL - - Phasor 24 amplitude
PHASOR24 REAL - deg Phasor 24 angle

PID-6255-MONITOREDDATA v2

Table 78: PHASORREPORT4 Monitored data

Name Type Values (Range) Unit Description

PHASOR25 REAL - - Phasor 25 amplitude
PHASOR25 REAL - deg Phasor 25 angle
PHASOR26 REAL - - Phasor 26 amplitude
PHASOR26 REAL - deg Phasor 26 angle
PHASOR27 REAL - - Phasor 27 amplitude
PHASOR27 REAL - deg Phasor 27 angle
PHASOR28 REAL - - Phasor 28 amplitude
PHASOR28 REAL - deg Phasor 28 angle
PHASOR29 REAL - - Phasor 29 amplitude
PHASOR29 REAL - deg Phasor 29 angle
PHASOR30 REAL - - Phasor 30 amplitude
PHASOR30 REAL - deg Phasor 30 angle
PHASOR31 REAL - - Phasor 31 amplitude
PHASOR31 REAL - deg Phasor 31 angle
PHASOR32 REAL - - Phasor 32 amplitude
PHASOR32 REAL - deg Phasor 32 angle

6.2.7 Operation principle GUID-EB2B9096-2F9D-4264-B2D2-8D9DC65697E8 v3

The Phasor Measurement Unit (PMU) features three main functional principles:

140 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

• To measure the power system related AC quantities (voltage, current) and to calculate the
phasor representation of these quantities.
• To synchronize the calculated phasors with the UTC by time-tagging, in order to make
synchrophasors (time is reference).
• To publish all phasor-related data by means of TCP/IP or UDP/IP, following the standard IEEE
C37.118 protocol.

The C37.118 standard imposes requirements on the devices and describes the communication
message structure and data. The PMU complies with all the standard requirements with a specific
attention to the Total Vector Error (TVE) requirement. The TVE is calculated using the following
equation:

2
( X r ( n ) - X r )2 + ( X i ( n ) - X i )
TVE =
X r2 + X i2
GUID-80D9B1EA-A770-4F50-9530-61644B4DEBBE V1 EN-US (Equation 1)

where,

Xr(n) and Xi(n) are the measured values

Xr and Xi are the theoretical values

In order to comply with TVE requirements, special calibration is done in the factory on the analog
input channels of the PMU, resulting in increased accuracy of the measurements. The IEEE C37.118
standard also imposes a variety of steady state and dynamic requirements which are fulfilled in the
IED with the help of high accuracy measurements and advanced filtering techniques.

Figure 38 shows an overview of the PMU functionality and operation. In this figure, only one instance
of PMUREPORT (PMUREPORT1) is shown. Note that connection of different signals to the
PMUREPORT, in this figure, is only an example and the actual connections and reported signals on
the IEEEC37.118/1344 can be defined by the user.

Transformer protection RET670 141

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

U/I samples

PMUREPORT1

MU PHASOR1
PHASOR2 8 TCP
U IEEEC37.118 / 1344
TRM SMAI messages NUM
I
U 6 UDC
TRM PHASOR32
I

ANALOG1
I/P MIM SMMI ANALOG2

MEAS. ANALOG24

BINARY1
BINARY2
BIM

OR
BINARY24
PROTECTION

GPS / OP
IRIG-B FREQTRIG
UP
DFDTTRIG
OC
PPS time data MAGHIGHTRIG
MAGLOWTRIG
UV

IEC140000146-1-en.vsd

IEC140000146 V2 EN-US

Figure 38: Overview of reporting functionality (PMUREPORT)

The TRM modules are individually AC-calibrated in the factory. The calibration data is stored in the
prepared area of the TRM EEProm. The pre-processor block is extended with calibration
compensation and a new angle reference method based on timestamps. The AI3P output of the
preprocessor block is used to provide the required information for each respective PMUREPORT
phasor channel. More information about preprocessor block is available in the section Signal matrix
for analog inputs SMAI.

6.2.7.1 Frequency reporting GUID-4F3BA7C7-8C9B-4266-9F72-AFB139E9DC21 v2

By using patented algorithm the IED can track the power system frequency in quite wide range from
9 Hz to 95 Hz. In order to do that, the three-phase voltage signal shall be connected to the IED. Then
IED can adapt its filtering algorithm in order to properly measure phasors of all current and voltage
signals connected to the IED. This feature is essential for proper operation of the PMUREPORT
function or for protection during generator start-up and shut-down procedure.

This adaptive filtering is ensured by proper configuration and settings of all relevant pre-processing
blocks, see Signal matrix for analog inputs in the Application manual. Note that in all preconfigured
IEDs such configuration and settings are already made and the three-phase voltage are used as
master for frequency tracking. With such settings the IED will be able to properly estimate the
magnitude and the phase angle of measured current and voltage phasors in this wide frequency
range.

One of the important functions of a PMU is reporting a very accurate system frequency to the PDC
client. In the IED, each of the PMUREPORT instances is able to report an accurate frequency. Each
voltage-connected preprocessor block (SMAI block) delivers the frequency data, derived from the
analog input AC voltage values, to the respective voltage phasor channel. Every phasor channel has
a user-settable parameter (PhasorXUseFreqSrc) to be used as a source of frequency data for

142 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

reporting to the PDC client. It is very important to set this parameter to On for the voltage-connected
phasor channels. There is an automatic frequency source selection logic to ensure an uninterrupted
reporting of the system frequency to the PDC client. In this frequency source selection logic, the
following general rules are applied:

• Only the voltage phasor channels are used

• The phasor channel with a lower channel number is prioritized to the one with a higher channel
number

As a result, the first voltage phasor is always the one delivering the system frequency to the PDC
client and if, by any reason, this voltage gets disconnected then the next available voltage phasor is
automatically used as the frequency source and so on. If the first voltage phasor comes back, since it
has a higher priority compare to the currently selected phasor channel, after 500 ms it will be
automatically selected again as the frequency source. There is also an output available on the
component which shows if the reference frequency is good, error or reference channel unavailable.

It is possible to monitor the status of the frequency reference channel (frequency source) for the
respective PMUREPORT instance on Local HMI under Test /Function status /Communication /
Station Communication /PMU Report /PMUREPORT:1 /Outputs , where the FREQREFCHSEL
output shows the selected channel as the reference for frequency and FREQREFCHERR output
states if the reference frequency is good, or if there is an error or if the reference channel is
unavailable. For more information refer to the table PMUREPORT monitored data.
PID-6244-MONITOREDDATA v2

Table 79: PMUREPORT Monitored data

Name Type Values (Range) Unit Description

TIMESTAT BOOLEAN 1=Ready - Time synchronization status
0=Fail
FREQ REAL - Hz Frequency
FREQGRAD REAL - - Rate of change of frequency
FREQREFCHSEL INTEGER - - Frequency reference channel number
selected
FREQREFCHERR BOOLEAN 0=Freq ref not - Frequency reference channel error
available
1=Freq ref error
2=Freq ref
available
FREQTRIG BOOLEAN - - Frequency trigger
DFDTTRIG BOOLEAN - - Rate of change of frequency trigger
MAGHIGHTRIG BOOLEAN - - Magnitude high trigger
MAGLOWTRIG BOOLEAN - - Magnitude low trigger

6.2.7.2 Reporting filters GUID-D39153B5-81CE-4C1F-A816-C7A4C3407048 v2

The PMUREPORT function block implements the reporting filters designed to avoid aliasing as the
reporting frequency is lower than the sample/calculation frequency. This means, the synchrophasor
and frequency data which are included in the C37.118 synchrophasor streaming data are filtered in
order to suppress aliasing effects, as the rate of the C37.118 data is slower than the data rate for
internal processing. For this purpose, there is an anti-aliasing filter designed for each reporting rate.
The correct anti-aliasing filter will be automatically selected based on the reporting rate and the
performance class (P/M) settings. The filters are designed to attenuate all aliasing frequencies to at
least -40 dB (a gain of 0.01) at M class.

The synchrophasor measurement is adaptive as it follows the fundamental

frequency over a wide range despite the reporting rate.

Transformer protection RET670 143

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 6 1MRK 504 164-UEN Rev. N
Wide area measurement system

For example, when the synchrophasor measurement follows the fundamental frequency beyond the
fixed Nyquist limits in C37.118 standard, the anti-aliasing filter stopband moves with the measured
fundamental frequency. This has to be considered in connection with C37.118, where the passband
is defined relative to a fixed nominal frequency as shown in the equation 2.

Fs
f0 ±
2
IECEQUATION2418 V1 EN-US (Equation 2)
where,

f0 is the nominal frequency

Fs is the reporting rate

6.2.7.3 Scaling Factors for ANALOGREPORT channels GUID-0DDAF6A9-8643-4FDD-97CF-9E35EF40AF7E v2

The internal calculation of analog values in the IED is based on 32 bit floating point. Therefore, if the
user selects to report the analog data (AnalogDataType) as Integer, there will be a down-conversion
of a 32 bit floating value to a new 16 bit integer value. In such a case, in order to optimize the
resolution of the reported analog data, the user-defined analog scaling is implemented in the IED.

The analog scaling in the IED is automatically calculated by use of the user-defined parameters
AnalogXRange for the respective analog channel X. The analog data value on the input X will have a
range between -AnalogXRange and +AnalogXRange. The resulting scale factor will be applied to the
reported analog data where applicable.

If the AnalogDataType is selected as Float, then these settings are ignored.

The analog scaling in the IED is calculated using the equation:

AnalogXRange ´ 2
S calefactor =
65535.0
offset = 0.0
65535.0 = 16 bit integer range
IECEQUATION2443 V1 EN-US

According to the IEEE C37.118.2 standard, the scale factors (conversion factor) for analog channels
are defined in configuration frame 2 (CFG-2) and configuration frame 3 (CFG-3) frames as follows:

• CFG-2 frame: The field ANUNIT (4 bytes) specifies the conversion factor as a signed 24 bit
word for user defined scaling. Since it is a 24 bit integer, in order to support the floating point
scale factor, the scale factor itself is multiplied in 10, so that a minimum of 0.1 scale factor can
be sent over the CFG-2 frame. The resulting scale factor is rounded to the nearest decimal
value. The clients receiving the Analog scale factor over CFG-2 should divide the received scale
factor by 10 and then apply it to the corresponding analog data value.
• CFG-3 frame: The field ANSCALE (8 bytes) specifies the conversion factor as X’ = M * X + B
where; M is magnitude scaling in 32 bit floating point (first 4 bytes) and B is the offset in 32 bit
floating point (last 4 bytes).

The server uses CFG-3 scale factor to scale the analog data values. As a result, the clients which
use scale factors in CFG-3 in order to recalculate analog values, will get a better resolution than
using the scale factors in CFG-2.

The following examples show how the scale factor is calculated.

Example 1:

AnalogXRange = 3277.0
IECEQUATION2446 V1 EN-US

144 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 6
Wide area measurement system

The scale factor is calculated as follows:

(3277.0 ´ 2.0 )
sc alefac tor = = 0.1 a nd offse t = 0.0
65535.0
IECEQUATION2447 V1 EN-US

The scale factor will be sent as 1 on configuration frame 2, and 0.1 on configuration frame 3. The
range of analog values that can be transmitted in this case is -0.1 to -3276.8 and +0.1 to +3276.7.

Example 2:

AnalogXRange = 4915.5
IECEQUATION2448 V1 EN-US

The scale factor is calculated as follows:

(4915.5 ´ 2.0 )
s c alefac tor = = 0.15 a nd offse t = 0.0
65535.0
IECEQUATION2449 V1 EN-US

The scale factor will be sent as 1 on configuration frame 2, and 0.15 on configuration frame 3. The
range of analog values that can be transmitted in this case is -0.15 to -4915.5 and +0.15 to +4915.5.

Example 3:

Analo gXRange = 10000000000

IECEQUATION2450 V1 EN-US

The scale factor is calculated as follows:

(10000000000 ´ 2.0)
sc alefac tor = = 305180.43 and offse t = 0.0
65535.5
IECEQUATION2451 V1 EN-US

The scale factor will be sent as 3051804 on configuration frame 2, and 305180.43 on configuration
frame 3. The range of analog values that can be transmitted in this case is -305181 to -10000000000
and +305181 to +10000000000.

6.2.8 Technical data SEMOD172233-1 v1

GUID-F0BAEBD8-E361-4D50-9737-7DF8B043D66A v5

Table 80: PMUREPORT technical data

Influencing quantity Range Accuracy

Signal frequency ± 0.1 x fr ≤ 1.0% TVE

Signal magnitude:
Voltage phasor (0.1–1.2) x Ur
Current phasor (0.5–2.0) x Ir

Phase angle ± 180°

Harmonic distortion 10% from 2nd – 50th
Interfering signal:
Magnitude 10% of fundamental signal
Minimum frequency 0.1 x fr
Maximum frequency 1000 Hz

Transformer protection RET670 145

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
146
1MRK 504 164-UEN Rev. N Section 7
Differential protection

Section 7 Differential protection

7.1 Transformer differential protection T2WPDIF and
T3WPDIF IP14639-1 v3

7.1.1 Identification
M15074-1 v5

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Transformer differential protection, two- T2WPDIF 87T
winding
3Id/I

SYMBOL-BB V1 EN-US

Transformer differential protection, T3WPDIF 87T

three-winding
3Id/I

SYMBOL-BB V1 EN-US

7.1.2 Functionality M16104-3 v19

The Transformer differential protection is provided with internal CT ratio matching, vector group
compensation and settable zero sequence current elimination.

The function can be provided with up to six three-phase sets of current inputs if enough HW is
available. All current inputs are provided with percentage bias restraint features, making the IED
suitable for two- or three-winding transformer in multi-breaker station arrangements.

Two-winding applications
two-winding power
transformer
xx05000048.vsd
IEC05000048 V1 EN-US

two-winding power
transformer with
unconnected delta
xx05000049.vsd tertiary winding
IEC05000049 V1 EN-US

two-winding power
transformer with two
circuit breakers and
xx05000050.vsd two CT-sets on one
IEC05000050 V1 EN-US
side
two-winding power
transformer with two
circuit breakers and
two CT-sets on both
sides

xx05000051.vsd
IEC05000051 V1 EN-US

Table continues on next page

Transformer protection RET670 147

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

Three-winding applications
three-winding power
transformer with all
three windings
connected

xx05000052.vsd
IEC05000052 V1 EN-US

three-winding power
transformer with two
circuit breakers and
two CT-sets on one
side

xx05000053.vsd
IEC05000053 V1 EN-US

Autotransformer with
two circuit breakers
and two CT-sets on
two out of three sides

xx05000057.vsd
IEC05000057 V1 EN-US

Figure 39: CT group arrangement

for differential protection

The setting facilities cover the application of the differential protection to all types of power
transformers and auto-transformers with or without load tap changer as well as shunt reactors and
local feeders within the station. An adaptive stabilizing feature is included for heavy through-fault
currents. By introducing the load tap changer position, the differential protection pick-up can be set to
optimum sensitivity thus covering internal faults with low fault current level.

Stabilization is included for inrush and overexcitation currents respectively, cross-blocking is also
available. Adaptive stabilization is also included for system recovery inrush and CT saturation during
external faults. A high set unrestrained differential current protection element is included for a very
high speed tripping at high internal fault currents.

Included is an sensitive differential protection element based on the theory of negative sequence
current component. This element offers the best possible coverage of power transformer windings
turn to turn faults.

148 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

7.1.3 Function block IP12643-1 v1

SEMOD54397-4 v5

T2WPDIF
I3PW1CT1* TRIP
I3PW1CT2* TRIPRES
I3PW2CT1* TRIPUNRE
I3PW2CT2* TRNSUNR
TAPOLTC1 TRNSSENS
OLTC1AL START
BLOCK STL1
BLKRES STL2
BLKUNRES STL3
BLKNSUNR BLK2H
BLKNSSEN BLK2HL1
BLK2HL2
BLK2HL3
BLK5H
BLK5HL1
BLK5HL2
BLK5HL3
BLKWAV
BLKWAVL1
BLKWAVL2
BLKWAVL3
IDALARM
OPENCT
OPENCTAL
IDL1
IDL2
IDL3
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG

IEC06000249_2_en.vsd
IEC06000249 V2 EN-US

Figure 40: T2WPDIF function block

SEMOD54551-4 v5

T3WPDIF
I3PW1CT1* TRIP
I3PW1CT2* TRIPRES
I3PW2CT1* TRIPUNRE
I3PW2CT2* TRNSUNR
I3PW3CT1* TRNSSENS
I3PW3CT2* START
TAPOLTC1 STL1
TAPOLTC2 STL2
OLTC1AL STL3
OLTC2AL BLK2H
BLOCK BLK2HL1
BLKRES BLK2HL2
BLKUNRES BLK2HL3
BLKNSUNR BLK5H
BLKNSSEN BLK5HL1
BLK5HL2
BLK5HL3
BLKWAV
BLKWAVL1
BLKWAVL2
BLKWAVL3
IDALARM
OPENCT
OPENCTAL
IDL1
IDL2
IDL3
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG

IEC06000250_2_en.vsd
IEC06000250 V2 EN-US

Figure 41: T3WPDIF function block

Transformer protection RET670 149

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

7.1.4 Signals
PID-6758-INPUTSIGNALS v1

Table 81: T2WPDIF Input signals

Name Type Default Description

I3PW1CT1 GROUP - Three phase winding primary CT1
SIGNAL
I3PW1CT2 GROUP - Three phase winding primary CT2
SIGNAL
I3PW2CT1 GROUP - Three phase winding secondary CT1
SIGNAL
I3PW2CT2 GROUP - Three phase winding secondary CT2
SIGNAL
TAPOLTC1 INTEGER 1 Most recent tap position reading on OLTC 1
OLTC1AL BOOLEAN 0 OLTC1 alarm
BLOCK BOOLEAN 0 Block of function
BLKRES BOOLEAN 0 Block of trip for restrained differential feature
BLKUNRES BOOLEAN 0 Block of trip for unrestrained differential feature
BLKNSUNR BOOLEAN 0 Block of trip for unrestr. neg. seq. differential feature
BLKNSSEN BOOLEAN 0 Block of trip for sensitive neg. seq. differential feature

PID-6758-OUTPUTSIGNALS v1

Table 82: T2WPDIF Output signals

Name Type Description

TRIP BOOLEAN General, common trip signal
TRIPRES BOOLEAN Trip signal from restrained differential protection
TRIPUNRE BOOLEAN Trip signal from unrestrained differential protection
TRNSUNR BOOLEAN Trip signal from unrestr. neg. seq. diff. protection
TRNSSENS BOOLEAN Trip signal from sensitive neg. seq. diff. protection
START BOOLEAN Common start signal from any phase
STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3
BLK2H BOOLEAN Common second harmonic block signal from any phase
BLK2HL1 BOOLEAN Second harmonic block signal, phase L1
BLK2HL2 BOOLEAN Second harmonic block signal, phase L2
BLK2HL3 BOOLEAN Second harmonic block signal, phase L3
BLK5H BOOLEAN Common fifth harmonic block signal from any phase
BLK5HL1 BOOLEAN Fifth harmonic block signal, phase L1
BLK5HL2 BOOLEAN Fifth harmonic block signal, phase L2
BLK5HL3 BOOLEAN Fifth harmonic block signal, phase L3
BLKWAV BOOLEAN Common block signal, waveform criterion, from any phase
BLKWAVL1 BOOLEAN Block signal, waveform criterion, phase L1
BLKWAVL2 BOOLEAN Block signal, waveform criterion, phase L2
BLKWAVL3 BOOLEAN Block signal, waveform criterion, phase L3
Table continues on next page

150 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

Name Type Description

IDALARM BOOLEAN Alarm for sustained diff currents in all three phases
OPENCT BOOLEAN An open CT was detected
OPENCTAL BOOLEAN Open CT Alarm output signal. Issued after a delay ...
IDL1 REAL Value of the instantaneous differential current, phase L1
IDL2 REAL Value of the instantaneous differential current, phase L2
IDL3 REAL Value of the instantaneous differential current, phase L3
IDL1MAG REAL Magnitude of fundamental freq. diff. current, phase L1
IDL2MAG REAL Magnitude of fundamental freq. diff. current, phase L2
IDL3MAG REAL Magnitude of fundamental freq. diff. current, phase L3
IBIAS REAL Magnitude of the bias current, which is common to all phases
IDNSMAG REAL Magnitude of the negative sequence differential current

PID-6757-INPUTSIGNALS v1

Table 83: T3WPDIF Input signals

Name Type Default Description

I3PW1CT1 GROUP - Three phase winding primary CT1
SIGNAL
I3PW1CT2 GROUP - Three phase winding primary CT2
SIGNAL
I3PW2CT1 GROUP - Three phase winding secondary CT1
SIGNAL
I3PW2CT2 GROUP - Three phase winding secondary CT2
SIGNAL
I3PW3CT1 GROUP - Three phase winding tertiary CT1
SIGNAL
I3PW3CT2 GROUP - Three phase winding tertiary CT2
SIGNAL
TAPOLTC1 INTEGER 1 Most recent tap position reading on OLTC 1
TAPOLTC2 INTEGER 1 Most recent tap position reading on OLTC 2
OLTC1AL BOOLEAN 0 OLTC1 alarm
OLTC2AL BOOLEAN 0 OLTC2 alarm
BLOCK BOOLEAN 0 Block of function
BLKRES BOOLEAN 0 Block of trip for restrained differential feature
BLKUNRES BOOLEAN 0 Block of trip for unrestrained differential feature
BLKNSUNR BOOLEAN 0 Block of trip for unrestr. neg. seq. differential feature
BLKNSSEN BOOLEAN 0 Block of trip for sensitive neg. seq. differential feature

PID-6757-OUTPUTSIGNALS v1

Table 84: T3WPDIF Output signals

Name Type Description

TRIP BOOLEAN General, common trip signal
TRIPRES BOOLEAN Trip signal from restrained differential protection
TRIPUNRE BOOLEAN Trip signal from unrestrained differential protection
TRNSUNR BOOLEAN Trip signal from unrestr. neg. seq. diff. protection
TRNSSENS BOOLEAN Trip signal from sensitive neg. seq. diff. protection
START BOOLEAN Common start signal from any phase
Table continues on next page

Transformer protection RET670 151

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

Name Type Description

STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3
BLK2H BOOLEAN Common second harmonic block signal from any phase
BLK2HL1 BOOLEAN Second harmonic block signal, phase L1
BLK2HL2 BOOLEAN Second harmonic block signal, phase L2
BLK2HL3 BOOLEAN Second harmonic block signal, phase L3
BLK5H BOOLEAN Common fifth harmonic block signal from any phase
BLK5HL1 BOOLEAN Fifth harmonic block signal, phase L1
BLK5HL2 BOOLEAN Fifth harmonic block signal, phase L2
BLK5HL3 BOOLEAN Fifth harmonic block signal, phase L3
BLKWAV BOOLEAN Common block signal, waveform criterion, from any phase
BLKWAVL1 BOOLEAN Block signal, waveform criterion, phase L1
BLKWAVL2 BOOLEAN Block signal, waveform criterion, phase L2
BLKWAVL3 BOOLEAN Block signal, waveform criterion, phase L3
IDALARM BOOLEAN Alarm for sustained diff currents in all three phases
OPENCT BOOLEAN An open CT was detected
OPENCTAL BOOLEAN Open CT Alarm output signal. Issued after a delay ...
IDL1 REAL Value of the instantaneous differential current, phase L1
IDL2 REAL Value of the instantaneous differential current, phase L2
IDL3 REAL Value of the instantaneous differential current, phase L3
IDL1MAG REAL Magnitude of fundamental freq. diff. current, phase L1
IDL2MAG REAL Magnitude of fundamental freq. diff. current, phase L2
IDL3MAG REAL Magnitude of fundamental freq. diff. current, phase L3
IBIAS REAL Magnitude of the bias current, which is common to all phases
IDNSMAG REAL Magnitude of the negative sequence differential current

7.1.5 Settings
PID-6758-SETTINGS v1

Table 85: T2WPDIF Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
SOTFMode Off - - On Operation mode for switch onto fault
On
tAlarmDelay 0.000 - 60.000 s 0.001 10.000 Time delay for diff currents alarm level
IDiffAlarm 0.05 - 1.00 IB 0.01 0.20 Dif. cur. alarm, multiple of base curr,
usually W1 curr.
IdMin 0.10 - 0.60 IB 0.01 0.30 Section1 sensitivity, multi. of base curr,
usually W1 curr.
IdUnre 1.00 - 100.00 IB 0.01 10.00 Unrestr. prot. limit, multiple of Winding 1
rated current
CrossBlockEn Off - - On Operation Off/On for cross-block logic
On between phases
Table continues on next page

152 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

Name Values (Range) Unit Step Default Description

NegSeqDiffEn Off - - On Operation Off/On for neg. seq.
On differential protections
IMinNegSeq 0.02 - 0.20 IB 0.01 0.04 Neg. seq. curr. must be higher than this
level to be used
NegSeqROA 30.0 - 120.0 Deg 0.1 60.0 Operate Angle for int. / ext. neg. seq.
fault discriminator

Table 86: T2WPDIF Group settings (advanced)

Name Values (Range) Unit Step Default Description

EndSection1 0.20 - 1.50 IB 0.01 1.25 End of section 1, multiple of Winding 1
rated current
EndSection2 1.00 - 10.00 IB 0.01 3.00 End of section 2, multiple of Winding 1
rated current
SlopeSection2 10.0 - 50.0 % 0.1 40.0 Slope in section 2 of operate-restrain
characteristic, in %
SlopeSection3 30.0 - 100.0 % 0.1 80.0 Slope in section 3 of operate-restrain
characteristic, in %
I2/I1Ratio 5.0 - 100.0 % 0.1 15.0 Max. ratio of 2nd harm. to fundamental
harm dif. curr. in %
I5/I1Ratio 5.0 - 100.0 % 0.1 25.0 Max. ratio of 5th harm. to fundamental
harm dif. curr. in %
OpenCTEnable Off - - Off Open CT detection feature. Open
On CTEnable Off/On
tOCTAlarmDelay 0.100 - 10.000 s 0.001 3.000 Open CT: time in s to alarm after an
open CT is detected
tOCTResetDelay 0.100 - 10.000 s 0.001 0.250 Reset delay in s. After delay, diff.
function is activated
tOCTUnrstDelay 0.10 - 6000.00 s 0.01 10.00 Unrestrained diff. protection blocked
after this delay, in s

Table 87: T2WPDIF Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSelW1 1 - 12 - 1 1 Global base selector for winding 1
GlobalBaseSelW2 1 - 12 - 1 1 Global base selector for winding 2
ConnectTypeW1 WYE (Y) - - WYE (Y) Connection type of winding 1: Y-wye or
Delta (D) D-delta
ConnectTypeW2 WYE (Y) - - WYE (Y) Connection type of winding 2: Y-wye or
Delta (D) D-delta
ClockNumberW2 0 [0 deg] - - 0 [0 deg] Phase displacement between W2 &
1 [30 deg lag] W1=HV winding, hour notation
2 [60 deg lag]
3 [90 deg lag]
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg]
7 [150 deg lead]
8 [120 deg lead]
9 [90 deg lead]
10 [60 deg lead]
11 [30 deg lead]
ZSCurrSubtrW1 Off - - On Enable zer. seq. current subtraction for
On W1 side, On / Off
ZSCurrSubtrW2 Off - - On Enable zer. seq. current subtraction for
On W2 side, On / Off
Table continues on next page

Transformer protection RET670 153

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

Name Values (Range) Unit Step Default Description

TconfigForW1 No - - No Two CT inputs (T-config.) for winding 1,
Yes YES / NO
CT1RatingW1 1 - 99999 A 1 3000 CT primary rating in A, T-branch 1, on
transf. W1 side
CT2RatingW1 1 - 99999 A 1 3000 CT primary in A, T-branch 2, on transf.
W1 side
TconfigForW2 No - - No Two CT inputs (T-config.) for winding 2,
Yes YES / NO
CT1RatingW2 1 - 99999 A 1 3000 CT primary rating in A, T-branch 1, on
transf. W2 side
CT2RatingW2 1 - 99999 A 1 3000 CT primary rating in A, T-branch 2, on
transf. W2 side
LocationOLTC1 Not Used - - Not Used Transformer winding where OLTC1 is
Winding 1 (W1) located
Winding 2 (W2)
LowTapPosOLTC1 0 - 10 - 1 1 OLTC1 lowest tap position designation
(e.g. 1)
RatedTapOLTC1 1 - 100 - 1 6 OLTC1 rated tap/mid-tap position
designation (e.g. 6)
HighTapPsOLTC1 1 - 100 - 1 11 OLTC1 highest tap position designation
(e.g. 11)
TapHighVoltTC1 1 - 100 - 1 1 OLTC1 end-tap position with winding
highest no-load voltage
StepSizeOLTC1 0.01 - 30.00 % 0.01 1.00 Voltage change per OLTC1 step in
percent of rated voltage

PID-6757-SETTINGS v1

Table 88: T3WPDIF Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
SOTFMode Off - - On Operation mode for switch onto fault
On feature
tAlarmDelay 0.000 - 60.000 s 0.001 10.000 Time delay for diff currents alarm level
IDiffAlarm 0.05 - 1.00 IB 0.01 0.20 Dif. cur. alarm, multiple of base curr,
usually W1 curr.
IdMin 0.10 - 0.60 IB 0.01 0.30 Section1 sensitivity, multi. of base curr,
usually W1 curr.
IdUnre 1.00 - 100.00 IB 0.01 10.00 Unrestr. prot. limit, multi. of base curr.
usually W1 curr.
CrossBlockEn Off - - On Operation Off/On for cross-block logic
On between phases
NegSeqDiffEn Off - - On Operation Off/On for neg. seq.
On differential protections
IMinNegSeq 0.02 - 0.20 IB 0.01 0.04 Neg. seq. curr. limit, mult. of base curr,
usually W1 curr.
NegSeqROA 30.0 - 120.0 Deg 0.1 60.0 Operate Angle for int. / ext. neg. seq.
fault discriminator

154 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

Table 89: T3WPDIF Group settings (advanced)

Name Values (Range) Unit Step Default Description

EndSection1 0.20 - 1.50 IB 0.01 1.25 End of section 1, multi. of base current,
usually W1 curr.
EndSection2 1.00 - 10.00 IB 0.01 3.00 End of section 2, multi. of base current,
usually W1 curr.
SlopeSection2 10.0 - 50.0 % 0.1 40.0 Slope in section 2 of operate-restrain
characteristic, in %
SlopeSection3 30.0 - 100.0 % 0.1 80.0 Slope in section 3 of operate-restrain
characteristic, in %
I2/I1Ratio 5.0 - 100.0 % 0.1 15.0 Max. ratio of 2nd harm. to fundamental
harm dif. curr. in %
I5/I1Ratio 5.0 - 100.0 % 0.1 25.0 Max. ratio of 5th harm. to fundamental
harm dif. curr. in %
OpenCTEnable Off - - Off Open CT detection feature. Open
On CTEnable Off/On
tOCTAlarmDelay 0.100 - 10.000 s 0.001 3.000 Open CT: time in s to alarm after an
open CT is detected
tOCTResetDelay 0.100 - 10.000 s 0.001 0.250 Reset delay in s. After delay, diff.
function is activated
tOCTUnrstDelay 0.10 - 6000.00 s 0.01 10.00 Unrestrained diff. protection blocked
after this delay, in s

Table 90: T3WPDIF Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSelW1 1 - 12 - 1 1 Global base selector for winding 1
GlobalBaseSelW2 1 - 12 - 1 1 Global base selector for winding 2
GlobalBaseSelW3 1 - 12 - 1 1 Global base selector for winding 3
ConnectTypeW1 WYE (Y) - - WYE (Y) Connection type of winding 1: Y-wye or
Delta (D) D-delta
ConnectTypeW2 WYE (Y) - - WYE (Y) Connection type of winding 2: Y-wye or
Delta (D) D-delta
ConnectTypeW3 WYE (Y) - - Delta (D) Connection type of winding 3: Y-wye or
Delta (D) D-delta
ClockNumberW2 0 [0 deg] - - 0 [0 deg] Phase displacement between W2 &
1 [30 deg lag] W1=HV winding, hour notation
2 [60 deg lag]
3 [90 deg lag]
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg]
7 [150 deg lead]
8 [120 deg lead]
9 [90 deg lead]
10 [60 deg lead]
11 [30 deg lead]
Table continues on next page

Transformer protection RET670 155

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

Name Values (Range) Unit Step Default Description

ClockNumberW3 0 [0 deg] - - 5 [150 deg lag] Phase displacement between W3 &
1 [30 deg lag] W1=HV winding, hour notation
2 [60 deg lag]
3 [90 deg lag]
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg]
7 [150 deg lead]
8 [120 deg lead]
9 [90 deg lead]
10 [60 deg lead]
11 [30 deg lead]
ZSCurrSubtrW1 Off - - On Enable zer. seq. current subtraction for
On W1 side, On / Off
ZSCurrSubtrW2 Off - - On Enable zer. seq. current subtraction for
On W2 side, On / Off
ZSCurrSubtrW3 Off - - On Enable zer. seq. current subtraction for
On W3 side, On / Off
TconfigForW1 No - - No Two CT inputs (T-config.) for winding 1,
Yes YES / NO
CT1RatingW1 1 - 99999 A 1 3000 CT primary rating in A, T-branch 1, on
transf. W1 side
CT2RatingW1 1 - 99999 A 1 3000 CT primary in A, T-branch 2, on transf.
W1 side
TconfigForW2 No - - No Two CT inputs (T-config.) for winding 2,
Yes YES / NO
CT1RatingW2 1 - 99999 A 1 3000 CT primary rating in A, T-branch 1, on
transf. W2 side
CT2RatingW2 1 - 99999 A 1 3000 CT primary rating in A, T-branch 2, on
transf. W2 side
TconfigForW3 No - - No Two CT inputs (T-config.) for winding 3,
Yes YES / NO
CT1RatingW3 1 - 99999 A 1 3000 CT primary rating in A, T-branch 1, on
transf. W3 side
CT2RatingW3 1 - 99999 A 1 3000 CT primary rating in A, T-branch 2, on
transf. W3 side
LocationOLTC1 Not Used - - Not Used Transformer winding where OLTC1 is
Winding 1 (W1) located
Winding 2 (W2)
Winding 3 (W3)
LowTapPosOLTC1 0 - 10 - 1 1 OLTC1 lowest tap position designation
(e.g. 1)
RatedTapOLTC1 1 - 100 - 1 6 OLTC1 rated tap/mid-tap position
designation (e.g. 6)
HighTapPsOLTC1 1 - 100 - 1 11 OLTC1 highest tap position designation
(e.g. 11)
TapHighVoltTC1 1 - 100 - 1 1 OLTC1 end-tap position with winding
highest no-load voltage
StepSizeOLTC1 0.01 - 30.00 % 0.01 1.00 Voltage change per OLTC1 step in
percent of rated voltage
LocationOLTC2 Not Used - - Not Used Transformer winding where OLTC2 is
Winding 1 (W1) located
Winding 2 (W2)
Winding 3 (W3)
Table continues on next page

156 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

Name Values (Range) Unit Step Default Description

LowTapPosOLTC2 0 - 10 - 1 1 OLTC2 lowest tap position designation
(e.g. 1)
RatedTapOLTC2 1 - 100 - 1 6 OLTC2 rated tap/mid-tap position
designation (e.g. 6)
HighTapPsOLTC2 1 - 100 - 1 11 OLTC2 highest tap position designation
(e.g. 11)
TapHighVoltTC2 1 - 100 - 1 1 OLTC2 end-tap position with winding
highest no-load voltage
StepSizeOLTC2 0.01 - 30.00 % 0.01 1.00 Voltage change per OLTC2 step in
percent of rated voltage

7.1.6 Monitored data

PID-6758-MONITOREDDATA v1

Table 91: T2WPDIF Monitored data

Name Type Values (Range) Unit Description

IDL1MAG REAL - A Magnitude of fundamental freq. diff.
current, phase L1
IDL2MAG REAL - A Magnitude of fundamental freq. diff.
current, phase L2
IDL3MAG REAL - A Magnitude of fundamental freq. diff.
current, phase L3
IBIAS REAL - A Magnitude of the bias current, which is
common to all phases
IDNSMAG REAL - A Magnitude of the negative sequence
differential current

PID-3713-MONITOREDDATA v6

Table 92: T3WPDIF Monitored data

Name Type Values (Range) Unit Description

IDL1MAG REAL - A Magnitude of fundamental freq. diff.
current, phase L1
IDL2MAG REAL - A Magnitude of fundamental freq. diff.
current, phase L2
IDL3MAG REAL - A Magnitude of fundamental freq. diff.
current, phase L3
IBIAS REAL - A Magnitude of the bias current, which is
common to all phases
IDNSMAG REAL - A Magnitude of the negative sequence
differential current

7.1.7 Operation principle

M13039-3 v8
The task of the power transformer differential protection is to determine whether a fault is within the
protected zone, or outside of the protected zone. The protected zone is limited by the position of
current transformers (see Figure 42), and in principle can include more objects than just a
transformer. If the fault is found to be internal, the faulty power transformer must be quickly
disconnected from the system.

The main CTs are normally supposed to be star connected. The main CTs can be earthed in anyway
(that is, either "ToObject" or "FromObject"). However internally the differential function will always use
reference directions towards the protected transformer as shown in Figure 42. Thus the IED will
always internally measure the currents on all sides of the power transformer with the same reference

Transformer protection RET670 157

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

direction towards the power transformer windings as shown in Figure 42. For more information see
the Application manual.

IW1 IW2

Z1S1 Z1S2
E1S1 E1S2

IW1 IW2

IED

en05000186.vsd
IEC05000186 V1 EN-US

Figure 42: Typical CT location and definition of positive current direction

Even in a healthy power transformer, the currents are generally not equal when they flow through it.
This is due to the ratio of the number of turns of the windings and the connection group of the
protected transformer. Therefore the differential protection must first correlate all currents to each
other before any calculation can be performed.

First, compensation for the protected transformer transformation ratio and connection group is made,
and only then are the currents compared phase-wise. This makes external auxiliary (interposing)
current transformers unnecessary. Conversion of all currents to the common reference side of the
power transformer is performed by pre-programmed coefficient matrices, which depends on the
protected power transformer transformation ratio and connection group. Once the power transformer
vector group, rated currents and voltages have been entered by the user, the differential protection is
capable to calculate off-line matrix coefficients required in order to perform the on-line current
comparison by means of a fixed equation.

The negative-sequence-current-based internal-external fault discriminator, is used with advantage in

order to determine whether a fault is internal or external. It not only positively discriminates between
internal and external faults, but can also independently detect minor faults which may not be sensed
by the "usual" differential protection based on operate-restrain characteristic.

For all differential functions it is the common trip that is used to initiate a trip of a
breaker. The separate trip signals from the different parts lacks the safety against
maloperation. This will in some cases result in a 6 ms time difference between, for
example restrained trip is issued and common trip is issued. The separate trip
signals are only used for information purpose of which part that has caused the trip.

7.1.7.1 Function calculation principles M13039-12 v4

To make a differential IED as sensitive and stable as possible, restrained differential characteristics
have been developed and is now adopted as the general practice in the protection of power
transformers. The protection should be provided with a proportional bias, which makes the protection
operate for a certain percentage differential current related to the current through the transformer.
This stabilizes the protection under through fault conditions while still permitting the system to have
good basic sensitivity. The following chapters explain how these quantities are derived.

Fundamental frequency differential currents M13039-15 v10

The fundamental frequency differential current is a vectorial sum (sum of fundamental frequency
phasors) of the individual phase currents from the different sides of the protected power transformer.

Before any differential current can be calculated, the power transformer phase shift, and its
transformation ratio, must be accounted for. Conversion of all currents to a common reference is
performed in two steps:

158 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

• all current phasors are phase-shifted to (referred to) the phase-reference side, (whenever
possible the first HV winding with star connection)
• all currents magnitudes are always referred to the first winding of the power transformer
(typically transformer high-voltage side)

The two steps of conversion are made simultaneously on-line by the pre-programmed coefficient
matrices, as shown in equation 3 for a two-winding power transformer, and in equation 4 for a three-
winding power transformer.

These are the internal compensation within the differential function. The protected
power transformer data is always entered per its nameplate. The Differential function
will correlate nameplate data and select proper reference windings.

é IDL1 ù é IL1_ W 1 ù é IL1_ W 2 ù

ê IDL 2 ú = A × ê IL 2 _ W 1ú + Un _ W 2 × B × ê IL 2 _ W 2 ú
ê ú ê ú Un _ W 1 ê ú
êë IDL3 úû êë IL3 _ W 1úû êë IL3 _ W 2 úû

1 2 3
EQUATION1880 V1 EN-US (Equation 3)

where:
1. is the resulting Differential Currents
2. is the current contribution from the W1 side
3. is the current contribution from the W2 side

é IDL1 ù é IL1_ W 1 ù é IL1_ W 2 ù é IL1_ W 3 ù

ê IDL 2 ú = A × ê IL 2 _ W 1ú + Un _ W 2 × B × ê IL 2 _ W 2 ú + Un _ W 3 × C × ê IL 2 _ W 3ú
ê ú ê ú Un _ W 1 ê ú Un _ W 1 ê ú
êë IDL3 úû êë IL3 _ W 1úû êë IL3 _ W 2 úû êë IL3 _ W 3 úû

1 2 3 4
EQUATION1556 V2 EN-US (Equation 4)

where:
1. is the resulting Differential Currents
2. is the current contribution from the W1 side
3. is the current contribution from the W2 side
4. is the current contribution from the W3 side

and where, for equation 3 and equation 4:

IDL1 is the fundamental frequency differential current in phase L1 (in W1 side primary
amperes)
IDL2 is the fundamental frequency differential current in phase L2 (in W1 side primary
amperes)
IDL3 is the fundamental frequency differential current in phase L3 (in W1 side primary
amperes)
IL1_W1 is the fundamental frequency phase current in phase L1 on the W1 side
Table continues on next page

Transformer protection RET670 159

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

IL2_W1 is the fundamental frequency phase current in phase L2 on the W1 side

IL3_W1 is the fundamental frequency phase current in phase L3 on the W1 side
IL1_W2 is the fundamental frequency phase current in phase L1 on the W2 side
IL2_W2 is the fundamental frequency phase current in phase L2 on the W2 side
IL3_W2 is the fundamental frequency phase current in phase L3 on the W2 side
IL1_W3 is the fundamental frequency phase current in phase L1 on the W3 side
IL2_W3 is the fundamental frequency phase current in phase L2 on the W3 side
IL3_W3 is the fundamental frequency phase current in phase L3 on the W3 side
Ur_W1 is transformer rated phase-to-phase voltage on the W1 side (setting parameter)
Ur_W2 is transformer rated phase-to-phase voltage on the W2 side (setting parameter)
Ur_W3 is transformer rated phase-to-phase voltage on the W3 side (setting parameter)
A, B and C are three by three matrices with numerical coefficients

Values of the matrix A, B and C coefficients depend on:

1. The Power transformer winding connection type, such as star (Y/y) or delta (D/d)
2. The Transformer vector group such as Yd1, Dy11, YNautod5, Yy0d5 and so on, which introduce
phase displacement between individual windings currents in multiples of 30°.
3. The Settings for elimination of zero sequence currents for the individual windings.

When the end user enters all these parameters, transformer differential function automatically
calculates the matrix coefficients. During this calculations the following rules are used:

For the phase reference, the first winding with set star (Y) connection is always used. For example, if
the power transformer is a Yd1 power transformer, the HV winding (Y) is taken as the phase
reference winding. If the power transformer is a Dy1, then the LV winding (y) is taken for the phase
reference. If there is no star connected winding, such as in Dd0 type of power transformers, then the
HV delta winding (D) is automatically chosen as the phase reference winding.

The fundamental frequency differential currents are in general composed of currents of all
sequences, that is, the positive-, the negative-, and the zero-sequence currents. If the zero-sequence
currents are eliminated (see section "Optional Elimination of zero sequence currents"), then the
differential currents can consist only of the positive-, and the negative-sequence currents. When the
zero-sequence current is subtracted on one side of the power transformer, then it is subtracted from
each individual phase current.

As it can be seen from equation 3 and equation 4 the first entered winding (W1) is always taken for
ampere level reference (current magnitudes from all other sides are always transferred to W1 side).
In other words, within the differential protection function, all differential currents and bias current are
always expressed in HV side primary Amperes.

It can be shown that the values of the matrix A, B & C coefficients (see equation 3 and equation 4)
can be pre-calculated in advance depending on the relative phase shift between the reference
winding and other power transformer windings.

Table 93 summarizes the values of the matrices for all standard phase shifts between windings.

160 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

Table 93: Matrices for differential current calculation

Matrix with Zero Sequence Matrix with Zero Sequence Reduction set to
Reduction set to On Off
Matrix for Reference Winding
é 2 -1 -1ù é1 0 0 ù
1 ê
× -1 2 -1ú ê0 1 0 ú
3 ê ú ê ú
êë -1 -1 2 úû êë0 0 1 úû
EQUATION1227 V1 EN-US (Equation 5) EQUATION1228 V1 EN-US (Equation 6)
Matrix for winding with 30° Not applicable. Matrix on the left used.
lagging é 1 -1 0 ù
1 ê
× 0 1 -1ú
3 ê ú
êë -1 0 1 úû
EQUATION1229 V1 EN-US (Equation 7)
Matrix for winding with 60°
lagging é1 -2 1ù é 0 -1 0 ù
1 ê
× 1 1 -2 ú ê 0 0 -1ú
3 ê ú ê ú
êë -2 1 1 úû êë -1 0 0 úû
EQUATION1230 V1 EN-US (Equation 8) EQUATION1231 V1 EN-US (Equation 9)
Matrix for winding with 90° Not applicable. Matrix on the left used.
lagging é 0 -1 1 ù
1
× ê 1 0 -1ú
3 ê ú
êë -1 1 0 úû
EQUATION1232 V1 EN-US (Equation 10)
Matrix for winding with 120°
lagging é -1 -1 2 ù é0 0 1 ù
1 ê
× 2 -1 -1ú ê1 0 0 ú
3 ê ú ê ú
êë -1 2 -1úû ëê0 1 0 úû
EQUATION1233 V1 EN-US (Equation 11) EQUATION1234 V1 EN-US (Equation 12)
Matrix for winding with 150° Not applicable. Matrix on the left used.
lagging é-1 0 1 ù
1
× ê 1 -1 0 ú
3 ê ú
ëê 0 1 -1ûú
EQUATION1235 V1 EN-US (Equation 13)
Matrix for winding which is in
opposite phase é -2 1 1ù é -1 0 0 ù
1 ê
× 1 -2 1 ú ê 0 -1 0 ú
3 ê ú ê ú
ëê 1 1 -2 ûú ëê 0 0 -1ûú
EQUATION1236 V1 EN-US (Equation 14) EQUATION1237 V1 EN-US (Equation 15)
Matrix for winding with 150° Not applicable. Matrix on the left used.
leading é-1 1 0 ù
1
× ê 0 -1 1 ú
3 ê ú
ëê 1 0 -1ûú
EQUATION1238 V1 EN-US (Equation 16)
Matrix for winding with 120°
leading é -1 2 -1ù é0 1 0 ù
1 ê
× -1 -1 2 ú ê0 0 1 ú
3 ê ú ê ú
ëê 2 -1 -1ûú ëê1 0 0 úû
EQUATION1239 V1 EN-US (Equation 17) EQUATION1240 V1 EN-US (Equation 18)

Table continues on next page

Transformer protection RET670 161

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

Matrix with Zero Sequence Matrix with Zero Sequence Reduction set to
Reduction set to On Off
Matrix for winding with 90° Not applicable. Matrix on the left used.
leading é 0 1 -1ù
1
× ê -1 0 1 ú
3 ê ú
ëê 1 -1 0 úû
EQUATION1241 V1 EN-US (Equation 19)
Matrix for winding with 60°
leading é1 1 -2 ù é 0 0 -1ù
1 ê ê -1 0 0 ú
× -2 1 1ú
3 ê ú ê ú
ëê 1 -2 1 ûú ëê 0 -1 0 úû
EQUATION1242 V1 EN-US (Equation 20) EQUATION1243 V1 EN-US (Equation 21)
Matrix for winding with 30° Not applicable. Matrix on the left used.
leading é 1 0 -1ù
1
× ê -1 1 0 ú
3 ê ú
ëê 0 -1 1 úû
EQUATION1244 V1 EN-US (Equation 22)

By using this table complete equation for calculation of fundamental frequency differential currents
for two winding power transformer with YNd5 vector group and enabled zero sequence current
reduction on HV side will be derived. From the given power transformer vector group the following is
possible to be concluded:

1. The HV star (Y) connected winding will be used as the reference winding and zero sequence
currents shall be subtracted on that side
2. The LV winding is lagging for 150°

With the help of table 93, the following matrix equation can be written for this power transformer:

é IDL1ù é 2 -1 -1ù é IL1_ W1ù é-1 0 1 ù é IL1_ W 2 ù

ê IDL2ú = 1 × ê-1 2 -1ú × ê IL2 _ W1ú + Ur _ W 2 × 1 × ê 1 -1 0 ú × ê IL2 _ W 2ú
ê ú 3 ê ú ê ú Ur _ W1 3 ê ú ê ú
ëê IDL3ûú ëê-1 -1 2 ûú ëê IL3_ W1ûú ëê 0 1 -1ûú ëê IL3_ W 2 ûú
EQUATION2015 V1 EN-US (Equation 23)

where:
IDL1 is the fundamental frequency differential current in phase L1 (in W1 side primary
amperes)
IDL2 is the fundamental frequency differential current in phase L2 (in W1 side primary
amperes)
IDL3 is the fundamental frequency differential current in phase L3 (in W1 side primary
amperes)
IL1_W1 is the fundamental frequency phase current in phase L1 on the W1 side
IL2_W1 is the fundamental frequency phase current in phase L2 on the W1 side
IL3_W1 is the fundamental frequency phase current in phase L3 on the W1 side
IL1_W2 is the fundamental frequency phase current in phase L1 on the W2 side
IL2_W2 is the fundamental frequency phase current in phase L2 on the W2 side
IL3_W2 is the fundamental frequency phase current in phase L3 on the W2 side
Ur_W1 is transformer rated phase-to-phase voltage on the W1 side (setting parameter)
Ur_W2 is transformer rated phase-to-phase voltage on the W2 side (setting parameter)

162 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

As marked in equation 3 and equation 4, the first term on the right hand side of the equation,
represents the total contribution from the individual phase currents from the W1 side to the
fundamental frequency differential currents, compensated for eventual power transformer phase
shift. The second term on the right hand side of the equation, represents the total contribution from
the individual phase currents from the W2 side to the fundamental frequency differential currents,
compensated for eventual power transformer phase shift and transferred to the power transformer
W1 side. The third term on the right hand side of the equation, represents the total contribution from
the individual phase currents from the W3 side to the fundamental frequency differential currents,
compensated for eventual power transformer phase shift and transferred to the power transformer
W1 side. These current contributions are important, because they are used for calculation of
common bias current.

The fundamental frequency differential currents are the "usual" differential currents, the magnitudes
which are applied in a phase-wise manner to the operate - restrain characteristic of the differential
protection. The magnitudes of the differential currents can be read as service values from the
function and they are available as outputs IDL1MAG, IDL2MAG, IDL3MAG from the differential
protection function block. Thus they can be connected to the disturbance recorder and automatically
recorded during any external or internal fault condition.

On-line compensation for load tap changer movement M13039-424 v5

A load tap changer is a mechanical device, which is used to step-wise change number of turns within
one power transformer winding. Consequently the power transformer overall turns ratio is changed.
Typically the load tap changer is located within the HV winding (that is, winding 1, W1) of the power
transformer. By operating load tap changer, it is possible to step-wise regulate voltage on the LV side
of the power transformer. However at the same time the differential protection for power transformer
becomes unbalanced. Differential function in the IED has built-in feature to continuously monitor the
load tap changer position and dynamically compensate on-line for changes in power transformer
turns ratio.

Differential currents are calculated as shown in equation and equation . By setting parameters, the
winding location of the OLTC is defined. Also, the voltage change of each step. Thus, if for example
the load tap changer is located within winding 1 the no-load voltage Vn_W1 will be treated as a
function of the actual load tap changer position in equation and equation . Thus for every load tap
changer position a corresponding value for Ur_W1 will be calculated and used in the above
mentioned equations. By doing this, complete on-line compensation for load tap changer movement
is achieved. Differential protection will be ideally balanced for every load tap changer position and no
false differential current will appear irrespective of actual load tap changer position.

Typically the minimum differential protection pickup for power transformer with load tap changer is
set between 30% to 40%. However with this load tap changer compensation feature it is possible to
set the differential protection in the IED more sensitive with a pickup value of 15% to 20%.

Load tap changer position is measured within the IED by Tap changer control and supervision,
(TCLYLTC). Within this function block, the load tap changer position value is continuously monitored
to insure its integrity.

When any error in the load tap changer position is detected an alarm is given. This signal shall be
connected to the OLTCxAL input of the differential function block. While OLTCxAL input has a logical
value of one the differential protection minimum pickup, originally defined by setting parameter IdMin,
will be increased by the set range of the load tap changer. Alternatively the differential current alarm
feature can be used to alarm for any problems in the whole load tap changer compensation chain.

It shall be noted that:

• two-winding differential protection in the IED can on-line compensate for one load tap changer
within the protected power transformer
• three-winding differential protection in the IED can on-line compensate for up to two load tap
changers within the protected power transformer

Transformer protection RET670 163

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

Differential current alarm M13039-436 v6

Fundamental frequency differential current level is monitored all the time within the differential
function. As soon as all three fundamental frequency differential currents are above the set threshold
defined by setting parameter IDiffAlarm a delay on pickup timer is started. When the pre-set time,
defined by setting parameter tAlarmDelay, has expired the differential current alarm is generated and
output signal IDALARM is set to logical value one. This feature can be effectively used to provide
alarm when load tap changer position compensation is used and something in the whole
compensation chain goes wrong. This alarm can be as well used with some additional IED
configuration logic to desensitize the differential function.

Bias current M13039-179 v5

The bias current is calculated as the highest current amongst all individual winding current
contributions to the total fundamental frequency differential currents, as shown in equation and
equation . All individual winding current contributions are already referred to the power transformer
winding one side (power transformer HV winding) and therefore they can be compared regarding
their magnitudes. There are six (or nine in the case of a three-winding transformer) contributions to
the total fundamental differential currents, which are the candidates for the common bias current. The
highest individual current contribution is taken as a common bias (restrain) current for all three
phases. This "maximum principle" makes the differential protection more secure, with less risk to
operate for external faults and in the same time brings more meaning to the breakpoint settings of
the operate - restrain characteristic.

It shall be noted that if the zero-sequence currents are subtracted from the separate contributions to
the total differential current, then the zero-sequence component is automatically eliminated from the
bias current as well. This ensures that for secondary injection from just one power transformer side
the bias current is always equal to the highest differential current regardless of the fault type. During
normal through-load operation of the power transformer, the bias current is equal to the maximum
load current from two (three) -power transformer windings.

The magnitudes of the common bias (restrain) current expressed in HV side amperes can be read as
service value from the function. At the same time it is available as an output IBIAS from the
differential protection function block. It can be connected to the disturbance recorder and
automatically recorded during any external or internal fault condition.

For application with so called "T" configuration, that is, two restraint CT inputs from one side of the
protected power transformer, such as in the case of breaker-and-a-half schemes the primary CT
ratings can be much higher than the rating of the protected power transformer. In order to determine
the bias current for such T configuration, the two separate currents flowing in the T-side are scaled
down to the protected power transform level by means of additional settings. This is done in order to
prevent unwanted de-sensitizing of the overall differential protection. In addition to that, the resultant
currents (the sum of two currents) into the protected power transformer winding, which is not directly
measured is calculated, and included in the common bias calculation. The rest of the bias calculation
procedure is the same as in protection schemes without breaker-and-a-half arrangements.

Optional Elimination of zero sequence currents M13039-185 v8

To avoid unwanted trips for external earth-faults, the zero sequence currents should be subtracted on
the side of the protected power transformer, where the zero sequence currents can flow at external
earth -faults.

The zero sequence currents can be explicitly eliminated from the differential currents and common
bias current calculation by special, dedicated parameter settings, which are available for every
individual winding.

Elimination of the zero sequence component of current is necessary whenever:

• the protected power transformer cannot transform the zero sequence currents to the other side.
• the zero sequence currents can only flow on one side of the protected power transformer.

In most cases, power transformers do not properly transform the zero sequence current to the other
side. A typical example is a power transformer of the star-delta type, for example YNd1.
Transformers of this type do not transform the zero sequence quantities, but zero sequence currents

164 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

can flow in the earthed star- connected winding. In such cases, an external earth-fault on the star-
side causes zero sequence current to flow on the star-side of the power transformer, but not on the
other side. This results in false differential currents - consisting exclusively of the zero sequence
currents. If high enough, these false differential currents can cause an unwanted disconnection of the
healthy power transformer. They must therefore be subtracted from the fundamental frequency
differential currents if an unwanted trip is to be avoided.

For delta windings this feature shall be enabled only if an earthing transformer exists within the
differential zone on the delta side of the protected power transformer.

Removing the zero sequence current from the differential currents decreases to some extent the
sensitivity of the differential protection for internal earth -faults. In order to counteract this effect to
some degree, the zero sequence current is subtracted not only from the three fundamental frequency
differential currents, but from the bias current as well.

Restrained and unrestrained limits of the differential protection M13039-194 v8

The power transformer differential protection function uses two limits, to which actual magnitudes of
the three fundamental frequency differential currents are compared at each execution of the function.

The unrestrained (that is, non-stabilized, "instantaneous") part of the differential protection is used for
very high differential currents, where it should be beyond any doubt, that the fault is internal. This
settable limit is constant and not proportional to the bias current. Neither harmonic, nor any other
restrain is applied to this limit, which is therefore allowed to trip the power transformer
instantaneously.

The restrained (stabilized) part of the differential protection compares the calculated fundamental
differential (operating) currents and the bias (restrain) current, by applying them to the operate -
restrain characteristic. Practically, the magnitudes of the individual fundamental frequency differential
currents are compared with an adaptive limit. This limit is adaptive because it is dependent on the
bias (that is, restrain) current magnitude. This limit is called the operate - restrain characteristic. It is
represented by a double-slope, double-breakpoint characteristic, as shown in figure 43. The
restrained characteristic is determined by the following 5 settings:

1. IdMin (Sensitivity in section 1, multiple of trans. HV side rated current set under the parameter
RatedCurrentW1)
2. EndSection1 (End of section 1, as multiple of transformer HV side rated current set under the
parameter RatedCurrentW1)
3. EndSection2 (End of section 2, as multiple of transformer HV side rated current set under the
parameter RatedCurrentW1)
4. SlopeSection2 (Slope in section 2, as multiple of transformer HV side rated current set under the
parameter RatedCurrentW1)
5. SlopeSection3 (Slope in section 2, as multiple of transformer HV side rated current set under the
parameter RatedCurrentW1)

For three-winding transformer, if the HV winding is not the one with highest power rating, the
parameters of operate-bias characteristic (Idmin, EndSection1 and EndSection2) will be adapted by
multiplying a scale factor Smax/S1 so that the winding with highest power rating is taken into
account. Smax and S1 can be calculated from the rated voltage and current for each winding.

The restrained characteristic in figure 43 is defined by the settings:

1. IdMin
2. EndSection1
3. EndSection2
4. SlopeSection2
5. SlopeSection3

Transformer protection RET670 165

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

operate current
[ times IBase ]
Operate
5
unconditionally

UnrestrainedLimit
4

Operate
3
conditionally

2
Section 1 Section 2 Section 3

SlopeSection3
1
IdMin
SlopeSection2 Restrain
0
0 1 2 3 4 5

EndSection1 restrain current

EndSection2 [ times IBase ]

en05000187-2.vsd
IEC05000187 V2 EN-US

Figure 43: Description of the restrained, and the unrestrained operate characteristics

where:

slope = D Ioperate × 100%

D Irestrain
EQUATION1246 V1 EN-US

The operate - restrain characteristic is tailor-made and can be designed freely by the user after his
needs. The default characteristic is recommended to be used. It gives good results in a majority of
applications. The operate - restrain characteristic has in principle three sections with a section-wise
proportionality of the operate value to the bias (restrain) current. The reset ratio is in all parts of the
characteristic equal to 0.95.

Section 1: This is the most sensitive part on the characteristic. In section 1, normal currents flow
through the protected circuit and its current transformers, and risk for higher false differential currents
is relatively low. An un-compensated on-load tap-changer is a typical reason for existence of the
false differential currents in this section. The slope in section 1 is always zero percent.

Section 2: In section 2, a certain minor slope is introduced which is supposed to cope with false
differential currents proportional to higher than normal currents through the current transformers.

Section 3: The more pronounced slope in section 3 is designed to result in a higher tolerance to
substantial current transformer saturation at high through-fault currents, which may be expected in
this section.

The operate - restrain characteristic should be designed so that it can be expected that:

166 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

• for internal faults, the operate (differential) currents are always with a good margin above the
operate - restrain characteristic
• for external faults, the false (spurious) operate currents are with a good margin below the
operate - restrain characteristic

The differential protection can be temporarily desensitized by applying the adaptive DC biasing
method. When the external fault is detected, this adaptive DC biasing method will temporarily shift
the operate-bias characteristic by adding DC components to the operate level IdMin. The DC
component is extracted online form the instantaneous differential currents and the highest DC in all
three phases is selected to be added to IdMin. This feature improves the security of the differential
function against the CT errors during heavy external faults followed by CT saturation. The adaptive
DC biasing will be reset if either of the conditions below is fulfilled:

• The external fault signal disappears and no DC components exist in the phase currents.
• The differential currents become higher than the bias current.

The adaptive DC biasing feature is disabled when NegSeqDiffEn is set to Off.

Fundamental frequency negative sequence differential currents M13039-226 v7

Existence of relatively high negative sequence currents is in itself a proof of a disturbance on the
power system, possibly a fault in the protected power transformer. The negative-sequence currents
are a measurable indication of an abnormal condition, similar to the zero sequence current. One of
the several advantages of the negative sequence currents compared to the zero sequence currents
is that they provide coverage for phase-to-phase and power transformer turn-to-turn faults.
Theoretically, the negative sequence currents do not exist during symmetrical three-phase faults,
however they do appear during initial stage of such faults for a long enough time (in most cases) for
the IED to make the proper decision. Further, the negative sequence currents are not stopped at a
power transformer by the Yd, or Dy connection type. The negative sequence currents are always
properly transformed to the other side of any power transformer for any external disturbance. Finally,
the negative sequence currents are not affected by symmetrical through-load currents.

For power transformer differential protection applications, the negative sequence based differential
currents are calculated by using exactly the same matrix equations, which are used to calculate the
traditional phase-wise fundamental frequency differential currents. The same equation shall be fed by
the negative sequence currents from the two power transformer sides instead of individual phase
currents, as shown in matrix equation 25 for a case of two-winding, YNd5 power transformer.

é IDL1 _ NS ù é2 -1 -1ù é INS _ W 1 ù é -1 0 1 ù é INS _ W 2 ù

ê IDL 2 _ NS ú = 1 × ê -1 2 -1 × ê a × INS _ W 1 ú +
ú Ur _ W 2
×
1
×ê1 -1 0 ú × ê a × INS _ W 2 ú
ê ú 3 ê ú ê 2 ú Ur _ W 1 3 ê ú ê 2 ú
êë IDL3 _ NS úû êë -1 -1 2úû êë a × INS _ W 1úû êë 0 1 -1ú
û êë a × INS _ W 2 úû

1 2 3

EQUATION1247 V1 EN-US (Equation 25)

where:
1. is the Negative Sequence Differential Currents
2. is the Negative Sequence current contribution from the W1 side
3. is the Negative Sequence current contribution from the W2 side

Transformer protection RET670 167

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

and where:
IDL1_NS is the negative sequence differential current in phase L1 (in
W1 side primary amperes)
IDL2_NS is the negative sequence differential current in phase L2 (in
W1 side primary amperes)
IDL3_NS is the negative sequence differential current in phase L3 (in
W1 side primary amperes)
INS_W1 is the negative sequence current on the W1 side in primary
amperes (phase L1 reference)
INS_W2 is the negative sequence current on the W2 side in primary
amperes (phase L1 reference)
Ur_W1 is the transformer rated phase-to-phase voltage on the W1
side (setting parameter)
Ur_W2 is the transformer rated phase-to-phase voltage on W2
side (setting parameter)

a is the complex operator for sequence quantities,

j ×120
o 1 3
a=e =- + j×
2 2
EQUATION1248 V1 EN-US (Equation 26)

Because the negative sequence currents always form the symmetrical three phase current system
on each transformer side (that is, negative sequence currents in every phase will always have the
same magnitude and be phase displaced for 120 electrical degrees from each other), it is only
necessary to calculate the first negative sequence differential current that is, IDL1_NS.

As marked in equation 25, the first term on the right hand side of the equation, represents the total
contribution of the negative sequence current from the W1 side compensated for eventual power
transformer phase shift. The second term on the right hand side of the equation, represents the total
contribution of the negative sequence current from the W2 side compensated for eventual power
transformer phase shift and transferred to the power transformer W1 side. These negative sequence
current contributions are phasors, which are further used in directional comparisons, to characterize
a fault as internal or external. See section "Internal/external fault discriminator" for more information.

The magnitudes of the negative sequence differential current expressed in the HV side A can be
read as service values from the function. In the same time it is available as outputs IDNSMAG from
the differential protection function block. Thus, it can be connected to the disturbance recorder and
automatically recorded during any external or internal fault condition.

Internal/external fault discriminator M13039-280 v7

The internal/external fault discriminator is a very powerful and reliable supplementary criterion to the
traditional differential protection. It is recommended that this feature shall be always used (that is,
On) when protecting three-phase power transformers. The internal/external fault discriminator
detects even minor faults, with a high sensitivity and at high speed, and at the same time
discriminates with a high degree of dependability between internal and external faults.

The internal/external fault discriminator responds to the magnitudes and the relative phase angles of
the negative-sequence fault currents at the different windings of the protected power transformer.
The negative sequence fault currents must first be referred to the same phase reference side, and
put to the same magnitude reference. This is done by the matrix expression (see equation ).

Operation of the internal/external fault discriminator is based on the relative position of the two
phasors representing the winding one (W1) and winding two (W2) negative sequence current
contributions, respectively, defined by expression shown in equation . It performs a directional
comparison between these two phasors. First, the LV side phasor is referred to the HV side (W1
side): both the magnitude, and the phase position are referred to the HV (W1 side). Then the relative

168 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

phase displacement between the two negative sequence current phasors is calculated. In case of
three-winding power transformers, a little more complex algorithm is applied, with two directional
tests. The overall directional characteristic of the internal/external fault discriminator is shown in
figure 44, where the directional characteristic is defined by two setting parameters:

1. IMinNegSeq
2. NegSeqROA

90 deg
120 deg
If one or the Internal/external
other of fault boundary
currents is too
low, then no
measurement
NegSeqROA
is done, and
(Relay
120 degrees
Operate
is mapped
Angle)

180 deg 0 deg

IMinNegSeq

External Internal
fault fault
region region

270 deg en05000188-3-en.vsd

IEC05000188 V3 EN-US

Figure 44: Operating characteristic of the internal/external fault discriminator

In order to perform directional comparison of the two phasors their magnitudes must be high enough
so that one can be sure that they are due to a fault. On the other hand, in order to guarantee a good
sensitivity of the internal/external fault discriminator, the value of this minimum limit must not be too
high. Therefore this limit value, called IminNegSeq, is settable in the range of 0.02 to 0.20 times the
IBase of the power transformer winding one. The default value is 0.04. Note that, in order to enhance
stability at higher fault currents, the relatively very low threshold value IminNegSeq is dynamically
increased at currents higher than normal currents: if the bias current is higher than 110% of
IBase ,then 10% of the bias current is added to the IminNegSeq. Only if the magnitudes of both
negative sequence current contributions are above the actual limit, the relative position between
these two phasors is checked. If either of the negative sequence current contributions, which should
be compared, is too small (less than the set value for IminNegSeq), no directional comparison is
made in order to avoid the possibility to produce a wrong decision. This magnitude check guarantees
stability of the algorithm, when the power transformer is energized. The setting NegSeqROA
represents the Relay Operate Angle, which determines the boundary between the internal and
external fault regions. It can be selected in a range from ±30 degrees to ±90 degrees, with a step of
0.1 degree. The default value is ±60 degrees. The default setting ±60 degree favours security in
comparison to dependability.

If the above condition concerning magnitudes is fulfilled, the internal/external fault discriminator
compares the relative phase angle between the negative sequence current contributions from W1
and W2 sides of the power transformer using the following two rules:

Transformer protection RET670 169

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

• If the negative sequence current contributions from the W1 and the W2 sides are in phase, the
fault is internal (that is, both phasors are within protected zone)
• If the negative sequence currents contributions from W1 and W2 sides are 180 degrees out of
phase, the fault is external (that is, W1 phasors is outside protected zone)

For example, for any unsymmetrical external fault, ideally the respective negative sequence current
contributions from the W1 and W2 power transformer sides will be exactly 180 degrees apart and
equal in magnitude, regardless the power transformer turns ratio and phase displacement. An
example is shown in figure 45, which shows trajectories of the two separate phasors representing the
negative sequence current contributions from the HV and LV sides of an Yd5 power transformer
(after compensation of the transformer turns ratio and phase displacement) by using equation ) for an
unsymmetrical external fault. Observe that the relative phase angle between these two phasors is
180 electrical degrees at any point in time. No current transformer saturation was assumed for this
case.

"steady state"
for HV side 90
neg. seq. phasor
60

150 30

10
ms

180 0
0.1 kA
0.2 kA
0.3 kA
10 0.4 kA
ms
210 330

"steady state"
240 for LV side
270 neg. seq. phasor

Contribution to neg. seq. differential current from HV side

Contribution to neg. seq. differential current from LV side

en05000189.vsd
IEC05000189 V1 EN-US

Figure 45: Trajectories of Negative Sequence Current Contributions from HV and LV sides of
Yd5 power transformer during external fault
Under external fault conditions, the relative angle is theoretically equal to 180 degrees. During
internal faults, the angle shall ideally be 0 degrees, but due to possible different negative sequence
source impedance angles on the W1 and W2 sides of the protected power transformer, it may differ
somewhat from the ideal zero value. However, during heavy faults, CT saturation might cause the
measured phase angle to differ from 180 degrees for an external, and from 0 degrees for an internal
fault. See figure 46 for an example of a heavy internal fault with transient CT saturation.

170 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

Dire ctiona l Compa ris on Crite rion: Inte rna l fa ult a s s e e n from the HV s ide
90
e xcurs ion
120 60
from 0 de gre e s
35 ms due to CT
s a tura tion
150 30
de finite ly
a n inte rna l
fa ult

180 0
trip c o mmand
in 12 ms
e xte rna l
fa ult Inte rna l fa ult
0.5 kA de cla re d 7 ms
re gion
210 330 a fte r inte rna l
fa ult occure d
1.0 kA

240 300
1.5 kA
270
HV s ide contribution to the tota l ne ga tive s e que nce diffe re ntia l curre nt in kA
Dire ctiona l limit (within the re gion de limite d by ± 60 de gre e s is inte rna l fa ult)

en05000190.vsd
IEC05000190 V1 EN-US

Figure 46: Operation of the internal/external fault discriminator for internal fault with CT
saturation
It shall be noted that additional security measures are implemented in the internal/external fault
discriminator algorithm in order to guarantee proper operation with heavily saturated current
transformers. The trustworthy information on whether a fault is internal or external is typically
obtained in about 10ms after the fault inception, depending on the setting IminNegSeq, and the
magnitudes of the fault currents. During heavy faults, approximately 5ms time to full saturation of the
main CT is sufficient in order to produce a correct discrimination between internal and external faults.

Unrestrained, and sensitive negative sequence protections M13039-320 v5

Two sub functions, which are based on the internal/external fault discriminator with the ability to trip a
faulty power transformer, are parts of the traditional power transformer differential protection.

The unrestrained negative sequence differential protection M13039-323 v6

The unrestrained negative sequence protection is activated if one or more start signals have been
set by the traditional differential protection algorithm. This happens because one or more of the
fundamental frequency differential currents entered the operate region on the operate - restrain
characteristic. So, this protection is not independent of the traditional restrained differential protection
- it is activated after the first start signal has been placed.

If the same fault has been positively recognized as internal, then the unrestrained negative sequence
differential protection places its own trip request.

Any block signals by the harmonic and/or waveform criteria, which can block the traditional
differential protection are overridden, and the differential protection operates quickly without any
further delay.

This logic guarantees a fast disconnection of a faulty power transformer for any internal fault.

If the same fault has been classified as external, then generally, but not unconditionally, a trip
command is prevented. If a fault is classified as external, further analysis of the fault conditions is
initiated. If all the instantaneous differential currents in phases where start signals have been issued

Transformer protection RET670 171

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

are free of harmonic pollution, then a (minor) internal fault, simultaneous with a predominant external
fault can be suspected. This conclusion can be drawn because at external faults, major false
differential currents can only exist when one or more current transformers saturate. In this case, the
false instantaneous differential currents are polluted by higher harmonic components, the 2nd, the 5th
etc.

Sensitive negative sequence based turn-to-turn fault protection M13039-328 v4

The sensitive, negative sequence current based turn-to-turn fault protection detects the low level
faults, which are not detected by the traditional differential protection until they develop into more
severe faults, including power transformer iron core. The sensitive protection is independent from the
traditional differential protection and is a very good complement to it. The essential part of this
sensitive protection is the internal/external fault discriminator. In order to be activated, the sensitive
protection requires no start signal from the traditional power transformer biased differential
protection. If magnitudes of HV and LV negative sequence current contributions are above the set
limit for IminNegSeq, then their relative positions are determined. If the disturbance is characterized
as an internal fault, then a separate trip request will be placed. Any decision on the way to the final
trip request must be confirmed several times in succession in order to cope with eventual CT
transients. This causes a short additional operating time delay due to this security count. For very low
level turn-to-turn faults the overall response time of this protection is about 30ms.

Instantaneous differential currents M13039-331 v5

The instantaneous differential currents are calculated from the instantaneous values of the input
currents in order to perform the harmonic analysis and waveform analysis upon each one of them
(see section "Harmonic and waveform block criteria" for more information).

The instantaneous differential currents are calculated using the same matrix expression as shown in
equation and equation . The same matrices A, B and C are used for these calculations. The only
difference is that the matrix algorithm is fed by instantaneous values of currents, that is, samples.

Harmonic and waveform block criteria M13039-334 v4

The two block criteria are the harmonic restrain and the waveform restrain. These two criteria have
the power to block a trip command by the traditional differential protection, which produces start
signals by applying the differential currents, and the bias current, to the operate - restrain
characteristic.

Harmonic restrain M13039-337 v8

The harmonic restrain is the classical restrain method traditionally used with power transformer
differential protections. The goal is to prevent an unwanted trip command due to magnetizing inrush
currents at switching operations, or due to magnetizing currents at over-voltages.

The magnetizing currents of a power transformer flow only on one side of the power transformer and
are therefore always the cause of false differential currents. The harmonic analysis (the 2nd and the
5th harmonic) is applied to the instantaneous differential currents. Typical instantaneous differential
currents during power transformer energizing are shown in figure 47. The harmonic analysis is only
applied in those phases where start signals have been set. For example, if the content of the 2nd
harmonic in the instantaneous differential current of phase L1 is above the setting I2/I1Ratio, then a
block signal is set for that phase, which can be read as BLK2HL1 output of the differential protection.

After the transformer has been energized (the energizing period has elapsed and the inrush currents
have disappeared), the 2nd harmonic blocking is conditionally activated if NegSeqDiffEn is set to On.
When the fault cannot be identified as internal or external, the 2nd harmonic blocking signal is
activated only if the differential current is smaller than the bias current. If the differential current
becomes equal to or higher than the bias current, the differential function will be released regardless
of the 2nd harmonic blocking signal.

The 2nd harmonic analysis always supervises the restrained differential criterion if
NegSeqDiffEn is set to Off.

172 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

Waveform restrain M13039-341 v4

The waveform restrain criterion is a good complement to the harmonic analysis. The waveform
restrain is a pattern recognition algorithm, which looks for intervals within each fundamental power
system cycle with low instantaneous differential current. This interval is often called current gap in
protection literature. However, within differential function this criterion actually searches for long-
lasting intervals with low rate-of-change in instantaneous differential current, which are typical for the
power transformer inrush currents. Block signals BLKWAVLx are set in those phases where such
behavior is detected. The algorithm does not require any end user settings. The waveform algorithm
is automatically adapted dependent only on the power transformer rated data.

IEC05000343 V1 EN-US

Figure 47: Inrush currents to a transformer as seen by a protective IED. Typical is a high
amount of the 2nd harmonic, and intervals of low current, and low rate-of-change of
current within each period.

Cross-blocking between phases M13039-384 v9

The basic definition of the cross-blocking is that one of the three phases can block operation (that is,
tripping) of the other two phases due to the harmonic pollution of the differential current in that phase
(that is, waveform, 2nd or 5th harmonic content). In differential algorithm the user can control the
cross-blocking between the phases via the setting parameter CrossBlockEn=On.

When parameter CrossBlockEn=On cross blocking between phases is introduced. There is no time
settings involved, but the phase with the operating point above the set bias characteristic (in the
operate region) will be able to cross-block the other two phases if it is itself blocked by any of the
previously explained restrained criteria. As soon as the operating point for this phase is below the set
bias characteristic (that is, in the restrain region) cross blocking from that phase will be inhibited. In
this way cross-blocking of a temporary nature is achieved. It should be noted that this is the default
setting value for this parameter.

When parameter CrossBlockEn=Off, any cross blocking between phases will be disabled. It is
recommended to use the value Off with caution in order to avoid the unwanted tripping during initial
energizing of the power transformer.

Switch onto fault feature M13039-499 v8

The transformer differential function has a built-in, advanced switch onto fault feature. This feature
can be enabled or disabled by a setting parameter SOTFMode. When enabled this feature ensures
quick differential protection tripping in cases where a transformer is energized with an internal fault
(for example, forgotten earthing on transformer LV side). Operation of this feature is based on the
fact that a current gap (term current gap is explained under waveblock feature above) will exist within
the first power system cycle when healthy power transformer is energized. If this is not the case the
waveblock criterion will reset quickly. This quick reset of the waveblock criterion will temporarily
disable the second harmonic blocking feature of the differential protection function. This
consequently ensures fast operation of the transformer differential function for a switch onto a fault
condition. It shall be noted that this feature is only active during initial power transformer energizing,

Transformer protection RET670 173

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

under the first 4 cycles, 80 ms for 50Hz and 66.7 ms for 60Hz. When the switch onto fault feature is
disabled by the setting parameter SOTFMode, the waveblock and second harmonic blocking
features work in parallel and are completely independent from each other.

Open CT detection feature M13039-440 v8

Transformer differential protection has a built-in, advanced open CT detection feature.

A sudden inadvertently opened CT circuit may cause an unexpected and unwanted operation of the
Transformer differential protection under normal load conditions. Damage of secondary equipment
may occur due to high voltage from open CT circuit outputs. It is always an advantage, from the point
of view of security and reliability, to have the open CT detection function to block the transformer
differential protection function in case of an open CT condition, and produce an alarm signal to the
operational personnel to quickly correct the open CT condition.

The built-in open CT feature can be enabled or disabled by the setting parameter OpenCTEnable
(Off/On). When enabled, this feature tries to prevent mal-operation when a loaded main CT
connected to Transformer differential protection is by mistake open circuited on the secondary side.
Note that this feature can only detect interruption of one CT phase current at a time. If two or even all
three-phase currents of one set of CTs are accidentally interrupted at precisely the same time, this
feature cannot operate. Transformer differential protection generates a trip signal if the false
differential current is sufficiently high. An open CT circuit is typically detected in 12–14 ms, and if the
load in the protected circuit is relatively high, about the nominal load, the unwanted trip cannot
always be prevented. Still, the information about what was the cause of the open CT secondary
circuit, is vital.

The principle applied to detect an open CT is a simple pattern recognition method, similar to the
waveform check used by the Power transformer differential protection in order to detect the
magnetizing inrush condition. The open CT detection principle is based on the fact that for an open
CT, the current in the phase with the open CT suddenly drops to zero (that is, as seen by the
protection), while the currents of the other two phases continue as before.

The open CT function is supposed to detect an open CT under normal conditions, that is, with the
protected multi-terminal circuit under normal load (10...110% of the rated load). If the load currents
are very low or zero, the open CT condition cannot be detected. In addition to load condition
requirement, Open CT function also checks the differential current on faulty phase. If the differential
current is lower than 50% of IdMin, the open CT condition cannot be detected. Therefore, the Open
CT algorithm only detects an open CT if the load on the power transformer is 10...110% of rated load
and the differential current is higher than 50% of IdMin on that phase. The search for an open CT
starts 60 seconds (50 seconds in 60 Hz systems) after the transformer is energized. The Open CT
detection feature can also be explicitly deactivated by setting: OpenCTEnable = 0 ( Off).

If an open CT is detected and the output OPENCT set to 1, then all the differential functions are
blocked, except the unrestrained (instantaneous) differential. An alarm signal is also produced after a
settable delay (tOCTAlarmDelay) to report to operational personnel for quick remedy actions once
the open CT is detected. When the open CT condition is removed (that is, the previously open CT is
reconnected), the functions remain blocked for a specified interval of time, which is also defined by a
setting (tOCTResetDelay). This is to prevent an eventual mal-operation after the reconnection of the
previously open CT secondary circuit.

The open CT algorithm provides detailed information about the location of the defective CT
secondary circuit. The algorithm clearly indicates the IED side, CT input and phase in which an open
CT condition has been detected. These indications are provided via the following outputs from the
Transformer differential protection function:

174 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

1. Output OPENCT provides instant information to indicate that an open CT circuit has been
detected.
2. Output OPENCTAL provides a time-delayed alarm that the open CT circuit has been detected.
Time delay is defined by the parameter tOCTAlarmDelay.
3. Integer output OPENCTIN provides information on the local HMI regarding which open CT
circuit has been detected (1=CT input No 1; 2=CT input No 2).
4. Integer output OPENCTPH provides information on the local HMI regarding in which phase an
open CT circuit has been detected (1=Phase L1; 2= Phase L2; 3= Phase L3).

Once the open CT condition is declared, the algorithm stops to search for further open CT circuits. It
waits until the first open CT circuit has been corrected. Note that once the open CT condition has
been detected, it can be reset automatically within the differential function. It is not possible to
externally reset an open CT condition. To reset the open CT circuit alarm automatically, the following
conditions must be fulfilled:

• Bias current is for at least one minute smaller than 110%

• The open CT condition in the defective CT circuit has been corrected (for example, current
asymmetry disappears)
• The above two conditions are fulfilled for a longer time than defined by the setting parameter
tOCTResetDelay

If an open CT has been detected in a separate group of three CTs, the algorithm is reset either when
the missing current returns to the normal value, or when all three currents become zero. After the
reset, the open CT detection algorithm starts again to search for open CT circuits within the protected
zone.

7.1.7.2 Logic diagram M13043-3 v8

The simplified internal logics, for transformer differential protection are shown in the following figures.

Transformer protection RET670 175

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

ADM Differential function

Trafo
Data
A/D conversion scaling with CT

Phasor calculation of individual

Open CT logic on W1 side

Instantaneous (sample based) IDL1

Phasors & samples

phase current
Differential current, phase L1
ratio

IDL2

Derive equation to calculate differential currents

Instantaneous (sample based)
Differential current, phase L2

Instantaneous (sample based) IDL3

Differential current, phase L3

Negative sequence diff current IDNSMAG

& NS current contribution from
A/D conversion scaling with CT

Phasor calculation of individual

individual windings
Open CT logic on W2 side
phase current

IDL1MAG
Fundamental frequency (phasor
based) Diff current, phase L1 &
ratio

phase current contributions from

individual windings
Phasors & samples

IDL2MAG
Fundamental frequency (phasor
based) Diff current, phase L2 &
phase current contributions from
individual windings
IDL3MAG
Fundamental frequency (phasor
based) Diff current, phase L3 &
phase current contributions from
individual windings
MAX IBIAS

Settings for Zer. Seq.

Current Reduction

en06000554-3-en.vsd
IEC06000544 V3 EN-US

Figure 48: Treatment of measured currents within IED for transformer differential function
Figure 48 shows how internal treatment of measured currents is done in case of a two-winding
transformer.

The following currents are inputs used in the power transformer differential protection function. They
must all be expressed in power system (primary) A.

1. Instantaneous values of currents (samples) from the HV, and LV sides for two-winding power
transformers, and from the HV, the first LV, and the second LV side for three-winding power
transformers.
2. Currents from all power transformer sides expressed as fundamental frequency phasors with
their real and imaginary parts. These currents are calculated within the protection function by the
fundamental frequency Fourier filters.
3. Negative sequence currents from all power transformer sides expressed as phasors. These
currents are calculated within the protection function by the symmetrical components module.

The power transformer differential protection:

176 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

1. Calculates three fundamental frequency differential currents and one common bias current. The
zero-sequence component can optionally be eliminated from each of the three fundamental
frequency differential currents and at the same time from the common bias current.
2. Calculates three instantaneous differential currents. They are used for harmonic, and waveform
analysis. Instantaneous differential currents are useful for post-fault analysis using disturbance
recording
3. Calculates negative-sequence differential current. Contributions to it from both (all three) power
transformer sides are used by the internal/external fault discriminator to detect and classify a
fault as internal or external.

BLKUNRES

IdUnre a TRIPUNREL1
b>a AND
b
IDL1MAG

IBIAS STL1
AND
BLOCK
BLKRES

TRIPRESL1
AND
OR 1

IDL1
to fault logic

2nd BLK2HL1
Switch on

Harmonic

Wave BLKWAVL1
block

5th BLK5HL1
Harmonic
Cross Block
Cross Block to L2 or L3
from L2 or L3 AND
OR
AND
OpCrossBlock=On

en06000545.vsd
IEC06000545 V1 EN-US

Figure 49: Transformer differential protection simplified logic diagram for Phase L1

Internal/ EXTFAULT
Neg.Seq. Diff External INTFAULT
Current Fault
Contributions discrimin
ator TRNSSENS
t
&
OpNegSeqDiff=On

IBIAS
a
b>a
b
Constant

TRNSUNR
STL1 &
STL2
>1
STL3

IEC05000167-2-en.vsd
IEC05000167-TIFF V2 EN-US

Figure 50: Transformer differential protection simplified logic diagram for external/internal fault
discriminator

Transformer protection RET670 177

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

TRIPRESL1
TRIPRESL2 TRIPRES
OR
TRIPRESL3

TRIPUNREL1
TRIPUNREL2 TRIPUNRE
OR
TRIPUNREL3

TRIP
TRNSSENS OR
TRNSUNR

en05000278.vsd
IEC05000278 V1 EN-US

Figure 51: Transformer differential protection internal grouping of tripping signals

STL1
STL2 START
OR
STL3

BLK2HL1
BLK2HL2 BLK2H
OR
BLK2HL3

BLK5HL1
BLK5HL2 BLK5H
OR
BLK5HL3

BLKWAVL1
BLKWAVL2 BLKWAV
OR
BLKWAVL3

IEC05000279-2-en.vsd
IEC05000279-TIFF V2 EN-US

Figure 52: Transformer differential protection internal grouping of logical signals

Logic in figures 49, 50, 51 and 52 can be summarized as follows:

1. The three fundamental frequency differential currents are applied in a phase-wise manner to two
limits. The first limit is the operate-restrain characteristic, while the other is the high-set
unrestrained limit. If the first limit is exceeded, a start signal START is set. If the unrestrained
limit is exceeded, an immediate unrestrained trip TRIPUNRE and common trip TRIP are issued.
2. If a start signal is issued in a phase the harmonic and the waveform block signals are checked.
Only a start signal, which is free of all of its block signals can result in a trip command. If the
cross-block logic scheme is applied, then only if all phases with set start signal are free of their
respective block signals, a restrained trip TRIPRES and common trip TRIP are issued
3. If a start signal is issued in a phase, and the fault has been classified as internal, then any
eventual block signals are overridden and unrestrained negative-sequence trip TRNSUNR and
common trip TRIP are issued without any further delay. This feature is called the unrestrained
negative-sequence protection 110% bias.
4. The sensitive negative sequence differential protection is independent of any start signals. It is
meant to detect smaller internal faults such as turn-to-turn faults, which are often not detected
by the traditional differential protection. The sensitive negative sequence differential protection
starts whenever both contributions to the total negative sequence differential current (that must
be compared by the internal/external fault discriminator) are higher than the value of the setting

178 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

IMinNegSeq. If a fault is positively recognized as internal, and the condition is stable with no
interruption for at least one fundamental frequency cycle the sensitive negative sequence
differential protection TRNSSENS and common trip TRIP are issued. This feature is called the
sensitive negative sequence differential protection.
5. If a start signal is issued in a phase (see signal STL1), even if the fault has been classified as an
external fault, the instantaneous differential current of that phase (see signal IDL1) is analyzed
for the 2nd and the 5th harmonic contents (see the blocks with the text inside: 2nd Harmonic;
Wave block and 5th Harmonic). If there is less harmonic pollution. than allowed by the settings
I2/I1Ratio, and I5/I1Ratio, (then the outputs from the blocks 2nd harmonic and 5th harmonic is
0) then it is assumed that a minor simultaneous internal fault must have occurred. Only under
these conditions a trip command is allowed (the signal TRIPRESL1 is = 1). The cross-block logic
scheme is automatically applied under such circumstances. (This means that the cross block
signals from the other two phases L2 and L3 is not activated to obtain a trip on the TRIPRESL1
output signal in figure 49)
6. All start and blocking conditions are available as phase segregated as well as common (that is
three-phase) signals.

IDL1 MAG
a
a>b
I Diff Alarm b

IDL2 MAG tAlarm Delay

a
& IDALARM
a>b t
I Diff Alarm b

IDL3 MAG
a
a>b
I Diff Alarm b

en06000546.vsd
IEC06000546 V1 EN-US

Figure 53: Differential current alarm logic

7.1.8 Technical data IP12646-1 v1

M13046-1 v15

Table 94: T2WPDIF/T3WPDIF technical data

Function Range or value Accuracy

Operating characteristic Adaptable ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir
Reset ratio > 90% -
Unrestrained differential current limit (100-5000)% ofIBase on high voltage ±1.0% of set value
winding
Minimum pickup (10-60)% of IBase ±1.0% of I r
Second harmonic blocking (5.0-100.0)% of fundamental ±1.0% of Ir
differential current Note: fundamental magnitude =
100% of Ir

Fifth harmonic blocking (5.0-100.0)% of fundamental ±5.0% of Ir

differential current Note: fundamental magnitude =
100% of Ir

Connection type for each of the Y or D -

windings
Table continues on next page

Transformer protection RET670 179

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

Function Range or value Accuracy

Phase displacement between high 0–11 -
voltage winding, W1 and each of the
windings, W2 and W3. Hour notation
*Operate time at 0 to 10 x IdMin, Min. = 25 ms -
restrained function Max. = 35 ms
*Reset time at 10 x IdMin to 0, Min. = 5 ms -
restrained function Max. = 15 ms
*Operate time at 0 to 10 x Idunre, Min. = 5 ms -
unrestrained function Max. = 15 ms
*Reset time at 10 x Idunre to 0, Min. = 15 ms -
unrestrained function Max. = 35 ms
**Operate time, unrestrained negative Min. = 10 ms -
sequence function Max. = 20 ms
**Reset time, unrestrained negative Min. = 10 ms -
sequence function Max. = 30 ms
Critical impulse time 2 ms typically at 0 to 5 x IdMin -
*Note: Data obtained with single three-phase input current group. The operate and reset times for T2WPDIF/
T3WPDIF are valid for an static output from SOM.
**Note: Data obtained with two three-phase input current groups. The rated symmetrical currents are applied on both
sides as pre- and after-fault currents. The fault is performed by increasing one phase current to double on one side
and decreasing same phase current to zero on the other side.

7.2 High impedance differential protection, single phase

HZPDIF IP14239-1 v4

7.2.1 Identification M14813-1 v4

IEC 61850 IEC 60617 ANSI/IEEE C37.2

Function description
identification identification device number

High impedance differential protection,

HZPDIF Id 87
single phase

SYMBOL-CC V2 EN-US

7.2.2 Functionality M13071-3 v13

High impedance differential protection, single phase (HZPDIF) functions can be used when the
involved CT cores have the same turns ratio and similar magnetizing characteristics. It utilizes an
external CT secondary current summation by wiring. Actually all CT secondary circuits which are
involved in the differential scheme are connected in parallel. External series resistor, and a voltage
dependent resistor which are both mounted externally to the IED, are also required.

The external resistor unit shall be ordered under IED accessories in the Product Guide.

HZPDIF can be used to protect tee-feeders or busbars, reactors, motors, auto-transformers,

capacitor banks and so on. One such function block is used for a high-impedance restricted earth
fault protection. Three such function blocks are used to form three-phase, phase-segregated
differential protection.

180 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

7.2.3 Function block M13737-3 v3

HZPDIF
ISI* TRIP
BLOCK ALARM
BLKTR MEASVOLT

IEC05000363-2-en.vsd
IEC05000363 V2 EN-US

Figure 54: HZPDIF function block

7.2.4 Signals IP14244-1 v2

PID-6990-INPUTSIGNALS v1

Table 95: HZPDIF Input signals

Name Type Default Description

ISI GROUP - Single phase current input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Block of trip

PID-6990-OUTPUTSIGNALS v1

Table 96: HZPDIF Output signals

Name Type Description

TRIP BOOLEAN Trip signal
ALARM BOOLEAN Alarm signal
MEASVOLT REAL Measured RMS voltage on CT secondary side

7.2.5 Settings IP14245-1 v2

PID-6990-SETTINGS v1

Table 97: HZPDIF Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
U>Alarm 5 - 500 V 1 10 Alarm voltage level in volts on CT
secondary side
tAlarm 0.000 - 60.000 s 0.001 5.000 Time delay to activate alarm
U>Trip 10 - 900 V 1 100 Operate voltage level in volts on CT
secondary side
SeriesResistor 50 - 20000 Ohm 1 250 Value of series resistor in Ohms

7.2.6 Monitored data

PID-6990-MONITOREDDATA v1

Table 98: HZPDIF Monitored data

Name Type Values (Range) Unit Description

MEASVOLT REAL - kV Measured RMS voltage on CT
secondary side

Transformer protection RET670 181

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

7.2.7 Operation principle IP14242-1 v2

M13075-3 v11
High impedance protection system is a simple technique which requires that all CTs, used in the
protection scheme, have relatively high knee point voltage, similar magnetizing characteristic and the
same ratio. These CTs are installed in all ends of the protected object. In order to make a scheme all
CT secondary circuits belonging to one phase are connected in parallel. From the CT junction points
a measuring branch is connected. The measuring branch is a series connection of one variable
setting resistor (or series resistor) RS with high ohmic value and an over-current element. Thus, the
high impedance differential protection responds to the current flowing through the measuring branch.
However, this current is result of a differential voltage caused by this parallel CT connection across
the measuring branch. Non-linear resistor (that is, metrosil) is used in order to protect entire scheme
from high peak voltages which may appear during internal faults. Typical high impedance differential
scheme is shown in Figure 55. Note that only one phase is shown in this figure.

RS

3 U
I
1
I> (50) 5

2
GUID-5CEAF088-D92B-45E5-B98F-3083894A694C V1 EN-US

Figure 55: HZPDIF scheme

Where in the Figure:

1. shows one main CT secondary winding connected in parallel with all other CTs, from the same
phase, connected to this scheme.
2. shows the scheme earthing point.

It is of utmost importance to insure that only one earthing point exists in such
protection scheme.
3. shows the setting (stabilizing) resistor RS.
4. shows the over-current measuring element.

The series connection of stabilizing resistor and over-current element is

designated as measuring branch.
5. shows the non-linear resistor (that is, metrosil).
6. U is the voltage across the CT paralleling point (for example, across the measuring branch).
7. I is the current flowing through the measuring branch.

U and I are interrelated in accordance with the following formula U=RS × I.

Due to the parallel CT connections the high impedance differential relay can only measure one
current and that is the relay operating quantity. That means that there is no any stabilizing quantity
(that is, bias) in high-impedance differential protection schemes. Therefore in order to guaranty the

182 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

stability of the differential relay during external faults the operating quantity must not exceed the set
pickup value. Thus, for external faults, even with severe saturation of some of the current
transformers, the voltage across the measuring branch shall not rise above the relay set pickup
value. To achieve that a suitable value for setting resistor RS is selected in such a way that the
saturated CT secondary winding provides a much lower impedance path for the false differential
current than the measuring branch. In case of an external fault causing current transformer
saturation, the non-saturated current transformers drive most of the spill differential current through
the secondary winding of the saturated current transformer and not through the measuring brunch of
the relay. The voltage drop across the saturated current transformer secondary winding appears also
across the measuring brunch, however it will typically be relatively small. Therefore, the pick-up value
of the relay has to be set above this false operating voltage.

See the application manual for operating voltage and sensitivity calculation.

7.2.7.1 Logic diagram M13075-9 v5

The logic diagram shows the operation principles for the 1Ph High impedance differential protection
function HZPDIF, see Figure 56.

The function utilizes the raw samples from the single phase current input connected to it. Thus the
twenty samples per fundamental power system cycle are available to the HZPDIF function. These
current samples are first multiplied with the set value for the used stabilizing resistor in order to get
voltage waveform across the measuring branch. The voltage waveform is then filtered in order to get
its RMS value. Note that used filtering is designed in such a way that it ensures complete removal of
the DC current component which may be present in the primary fault current. The voltage RMS value
is then compared with set Alarm and Trip thresholds. Note that the TRIP signal is intentionally
delayed on drop off for 30 ms within the function. The measured RMS voltage is available as a
service value from the function. The function has block and trip block inputs available as well.

IEC05000301 V1 EN-US

Figure 56: Logic diagram for 1Ph High impedance differential protection HZPDIF

Transformer protection RET670 183

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

7.2.8 Technical data IP14246-1 v1

M13081-1 v13

Table 99: HZPDIF technical data

Function Range or value Accuracy

Operate voltage (10-900) V ±1.0% of Ir at I ≤ Ir
I=U/R ±1.0% of I at I > Ir

Reset ratio >95% at (30-900) V -

Maximum continuous power See1) -

Operate time at 0 to 10 x Ud Min. = 5 ms

Max. = 15 ms
Reset time at 10 x Ud to 0 Min. = 75 ms
Max. = 95 ms
Critical impulse time 2 ms typically at 0 to 10 x Ud -

Operate time at 0 to 2 x Ud Min. = 25 ms

Max. = 35 ms
Reset time at 2 x Ud to 0 Min. = 50 ms
Max. = 70 ms
Critical impulse time 15 ms typically at 0 to 2 x Ud -

1) The value U2Trip/ R should always be lower than Stabilizing resistor thermal rating to allow continuous activation
during testing. If this value is exceeded, testing should be done with a transient faults. Typical value for the thermal
rating of the resistor is 100W.

7.3 Low impedance restricted earth fault protection

REFPDIF IP14640-1 v6

7.3.1 Function revision history GUID-BFAA47D8-C2B6-4EC2-9129-B031333BAD19 v2

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 The upper limit of ROA setting range is changed from 90 degrees to 119
degrees.
M 2.2.5 -

184 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

7.3.2 Identification
M14843-1 v6

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Restricted earth fault protection, low REFPDIF 87N
impedance
IdN/I

SYMBOL-AA V1 EN-US

7.3.3 Functionality IP12418-1 v2

M13047-3 v20
Restricted earth-fault protection, low-impedance function (REFPDIF) can be used on all directly or
low-impedance earthed windings. The REFPDIF function provides high sensitivity and high speed
tripping as it protects each winding separately and thus does not need inrush stabilization.

The REFPDIF function is a percentage biased function with an additional zero sequence current
directional comparison criterion. This gives excellent sensitivity and stability during through faults.

REFPDIF can also protect autotransformers. Five currents are measured at the most complicated
configuration as shown in Figure 57.

CT CT
YNdx
CT CB CB
Y d
CB CB

Autotransformer
CT
IED

The most typical CT CB CB CT

application
The most complicated
application - autotransformer

IEC05000058-2-en.vsd
IEC05000058-2 V1 EN-US

Figure 57: Examples of applications of the REFPDIF

7.3.4 Function block M13736-3 v9

REFPDI F
I3P* TRIP
I3PW1CT1* START
I3PW1CT2* DIROK
I3PW2CT1* BLK2H
I3PW2CT2* IRES
BLOCK IN
IBIAS
IDIFF
ANGLE
I2RATIO

IEC06000251-3-en.vsdx
IEC06000251 V3 EN-US

Figure 58: REFPDIF function block

Transformer protection RET670 185

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

7.3.5 Signals IP12658-1 v2

PID-7411-INPUTSIGNALS v1

Table 100: REFPDIF Input signals

Name Type Default Description

I3P GROUP - Group signal for neutral current input
SIGNAL
I3PW1CT1 GROUP - Group signal for primary CT1 current input
SIGNAL
I3PW1CT2 GROUP - Group signal for primary CT2 current input
SIGNAL
I3PW2CT1 GROUP - Group signal for secondary CT1 current input
SIGNAL
I3PW2CT2 GROUP - Group signal for secondary CT2 current input
SIGNAL
BLOCK BOOLEAN 0 Block of function

PID-7411-OUTPUTSIGNALS v1

Table 101: REFPDIF Output signals

Name Type Description

TRIP BOOLEAN Trip by restricted earth fault protection function
START BOOLEAN Start by restricted earth fault protection function
DIROK BOOLEAN Directional Criteria has operated for internal fault
BLK2H BOOLEAN Block due to 2-nd harmonic
IRES REAL Magnitude of fund. freq. residual current
IN REAL Magnitude of fund. freq. neutral current
IBIAS REAL Magnitude of the bias current
IDIFF REAL Magnitude of fund. freq. differential current
ANGLE REAL Direction angle from zerosequence feature
I2RATIO REAL Second harmonic ratio

7.3.6 Settings IP12660-1 v2

PID-7411-SETTINGS v1

Table 102: REFPDIF Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 103: REFPDIF Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
IdMin 4.0 - 100.0 %IB 0.1 10.0 Maximum sensitivity in % of IBase
CTFactorPri1 1.0 - 10.0 - 0.1 1.0 CT factor for HV side CT1 (CT1rated/
HVrated current)
Table continues on next page

186 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

Name Values (Range) Unit Step Default Description

CTFactorPri2 1.0 - 10.0 - 0.1 1.0 CT factor for HV side CT2 (CT2rated/
HVrated current)
CTFactorSec1 1.0 - 10.0 - 0.1 1.0 CT factor for MV side CT1 (CT1rated/
MVrated current)
CTFactorSec2 1.0 - 10.0 - 0.1 1.0 CT factor for MV side CT2 (CT2rated/
MVrated current)

Table 104: REFPDIF Group settings (advanced)

Name Values (Range) Unit Step Default Description

ROA 60 - 119 Deg 1 60 Relay operate angle for zero sequence
directional feature if protected winding
neutral point is grounded via resistor
increase ROA to 115 degrees

7.3.7 Monitored data

PID-7411-MONITOREDDATA v1

Table 105: REFPDIF Monitored data

Name Type Values (Range) Unit Description

IRES REAL - A Magnitude of fund. freq. residual current
IN REAL - A Magnitude of fund. freq. neutral current
IBIAS REAL - A Magnitude of the bias current
IDIFF REAL - A Magnitude of fund. freq. differential
current
ANGLE REAL - deg Direction angle from zerosequence
feature
I2RATIO REAL - - Second harmonic ratio

7.3.8 Operation principle IP16290-1 v2

7.3.8.1 Fundamental principles of the restricted earth fault protection M5447-3 v16

Restricted earth fault protection, low impedance function (REFPDIF) detects earth faults on earthed
power transformer windings, most often an earthed star winding. REFPDIF is a unit protection of the
differential type. Since REFPDIF is based on the zero sequence current, which theoretically only
exists in case of an earth fault, REFPDIF can be made very sensitive regardless of normal load
currents. It is the fastest protection a power transformer winding can have. The high sensitivity and
the high speed tend to make such a protection unstable. Special measures must be taken to make it
insensitive to conditions for which it should not operate, for example, heavy through faults of phase-
to-phase type or heavy external earth faults.

REFPDIF is a differential protection of the low impedance type. All three-phase currents, and the
neutral point current, must be fed separately to REFPDIF. The fundamental frequency components of
all currents are extracted from all input currents, while other eventual zero sequence components,
such as the 3rd harmonic currents, are fully suppressed. Then the residual current phasor is
calculated from the three line current phasors. This zero sequence current phasor is added to the
neutral current vectorially, in order to obtain differential current.

The following facts may be observed from Figure 59 and Figure 60, where the three line CTs are
shown as connected together in order to measure the residual 3Io current, for the sake of simplicity.

Transformer protection RET670 187

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

These three zone of protection

zero-sequence
currents are not measured
Izs1
L1 L1

Power Izs1
L2 L2
system
Izs1 L3
L3
3Izs1

Uzs Current in the neutral

IL1+ IL2+IL3 = 3I0 (measured as IN ) serves
3I0 = 3Izs1 IN = -3Izs1 as a directional reference
Ifault (Summation in the IED) because it has the same
direction for both internal
Return path through
transformer and external faults.
Return path via
power system
External
fault
block operate Zero-sequence differential
region
IN current for external fault
3I0
Idiff = abs(3I0 + IN )
block Idiff = 3Izs1 - 3Izs1 = 0
ROA
External Internal
fault block fault
ROA = Relay Operate Angle
region region
IEC09000107-3-en.vsd
IEC09000107-3 V1 EN-US

Figure 59: Zero sequence currents at an external earth fault

zone of protection

Izs2 Izs1
L1 L1
Power Izs2 Izs1
L2 L2
system
Izs2 Izs1 L3
L3
3Izs1

Uzs Current in the neutral

IL1+ IL2+IL3 = 3I0 (measured as IN ) serves
IN = -3Izs1 as a directional reference
3I0 = -3Izs2 Ifault
(Summation in the IED) because it has the same
direction for both internal
and external faults.
Return path via Return path
power system through transformer
External
Zero-sequence differential
fault
block operate
region current for internal fault
3I0 Idiff = abs(3I0 + IN )
Idiff = 3Izs2 + 3Izs1 > 0
block IN (reference) Idiff = Ifault
ROA
External Internal
fault
block fault ROA = Relay Operate Angle
region region
IEC09000108-3-en.vsd
IEC09000108-3 V1 EN-US

Figure 60: Zero sequence currents at an internal earth fault

1. For an external earth fault (Figure 59), the residual current 3Io and the neutral current IN have
equal magnitude, but they are seen within the IED as 180 degrees out-of-phase if the current
transformers are connected as in Figure 59, which is the Hitachi Power grids recommended
connection. The differential current becomes zero as both CTs ideally measure exactly the same
component of the earth fault current.
2. For an internal fault, the total earth fault current is composed generally of two zero sequence
currents. One zero sequence current (3IZS1) flows towards the power transformer neutral point
and into the earth, while the other zero sequence current (3IZS2) flows into the connected power
system. These two primary currents can be expected to have approximately opposite directions
(about the same zero sequence impedance angle is assumed on both sides of the earth fault).

188 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

However, on the secondary CT sides of the current transformers, they will be approximately in
phase if the current transformers are oriented as in Figure 57, which is the orientation
recommended by Hitachi Power grids. The magnitudes of the two currents may be different,
dependent on the magnitudes of zero sequence impedances on both sides. No current can flow
towards the power system, if the only point where the system is earthed, is at the protected
power transformer. Likewise, no current can flow into the power system, if the winding is not
connected to the power system (circuit breaker open and power transformer energized from the
other side).
3. For both internal and external earth faults, the current in the neutral connection IN always has
the same direction, which is towards the earth (except in case of autotransformers where the
direction can vary).
4. The two internally processed zero sequence currents are 3Io and IN. The vectorial sum is the
REFPDIF differential current, which is equal to Idiff = IN +3Io .

The line zero sequence (residual) current is calculated from 3 line (terminal) currents. A bias quantity
must give stability against false operations due to high through fault currents. To stabilize REFPDIF
at external faults, an operate-bias characteristic is used.

REFPDIF should also be stable against heavy phase-to-phase internal faults, not including earth.
These faults may also give false zero sequence currents due to saturated line CTs. Such faults,
however are without neutral current, and can thus be eliminated as a source of danger.

As an additional measure against unwanted operation, a directional check is made in agreement with
the above points 1 and 2. Operation is only allowed if the currents 3Io and IN (as shown in Figure 59
and Figure 60) are both within the operating region. By taking a smaller ROA, REFPDIF can be
made more stable under heavy external fault conditions, as well as under the complex conditions,
when external faults are cleared by other protections.

7.3.8.2 Restricted earth fault protection, low impedance differential protection M5447-20 v14

Restricted earth fault protection, (REFPDIF) is a protection of low impedance differential type, a unit
protection, whose settings are independent of any other protection. It has some advantages
compared to the transformer differential protection. It is less complicated, as no current phase
correction or magnitude correction is needed, not even in the case of an eventual on-load tap
changer (OLTC). REFPDIF is not sensitive to inrush and overexcitation currents. The thing to take
into account is an eventual current transformer saturation.

The differential protection REFPDIF calculates a differential current and a bias current. In case of
internal earth faults, the differential current is theoretically equal to the total earth fault current. The
bias to give stability to REFPDIF. The bias current is a measure of how high the currents are and how
difficult the conditions are under which the CTs operate. With a high bias, difficult conditions can be
suspected, and it will be more likely that the calculated differential current has a component of a false
current, primarily due to CT saturation. This “law” is formulated by the operate-bias characteristic.
This characteristic divides the Idiff - Ibias plane in two areas. The area above the operate-bias
characteristic is the operate area (trip), while the one below is the restrain (block) area, see Figure
62.

Calculation of operate bias characteristic

End of zone 1:

Endzone1 = 125%

End of zone 2:

Endzone2 =

Transformer protection RET670 189

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

(100 − IdMin)
EndZone2 = 125 +
0.7
IECEQUATION20201 V1 EN-US (Equation 26)

SlopeSection2:

The slope in section 2 (see Figure 62) of operate-restrain characteristic is fixed to 70%. The slope
section 2, starts at end of zone 1, continues until end of zone 2.

SlopeSection3:

The slope in section 3 (see Figure 62) of operate-restrain characteristic is fixed to 100%. The slope
section 3, starts at end of zone 2 and continues.

REFPDIF uses an operate-bias characteristic shown in Figure 62, using a setting IdMin see Table 7.

Table 107: Setting range of IdMin, end zones and slopes

IdMin default IdMin min (zone IdMin max (zone End of zone 1 Slope section 2 Slope section 3
(zone 1) 1) 1) (fixed) (fixed) (fixed)
% of IBase % of IBase % of IBase % of IBase % of IBase % of IBase
10 4 100 125 70 100

IEC20000410-1-en.vsdx
IEC20000410 V1 EN-US

Figure 62: Representation of Operate-bias characteristics at different IdMin setting values

Figure 62 represents the Operate-bias characteristics at different IdMin setting values

The highest individual current contribution is taken as a common bias (restrain) current among all
phase currents or neutral current. This "maximum principle" makes the differential protection more
secure, with less risk to operate for external faults and in the same time brings more meaning to the
breakpoint settings of the operate-restrain characteristic.

7.3.8.3 Calculation of differential current and bias current M5447-47 v13

The differential current (operate current), as a fundamental frequency phasor, is calculated as (with
designations as in Figure 59 and Figure 60):

190 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

Idiff = IN + 3 Io
EQUATION1533 V1 EN-US (Equation 27)

where:

IN is current in the power transformer neutral as a fundamental frequency phasor.

3Io is residual current of the power transformer terminal currents as a phasor.

If there are two three-phase CT inputs, as in breaker-and-a-half configurations, then their respective
residual currents are added within the REFPDIF function so that:

I3PW1 = I3PW1CT1 + I3PW1CT2

where the signals are defined in the input and output signal tables for REFPDIF.

The bias current is a measure (expressed internally as a true fundamental frequency current in
Amperes) of how difficult the conditions are under which the instrument current transformers operate.
Dependent on the magnitude of the bias current, the corresponding zone (section) of the operate-
bias characteristic is applied, when deciding whether to trip, or not to trip. In general, the higher the
bias current, the higher the differential current required to produce a trip.

The bias current is the highest current of all separate input currents to REFPDIF, that is, of current in
phase L1, phase L2, phase L3, and the current in the neutral point (designated as IN in Figure and
in Figure Figure).

If there are two feeders included in the zone of protection of REFPDIF, as in case of an auto-
transformer with two feeders included on both sides, then the respective bias current is found as the
relatively highest of the following currents:

1
current 1 = max( I 3PW 1CT1) 
CTFactor Pr i1
EQUATION1526 V2 EN-US (Equation 28)

1
current  2 = max( I 3PW 1CT 2) 
CTFactor Pr i 2
EQUATION1527 V2 EN-US (Equation 29)

1
current 3 = max( I 3PW 2CT1) 
CTFactorSec1
EQUATION1528 V2 EN-US (Equation 30)

1
current  4 = max( I 3PW 2CT 2) 
CTFactorSec2
EQUATION1529 V2 EN-US (Equation 31)

current 5 = IN
EQUATION1530 V2 EN-US (Equation 32)

The bias current is thus generally equal to none of the input currents. If all primary ratings of the CTs
were equal to IBase, then the bias current would be equal to the highest current in Amperes. IBase
shall be set equal to the rated current of the protected winding where REFPDIF function is applied.

7.3.8.4 Detection of external earth faults M5447-75 v12

External faults are more common than internal earth faults for which the restricted earth fault
protection should operate. It is important that the restricted earth fault protection remains stable

Transformer protection RET670 191

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

during heavy external earth and phase-to-phase faults, and also when such a heavy external fault is
cleared by some other protection such as overcurrent, or earth fault protection. The conditions during
a heavy external fault, and particularly immediately after the clearing of such a fault may be complex.
The circuit breaker’s poles may not open exactly at the same moment, some of the CTs may still be
highly saturated, and so on.

The detection of external earth faults is based on the fact that for such a fault a high neutral current
appears first, while a false differential current only appears if one or more current transformers
saturate.

An external earth fault is thus assumed to have occurred when a high neutral current suddenly
appears, while at the same time the differential current Idiff remains low, at least for a while. This
condition must be detected before a trip request is placed within REFPDIF. Any search for external
fault is aborted if a trip request has been placed. A condition for a successful detection is that it takes
not less than 4ms for the first CT to saturate.

For an internal earth fault, a true differential current develops immediately, while for an external fault
it only develops if a CT saturates. If a trip request comes first, before an external fault could be
positively detected, then it must be an internal fault.

If an external earth fault has been detected, then the REFPDIF is temporarily desensitized.

Directional criterion M5447-110 v13

The directional criterion is applied in order to positively distinguish between internal and external
earth faults. This check is an additional criterion, which should prevent malfunctions at heavy
external earth faults, and during the disconnection of such faults by other protections. Earth faults on
lines connecting the power transformer occur much more often than earth faults on a power
transformer winding. It is important that the Restricted earth fault protection, low impedance
(REFPDIF) must remain stable during an external fault, and immediately after the fault has been
cleared by some other protection.

For an external earth faults with no CT saturation, the residual current in the lines (3Io) and the
neutral current (IN in Figure 59) are theoretically equal in magnitude and are 180 degrees out-of-
phase. The current in the neutral (IN) serves as a directional reference because it has the same
direction for both internal and external earth faults. The directional criterion in REFPDIF protection
makes it a current-polarized protection.

However, if one or more CTs saturate under external fault conditions, then the measured currents 3Io
and IN may no longer be equal, nor will their positions in the complex plane be exactly 180 degrees
apart. There is a risk that the resulting false differential current Idiff enters the operate area of the
operate-restrain characteristic under external fault conditions. If this happens, a directional test may
prevent a malfunction.

A directional check is only executed if:

1. a trip request signal has been issued (REFPDIF function START signal set to 1)
2. the residual current in lines (3Io) is at least 3% of the IBase current.

If a directional check is either unreliable or not possible to do, due to too small currents, then the
direction is cancelled as a condition for an eventual trip.

If a directional check is executed, the REFPDIF protection operation is only allowed if currents 3Io
and IN (as seen in Figure 59 and Figure 60) are both within the operating region determined by the
set value of ROA, in degrees.

ROA = 60 to 119 deg; where ROA stands for Relay Operate Angle.

Second harmonic analysis M5447-106 v13

When energizing a transformer a false differential current may appear in earth fault protection, low
impedance function (REFPDIF). The phase CTs may saturate due to a high DC component with a

192 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

long duration, but the current through the neutral CT does not have either the same DC component
or the same amplitude and the risk for saturation of this CT is not as high. As a result, the differential
current due to the saturation may be so high that it reaches the operate characteristic. A calculation
of the content of 2nd harmonic in the neutral current is made when the neutral current, residual
current and bias current are within some windows and some timing criteria are fulfilled. If the ratio
between second and fundamental harmonic exceeds the preset value of 40% 40%, REFPDIF is
blocked.

7.3.8.5 Algorithm of the restricted earth fault protection M5447-95 v14

1. Check if current in the neutral Ineutral (IN) is less than 50% of the base sensitivity Idmin. If yes,
only service values are calculated, and rest of the REFPDIF algorithm is not executed.
2. If current in the Ineutral (IN) is more than 50% of Idmin, then determine the bias current Ibias.
3. Determine the differential (operate) current Idiff as a phasor, and calculate its magnitude.
4. Check if the point P(Ibias, Idiff) is above the operate-bias characteristic. If yes, increment the trip
request counter by 1. If the point P(Ibias, Idiff) is found to be below the operate-bias
characteristic, then the trip request counter is reset to zero.
5. If the trip request counter is still zero, search for an eventual heavy external earth fault. The
search is only made if the neutral current is at least 50% of the Idmin current. If an external earth
fault has been detected, a flag is set which remains set until the external fault has been cleared.
The external fault flag is reset to zero when Ineutral falls below 50% of the base sensitivity
Idmin. Any search for an external fault is aborted if trip request counter is greater than zero.
6. As long as the external fault persists, an additional temporary trip condition is introduced. This
means that REFPDIF is temporarily desensitized.
7. If point P(Ibias, Idiff) is found to be above the operate-bias characteristic), so that trip request
counter is greater than zero, a directional check can be made. The directional check is made
only if Iresidual (3Io) is more than 3% of the IBase current. If the result of the check means
“external fault”, then the internal trip request is reset. If the directional check cannot be
executed, then direction is no longer a condition for a trip.
8. When neutral current, residual current and bias current are within some windows and some
timing criteria are fulfilled, the ratio of 2nd to fundamental harmonic is calculated. If it is found to
be above 40%, the trip request counter is reset and TRIP remains zero.
9. If point P(Ibias, Idiff) is found to be above the operate-bias characteristic), a directional check
can be made. The directional check is made only if Iresidual (3Io) is more than 3% of the IBase
current. If the result of the check means “external fault”, then the internal trip request is reset. If
the directional check cannot be executed, then the direction is no longer a condition for a trip.
10. Finally, the trip request counter is checked. If the trip request counter is greater or equal than 2
and at the same time the actual bias current is at least 50% of the highest bias current Ibiasmax
(Ibiasmax is the highest recording of any of the three phase currents measured during the
disturbance), REFPDIF will set output TRIP to 1. Otherwise, the TRIP signal remains zero.
11. Finally, a check is made if the trip request counter is equal to, or higher than 2. If yes, and at the
same instance of time tREFtrip, the actual bias current at this instance of time tREFtrip is at least
50% of the highest bias current Ibiasmax (Ibiasmax is the highest recording of any of the three
phase currents measured during the disturbance), then REFPDIF sets output TRIP to 1. If the
counter is less than 2, the TRIP signal remains zero.

7.3.9 Technical data IP12661-1 v1

M13062-1 v23

Table 108: REFPDIF technical data

Function Range or value Accuracy

Operating characteristic Adaptable ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir

Reset ratio > 95% -

Minimum pickup, IdMin (4.0-100.0)% of IBase ±1.0% of Ir

Table continues on next page

Transformer protection RET670 193

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

Function Range or value Accuracy

Directional characteristic Fixed 180 degrees or ±60 to ±119 ±2.0 degrees
degrees
Operate time, trip at 0 to 10 x IdMin Min. = 15 ms -
Max. = 30 ms
Reset time, trip at 10 x IdMin to 0 Min. = 15 ms -
Max. = 30 ms
Second harmonic blocking 40.0% of fundamental ±1.0% of Ir

7.4 Additional security logic for differential protection

LDRGFC GUID-0E064528-0E70-4FA1-87C7-581DADC1EB55 v2

7.4.1 Identification
GUID-3081E62B-3E96-4615-97B8-2CCA92752658 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Additional security logic for differential LDRGFC - 11
protection

7.4.2 Functionality GUID-8F918A08-E50E-4E7B-BDCA-FF0B5534B289 v3

Additional security logic for differential protection (LDRGFC) can help the security of the protection
especially when the communication system is in abnormal status or for example when there is
unspecified asymmetry in the communication link. It helps to reduce the probability for mal-operation
of the protection. LDRGFC is more sensitive than the main protection logic to always release
operation for all faults detected by the differential function. LDRGFC consists of four sub functions:

• Phase-to-phase current variation

• Zero sequence current criterion
• Low voltage criterion
• Low current criterion

Phase-to-phase current variation takes the current samples as input and it calculates the variation
using the sampling value based algorithm. Phase-to-phase current variation function is a major one
to fulfill the objectives of the startup element.

Zero sequence criterion takes the zero sequence current as input. It increases the security of
protection during the high impedance fault conditions.

Low voltage criterion takes the phase voltages and phase-to-phase voltages as inputs. It increases
the security of protection when the three-phase fault occurred on the weak end side.

Low current criterion takes the phase currents as inputs and it increases the dependability during the
switch onto fault case of unloaded line.

The differential function can be allowed to trip as no load is fed through the line and protection is not
working correctly.

Features:

194 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

• Startup element is sensitive enough to detect the abnormal status of the protected system
• Startup element does not influence the operation speed of main protection
• Startup element would detect the evolving faults, high impedance faults and three phase fault on
weak side
• It is possible to block the each sub function of startup element
• Startup signal has a settable pulse time

7.4.3 Function block GUID-A205A0BB-C09E-42E2-B664-1863E1FF2A0A v2

LDRGFC
I3P* START
U3P* STCVL1L2
BLOCK STCVL2L3
BLKCV STCVL3L1
BLKUC STUC
BLK3I0 ST3I0
BLKUV STUV
REMSTUP

IEC14000015-1-en.vsd
IEC14000015 V1 EN-US

Figure 63: LDRGFC function block

7.4.4 Signals
PID-3558-INPUTSIGNALS v9

Table 109: LDRGFC Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKCV BOOLEAN 0 Block of ph to ph current variation criterion
BLKUC BOOLEAN 0 Block of the low current criterion
BLK3I0 BOOLEAN 0 Block of zero sequence current criterion
BLKUV BOOLEAN 0 Block of under voltage criterion
REMSTUP BOOLEAN 0 Startup signal of remote end

PID-3558-OUTPUTSIGNALS v9

Table 110: LDRGFC Output signals

Name Type Description

START BOOLEAN General startup signal
STCVL1L2 BOOLEAN Start signal for current variation criterion for phase L1L2
STCVL2L3 BOOLEAN Start signal for current variation criterion for phase L2L3
STCVL3L1 BOOLEAN Start signal for current variation criterion for phase L3L1
STUC BOOLEAN Start signal for low current criterion
ST3I0 BOOLEAN Start signal for zero sequence current criterion
STUV BOOLEAN Start signal for under voltage criterion

Transformer protection RET670 195

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

7.4.5 Settings
PID-3558-SETTINGS v9

Table 111: LDRGFC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off/On
On
tStUpReset 0.000 - 60.000 s 0.001 7.000 Reset delay for startup signal
OperationCV Off - - On Operation current variation Off/On
On
ICV> 1 - 100 %IB 1 20 Fixed threshold for ph to ph current
variation criterion
OperationUC Off - - On Operation low current criterion Off/On
On
IUC< 1 - 100 %IB 1 5 Start value for low current operation in %
of IBase
Operation3I0 Off - - On Operation zero sequence current
On criterion Off/On
I3I0> 1 - 100 %IB 1 10 Start value for zero sequence current
criterion in % of IBase
OperationUV Off - - On Operation under voltage criterion Off/On
On
UPhN< 1 - 100 %UB 1 60 Start value for phase voltage criterion in
% of UBase
UPhPh< 1 - 100 %UB 1 60 Start value for ph to ph voltage criterion
in % of UBase

Table 112: LDRGFC Group settings (advanced)

Name Values (Range) Unit Step Default Description

tCV 0.000 - 0.005 s 0.001 0.002 Time delay for phase to phase current
variation
tUC 0.000 - 60.000 s 0.001 0.200 Time delay for low current criterion
t3I0 0.000 - 60.000 s 0.001 0.000 Time delay for zero sequence current
criterion
tUV 0.000 - 60.000 s 0.001 0.000 Time delay for low voltage criterion

Table 113: LDRGFC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

7.4.6 Monitored data

PID-3558-MONITOREDDATA v8

Table 114: LDRGFC Monitored data

Name Type Values (Range) Unit Description

IL1 REAL - A Current RMS value for phase L1
IL2 REAL - A Current RMS value for phase L2
IL3 REAL - A Current RMS value for phase L3
3I0 REAL - A Zero sequence current value
Table continues on next page

196 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

Name Type Values (Range) Unit Description

UL1 REAL - kV Voltage RMS value for phase L1
UL2 REAL - kV Voltage RMS value for phase L2
UL3 REAL - kV Voltage RMS value for phase L3
UL12 REAL - kV Voltage RMS value for ph to ph L1L2
UL23 REAL - kV Voltage RMS value for ph to ph L2L3
UL31 REAL - kV Voltage RMS value for ph to ph L3L1

7.4.7 Operation principle GUID-60091A2A-AC10-4E04-B4B8-C190E3E07D3E v6

The additional security logic for differential protection (LDRGFC) takes the current samples, current
RMS values, phase voltage values, phase-to-phase voltage values, zero sequence current and
remote side startup signals as inputs.

Startup signal becomes activated when any one of the current variation startup signal, zero
sequence current startup signal, voltage startup signal, and current startup signal is activated.

Phase-to-phase current variation takes current samples and generates the startup signal by
comparing with the start value.

If the zero sequence current value is greater than the start value of zero sequence current then the
zero sequence current startup signal will be activated.

Voltage startup signal becomes activated when the any of phase voltage and line voltage is less than
the voltage start value and the remote startup signal has to be activated.

Current startup signal becomes activated when the current value in all phases is less than current
start value.

Phase-to-phase current variation

The phase-to-phase current variation is the main startup element. It covers most of the abnormal
conditions of the system. The phase-to-phase current variation fails in high impedance faults, three-
phase faults on weak side and switch onto fault on unloaded line because of low sensitivity in these
cases.

Phase-to-phase current variation takes the current samples as input and the signal is evaluated
using the sampling value based algorithm.

The phase-to-phase current variation criterion is shown below:

DiFF > 1.8DIT + DI ZD

EQUATION2255 V1 EN-US

Where:
ΔiФФ sampling value of phase-to-phase current variation

ΔIZD setting of fixed threshold, which corresponds to setting ICV>. The default value for the setting is
0.2·IBase, where IBase is the base current.
ΔIT float threshold

It is the full-circle integral of the phase-to-phase current variation

Transformer protection RET670 197

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

1 2T -1
DI T = å | DiFF (t - n) |
T n =T
EQUATION2256 V1 EN-US

Where:
T count of sample values in one cycle

ΔiФФ is calculated using the below formula:

Di (k ) = [i ( k ) - i (k - N )] - [i (k - N ) - i (k - 2 N )]
= i ( k ) - 2i ( k - N ) + i (k - 2 N )
EQUATION2257 V1 EN-US

N is the number of samples in one cycle.

tCV
STCVL1L2
t
cont

I3P Current variation tCV

STCVL2L3
subfunction t
i
tCV
STCVL3L1
t

OR STCV
cont

IEC10000295-1-en.vsd
IEC10000295 V1 EN-US

Figure 64: Current variation logic diagram

tCV is the time setting for the change of current criterion. Phase current samples are included in input
signal I3P.

Zero sequence current criterion

Zero sequence criterion is mainly for detection of remote IED high resistance faults or some gradual
faults. The criterion takes the zero sequence current as input. Zero sequence current is compared
with I3I0> for the t3I0 time to generate the zero sequence current startup signal.

198 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

I3P a
a>b t3I0
I3IO> b ST3I0
AND t

BLK3I0
BLOCK OR

IEC09000778-2-en.vsd
IEC09000778 V2 EN-US

Figure 65: Zero sequence current criterion logic diagram

I3I0> is the setting of the maximum possible non-faulted zero sequence current for the protected line.
The default value for this setting is 0.1 · IBase where IBase is the rated current of the CT.

t3I0 is the time setting for the zero sequence current criterion.

The zero sequence current criterion can be blocked by activating the BLK3I0 input signal.

Low voltage criterion

Low voltage criterion is mainly for detection of the three phase faults occurring on weak side with pre-
fault no load condition. The low voltage criterion takes the voltage phase values, voltage phase-to-
phase values and remote startup signals as inputs. The logic for low voltage criterion is shown below:

U3P (UPhN) a
a<b
UPhN< b
OR
U3P (UPhPh) a
a<b
UPhPh< b
tUV STUV
REMSTUP (Recived)
AND t

BLKUV
BLOCK OR

IEC09000779-2-en.vsd
IEC09000779 V2 EN-US

Figure 66: Low voltage criterion logic diagram

Voltage phase value is compared with the start value of voltage phase and voltage phase-to-phase
value is compared with the start value of voltage phase-to-phase. If any of the phase voltage or
phase-to-phase voltages is below the set voltage levels for some time duration (tUV) then the low
voltage START signal becomes activated after receiving the remote startup signal. Low voltage
criterion can be blocked by activating BLKUV input signal.

If there are more than one remote IED, all the startup signals of the remote ends are logically OR to
obtain the REMSTUP signal from the remote side as input.

Low current criterion

The current in each phase is compared to the set current level. If all currents are below setting IUC<,
the STUC output is activated after the set delay tUC.

Transformer protection RET670 199

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

I3P
a
a<b tUC
IUC< b STUC
AND t

BLKUC
BLOCK OR

IEC09000780-2-en.vsd
IEC09000780 V2 EN-US

Figure 67: Low current criterion logic diagram

Security logic for differential protection

The configuration for the additional security logic for differential protection is shown in Figure 68. The
function will release tripping of the line differential protection up to the end of timer tStUpReset.

Phase-phase STCV
i
current variation

Zero sequence ST3IO

I0 > tStUpReset
current criterion START Local side start-up
t
Send signal to
Low voltage
OR remote side
criterion STUV
ULOW < AND
REMSTUP
Low current
criterion STUC
I0 <

IEC10000296-3-en.vsd

IEC10000296 V3 EN-US

Figure 68: Additional security logic for differential protection. Logic diagram for start up
element.

7.4.8 Technical data

GUID-0BD8D3C9-620A-426C-BDB5-DAA0E4F8247F v5

Table 115: LDRGFC technical data

Function Range or value Accuracy

Operate current, zero sequence current (1-100)% of lBase ±1.0% of Ir

Operate current, low current operation (1-100)% of lBase ±1.0% of Ir

Operate voltage, phase to neutral (1-100)% of UBase ±0.5% of Ur

Operate voltage, phase to phase (1-100)% of UBase ±0.5% of Ur

Independent time delay, zero sequence (0.000-60.000) s ±0.2% or ±35 ms

current at 0 to 2 x Iset whichever is greater

Independent time delay, low current operation (0.000-60.000) s ±0.2% or ± 35 ms

at 2 x Iset to 0 whichever is greater

Independent time delay, low voltage operation (0.000-60.000) s ±0.2% or ±35 ms

at 2 x Uset to 0 whichever is greater

Reset time delay for startup signal at 0 to 2 x (0.000-60.000) s ±0.2% or ±35 ms

Uset whichever is greater

200 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

7.5 Self-adaptive differential protection for two-winding

power transformers PSTPDIF GUID-8C8A342F-0819-4C6E-A32F-E01DB398B8ED v1

7.5.1 Identification
GUID-BB53C1B5-E5D4-4351-83E7-FFEDD54AE584 v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Self-adaptive differential protection for PSTPDIF 87T
two-winding power transformers
3Id/I

SYMBOL-BB V1 EN-US

7.5.2 Functionality GUID-C313E571-F589-4D45-B832-FB60B3509C02 v3

The PSTPDIF function can be used as a differential protection for any two-winding three-phase
power transformers. It is especially suitable for the differential protection of phase-shifting
transformers (PST), which is also called phase-angle regulating transformers (PAR). This function is
similar to the standard transformer differential protection function T2WPDIF (or 87T), but it can be
applied to any type and construction of PST.

The differential protection is self-adaptive. It automatically learns and adopts to the actual
transformation ratio and phase-angle shift across the protected transformer. Thus, any PST
regardless of its construction principles (that is, symmetrical or asymmetrical) and design details (that
is, single-core, double-core or even of complex design) can be entirely protected by using the
PSTPDIF function.

The function is provided with two sets of three-phase current inputs (one from each side of the PST).
Therefore, either the CTs located in bushings of the PST or in series with them shall be used. Both
current inputs are provided with percentage bias restraint features. Note that two VT inputs, one from
each side, shall also be connected to the function. Either single-phase or three-phase VT inputs can
be used.

two-winding PST
transformer

IEC18000153-1-en.vsdx
IEC18000153 V1 EN-US

two-winding PST with

unloaded tertiary delta-winding
transformer

IEC18000154-1-en.vsdx

IEC18000154 V1 EN-US

Figure 69: Possible arrangements for phase-shifting transformer differential protection

An adaptive stabilizing feature is included for heavy through-fault currents. As the false differential
current is practically equal to zero during all operating conditions of the PST, the differential
protection pick-up can be set to optimum sensitivity, thus covering internal faults with a low fault
current level such as turn-to-turn faults.

Transformer protection RET670 201

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

Stabilization is included for inrush and over-excitation currents, and cross-blocking is also included.
Adaptive stabilization is included for the system recovery inrush and CT saturation during external
faults. A high set unrestrained differential current protection element is included for higher speed
tripping at high internal fault currents.

A sensitive differential protection element based on the theory of negative-sequence current

component is included. This element offers the best possible coverage of transformer winding(s)
turn-to-turn faults.

In order for all theoretical explanation given in this document to be true, the following CT and VT
connection rules shall be adopted:

• Currents and voltages from the source side (S-side) should be connected to winding one (W1)
inputs on the PSTPDIF function block. Individual phases of the connected current and voltage
signals should be connected in the same sequence as the PST bushing markings on the
source-side of the PST, for example, S1, S2, or S3.
• Currents and voltages from the load side (L-side) should be connected to winding two (W2)
inputs on the PSTPDIF function block. Individual phases of the connected current and voltage
signals should be connected in the same sequence as the PST bushing markings on the load-
side of the PST, for example, L1, L2, or L3.

7.5.3 Function block GUID-82E8B8C8-4C3C-4878-9C08-0CEDD2B2F63A v1

PSTPDIF
I3PW1* TRIP
I3PW2* TRIPRES
U3PW1* TRIPUNRE
U3PW2* TRNSUNR
BLOCK TRNSSENS
BLKRES START
BLKUNRES STL1
BLKNSUNR STL2
BLKNSSEN STL3
USEDFLT INTFAULT
STOPCOMP EXTFAULT
BLK2H
BLK2HL1
BLK2HL2
BLK2HL3
BLK5H
BLK5HL1
BLK5HL2
BLK5HL3
BLKWAV
BLKWAVL1
BLKWAVL2
BLKWAVL3
IDALARM
IDL1
IDL2
IDL3
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG
IRATIO
IANGLE
URATIO
UANGLE
SELMEAS
DIFRATIO
DIFANGLE

IEC18000102-1-en.vsdx
IEC18000102 V1 EN-US

Figure 70: PSTPDIF function block

202 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

7.5.4 Signals
PID-7109-INPUTSIGNALS v1

Table 116: PSTPDIF Input signals

Name Type Default Description

I3PW1 GROUP - Group signal for primary current input, three phase
SIGNAL
I3PW2 GROUP - Group signal for secondary current input, three phase
SIGNAL
U3PW1 GROUP - Group signal for primary voltage input
SIGNAL
U3PW2 GROUP - Group signal for secondary voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function and enabling of fast synch of the phase angle
shift and ratio
BLKRES BOOLEAN 0 Block of trip for restrained differential feature
BLKUNRES BOOLEAN 0 Block of trip for unrestrained differential feature
BLKNSUNR BOOLEAN 0 Block of trip for unrestr. neg. seq. differential feature
BLKNSSEN BOOLEAN 0 Block of trip for sensitive neg. seq. differential feature
USEDFLT BOOLEAN 0 Forces the calculation of ratio and phase angle to use default
values
STOPCOMP BOOLEAN 0 Stops ratio and phase angle compensation and freezes their
values

PID-7109-OUTPUTSIGNALS v1

Table 117: PSTPDIF Output signals

Name Type Description

TRIP BOOLEAN General trip signal
TRIPRES BOOLEAN Trip signal from restrained differential protection
TRIPUNRE BOOLEAN Trip signal from unrestrained differential protection
TRNSUNR BOOLEAN Trip signal from unrestrained negative sequence differential
protection
TRNSSENS BOOLEAN Trip signal from sensitive negative sequence differential
protection
START BOOLEAN General start signal from any phase
STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3
INTFAULT BOOLEAN Indication that internal fault has been detected
EXTFAULT BOOLEAN Indication that external fault/disturbance has been detected
BLK2H BOOLEAN General second harmonic block signal from any phase
BLK2HL1 BOOLEAN Second harmonic block signal, phase L1
BLK2HL2 BOOLEAN Second harmonic block signal, phase L2
BLK2HL3 BOOLEAN Second harmonic block signal, phase L3
BLK5H BOOLEAN General fifth harmonic block signal from any phase
BLK5HL1 BOOLEAN Fifth harmonic block signal, phase L1
BLK5HL2 BOOLEAN Fifth harmonic block signal, phase L2
Table continues on next page

Transformer protection RET670 203

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

Name Type Description

BLK5HL3 BOOLEAN Fifth harmonic block signal, phase L3
BLKWAV BOOLEAN General block signal, waveform criterion, from any phase
BLKWAVL1 BOOLEAN Block signal, waveform criterion, phase L1
BLKWAVL2 BOOLEAN Block signal, waveform criterion, phase L2
BLKWAVL3 BOOLEAN Block signal, waveform criterion, phase L3
IDALARM BOOLEAN Alarm for sustained diff currents in all three phases
IDL1 REAL Value of the instantaneous differential current, phase L1
IDL2 REAL Value of the instantaneous differential current, phase L2
IDL3 REAL Value of the instantaneous differential current, phase L3
IDL1MAG REAL Magnitude of fundamental frequency differential current, phase L1
IDL2MAG REAL Magnitude of fundamental frequency differential current, phase L2
IDL3MAG REAL Magnitude of fundamental frequency differential current, phase L3
IBIAS REAL Magnitude of the bias current, which is common to all phases
IDNSMAG REAL Magnitude of the negative sequence differential current
IRATIO REAL Ratio between W1 and W2 positive sequence current magnitudes
IANGLE REAL Angle difference between W1 and W2 positive sequence current
phasors
URATIO REAL Ratio between W2 and W1 selected voltage magnitudes
UANGLE REAL Angle difference between W1 and W2 selected voltage phasors
SELMEAS INTEGER Presently used source of measurement for ratio and phase shift
calculation (1=default settings, 2=voltage, 4=current, 8=frozen,
16=external freeze)
DIFRATIO REAL Ratio between W1 and W2 magnitudes
DIFANGLE REAL Angle difference between W1 and W2 phasors

7.5.5 Settings
PID-7109-SETTINGS v1

Table 118: PSTPDIF Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSelW1 1 - 12 - 1 1 Global base selector for winding 1
GlobalBaseSelW2 1 - 12 - 1 1 Global base selector for winding 2
SelPhaseVoltW1 Phase L1 - - Phase L1 Group signal for primary voltage input
Phase L2
Phase L3
Phase L1L2
Phase L2L3
Phase L3L1
Positive sequence
SelPhaseVoltW2 Phase L1 - - Phase L1 Group signal for secondary voltage input
Phase L2
Phase L3
Phase L1L2
Phase L2L3
Phase L3L1
Positive sequence
ZSCurrSubtrW1 Off - - On Enable zero sequence current
On subtraction for W1 side, On / Off
Table continues on next page

204 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

Name Values (Range) Unit Step Default Description

ZSCurrSubtrW2 Off - - On Enable zero sequence current
On subtraction for W2 side, On / Off
DefaultPhShift -180 - 180 Deg 1 0 Default phase angle shift between two
sides, used when U and I are not
available. This angle shall be positive
when W2 is leading the W1. This angle
shall be negative when W2 is lagging
W1.
ReverseAngle Off - - Off When enabled it will force the sign
On change of the measured phase angle
shift across transformer
DiffRatioMax 1.002 - 1.500 - 0.001 1.050 Maximum allowed ratio between W1 and
W2 magnitudes
DiffRatioMin 0.500 - 0.998 - 0.001 0.950 Minimum allowed ratio between W1 and
W2 magnitudes
DiffAngleMax 0.1 - 90.0 Deg 0.1 90.0 Maximum allowed phase angle between
W1 and W2
DiffAngleMin -90.0 - -0.1 Deg 0.1 -90.0 Minimum allowed phase angle between
W1 and W2

Table 119: PSTPDIF Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
IDiffAlarm 0.02 - 0.50 IB 0.01 0.05 Differential current alarm, multiple of
IBase in GlobalBaseSelW1
tAlarmDelay 0.000 - 60.000 s 0.001 10.000 Time delay for differential currents alarm
level
IdMin 0.10 - 0.60 IB 0.01 0.20 Section 1 sensitivity, multiple of IBase in
GlobalBaseSelW1
IdUnre 4.00 - 60.00 IB 0.01 10.00 Unrestrained protection limit, multiple of
IBase in GlobalBaseSelW1
CrossBlockEn Off - - On Operation Off/On for cross-block logic
On between phases
NegSeqDiffEn Off - - On Operation Off/On for negative sequence
On differential protections
IMinNegSeq 0.04 - 0.80 IB 0.01 0.08 Negative sequence current limit, multiple
of IBase in GlobalBaseSelW1
NegSeqROA 30.0 - 120.0 Deg 0.1 60.0 Operate angle for internal / external
negative sequence fault discriminator
tTripNSSens 0.040 - 60.000 s 0.001 0.100 Time delay for negative sequence
sensitive trip

Table 120: PSTPDIF Group settings (advanced)

Name Values (Range) Unit Step Default Description

EndSection1 0.65 - 1.50 IB 0.01 1.25 End of section 1, multiple of IBase in
GlobalBaseSelW1
EndSection2 1.55 - 5.00 IB 0.01 3.00 End of section 2, multiple of IBase in
GlobalBaseSelW1
SlopeSection2 10.0 - 50.0 % 0.1 40.0 Slope in section 2 of operate-restrain
characteristic, in %
Table continues on next page

Transformer protection RET670 205

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

Name Values (Range) Unit Step Default Description

SlopeSection3 30.0 - 100.0 % 0.1 80.0 Slope in section 3 of operate-restrain
characteristic, in %
I2/I1Ratio 5.0 - 60.0 % 0.1 15.0 Max. ratio of 2nd harmonic to
fundamental harmonic differential current
in %
I5/I1Ratio 5.0 - 60.0 % 0.1 25.0 Max. ratio of 5th harmonic to
fundamental harmonic differential current
in %

7.5.6 Monitored data

PID-7109-MONITOREDDATA v1

Table 121: PSTPDIF Monitored data

Name Type Values (Range) Unit Description

IDL1MAG REAL - % Magnitude of fundamental frequency
differential current, phase L1
IDL2MAG REAL - % Magnitude of fundamental frequency
differential current, phase L2
IDL3MAG REAL - % Magnitude of fundamental frequency
differential current, phase L3
IBIAS REAL - % Magnitude of the bias current, which is
common to all phases
IDNSMAG REAL - % Magnitude of the negative sequence
differential current
IRATIO REAL - - Ratio between W1 and W2 positive
sequence current magnitudes
IANGLE REAL - deg Angle difference between W1 and W2
positive sequence current phasors
URATIO REAL - - Ratio between W2 and W1 selected
voltage magnitudes
UANGLE REAL - deg Angle difference between W1 and W2
selected voltage phasors
SELMEAS INTEGER 1=Default used - Presently used source of measurement
2=Voltage used for ratio and phase shift calculation
4=Current used (1=default settings, 2=voltage, 4=current,
8=Meas frozen 8=frozen, 16=external freeze)
16=External
freeze
DIFRATIO REAL - - Ratio between W1 and W2 magnitudes
DIFANGLE REAL - deg Angle difference between W1 and W2
phasors

7.5.7 Operation principle GUID-F5C08E18-F0E4-4F3B-83B1-DF6BF9DCF849 v3

PSTPDIF function is used to determine whether a fault is within the protected zone or outside of the
protected zone. The protected zone is limited by the position of current transformers (see Figure 71),
and in principle, it can include more objects than one transformer. For example, a series connection
of two transformers can be protected. If an internal fault occurs, the faulty part must be disconnected
immediately from the power system.

The main CTs should be star connected. The main CTs can be earthed either as ToObject or
FromObject. However, internally the differential function uses reference directions towards the
protected transformer on both sides (see Figure 71). Thus, the IED will always internally measure the

206 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

currents on both sides of the protected transformer with the same reference direction towards the
transformer windings as shown in Figure 71. For more information, see the Application manual.

PST
IW1 IW2
S L
Z1S1 Z1S2
E1S1 E1S2

IW1 UW1 UW2 IW2

Differential Relay

IEC18000155-1-en.vsdx
IEC18000155 V1 EN-US

Figure 71: Typical CT location and definition of positive current direction

Even in a healthy power transformer, the currents from two sides are generally not equal. This is due
to the transformation ratio (that is, no-load voltage ratio) and the phase-angle shift across the
protected transformer. Therefore, the PSTPDIF function must first correlate the two three-phase
current sets from the two sides to each other before any calculation of the differential currents can be
performed.

For standard power transformers, the transformation ratio and the phase-angle shift is fixed by the
transformer design. These parameters are typically then entered as setting parameters into the
differential protection function for standard power transformers. The transformation ratio for a
standard power transformer may vary slightly if an on-load tap-changer (OLTC) is built inside the
protected power transformer. Some differential functions may also compensate for such ratio
variations utilizing additional setting parameter and actual position of the OLTC.

However, for a PST, both the transformation ratio and the phase-angle shift may vary considerably
during different operating conditions. These variations are typically achieved by using one or more
OLTCs inside the protected PST. Therefore, it is much more difficult to set the PST differential
function to accurately compensate for such variations. The PSTPDIF function utilizes the connected
voltages and currents from the two sides of the PST to estimate on-line these two parameters, that
is, transformation ratio and phase-angle shift. Note that the position of any built-in OLTCs is not
required for this estimation. By using current and voltage signals only the function becomes self-
adaptive and learns on-line the actual transformation ratio and phase-angle shift across the protected
PST.

Only when correct compensation for the protected transformer actual transformation ratio and phase
angle shift is made, the phase-wise differential currents can be calculated. Use of any external
auxiliary (interposing) current transformers is not required.

As per the default settings, the PSTPDIF function expects that connected voltages and currents from
the power system has direct phase rotation, that is, L1-L2-L3. For a power system that has an
inverse phase rotation, that is, L3-L2-L1, do the following settings to ensure proper operation of the
function:

• Connect individual phases of the connected current and voltage signals in the same sequence
as the PST bushing markings on both sides (that is, with inverse rotation).
• Change the global setting PhaseRotation from the default value Normal=L1L2L3 to
Inverse=L3L2L1. Note that the PhaseRotation setting is common for all analog preprocessing
function blocks. It is located under Primary system values in the setting tool.
• Change the PSTPDIF setting ReverseAngle from the default value Off to On.

Transformer protection RET670 207

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

7.5.7.1 Function calculation principles

Measurement principle GUID-58BF2CC0-64D9-4EA3-9631-EC1B7BF051AA v2
To make a differential IED sensitive and stable at the same time, restrained differential characteristics
have been developed and is now adopted as the general practice in the protection of standard power
transformers. The same principles are also used here.

Base quantities GUID-98C121FB-20FB-468E-8AC0-6F53880D193C v2

The base power, current and voltage are entered for every winding (that is, side) under Global Base
Value data. The following relationship shall be valid irrespective of the type and construction of the
protected transformer.

S MAX  SBaseW 1  3  UBaseW 1  IBaseW 1  SBaseW 2  3  UBaseW 2  IBaseW 2

Where,

SMAX is the maximum rated throughput power of the protected PST.

S, U, I are the base (that is, rated) quantities for the respective sides.

Note that the base currents and voltages are typically entered for an OLTC position, which
corresponds to zero degree phase-angle shift across the PST. Namely, the PST is typically energized
at this tap position. These current and voltage values shall be entered as stated on the protected
transformer rating plate for this zero degree tap. For a standard two-winding transformer, the base
currents and voltages are typically entered for an OLTC position, which corresponds to the middle
position of OLTC.

Also, these quantities define the default PST transformation ratio in accordance with the following
equation:

Default _ Ratio  (UBaseW 2 / UBaseW 1 )  ( IBaseW 1 / IBaseW 2 )

The voltage ratio is used in the PSTPDIF algorithm as a default value.

The base quantities for the PSTPDIF function are set under Global Base Values in the Parameter
Setting tool.

Fundamental frequency differential currents GUID-59CC3CE6-21B3-4606-AE12-380C2F38AB99 v2

The fundamental frequency differential current is a vectorial sum (sum of fundamental frequency
phasors) of the individual phase currents from different sides of the protected power transformer.

Before calculating any differential current, the power transformer actual phase shift and actual
transformation ratio must be accounted for. This is done using the following equation.

 IDL1   IL1_ W 1   IL1_ W 2 

 IDL2   M (0)   IL2 _ W 1  Ratio  M ( )   IL2 _ W 2 
  W1   W2  
 IDL3   IL3 _ W 1  IL3 _ W 2 
IECEQUATION18037 V1 EN-US (Equation 33)

Where,

IDL1 is the differential current phasor in phase L1 (in W1 side primary amperes)
IDL2 is the differential current phasor in phase L2 (in W1 side primary amperes)

208 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

IDL3 is the differential current phasor in phase L3 (in W1 side primary amperes)
IL1_W1 is the W1 current phasor in phase L1 (in W1 side primary amperes)
IL2_W1 is the W1 current phasor in phase L2 (in W1 side primary amperes)
IL3_W1 is the W1 current phasor in phase L3 (in W1 side primary amperes)
IL1_W2 is the W2 current phasor in phase L1 (in W2 side primary amperes)
IL2_W2 is the W2 current phasor in phase L2 (in W2 side primary amperes)
IL3_W2 is the W2 current phasor in phase L3 (in W2 side primary amperes)
MW1 and MW2 are 3×3 matrices with numerical coefficients

θ is the actual phase angle shift across PST in degrees

Ratio is the actual transformation ratio among two sides of the PST

When zero-sequence current shall not be removed, Matrix M(θ) can be calculated as:

1  2  cos( ) 1  2  cos(  120) 1  2  cos(  120) 

1 
M ( )   1  2  cos(  120) 1  2  cos( ) 1  2  cos(  120) 
3  
1  2  cos(  120) 1  2  cos(  120) 1  2  cos( ) 
IECEQUATION18038 V1 EN-US (Equation 34)

When zero-sequence current shall be removed from the respective side, Matrix M0(θ) can be
calculated as:

cos( ) cos(  120) cos(  120) 

2 
M 0( )   cos(  120) cos( ) cos(  120) 
3  
cos(  120) cos(  120) cos( ) 
IECEQUATION18039 V1 EN-US (Equation 35)

In Equation 33, the first winding (W1) is always taken as reference side both for current magnitudes
(W2 sides are transferred to W1 sides by a ratio factor) and for phase angle (W2 currents are rotated
towards the W1 currents by an angle θ).

The fundamental frequency differential currents are, in general, composed of currents of all
sequences, that is, positive-, negative-, and zero-sequence currents. If the zero-sequence currents
are eliminated from individual phase currents on any side (see "Optional elimination of zero-
sequence currents") by choosing appropriate calculation for matrix M(θ), then the differential currents
may consist only of positive- and negative-sequence currents.

As the W2 matrix coefficients (see Equation 34 or Equation 35) are dependent on the actual phase-
angle shift, they shall be calculated on-line all the time.

The fundamental frequency differential currents are the usual differential currents and their
magnitudes are applied phase-wise to the operate-restrain characteristic of the differential protection.
The magnitudes of the differential currents can be read as service values from the function and they
are available as outputs IDL1MAG, IDL2MAG, and IDL3MAG from the PSTPDIF function block. Note
that the service values are given in percent. To do that, the values obtained from Equation 33 are
multiplied by the factor 100/IBaseW1. These service values given in percent can also be connected to
the disturbance recorder and automatically recorded during any external or internal fault condition.

In Equation 33, the first term on the right hand side of the equation represents the total contribution
from the individual phase currents from the W1 side to the fundamental frequency differential
currents. The second term on the right hand side of the equation represents the total contribution
from the individual phase currents from the W2 side to the fundamental frequency differential
currents, compensated for transformer phase shift and transferred to the power transformer W1 side.
These current contributions are important because they are used for calculating the common bias
current.

Transformer protection RET670 209

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

Bias current GUID-EE33FA7D-3CBF-4ADD-B2E7-7F21B370F977 v3

The bias current is calculated as the highest current amongst all individual winding current
contributions to the total fundamental frequency differential currents, as shown in Equation 33. All
individual winding current contributions are referred to the transformer W1 side.

There are totally six current contributions, which are the candidates for the common bias current. The
highest individual current contribution is considered as a common bias (restrain) current for all three
phases. This maximum principle makes the differential protection more secure, with less risk to
operate for external faults and brings more meaning to the breakpoint settings of the operate-restrain
characteristic and the cross-blocking logic.

If the zero-sequence currents are subtracted from the separate contributions to the total differential
current, then the zero-sequence component is automatically eliminated from the bias current. This
ensures that for secondary injection from one power transformer side the bias current is equal to the
highest differential current regardless of the fault type. During normal through-load operation of the
power transformer, the bias current is equal to the maximum load current from two transformer sides.

The magnitudes of the common bias (restrain) current expressed in HV side amperes can be read as
a service value from the function. At the same time, it is available as an output IBIAS from the
differential protection function block. Note that the service value is given in percent. To do that, the
maximum value obtained from Equation 33 is multiplied by the factor 100/IBaseW1. IBIAS can be
connected to the disturbance recorder and automatically recorded during any external or internal
fault condition.

On-line estimation of transformation ratio and phase angle shift GUID-3C31E02C-A899-49E2-A4AB-6D4002ED5B1B v2

A phase-shifting transformer (PST) is a regulating transformer with one or more OLTCs, which
regulates the phase-angle shift across the transformer. Actually, a PST creates a step-wise variable
phase-angle shift θ across its primary (source) and secondary (load) terminals. For a PST, one or
more OLTCs are used to obtain the variable phase-angle shift. In practice, multiple OLTCs with as
many as 70 combined steps can be used to obtain the PST variable phase-angle shift θ of up to
±75°. The PSTPDIF function in the IED has built-in feature to continuously monitor currents and
voltages from the two sides of the PST and dynamically compensate for changes in the
transformation ratio and the phase-angle shift across the PST.

PSTPDIF function continuously estimates the actual transformation ratio and phase-angle shift
across the PST by using positive-sequence currents and settable voltage phasors from two sides.

The complex current ratio is calculated by using the following equation:


e j180 IW 2
ComplexCurrentRatio  
IW 1
IECEQUATION18040 V1 EN-US

where IW1 and IW2 are positive sequence current phasors from two sides.

Due to used internal reference direction for currents, the W2 positive sequence
current phasor must be rotated for 180° before calculating the complex current ratio.

Now, the current based transformation ratio (I_Ratio), can be determined as a reciprocal value of the
magnitude of the complex current ratio and the phase-angle shift (I_Angle) as the phase angle of the
current complex ratio.

The complex voltage ratio is calculated using the following equation:


UW 2
ComplexVoltageRatio  
UW 1
IECEQUATION18041 V1 EN-US

where UW1 and UW2 are two selected voltage phasors (one from each side).

210 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

Note that the function automatically compensate for √3 factor, which may be required depending on
whether phase-to-earth or phase-to-phase voltages from the two sides are used. Also, the function
automatically compensate for inherent phase shift between the selected phasors if voltages from
different phases are selected (for example, UL1 from W1 and UL3 from W2). For simplicity, such
compensation factors are not shown in the above equation.

Now, the voltage based transformation ratio (U_Ratio), can be determined as the magnitude of the
complex voltage ratio and the phase-angle shift (U_Angle) as the phase angle of the complex voltage
ratio.

Once these four values are known, the following logic is used to determine the actual transformation
ratio and the phase-angle shift across the protected PST:

USEDFLT
Selection SELMEAS
STOPCOMP Logic #1

DiffRatioMax*(UBW2/UBW1)
Default_Ratio (UBW2/UBW1)

U_Ratio (|UW2|/UW1|)
DIFRATIO
Low Pass Filter Value Limiter
I_Ratio (|IW2|/IW1|)

Freeze_Old_Value

DiffRatioMin* (UBW2/UBW1)
q-1
BLOCK
ReverseAngle

T=8 ms
+1 DiffAngleMax+DefaultPhShift
T=500 ms
-1
DefaultPhShift

U_Angle Value DIFANGLE

X Limiter
Low Pass Filter
I_Angle

Freeze_Old_Value

DiffAngleMin+DefaultPhShift
U_Ratio URATIO
-1
q
U_Angle UANGLE

I_Ratio IRATIO

I_Angle IANGLE

IEC18000156-1-en.vsdx
IEC18000156 V1 EN-US

Figure 72: Simplified logic to determine the actual transformation ratio and phase-angle shift
Selection Logic #1 shown in Figure 72 works with the priorities, as described below:

• If any of the two positive-sequence current magnitudes is greater than 160%, the old ratio and
phase angle are selected (that is, values are frozen).
• If both of the two positive-sequence current magnitudes are in between 10% and 160%, the
values obtained from the current calculation is used.
• If any of the two positive-sequence current magnitudes is less than 10%, the values obtained
from the voltage measurement shall be used if the voltages have appropriate magnitudes.
• If any of the two voltage phasor magnitudes is greater than 120%, the old ratio and phase angle
are selected (that is, values are frozen).
• If both of the two voltage phasor magnitudes are in between 70% and 120%, the values
obtained from the voltage calculation shall be used. Note that the automatic compensation for
√3 difference between phase-to-phase and phase-to-earth voltages is performed within the
function.
• If any of the two voltage phasor magnitudes is less than 70%, the default values that are
determined by the parameter settings are used.

The function provides service values through the integer output SELMEAS regarding which selection
is active at the time. This output has the following possible integer values:

Transformer protection RET670 211

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

• 20=1 = default values are used

• 21=2 = values from the voltage measurement are used
• 22=4 = values from the current measurement are used
• 23=8 = old values are used (that is, values are frozen by the algorithm)
• 24=16 = old values are used (that is, values are frozen by an external binary input)

Additionally, certain level of bias and differential current magnitudes can also
temporarily force use of old values. In this case, the output SELMEAS will have a
value eight.

If the binary input USEDFLT into the function has a logical value TRUE, it will force use of default
values, that is, determined by the settings, for the transformation ratio and the phase-angle shift as
inputs into the low-pass filter. In this case, the output SELMEAS will have a value one. For example,
this input can be used if the PSTPDIF function is used to protect a standard two-winding power
transformer with fixed values for the transformation ratio and the phase-angle shift.

If the binary input STOPCOMP into the function has a logical value TRUE, it will unconditionally force
use of old values (values are frozen), for the transformation ratio and the phase-angle shift as inputs
into the low-pass filter. In this case, the output SELMEAS will have a value sixteen. The input
STOPCOMP shall be used to test, for example, the operating characteristic of the PSTPDIF function
for a specific transformation ratio and phase-angle shift. This will prevent the function to compensate
ratio and angle by using injected currents during testing, which typically do not have any real
correlation to the protected transformer transformation ratio and phase-angle shift.

The calculated values from two positive-sequence current phasors are also available as service
values via outputs IRATIO and IANGLE. Angle value is given in degrees. When these two values
cannot be calculated, the output IRATIO has value ‘0’ and IANGLE has value ‘1000’.

Similarly, the calculated values using two voltage phasors are also available as service values via
outputs URATIO and UANGLE. Angle value is given in degrees. When these two values cannot be
calculated, the output URATIO has value ‘0’ and UANGLE has value ‘1000’.

When W2 phasor is leading W1 phasor, the angle will have positive sign and consequently, when W2
phasor is lagging the W1 phasor, the angle will have negative sign. These rules are applicable for
either current or voltage phasors and corresponds to the IEC/IEEE standard definition for phase
shifting transformers. Thus, the I_Angle when PST is loaded and U_Angle when PST is not loaded
will be positive for advanced mode of operation and negative for retard mode of operation. Therefore,
they typically shall have the same value and sign as stated on the PST rating plate for individual
OLTC positions. However, these conventions are valid only if positive-sequence voltages and
currents, that is, with phase rotation L1-L2-L3, are connected to the protected power transformer.

Once values for the transformation ratio and the phase angle are selected, they are further filtered
using a low-pass filter. Typically, this filter is quite slow and has a time constant of 500 ms.
Theoretically, approximately five times constants must elapse before the filter output values have
new and correct values after the step change of the filter input. On the other side, one OLTC
operation can take up to five seconds. Such filter time delay does not cause any practical issue for
the PSTPDIF function and ensures its proper operation under external and internal fault conditions.

However, when the function is blocked, either externally via dedicated binary input BLOCK or
internally from the IED, the time constant is reduced to 8 ms. By doing this, the function is practically
forced to learn the actual transformation ratio and phase-angle shift values faster. The time constant
reduction feature ensures that the function behaves correctly during the following circumstances:

• When the protection IED power supply is interrupted while the protected transformer is in
service (internal blocking will be active for a while)
• Any setting parameter within the IED is changed while the protected transformer is in service
(internal blocking will be active for a while)
• IED shall be tested on a real time digital simulator
• IED shall be tested by playing-back captured recording files from an existing PST installation

212 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

For the third and fourth cases, the IED configuration shall be arranged such that the PSTPDIF
function binary input BLOCK shall be pulsed for 50 ms at the beginning of the injection (that is, during
the pre-fault stage) to learn the actual transformation ratio and phase-angle shift before either
internal or external fault conditions are injected into the IED. The only pre-request is that the pre-fault
currents and voltages last longer than the blocking time (for example, longer than 50 ms).

Consider the following notes also:

• The filtered value for the transformation ratio is limited within the range defined by settings
DiffRatioMin and DiffRatioMax. This value is then given as a service value from the function
through the output DIFRATIO.
• The filtered value for an angle is multiplied by -1 (that is, sign of the angle is changed) when
setting ReverseAngle is set to Off. This default value shall be used when the direct sequence of
currents and voltages (that is, phase rotation L1-L2-L3), are connected to the protected
transformer. However, if the power system has inverse rotation (that is, phase rotation L3-L2-
L1), then ReverseAngle shall be set to On. In this case, the filtered value for the angle will not be
changed. This is required to get the correct direction for compensation in Equation 33 for the
phase-angle shift across PST depending on the actual phase rotation in the connected power
system. This angle value is also given as a service value from the function via the output
DIFANGLE in degrees.

The following values are considered from the algorithm of the PSTPDIF function:

• DIFRATIO is used as Ratio in the Equation 33, that is, Ratio = DIFRATIO.
• DIFANGLE is used as the angle θ in the equation 1 (that is, θ = DIFANGLE).

All service value outputs that are available from the function can be connected to the disturbance
recorder and automatically recorded during any external or internal fault condition. The SELMEAS
integer value shall be converted into separate binary signals using the integer to binary converter
function block and then connected as an individual binary signals into the disturbance recorder.

Differential current alarm GUID-7FB221D7-AFA9-4A64-A4A1-705EF58540A0 v2

Fundamental frequency differential current magnitudes are monitored all the time within the function.
As soon as all three fundamental frequency differential currents are above the set threshold defined
by the setting IDiffAlarm , a delay on pickup timer starts. When the pre-set time defined by the setting
tAlarmDelay has expired, the differential current alarm is generated and output signal IDALARM is
set to ‘1’. This feature can be effectively used to provide alarm if the differential current is too high for
any reason. During normal through-load condition that would mean the compensation logic did not
properly estimate the transformation ratio, the phase-angle shift, or both across the protected
transformer.

Optional elimination of zero-sequence currents GUID-B3BE1922-2124-4E53-BB5A-3605769C2221 v2

To avoid unwanted trips for external earth faults, the zero-sequence currents should be subtracted if
the zero-sequence currents are not properly transferred across the PST.

The zero-sequence currents can be explicitly eliminated from the differential currents and common
bias current calculation by dedicated parameter settings that are available for each sides separately.

The following are typical recommendations for these setting parameters:

• If a protected PST incorporates a closed, tertiary, delta winding, then enable subtraction of the
zero-sequence current on both sides.
• If a protected PST is of an asymmetrical design, then enable subtraction of the zero-sequence
current on both sides.
• If a protected PST is of a symmetrical design, then possibly the zero-sequence current
subtraction can be disabled on both sides.

By default, the subtraction of the zero-sequence current on both sides is enabled.

Removing the zero-sequence current from the differential currents reduces the sensitivity of the
differential protection to some extent for internal earth faults. To counteract this effect to some extent,

Transformer protection RET670 213

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

the zero-sequence current is subtracted from the three fundamental frequency differential currents
and the bias current.

Restrained and unrestrained limits of the differential protection GUID-100F702D-F684-406D-B268-A6B0DC1D12DA v3

The PSTPDIF function uses two limits, to which actual magnitudes of the three fundamental
frequency differential currents are compared at each execution of the function.

The unrestrained (that is, non-stabilized or instantaneous) part of the differential protection is used
for very high differential currents, where it should be beyond any doubt, that the fault is internal. This
settable limit is constant and not proportional to the bias current. Harmonic or any other restrain is
not applied to this limit, which is therefore allowed to trip the transformer instantaneously.

The restrained (stabilized) part of the differential protection compares the calculated fundamental
differential (operating) currents and the bias (restrain) current by applying them to the operate-
restrain characteristic. Practically, the magnitudes of the individual fundamental frequency differential
currents are compared with an adaptive limit. This limit is adaptive because it is dependent on the
bias (restrain) current magnitude. This limit is called the operate-restrain characteristic. It is
represented by a double-slope, double-breakpoint characteristic, as shown in Figure 73.

The restrained characteristic shown in Figure 73, is determined by the following five settings:

• IdMin (Sensitivity in section 1, as a multiple of transformer W1 side rated current set under the
parameter IBase in the GBASVAL group selected by parameter GlobalBaseSelW1)
• EndSection1 (End of section 1, as a multiple of transformer W1 side rated current set under the
parameter IBase in the GBASVAL group selected by parameter GlobalBaseSelW1)
• EndSection2 (End of section 2, as a multiple of transformer W1 side rated current set under the
parameter IBase in the GBASVAL group selected by parameter GlobalBaseSelW1)
• SlopeSection2 (Slope in section 2, operate current divided by restrain current in percent)
• SlopeSection3 (Slope in section 3, operate current divided by restrain current in percent)

1200
PROTECTION SETTINGS (Default): RATED CURRENT (A):
Idiff (operate
IdMin 0.20 200.00 W1 IBaseW1 1000.00
current) in %
EndSection1 1.25 1250.00
EndSection2 3.00 3000.00 Operate
SlopeSection2
SlopeSection3
40.0%
80.0%
40%
80% unconditionally
IdUnre 10.00 10000.00
1000

IdUnre Unrestrained limit

Operate
800
conditionally

600

No operation
400

Restrained limit

Section 1 Section 2 Section 3

200
SlopeSection3

IdMin
EndSection2
SlopeSection2
EndSection1
0
0 200 400 600 800 1000 1200

Ibias (restrain current) in %

IEC18000162-1-en.vsdx

IEC18000162 V1 EN-US

Figure 73: Description of the restrained and the unrestrained operate characteristics
Where,

DI operate
slope   100 0 0
DI restrain
IECEQUATION18042 V1 EN-US

214 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

The operate-restrain characteristic can be customized by the user. It is recommended to use the
default characteristic because it provides better results in most of the applications. The operate-
restrain characteristic has mainly three sections with a section-wise proportionality of the operate
value to the bias (restrain) current. The reset ratio in all parts of the characteristic is equal to 0.95.

Section 1: This section is the most sensitive part on the characteristic. Normal currents flow through
the protected circuit and its current transformers, and the risk for higher false differential currents is
relatively low. The slope in section 1 is always zero percent.

Section 2: In this section, a certain minor slope is introduced, which should cope with false differential
currents proportional to higher than normal currents through the current transformers.

Section 3: In this section, more pronounced slope is designed to result in a higher tolerance to the
substantial current transformer saturation at high through-fault currents, which may be expected.

The operate-restrain characteristic should be designed such that:

• For internal faults, the operate (differential) currents are always with a good margin above the
operate-restrain characteristic.
• For external faults, the false operate currents are with a good margin below the operate-restrain
characteristic.

The differential protection can be temporarily desensitized by applying the adaptive DC biasing
method. When an external fault is detected, the adaptive DC biasing method will temporarily shift the
operate-restrain characteristic by adding DC components to the operate level IdMin. The DC
component is extracted online from the instantaneous differential currents and the highest DC in all
three phases is selected to be added to IdMin. This feature improves the security of the function for
external faults followed by CT saturation. The adaptive DC biasing will be reset if either of the
following conditions is fulfilled:

• The external fault signal disappears and DC components do not exist in the phase currents.
• The fundamental frequency differential currents become greater than the bias current.

The adaptive DC biasing feature is disabled when NegSeqDiffEn is set to Off.

Fundamental frequency negative-sequence differential currents GUID-FEEDF025-EEC2-4DC0-9A47-F56A6404398D v3

Existence of relatively high negative-sequence currents means that there is a disturbance on the
power system, possibly a fault in the protected power transformer. The negative-sequence currents
are one measurable indication of an abnormal condition, similar to the zero-sequence current. One of
the advantages of the negative-sequence current compared to the zero-sequence current is that they
provide coverage for the phase-to-phase and transformer winding turn-to-turn faults. Theoretically,
the negative-sequence currents do not exist during symmetrical three-phase faults, however, they
appear temporarily during an initial stage of such faults for a long enough time, in most cases, for the
IED to make a proper decision. The negative-sequence currents are properly transformed to the
other side of a transformer for any external disturbance. Also, the negative-sequence currents are
not affected by the symmetrical through-load currents.

As the negative-sequence currents form the symmetrical three-phase current system on each
transformer side (that is, negative-sequence currents in each phase will have the same magnitude
and phase angle displaced with 120 degrees from each other), it is only necessary to calculate one
negative-sequence differential current for the first phase.

The negative-sequence based differential current is calculated by using the fact that it is rotated by
the same angle, but in the opposite direction as the positive sequence currents. The negative-
sequence fault currents must first be referred to the same phase reference side and put to the same
magnitude reference. This can be calculated by using the following complex (that is, phasor)
equation:

IDNS  INS _ W 1  Ratio  e  j  INS _ W 2

IECEQUATION18043 V1 EN-US (Equation 36)

Transformer protection RET670 215

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

where,

IDNS is the negative-sequence differential current phasor (in W1 side primary amperes)
INS_W1 is the W1 negative-sequence current phasor for phase L1 (in W1 side primary amperes)
INS_W2 is the W2 negative-sequence current phasor for phase L1 (in W2 side primary amperes)
ɵ is the actual phase angle shift across PST in degrees
Ratio is the actual transformation ratio among two sides of the PST

The magnitudes of the negative-sequence differential current can be read as service values from the
function. It is also available as the output IDNSMAG from the differential protection function block
and its value is given in percent. To get that, the value obtained from Equation 36 is multiplied by a
factor 100/IBaseW1. Thus, it can be connected to the disturbance recorder and automatically
recorded during any external or internal fault condition.

Internal/external fault discriminator GUID-C05241F3-A926-457A-A476-1895FCBDD78B v3

The internal/external fault discriminator is a very powerful and reliable supplementary criterion to the
traditional differential protection. It is recommended to use this feature always (that is, set
NegSeqDiffEn to On.) when protecting a PST. The internal/external fault discriminator detects even
minor faults also with a high sensitivity and at high speed and discriminates with a high degree of
dependability between internal and external faults.

The internal/external fault discriminator responds to the magnitudes and the relative phase angles of
the two negative-sequence differential current contributions, see Equation 36.

Operation of the internal/external fault discriminator is based on the relative position of the two
phasors representing winding one (W1) and winding two (W2) negative-sequence current
contributions, respectively. It performs a directional comparison between these two phasors. The
overall directional characteristic of the internal/external fault discriminator is shown in Figure 74,
where the directional characteristic is defined by two setting parameters: IMinNegSeq and
NegSeqROA.

90 deg
120 deg
If one or the Internal/external
other of fault boundary
currents is too
low, then no
measurement
NegSeqROA
is done, and
(Relay
120 degrees
Operate
is mapped
Angle)

180 deg 0 deg

IMinNegSeq

External Internal
fault fault
region region

270 deg en05000188-3-en.vsd

IEC05000188 V3 EN-US

Figure 74: Operating characteristic of the internal/external fault discriminator

216 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

To perform directional comparison of the two phasors, their magnitudes must be high enough to
ensure that they are due to a fault. On the other hand, to ensure a good sensitivity of the internal/
external fault discriminator, the value of the minimum limit must not be too high. Therefore, the limit
value IminNegSeq is settable in the range of 0.04 to 0.80 times the IBase for winding one. The
default value is 0.08. Note that, to enhance stability at higher fault currents, the set threshold value
IminNegSeq is dynamically increased at currents greater than rated current. If the bias current is
greater than 110% of IBase, then the negative-sequence threshold IminNegSeq is increased
internally. If the magnitudes of both negative-sequence current contributions are more than the actual
limit, then the relative position between these two phasors is checked. If either of the negative-
sequence current contributions, which should be compared, is too small (that is, less than the set
value for IminNegSeq), then the directional comparison is not made to avoid the possibility in taking a
wrong decision. This magnitude check ensures the stability of the algorithm when the transformer is
energized. The setting NegSeqROA represents the relay operate angle, which determines the
boundary between the internal and external fault regions. It can be selected in a range from ±30
degrees to ±120 degrees, with an incremental value of 0.1 degree. The default value is ±60 degrees.
The default setting ±60 degree supports the security in comparison with dependability.

If the above condition concerning magnitudes is fulfilled, then the internal/external fault discriminator
compares the relative phase angle between the negative-sequence current contributions from W1
and W2 sides of the transformer by using the following two rules:

• If the negative-sequence current contributions from W1 and W2 sides are approximately in-
phase, the fault is internal, that is, both phasors are within the internal fault region.
• If the negative-sequence current contributions from W1 and W2 sides are 180 degrees out of
phase, the fault is external, that is, one phasor is within the external fault region.

For example, for any unsymmetrical external fault, ideally, the respective negative-sequence current
contributions from the W1 and W2 transformer sides will be exactly 180 degrees apart and equal in
magnitude regardless the transformer turns ratio and phase displacement.

Note that additional security measures are implemented in the internal/external fault discriminator
algorithm to ensure proper operation with heavily saturated current transformers. The reliable
information on whether a fault is internal or external is typically obtained within 10 ms after the fault
inception, depending on the setting IminNegSeq and the magnitudes of the fault currents. During
heavy faults, approximately 5 ms time to full saturation of the main CT is sufficient to produce a
correct discrimination between internal and external faults.

Unrestrained and sensitive negative-sequence protections GUID-75DE7739-0412-4A39-B9B9-FC116BDA4647 v3

Two sub-functions, which are based on the internal/external fault discriminator with an ability to trip a
faulty transformer, are parts of the traditional transformer differential protection.

Unrestrained negative sequence differential protection GUID-61D88260-51C5-412C-8ECD-49F20D9451B0 v1

The unrestrained negative-sequence protection is activated if one or more start signals are set by the
traditional differential protection algorithm. This happens because one or more of the fundamental
frequency differential currents entered the operate region on the operate-restrain characteristic. So,
this protection is not independent of the traditional restrained differential protection. It is activated
after the first start signal has been placed.

If the same fault has been positively recognized as internal, then the unrestrained negative-sequence
differential protection places its own trip request.

Any block signals by the harmonic, waveform, or both criteria, which can block the traditional
differential protection, are overridden, and the differential protection operates instantly without any
further delay.

This logic ensures fast disconnection of a faulty transformer for any internal fault.

If the same fault is classified as external, then generally but not unconditionally, a trip command is
prevented. If a fault is classified as external, further analysis of the fault conditions is initiated. If all
the instantaneous differential currents in phases, where the start signals are issued, are free of
harmonic pollution, then a minor internal fault simultaneous with a predominant external fault can be

Transformer protection RET670 217

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

suspected. This conclusion can be made because at external faults, major false differential currents
can only exist when one or more current transformers saturate. In this case, the false instantaneous
differential currents are polluted by higher harmonic components, the 2nd, the 5th, and so on.

Sensitive negative-sequence based turn-to-turn fault protection GUID-053AB778-7776-4AA0-85B7-951CE537DCAC v1

The sensitive negative-sequence current based turn-to-turn fault protection detects the low-level
faults, which are not detected by the traditional differential protection until they develop into more
severe internal earth faults, typically including transformer iron core. The sensitive protection is
independent of the traditional differential protection and is a very good complement to it. The
essential part of this sensitive protection is the internal/external fault discriminator. In order to
operate, the sensitive protection requires that no start signal from the traditional transformer biased
differential protection has been issued. If magnitudes of HV and LV negative-sequence current
contributions are above the set limit for IminNegSeq, then their relative positions are determined. If
the disturbance is characterized as an internal fault, the bias current is relatively low and the
differential currents do not have high content of the second harmonic, then a separate timer with a
set delay as defined by the setting tTripNSSens will start. Note that this timer has default setting
value of 100 ms. When this time expires, this feature issues a trip signal from the PSTPDIF function.

Instantaneous differential currents GUID-AB47F3C6-61FD-4B83-B23B-3A8F49B0F0B4 v2

The instantaneous differential currents are calculated from the instantaneous values of the input
currents to perform the harmonic analysis and waveform analysis. See "Harmonic and waveform
block criteria" for more information.

The instantaneous differential currents are calculated using the same matrix expression as shown in
Equation 33. The same matrices are used for these calculations. The only difference is that the
matrix algorithm is fed by instantaneous values of currents, that is, raw samples instead of phasors.

Harmonic and waveform block criteria GUID-F218EFF2-5857-42C7-8E56-02091211AB1B v2

The two block criteria are the harmonic restrain and the waveform restrain. These two criteria can
block a trip command from the traditional differential protection.

Harmonic restrain GUID-4979CB69-4675-4A47-8793-2D7F7E7B76AD v1

The harmonic restrain is the classical restrain method traditionally used by the transformer differential
function. The goal is to prevent an unwanted trip command due to magnetizing inrush currents at
switching operations or due to magnetizing currents at over voltages.

The magnetizing currents of a transformer flow only on one side of the transformer and are,
therefore, always the cause of false differential currents. The harmonic analysis (the 2nd and the 5th
harmonic) is applied to the instantaneous differential currents. The harmonic analysis is applied only
in the phases where start signals have been set. For example, if the content of the 2nd harmonic in
the instantaneous differential current of phase L1 is above the setting I2/I1Ratio, then a block signal
is set for that phase, which can be read as BLK2HL1 output from the differential protection.

After the transformer has been energized (the energizing period has elapsed and the inrush currents
have disappeared), the second harmonic blocking is conditionally activated if NegSeqDiffEn is set to
On. When a fault cannot be identified as an internal or an external, the second harmonic blocking
signal is activated only if the differential current is smaller than the bias current. If the differential
current becomes equal to or greater than the bias current, the differential function will be released
regardless of the second harmonic blocking signal.

Waveform restrain GUID-04EDA760-0E9F-4C46-A12B-938C3AE1493A v1

The waveform restrain criterion is a good complement to the harmonic analysis. The waveform
restrain is a pattern recognition algorithm, which looks for intervals within each fundamental power
system cycle with low instantaneous differential current. This interval is often called current gap in
protection literature. However, within the differential function, this criterion actually searches for long-
lasting intervals with low rate-of-change in instantaneous differential current, which are typical for the
transformer inrush currents. Block signals BLKWAVLx are set in those phases where such behavior
is detected. The algorithm does not require any end user settings. The waveform algorithm is
automatically adapted depending on the transformer rated data.

218 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

Cross-blocking between phases GUID-09B567C6-79D2-4FFD-803F-947DFC2F647C v2

The basic definition of the cross-blocking is that one of the three phases can block operation (that is,
tripping) of the other two phases due to the harmonic pollution of a differential current in that phase
(that is, waveform, second or fifth harmonic content). In differential algorithm, the user can control the
cross-blocking between the phases by setting parameter CrossBlockEn to On.

When CrossBlockEn is set to On, cross-blocking between phases is introduced. There is no time
settings involved, but the phase with an operating point above the set bias characteristic (in the
operate region) will be able to cross-block the other two phases if it is blocked by the harmonic or
waveform restrained criteria. As soon as the operating point for this phase is below the set bias
characteristic (that is, in the restrain region), cross-blocking from that phase will be inhibited. In this
way, the cross-blocking of temporary nature is achieved. It should be noted that this is the default
setting value for this parameter.

When the parameter CrossBlockEn is set to Off, any cross-blocking between phases will be disabled.
It is recommended to use the value Off with a caution to avoid the unwanted tripping during initial
energizing of the transformer.

7.5.7.2 Logic diagram

Logic diagram GUID-CA770016-2AF9-47C8-BDC5-1AA143C9B9E5 v1
The simplified internal logics for PSTPDIF function are shown in the following figures.

ADM Differential function

Settings ZSCurrSubtrW1 and

ZSCurrSubtrW2 for Zero-sequence
Current Reduction

idL1
VT
Phasor calculation of individual phase currents and

Instantaneous (sample based) IDL1

A/D conversion scaling with CT and VT ratio

Differential current, phase L1

idL2

Instantaneous (sample based) IDL2

CT Differential current, phase L2
idL3

Instantaneous (sample based) IDL3

Current and voltage phasors from the two sides used to calculate transformation ratio
voltages

Differential current, phase L3

Derive equation to calculate differential currents
Phasors and samples

Protected Negative-sequence differential current

IDNSMAG
and phase angle shift of the protected transformer

Transformer and NS current contribution from

individual windings
idL1Mag

IDL1MAG
Fundamental frequency (phasor based)
Diff current, phase L1 and phase current idL2Mag
contributions from individual windings

IDL2MAG
Phasor calculation of individual phase currents and

CT Fundamental frequency (phasor based)

Diff current, phase L2 and phase current idL3Mag
A/D conversion scaling with CT and VT ratio

contributions from individual windings

VT
IDL3MAG
Fundamental frequency (phasor based) iBias
Diff current, phase L3 and phase current
MAX IBIAS
contributions from individual windings
voltages

Phasors and samples

DIFRATIO

DIFANGLE

IRATIO

IANGLE

URATIO

UANGLE

IEC18000157-1-en.vsdx

IEC18000157 V1 EN-US

Figure 75: Treatment of measured currents within IED for PSTPDIF function
Figure 75 shows how an internal treatment of measured currents is done in case of a two-winding
transformer.

Transformer protection RET670 219

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

The following currents are inputs used in the PSTPDIF function. They must all be expressed in power
system (primary) A.

1. Instantaneous values of currents (samples) from W1 and W2 sides for two-winding transformers
2. Currents from all transformer sides expressed as fundamental frequency phasors with their real
and imaginary parts. These currents are calculated within the protection function by the
fundamental frequency Fourier filters.
3. Negative sequence currents from all transformer sides expressed as phasors. These currents
are calculated within the protection function by the symmetrical components module.

The PSTPDIF function:

1. Calculates the three fundamental frequency differential currents and one common bias current.
The zero-sequence component can optionally be eliminated from each of the three fundamental
frequency differential currents and also from the common bias current.
2. Calculates the three instantaneous differential currents. They are used for harmonic and
waveform analysis. Instantaneous differential currents are useful for post-fault analysis using
disturbance recording.
3. Calculates the negative-sequence differential current. Contributions to it from both transformer
sides are used by the internal/external fault discriminator to detect and classify a fault as internal
or external.

BLKUNRES

IdUnre a tripUnreL1
b>a AND
b

idL1Mag
block

STL1
AND
BLOCK stL1

BLKRES

tripResL1
AND
OR

blk2HL1
BLK2HL1
2n d Harmonic
blkWavL1

Wave block BLKWAVL1

blk5HL1

5th Harmonic BLK5HL1

Cross block
Cross block to L2 or L3
from L2 or L3 AND
OR
AND
CrossBlock

IEC18000158-1-en.vsdx
IEC18000158 V1 EN-US

Figure 76: PSTPDIF function simplified logic diagram for Phase L1

220 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

IMinNegSeq
EXTFAULT
NegSeqROA
Internal/ External
fault discriminator INTFAULT
Neg. Seq. Diff
Current
Contributions
tTripNSSenS
t TRNSSENS
AND AND
NegSegDiffEn
trNsSens
iBias a block
Constant a<b
b

TRNSUNR
stL1 AND
AND
stL2 OR trNsUnr
stL3

IEC18000152-1-en.vsdx
IEC18000152 V1 EN-US

Figure 77: PSTPDIF function simplified logic diagram for internal/external fault discriminator

tripResL1
tripResL2 TRIPRES
OR
tripResL3

tripUnreL1
tripUnreL2 TRIPUNRE
OR
tripUnreL3

TRIP
trNsSens OR
trNsUnr

IEC18000151-1-en.vsdx
IEC18000151 V1 EN-US

Figure 78: PSTPDIF function internal grouping of tripping signals

stL1
stL2 START
OR
stL3

blk2HL1
blk2HL2 OR BLK2H
blk2HL3

blk5HL1
blk5HL2 BLK5H
OR
blk5HL3

blkWavL1
blkWavL2 OR BLKWAV
blkWavL3

IEC18000070-1-en.vsdx
IEC18000070 V1 EN-US

Figure 79: PSTPDIF function internal grouping of logical signals

Simplified logic diagrams in Figure 76, Figure 77, Figure 78, and Figure 79 can be summarized as
follows:

1. The three fundamental frequency differential currents are applied phase-wise to two limits. The
first limit is the operate-restrain characteristic while the other is the high-set unrestrained limit. If

Transformer protection RET670 221

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 7 1MRK 504 164-UEN Rev. N
Differential protection

the first limit is exceeded, a start signal START is set. If the unrestrained limit is exceeded, an
immediate unrestrained trip TRIPUNRE and a common trip TRIP are issued.
2. If a start signal is issued in a phase, the harmonic and the waveform block signals are checked.
Only a start signal, which is free from all of its block signals, can result in a trip command. If the
cross-block logic scheme is applied, then only if all phases with the set start signal are free of
their respective block signals, a restrained trip TRIPRES and a common trip TRIP are issued.
3. If a start signal is issued in a phase and the fault has been classified as internal, then any
eventual block signals are overridden and an unrestrained negative-sequence trip TRNSUNR
and a common trip TRIP are issued without any further delay. This feature is called the
unrestrained negative-sequence protection 110% bias.
4. The sensitive negative-sequence differential protection is independent of any start signals. It is
meant to detect smaller internal faults such as, turn-to-turn faults, that are often not detected by
the traditional differential protection. The sensitive negative-sequence differential protection
starts whenever both contributions to the total negative-sequence differential current (that must
be compared by the internal/external fault discriminator) are higher than the value of the setting
IMinNegSeq. If a fault is positively recognized as internal and the condition is stable with no
interruption for at least one fundamental frequency cycle, then the sensitive negative-sequence
differential protection TRNSSENS and a common trip TRIP are issued. This feature is called the
sensitive negative-sequence differential protection.
5. If a start signal is issued in a phase (see signal STL1) though the fault has been classified as an
external fault, the instantaneous differential current of that phase (see signal IDL1) is analyzed
for the second and the fifth harmonic contents. If there is a less harmonic pollution than allowed
by the settings I2/I1Ratio and I5/I1Ratio, then it is assumed that a minor simultaneous internal
fault has occurred and the outputs from the blocks 2nd harmonic and 5th harmonic are 0. Only
under these conditions, a trip command is allowed (see signal TRIPRES=1). The cross-block
logic scheme is automatically applied under such circumstances. This means that the cross
block signals from the other two phases L2 and L3 are not activated to obtain a trip on the
TRIPRES output signal in Figure 76.
6. All start and block conditions are available as phase-wise and common (that is, three-phase)
signals.

idL1Mag
a
a>b
IDiffAlarm b

idL2Mag tAlarmDelay
a IDALARM
a>b AND t
b

idL3Mag
a
a>b
b

IEC18000069-1-en.vsdx
IEC18000069 V1 EN-US

Figure 80: Differential current alarm logic

222 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 7
Differential protection

7.5.8 Technical data

7.5.8.1 Technical data GUID-53E95B58-DE9E-4585-92FC-A03C87527E96 v2

Table 122: PSTPDIF technical data

Function Range or value Accuracy

Operating characteristic Adaptable ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir
Reset ratio > 90% -
Unrestrained differential current limit (400-6000)% of IBase ±1.0% of set value
IdUnre
Minimum pickup, IdMin (10-60)% of IBase ±1.0% of I r
Differential current alarm, IDiffAlarm (2-50)% of IBase ±1.0% of I r
Time delay for differential current (0.000-60.000) s ±0.2% or ±25 ms whichever is
alarm, tAlarmDelay greater
Second harmonic blocking, I2/I1Ratio (5.0-60.0)% of fundamental ±1.0% of Ir
differential current Note: fundamental magnitude =
100% of Ir

Fifth harmonic blocking, I5/I1Ratio (5.0-60.0)% of fundamental ±5.0% of Ir

differential current Note: fundamental magnitude =
100% of Ir

Negative-sequence current limit, (4-80)% of IBase ±1.0% of Ir at I ≤ Ir

IMinNegSeq ±1.0% of I at I > Ir
Time delay for negative-sequence (0.040-60.000) s ±0.2% or ±25 ms whichever is
sensitive trip, tTripNSSens greater
Operate angle for negative-sequence (30.0-120.0) degrees ±2.0 degrees
fault discriminator, NegSeqROA
*Operate time at 0 to 2 x IdMin, Min. = 25 ms -
restrained function Max. = 35 ms
*Reset time at 2 x IdMin to 0, Min. = 5 ms -
restrained function Max. = 15 ms
*Operate time at 0 to 2 x IdUnre, Min. = 10 ms -
unrestrained function Max. = 20 ms
*Reset time at 2 x IdUnre to 0, Min. = 25 ms -
unrestrained function Max. = 35 ms
**Operate time, unrestrained negative Min. = 10 ms -
sequence function Max. = 25 ms
**Reset time, unrestrained negative Min. = 10 ms -
sequence function Max. = 30 ms
*Note: Data obtained with single input current group.
**Note: Data obtained with two input current groups. The rated symmetrical currents are applied on both sides as
pre- and post-fault currents. The fault is performed by increasing one phase current to double on one side and
decreasing same phase current to zero on the other side.

Transformer protection RET670 223

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
224
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Section 8 Impedance protection

8.1 Distance measuring zones, quadrilateral characteristic
ZMQPDIS, ZMQAPDIS, ZDRDIR IP14498-1 v4

8.1.1 Identification M14852-1 v6

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Distance protection zone, quadrilateral ZMQPDIS 21
characteristic (zone 1)
Z
S00346 V2 EN-US

Distance protection zone, quadrilateral ZMQAPDIS 21

characteristic (zone 2-5)
Z
S00346 V2 EN-US

Directional impedance quadrilateral ZDRDIR 21D

Z<->

IEC09000167 V1 EN-US

8.1.2 Functionality M13787-3 v15

The line distance protection is an up to five (depending on product variant) zone full scheme
protection function with three fault loops for phase-to-phase faults and three fault loops for phase-to-
earth faults for each of the independent zones. Individual settings for each zone in resistive and
reactive reach gives flexibility for use as back-up protection for transformer connected to overhead
lines and cables of different types and lengths.

Distance measuring zone, quadrilateral characteristic (ZMQPDIS) together with Phase selection with
load encroachment (FDPSPDIS) has functionality for load encroachment, which increases the
possibility to detect high resistive faults on heavily loaded lines, as shown in figure 81.

Transformer protection RET670 225

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Forward
operation

Reverse
operation

en05000034.vsd
IEC05000034 V1 EN-US

Figure 81: Typical quadrilateral distance protection zone with Phase selection with load
encroachment function FDPSPDIS activated
The independent measurement of impedance for each fault loop together with a sensitive and
reliable built-in phase selection makes the function suitable in applications with single-phase
autoreclosing.

Built-in adaptive load compensation algorithm prevents overreaching of zone 1 at load exporting end
at phase-to-earth faults on heavily loaded power lines.

The distance protection zones can operate independently of each other in directional (forward or
reverse) or non-directional mode. This makes them suitable, together with different communication
schemes, for the protection of power lines and cables in complex network configurations, such as
parallel lines, multi-terminal lines.

8.1.3 Function block IP12800-1 v2

SEMOD115983-4 v8

ZMQPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND

IEC06000256-2-en.vsd
IEC06000256 V2 EN-US

Figure 82: ZMQPDIS function block

ZMQAPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND

IEC09000884-1-en.vsd
IEC09000884 V1 EN-US

Figure 83: ZMQAPDIS function block (zone 2 - 5)

226 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

The two inputs I3P — Three phase group signal for current and U3P — Three phase
group signal for voltage, must be connected to non-adaptive SMAI blocks if ANY OF
THE ZONES are set for directional operation. That is, the parameter DFTReference
in used SMAI must be set to InternalDFTRef. If adaptive SMAI block is used this
might result in a wrong directional and reach evaluation.
SEMOD54537-4 v5

ZDRDIR
I3P* STDIRCND
U3P*
IEC10000007-2-en.vsd

IEC10000007 V2 EN-US

Figure 84: ZDRDIR function block

8.1.4 Signals
PID-3651-INPUTSIGNALS v6

Table 123: ZMQPDIS Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
VTSZ BOOLEAN 0 Blocks all output by fuse failure signal
BLKTR BOOLEAN 0 Blocks all trip outputs
STCND INTEGER 0 External start condition (loop enabler)
DIRCND INTEGER 0 External directional condition

PID-3651-OUTPUTSIGNALS v6

Table 124: ZMQPDIS Output signals

Name Type Description

TRIP BOOLEAN General Trip, issued from any phase or loop
TRL1 BOOLEAN Trip signal from phase L1
TRL2 BOOLEAN Trip signal from phase L2
TRL3 BOOLEAN Trip signal from phase L3
START BOOLEAN General Start, issued from any phase or loop
STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3
STND BOOLEAN Non-directional start, issued from any phase or loop

Transformer protection RET670 227

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

PID-3650-INPUTSIGNALS v6

Table 125: ZMQAPDIS Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
VTSZ BOOLEAN 0 Blocks all output by fuse failure signal
BLKTR BOOLEAN 0 Blocks all trip outputs
STCND INTEGER 0 External start condition (loop enabler)
DIRCND INTEGER 0 External directional condition

PID-3650-OUTPUTSIGNALS v6

Table 126: ZMQAPDIS Output signals

Name Type Description

TRIP BOOLEAN General Trip, issued from any phase or loop
TRL1 BOOLEAN Trip signal from phase L1
TRL2 BOOLEAN Trip signal from phase L2
TRL3 BOOLEAN Trip signal from phase L3
START BOOLEAN General Start, issued from any phase or loop
STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3
STND BOOLEAN Non-directional start, issued from any phase or loop

PID-3545-INPUTSIGNALS v6

Table 127: ZDRDIR Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL

PID-3545-OUTPUTSIGNALS v5

Table 128: ZDRDIR Output signals

Name Type Description

STDIRCND INTEGER Binary coded directional information per measuring loop

8.1.5 Settings
GUID-62142086-79A9-46FF-A14F-BA0CDD6B6466 v1

Signals and settings for ZMQPDIS are valid for zone 1 while signals and settings for
ZMQAPDIS are valid for zone 2 - 5

228 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

PID-3651-SETTINGS v6

Table 129: ZMQPDIS Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OperationDir Non-directional - - Forward Operation mode of directionality NonDir /
Forward Forw / Rev
Reverse
X1 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach
R1 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for zone
characteristic angle
X0 0.10 - 9000.00 Ohm/p 0.01 100.00 Zero sequence reactance reach
R0 0.01 - 3000.00 Ohm/p 0.01 15.00 Zero seq. resistance for zone
characteristic angle
RFPP 0.10 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach in ohm/loop, Ph-
Ph
RFPE 0.10 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach in ohm/loop, Ph-E
OperationPP Off - - On Operation mode Off / On of Phase-
On Phase loops
OpModetPP Off - - On Operation mode Off / On of Zone timer,
On Ph-Ph
tPP 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-Ph
OperationPE Off - - On Operation mode Off / On of Phase-Earth
On loops
OpModetPE Off - - On Operation mode Off / On of Zone timer,
On Ph-E
tPE 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-E
IMinOpPP 10 - 1000 %IB 1 20 Minimum operate delta current for
Phase-Phase loops
IMinOpPE 10 - 1000 %IB 1 20 Minimum operate phase current for
Phase-Earth loops
IMinOpIN 5 - 1000 %IB 1 5 Minimum operate residual current for
Phase-Earth loops

Table 130: ZMQPDIS Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

PID-3650-SETTINGS v6

Table 131: ZMQAPDIS Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OperationDir Non-directional - - Forward Operation mode of directionality NonDir /
Forward Forw / Rev
Reverse
X1 0.10 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach
R1 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for zone
characteristic angle
X0 0.10 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach
Table continues on next page

Transformer protection RET670 229

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Values (Range) Unit Step Default Description

R0 0.01 - 3000.00 Ohm/p 0.01 15.00 Zero seq. resistance for zone
characteristic angle
RFPP 0.10 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach in ohm/loop, Ph-
Ph
RFPE 0.10 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach in ohm/loop, Ph-E
OperationPP Off - - On Operation mode Off / On of Phase-
On Phase loops
OpModetPP Off - - On Operation mode Off / On of Zone timer,
On Ph-Ph
tPP 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-Ph
OperationPE Off - - On Operation mode Off / On of Phase-Earth
On loops
OpModetPE Off - - On Operation mode Off / On of Zone timer,
On Ph-E
tPE 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-E
IMinOpPP 10 - 1000 %IB 1 20 Minimum operate delta current for
Phase-Phase loops
IMinOpPE 10 - 1000 %IB 1 20 Minimum operate phase current for
Phase-Earth loops

Table 132: ZMQAPDIS Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

PID-3545-SETTINGS v6

Table 133: ZDRDIR Group settings (basic)

Name Values (Range) Unit Step Default Description

IMinOpPP 5 - 30 %IB 1 10 Minimum operate phase-phase current
for Phase-Phase loops
IMinOpPE 5 - 30 %IB 1 5 Minimum operate phase current for
Phase-Earth loops
ArgNegRes 90 - 175 Deg 1 115 Angle of blinder in second quadrant for
forward direction
ArgDir 5 - 45 Deg 1 15 Angle of blinder in fourth quadrant for
forward direction

Table 134: ZDRDIR Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

230 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.1.6 Monitored data

PID-3545-MONITOREDDATA v6

Table 135: ZDRDIR Monitored data

Name Type Values (Range) Unit Description

L1Dir INTEGER 1=Forward - Direction in phase L1
2=Reverse
0=No direction
L2Dir INTEGER 1=Forward - Direction in phase L2
2=Reverse
0=No direction
L3Dir INTEGER 1=Forward - Direction in phase L3
2=Reverse
0=No direction
L1R REAL - Ohm Resistance in phase L1
L1X REAL - Ohm Reactance in phase L1
L2R REAL - Ohm Resistance in phase L2
L2X REAL - Ohm Reactance in phase L2
L3R REAL - Ohm Resistance in phase L3
L3X REAL - Ohm Reactance in phase L3

8.1.7 Operation principle

8.1.7.1 Full scheme measurement M16923-92 v4

The execution of the different fault loops within the IED are of full scheme type, which means that
each fault loop for phase-to-earth faults and phase-to-phase faults for forward and reverse faults are
executed in parallel.

Figure 85 presents an outline of the different measuring loops for up to five, impedance-measuring
zones. There are 3 to 5 zones depending on product type and variant.

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 1

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 2

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 3

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 4

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 5

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone RV

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone BU

IEC05000458‐3‐en.vsdx

IEC05000458 V3 EN-US

Figure 85: The different measuring loops at phase-to-earth fault and phase-to-phase fault.
The use of full scheme technique gives faster operation time compared to switched schemes which
mostly uses a start element to select correct voltages and current depending on fault type. Each

Transformer protection RET670 231

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

distance protection zone performs like one independent distance protection IED with six measuring
elements.

8.1.7.2 Impedance characteristic M16923-100 v8

The distance measuring zone includes six impedance measuring loops; three intended for phase-to-
earth faults, and three intended for phase-to-phase as well as, three-phase faults.

The distance measuring zone will essentially operate according to the non-directional impedance
characteristics presented in figure 86 and figure 87. The phase-to-earth characteristic is illustrated
with the full loop reach while the phase-to-phase characteristic presents the per phase reach.

X (Ohm/loop)

R1+Rn

RFPE RFPE

X0-X1
Xn =
3
X1+Xn R0-R1
Rn =
3
jN jN
R (Ohm/loop)

RFPE RFPE

X1+Xn

RFPE RFPE
IEC11000427-1-en.vsd

R1+Rn
IEC11000427 V1 EN-US

Figure 86: Characteristic for phase-to-earth measuring, ohm/loop domain

232 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

X (Ohm/phase)

RFPP R1 RFPP
2 2
X 0 PE - X 1RVPE
XNRV =XX00PEPG--X31XRVPE
1RVPG
XNRV =
XNRV =
3 3
XX
X00PE
0PE
PG --1X
-X 11FWPE
XFWPE
FWPG
XNFW =
=
XNFW =
XNFW
X1 3
3 3

j j
R (Ohm/phase)

RFPP RFPP
2 2

X1

RFPP R1 RFPP
2 2
IEC11000428-1-en.vsd
IEC11000428 V1 EN-US

Figure 87: Characteristic for phase-to-phase measuring

The fault loop reach with respect to each fault type may also be presented as in Figure. Note in
particular the difference in definition regarding the (fault) resistive reach for phase-to-phase faults
and three-phase faults.

Transformer protection RET670 233

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

IL1 R1 + j X1
Phase-to-earth
UL1
element

Phase-to-earth
fault in phase L1 RFPE
(Arc + tower
resistance)

0
IN (R0-R1)/3 +
j (X0-X1)/3 )

IL1 R1 + j X1 Phase-to-phase
UL1 element L1-L2
Phase-to-phase
fault in phase RFPP
L1-L2 IL2
UL2 (Arc resistance)
R1 + j X1

IL1 R1 + j X1 0.5·RFPP Phase-to-phase

UL1 element L1-L3
Three-phase
fault
IL3
UL3
R1 + j X1 0.5·RFPP
IEC08000282-2-en.vsd
IEC08000282 V2 EN-US

Figure 88: Fault loop model

The R1 and jX1 88 represents the positive sequence impedance from the measuring point to the fault
location. The settings and RFPP are the eventual fault resistances in the faulty place.

Regarding the illustration of three-phase fault in Figure 88, there is of course fault current flowing
also in the third phase during a three-phase fault. The illustration merely reflects the loop
measurement, which is made phase-to-phase.

The zone can be set to operate in Non-directional, Forward or Reverse direction through the setting
OperationDir . The result from respective set value is illustrated in Figure. The impedance reach is
symmetric, in the sense that it conforms for forward and reverse direction. Therefore, all reach
settings apply to both directions.

234 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

X X X

R R R

Non-directional Forward Reverse

IEC05000182-2-en.vsdx

IEC05000182 V2 EN-US

Figure 89: Directional operating modes of the distance measuring zones

The zone impedance characteristic is a product of the two separate characteristics:

• The quadrilateral characteristic

• The directional characteristic

The estimated impedance needs to be inside both characteristics for the zone to start or trip. (The
non-directional start STND is an exception however. It is only dependent on the quadrilateral
characteristic.)

In the following figure, the zone with the shorter reactive reach follows the directional line (R∙tan(15⁰))
only up to X1PP, where the quadrilateral characteristic will start to limit the reach.

X (ohm)

X1PP’

X1PP
15° R (ohm)
RFPP/2
-X1PP
R· tan15°

-X1PP’
Line distance protection=IEC19000141=2=en-us=Original.vsdx

IEC19000141 V2 EN-US

Figure 90: Line distance protection

8.1.7.3 Minimum operating current M16923-127 v5

The operation of Distance measuring zones, quadrilateral characteristic (ZMQPDIS) is blocked if the
magnitude of input currents fall below certain threshold values.

Transformer protection RET670 235

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

The phase-to-earth loop Ln is blocked if ILn < IMinOpPE.

For zone 1 with load compensation feature the additional criterion applies, that all phase-to-earth
loops will be blocked when IN < IMinOpIN, regardless of the phase currents.

ILn is the RMS value of the current in phase Ln. IN is the RMS value of the vector sum of the three-
phase currents, that is, residual current 3I0.

The phase-to-phase loop LmLn is blocked if ILmLn < IMinOpPP.

ILmLn is the RMS value of the vector difference between phase currents Lm and Ln.

All three current limits IMinOpPE, IMinOpIN and IMinOpPP are automatically
reduced to 75% of regular set values if the zone is set to operate in reverse
direction, that is, OperationDir = Reverse.

8.1.7.4 Measuring principles M16923-4 v7

Fault loop equations use the complex values of voltage, current, and changes in the current.
Apparent impedances are calculated and compared with the set limits. The apparent impedances at
phase-to-phase faults follow equation 37 (example for a phase L1 to phase L2 fault).

UL1 – UL2
Zapp = -------------------------
I L1 – IL2
EQUATION1222 V1 EN-US (Equation 37)

Here U and I represent the corresponding voltage and current phasors in the respective phase Ln (n
= 1, 2, 3)

The earth return compensation applies in a conventional manner to phase-to-earth faults (example
for a phase L1 to earth fault) according to equation 38.

U L1
Z app =
I L1 + I N × KN
EQUATION1223 V2 EN-US (Equation 38)

Where:
are the phase voltage, phase current and residual current present to the IED
U L1
I L1
IN

KN
is defined as:

Z 0 - Z1
KN =
3 × Z1
EQUATION-2105 V2 EN-US

Z 0 = R 0 + jX 0
EQUATION2106 V2 EN-US

236 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Z 1 = R1 + jX 1
EQUATION2107 V2 EN-US

Where
R0 is setting of the resistive zero sequence reach
X0 is setting of the reactive zero sequence reach
R1 is setting of the resistive positive sequence reach
X1 is setting of the reactive positive sequence reach

Here IN is a phasor of the residual current in IED point. This results in the same reach along the line
for all types of faults.

The apparent impedance is considered as an impedance loop with resistance R and reactance X.

The formula given in equation 38 is only valid for radial feeder application without load. When load is
considered in the case of single phase-to-earth fault, conventional distance protection might
overreach at exporting end and underreach at importing end. The IED has an adaptive load
compensation which increases the security in such applications.

Measuring elements receive current and voltage information from the A/D converter. The check sums
are calculated and compared, and the information is distributed into memory locations. For each of
the six supervised fault loops, sampled values of voltage (U), current (I), and changes in current
between samples (DI) are brought from the input memory and fed to a recursive Fourier filter.

The filter provides two orthogonal values for each input. These values are related to the loop
impedance according to equation 39,

X Di
U = R × i + ------ × -----
w 0 Dt
EQUATION1224 V1 EN-US (Equation 39)

in complex notation, or:

X D Re ( I )
Re ( U ) = R × Re ( I ) + ------ × ------------------
w0 Dt

EQUATION354 V1 EN-US (Equation 40)

X DIm ( I )
Im ( U ) = R × Im ( I ) + ------ × -----------------
w0 Dt

EQUATION355 V1 EN-US (Equation 41)

with

w0 = 2 × p × f 0
EQUATION356 V1 EN-US (Equation 42)

where:
Re designates the real component of current and voltage,
Im designates the imaginary component of current and voltage and
f0 designates the rated system frequency

Transformer protection RET670 237

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

The algorithm calculates Rm measured resistance from the equation for the real value of the voltage
and substitutes it in the equation for the imaginary part. The equation for the Xm measured reactance
can then be solved. The final result is equal to:

Im ( U ) × DRe ( I ) – Re ( U ) × D Im ( I )
R m = ------------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – D Im ( I ) × Re ( I )
EQUATION357 V1 EN-US (Equation 43)

Re ( U ) × Im ( I ) – Im ( U ) × Re ( I )
Xm = w 0 × Dt × -------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – DIm ( I ) × Re ( I )
EQUATION358 V1 EN-US (Equation 44)

The calculated Rm and Xm values are updated each sample and compared with the set zone reach.
The adaptive tripping counter counts the number of permissive tripping results. This effectively
removes any influence of errors introduced by the capacitive voltage transformers or by other factors.

The directional evaluations are performed simultaneously in both forward and reverse directions, and
in all six fault loops. Positive sequence voltage and a phase locked positive sequence memory
voltage are used as a reference. This ensures unlimited directional sensitivity for faults close to the
IED point.

8.1.7.5 Directional impedance element for quadrilateral characteristics M16923-139 v6

The evaluation of the directionality takes place in Directional impedance quadrilateral function
ZDRDIR. Equation 45 and equation 46 are used to classify that the fault is in forward direction for
phase-to-earth fault and phase-to-phase fault.

0.8 × U 1L1 + 0.2 × U 1L1 M

- ArgDir < arg < ArgNeg Re s
I L1
EQUATION725 V2 EN-US (Equation 45)

For the L1-L2 element, the equation in forward direction is according to.

238 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

0.8 × U 1L1 L 2 + 0.2 × U 1L1 L 2 M

- ArgDir < arg < ArgNeg Re s
I L1 L 2
EQUATION726 V2 EN-US (Equation 46)

where:
ArgDir is the setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15
degrees) and
ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default set to 115
degrees, see figure 91.
is positive sequence phase voltage in phase L1
U 1L1
is positive sequence memorized phase voltage in phase L1
U 1L1M
is phase current in phase L1
I L1
is voltage difference between phase L1 and L2 (L2 lagging L1)
U 1L1L 2
is memorized voltage difference between phase L1 and L2 (L2 lagging L1)
U 1L1L 2 M
is current difference between phase L1 and L2 (L2 lagging L1)
I L1L 2

The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees respectively (as
shown in figure 91). It should not be changed unless system studies have shown the necessity.

ZDRDIR gives binary coded directional information per measuring loop on the output STDIRCND.

STDIR= STFWL1*1+STFWL2*2+STFWL3*4+STFWL1L2*8+
+STFWL2L3*16+STFWL3L1*32+STRVL1*64+STRVL2*128+
+STRVL3*256+STRVL1L2*512+STRVL2L3*1024+STRVL3L1*2048

Transformer protection RET670 239

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

ArgNegRes

ArgDir
R

en05000722.vsd
IEC05000722 V1 EN-US

Figure 91: Setting angles for discrimination of forward and reverse fault in Directional
impedance quadrilateral function ZDRDIR

The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees.

The polarizing voltage is available as long as the positive sequence voltage exceeds 5% of the set
base voltage UBase. So the directional element can use it for all unsymmetrical faults including
close-in faults.

For close-in three-phase faults, the U1L1M memory voltage, based on the same positive sequence
voltage, ensures correct directional discrimination.

The memory voltage is used for 100 ms or until the positive sequence voltage is restored.

After 100 ms the following occurs:

• If the current is still above the set value of the minimum operating current (between 10 and 30%
of the set IED rated current IBase), the condition seals in.
• If the fault has caused tripping, the trip endures.
• If the fault was detected in the reverse direction, the measuring element in the reverse
direction remains in operation.
• If the current decreases below the minimum operating value, the memory resets until the
positive sequence voltage exceeds 10% of its rated value.

8.1.7.6 Simplified logic diagrams M13841-35 v2

Distance protection zones M13841-10 v9

The design of the distance protection zones are presented for all measuring loops: phase-to-earth as
well as phase-to-phase.

Phase-to-earth related signals are designated by L1N, L2N and L3N. The phase-to-phase signals are
designated by L1L2, L2L3, and L3L1.

240 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Fulfillment of two different measuring conditions is necessary to obtain the one logical signal for each
separate measuring loop:

• Zone measuring condition, which follows the operating equations described above.
• Group functional input signal (STCND), as presented in figure 92.

Two types of function block, ZMQPDIS and ZMQAPDIS, are used in the IED. ZMQPDIS is used for
zone 1 and ZMQAPDIS for zone 2 - 5.

The STCND input signal represents a connection of six different integer values from Phase selection
with load encroachment, quadrilateral characteristic function FDPSPDIS within the IED, which are
converted within the zone measuring function into corresponding boolean expressions for each
condition separately. Input signal STCND is connected to FDPSPDIS or FMPSPDIS function output
STCNDZ.

The input signal DIRCND is used to give condition for directionality for the distance measuring zones.
The signal contains binary coded information for both forward and reverse direction. The zone
measurement function filters out the relevant signals depending on the setting of the parameter
OperationDir. It must be configured to the STDIR output on ZDRDIR function.

STZMPP
OR
STCND

AND STNDL1L2
L1L2

STNDL2L3
L2L3 AND

L3L1 AND STNDL3L1

AND STNDL1N
L1N

AND STNDL2N
L2N

STNDL3N
L3N AND

OR STPE

OR
VTSZ STND
OR AND
BLOCK
BLOCFUNC BLK

99000557-2.vsd
IEC99000557-TIFF V3 EN-US

Figure 92: Conditioning by a group functional input signal STCND, external start condition
Composition of the phase start signals for a case, when the zone operates in a non-directional mode,
is presented in figure 93.

Transformer protection RET670 241

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

IEC00000488-TIFF V1 EN-US

Figure 93: Composition of starting signals in non-directional operating mode

Results of the directional measurement enter the logic circuits, when the zone operates in directional
(forward or reverse) mode, as shown in figure 94.

STNDL1N
AND
DIRL1N
STZMPE.
OR
STNDL2N
DIRL2N AND

STNDL3N 15 ms
OR STL1
AND AND t
DIRL3N

STNDL1L2
DIRL1L2 AND 15 ms
OR STL2
AND t
STNDL2L3
DIRL2L3 AND
15 ms
OR STL3
STNDL3L1 AND t
DIRL3L1 AND

STZMPP
OR

BLK

15 ms
OR START
AND t

IEC09000888-2-en.vsd
IEC09000888 V2 EN-US

Figure 94: Composition of start signals in directional operating mode

Tripping conditions for the distance protection zone one are symbolically presented in figure 95.

242 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Timer tPP=On
STZMPP AND tPP
AND
t

BLOCFUNC
OR OR
tPE
t
AND
Timer tPE=On AND
STZMPE 15ms
BLKTR AND t
TRIP
BLK OR

STL1 AND TRL1

STL2 AND TRL2

STL3 AND TRL3

IEC09000887-3-en.vsdx

IEC09000887 V3 EN-US

Figure 95: Tripping logic for the distance protection zone

8.1.8 Technical data IP12804-1 v1

M13842-1 v15

Table 136: ZMQPDIS Technical data

Function Range or value Accuracy

Number of zones Max 5 with selectable -
direction
Minimum operate residual (5-1000)% of IBase -
current, zone 1
Minimum operate current, (10-1000)% of IBase -
phase-to-phase and phase-to-
earth
Positive sequence reactance (0.10-3000.00) Ω/phase ±2.0% static accuracy
±2.0 degrees static angular accuracy
Positive sequence resistance (0.01-1000.00) Ω/phase Conditions:
Zero sequence reactance (0.10-9000.00) Ω/phase Voltage range: (0.1-1.1) x Ur
Current range: (0.5-30) x Ir
Angle: at 0 degrees and 85 degrees
Zero sequence resistance (0.01-3000.00) Ω/phase
Fault resistance, phase-to-earth (0.10-9000.00) Ω/loop
Fault resistance, phase-to- (0.10-3000.00) Ω/loop
phase
Dynamic overreach <5% at 85 degrees -
measured with CVT’s and
0.5<SIR<30
Definite time delay Ph-Ph and (0.000-60.000) s ±0.2% or ±40 ms whichever is greater
Ph-E operation
Table continues on next page

Transformer protection RET670 243

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Function Range or value Accuracy

Operate time 25 ms typically IEC 60255-121
Reset ratio 105% typically -
Reset time at 0.1 x Zreach to 2 x Min. = 20 ms -
Zreach Max. = 50 ms

8.2 Phase selection, quad, fixed angle, load encroachment

FDPSPDIS IP12400-1 v4

8.2.1 Identification

8.2.1.1 Identification M14850-1 v6

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Phase selection, quad, fixed angle, FDPSPDIS 21
load encroachment
Z<phs

SYMBOL-DD V1 EN-US

8.2.2 Functionality M13139-3 v9

The operation of transmission networks today is in many cases close to the stability limit. Due to
environmental considerations, the rate of expansion and reinforcement of the power system is
reduced, for example, difficulties to get permission to build new power lines. The ability to accurately
and reliably classify the different types of fault, so that single pole tripping and autoreclosing can be
used plays an important role in this matter. Phase selection, quadrilateral characteristic with fixed
angle (FDPSPDIS) is designed to accurately select the proper fault loop in the distance function
dependent on the fault type.

The heavy load transfer that is common in many transmission networks may make fault resistance
coverage difficult to achieve. Therefore, FDPSPDIS has a built-in algorithm for load encroachment,
which gives the possibility to enlarge the resistive setting of both the phase selection and the
measuring zones without interfering with the load.

The extensive output signals from the phase selection gives also important information about faulty
phase(s), which can be used for fault analysis.

A current-based phase selection is also included. The measuring elements continuously measure
three phase currents and the residual current and, compare them with the set values.

244 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.2.3 Function block M13147-3 v4

FDPSPDIS
I3P* TRIP
U3P* START
BLOCK STFWL1
DIRCND STFWL2
STFWL3
STFWPE
STRVL1
STRVL2
STRVL3
STRVPE
STNDL1
STNDL2
STNDL3
STNDPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
STCNDZ
STCNDLE

IEC14000047-1-en.vsd
IEC10000047 V2 EN-US

Figure 96: FDPSPDIS function block

8.2.4 Signals
PID-3642-INPUTSIGNALS v7

Table 137: FDPSPDIS Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
DIRCND INTEGER 0 External directional condition

PID-3642-OUTPUTSIGNALS v7

Table 138: FDPSPDIS Output signals

Name Type Description

TRIP BOOLEAN Trip output
START BOOLEAN Start in any phase or loop
STFWL1 BOOLEAN Fault detected in phase L1 - forward direction
STFWL2 BOOLEAN Fault detected in phase L2 - forward direction
STFWL3 BOOLEAN Fault detected in phase L3 - forward direction
STFWPE BOOLEAN Earth fault detected in forward direction
STRVL1 BOOLEAN Fault detected in phase L1 - reverse direction
STRVL2 BOOLEAN Fault detected in phase L2 - reverse direction
STRVL3 BOOLEAN Fault detected in phase L3 - reverse direction
STRVPE BOOLEAN Earth fault detected in reverse direction
STNDL1 BOOLEAN Non directional start in L1
STNDL2 BOOLEAN Non directional start in L2
STNDL3 BOOLEAN Non directional start in L3
Table continues on next page

Transformer protection RET670 245

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Type Description

STNDPE BOOLEAN Non directional start, phase-earth
STFW1PH BOOLEAN Start in forward direction for single-phase fault
STFW2PH BOOLEAN Start in forward direction for two- phase fault
STFW3PH BOOLEAN Start in forward direction for thre-phase fault
STPE BOOLEAN Current conditions release of phase-earth measuring elements
STPP BOOLEAN Current conditions release of phase-phase measuring elements
STCNDZ INTEGER Start condition (Z< with LE and 3I0 E/F detection)
STCNDLE INTEGER Start condition (only LE and 3I0 E/F detection)

8.2.5 Settings
PID-3642-SETTINGS v7

Table 139: FDPSPDIS Group settings (basic)

Name Values (Range) Unit Step Default Description

INBlockPP 10 - 100 %IPh 1 40 3I0 limit for blocking phase-to-phase
measuring loops
INReleasePE 10 - 100 %IPh 1 20 3I0 limit for releasing phase-to-earth
measuring loops
RLdFw 1.00 - 3000.00 Ohm/p 0.01 80.00 Forward resistive reach within the load
impedance area
RLdRv 1.00 - 3000.00 Ohm/p 0.01 80.00 Reverse resistive reach within the load
impedance area
ArgLd 5 - 70 Deg 1 30 Load angle determining the load
impedance area
X1 0.50 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach
X0 0.50 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach
RFFwPP 0.50 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, forward
RFRvPP 0.50 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, reverse
RFFwPE 1.00 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, forward
RFRvPE 1.00 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, reverse
IMinOpPP 5 - 500 %IB 1 10 Minimum operate delta current for
Phase-Phase loops
IMinOpPE 5 - 500 %IB 1 5 Minimum operate phase current for
Phase-Earth loops

Table 140: FDPSPDIS Group settings (advanced)

Name Values (Range) Unit Step Default Description

OperationZ< Off - - On Operation of impedance based
On measurement
OperationI> Off - - Off Operation of current based
On measurement
IPh> 10 - 2500 %IB 1 120 Start value for phase over-current
element
IN> 10 - 2500 %IB 1 20 Start value for trip from 3I0 over-current
element
TimerPP Off - - Off Operation mode Off / On of Zone timer,
On Ph-Ph
Table continues on next page

246 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Name Values (Range) Unit Step Default Description

tPP 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-Ph
TimerPE Off - - Off Operation mode Off / On of Zone timer,
On Ph-E
tPE 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-E

Table 141: FDPSPDIS Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

8.2.6 Operation principle

M13140-3 v6
The basic impedance algorithm for the operation of the phase selection measuring elements is the
same as for the distance zone measuring function. Phase selection with load encroachment,
quadrilateral characteristic FDPSPDIS includes six impedance measuring loops; three intended for
phase-to-earth faults, and three intended for phase-to-phase faults as well as for three-phase faults.

The difference, compared to the distance zone measuring function, is in the combination of the
measuring quantities (currents and voltages) for different types of faults.

A current-based phase selection is also included. The measuring elements continuously measure
three phase currents and the residual current, and compare them with the set values. The current
signals are filtered by Fourier's recursive filter, and separate trip counter prevents too high
overreaching of the measuring elements.

The characteristic is basically non-directional, but FDPSPDIS uses information from the directional
function to discriminate whether the fault is in forward or reverse direction.

The start condition STCNDZ is essentially based on the following criteria:

1. Residual current criteria, that is, separation of faults with and without earth connection
2. Regular quadrilateral impedance characteristic or current based criteria
3. Load encroachment characteristics is always active but can be switched off by selecting a high
setting.

The current start condition STCNDLE is based on the following criteria:

1. Residual current criteria

2. No quadrilateral impedance characteristic. The impedance reach outside the load area is
theoretically infinite. The practical reach, however, will be determined by the minimum operating
current limits.
3. Load encroachment characteristic is always active, but can be switched off by selecting a high
setting.

The STCNDLE output is non-directional. The directionality is determined by the distance zones
directional function. There are outputs from FDPSPDIS that indicate whether a start is in forward or
reverse direction or non-directional, for example STFWL1, STRVL1 and STNDL1.

These directional indications are based on the sector boundaries of the directional function and the
impedance setting of FDPSPDIS function. Their operating characteristics are illustrated in figure 97.

Transformer protection RET670 247

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

X X X

R
R R

Non-directional (ND) Forward (FW) Reverse (RV)

en08000286.vsd
IEC08000286 V1 EN-US

Figure 97: Characteristics for non-directional, forward and reverse operation of Phase
selection with load encroachment, quadrilateral characteristic FDPSPDIS
The setting of the load encroachment function may influence the total operating characteristic, (for
more information, refer to section "Load encroachment").

The input DIRCND contains binary coded information about the directional coming from the
directional function . It shall be connected to the STDIR output on ZDRDIR, directional measuring
block. This information is also transferred to the input DIRCND on the distance measuring zones,
that is, the ZMQPDIS, distance measuring block.

The code built up for the directionality is as follows:

STDIR= STFWL1*1+STFWL2*2+STFWL3*4+STFWL1L2*8+
+STFWL2L3*16+STFWL3L1*32+STRVL1*64+STRVL2*128+
+STRVL3*256+STRVL1L2*512+STRVL2L3*1024+STRVL3L1*2048

If the binary information is 1 then it will be considered that we have start in forward direction in phase
L1. If the binary code is 3 then we have start in forward direction in phase L1 and L2, binary code
192 means start in reverse direction in phase L1 and L2A and B etc.

The STCNDZ or STCNDLE output contains, in a similar way as DIRCND, binary coded information,
in this case information about the condition for opening correct fault loop in the distance measuring
element. It shall be connected to the STCND input on the ZMQPDIS, distance measuring block.

The code built up for release of the measuring fault loops is as follows:

STCND = L1N*1 + L2N*2 + L3N*4 + L1L2*8 + L2L3*16 + L3L1*32

8.2.6.1 Phase-to-earth fault M13140-22 v3

For a phase-to-earth fault, the measured impedance by FDPSPDIS will be according to equation 47.

Index PHS in images and equations reference settings for Phase selection with load
encroachment function FDPSPDIS.

248 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

ULn
ZPHSn =
ILn
EQUATION1255 V1 EN-US (Equation 47)

where:
n corresponds to the particular phase (n=1, 2 or 3)

The characteristic for FDPSPDIS function at phase-to-earth fault is according to figure 98. The
characteristic has a fixed angle for the resistive boundary in the first quadrant of 60°.

The resistance RN and reactance XN are the impedance in the earth-return path defined according
to equation 48 and equation 49.

R0 - R1
RN =
3
EQUATION1256 V1 EN-US (Equation 48)

X 0 - X1
XN =
3
EQUATION1257 V1 EN-US (Equation 49)

X (ohm/loop)
Kr·(X1+XN)

RFRvPE RFFwPE

X1+XN

60 deg
RFFwPE

RFRvPE R (Ohm/loop)
60 deg
X1+XN

1
Kr =
tan(60deg)

RFRvPE RFFwPE

Kr·(X1+XN)
en06000396.vsd
IEC06000396 V2 EN-US

Figure 98: Characteristic of FDPSPDIS for phase-to-earth fault (setting parameters in italic),
ohm/loop domain (directional lines are drawn as "line-dot-dot-line")
Besides this, the 3I0 residual current must fulfil the conditions according to equation 50 and
equation 51.

3 × I0 ³ 0.5 × IMinOpPE
EQUATION2108 V1 EN-US (Equation 50)

Transformer protection RET670 249

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

3 × I0 ³ INReleasePE
------------------------------------ × Iphmax
100
EQUATION766 V1 EN-US (Equation 51)

where:
IMinOpPE is the minimum operation current for forward zones
INReleasePE is the setting for the minimum residual current needed to enable operation in the phase-to-earth fault
loops (in %).
Iphmax is the maximum phase current in any of three phases.

8.2.6.2 Phase-to-phase fault M13140-56 v3

For a phase-to-phase fault, the measured impedance by FDPSPDIS will be according to equation 52.

ULm - ULn
ZPHS =
-2 × ILn
EQUATION1258 V1 EN-US (Equation 52)

ULm is the leading phase voltage, ULn the lagging phase voltage and ILn the phase current in the
lagging phase n.

The operation characteristic is shown in figure 99.

X (W / phase)
0.5·RFRvPP 0.5·RFFwPP

Kr·X1

X1
0.5·RFFwPP
60 deg

R (W / phase)
60 deg
0.5·RFRvPP
X1
1
Kr =
tan(60 deg)

Kr·X1

0.5·RFRvPP 0.5·RFFwPP
IEC09000047-2-en.vsd
IEC09000047 V2 EN-US

Figure 99: The operation characteristics for FDPSPDIS at phase-to-phase fault (setting
parameters in italic, directional lines drawn as "line-dot-dot-line"), ohm/phase
domain
In the same way as the condition for phase-to-earth fault, there are current conditions that have to be
fulfilled in order to release the phase-to-phase loop. Those are according to equation 53 or
equation 54.

250 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

3I 0 < IMinOpPE
EQUATION2109 V1 EN-US (Equation 53)

INBlockPP
3I 0 < × Iph max
100
EQUATION2110 V1 EN-US (Equation 54)

where:
IMinOpPE is the minimum operation current for earth measuring loops,
INBlockPP is 3I0 limit for blocking phase-to-phase measuring loop and

Iphmax is maximal magnitude of the phase currents.

8.2.6.3 Three-phase faults M13140-80 v4

The operation conditions for three-phase faults are the same as for phase-to-phase fault, that is
equation , equation and equation are used to release the operation of the function.

However, the reach is expanded by a factor 2/√3 (approximately 1.1547) in all directions. At the same
time the characteristic is rotated 30 degrees, counter-clockwise. The characteristic is shown in
figure 100.

X (ohm/phase)

4 × X1
3

90 deg

0.5·RFFwPP·K3

X1·K3 4 × RFFwPP
6

R (ohm/phase)

0.5·RFRvPP·K3
2
K3 =
3 30 deg

IEC05000671-5-en.vsd
IEC05000671 V5 EN-US

Figure 100: The characteristic of FDPSPDIS for three-phase fault (setting parameters in italic)

Transformer protection RET670 251

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.2.6.4 Load encroachment M13140-86 v6

Each of the six measuring loops has its own load encroachment characteristic based on the
corresponding loop impedance. The load encroachment functionality is always active, but can be
switched off by selecting a high setting.

The outline of the characteristic is presented in figure 101. As illustrated, the resistive blinders are set
individually in forward and reverse direction while the angle of the sector is the same in all four
quadrants.

RLdFw
ArgLd ArgLd
R

ArgLd ArgLd
RLdRv

IEC09000042-1-en.vsd
IEC09000042 V1 EN-US

Figure 101: Characteristic of load encroachment function

The influence of load encroachment function on the operation characteristic is dependent on the
chosen operation mode of FDPSPDIS function. When output signal STCNDZ is selected, the
characteristic for FDPSPDIS (and also zone measurement depending on settings) will be reduced by
the load encroachment characteristic (see figure 102, left illustration).

When output signal STCNDLE is selected, the operation characteristic will be as the right illustration
in figure 102. The reach will in this case be limit by the minimum operation current and the distance
measuring zones.

252 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

X X

R R

STCNDZ STCNDLE

IEC10000099-1-
en.vsd
IEC10000099 V1 EN-US

Figure 102: Difference in operating characteristic depending on operation mode when load
encroachment is activated
When FDPSPDIS is set to operate together with a distance measuring zone the resultant operate
characteristic could look like in figure 103. The figure shows a distance measuring zone operating in
forward direction. Thus, the operating area is highlighted in black.

"Phase selection"
"quadrilateral" zone

Distance measuring zone

Load encroachment
characteristic

Directional line

en05000673.vsd
IEC05000673 V1 EN-US

Figure 103: Operating characteristic in forward direction when load encroachment is activated
Figure 103 is valid for phase-to-earth. During a three-phase fault, or load, when the quadrilateral
phase-to-phase characteristic is subject to enlargement and rotation the operate area is transformed
according to figure 104. Notice in particular what happens with the resistive blinders of the "phase
selection" "quadrilateral" zone. Due to the 30-degree rotation, the angle of the blinder in quadrant
one is now 90 degrees instead of the original 60 degrees. The blinder that is nominally located to

Transformer protection RET670 253

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

quadrant four will at the same time tilt outwards and increase the resistive reach around the R-axis.
Consequently, it will be more or less necessary to use the load encroachment characteristic in order
to secure a margin to the load impedance.

X (W / phase)
Phase selection
”Quadrilateral” zone

Distance measuring zone

R (W / phase)

IEC09000049-1-en.vsd
IEC09000049 V1 EN-US

Figure 104: Operating characteristic for FDPSPDIS in forward direction for three-phase fault,
ohm/phase domain
The result from rotation of the load characteristic at a fault between two phases is presented in fig
105. Since the load characteristic is based on the same measurement as the quadrilateral
characteristic, it will rotate with the quadrilateral characteristic clockwise by 30 degrees when subject
to a pure phase-to-phase fault. At the same time the characteristic will "shrink", divided by 2/√3, from
the full RLdFw and RLdRv reach, which is valid at load or three-phase fault.

254 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

IEC08000437.vsd

IEC08000437 V1 EN-US

Figure 105: Rotation of load characteristic for a fault between two phases
There is a gain in selectivity by using the same measurement as for the quadrilateral characteristic
since not all phase-to-phase loops will be fully affected by a fault between two phases. It should also
provide better fault resistive coverage in quadrant one. The relative loss of fault resistive coverage in
quadrant four should not be a problem even for applications on series compensated lines.

8.2.6.5 Minimum operate currents M13140-102 v3

The operation of the Phase selection with load encroachment function (FDPSPDIS) is blocked if the
magnitude of input currents falls below certain threshold values.

The phase-to-earth loop Ln is blocked if ILn<IMinOpPE, where ILn is the RMS value of the current in
phase Ln.

The phase-to-phase loop LmLn is blocked if (2·ILn<IMinOpPP).

8.2.6.6 Simplified logic diagrams M13140-107 v7

Figure 106 presents schematically the general logic diagram for phase-selection function.

Transformer protection RET670 255

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

INMag Residual current 
based PhSel.
INReleasePE
STPP
PP
INBLOCKPP STPE
PE

Imin

I3P PP
PE STZPHLmn AND
PHSLmn
X
OR
U3P STZPHLm

R,X settings R
LEPHLm AND PHSLm
OR
Binary to word
LEPHLmn
OperationZ< Enable
b1 – b3
word
b4 – b6
IPELm
IL1 IRELPE
Set level

IPh> T
IRELPP STCNDZ
IN> AND 63 F
t

OperationI> Binary to word
b1 – b3
OR
STCNDLE
word
Relative current  AND b4 – b6
IPELm RELPHLmn AND
based PP release 
detection

IEC18000010-2-en.vsdx
  m = L1G, L2G, L3G
mn = L1L2, L2L3, L3L1
IEC18000010 V2 EN-US

Figure 106: General phase-selection logic diagram

Figure 107 presents schematically the creation of the phase-to-phase and phase-to-earth operating
conditions. Consider only the corresponding part of measuring and logic circuits, when only a phase-
to-earth or phase-to-phase measurement is available within the IED.

OperationZ<
AND
LDEblock

3I 0  0.5  IMinOpPE IRELPE

& 15 ms
AND t STPE
INReleasePE
3I 0   Iphmax
100 STCNDLE
Bool to AND
BLOCK integer

15 ms
3I 0  IMinOpPE 10 ms 20 ms & t STPP

OR AND t t
IRELPP
INBlockPP
3I 0   Iphmax
100

IEC09000149-3-en.vsd
IEC09000149 V3 EN-US

Figure 107: Phase-to-phase and phase-to-earth operating conditions (residual current criteria)
A special attention is paid to correct phase selection at evolving faults. A STCNDLE output signal is
created as a combination of the load encroachment characteristic and current criteria, refer to
figure 107. This signal can be configured to STCND functional input signals of the distance protection
zone and this way influence the operation of the phase-to-phase and phase-to-earth zone measuring
elements, residual current and the load encroachment characteristic.

Figure 108 presents schematically the composition of non-directional phase selective signals
STNDLn. Internal signals ZMLnN and ZMLmLn (m and n change between one and three according
to the phase number) represent the fulfilled operating criteria for each separate loop measuring

256 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

element, that is, within the impedance characteristic. These signals are released if the setting
OperationZ< is set to On. Similarly, another group of internal signals ILm and ILn represent the
fulfilled phase current measurement criteria, which are released by setting the OperationI> parameter
to On.

INDL1N
INDL2N
INDL3N

15 ms
STNDPE
IRELPE OR t

LDEblockL1N
IL1 AND 15 ms
OR STNDL1
ZML1N OR t
LDEblockL2N
IL2 AND
OR
ZML2N 15 ms
LDEblockL3N STNDL2
OR t
IL3 AND
OR
ZML3N
LDEblockL1L2 15 ms
STNDL3
IL1 & IL2 AND OR t
OR
ZML1L2
LDEblockL2L3
IL2 & IL3 AND INDL1L2
OR
ZML2L3 INDL2L3
LDEblockL3L1
IL3 & IL1 AND
OR INDL3L1
ZML3L1
IRELPP 15 ms
STNDPP
OR t

IEC00000545-4-en.vsd
IEC00000545-TIFF V4 EN-US

Figure 108: Composition on non-directional phase selection signals

Composition of the directional (forward and reverse) phase selective signals is presented
schematically in figure 110 and figure 109. The directional criteria appears as a condition for the
correct phase selection in order to secure a high phase selectivity for simultaneous and evolving
faults on lines within the complex network configurations. Internal signals DFWLn and DFWLnLm
present the corresponding directional signals for measuring loops with phases Ln and Lm.
Designation FW (figure 110) represents the forward direction as well as the designation RV
(figure 109) represents the reverse direction. All directional signals are derived within the
corresponding digital signal processor.

Figure 109 presents additionally a composition of a STCNDZ output signal, which is created on the
basis of the continuation of the impedance measuring conditions and the load encroachment
characteristic. This signal can be configured to STCND functional input signals of the distance
protection zone and this way influence the operation of the phase-to-phase and phase-to-earth zone
measuring elements and their phase related starting and tripping signals.

Transformer protection RET670 257

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

INDL1N
AND
DRVL1N
INDL1L2 15 ms STRVL1
AND OR t
DRVL1L2
INDL3L1
AND
DRVL3L1 15 ms
STRVPE
INDL2N OR t
AND
DRVL2N
INDL1L2 15 ms
STRVL2
AND OR t

INDL2L3 INDL1N
AND INDL2N
DRVL2L3
INDL3N Bool to STCNDZ
INDL3N INDL1L2 integer
AND INDL2L3
DRVL3N INDL3L1
INDL2L3 15 ms
STRVL3
AND OR t

INDL3L1
15 ms
AND STRVPP
OR t

IEC00000546_2_en.vsd
IEC00000546-TIFF V2 EN-US

Figure 109: Composition of phase selection signals for reverse direction

AND

INDL1N
AND 15 ms 15 ms
DFWL1N STFW1PH
AND OR t t
INDL1L2
15 ms STFWL1
AND OR t
DFWL1L2
INDL3L1
AND
AND
DFWL3L1 15 ms
STFWPE
INDL2N OR t
AND
DFWL2N
AND 15 ms
INDL1L2 STFWL2
t
AND OR
15 ms 15 ms
INDL2L3 STFW2PH
AND OR t t
AND
DFWL2L3
INDL3N
AND AND
DFWL3N 15 ms
STFWL3
t
INDL2L3
AND OR
15 ms
INDL3L1 STFW3PH
AND t
AND

15 ms
STFWPP
OR t

IEC05000201_2_en.vsd

IEC05000201 V2 EN-US

Figure 110: Composition of phase selection signals for forward direction

258 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Figure 111 presents the composition of output signals TRIP and START, where internal signals
STNDPP, STFWPP and STRVPP are the equivalent to internal signals STNDPE, STFWPE and
STRVPE, but for the phase-to-phase loops.

TimerPP=Off
tPP
AND AND
t
TRIP
OR OR
tPE
TimerPE=Off
t
AND AND

STNDPP

STFWPP OR
STRVPP
START
OR
STNDPE

STFWPE OR
STRVPE

IEC08000441_2_en.vsd
IEC08000441-1 V2 EN-US

Figure 111: TRIP and START signal logic

Transformer protection RET670 259

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.2.7 Technical data

M16024-1 v12

Table 142: FDPSPDIS technical data

Function Range or value Accuracy

Minimum operate current (5-500)% of IBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir

Reactive reach, positive (0.50–3000.00) Ω/phase ±2.5% static accuracy

sequence ±2.0 degrees static angular accuracy
Conditions:
Resistive reach, positive (0.10–1000.00) Ω/phase Voltage range: (0.1-1.1) x Ur
sequence
Current range: (0.5-30) x Ir
Reactive reach, zero sequence (0.50–9000.00) Ω/phase Angle: at 0 degrees and 85 degrees

Resistive reach, zero sequence (0.50–3000.00) Ω/phase

Fault resistance, phase-to-earth (1.00–9000.00) Ω/loop
faults, forward and reverse
Fault resistance, phase-to- (0.50–3000.00) Ω/loop
phase faults, forward and
reverse
Load encroachment criteria:
Load resistance, forward and (1.00–3000.00) Ω/phase
reverse (5-70) degrees
Safety load impedance angle
Reset ratio 105% typically -

8.3 Distance measuring zone, quadrilateral characteristic

for series compensated lines ZMCPDIS, ZMCAPDIS,
ZDSRDIR SEMOD168167-1 v3

8.3.1 Identification
SEMOD168165-2 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Distance measuring zone, quadrilateral ZMCPDIS 21
characteristic for series compensated
lines (zone 1) Z
S00346 V2 EN-US

Distance measuring zone, quadrilateral ZMCAPDIS 21

characteristic for series compensated
lines (zone 2-5) Z
S00346 V2 EN-US

Directional impedance quadrilateral, ZDSRDIR 21D

including series compensation
Z<->

IEC09000167 V1 EN-US

8.3.2 Functionality SEMOD168173-4 v11

The line distance protection is an up to five (depending on product variant) zone full scheme
protection with three fault loops for phase-to-phase faults and three fault loops for phase-to-earth

260 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

fault for each of the independent zones. Individual settings for each zone resistive and reactive reach
give flexibility for use on overhead lines and cables of different types and lengths.

Quadrilateral characteristic is available.

Distance measuring zone, quadrilateral characteristic for series compensated lines (ZMCPDIS)
function has functionality for load encroachment which increases the possibility to detect high
resistive faults on heavily loaded lines.

Forward
operation

Reverse
operation

en05000034.vsd
IEC05000034 V1 EN-US

Figure 112: Typical quadrilateral distance protection zone with load encroachment function
activated
The distance protection zones can operate, independent of each other, in directional (forward or
reverse) or non-directional mode. This makes them suitable, together with different communication
schemes, for the protection of power lines and cables in complex network configurations, such as
parallel lines, multi-terminal lines.

8.3.3 Function block SEMOD168196-1 v2

SEMOD168198-4 v2

ZMCPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND

IEC07000036-2-en.vsd
IEC07000036 V2 EN-US

Figure 113: ZMCPDIS function block

Transformer protection RET670 261

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

ZMCAPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND

IEC09000890-1-en.vsd
IEC09000890 V1 EN-US

Figure 114: ZMCAPDIS function block

SEMOD168200-4 v2

ZDSRDIR
I3P* STFW
U3P* STRV
STDIRCND

IEC07000035-2-en.vsd
IEC07000035 V2 EN-US

Figure 115: ZDSRDIR function block

8.3.4 Signals SEMOD173074-1 v3

Input and output signals is shown for zone 1, zone 2 - 5 are equal.

PID-3639-INPUTSIGNALS v6

Table 143: ZMCPDIS Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
VTSZ BOOLEAN 0 Blocks all output by fuse failure signal
BLKTR BOOLEAN 0 Blocks all trip outputs
STCND INTEGER 0 External start condition (loop enabler)
DIRCND INTEGER 0 External directional condition

PID-3639-OUTPUTSIGNALS v6

Table 144: ZMCPDIS Output signals

Name Type Description

TRIP BOOLEAN General Trip, issued from any phase or loop
TRL1 BOOLEAN Trip signal from phase L1
TRL2 BOOLEAN Trip signal from phase L2
TRL3 BOOLEAN Trip signal from phase L3
START BOOLEAN General Start, issued from any phase or loop
STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3
STND BOOLEAN Non-directional start, issued from any phase or loop

262 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

PID-3637-INPUTSIGNALS v6

Table 145: ZMCAPDIS Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
VTSZ BOOLEAN 0 Blocks all output by fuse failure signal
BLKTR BOOLEAN 0 Blocks all trip outputs
STCND INTEGER 0 External start condition (loop enabler)
DIRCND INTEGER 0 External directional condition

PID-3637-OUTPUTSIGNALS v6

Table 146: ZMCAPDIS Output signals

Name Type Description

TRIP BOOLEAN General Trip, issued from any phase or loop
TRL1 BOOLEAN Trip signal from phase L1
TRL2 BOOLEAN Trip signal from phase L2
TRL3 BOOLEAN Trip signal from phase L3
START BOOLEAN General Start, issued from any phase or loop
STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3
STND BOOLEAN Non-directional start, issued from any phase or loop

PID-3547-INPUTSIGNALS v6

Table 147: ZDSRDIR Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL

PID-3547-OUTPUTSIGNALS v6

Table 148: ZDSRDIR Output signals

Name Type Description

STFW BOOLEAN Start in forward direction
STRV BOOLEAN Start in reverse direction
STDIRCND INTEGER Binary coded directional information per measuring loop

8.3.5 Settings SEMOD173077-1 v3

Settings for ZMCPDIS are valid for zone 1, while settings for ZMCAPDIS are valid
for zone 2 - 5

Transformer protection RET670 263

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

PID-3639-SETTINGS v6

Table 149: ZMCPDIS Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OperationDir Non-directional - - Forward Operation mode of directionality NonDir /
Forward Forw / Rev
Reverse
OperationPP Off - - On Operation mode Off / On of Phase-
On Phase loops
X1FwPP 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
Ph, forward
R1PP 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for characteristic
angle, Ph-Ph
RFFwPP 0.10 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, forward
X1RvPP 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
Ph, reverse
RFRvPP 0.10 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, reverse
OpModetPP Off - - On Operation mode Off / On of Zone timer,
On Ph-Ph
tPP 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-Ph
OperationPE Off - - On Operation mode Off / On of Phase-Earth
On loops
X1FwPE 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
E, forward
R1PE 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for characteristic
angle, Ph-E
X0PE 0.10 - 9000.00 Ohm/p 0.01 100.00 Zero sequence reactance reach, Ph-E
R0PE 0.01 - 3000.00 Ohm/p 0.01 47.00 Zero seq. resistance for zone
characteristic angle, Ph-E
RFFwPE 0.10 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, forward
X1RvPE 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
E, reverse
RFRvPE 0.10 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, reverse
OpModetPE Off - - On Operation mode Off / On of Zone timer,
On Ph-E
tPE 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-E
IMinOpPP 10 - 1000 %IB 1 20 Minimum operate delta current for
Phase-Phase loops
IMinOpPE 10 - 1000 %IB 1 20 Minimum operate phase current for
Phase-Earth loops
IMinOpIN 5 - 1000 %IB 1 5 Minimum operate residual current for
Phase-Earth loops

Table 150: ZMCPDIS Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

264 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

PID-3637-SETTINGS v6

Table 151: ZMCAPDIS Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OperationDir Non-directional - - Forward Operation mode of directionality NonDir /
Forward Forw / Rev
Reverse
OperationPP Off - - On Operation mode Off / On of Phase-
On Phase loops
X1FwPP 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
Ph, forward
R1PP 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for characteristic
angle, Ph-Ph
RFFwPP 0.10 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, forward
X1RvPP 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
Ph, reverse
RFRvPP 0.10 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, reverse
OpModetPP Off - - On Operation mode Off / On of Zone timer,
On Ph-Ph
tPP 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-Ph
OperationPE Off - - On Operation mode Off / On of Phase-Earth
On loops
X1FwPE 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
E, forward
R1PE 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for characteristic
angle, Ph-E
X0PE 0.10 - 9000.00 Ohm/p 0.01 100.00 Zero sequence reactance reach, Ph-E
R0PE 0.01 - 3000.00 Ohm/p 0.01 47.00 Zero seq. resistance for zone
characteristic angle, Ph-E
RFFwPE 0.10 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, forward
X1RvPE 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
E, reverse
RFRvPE 0.10 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, reverse
OpModetPE Off - - On Operation mode Off / On of Zone timer,
On Ph-E
tPE 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-E
IMinOpPP 10 - 1000 %IB 1 20 Minimum operate delta current for
Phase-Phase loops
IMinOpPE 10 - 1000 %IB 1 20 Minimum operate phase current for
Phase-Earth loops

Table 152: ZMCAPDIS Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Transformer protection RET670 265

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

PID-3547-SETTINGS v6

Table 153: ZDSRDIR Group settings (basic)

Name Values (Range) Unit Step Default Description

OperationSC NoSeriesComp - - SeriesComp Special directional criteria for voltage
SeriesComp reversal
IMinOpPE 5 - 30 %IB 1 5 Minimum operate phase current for
Phase-Earth loops
IMinOpPP 5 - 30 %IB 1 10 Minimum operate phase-phase current
for Phase-Phase loops
ArgNegRes 90 - 175 Deg 1 130 Angle of blinder in second quadrant for
forward direction
ArgDir 5 - 45 Deg 1 15 Angle of blinder in fourth quadrant for
forward direction
INReleasePE 10 - 100 %IPh 1 20 3I0 limit for releasing phase-to-earth
measuring loops
INBlockPP 10 - 100 %IPh 1 40 3I0 limit for blocking phase-to-phase
measuring loops
OperationLdCh Off - - On Operation of load discrimination
On characteristic
RLdFw 1.00 - 3000.00 Ohm/p 0.01 80.00 Forward resistive reach within the load
impedance area
RLdRv 1.00 - 3000.00 Ohm/p 0.01 80.00 Reverse resistive reach within the load
impedance area
ArgLd 5 - 70 Deg 1 30 Load angle determining the load
impedance area
X1FwPP 0.50 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
Ph, forward
R1PP 0.10 - 1000.00 Ohm/p 0.01 7.00 Positive seq. resistance for characteristic
angle, Ph-Ph
RFFwPP 0.50 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, forward
X1RvPP 0.50 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
Ph, reverse
RFRvPP 0.50 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, reverse
X1FwPE 0.50 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
E, forward
R1PE 0.10 - 1000.00 Ohm/p 0.01 7.00 Positive seq. resistance for characteristic
angle, Ph-E
X0FwPE 0.50 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-E,
forward
R0PE 0.50 - 3000.00 Ohm/p 0.01 20.00 Zero seq. resistance for zone
characteristic angle, Ph-E
RFFwPE 1.00 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, forward
X1RvPE 0.50 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
E, reverse
X0RvPE 0.50 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-E,
reverse
RFRvPE 1.00 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, reverse

Table 154: ZDSRDIR Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

266 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.3.6 Monitored data

PID-3547-MONITOREDDATA v6

Table 155: ZDSRDIR Monitored data

Name Type Values (Range) Unit Description

L1Dir INTEGER 1=Forward - Direction in phase L1
2=Reverse
0=No direction
L2Dir INTEGER 1=Forward - Direction in phase L2
2=Reverse
0=No direction
L3Dir INTEGER 1=Forward - Direction in phase L3
2=Reverse
0=No direction
L1R REAL - Ohm Resistance in phase L1
L1X REAL - Ohm Reactance in phase L1
L2R REAL - Ohm Resistance in phase L2
L2X REAL - Ohm Reactance in phase L2
L3R REAL - Ohm Resistance in phase L3
L3X REAL - Ohm Reactance in phase L3

8.3.7 Operation principle

8.3.7.1 Full scheme measurement SEMOD168177-4 v2

The execution of the different fault loops within the IED are of full scheme type, which means that
earth fault loop for phase-to-earth faults and phase-to-phase faults for forward and reverse faults are
executed in parallel.

Figure 116 presents an outline of the different measuring loops for the basic five, impedance-
measuring zones.

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 1

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 2

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 3

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 4

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 5

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone RV

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone BU

IEC05000458‐3‐en.vsdx

IEC05000458 V3 EN-US

Figure 116: The different measuring loops at phase-to-earth fault and phase-to-phase fault
The use of full scheme technique gives faster operation time compared to switched schemes which
mostly uses a start element to select correct voltages and current depending on fault type. Each

Transformer protection RET670 267

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

distance protection zone performs like one independent distance protection IED with six measuring
elements.

8.3.7.2 Impedance characteristic SEMOD168177-11 v5

Distance measuring zone, quadrilateral characteristic for series compensated lines (ZMCPDIS)
include six impedance measuring loops; three intended for phase-to-earth faults, and three intended
for phase-to-phase as well as, three-phase faults.

The distance measuring zone operates according to the non-directional impedance characteristics
presented in figure 117 and figure 118. The phase-to-earth characteristic is illustrated with the full
loop reach while the phase-to-phase characteristic presents the per-phase reach.

X (Ohm/loop)

R1PE+RNFw
X 0 PE - X 1FwPE
RFRvPE RFFwPE XNFw =
3
X 0 PG
X 0 PE = - X 1RVPG
1RVPE ×
- XXNFw
X 1RvPE
XNRV XNRv
XNRV ==
33 X 1FwPE
XX0 PE - X-1X
0 PG FWPE
1FWPG
XNFW==
XNFW
X1FwPE+XNFw 3 3 R0 PE - R1PE
RNFw =
jN jN 3
R (Ohm/loop)

RFRvPE RFFwPE

X1RvPE+XNRv

jN

RFRvPE RFFwPE
IEC09000625-1-en.vsd
IEC09000625 V1 EN-US

Figure 117: Characteristic for the phase-to-earth measuring loops, ohm/loop domain

268 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

X (Ohm/phase)

RFRvPP R1PP RFFwPP

2 2
X 0 PE - X 1RVPE
XNRV =XX00PEPG- -
X31XRVPE
1RVPG
XNRV =
XNRV =
3 3
XX
X00
PE
0 PE
-X
PG --1X 11FWPE
XFWPE
FWPG
XNFW =
XNFW==
XNFW
X1FwPP 3
3 3

j j
jN R (Ohm/phase)

RFRvPP RFFwPP
2 2

X1RvPP

jN

RFRvPP RFFwPP
2 2
IEC09000632-1-en.vsd
IEC09000632 V1 EN-US

Figure 118: Characteristic for the phase-to-phase measuring loops

The fault loop reach with respect to each fault type may also be presented as in figure 119. Note in
particular the difference in definition regarding the (fault) resistive reach for phase-to-phase faults
and three-phase faults.

Transformer protection RET670 269

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

IL1 R1 + j X1
Phase-to-earth
UL1
element

Phase-to-earth
fault in phase L1 RFPE
(Arc + tower
resistance)

0
IN (R0-R1)/3 +
j (X0-X1)/3 )

IL1 R1 + j X1 Phase-to-phase
UL1 element L1-L2
Phase-to-phase
fault in phase RFPP
L1-L2 IL2
UL2 (Arc resistance)
R1 + j X1

IL1 R1 + j X1 0.5·RFPP Phase-to-phase

UL1 element L1-L3
Three-phase
fault
IL3
UL3
R1 + j X1 0.5·RFPP
IEC08000282-2-en.vsd
IEC08000282 V2 EN-US

Figure 119: Fault loop model

The R1 and jX1 in figure 119 represents the positive sequence impedance from the measuring point
to the fault location. The RFPE and RFPP is the eventual fault resistance in the fault place.

Regarding the illustration of three-phase fault in figure 119, there is of course fault current flowing
also in the third phase during a three-phase fault. The illustration merely reflects the loop
measurement, which is made phase-to-phase.

The zone may be set to operate in Non-directional, Forward or Reverse direction through the setting
OperationDir. The result from respective set value is illustrated in figure 120. It may be convenient to
once again mention that the impedance reach is symmetric, forward and reverse direction.
Therefore, all reach settings apply to both directions.

270 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

X X X

R R R

Non-directional Forward Reverse

IEC05000182-2-en.vsdx

IEC05000182 V2 EN-US

Figure 120: Directional operating modes of the distance measuring zone

8.3.7.3 Minimum operating current SEMOD168177-36 v2

The operation of Distance measuring zone, quadrilateral characteristic for series compensated lines
(ZMCPDIS,ZMCAPDIS) is blocked if the magnitude of input currents fall below certain threshold
values.

The phase-to-earth loop Ln is blocked if ILn < IMinOpPE.

For zone 1 with load compensation feature the additional criterion applies, that all phase-to-earth
loops will be blocked when IN < IMinOpIN, regardless of the phase currents.

ILn is the RMS value of the current in phase Ln. IN is the RMS value of the vector sum of the three
phase currents, that is, residual current 3I0.

The phase-to-phase loop LmLn is blocked if ILmLnAB (BC or CA)< IMinOpPP.

ILmLn is the RMS value of the vector difference between phase currents Lm and Ln.

All three current limits IMinOpPE, IMinOpIN and IMinOpPP are automatically
reduced to 75% of regular set values if the zone is set to operate in reverse
direction, that is, OperationDir=Reverse.

8.3.7.4 Measuring principles SEMOD168177-46 v3

Fault loop equations use the complex values of voltage, current, and changes in the current.
Apparent impedances are calculated and compared with the set limits. The calculation of the
apparent impedances at ph-ph faults follows equation 55 (example for a phase L1 to phase L2 fault).

UL1 – UL2
Zapp = -------------------------
I L1 – IL2
EQUATION1222 V1 EN-US (Equation 55)

Here U and I represent the corresponding voltage and current phasors in the respective phase.

Transformer protection RET670 271

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

The earth return compensation applies in a conventional manner to ph-E faults (example for a phase
L1 to earth fault) according to equation 56.

U L1
Z app =
I L1 + I N × KN
EQUATION1223 V2 EN-US (Equation 56)

Where:
UL1, IL1 and IN are the phase voltage, phase current and residual current present to the IED
KN is defined as:

Z 0 - Z1
KN =
3 × Z1
EQUATION-2105 V2 EN-US

Z 0 = R 0 + jX 0
EQUATION2106 V2 EN-US

Z 1 = R1 + jX 1
EQUATION2107 V2 EN-US

Where
R0 is setting of the resistive zero sequence reach
X0 is setting of the reactive zero sequence reach
R1 is setting of the resistive positive sequence reach
X1 is setting of the reactive positive sequence reach

Here IN is a phasor of the residual current at the IED point. This results in the same reach along the
line for all types of faults.

The apparent impedance is considered as an impedance loop with resistance R and reactance X.

The formula given in equation 56 is only valid for no loaded radial feeder applications. When load is
considered in the case of single phase-to-earth fault, conventional distance protection might
overreach at exporting end and underreach at importing end. IED has an adaptive load
compensation which increases the security in such applications.

Measuring elements receive current and voltage information from the A/D converter. The check sums
are calculated and compared, and the information is distributed into memory locations. For each of
the six supervised fault loops, sampled values of voltage (U), current (I), and changes in current
between samples (DI) are brought from the input memory and fed to a recursive Fourier filter.

The filter provides two orthogonal values for each input. These values are related to the loop
impedance according to equation 57,

X Di
U = R × i + ------ × -----
w 0 Dt
EQUATION1224 V1 EN-US (Equation 57)

in complex notation, or:

272 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

X D Re ( I )
Re ( U ) = R × Re ( I ) + ------ × ------------------
w0 Dt

EQUATION354 V1 EN-US (Equation 58)

X DIm ( I )
Im ( U ) = R × Im ( I ) + ------ × -----------------
w0 Dt

EQUATION355 V1 EN-US (Equation 59)

with

w0 = 2 × p × f 0
EQUATION356 V1 EN-US (Equation 60)

where:
Re designates the real component of current and voltage,
Im designates the imaginary component of current and voltage and
f0 designates the rated system frequency

The algorithm calculates Rm measured resistance from the equation for the real value of the voltage
and substitute it in the equation for the imaginary part. The equation for the Xm measured reactance
can then be solved. The final result is equal to:

Im ( U ) × DRe ( I ) – Re ( U ) × D Im ( I )
R m = ------------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – D Im ( I ) × Re ( I )
EQUATION357 V1 EN-US (Equation 61)

Re ( U ) × Im ( I ) – Im ( U ) × Re ( I )
Xm = w 0 × Dt × -------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – DIm ( I ) × Re ( I )
EQUATION358 V1 EN-US (Equation 62)

The calculated Rm and Xm values are updated each sample and compared with the set zone reach.
The adaptive tripping counter counts the number of permissive tripping results. This effectively
removes any influence of errors introduced by the capacitive voltage transformers or by other factors.

The directional evaluations are performed simultaneously in both forward and reverse directions, and
in all six fault loops. Positive sequence voltage and a phase locked positive sequence memory
voltage are used as a reference. This ensures unlimited directional sensitivity for faults close to the
IED point.

8.3.7.5 Directionality for series compensation SEMOD168177-97 v4

In the basic distance protection function, the control of the memory for polarizing voltage is
performed by an undervoltage control. In case of series compensated line, a voltage reversal can
occur with a relatively high voltage also when the memory must be locked. Thus, a simple
undervoltage type of voltage memory control can not be used in case of voltage reversal. In the
option for series compensated network the polarizing quantity and memory are controlled by an
impedance measurement criterion.

The polarizing voltage is a memorized positive sequence voltage. The memory is continuously
synchronized via a positive sequence filter. The memory is starting to run freely instantaneously

Transformer protection RET670 273

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

when a voltage change is detected in any phase. A non-directional impedance measurement is used
to detect a fault and identify the faulty phase or phases.

At a three phase fault when no positive sequence voltage remains (all three phases are
disconnected) the memory is used for direction polarization during 100 ms.

The memory predicts the phase of the positive sequence voltage with the pre-fault frequency. This
extrapolation is made with a high accuracy and it is not the accuracy of the memory that limits the
time the memory can be used. The network is at a three phase fault under way to a new equilibrium
and the post-fault condition can only be predicted accurately for a limited time from the pre-fault
condition.

In case of a three phase fault after 100 ms the phase of the memorized voltage can not be relied
upon and the directional measurement has to be blocked. The achieved direction criteria are sealed-
in when the directional measurement is blocked and kept until the impedance fault criteria is reset
(the direction is stored until the fault is cleared).

This memory control allows in the time domain unlimited correct directional measurement for all
unsymmetrical faults also at voltage reversal. Only at three phase fault within the range of the set
impedance reach of the criteria for control of the polarization voltage the memory has to be used and
the measurement is limited to 100 ms and thereafter the direction is sealed-in. The special
impedance measurement to control the polarization voltage is set separately and has only to cover
(with some margin) the impedance to fault that can cause the voltage reversal.

The evaluation of the directionality takes place in Directional impedance quadrilateral, including
series compensation (ZDSRDIR) function. Equation 63 and equation 64 are used to classify that the
fault is in forward direction for phase-to-earth fault and phase-to-phase fault.

U 1L1M
- ArgDir < arg < ArgNeg Re s
I L1
EQUATION2004 V2 EN-US (Equation 63)

For the L1-L2 element, the equation in forward direction is according to:

U 1L1L 2 M
- ArgDir < arg < ArgNeg Re s
I L1L 2
EQUATION2006 V2 EN-US (Equation 64)

where:
ArgDir is the setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15
degrees) and
ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default set to 115
degrees, see Figure 121.
U1 L1M is positive sequence memorized phase voltage in phase L1

IL1 is phase current in phase L1

U1 L1L2M is memorized voltage difference between phase L1 and L2 (L2 lagging L1)

IL1L2 is current difference between phase L1 and L2 (L2 lagging L1)

The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees respectively,
see Figure 121, and it should not be changed unless system studies have shown the necessity.

ZDSRDIR generates a binary coded signal on the output STDIR depending on the evaluation where
STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4.

274 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

ArgNegRes

ArgDir
R

en05000722.vsd
IEC05000722 V1 EN-US

Figure 121: Setting angles for discrimination of forward and reverse fault
The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees.

8.3.7.6 Simplified logic diagrams SEMOD168192-4 v2

Distance protection zones SEMOD168192-6 v5

The design of distance protection zones are presented for all measuring loops: phase-to-earth as
well as phase-to-phase.

Phase-to-earth related signals are designated by Ln, where n represents the corresponding phase
number (L1, L2, and L3). The phase-to-phase signals are designated by LnLm, where n and m
represent the corresponding phase numbers (L1L2, L2L3, and L3L1).

Fulfillment of two different measuring conditions is necessary to obtain the one logical signal for each
separate measuring loop:

• Zone measuring condition, which follows the operating equations described above.
• Group functional input signal (STCND), as presented in figure 122.

Two types of function block, ZMCPDIS and ZMCAPDIS, are used in the IED. ZMCPDIS is used for
zone 1 and ZMCAPDIS for zone 2 - 5.

The STCND input signal represents a connection of six different integer values from the phase
selection function within the IED, which are converted within the zone measuring function into
corresponding boolean expressions for each condition separately. It is connected to Phase selection
with load enchroachment, quadrilateral characteristic (FDPSPDIS) function output STCNDZ.

Transformer protection RET670 275

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

STZMPP
OR
STCND

AND STNDL1L2
L1L2

STNDL2L3
L2L3 AND

L3L1 AND STNDL3L1

AND STNDL1N
L1N

AND STNDL2N
L2N

STNDL3N
L3N AND

OR STPE

OR
VTSZ STND
OR AND
BLOCK
BLOCFUNC BLK

99000557-2.vsd
IEC99000557-TIFF V3 EN-US

Figure 122: Conditioning by a group functional input signal STCND

Composition of the phase starting signals for a case, when the zone operates in a non-directional
mode, is presented in figure 123.

IEC00000488-TIFF V1 EN-US

Figure 123: Composition of starting signals in non-directional operating mode

Results of the directional measurement enter the logic circuits, when the zone operates in directional
(forward or reverse) mode, as shown in figure 124.

276 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

STNDL1N
AND
DIRL1N
STZMPE.
OR
STNDL2N
DIRL2N AND

STNDL3N 15 ms
OR STL1
AND AND t
DIRL3N

STNDL1L2
DIRL1L2 AND 15 ms
OR STL2
AND t
STNDL2L3
DIRL2L3 AND
15 ms
OR STL3
STNDL3L1 AND t
DIRL3L1 AND

STZMPP
OR

BLK

15 ms
OR START
AND t

IEC09000888-2-en.vsd
IEC09000888 V2 EN-US

Figure 124: Composition of starting signals in directional operating mode

Tripping conditions for the distance protection zone one are symbolically presented in figure 125.

Timer tPP=On
STZMPP AND tPP
AND
t

BLOCFUNC
OR OR
tPE
t
AND
Timer tPE=On AND
STZMPE 15ms
BLKTR AND t
TRIP
BLK OR

STL1 AND TRL1

STL2 AND TRL2

STL3 AND TRL3

IEC09000887-3-en.vsdx

IEC09000887 V3 EN-US

Figure 125: Tripping logic for the distance protection zone one

Transformer protection RET670 277

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.3.8 Technical data SEMOD173234-1 v1

SEMOD173239-2 v10

Table 156: ZMCPDIS, ZMCAPDIS Technical data

Function Range or value Accuracy

Number of zones Max 5 with selectable direction -
Minimum operate residual (5-1000)% of IBase -
current, zone 1
Minimum operate current, Ph-Ph (10-1000)% of IBase -
and Ph-E
Positive sequence reactance (0.10-3000.00) Ω/phase ±2.0% static accuracy
±2.0 degrees static angular accuracy
Positive sequence resistance (0.10-1000.00) Ω/phase Conditions:
Zero sequence reactance (0.01-9000.00) Ω/phase Voltage range: (0.1-1.1) x Ur
Current range: (0.5-30) x Ir
Zero sequence resistance (0.01-3000.00) Ω/phase Angle: at 0 degrees and 85 degrees
Fault resistance, Ph-E (0.10-9000.00) Ω/loop
Fault resistance, Ph-Ph (0.10-3000.00) Ω/loop
Dynamic overreach <5% at 85 degrees measured -
with CCVT’s and 0.5<SIR<30
Definite time delay Ph-Ph and (0.000-60.000) s ±0.2% or ± 35 ms whichever is greater
Ph-E operation
Operate time 25 ms typically IEC 60255-121
Reset ratio 105% typically -
Reset time at 0.1 x Zreach to 2 x Min. = 20 ms -
Zreach Max. = 50 ms

8.4 Full-scheme distance measuring, Mho characteristic

ZMHPDIS SEMOD154227-1 v4

8.4.1 Identification
SEMOD154447-2 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE

identification identification C37.2 device
number
Full-scheme distance protection, mho ZMHPDIS 21
characteristic

Z
S00346 V2 EN-US

8.4.2 Functionality SEMOD175459-4 v12

The numerical mho line distance protection is an up to five (depending on product variant) zone full
scheme protection of short circuit and earth faults.

The full scheme technique provides back-up protection of power lines with high sensitivity and low
requirement on remote end communication.

The zones have fully independent measuring and settings, which gives high flexibility for all types of
lines.

278 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Built-in selectable zone timer logic is also provided in the function.

The function can be used as under impedance back-up protection for transformers and generators.

8.4.3 Function block SEMOD154705-4 v4

ZMHPDIS
I3P* TRIP
U3P* TRL1
CURR_INP* TRL2
VOLT_INP* TRL3
POL_VOLT* TRPE
BLOCK TRPP
BLKZ START
BLKZMTD STL1
BLKHSIR STL2
BLKTRIP STL3
BLKPE STPE
BLKPP STPP
EXTNST STTIMER
INTRNST
DIRCND
STCND*
LDCND

IEC06000423-2-en.vsd
IEC06000423 V3 EN-US

Figure 126: ZMHPDIS function block

8.4.4 Signals SEMOD154579-1 v2

PID-3552-INPUTSIGNALS v7

Table 157: ZMHPDIS Input signals

Name Type Default Description

I3P GROUP - Connection for current sample signals
SIGNAL
U3P GROUP - Connection for voltage sample signals
SIGNAL
CURR_INP GROUP - Connection for current signals
SIGNAL
VOLT_INP GROUP - Connection for voltage signals
SIGNAL
POL_VOLT GROUP - Connection for polarizing voltage
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKZ BOOLEAN 0 Block due to fuse failure
BLKZMTD BOOLEAN 0 Block signal for blocking of time domaine function
BLKHSIR BOOLEAN 0 Blocks time domain function at high SIR
BLKTRIP BOOLEAN 0 Blocks all operate output signals
BLKPE BOOLEAN 0 Blocks phase-to-earth operation
BLKPP BOOLEAN 0 Blocks phase-to-phase operation
EXTNST BOOLEAN 0 External start
INTRNST BOOLEAN 0 Internal start
DIRCND INTEGER 0 External directional condition
STCND INTEGER 0 External start condition (loop enabler)
LDCND INTEGER 0 External load condition (loop enabler)

Transformer protection RET670 279

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

PID-3552-OUTPUTSIGNALS v7

Table 158: ZMHPDIS Output signals

Name Type Description

TRIP BOOLEAN Trip General
TRL1 BOOLEAN Trip phase L1
TRL2 BOOLEAN Trip phase L2
TRL3 BOOLEAN Trip phase L3
TRPE BOOLEAN Trip phase-to-earth
TRPP BOOLEAN Trip phase-to-phase
START BOOLEAN Start General
STL1 BOOLEAN Start phase L1
STL2 BOOLEAN Start phase L2
STL3 BOOLEAN Start phase L3
STPE BOOLEAN Start phase-to-earth
STPP BOOLEAN Start phase-to-phase
STTIMER BOOLEAN Start timer

8.4.5 Settings SEMOD154644-1 v2

PID-3552-SETTINGS v7

Table 159: ZMHPDIS Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off/On
On
DirMode Off - - Forward Direction mode
Offset
Forward
Reverse
LoadEncMode Off - - Off Load encroachment mode Off/On
On
ReachMode Overreach - - Overreach Reach mode Over/Underreach
Underreach
ZnTimerSel Timers seperated - - Timers seperated Zone timer selection
Timers linked
Internal start
Start from PhSel
External start
OpModePE Off - - On Operation mode Off / On of Phase-Earth
On loops
ZPE 0.005 - 3000.000 Ohm/p 0.001 30.000 Positive sequence impedance setting for
Phase-Earth loop
ZAngPE 10 - 90 Deg 1 85 Angle for positive sequence line
impedance for Phase-Earth loop
KN 0.00 - 3.00 - 0.01 0.80 Magnitude of earth return compensation
factor KN
KNAng -180 - 180 Deg 1 -15 Angle for earth return compensation
factor KN
ZRevPE 0.005 - 3000.000 Ohm/p 0.001 30.000 Reverse reach of the phase to earth
loop(magnitude)
Table continues on next page

280 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Name Values (Range) Unit Step Default Description

tPE 0.000 - 60.000 s 0.001 0.000 Delay time for operation of phase to
earth elements
IMinOpPE 10 - 30 %IB 1 20 Minimum operation phase to earth
current
OpModePP Off - - On Operation mode Off / On of Phase-
On Phase loops
ZPP 0.005 - 3000.000 Ohm/p 0.001 30.000 Impedance setting reach for phase to
phase elements
ZAngPP 10 - 90 Deg 1 85 Angle for positive sequence line
impedance for Phase-Phase elements
ZRevPP 0.005 - 3000.000 Ohm/p 0.001 30.000 Reverse reach of the phase to phase
loop(magnitude)
tPP 0.000 - 60.000 s 0.001 0.000 Delay time for operation of phase to
phase
IMinOpPP 10 - 30 %IB 1 20 Minimum operation phase to phase
current

Table 160: ZMHPDIS Group settings (advanced)

Name Values (Range) Unit Step Default Description

OffsetMhoDir Non-directional - - Non-directional Direction mode for offset mho
Forward
Reverse
OpModetPE Off - - On Operation mode Off / On of Zone timer,
On Ph-E
OpModetPP Off - - On Operation mode Off / On of Zone timer,
On Ph-ph

Table 161: ZMHPDIS Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

8.4.6 Operation principle SEMOD154230-1 v2

8.4.6.1 Full scheme measurement SEMOD154224-4 v3

The execution of the different fault loops within the IED are of full scheme type, which means that
each fault loop for phase-to-earth faults and phase-to-phase faults are executed in parallel for all
zones.

The use of full scheme technique gives faster operation time compared to switched schemes which
mostly uses a start element to select correct voltages and current depending on fault type. So each
distance protection zone performs like one independent distance protection function with six
measuring elements.

8.4.6.2 Impedance characteristic SEMOD154224-11 v7

The Mho distance function ZMHPDIS is present with four instances so that four separate zones could
be designed. Each instance can be selected to be either forward or reverse with positive sequence
polarized mho characteristic; alternatively self polarized offset mho characteristics is also available.
One example of the operating characteristic is shown in Figure 127 A) where zone 5 is selected
offset mho.

Transformer protection RET670 281

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

The directional mho characteristic of Figure 127 B) has a dynamic expansion due to the source
impedance. Instead of mho characteristic crossing origin, which is only valid where the source
impedance is zero, the crossing point is moved to the coordinates of the negative source impedance
giving an expansion of the circle of Figure 127 B).

A B
jx X

Mho, zone4

Mho, zone3 Zs=0

Mho, zone2 R

Mho, zone1

Zs=Z1

Zs=2Z1

R
Offset mho, zone5

IEC09000143-3-en.vsd

IEC09000143 V3 EN-US

Figure 127: Mho, offset mho characteristic and the source impedance influence on the mho characteristic
The polarization quantities used for the mho circle are 100% memorized positive sequence voltages.
This will give a somewhat less dynamic expansion of the mho circle during faults than a plain cross
polarized characteristic. However, if the source impedance is high, the dynamic expansion of the
mho circle might lower the security of the function too much with high loading and mild power swing
conditions.

The mho distance element has a load encroachment function which cuts off a section of the
characteristic when enabled. The function is enabled by setting the setting parameter
LoadEnchMode to On. Enabling of the load encroachment function increases the possibility to detect
high resistive faults without interfering with the load impedance. The algorithm for the load
encroachment is located in the Faulty phase identification with load encroachment for mho function
FMPSPDIS, where also the relevant settings can be found. Information about the load encroachment
from FMPSPDIS to the zone measurement is given in binary format to the input signal LDCND.

8.4.6.3 Basic operation characteristics SEMOD154224-21 v9

Each impedance zone can be switched On and Off by the setting parameter Operation.

Each zone can be set to Non-directional, Forward or Reverse by setting the parameter DirMode .

The operation for phase-to-earth and phase-to-phase fault can be individually switched On and Off
by the setting parameter OpModePE and OpModePP.

For critical applications such as for lines with high SIRs as well as CVTs, it is possible to improve the
security by setting the parameter ReachMode to Underreach. In this mode the reach for faults close
to the zone reach is reduced by 20% and the filtering is also introduced to increase the accuracy in
the measuring. If the ReachMode is set to Overreach no reduction of the reach is introduced and no

282 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

extra filtering introduced. The latter setting is recommended for overreaching pilot zone, zone 2 or
zone 3 elements and reverse zone where overreaching on transients is not a major issue either
because of less likelihood of overreach with higher settings or the fact that these elements do not
initiate tripping unconditionally.

The offset Mho characteristic can be set in Non-directional, Forward or Reverse by the setting
parameter OffsetMhoDir. When Forward or Reverse is selected a directional line is introduced.
Information about the directional line is given from the directional element and given to the measuring
element as binary coded signal to the input DIRCND.

The zone reach for phase-to-earth fault and phase-to-phase fault is set individually in polar
coordinates.

The impedance is set by the parameters ZPE and ZPP and the corresponding arguments by the
parameters ZAngPE and ZAngPP.

Compensation for earth -return path for faults involving earth is done by setting the parameter
KNMag and KNAng where KNMag is the magnitude of the earth-return path and KNAng is the
difference of angles between KNMag and ZPE .

Z0-Z1
KNMag =
3 × Z1
EQUATION1579 V1 EN-US (Equation 65)

KNAng = arg
( Z 0 - Z1

3 × Z1
)
EQUATION1580 V1 EN-US (Equation 66)

where
Z0 is the complex zero sequence impedance of the line in Ω/phase
Z1 is the complex positive sequence impedance of the line in Ω/phase

The phase-to-earth and phase-to-phase measuring loops can be time delayed individually by setting
the parameter tPE and tPP respectively. To release the time delay, the operation mode for the timers,
OpModetPE and OpModetPP, has to be set to On. This is also the case for instantaneous operation.

The operate timers triggering input depends on the parameter ZnTimerSel setting. The parameter
ZnTimerSel can be set to:

• Timers separated: Phase-to-earth and phase-to-phase timers are triggered by the respective
measuring loop start signals.
• Timers linked: Start of any of the phase-to-earth or phase-to-phase loops will trigger both the
phase-to-earth or phase-to-phase timers.
• Internal start: Phase-to-earth and phase-to-phase timers are triggered by the INTRNST input.
• Start from PhSel: The phase-to-earth and phase-to-phase timers are triggered by the STCND
and LDCND inputs. Each of the two inputs consist binary status information related to the six
measuring loops. Hence if any of the measuring loop status is high in both two inputs STCND
and LDCND, then the timers will be triggered. In case when LoadEnchMode is off then only
STCND enables the timer.

Transformer protection RET670 283

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

It is not recommended to use this timer setting for the Zone instance where
LoadEnchMode is off.
• External start: Phase-to-earth and phase-to-phase timers are triggered by the EXTNST input.

The function can be blocked in the following ways:

• activating of input BLOCK blocks the whole function

• activating of the input BLKZ (fuse failure) blocks all output signals
• activating of the input BLKZMTD blocks the delta based time domain algorithm
• activating of the input BLKHSIR blocks the instantaneous part of the algorithm for high SIR
values
• activating of the input BLKTRIP blocks all output signals
• activating the input BLKPE blocks the phase-to-earth fault loop outputs
• activating the input BLKPP blocks the phase-to-phase fault loop outputs

The activation of input signal BLKZ can be made by external fuse failure function or from the loss of
voltage check in the Mho supervision logic (ZSMGAPC). In both cases the output BLKZ in the Mho
supervision logic shall be connected to the input BLKZ in the Mho distance function block
(ZMHPDIS)

The input signal BLKZMTD is activated during some ms after fault has been detected by ZSMGAPC
to avoid unwanted operations due to transients. It shall be connected to the BLKZMTD output signal
of ZSMGAPC function.

At SIR values >10, the use of electronic CVT might cause overreach due to the built-in resonance
circuit in the CVT, which reduce the secondary voltage for a while. The input BLKHSIR is connected
to the output signal HSIR on ZSMGAPC for increasing of the filtering and high SIR values. This is
valid only when permissive underreach scheme is selected by setting ReachMode=Underreach.

8.4.6.4 Theory of operation SEMOD154224-46 v7

The mho algorithm is based on the phase comparison of an operating phasor and a polarizing
phasor. When the operating phasor leads the reference polarizing phasor by 90 degrees or more, the
function operates and gives a trip output.

Phase-to-phase fault SEMOD154224-240 v3

Mho SEMOD154224-217 v5
The plain Mho circle has the characteristic as in Figure 128. The condition for deriving the angle β is
according to equation 67.

EQUATION1789 V2 EN-US (Equation 67)

where

U L1L2 is the voltage vector difference between phases L1 and L2

EN-US
EQUATION1790 V2

I L1L2 is the current vector difference between phases L1 and L2

EQUATION1791 V2
EN-US

ZPP is the positive sequence impedance setting for phase-to-phase fault

U pol is the polarizing voltage

The polarized voltage consists of 100% memorized positive sequence voltage (UL1L2 for phase L1
to L2 fault). The memorized voltage will prevent collapse of the Mho circle for close in faults.

284 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Operation occurs if 90≤β≤270

IL1L2·X
Ucomp = UL1L2 - IL1L2 • ZPP

IL1L2 • ZPP
ß
Upol
UL1L2

IL1L2·R

en07000109.vsd
IEC07000109 V1 EN-US

Figure 128: Simplified mho characteristic and vector diagram for phase L1-to-L2 fault

Offset Mho SEMOD154224-242 v4

The characteristic for offset mho is a circle where two points on the circle are the setting parameters
ZPP and ZRevPP. The vector ZPP in the impedance plane has the settable angle AngZPP and the
angle for ZRevPP is AngZPP+180°.

The condition for operation at phase-to-phase fault is that the angle β between the two compensated
voltages Ucomp1 and Ucomp2 is greater than or equal to 90° (figure 129). The angle will be 90° for
fault location on the boundary of the circle.

The angle β for L1-to-L2 fault can be defined according to equation 68.

æ ö
U -IL1L2 × ZPP
b = arg ç ÷
è U-(-IL1L2 × ZRevPP) ø
EQUATION1792 V1 EN-US (Equation 68)

where

U is the UL1L2 voltage

EQUATION1800 V1 EN-US

ZRevPP is the positive sequence impedance setting for phase-to-phase fault in reverse direction

Transformer protection RET670 285

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

IL1L2jX

Ucomp1 = UL1L2 - IL1L2 • ZPP

IL1L2 • ZPP

U
Ucomp2 = U = IF•ZF=UL1L2
IL1L2R

- IL1L2 • Z RevPP
en07000110.vsd
IEC07000110 V1 EN-US

Figure 129: Simplified offset mho characteristic and voltage vectors for phase L1-to-L2 fault.
Operation occurs if 90≤β≤270.

Offset mho, forward direction SEMOD154224-249 v4

When forward direction has been selected for the offset mho, an extra criteria beside the one for
offset mho (90<β<270) is introduced, that is the angle φ between the voltage and the current must lie
between the blinders in second quadrant and fourth quadrant. See figure 130. Operation occurs if
90≤β≤270 and ArgDir≤φ≤ArgNegRes.

where
ArgDir is the setting parameter for directional line in fourth quadrant in the directional element,
ZDMRDIR.
ArgNegRes is the setting parameter for directional line in second quadrant in the directional element,
ZDMRDIR.
β is calculated according to equation

The directional information is brought to the mho distance measurement from the mho directional
element as binary coded information to the input DIRCND. See Directional impedance element for
mho characteristic (ZDMRDIR) for information about the mho directional element.

286 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

IL1L2jX

ZPP

UL1L2

ArgNegRes f

IL1L2
ArgDir

en07000111.vsd
IEC07000111 V1 EN-US

Figure 130: Simplified offset mho characteristic in forward direction for phase L1-to-L2 fault

Offset mho, reverse direction SEMOD154224-265 v4

The operation area for offset mho in reverse direction is according to figure 131. The operation area
in second quadrant is ArgNegRes+180°.

Operation occurs if 90≤β≤270 and 180° - ArgDir ≤φ ≤ ArgNegRes + 180°

The β is derived according to equation for the mho circle and φ is the angle between the voltage and
current.

Transformer protection RET670 287

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

ZPP

ArgNegRes
ϕ

IL1L2

ArgDir R

UL1L2

ZRevPP

en06000469.eps
IEC06000469 V1 EN-US

Figure 131: Operation characteristic for reverse phase L1-to-L2 fault

Phase-to-earth fault SEMOD154224-283 v2

Mho SEMOD154224-120 v5
The measuring of earth faults uses earth-return compensation applied in a conventional way. The
compensation voltage is derived by considering the influence from the earth-return path.

For an earth fault in phase L1, the compensation voltage Ucomp can be derived, as shown in Figure
132.

Ucomp = U pol - I L1 × Z loop

EQUATION1793 V1 EN-US (Equation 69)

where
U pol is the polarizing voltage (memorized UL1 for Phase L1-to- earth
fault)
Zloop is the loop impedance, which in general terms can be expressed as

(
Z1+ZN = Z 1 × 1 + KN )
where
Z1 is the positive sequence impedance of the line (Ohm/phase)

KN is the zero-sequence compensator factor

The angle β between the Ucomp and the polarize voltage Upol for a L1-to-earth fault is

288 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

(
β = arg U L1 − I L1 + 3I 0 ⋅ KN ⋅ ZPE  − arg (Upol )
  )
GUID-A9492CDF-D3B7-4DC5-8E06-6638BEE2540B V2 EN-US (Equation 70)

where
UL1 is the phase voltage in faulty phase L1

IL1 is the phase current in faulty phase L1

3I0 is the zero-sequence current in faulty phase L1

KN Z0-Z1
3 × Z1
the setting parameter for the zero sequence compensation
consisting of the magnitude KN and the angle KNAng.
Upol is the 100% of positive sequence memorized voltage UL1

IL1·X

IL1·ZN
Ucomp

IL1 • Zloop
IL1·ZPE
Upol

f
IL1 (Ref) IL1·R

en06000472_2.vsd
IEC06000472 V2 EN-US

Figure 132: Simplified offset mho characteristic and vector diagram for phase L1-to-earth fault
Operation occurs if 90≤β≤270.

Offset mho SEMOD154224-309 v5

The characteristic for offset mho at earth fault is a circle containing the two vectors from the origin
ZPE and ZRevPE where ZPE and ZrevPE are the setting reach for the positive sequence impedance
in forward respective reverse direction. The vector ZPE in the impedance plane has the settable
angle AngZPE and the angle for ZRevPP is AngZPE+180°.

The condition for operation at phase-to-earth fault is that the angle β between the two compensated
voltages Ucomp1 and Ucomp2 is greater or equal to 90° see figure 133. The angle will be 90° for
fault location on the boundary of the circle.

The angle β for L1-to-earth fault can be defined as

æ UL1- IL1L × ZPE ö

b = arg ç ÷
è UL1-(- IL1 × Z Re vPE ) ø
EQUATION1802 V1 EN-US (Equation 71)

Transformer protection RET670 289

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

is the phase L1 voltage

U L1
805 V1 EN-
EQUATION1
US

IL1L 2 • jX

U comp1 = UL1 - I L1• ZPE

IL1 • ZPE

UL1
U comp2 = UL1 - (-IL1 • ZRevPE)
IL1L2 • R

- I L1 • Z Re vPe

en 06000465.vsd
IEC06000465 V1 EN-US

Figure 133: Simplified offset mho characteristic and voltage vector for phase L1-to-earth fault
Operation occurs if 90≤β≤270.

Offset mho, forward direction SEMOD154224-327 v3

In the same way as for phase-to-phase fault, selection of forward direction of offset mho will
introduce an extra criterion for operation. Beside the basic criteria for offset mho according to
equation and 90≤β≤270, also the criteria that the angle φ between the voltage and the current must
lie between the blinders in second and fourth quadrant. See figure 134. Operation occurs if
90≤β≤270 and ArgDir≤φ≤ArgNegRes.

where
ArgDir is the setting parameter for directional line in fourth quadrant in the directional element,
ZDMRDIR.
ArgNegRes is the setting parameter for directional line in second quadrant in the directional element,
ZDMRDIR.
β is calculated according to equation

290 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

IL1 jX

UL1

ArgNegRes f

IL1 IL1·R

ArgDir

en 06000466.vsd
IEC06000466 V1 EN-US

Figure 134: Simplified characteristic for offset mho in forward direction for L1-to-earth fault

Offset mho, reverse direction SEMOD154224-341 v4

In the same way as for offset in forward direction, the selection of offset mho in reverse direction will
introduce an extra criterion for operation compare to the normal offset mho. The extra is that the
angle between the fault voltage and the fault current shall lie between the blinders in second and
fourth quadrant. The operation area in second quadrant is limited by the blinder defined as 180° -
ArgDir and in fourth quadrant ArgNegRes+180°, see figure 135.

The conditions for operation of offset mho in reverse direction for L1-to-earth fault is 90≤β≤270 and
180°-Argdir≤φ≤ArgNegRes+180°.

The β is derived according to equation for the offset mho circle and φ is the angle between the
voltage and current.

Transformer protection RET670 291

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

ZPE

ArgNegRes
ϕ

IL
1
ArgDir R

UL1
ZRevPE

en06000470.eps
IEC06000470 V1 EN-US

Figure 135: Simplified characteristic for offset mho in reverse direction for L1-to-earth fault

8.4.6.5 Simplified logic diagrams GUID-22B4A410-6F8E-4569-A354-51A1F4951F79 v3

Distance protection zones

The design of the distance protection zones are presented for all measuring loops: phase-to-earth as
well as phase-to-phase.

Phase-to-earth related signals are designated by L1N, L2N and L3N. The phase-to-phase signals are
designated by L1L2, L2L3, and L3L1.

Fulfillment of two different measuring conditions is necessary to obtain the one logical signal for each
separate measuring loop:

• Zone measuring condition, which follows the operating equations described above.
• Group functional input signal (STCND), as presented in figure 136.

The ZMHPDIS function block is used in the IED for each zone.

The STCND input signal represents a connection of six different integer values from Phase selection
with load encroachment function FMPSPDIS within the IED, which are converted within the zone
measuring function into corresponding boolean expressions for each condition separately. Input
signal STCND is connected from FMPSPDIS function output signal STCNDPHS.

The input signal DIRCND is used to give condition for directionality for the distance measuring zones.
The signal contains binary coded information for both forward and reverse direction. The zone
measurement function filters out the relevant signals depending on the setting of the parameter
DirMode. Input signal DIRCND must be configured to the STDIRCND output signal on ZDMRDIR
function.

292 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

OffsetMhoDir=
Non-directional
AND AND
DirMode=Offset

STCND T
AND F

AND
LoadEnchMode=
On/Off
LDCND
T
True F
AND Release

DIRCND

OffsetMhoDir=
Forward/Reverse
AND
DirMode=
Forward/Reverse

BLKZ
BLOCK OR

IEC11000216-1-en.vsd
IEC11000216 V1 EN-US

Figure 136: Simplified logic for release start signal

When load encroachment mode is switched on (LoadEnchMode=On), start signal STCND is also
checked against LDCND signal.

Results of the directional measurement enter the logic circuits when the zone operates in directional
(forward or reverse) mode, as shown in figure 136.

Composition of the phase start signals is presented in figure 137.

Transformer protection RET670 293

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Release STPE
OR

AND
STL1N STL1
OR

AND
STL2N

AND
STL3N
STL2
OR
AND
STL1L2

AND
STL2L3
STL3
OR
AND
STL3L1

START
OR

STPP
OR

IEC11000217-1-en.vsd
IEC11000217 V1 EN-US

Figure 137: Composition of starting signals

Tripping conditions for the distance protection zone one are symbolically presented in figure 138.

Timer tPP=On tPP

AND t
STPP
OR
Timer tPE=On tPE
AND t
STPE

15ms
AND TRIP
BLKTRIP t

STL1 AND TRL1

AND TRL2
STL2

STL3 AND TRL3

IEC11000218-1-en.vsd
IEC11000218 V1 EN-US

Figure 138: Tripping logic for the distance protection zone

Zone timer logic for the distance protection is symbolically presented in figure 139.

294 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

STPE

BLOCK
TRPE
&
tON
& ³1 t
a
Internal a=b
start b STTIMER
&

Internal
a
a<b
start b
tON
³1 t && TRPP
&

STPP
ZnTimerSel
FALSE 1 timers seperated

³1 2 timers linked
internalCommonStart
3 internal start
phSelStart 4 start from phSel
externalCommonStart
5 external start

IEC12000463-3-en.vsd
IEC12000463 V2 EN-US

Figure 139: Zone timer logic

8.4.7 Technical data SEMOD173244-1 v1

SEMOD173242-2 v14

Table 162: ZMHPDIS technical data

Function Range or value Accuracy

Number of zones, Ph-E Max 5 with selectable -
direction
Minimum operate current (10–30)% of IBase -
Positive sequence impedance, (0.005–3000.000) W/phase ±2.0% static accuracy
Ph-E loop Conditions:
Voltage range: (0.1-1.1) x Ur
Positive sequence impedance (10–90) degrees
Current range: (0.5-30) x Ir
angle, Ph-E loop
Angle: 85 degrees
Reverse reach, Ph-E loop (0.005–3000.000) Ω/phase
(Magnitude)
Magnitude of earth return (0.00–3.00)
compensation factor KN
Angle for earth compensation (-180–180) degrees
factor KN
Dynamic overreach <5% at 85 degrees measured -
with CVT’s and 0.5<SIR<30
Definite time delay Ph-Ph and (0.000-60.000) s ±0.2% or ±60 ms whichever is greater
Ph-E operation
Operate time 22 ms typically IEC 60255-121
Reset ratio 105% typically -
Reset time at 0.5 x Zreach to 1.5 Min. = 30 ms -
x Zreach Max. = 50 ms

Transformer protection RET670 295

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.5 Full-scheme distance protection, quadrilateral for earth

faults ZMMPDIS, ZMMAPDIS SEMOD154561-1 v2

8.5.1 Identification
SEMOD154542-2 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Fullscheme distance protection, ZMMPDIS 21
quadrilateral for earth faults (zone 1)
Z
S00346 V2 EN-US

Fullscheme distance protection, ZMMAPDIS 21

quadrilateral for earth faults (zone 2-5)
Z
S00346 V2 EN-US

8.5.2 Functionality SEMOD154544-4 v7

The line distance protection is an up to five (depending on product variant) zone full scheme
protection function with three fault loops for phase-to-earth fault for each of the independent zones.
Individual settings for each zone resistive and reactive reach give flexibility for use on overhead lines
and cables of different types and lengths.

The Full-scheme distance protection, quadrilateral for earth fault functions have functionality for load
encroachment, which increases the possibility to detect high resistive faults on heavily loaded lines ,
see Figure 140.

Forward
operation

Reverse
operation

en05000034.vsd
IEC05000034 V1 EN-US

Figure 140: Typical quadrilateral distance protection zone with Phase selection, quadrilateral
characteristic with settable angle function FRPSPDIS activated
The independent measurement of impedance for each fault loop together with a sensitive and
reliable built in phase selection makes the function suitable in applications with single phase auto-
reclosing.

Built-in adaptive load compensation algorithm prevents overreaching of zone1 at load exporting end
at phase to earth faults on heavily loaded power lines.

296 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

The distance protection zones can operate, independent of each other, in directional (forward or
reverse) or non-directional mode. This makes them suitable, together with different communication
schemes, for the protection of power lines and cables in complex network configurations, such as
parallel lines, multi-terminal lines.

8.5.3 Function block SEMOD155557-4 v2

ZMMPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
BLKZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND

IEC06000454-2-en.vsd
IEC06000454 V2 EN-US

Figure 141: ZMMPDIS function block

ZMMAPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
BLKZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND

IEC09000947-1-en.vsd
IEC09000947 V1 EN-US

Figure 142: ZMMAPDIS function block

8.5.4 Signals
PID-3645-INPUTSIGNALS v6

Table 163: ZMMPDIS Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKZ BOOLEAN 0 Blocks all output by fuse failure signal
BLKTR BOOLEAN 0 Blocks all trip outputs
STCND INTEGER 0 External start condition (loop enabler)
DIRCND INTEGER 0 External directional condition

PID-3645-OUTPUTSIGNALS v6

Table 164: ZMMPDIS Output signals

Name Type Description

TRIP BOOLEAN General Trip, issued from any phase or loop
TRL1 BOOLEAN Trip signal from phase L1
TRL2 BOOLEAN Trip signal from phase L2
Table continues on next page

Transformer protection RET670 297

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Type Description

TRL3 BOOLEAN Trip signal from phase L3
START BOOLEAN General Start, issued from any phase or loop
STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3
STND BOOLEAN Non-directional start, issued from any phase or loop

PID-3640-INPUTSIGNALS v6

Table 165: ZMMAPDIS Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKZ BOOLEAN 0 Blocks all output by fuse failure signal
BLKTR BOOLEAN 0 Blocks all trip outputs
STCND INTEGER 0 External start condition (loop enabler)
DIRCND INTEGER 0 External directional condition

PID-3640-OUTPUTSIGNALS v6

Table 166: ZMMAPDIS Output signals

Name Type Description

TRIP BOOLEAN General Trip, issued from any phase or loop
TRL1 BOOLEAN Trip signal from phase L1
TRL2 BOOLEAN Trip signal from phase L2
TRL3 BOOLEAN Trip signal from phase L3
START BOOLEAN General Start, issued from any phase or loop
STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3
STND BOOLEAN Non-directional start, issued from any phase or loop

8.5.5 Settings
PID-3645-SETTINGS v6

Table 167: ZMMPDIS Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OperationDir Non-directional - - Forward Operation mode of directionality NonDir /
Forward Forw / Rev
Reverse
X1 0.50 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach
R1 0.10 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for zone
characteristic angle
X0 0.50 - 9000.00 Ohm/p 0.01 100.00 Zero sequence reactance reach
Table continues on next page

298 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Name Values (Range) Unit Step Default Description

R0 0.50 - 3000.00 Ohm/p 0.01 15.00 Zero seq. resistance for zone
characteristic angle
RFPE 1.00 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach in ohm/loop, Ph-E
OpModetPE Off - - On Operation mode Off / On of Zone timer,
On Ph-E
tPE 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-E
IMinOpPE 10 - 30 %IB 1 20 Minimum operate phase current for
Phase-Earth loops
IMinOpIN 5 - 30 %IB 1 5 Minimum operate residual current for
Phase-Earth loops

Table 168: ZMMPDIS Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

PID-3640-SETTINGS v6

Table 169: ZMMAPDIS Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OperationDir Non-directional - - Forward Operation mode of directionality NonDir /
Forward Forw / Rev
Reverse
X1 0.50 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach
R1 0.10 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for zone
characteristic angle
X0 0.50 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach
R0 0.50 - 3000.00 Ohm/p 0.01 15.00 Zero seq. resistance for zone
characteristic angle
RFPE 1.00 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach in ohm/loop, Ph-E
OpModetPE Off - - On Operation mode Off / On of Zone timer,
On Ph-E
tPE 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-E
IMinOpPE 10 - 30 %IB 1 20 Minimum operate phase current for
Phase-Earth loops

Table 170: ZMMAPDIS Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

8.5.6 Operation principle

8.5.6.1 Full scheme measurement SEMOD154546-4 v2

The different fault loops within the IED are operating in parallel in the same principle as a full scheme
measurement.

Figure 143 presents an outline of the different measuring loops for the basic five, impedance-
measuring zones l.

Transformer protection RET670 299

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

L1-N L2-N L3-N Zone 1

L1-N L2-N L3-N Zone 2

L1-N L2-N L3-N Zone 3

L1-N L2-N L3-N Zone 4

L1-N L2-N L3-N Zone 5

en07000080.vsd
IEC07000080 V1 EN-US

Figure 143: The different measuring loops at line-earth fault and phase-phase fault.

8.5.6.2 Impedance characteristic SEMOD154546-11 v4

The distance measuring zone include three impedance measuring loops; one fault loop for each
phase.

The distance measuring zone will essentially operate according to the non-directional impedance
characteristics presented in Figure 144. The characteristic is illustrated with the full loop reach.

X (Ohm/loop)

R1PE+Rn

RFPE RFPE

X0PE-X1PE
Xn =
3
X1PE+Xn R0PE-R1PE
Rn =
3
jN jN
R (Ohm/loop)

RFPE RFPE

X1PE+Xn

RFPE RFPE
en08000280-2-en.vsd

R1PE+Rn
IEC08000280 V1 EN-US

Figure 144: Characteristic for the phase-to-earth measuring loops, ohm/loop domain.
The fault loop reach may also be presented as in Figure 145.

300 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

ILn R1 + j X1
Phase-to-earth
UL1
element

Phase-to-earth
fault in phase L1 RFPE
(Arc + tower
resistance)

0
IN (R0-R1)/3 +
j (X0-X1)/3 ) en06000412.vsd
IEC06000412 V1 EN-US

Figure 145: Fault loop model

The R1 and jX1 in Figure 145 represent the positive sequence impedance from the measuring point
to the fault location. The RFPE is presented in order to “convey” the fault resistance reach.

The zone may be set to operate in Non-directional, Forward, Off or Reverse direction through the
setting OperationDir. The result from respective set value is illustrated in Figure 146. The impedance
reach is symmetric, in the sense that it is conform for forward and reverse direction. Therefore, all
reach settings apply to both directions.

X X X

R R R

Non-directional Forward Reverse

IEC05000182-2-en.vsdx

IEC05000182 V2 EN-US

Figure 146: Directional operating modes of the distance measuring zone

8.5.6.3 Minimum operating current SEMOD154546-36 v2

The operation of the distance measuring zone is blocked if the magnitude of input currents fall below
certain threshold values.

The phase-to-earth loop Ln is blocked if ILn < IMinOpPE.

For zone 1 with load compensation feature the additional criterion applies, that all phase-to-earth
loops will be blocked when IN < IMinOpIN, regardless of the phase currents.

ILn is the RMS value of the current in phase Ln. IN is the RMS value of the vector sum of the three
phase currents, that is, residual current 3I0.

Transformer protection RET670 301

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Both current limits IMinOpPE and IMinOpIN are automatically reduced to 75% of
regular set values if the zone is set to operate in reverse direction, that is,
OperationDir=Reverse.

8.5.6.4 Measuring principles SEMOD154546-46 v3

Fault loop equations use the complex values of voltage, current, and changes in the current.
Apparent impedances are calculated and compared with the set limits.

Here U and I represent the corresponding voltage and current phasors in the respective phase Ln (n
= 1, 2, 3).

The calculation of the apparant impedances at phase-to-earth fault follow equation 72

The earth return compensation applies in a conventional manner.

U L1
Z app =
I L1 + I N × KN
EQUATION1223 V2 EN-US (Equation 72)

Where:
UL1, IL1 and IN are the phase voltage, phase current and residual current present to the IED
KN is defined as:

Z 0 - Z1
KN =
3 × Z1
EQUATION-2105 V2 EN-US

Z 0 = R 0 + jX 0
EQUATION2106 V2 EN-US

Z 1 = R1 + jX 1
EQUATION2107 V2 EN-US

Where
R0 is setting of the resistive zero sequence reach
X0 is setting of the reactive zero sequence reach
R1 is setting of the resistive positive sequence reach
X1 is setting of the reactive positive sequence reach

Here IN is a phasor of the residual current in IED point. This results in the same reach along the line
for all types of faults.

The apparent impedance is considered as an impedance loop with resistance R and reactance X.

The formula given in equation 72 is only valid for no loaded radial feeder applications. When load is
considered in the case of single phase-to-earth fault, conventional distance protection might
overreach at exporting end and underreach at importing end. IED has an adaptive load
compensation which increases the security in such applications.

Measuring elements receive current and voltage information from the A/D converter. The check sums
are calculated and compared, and the information is distributed into memory locations. For each of
the six supervised fault loops, sampled values of voltage (U), current (I), and changes in current
between samples (DI) are brought from the input memory and fed to a recursive Fourier filter.

302 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

The filter provides two orthogonal values for each input. These values are related to the loop
impedance according to equation 73,

X Di
U = R × i + ------ × -----
w 0 Dt
EQUATION1224 V1 EN-US (Equation 73)

in complex notation, or:

X D Re ( I )
Re ( U ) = R × Re ( I ) + ------ × ------------------
w0 Dt

EQUATION354 V1 EN-US (Equation 74)

X DIm ( I )
Im ( U ) = R × Im ( I ) + ------ × -----------------
w0 Dt

EQUATION355 V1 EN-US (Equation 75)

with

w0 = 2 × p × f 0
EQUATION356 V1 EN-US (Equation 76)

where:
Re designates the real component of current and voltage,
Im designates the imaginary component of current and voltage and
f0 designates the rated system frequency

The algorithm calculates Rm measured resistance from the equation for the real value of the voltage
and substitute it in the equation for the imaginary part. The equation for the Xm measured reactance
can then be solved. The final result is equal to:

Im ( U ) × DRe ( I ) – Re ( U ) × D Im ( I )
R m = ------------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – D Im ( I ) × Re ( I )
EQUATION357 V1 EN-US (Equation 77)

Re ( U ) × Im ( I ) – Im ( U ) × Re ( I )
Xm = w 0 × Dt × -------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – DIm ( I ) × Re ( I )
EQUATION358 V1 EN-US (Equation 78)

The calculated Rm and Xm values are updated each sample and compared with the set zone reach.
The adaptive tripping counter counts the number of permissive tripping results. This effectively
removes any influence of errors introduced by the capacitive voltage transformers or by other factors.

The directional evaluations are performed simultaneously in both forward and reverse directions, and
in all six fault loops. Positive sequence voltage and a phase locked positive sequence memory
voltage are used as a reference. This ensures unlimited directional sensitivity for faults close to the
IED point.

Transformer protection RET670 303

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.5.6.5 Directionality SEMOD154546-97 v3

The evaluation of the directionality takes place in the Directional impedance element for mho
characteristic ZDMRDIR function. Equation 79 is used to classify that the fault is in forward direction
for line-to-earth fault.

0.85 × U1L1 + 0.15 × U1L1M

- ArgDir < arg < ArgNeg Re s
I L1
EQUATION1617 V1 EN-US (Equation 79)

where:
ArgDir is the setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15
degrees) and
ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default set to 115
degrees, see figure 147.
U1 L1 is positive sequence phase voltage in phase L1

U1 L1M is positive sequence memorized phase voltage in phase L1

IL1 is phase current in phase L1

The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees respectively
(see figure 147) and it should not be changed unless system studies have shown the necessity.

ZDMRDIR gives a binary coded signal on the output STDIRCND depending on the evaluation where
STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4 etc.

ArgNegRes

ArgDir
R

en05000722.vsd
IEC05000722 V1 EN-US

Figure 147: Setting angles for discrimination of forward and reverse fault
The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees.

304 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

The polarizing voltage is available as long as the positive-sequence voltage exceeds 5% of the set
base voltage UBase. So the directional element can use it for all unsymmetrical faults including
close-in faults.

For close-in three-phase faults, the U1L1M memory voltage, based on the same positive sequence
voltage, ensures correct directional discrimination.

The memory voltage is used for 100 ms or until the positive sequence voltage is restored.

After 100 ms, the following occurs:

• If the current is still above the set value of the minimum operating current (between 10 and 30%
of the set IED rated current IBase), the condition seals in.
• If the fault has caused tripping, the trip endures.
• If the fault was detected in the reverse direction, the measuring element in the reverse
direction remains in operation.
• If the current decreases below the minimum operating value, the memory resets until the
positive sequence voltage exceeds 10% of its rated value.

8.5.6.6 Simplified logic diagrams SEMOD154548-4 v1

Distance protection zones SEMOD154548-6 v3

The design of distance protection zone 1 is presented for all measuring phase-to-earth loops.

Phase-to-earth related signals are designated by LnE, where n represents the corresponding phase
number (L1E, L2E, and L3E).

Fulfillment of two different measuring conditions is necessary to obtain the one logical signal for each
separate measuring loop:

• Zone measuring condition, which follows the operating equations described above.
• Group functional input signal (STCND), as presented in figure 148.

The STCND input signal represents a connection of six different integer values from the phase
selection function within the IED, which are converted within the zone measuring function into
corresponding boolean expressions for each condition separately. It is connected to the Phase
selection with load enchroachment, quadrilateral characteristic (FDPSPDIS) function output
STCNDZ.

The input signal DIRCND is used to give condition for directionality for the distance measuring zones.
The signal contains binary coded information for both forward and reverse direction. The zone
measurement function filter out the relevant signals on the DIRCND input depending on the setting of
the parameter OperationDir. It shall be configured to the DIRCND output on the Directional
impedance element for mho characteristic (ZDMRDIR) function.

Transformer protection RET670 305

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

STCND

AND STNDL1N
L1N

AND STNDL2N
L2N

STNDL3N
L3N AND

OR STNDPE

OR
BLKZ STND
OR AND
BLOCK
BLK

en06000408-2.vsd
IEC06000408 V2 EN-US

Figure 148: Conditioning by a group functional input signal STCND

Composition of the phase starting signals for a case, when the zone operates in a non-directional
mode, is presented in figure 149.

STNDL1N 15 ms
AND t STL1

STNDL2N 15 ms
AND t STL2

STNDL3N 15 ms
AND t STL3

15 ms
AND t START
OR

BLK

en06000409.vsd
IEC06000409 V1 EN-US

Figure 149: Composition of starting signals in non-directional operating mode

Results of the directional measurement enter the logic circuits, when the zone operates in directional
(forward or reverse) mode, see figure 150.

306 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

STNDL1N
DIRL1N AND
OR STZMPE.
&
STNDL2N
DIRL2N AND

STNDL3N 15 ms
STL1
& t
DIRL3N AND

15 ms
STL2
& t

15 ms
STL3
& t

BLK

15 ms
OR START
& t

en07000081.vsd
IEC07000081 V1 EN-US

Figure 150: Composition of starting signals in directional operating mode

Tripping conditions for the distance protection zone one are symbolically presented in figure 151.

Timer tPE=On tPE

AND t
STZMPE
15ms
BLKTR AND t
TRIP

STL1 AND TRL1

STL2 AND TRL2

STL3 AND TRL3

en07000082.vsd
IEC07000082 V1 EN-US

Figure 151: Tripping logic for the distance protection zone one

Transformer protection RET670 307

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.5.7 Technical data

SEMOD173249-2 v8

Table 171: ZMMPDIS technical data

Function Range or value Accuracy

Number of zones Max 5 with selectable direction -
Minimum operate current (10-30)% of IBase -
Positive sequence reactance (0.50-3000.00) W/phase ±2.0% static accuracy
±2.0 degrees static angular accuracy
Positive sequence resistance (0.10-1000.00) Ω/phase Conditions:
Zero sequence reactance (0.50-9000.00) Ω/phase Voltage range: (0.1-1.1) x Ur
Current range: (0.5-30) x Ir
Zero sequence resistance (0.50-3000.00) Ω/phase Angle: at 0 degrees and 85 degrees
Fault resistance, Ph-E (1.00-9000.00) W/loop
Dynamic overreach <5% at 85 degrees measured -
with CCVT’s and 0.5<SIR<30
Definite time delay Ph-Ph and (0.000-60.000) s ±0.2% or ±40 ms whichever is greater
Ph-E operation
Operate time 25 ms typically IEC 60255-121
Reset ratio 105% typically -
Reset time at 0.1 x Zreach to 2 x Min. = 20 ms -
Zreach Max. = 50 ms

8.6 Directional impedance element for mho characteristic

and additional distance protection directional function
for earth faults ZDMRDIR, ZDARDIR SEMOD154813-1 v3

8.6.1 Identification
SEMOD155886-2 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Directional impedance element for mho ZDMRDIR 21D
characteristic
Z
S00346 V2 EN-US

GUID-39299546-12A2-4D9D-86D0-A33F423944E4 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Additional distance protection ZDARDIR -
directional function for earth faults
Z
S00346 V2 EN-US

8.6.2 Functionality SEMOD154885-5 v9

The phase-to-earth impedance elements can be supervised by a phase unselective directional

function based on symmetrical components (option).

308 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.6.3 Function block SEMOD155551-4 v5

ZDMRDIR
I3P* DIR_CURR
U3P* DIR_VOLT
DIR_POL
STFW
STRV
STDIRCND

IEC06000422_2_en.vsd
IEC06000422 V2 EN-US

Figure 152: ZDMRDIR function block

SEMOD155560-4 v3

ZDARDIR
I3P* STFWPE
U3P* STRVPE
I3PPOL* DIREFCND
DIRCND

IEC06000425-2-en.vsd
IEC06000425 V2 EN-US

Figure 153: ZDARDIR function block

8.6.4 Signals
PID-3546-INPUTSIGNALS v7

Table 172: ZDMRDIR Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL

PID-3546-OUTPUTSIGNALS v7

Table 173: ZDMRDIR Output signals

Name Type Description

CURR GROUP SIGNAL Group signal for current signals to Mho function
VOLT GROUP SIGNAL Group signal for voltage signals to Mho function
POL GROUP SIGNAL Group signal for polarization voltage signals to Mho function
STFW BOOLEAN Start in forward direction
STRV BOOLEAN Start in reverse direction
STDIRCND INTEGER Binary coded directional information per measuring loop

PID-3564-INPUTSIGNALS v7

Table 174: ZDARDIR Input signals

Name Type Default Description

I3P GROUP - Current signals
SIGNAL
U3P GROUP - Voltage signals
SIGNAL
I3PPOL GROUP - Polarisation current signals
SIGNAL
DIRCND INTEGER 0 Binary coded directional signal

Transformer protection RET670 309

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

PID-3564-OUTPUTSIGNALS v7

Table 175: ZDARDIR Output signals

Name Type Description

STFWPE BOOLEAN Forward start signal from phase-to-ground directional element
STRVPE BOOLEAN Reverse start signal from phase-to-ground directional element
DIREFCND INTEGER Start direction Binary coded

8.6.5 Settings
PID-3546-SETTINGS v7

Table 176: ZDMRDIR Group settings (basic)

Name Values (Range) Unit Step Default Description

DirEvalType Impedance - - Comparator Directional evaluation mode Impedance /
Comparator Comparator
Imp/Comp
ArgNegRes 90 - 175 Deg 1 115 Angle of blinder in second quadrant for
forward direction
ArgDir 5 - 45 Deg 1 15 Angle of blinder in fourth quadrant for
forward direction
IMinOpPE 5 - 30 %IB 1 5 Minimum operate phase current for
Phase-Earth loops
IMinOpPP 5 - 30 %IB 1 10 Minimum operate phase-phase current
for Phase-Phase loops

Table 177: ZDMRDIR Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

PID-3564-SETTINGS v7

Table 178: ZDARDIR Group settings (basic)

Name Values (Range) Unit Step Default Description

PolMode -3U0 - - -3U0 Polarization quantity for opt dir function
-U2 for P-E faults
IPol
Dual
-3U0Comp
-U2comp
AngleRCA -90 - 90 Deg 1 75 Characteristic relay angle (= MTA or
base angle)
I> 5 - 200 %IB 1 5 Minimum operation current in % of IBase
UPol> 4 - 100 %UB 1 4 Minimum polarizing voltage in % of
UBase
IPol> 5 - 100 %IB 1 10 Minimum polarizing current in % of IBase

Table 179: ZDARDIR Group settings (advanced)

Name Values (Range) Unit Step Default Description

AngleOp 90 - 180 Deg 1 160 Operation sector angle
Kmag 0.50 - 3000.00 Ohm 0.01 40.00 Boost-factor in -U0comp and -U2comp
polarization

310 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Table 180: ZDARDIR Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

8.6.6 Monitored data

PID-3546-MONITOREDDATA v6

Table 181: ZDMRDIR Monitored data

Name Type Values (Range) Unit Description

L1Dir INTEGER 1=Forward - Direction in phase L1
2=Reverse
0=No direction
L2Dir INTEGER 1=Forward - Direction in phase L2
2=Reverse
0=No direction
L3Dir INTEGER 1=Forward - Direction in phase L3
2=Reverse
0=No direction
L1R REAL - Ohm Resistance in phase L1
L1X REAL - Ohm Reactance in phase L1
L2R REAL - Ohm Resistance in phase L2
L2X REAL - Ohm Reactance in phase L2
L3R REAL - Ohm Resistance in phase L3
L3X REAL - Ohm Reactance in phase L3

8.6.7 Operation principle

8.6.7.1 Directional impedance element for mho characteristic ZDMRDIR SEMOD154817-5 v7

The evaluation of the directionality takes place in Directional impedance element for mho
characteristic (ZDMRDIR). Equation 80 and equation 81 are used to classify that the fault is in the
forward direction for phase-to-earth fault and phase-to-phase fault respectively.

0.85 × U1L1 + 0.15 × U1L1M

- ArgDir < arg < ArgNeg Re s
I L1
EQUATION1617 V1 EN-US (Equation 80)

0.85 × U1L1L 2 + 0.15 × U1L1L 2M

- ArgDir < arg < ArgNeg Re s
I L1L 2
EQUATION1619 V1 EN-US (Equation 81)

Where:
ArgDir Setting for the lower boundary of the forward directional characteristic, by default set to
15 (= -15 degrees)
ArgNegRes Setting for the upper boundary of the forward directional characteristic, by default set to
115 degrees, see figure 154 for mho characteristics.
Table continues on next page

Transformer protection RET670 311

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

U1 L1 Positive sequence phase voltage in phase L1

U1 L1M Positive sequence memorized phase voltage in phase L1

IL1 Phase current in phase L1

U1 L1L2 Voltage difference between phase L1 and L2 (L2 lagging L1)

U1 L1L2M Memorized voltage difference between phase L1 and L2 (L2 lagging L1)

IL1L2 Current difference between phase L1 and L2 (L2 lagging L1)

The default settings for ArgDir and ArgNegRes are 15 (= -15) and 115 degrees respectively (see
figure 154) and they should not be changed unless system studies show the necessity.

If one sets DirEvalType to Comparator (which is recommended when using the mho characteristic)
then the directional lines are computed by means of a comparator-type calculation, meaning that the
directional lines are based on mho-circles (of infinite radius). The default setting value Impedance
otherwise means that the directional lines are implemented based on an impedance calculation
equivalent to the one used for the quadrilateral impedance characteristics.

When Directional impedance element for mho characteristic (ZDMRDIR) is used

together with Fullscheme distance protection, mho characteristic (ZMHPDIS) the
following settings for parameter DirEvalType is vital:

• alternative Comparator is strongly recommended

• alternative Imp/Comp should generally not be used
• alternative Impedance should not be used. This altenative is intended for use
together with Distance protection zone, quadrilateral characteristic (ZMQPDIS)

X
Zset reach point

ArgNegRes

-ArgDir R

-Zs
en06000416.vsd

IEC06000416 V1 EN-US

Figure 154: Setting angles for discrimination of forward fault

The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees.

The code built up for release of the measuring fault loops is as follows: STDIRCND = L1N*1 + L2N*2
+ L3N*4 + L1L2*8 + L2L3*16 + L3L1*32

Example: If only L1N start, the value is 1, if start in L1N and L3N are detected, the value is 1+4=5.

312 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

The polarizing voltage is available as long as the positive-sequence voltage exceeds 5% of the set
base voltage UBase, thus the directional element can use it for all unsymmetrical faults including
close-in faults.

For close-in three-phase faults, the U1L1M memory voltage, based on the same positive sequence
voltage, ensures correct directional discrimination.

The memory voltage is used for 100ms or until the positive sequence voltage is restored. After
100ms, the following occurs:

• If the current is still above the set value of the minimum operating current the condition seals in.
• If the fault has caused tripping, the trip continues.
• If the fault was detected in the reverse direction, the measuring element in the reverse
direction remains in operation.
• If the current decreases below the minimum operate value, no directional indications will be
given until the positive sequence voltage exceeds 10% of its rated value.

The Directional impedance element for mho characteristic (ZDMRDIR) function has the following
output signals:

The STDIRCND output provides an integer signal that depends on the evaluation and is derived from
a binary coded signal as follows:

bit 11 bit 10 bit 9 bit 8 bit 7 bit 6

(2048) (1024) (512) (256) (128) (64)
STRVL3L1= STRVL2L3= STRVL1L2= STRVL3N=1 STRVL2N=1 STRVL1N=1
1 1 1
bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
(32) (16) (8) (4) (2) (1)
STFWL3L1= STFWL2L3= STFWL1L2= STFWL3N=1 STFWL2N=1 STFWL1N=1
1 1 1

The STFW output is a logical signal with value 1 or 0. It is made up as an OR-function of all the
forward starting conditions, that is, STFWL1N, STFWL2N, STFWL3N, STFWL1L2, STFWL2L3 and
STFWL3L1. The STRV output is similar to the STFW output, the only difference being that it is made
up as an OR-function of all the reverse starting conditions, that is, STRVL1N, STRVL2N, STRVL3N,
STRVL1L2, STRVL2L3 and STRVL3L1.

8.6.7.2 Additional distance protection directional function for earth faults

ZDARDIR SEMOD154933-95 v5

A Mho element needs a polarizing voltage to operate. The positive-sequence memory-polarized

elements are generally preferred. The benefits include:

• The greatest amount of expansion for improved resistive coverage. These elements always
expand back to the source.
• Memory action for all fault types. This is very important for close-in three-phase faults.
• A common polarizing reference for all six distance-measuring loops. This is important for single-
pole tripping, during a pole-open period.

There are however some situations that can cause security problems like reverse phase to phase
faults and double phase-to-earth faults during high load periods. To solve these, additional directional
element is used.

For phase-to-earth faults, directional elements using sequence components are very reliable for
directional discrimination. The directional element can be based on one of following types of
polarization:

Transformer protection RET670 313

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

• Zero-sequence voltage
• Negative-sequence voltage
• Zero-sequence current

These additional directional criteria are evaluated in the Additional distance protection directional
function for earth faults (ZDARDIR).

Zero-sequence voltage polarization is utilizing the phase relation between the zero-sequence voltage
and the zero-sequence current at the location of the protection. The measurement principle is
illustrated in figure 155.

- 3U 0

AngleOp
AngleRCA

3I 0

en06000417.vsd
IEC06000417 V1 EN-US

Figure 155: Principle for zero-sequence voltage polarized additional directional element
Negative-sequence voltage polarization is utilizing the phase relation between the negative-
sequence voltage and the negative-sequence current at the location of the protection.

Zero-sequence current polarization is utilizing the phase relation between the zero-sequence current
at the location of the protection and some reference zero-sequence current, for example, the current
in the neutral of a power transformer.

The principle of zero-sequence voltage polarization with zero-sequence current compensation is

described in figure 156. The same also applies for the negative-sequence function.

Z0 SA I0 I0
Z0 Line Z0 SB
Charac te ris tic
ang le
U0 U0
K*I0

U0 + K*I0
IF
en06000418.vsd
IEC06000418 V1 EN-US

Figure 156: Principle for zero sequence compensation

Note that the sequence based additional directional element cannot give per phase information about
direction to fault. This is why it is an AND-function with the normal directional element that works on a
per phase base. The enable signals are per phase and to enable the measuring element in a specific
phase, both the additional directional element and the normal directional element, for that phase
must indicate correct direction.

314 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

These polarization quantities, voltage and current, are stabilized against minimum polarizing voltage
(UPOL>) and current (IPOL>). That means if polarizing voltage is greater than UPOL> setting, and if
polarizing current is greater than IPol>, then only they are used for direction determination.

Normal
directional Release of distance
element measuring element
L1N, L2N, L3N L1N, L2N, L3N
AND

Additional
directional AND per
element phase

en06000419.vsd
IEC06000419 V1 EN-US

Figure 157: Earth distance element directional supervision

8.7 Mho impedance supervision logic ZSMGAPC SEMOD153841-1 v3

8.7.1 Identification
GUID-030C086A-8301-481E-BA0A-6550A9C1482E v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Mho Impedance supervision logic ZSMGAPC - -

8.7.2 Functionality SEMOD153843-5 v3

The Mho impedance supervision logic (ZSMGAPC) includes features for fault inception detection and
high SIR detection. It also includes the functionality for loss of potential logic as well as for the pilot
channel blocking scheme.

ZSMGAPC can mainly be decomposed in two different parts:

1. A fault inception detection logic

2. High SIR detection logic

8.7.3 Function block SEMOD155607-4 v4

ZSMGAPC
I3P* BLKZMTD
U3P* BLKCHST
BLOCK CHSTOP
REVSTART HSIR
BLOCKCS
CBOPEN

IEC06000426-2-en.vsd
IEC06000426 V2 EN-US

Figure 158: ZSMGAPC function block

Transformer protection RET670 315

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.7.4 Signals
PID-6718-INPUTSIGNALS v1

Table 182: ZSMGAPC Input signals

Name Type Default Description

I3P GROUP - Three phase current samples and DFT magnitude
SIGNAL
U3P GROUP - Three phase phase-neutral voltage samples and DFT magnitude
SIGNAL
BLOCK BOOLEAN 0 Block of the function
REVSTART BOOLEAN 0 Indication of reverse start
BLOCKCS BOOLEAN 0 Blocks the blocking carrier signal to remote end
CBOPEN BOOLEAN 0 Indicates that the breaker is open

PID-6718-OUTPUTSIGNALS v1

Table 183: ZSMGAPC Output signals

Name Type Description

BLKZMTD BOOLEAN Block signal for blocking of time domained mho
BLKCHST BOOLEAN Blocking signal to remote end to block overreaching zone
CHSTOP BOOLEAN Stops the blocking signal to remote end
HSIR BOOLEAN Indication of source impedance ratio above set limit

8.7.5 Settings
PID-6718-SETTINGS v1

Table 184: ZSMGAPC Group settings (basic)

Name Values (Range) Unit Step Default Description

PilotMode Off - - Off Pilot mode Off/On
On
Zreach 0.1 - 3000.0 Ohm 0.1 38.0 Line impedance
IMinOp 10 - 30 %IB 1 20 Minimum operating current for SIR
measurement

Table 185: ZSMGAPC Group settings (advanced)

Name Values (Range) Unit Step Default Description

DeltaI 0 - 200 %IB 1 10 Current change level in % of IBase for
fault inception detection
Delta3I0 0 - 200 %IB 1 10 Zero seq current change level in % of
IBase
DeltaU 0 - 100 %UB 1 5 Voltage change level in % of UBase for
fault inception detection
Delta3U0 0 - 100 %UB 1 5 Zero seq voltage change level in % of
UBase
SIRLevel 5 - 15 - 1 10 Settable level for source impedance ratio

Table 186: ZSMGAPC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

316 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.7.6 Operation principle

8.7.6.1 Fault inception detection SEMOD153847-4 v5

The aim for the fault inception detector is to quickly detect that a fault has occurred in the system.
The fault detector detects a fault when there is a sufficient change in at least one current and at the
same time there is a sufficient change in at least one voltage. A change is defined roughly by the
difference between the present instantaneous value and the one from one power system cycle
before. The change is sufficient if it exceeds the related threshold value. DeltaI and DeltaU for phase
currents and voltages. Delta3I0 and Delta3U0 for residual current and voltage.

If the setting PilotMode is set to On in blocking scheme and the fault inception function has detected
a system fault, a block signal BLKCHST is issued and send to remote end in order to block the
overreaching zones. Different criteria has to be fulfilled for sending the BLKCHST signal:

1. The setting PilotMode has to be set to On

2. The breaker has to be closed, that is, the input signal CBOPEN should not be actived
3. A reverse fault should have been detected while the carrier send signal is not blocked, that is,
input signal REVSTART is activated and input signal BLOCKCS is not activated or a fault
inception is detected and input signal CSBLOCK is not activated.

If it is later detected that it was an internal fault that made the function issue the BLKCHST signal, the
function issues a CHSTOP signal to unblock the remote end. The criteria that have to be fulfilled for
this are:

1. The function has to be in pilot mode, that is, the setting PilotMode has to be set to On
2. The carrier send signal should be blocked, that is, input signal BLOCKCS is On and,
3. A reverse fault should not have been detected while the carrier send signal was not blocked,
that is, input REVSTART should not have been activated before BLOCKCS.

If loss of voltage is detected, but not a fault inception, the distance protection function is blocked.
This is also the case if a fuse failure is detected by the external fuse failure function and activate the
input FUSEFAIL. Those blocks are generated by activating the output BLKZ, which are connected to
the input BLKZ on the distance Mho function block.

During fault inception a lot of transients are developed which in turn might cause the distance
function to overreach. The Mho supervision logic (ZSMGAPC) increases the filtering during the most
transient period of the fault. This is done by activating the output BLKZMTD, which is connected to
the input BLKZMTD on mho distance function block.

High SIR detection SEMOD153847-22 v3

High SIR values increases the likelihood that CVT will introduce a prolonged and distorted transient,
increasing the risk for overreach of the distance function.

The SIR function calculates the SIR value as the source impedance divided by the setting Zreach
and activates the output signal HSIR if the calculated value for any of the six basic shunt faults
exceed the setting SIRLevel. The HSIR signal is intended to block the delta based mho impedance
function.

Transformer protection RET670 317

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.8 Faulty phase identification with load encroachment

FMPSPDIS SEMOD153819-1 v5

8.8.1 Identification
SEMOD155879-2 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Faulty phase identification with load FMPSPDIS 21
encroachment for mho
Z
S00346 V2 EN-US

8.8.2 Functionality SEMOD153825-5 v7

The ability to accurately and reliably classify different types of fault so that single phase tripping and
autoreclosing can be used plays an important roll in today's power systems.

The phase selection function is design to accurately select the proper fault loop(s) in the distance
function dependent on the fault type.

The heavy load transfer that is common in many transmission networks may in some cases interfere
with the distance protection zone reach and cause unwanted operation. Therefore the function has a
built in algorithm for load encroachment, which gives the possibility to enlarge the resistive setting of
the measuring zones without interfering with the load.

The output signals from the phase selection function produce important information about faulty
phase(s), which can be used for fault analysis as well.

8.8.3 Function block SEMOD155615-4 v4

FMPSPDIS
I3P* STL1
U3P* STL2
BLOCK STL3
ZSTART STPE
TR3PH STCNDPHS
1POLEAR STCNDPLE
STCNDLE
START

IEC06000429-2-en.vsd
IEC06000429 V2 EN-US

Figure 159: FMPSPDIS function block

8.8.4 Signals
PID-3541-INPUTSIGNALS v9

Table 187: FMPSPDIS Input signals

Name Type Default Description

I3P GROUP - Group signal for current
SIGNAL
U3P GROUP - Group signal for voltage
SIGNAL
BLOCK BOOLEAN 0 Block of function
Table continues on next page

318 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Name Type Default Description

ZSTART BOOLEAN 0 Start from underimpdeance function
TR3PH BOOLEAN 0 Three phase tripping initiated
1POLEAR BOOLEAN 0 Single pole autoreclosing in progress

PID-3541-OUTPUTSIGNALS v9

Table 188: FMPSPDIS Output signals

Name Type Description

STL1 BOOLEAN Fault detected in phase L1
STL2 BOOLEAN Fault detected in phase L2
STL3 BOOLEAN Fault detected in phase L3
STPE BOOLEAN Earth fault detected
STCNDPHS INTEGER Binary coded starts from phase selection
STCNDPLE INTEGER Binary coded starts from ph sel with load encroachment
STCNDLE INTEGER Binary coded starts from load encroachment only
START BOOLEAN Indicates that something has started

8.8.5 Settings
PID-3541-SETTINGS v9

Table 189: FMPSPDIS Group settings (basic)

Name Values (Range) Unit Step Default Description

IMaxLoad 10 - 5000 %IB 1 200 Maximum load for identification of three
phase fault in % of IBase
RLd 1.00 - 3000.00 Ohm/p 0.01 80.00 Load encroachment resistive reach in
ohm/phase
ArgLd 5 - 70 Deg 1 20 Load encroachment inclination of load
angular sector

Table 190: FMPSPDIS Group settings (advanced)

Name Values (Range) Unit Step Default Description

DeltaIMinOp 5 - 100 %IB 1 10 Delta current level in % of IBase
DeltaUMinOp 5 - 100 %UB 1 20 Delta voltage level in % of UBase
U1Level 5 - 100 %UB 1 80 Pos seq voltage limit for identification of
3-ph fault
I1LowLevel 5 - 200 %IB 1 10 Pos seq current level for identification of
3-ph fault in % of IBase
U1MinOp 5 - 100 %UB 1 20 Minimum operate positive sequence
voltage for ph sel
U2MinOp 1 - 100 %UB 1 5 Minimum operate negative sequence
voltage for ph sel
INRelPE 10 - 100 %IB 1 20 3I0 limit for release ph-e measuring
loops in % of max phase current
INBlockPP 10 - 100 %IB 1 40 3I0 limit for blocking phase-to-phase
measuring loops in % of max phase
current

Table 191: FMPSPDIS Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Transformer protection RET670 319

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.8.6 Operation principle

8.8.6.1 The phase selection function SEMOD153832-4 v3

Faulty phase identification with load encroachment for mho (FMPSPDIS) function can be
decomposed into six different parts:

1. A high speed delta based current phase selector

2. A high speed delta based voltage phase selector
3. A symmetrical components based phase selector
4. Fault evaluation and selection logic
5. A load encroachment logic
6. A blinder logic

The total function can be blocked by activating the input BLOCK.

Delta based current and voltages SEMOD153832-14 v5

The delta based fault detection function uses adaptive technique and is based on patent US4409636.

The aim of the delta based phase selector is to provide very fast and reliable phase selection for
releasing of tripping from the high speed Mho measuring element and is essential to Directional
Comparison Blocking scheme (DCB), which uses Power Line Carrier (PLC) communication system
along the protected line.

The current and voltage samples for each phase passes through a notch filter that filters out the
fundamental components. Under steady state load conditions or when no fault is present, the output
of the filter is zero or close to zero. When a fault occurs, currents and voltages change resulting in
sudden changes in the currents and voltages resulting in non-fundamental waveforms being
introduced on the line. At this point the notch filter produces significant non-zero output. The filter
output is processed by the delta function. The algorithm uses an adaptive relationship between
phases to determine if a fault has occurred, and determines the faulty phases.

The current and voltage delta based phase selector gives a real output signal if the following criterion
is fulfilled (only phase L1 shown):

Max(ΔUL1,ΔUL2,ΔUL3)>DeltaUMinOp

Max(ΔIL1,ΔIL2,ΔIL3)>DeltaIMinOp

where:
ΔUL1, ΔUL2 and ΔUL3 are the voltage change between sample t and sample t-1
DeltaUMinOp and are the minimum harmonic level settings for the voltage and current
DeltaIMinOp filters to decide that a fault has occurred. A slow evolving fault may not
produce sufficient harmonics to detect the fault; however, in such a
case speed is no longer the issue and the sequence components
phase selector will operate.

The delta voltages ΔULn and delta current ΔILn (n index for phase order) are the voltage and current
between sample t and sample t-1.

The delta phase selector employs adaptive techniques to determine the fault type. The logic
determines the fault type by summing up all phase values and dividing by the largest value. Both
voltages and currents are filtered out and evaluated. The condition for fault type classification for the
voltages and currents can be expressed as:

FaulType =
∑ ( ∆UL1, ∆UL2, ∆UL3)
MAX ( ∆UL1, ∆UL 2, ∆UL3)
EQUATION1621 V2 EN-US (Equation 82)

320 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

FaulType =
∑ ( ∆IL1, ∆IL2, ∆IL3)
MAX ( ∆IL1, ∆IL 2, ∆IL3)
EQUATION1622 V2 EN-US (Equation 83)

The value of FaultType for different shunt faults are as follows:

Under ideal conditions: (Patent pending)

Single phase-to-earth; FaultType=1
Phase-to-phase fault FaultType=2
Three-phase fault; FaultType=3

The output signal is 1 for single phase-to-earth fault, 2 for phase-to-phase fault and 3 for three-phase
fault. At this point the filter does not know if earth was involved or not.

Typically there are induced harmonics in the non-faulted lines that will affect the result. This method
allows for a significant tolerance in the evaluation of FaultType over its entire range.

When a single phase-to-earth fault has been detected, the logic determines the largest quantity, and
asserts that phase. If phase-to-phase fault is detected, the two largest phase quantities will be
detected and asserted as outputs.

The faults detected by the delta based phase selector are coordinated in a separate block. Different
phases of faults may be detected at slightly different times due to differences in the angles of
incidence of fault on the wave shape. Therefore the output is forced to wait a certain time by means
of a timer. If the timer expires, and a fault is detected in one phase only, the fault is deemed as
phase-to-earth. This way a premature single phase-to-earth fault detection is not released for a
phase-to-phase fault. If, however, earth current is detected before the timer expires, the phase-to-
earth fault is released sooner.

If another phase picks up during the time delay, the wait time is reduced by a certain amount. Each
detection of either phase-to-earth or additional phases further reduce the initial time delay and allow
the delta phase selector output to be faster. There is no time delay if all three phases are faulty.

The delta function is released if the input DELTAREL is activated at the same time as input
DELTABLK is not activated. Activating the DELTABLK input blocks the delta function. The release
signal has an internal pulse timer of 100 ms. When the DELTAREL signal has disappeared the delta
logic is reset. In order not to get too abrupt change, the reset is decayed in pre-defined steps.

Symmetrical component based phase selector SEMOD153832-58 v3

The symmetrical component phase selector uses preprocessed calculated sequence voltages and
currents as inputs. It also uses sampled values of the phase currents. All the symmetrical quantities
mentioned further in this section are with reference to phase L1.

The function is made up of four main parts:

A Detection of the presence of earth fault

B A phase-to-phase logic block based on U1/U2 angle relationship

C A phase-to-earth component based on patent US5390067 where the angle relationships

between U2/I0 and U2/U1 is evaluated to determine earth fault or phase- to-phase to earth fault

D Logic for detection of three-phase fault

Presence of earth-fault detection SEMOD153832-70 v8

This detection of earth fault is performed in two levels, first by evaluation of the magnitude of zero
sequence current, and secondly by the evaluation of the zero and negative sequence voltage. It is a
complement to the earth-fault signal built-in in the Symmetrical component based phase selector.

Transformer protection RET670 321

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

The complementary based zero-sequence current function evaluates the presence of earth fault by
calculating the 3I0 and comparing the result with the setting parameter INRelPE. The output signal is
used to release the earth-fault loop. It is a complement to the earth-fault signal built-in in the
sequence based phase selector. The condition for releasing the phase-to-earth loop is as follows:

The output from this detection is used to release the earth-fault loop.

|3I0|>maxIph × INRelPE

where:
|3I0| is the magnitude of the zero sequence current 3I0

maxIph is the maximum magnitude of the phase currents

INRelPE is a setting parameter for the relation between the magnitude of 3I0 and the
maximum phase current

The earth-fault loop is also released if the evaluation of the zero sequence current by the main
sequence function meets the following conditions:

|3I0|>IBase × 0.5

|3I0|>maxIph ×INRelPE

where:
maxIph is the maximal current magnitude found in any of the three phases
INRelPE is the setting of 3I0 limit for release of phase-to-earth measuring loop in % of IBase
IBase is the global setting of the base current (A)

In systems where the source impedance for zero sequence is high the change of zero sequence
current may not be significant and the above detection may fail. In those cases the detection enters
the second level, with evaluation of zero and negative sequence voltage. The release of the earth-
fault loops can then be achieved if all of the following conditions are fulfilled:

|3U0|>|U2| × 0.5

|3U0|>|U1| × 0.2

|U1|> UBase × 0.2/√(3)

and

3I0<0.1 × IBase

or

3I0<maxIph × INRelPE

where:
3U0 is the magnitude of the zero sequence voltage

U2 is the magnitude of the negative sequence voltage at the relay measuring point

k5 is design parameter
ILmax is the maximal phase current
IMinOp is the setting of minimum operate phase current in % of IBase

322 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Phase-to-phase fault detection SEMOD153832-119 v2

The detection of phase-to-phase fault is performed by evaluation of the angle difference between the
sequence voltages U2 and U1.

IEC06000383-2-en.vsd
IEC06000383 V2 EN-US

Figure 160: Definition of fault sectors for phase-to-phase fault

The phase-to-phase loop for the faulty phases will be determined if the angle between the sequence
voltages U2 and U1 lies within the sector defined according to figure 160 and the following conditions
are fulfilled:

|U1|>U1MinOP

|U2|>U2MinOp

where:
U1MinOP and U2MinOp are the setting parameters for positive sequence and negative sequence
minimum operate voltages

The positive sequence voltage U1L1 in figure 160 above is reference.

If there is a three-phase fault, there will not be any release of the individual phase signals, even if the
general conditions for U2 and U1 are fulfilled.

Phase-to-earth and phase-to-phase-to-earth-fault detection SEMOD153832-135 v5

The detection of phase-to-earth and phase-to-phase-to-earth fault (US patent 5390067) is based on
two conditions:

1. Angle relationship between U2 and I0

2. Angle relationship between U2 and U1

The condition 1 determines faulty phase at single phase-to-earth fault by evaluating the argument
between U2 and I0.

Transformer protection RET670 323

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

80°

L2-E sector L3-E sector

U2L1
(Ref)

200°
L1-E sector
320°

IEC06000384_2_en.vsd
IEC06000384 V3 EN-US

Figure 161: Condition 1: Definition of faulty phase sector as angle between U2 and I0
The angle is calculated in a directional function block and gives the angle in radians as input to the
U2 and I0 function block. The input angle is released only if the fault is in forward direction. This is
done by the directional element. The fault is classified as forward direction if the angle between U0
and I0 lies between 20 to 200 degrees, see figure 162.

Forward 20°

200° Reverse

en06000385.vsd

IEC06000385 V1 EN-US

Figure 162: Directional element used to release the measured angle between Uo and I0
The input radians are summarized with an offset angle and the result evaluated. If the angle is within
the boundaries for a specific sector, the phase indication for that sector will be active see figure 161.
Only one sector signal is allowed to be activated at the same time.

The sector function for condition 1 has an internal release signal which is active if the main sequence
function has classified the angle between U0 and I0 as valid. The following conditions must be fulfilled
for activating the release signals:

|U2|>U2MinOp

|3I0|> 0.05 · IBase

|3I0|>maxIph · INRelPE

324 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

where:
U2 and IN are the magnitude of the negative sequence voltage and zero-
sequence current (3I0)

U2MinOp is the setting parameter for minimum operating negative sequence

voltage
maxIph is the maximum phase current
INRelPE is the setting parameter for 3I0 limit for releasing phase-to-earth loop

The angle difference is phase shifted by 180 degrees if the fault is in reverse direction.

The condition 2 looks at the angle relationship between the negative sequence voltage U2 and the
positive sequence voltage U1. Since this is a phase-to-phase voltage relationship, there is no need
for shifting phases if the fault is in reverse direction. A phase shift is introduced so that the fault
sectors will have the same angle boarders as for condition 1. If the calculated angle between U2 and
U1 lies within one sector, the corresponding phase for that sector will be activated. The condition 2 is
released if both the following conditions are fulfilled:

|U2|>U2MinOp

|U1|>U1MinOP

where:
|U1| and |U2| are the magnitude of the positive and negative sequence voltages.

U1MinOP and U2MinOp are the setting parameters for positive sequence and negative sequence
minimum operating voltages.

140°
L3-E sector
20°

U1L1
(Ref)
L1-E sector
L2-E sector

260° IEC06000413_2_en.vsd
IEC06000413 V2 EN-US

Figure 163: Condition 2: U2 and U1 angle relationship

If both conditions are true and there is sector match, the fault is deemed as single phase-to-earth. If
the sectors, however, do not match the fault is determined to be the complement of the second
condition, that is, a phase-to-phase-to- earth fault.

Condition 1 and Condition 2 ⇒ Fault type

L3-E L3-E L3-E
L2-E L1-E L2-L3-E

Transformer protection RET670 325

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

The sequence phase selector is blocked when earth is not involved or if a three-phase fault is
detected.

Three-phase fault detection SEMOD153832-174 v4

Unless it has been categorized as a single or two-phase fault, the function classifies it as a three-
phase fault if the following conditions are fulfilled:

|U1|<U1Level

and

|I1|>I1LowLevel

or

|I1|>IMaxLoad

where:
|U1| and |I1| are the positive sequence voltage and current magnitude

U1Level , are the setting of limits for positive sequence voltage and current
I1LowLevel
IMaxLoad is the setting of the maximum load current

The output signal for detection of three-phase fault is only released if not earth fault and phase-to-
phase fault in the main sequence function is detected.

The conditions for not detecting earth fault are the inverse of equation 5 to 10.

The condition for not detecting phase-to-phase faults is determined by three conditions. Each of them
gives condition for not detecting phase-to-phase fault. Those are:

1:
earth fault is detected
or
|3I0|> 0.05 · IBase

and
|3I0|>maxIph ·INRelPE

2:
phase-to-earth and phase-to-phase faults are not fulfilled
and
maxIph<0.1 · IBase
and
|I2|<0.1 · maxIph

3:
|3I0|>maxIph · INBlockPP

or
|I2|<maxIph · I2ILmax

326 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

where:
maxIph is the maximum of the phase currents IL1, IL2 and IL3
INRelPE is the setting parameter for 3I0 limit for release of phase-to-earth fault loops
|I2| is the magnitude of the negative sequence current

I2ILmax is the setting parameter for the relation between negative sequence current
to the maximum phase current in percent of IBase
INBlockPP is the setting parameter for 3I0 limit for blocking phase to phase measuring
loops

Fault evaluation and selection logic SEMOD153832-307 v3

The phase selection logic has an evaluation procedure that can be simplified according to figure 164.
Only phase L1 is shown in the figure. If the internal signal 3 Phase fault is activated, all four outputs
START, STL1, STL2 and STL3 gets activated.

a a>b FaultPriority
DeltaIL1 then c=a c Adaptive release
b else c=b dependent on result
from Delta logic
DeltaUL1

Sequence based
function a<b
a
L1L2 fault
then c=b c
OR b else c=a OR
L1N fault

3 Phase fault

STL1
IL1Valid &

BLOCK

IEC06000386-2-en.vsd
IEC06000386 V2 EN-US

Figure 164: Simplified diagram for fault evaluation, phase L1

Load encroachment logic SEMOD153832-312 v3

Each of the six measuring loops has its own load (encroachment) characteristic based on the
corresponding loop impedance. The load encroachment functionality is always activated in faulty
phase identification with load encroachment for mho (FMPSPDIS) function but the influence on the
zone measurement can be switched On/Offin the respective impedance measuring function.

The outline of the characteristic is presented in figure 165. As illustrated, the resistive reach in
forward and reverse direction and the angle of the sector is the same in all four quadrants. The reach
for the phase selector will be reduced by the load encroachment function, as shown in figure 165.

Blinder
Blinder provides a mean to discriminate high load from a fault. The operating characteristic is
illustrated in figure 165. There are six individual measuring loops with the blinder functionality. Three
phase-to-earth loops which estimate the impedance according to

Zn = Uph / Iph

Transformer protection RET670 327

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

and three phase-to-phase loops according to

Zph-ph = Uph-ph / Iph-ph

The start operations from respective loop are binary coded into one word and provides an output
signal STCNDPLE.

X jX

Operation area Operation area

RLd
ArgLd ArgLd
R

ArgLd R
ArgLd
RLd

Operation area

No operation area No operation area

en06000414.vsd
IEC06000414 V1 EN-US

Figure 165: Influence on the characteristic by load encroachment logic

Outputs SEMOD153832-327 v7
The output of the sequence components based phase selector and the delta logic phase selector
activates the output signals STL1, STL2 and STL3. If an earth fault is detected the signal STPE gets
activated.

The phase selector also gives binary coded signals that are connected to the zone measuring
element for opening the correct measuring loop(s). This is done by the signal STCNDPHS. If only
one phase is started (L1, L2 or L3), the corresponding phase-to-earth element is enabled. STPE is
expected to be made available for two-phase and three-phase faults for the correct output to be
selected. The fault loop is indicated by one of the decimal numbers below.

The output STCNDPHS provides release information from the phase selection part only. STCNDLE
provides release information from the load encroachment part only. STCNDPLE provides release
information from the phase selection part and the load encroachment part combined, that is, both
parts have to issue a release at the same time (this signal is normally not used in the zone
measuring element). In these signals, each fault type has an associated value, which represents the
corresponding zone measuring loop to be released. The values are presented in table 191.

0= no faulted phases
1= L1E
2= L2E
3= L3E
4= -L1L2E
5= -L2L3E
6= -L3L1E
7= -L1L2L3E
8= -L1L2
Table continues on next page

328 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

9= -L2L3
10= -L3L1
11= L1L2L3

An additional logic is applied to handle the cases when phase-to-earth outputs are to be asserted
when the earth input G is not asserted.

The output signal STCNDPLE is activated when the load encroachment is operating.

STCNDPLE is connected to the input STCND for selected quadrilateral impedance measuring zones
to be blocked. The signal must be connected to the input LDCND for selected mho impedance
measuring zones .

The load encroachment at the measuring zone must be activated to release the
blocking from the load encroachment function.

8.8.7 Technical data

SEMOD153649-2 v8

Table 192: FMPSPDIS technical data

Function Range or value Accuracy

Load encroachment criteria: (1.00–3000.00) W/ ±2.0% static accuracy
Load resistance, forward and phase Conditions:
reverse (5–70) degrees Voltage range: (0.1–1.1) x Ur
Current range: (0.5–30) x Ir
Angle: at 0 degrees and 85 degrees

8.9 Distance protection zone, quadrilateral characteristic,

separate settings ZMRPDIS, ZMRAPDIS and ZDRDIR GUID-7308DB86-32CE-4615-95DC-92BEEF69E184 v1

8.9.1 Identification
GUID-420DD49A-C65B-4F04-B317-9558DCCE7A52 v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Distance protection zone, quadrilateral ZMRPDIS 21
characteristic, separate settings (zone
1) Z
S00346 V2 EN-US

Distance protection zone, quadrilateral ZMRAPDIS 21

characteristic, separate settings (zone
2-5) Z
S00346 V2 EN-US

GUID-119120A5-8600-44C6-9C85-81136DBBE280 v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Directional impedance quadrilateral ZDRDIR Z<-> 21D

Transformer protection RET670 329

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.9.2 Functionality GUID-014501E7-EE0D-440F-8DC8-C44B848E49D3 v4

The line distance protection is up to five zone full scheme protection with three fault loops for phase-
to-phase faults and three fault loops for phase-to-earth fault for each of the independent zones.
Individual settings for each zone in resistive and reactive reach gives flexibility for use as back-up
protection for transformer connected to overhead lines and cables of different types and lengths.

Mho alternative quadrilateral characteristic is available.

Distance protection zone, quadrilateral characteristic (ZMRPDIS) together with Phase selection,
quadrilateral characteristic with settable angle (FRPSPDIS) has functionality for load encroachment,
which increases the possibility to detect high resistive faults on heavily loaded lines.

The distance protection zones can operate, independent of each other, in directional (forward or
reverse) or non-directional mode.

8.9.3 Function block

GUID-8DF1E00C-8404-4B1C-AE2F-5702269B699A v2

ZMRPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
BLKZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND

IEC08000248-1-en.vsd
IEC08000248 V1 EN-US

Figure 166: ZMRPDIS function block

ZMRAPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
BLKZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND

IEC08000290_1_en.vsd
IEC08000290 V1 EN-US

Figure 167: ZMRAPDIS function block

GUID-3BB8A08A-3199-42E3-B161-B11F4FF8C65F v2

ZDRDIR
I3P* STDIRCND
U3P*
IEC10000007-2-en.vsd

IEC10000007 V2 EN-US

330 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.9.4 Signals
PID-3649-INPUTSIGNALS v6

Table 193: ZMRPDIS Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKZ BOOLEAN 0 Blocks all output by fuse failure signal
BLKTR BOOLEAN 0 Blocks all trip outputs
STCND INTEGER 0 External start condition (loop enabler)
DIRCND INTEGER 0 External directional condition

PID-3649-OUTPUTSIGNALS v6

Table 194: ZMRPDIS Output signals

Name Type Description

TRIP BOOLEAN General Trip, issued from any phase or loop
TRL1 BOOLEAN Trip signal from phase L1
TRL2 BOOLEAN Trip signal from phase L2
TRL3 BOOLEAN Trip signal from phase L3
START BOOLEAN General Start, issued from any phase or loop
STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3
STND BOOLEAN Non-directional start, issued from any phase or loop

PID-3648-INPUTSIGNALS v6

Table 195: ZMRAPDIS Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKZ BOOLEAN 0 Blocks all output by fuse failure signal
BLKTR BOOLEAN 0 Blocks all trip outputs
STCND INTEGER 0 External start condition (loop enabler)
DIRCND INTEGER 0 External directional condition

PID-3648-OUTPUTSIGNALS v6

Table 196: ZMRAPDIS Output signals

Name Type Description

TRIP BOOLEAN General Trip, issued from any phase or loop
TRL1 BOOLEAN Trip signal from phase L1
TRL2 BOOLEAN Trip signal from phase L2
Table continues on next page

Transformer protection RET670 331

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Type Description

TRL3 BOOLEAN Trip signal from phase L3
START BOOLEAN General Start, issued from any phase or loop
STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3
STND BOOLEAN Non-directional start, issued from any phase or loop

PID-726-INPUTSIGNALS v3

Table 197: ZDRDIR Input signals

Name Type Default Description

I3P GROUP - group connection for current abs 2
SIGNAL
U3P GROUP - group connection for voltage abs 2
SIGNAL

PID-726-OUTPUTSIGNALS v3

Table 198: ZDRDIR Output signals

Name Type Description

STDIRCND INTEGER Binary coded directional information per measuring loop

8.9.5 Settings
PID-3649-SETTINGS v6

Table 199: ZMRPDIS Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OperationDir Non-directional - - Forward Operation mode of directionality NonDir /
Forward Forw / Rev
Reverse
X1PP 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach Ph-
Ph
R1PP 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for characteristic
angle, Ph-Ph
X1PE 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach Ph-E
R1PE 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for characteristic
angle, Ph-E
RFPP 0.10 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach in ohm/loop, Ph-
Ph
X0PE 0.10 - 9000.00 Ohm/p 0.01 100.00 Zero sequence reactance reach, Ph-E
RFPE 0.10 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach in ohm/loop, Ph-E
R0PE 0.01 - 3000.00 Ohm/p 0.01 15.00 Zero seq. resistance for zone
characteristic angle, Ph-E
OperationPP Off - - On Operation mode Off / On of Phase-
On Phase loops
OpModetPP Off - - On Operation mode Off / On of Zone timer,
On Ph-Ph
tPP 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-Ph
Table continues on next page

332 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Name Values (Range) Unit Step Default Description

OperationPE Off - - On Operation mode Off / On of Phase-Earth
On loops
OpModetPE Off - - On Operation mode Off / On of Zone timer,
On Ph-E
tPE 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-E
IMinOpPP 10 - 1000 %IB 1 20 Minimum operate delta current for
Phase-Phase loops
IMinOpPE 10 - 1000 %IB 1 20 Minimum operate phase current for
Phase-Earth loops
IMinOpIN 5 - 1000 %IB 1 5 Minimum operate residual current for
Phase-Earth loops

Table 200: ZMRPDIS Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

PID-3648-SETTINGS v6

Table 201: ZMRAPDIS Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OperationDir Non-directional - - Forward Operation mode of directionality NonDir /
Forward Forw / Rev
Reverse
X1PP 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach Ph-
Ph
R1PP 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for characteristic
angle, Ph-Ph
X1PE 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach Ph-E
R1PE 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for characteristic
angle, Ph-E
RFPP 0.10 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach in ohm/loop, Ph-
Ph
X0PE 0.10 - 9000.00 Ohm/p 0.01 100.00 Zero sequence reactance reach, Ph-E
RFPE 0.10 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach in ohm/loop, Ph-E
R0PE 0.01 - 3000.00 Ohm/p 0.01 15.00 Zero seq. resistance for zone
characteristic angle, Ph-E
OperationPP Off - - On Operation mode Off / On of Phase-
On Phase loops
OpModetPP Off - - On Operation mode Off / On of Zone timer,
On Ph-Ph
tPP 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-Ph
OperationPE Off - - On Operation mode Off / On of Phase-Earth
On loops
OpModetPE Off - - On Operation mode Off / On of Zone timer,
On Ph-E
tPE 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-E
IMinOpPP 10 - 1000 %IB 1 20 Minimum operate delta current for
Phase-Phase loops
IMinOpPE 10 - 1000 %IB 1 20 Minimum operate phase current for
Phase-Earth loops

Transformer protection RET670 333

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Table 202: ZMRAPDIS Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

PID-3545-SETTINGS v6

Table 203: ZDRDIR Group settings (basic)

Name Values (Range) Unit Step Default Description

IMinOpPP 5 - 30 %IB 1 10 Minimum operate phase-phase current
for Phase-Phase loops
IMinOpPE 5 - 30 %IB 1 5 Minimum operate phase current for
Phase-Earth loops
ArgNegRes 90 - 175 Deg 1 115 Angle of blinder in second quadrant for
forward direction
ArgDir 5 - 45 Deg 1 15 Angle of blinder in fourth quadrant for
forward direction

Table 204: ZDRDIR Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

8.9.6 Operation principle

8.9.6.1 Full scheme measurement GUID-4519D9AD-4446-48FC-86CC-140E5299AFB7 v1

The execution of the different fault loops within the IED are of full scheme type, which means that
each fault loop for phase-to-earth faults and phase-to-phase faults for forward and reverse faults are
executed in parallel.

Figure 168 presents an outline of the different measuring loops for up to five, impedance-measuring
zones. There are 3 to 5 zones depending on product type and variant.

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 1

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 2

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 3

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 4

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 5

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone RV

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone BU

IEC05000458‐3‐en.vsdx

IEC05000458 V3 EN-US

Figure 168: The different measuring loops at phase-to-earth fault and phase-to-phase fault.
The use of full scheme technique gives faster operation time compared to switched schemes which
mostly uses a start element to select correct voltages and current depending on fault type. Each

334 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

distance protection zone performs like one independent distance protection IED with six measuring
elements.

8.9.6.2 Impedance characteristic GUID-0DC94F08-9B3A-424D-9615-BD5C577344ED v1

The distance measuring zone includes six impedance measuring loops; three intended for phase-to-
earth faults, and three intended for phase-to-phase as well as, three-phase faults.

The distance measuring zone will essentially operate according to the non-directional impedance
characteristics presented in figure 169 and figure 170. The phase-to-earth characteristic is illustrated
with the full loop reach while the phase-to-phase characteristic presents the per phase reach.

X (Ohm/loop)

R1PE+Rn

RFPE RFPE

X0PE-X1PE
Xn =
3
X1PE+Xn R0PE-R1PE
Rn =
3
jN jN
R (Ohm/loop)

RFPE RFPE

X1PE+Xn

RFPE RFPE
en08000280-2-en.vsd

R1PE+Rn
IEC08000280 V1 EN-US

Figure 169: Characteristic for phase-to-earth measuring , ohm/loop domain

Transformer protection RET670 335

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

X (Ohm/phase)

RFPP R1PP RFPP

2 2
X 0 PE - X 1RVPE
XNRV =XX00PEPG- -
X31XRVPE
1RVPG
XNRV =
XNRV =
3 3
XX
X00
PE
0 PE
-X
PG --1X 11FWPE
XFWPE
FWPG
XNFW =
XNFW==
XNFW
X1PP 3
3 3

j j
R (Ohm/phase)

RFPP RFPP
2 2

X1PP

RFPP R1PP RFPP

2 2
en07000062.vsd
IEC07000062 V2 EN-US

Figure 170: Characteristic for phase-to-phase measuring

The fault loop reach with respect to each fault type may also be presented as in figure 171. Note in
particular the difference in definition regarding the (fault) resistive reach for phase-to-phase faults
and three-phase faults.

336 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

IL1 R1 + j X1
Phase-to-earth
UL1
element

Phase-to-earth
fault in phase L1 RFPE
(Arc + tower
resistance)

0
IN (R0-R1)/3 +
j (X0-X1)/3 )

IL1 R1 + j X1 Phase-to-phase
UL1 element L1-L2
Phase-to-phase
fault in phase RFPP
L1-L2 IL2
UL2 (Arc resistance)
R1 + j X1

IL1 R1 + j X1 0.5·RFPP Phase-to-phase

UL1 element L1-L3
Three-phase
fault
IL3
UL3
R1 + j X1 0.5·RFPP
IEC08000282-2-en.vsd
IEC08000282 V2 EN-US

Figure 171: Fault loop model

The R1 and jX1 in figure 171 represents the positive sequence impedance from the measuring point
to the fault location. The settings RFPE and RFPP are the eventual fault resistances in the faulty
place.

Regarding the illustration of three-phase fault in figure 171, there is of course fault current flowing
also in the third phase during a three-phase fault. The illustration merely reflects the loop
measurement, which is made phase-to-phase.

The zone can be set to operate in Non-directional, Forward or Reverse direction through the setting
OperationDir . The result from respective set value is illustrated in figure 172. The impedance reach
is symmetric, in the sense that it conforms for forward and reverse direction. Therefore, all reach
settings apply to both directions.

Transformer protection RET670 337

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

X X X

R R R

Non-directional Forward Reverse

IEC05000182-2-en.vsdx

IEC05000182 V2 EN-US

Figure 172: Directional operating modes of the distance measuring zones

8.9.6.3 Minimum operating current GUID-BFD07CBE-F322-4602-A3BC-B6E8D72DB92B v1

The operation of Distance measuring zones, quadrilateral characteristic (ZMRPDIS) is blocked if the
magnitude of input currents fall below certain threshold values.

The phase-to-earth loop Ln is blocked if ILn < IMinOpPE.

For zone 1 with load compensation feature the additional criterion applies, that all phase-to-earth
loops can be blocked when IN < IMinOpIN, regardless of the phase currents.

ILn is the RMS value of the current in phase Ln. IN is the RMS value of the vector sum of the three-
phase currents, that is residual current 3I0.

The phase-to-phase loop LmLn is blocked if ILmLn< IMinOpPP.

ILmLn is the RMS value of the vector difference between phase currents Lm and Ln.

All three current limits IMinOpPE, IMinOpIN and IMinOpPP are automatically
reduced to 75% of regular set values if the zone is set to operate in reverse
direction, that is OperationDir=Reverse

8.9.6.4 Measuring principles M16923-4 v7

Fault loop equations use the complex values of voltage, current, and changes in the current.
Apparent impedances are calculated and compared with the set limits. The apparent impedances at
phase-to-phase faults follow equation 84 (example for a phase L1 to phase L2 fault).

UL1 – UL2
Zapp = -------------------------
I L1 – IL2
EQUATION1222 V1 EN-US (Equation 84)

Here U and I represent the corresponding voltage and current phasors in the respective phase Ln (n
= 1, 2, 3)

338 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

The earth return compensation applies in a conventional manner to phase-to-earth faults (example
for a phase L1 to earth fault) according to equation 85.

U L1
Z app =
I L1 + I N × KN
EQUATION1223 V2 EN-US (Equation 85)

Where:
are the phase voltage, phase current and residual current present to the IED
U L1
I L1
IN

KN
is defined as:

Z 0 - Z1
KN =
3 × Z1
EQUATION-2105 V2 EN-US

Z 0 = R 0 + jX 0
EQUATION2106 V2 EN-US

Z 1 = R1 + jX 1
EQUATION2107 V2 EN-US

Where
R0 is setting of the resistive zero sequence reach
X0 is setting of the reactive zero sequence reach
R1 is setting of the resistive positive sequence reach
X1 is setting of the reactive positive sequence reach

Here IN is a phasor of the residual current in IED point. This results in the same reach along the line
for all types of faults.

The apparent impedance is considered as an impedance loop with resistance R and reactance X.

The formula given in equation 85 is only valid for radial feeder application without load. When load is
considered in the case of single phase-to-earth fault, conventional distance protection might
overreach at exporting end and underreach at importing end. The IED has an adaptive load
compensation which increases the security in such applications.

Measuring elements receive current and voltage information from the A/D converter. The check sums
are calculated and compared, and the information is distributed into memory locations. For each of
the six supervised fault loops, sampled values of voltage (U), current (I), and changes in current
between samples (DI) are brought from the input memory and fed to a recursive Fourier filter.

The filter provides two orthogonal values for each input. These values are related to the loop
impedance according to equation 86,

Transformer protection RET670 339

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

X Di
U = R × i + ------ × -----
w 0 Dt
EQUATION1224 V1 EN-US (Equation 86)

in complex notation, or:

X D Re ( I )
Re ( U ) = R × Re ( I ) + ------ × ------------------
w0 Dt

EQUATION354 V1 EN-US (Equation 87)

X DIm ( I )
Im ( U ) = R × Im ( I ) + ------ × -----------------
w0 Dt

EQUATION355 V1 EN-US (Equation 88)

with

w0 = 2 × p × f 0
EQUATION356 V1 EN-US (Equation 89)

where:
Re designates the real component of current and voltage,
Im designates the imaginary component of current and voltage and
f0 designates the rated system frequency

The algorithm calculates Rm measured resistance from the equation for the real value of the voltage
and substitutes it in the equation for the imaginary part. The equation for the Xm measured reactance
can then be solved. The final result is equal to:

Im ( U ) × DRe ( I ) – Re ( U ) × D Im ( I )
R m = ------------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – D Im ( I ) × Re ( I )
EQUATION357 V1 EN-US (Equation 90)

Re ( U ) × Im ( I ) – Im ( U ) × Re ( I )
Xm = w 0 × Dt × -------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – DIm ( I ) × Re ( I )
EQUATION358 V1 EN-US (Equation 91)

The calculated Rm and Xm values are updated each sample and compared with the set zone reach.
The adaptive tripping counter counts the number of permissive tripping results. This effectively
removes any influence of errors introduced by the capacitive voltage transformers or by other factors.

The directional evaluations are performed simultaneously in both forward and reverse directions, and
in all six fault loops. Positive sequence voltage and a phase locked positive sequence memory
voltage are used as a reference. This ensures unlimited directional sensitivity for faults close to the
IED point.

8.9.6.5 Directional impedance element for quadrilateral characteristics M16923-139 v6

The evaluation of the directionality takes place in Directional impedance quadrilateral function
ZDRDIR. Equation 92 and equation 93 are used to classify that the fault is in forward direction for
phase-to-earth fault and phase-to-phase fault.

340 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

0.8 × U 1L1 + 0.2 × U 1L1 M

- ArgDir < arg < ArgNeg Re s
I L1
EQUATION725 V2 EN-US (Equation 92)

For the L1-L2 element, the equation in forward direction is according to.

0.8 × U 1L1 L 2 + 0.2 × U 1L1 L 2 M

- ArgDir < arg < ArgNeg Re s
I L1 L 2
EQUATION726 V2 EN-US (Equation 93)

where:
ArgDir is the setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15
degrees) and
ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default set to 115
degrees, see figure 173.
is positive sequence phase voltage in phase L1
U 1L1
is positive sequence memorized phase voltage in phase L1
U 1L1M
is phase current in phase L1
I L1
is voltage difference between phase L1 and L2 (L2 lagging L1)
U 1L1L 2
is memorized voltage difference between phase L1 and L2 (L2 lagging L1)
U 1L1L 2 M
is current difference between phase L1 and L2 (L2 lagging L1)
I L1L 2

The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees respectively (as
shown in figure 173). It should not be changed unless system studies have shown the necessity.

ZDRDIR gives binary coded directional information per measuring loop on the output STDIRCND.

STDIR= STFWL1*1+STFWL2*2+STFWL3*4+STFWL1L2*8+
+STFWL2L3*16+STFWL3L1*32+STRVL1*64+STRVL2*128+
+STRVL3*256+STRVL1L2*512+STRVL2L3*1024+STRVL3L1*2048

Transformer protection RET670 341

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

ArgNegRes

ArgDir
R

en05000722.vsd
IEC05000722 V1 EN-US

Figure 173: Setting angles for discrimination of forward and reverse fault in Directional
impedance quadrilateral function ZDRDIR

The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees.

The polarizing voltage is available as long as the positive sequence voltage exceeds 5% of the set
base voltage UBase. So the directional element can use it for all unsymmetrical faults including
close-in faults.

For close-in three-phase faults, the U1L1M memory voltage, based on the same positive sequence
voltage, ensures correct directional discrimination.

The memory voltage is used for 100 ms or until the positive sequence voltage is restored.

After 100 ms the following occurs:

• If the current is still above the set value of the minimum operating current (between 10 and 30%
of the set IED rated current IBase), the condition seals in.
• If the fault has caused tripping, the trip endures.
• If the fault was detected in the reverse direction, the measuring element in the reverse
direction remains in operation.
• If the current decreases below the minimum operating value, the memory resets until the
positive sequence voltage exceeds 10% of its rated value.

8.9.6.6 Simplified logic diagrams M13841-35 v2

Distance protection zones GUID-CBBD5D22-7372-4C0A-B941-44A5D21EC328 v2

The design of the distance protection zones are presented for all measuring loops: phase-to-earth as
well as phase-to-phase.

Phase-to-earth related signals are designated by L1N, L2N and L3N.. The phase-to-phase signals
are designated by L1L2, L2L3, and L3L1.

342 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Fulfillment of two different measuring conditions is necessary to obtain the one logical signal for each
separate measuring loop:

• Zone measuring condition, which follows the operating equations described above.
• Group functional input signal (STCND), as presented in figure 92.

The STCND input signal represents a connection of six different integer values from Phase selection
with load encroachment, quadrilateral characteristic function FRPSPDIS within the IED, which are
converted within the zone measuring function into corresponding boolean expressions for each
condition separately. Input signal STCND is connected to FRPSPDISfunction output STCNDZ.

The input signal DIRCND is used to give condition for directionality for the distance measuring zones.
The signal contains binary coded information for both forward and reverse direction. The zone
measurement function filter out the relevant signals depending on the setting of the parameter
OperationDir. It must be configured to the STDIRCND output on directional function ZDRDIR
function.

STZMPP
OR
STCND

AND STNDL1L2
L1L2

STNDL2L3
L2L3 AND

L3L1 AND STNDL3L1

AND STNDL1N
L1N

AND STNDL2N
L2N

STNDL3N
L3N AND

OR STPE

OR
VTSZ STND
OR AND
BLOCK
BLOCFUNC BLK

99000557-2.vsd
IEC99000557-TIFF V3 EN-US

Figure 174: Conditioning by a group functional input signal STCND, external start condition
Composition of the phase start signals for a case, when the zone operates in a non-directional mode,
is presented in figure 93.

Transformer protection RET670 343

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

STNDL1N
OR
STNDL2N 15 ms
AND t STL1
STNDL3N
STNDL1L2 OR 15 ms
AND t STL2
STNDL2L3
15 ms
STNDL3L1 AND t STL3
OR
15 ms
AND t START
OR

BLK

IEC09000889-1-en.vsd
IEC09000889 V1 EN-US

Figure 175: Composition of starting signals in non-directional operating mode

Results of the directional measurement enter the logic circuits, when the zone operates in directional
(forward or reverse) mode, as shown in figure 94.

STNDL1N
AND
DIRL1N
STZMPE.
OR
STNDL2N
DIRL2N AND

STNDL3N 15 ms
OR STL1
AND AND t
DIRL3N

STNDL1L2
DIRL1L2 AND 15 ms
OR STL2
AND t
STNDL2L3
DIRL2L3 AND
15 ms
OR STL3
STNDL3L1 AND t
DIRL3L1 AND

STZMPP
OR

BLK

15 ms
OR START
AND t

IEC09000888-2-en.vsd
IEC09000888 V2 EN-US

Figure 176: Composition of start signals in directional operating mode

Tripping conditions for the distance protection zone one are symbolically presented in figure 95.

344 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Timer tPP=On
STZMPP AND tPP
AND
t

BLOCFUNC
OR OR
tPE
t
AND
Timer tPE=On AND
STZMPE 15ms
BLKTR AND t
TRIP
BLK OR

STL1 AND TRL1

STL2 AND TRL2

STL3 AND TRL3

IEC09000887-3-en.vsdx

IEC09000887 V3 EN-US

Figure 177: Tripping logic for the distance protection zone

8.9.7 Technical data

GUID-7617A215-AE7C-47CC-B189-4914F530F717 v8

Table 205: ZMRPDIS, ZMRAPDIS technical data

Function Range or value Accuracy

Number of zones Max 5 with selectable -
direction
Minimum operate residual (5-1000)% of IBase -
current, zone 1
Minimum operate current, (10-1000)% of IBase -
phase-to-phase and phase-to-
earth
Positive sequence reactance (0.10-3000.00) Ω/ ±2.0% static accuracy
phase ±2.0 degrees static angular accuracy
Conditions:
Positive sequence resistance (0.01-1000.00) Ω/ Voltage range: (0.1-1.1) x Ur
phase
Current range: (0.5-30) x Ir
Zero sequence reactance (0.10-9000.00) Ω/ Angle: at 0 degrees and 85 degrees
phase
Zero sequence resistance (0.01-3000.00) Ω/
phase
Fault resistance, phase-to-earth (0.10-9000.00) Ω/loop
Fault resistance, phase-to- (0.10-3000.00) Ω/loop
phase
Dynamic overreach <5% at 85 degrees -
measured with CVT’s
and 0.5<SIR<30
Table continues on next page

Transformer protection RET670 345

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Function Range or value Accuracy

Definite time delay phase-phase (0.000-60.000) s ±0.2% or ±40 ms whichever is greater
and phase-earth operation
Operate time 25 ms typically IEC 60255-121
Reset ratio 105% typically -
Reset time at 0.1 x Zreach to 2 x Min. = 20 ms -
Zreach Max. =50 ms

8.10 Phase selection, quadrilateral characteristic with

settable angle FRPSPDIS GUID-29E9C424-5AF7-40EE-89D9-F6BB4F0A0836 v2

8.10.1 Identification
GUID-07DB9506-656C-4E5F-A043-3DAA624313C7 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Phase selection, quadrilateral FRPSPDIS 21
characteristic with settable angle
Z<phs

SYMBOL-DD V1 EN-US

8.10.2 Functionality GUID-A15350C8-CFA9-4BD9-9DE1-5D5814290F61 v3

The ability to accurately and reliably classify the different types of fault, so that single pole tripping
and autoreclosing can be used plays an important role in today's power systems. Phase selection,
quadrilateral characteristic with settable angle FRPSPDIS is designed to accurately select the proper
fault loop in the distance function dependent on the fault type.

The heavy load transfer that is common in many transmission networks may make fault resistance
coverage difficult to achieve. Therefore, FRPSPDIS has a built-in algorithm for load encroachment,
which gives the possibility to enlarge the resistive setting of both the phase selection and the
measuring zones without interfering with the load.

The extensive output signals from the phase selection gives also important information about faulty
phase(s) which can be used for fault analysis.

A current-based phase selection is also included. The measuring elements continuously measure
three phase currents and the residual current and, compare them with the set values.

346 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.10.3 Function block GUID-4AE8EAC6-5231-4646-9215-33DBBA039B65 v2

FRPSPDIS
I3P* TRIP
U3P* START
BLOCK STFWL1
DIRCND STFWL2
STFWL3
STFWPE
STRVL1
STRVL2
STRVL3
STRVPE
STNDL1
STNDL2
STNDL3
STNDPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
STCNDZ
STCNDLE

IEC08000430-2-en.vsd
IEC08000430 V2 EN-US

Figure 178: FRPSPDIS function block

8.10.4 Signals
PID-3643-INPUTSIGNALS v7

Table 206: FRPSPDIS Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
DIRCND INTEGER 0 External directional condition

PID-3643-OUTPUTSIGNALS v7

Table 207: FRPSPDIS Output signals

Name Type Description

TRIP BOOLEAN Trip output
START BOOLEAN Start in any phase or loop
STFWL1 BOOLEAN Fault detected in phase L1 - forward direction
STFWL2 BOOLEAN Fault detected in phase L2 - forward direction
STFWL3 BOOLEAN Fault detected in phase L3 - forward direction
STFWPE BOOLEAN Earth fault detected in forward direction
STRVL1 BOOLEAN Fault detected in phase L1 - reverse direction
STRVL2 BOOLEAN Fault detected in phase L2 - reverse direction
STRVL3 BOOLEAN Fault detected in phase L3 - reverse direction
STRVPE BOOLEAN Earth fault detected in reverse direction
STNDL1 BOOLEAN Non directional start in L1
STNDL2 BOOLEAN Non directional start in L2
STNDL3 BOOLEAN Non directional start in L3
Table continues on next page

Transformer protection RET670 347

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Type Description

STNDPE BOOLEAN Non directional start, phase-earth
STFW1PH BOOLEAN Start in forward direction for single-phase fault
STFW2PH BOOLEAN Start in forward direction for two- phase fault
STFW3PH BOOLEAN Start in forward direction for thre-phase fault
STPE BOOLEAN Current conditions release of phase-earth measuring elements
STPP BOOLEAN Current conditions release of phase-phase measuring elements
STCNDZ INTEGER Start condition (Z< with LE and 3I0 E/F detection)
STCNDLE INTEGER Start condition (only LE and 3I0 E/F detection)

8.10.5 Settings
PID-3643-SETTINGS v7

Table 208: FRPSPDIS Group settings (basic)

Name Values (Range) Unit Step Default Description

INBlockPP 10 - 100 %IPh 1 40 3I0 limit for blocking phase-to-phase
measuring loops
INReleasePE 10 - 100 %IPh 1 20 3I0 limit for releasing phase-to-earth
measuring loops
RLdFw 1.00 - 3000.00 Ohm/p 0.01 80.00 Forward resistive reach within the load
impedance area
RLdRv 1.00 - 3000.00 Ohm/p 0.01 80.00 Reverse resistive reach within the load
impedance area
ArgLd 5 - 70 Deg 1 30 Load angle determining the load
impedance area
X1 0.50 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach
R1PP 0.10 - 1000.00 Ohm/p 0.01 15.00 Positive seq. resistance for characteristic
angle, Ph-Ph
R1PE 0.10 - 1000.00 Ohm/p 0.01 1.50 Positive seq. resistance for characteristic
angle, Ph-E
X0 0.50 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach
R0PE 0.50 - 3000.00 Ohm/p 0.01 5.00 Zero seq. resistance for zone
characteristic angle, Ph-E
RFFwPP 0.50 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, forward
RFRvPP 0.50 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, reverse
RFFwPE 1.00 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, forward
RFRvPE 1.00 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, reverse
IMinOpPP 5 - 500 %IB 1 10 Minimum operate delta current for
Phase-Phase loops
IMinOpPE 5 - 500 %IB 1 5 Minimum operate phase current for
Phase-Earth loops

Table 209: FRPSPDIS Group settings (advanced)

Name Values (Range) Unit Step Default Description

TimerPP Off - - Off Operation mode Off / On of Zone timer,
On Ph-Ph
tPP 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-Ph
TimerPE Off - - Off Operation mode Off / On of Zone timer,
On Ph-E
tPE 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-E

348 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Table 210: FRPSPDIS Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

8.10.6 Operation principle GUID-163B55DE-056F-4CB9-A401-78F9F4897903 v2

The basic impedance algorithm for the operation of the phase selection measuring elements is the
same as for the distance zone measuring function. Phase selection, quadrilateral characteristic with
settable angle (FRPSPDIS) includes six impedance measuring loops; three intended for phase-to-
earth faults, and three intended for phase-to-phase as well as for three-phase faults.

The difference, compared to the distance zone measuring function, is in the combination of the
measuring quantities (currents and voltages) for different types of faults.

The characteristic is basically non-directional, but FRPSPDIS uses information from the directional
function ZDRDIR to discriminate whether the fault is in forward or reverse direction.

The start condition STCNDZ is essentially based on the following criteria:

• Residual current criteria, that is, separation of faults with and without earth connection
• Regular quadrilateral impedance characteristic
• Load encroachment characteristics is always active but can be switched off by selecting a high
setting.

The current start condition STCNDLE is based on the following criteria:

• Residual current criteria

• No quadrilateral impedance characteristic. The impedance reach outside the load area is
theoretically infinite. The practical reach, however, will be determined by the minimum operating
current limits.
• Load encroachment characteristic is always active, but can be switched off by selecting a high
setting.

The STCNDLE output is non-directional. The directionality is determined by the distance zones
directional function ZDRDIR.

There are output from FRPSPDIS that indicate whether a start is in forward or reverse direction or
non-directional, for example STFWL1, STRVL1 and STNDL1.

These directional indications are based on the sector boundaries of the directional function and the
impedance setting of FRPSPDIS function. Their operating characteristics are illustrated in figure 179.

Transformer protection RET670 349

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

X X X

R
R R

Non-directional (ND) Forward (FW) Reverse (RV)

en08000286.vsd
IEC08000286 V1 EN-US

Figure 179: Characteristics for non-directional, forward and reverse operation of Phase
selection, quadrilateral characteristic with settable angle (FRPSPDIS)

The setting of the load encroachment function may influence the total operating characteristic, for
more information, refer to section "Load encroachment".

The input DIRCND contains binary coded information about the directional coming from the
directional function ZDRDIR. It shall be connected to the STDIR output on ZDRDIR. This information
is also transferred to the input DIRCND on the distance measuring zones, that is, the ZMRPDIS
block.

The code built up for the directionality is as follows:

STDIR= STFWL1*1+STFWL2*2+STFWL3*4+STFWL1L2*8+
+STFWL2L3*16+STFWL3L1*32+STRVL1*64+STRVL2*128+
+STRVL3*256+STRVL1L2*512+STRVL2L3*1024+STRVL3L1*2048

If the binary information is 1 then it will be considered that we have start in forward direction in phase
L1. If the binary code is 3 then we have start in forward direction in phase L1 and L2 etc.

The STCNDZ or STCNDLE output contains, in a similar way as DIRCND, binary coded information,
in this case information about the condition for opening correct fault loop in the distance measuring
element. It shall be connected to the STCND input on the ZMRPDIS distance measuring zones
block.

The code built up for release of the measuring fault loops is as follows:

STCNDZ = L1N*1 + L2N*2 + L3N*4 + L1L2*8 + L2L3*16 + L3L1*32

8.10.6.1 Phase-to-earth fault GUID-37AF6C9C-852E-48D9-A307-A23F2BF6884A v1

For a phase-to-earth fault, the measured impedance by FRPSPDIS is according to equation 94.

Index PHS in images and equations reference settings for Phase selection,
quadrilateral characteristic with settable angle (FRPSPDIS).

350 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

ULn
ZPHSn =
ILn
EQUATION1255 V1 EN-US (Equation 94)

where:
n corresponds to the particular phase (n=1, 2 or 3)

The characteristic for FRPSPDIS function at phase-to-earth fault is according to figure 180. The
characteristic has a settable angle for the resistive boundary in the first quadrant of 70°.

The resistance RN and reactance XN are the impedance in the earth-return path defined according
to equation 97 and equation 98.

R 0 PE - R1PE
RN =
3
EQUATION-2125 V1 EN-US (Equation 95)
R0 - R1
RN =
3
EQUATION1256 V1 EN-US (Equation 95)

X 0 - X1
XN =
3
EQUATION1257 V1 EN-US (Equation 96)

X (ohm/loop)
R1PE+RN

RFRvPE RFFwPE

X1+XN

RFFwPE

RFRvPE R (Ohm/loop)

X1+XN

RFRvPE RFFwPE

R1PE+RN
IEC09000633-1-en.vsd
IEC09000633 V1 EN-US

Figure 180: Characteristic of FRPSPDIS for phase to earth fault (directional lines are drawn as
"line-dot-dot-line")

Transformer protection RET670 351

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Besides this, the 3I0 residual current must fulfil the conditions according to equation 97 and
equation 98.

3 × I0 ³ 0.5 × IMinOpPE
EQUATION2108 V1 EN-US (Equation 97)

3 × I0 ³ INReleasePE
------------------------------------ × Iphmax
100
EQUATION766 V1 EN-US (Equation 98)

where:
IMinOpPE is the minimum operation current for forward zones
INReleasePE is the setting for the minimum residual current needed to enable operation in the phase-to-earth fault
loops (in %).
Iphmax is the maximum phase current in any of three phases.

8.10.6.2 Phase-to-phase fault GUID-8C41B037-72E8-42EB-A5BA-9FA20BD830DB v1

For a phase-to-phase fault, the measured impedance by FRPSPDIS is according to equation 99.

ULm - ULn
ZPHS =
-2 × ILn
EQUATION1258 V1 EN-US (Equation 99)

ULm is the leading phase voltage, ULn the lagging phase voltage and ILn the phase current in the
lagging phase n.

The operation characteristic is shown in figure 181.

352 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

X (ohm/phase)

0.5·FRvPP
R1PP 0.5·RFFwPP

X1
0.5·RFFwPP

R (ohm/phase)

0.5·RFRvPP
X1

R1PP
0.5·RFRvPP 0.5·RFFwPP
IEC09000634-1-en.vsd
IEC09000634 V1 EN-US

Figure 181: The operation characteristic for FRPSPDIS at phase-to-phase fault (directional
lines are drawn as "line-dot-dot-line")
In the same way as the condition for phase-to-earth fault, there are current conditions that have to be
fulfilled in order to release the phase-to-phase loop. Those are according to equation 100 or
equation 101.

3I 0 < IMinOpPE
EQUATION2109 V1 EN-US (Equation 100)

INBlockPP
3I 0 < × Iph max
100
EQUATION2110 V1 EN-US (Equation 101)

where:
IMinOpPE is the minimum operation current for forward earth measuring loops,
INBlockPP is 3I0 limit for blocking phase-to-phase measuring loop and

Iphmax is maximal magnitude of the phase currents.

8.10.6.3 Three-phase faults GUID-0CB276AE-1700-4ACB-8F90-E8E1FD670365 v1

The operation conditions for three-phase faults are the same as for phase-to-phase fault, that is
equation 99, equation 100 and equation 101 are used to release the operation of the function.

Transformer protection RET670 353

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

However, the reach is expanded by a factor 2/√3 (approximately 1.1547) in all directions. At the same
time the characteristic is rotated 30 degrees, counter-clockwise. The characteristic is shown in
figure 182.

X (ohm/phase)

4 × X1PP
3

0.5·RFFwPP·K3

X1·K3 30 deg 2
RFwPP ×
3

R (ohm/phase)

0.5·RFRvPP·K3

K3 = 2 / sqrt(3)
30 deg

IEC09000635-1-en.vsd
IEC09000635 V2 EN-US

Figure 182: The characteristic of FRPSPDIS for three-phase fault (set angle 70°)

8.10.6.4 Load encroachment GUID-ABD74C3B-FF0F-45B3-BF34-D7C5FEAD62D3 v1

Each of the six measuring loops has its own load encroachment characteristic based on the
corresponding loop impedance. The load encroachment functionality is always active, but can be
switched off by selecting a high setting.

The outline of the characteristic is presented in figure 184. As illustrated, the resistive blinders are set
individually in forward and reverse direction while the angle of the sector is the same in all four
quadrants.

354 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

RLdFw
ArgLd ArgLd
R

ArgLd ArgLd
RLdRv

IEC09000042-1-en.vsd
IEC09000042 V1 EN-US

Figure 183: Characteristic of load encroachment function

The influence of load encroachment function on the operation characteristic is dependent on the
chosen operation mode of FRPSPDIS function. When output signal STCNDZ is selected, the
characteristic for FRPSPDIS (and also zone measurement depending on settings) will be reduced by
the load encroachment characteristic, see figure 185.

When output signal STCNDI is selected, the operation characteristic will be as in figure 184. The
reach will in this case be limit by the minimum operation current and the distance measuring zones.

X X

R R

STCNDZ STCNDLE

IEC10000099-1-
en.vsd
IEC10000099 V1 EN-US

Figure 184: Difference in operating characteristic depending on operation mode when load
encroachment is activated

Transformer protection RET670 355

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

When FRPSPDIS is set to operate together with a distance measuring zone the resultant operate
characteristic could look like in figure 185. The figure shows a distance measuring zone operating in
forward direction. Thus, the operating area of the zone together with the load encroachment is
highlighted in black.

"Phase selection"
"quadrilateral" zone

Distance measuring zone

Load encroachment
characteristic

Directional line

en05000673.vsd
IEC05000673 V1 EN-US

Figure 185: Operating characteristic in forward direction when load encroachment is activated
Figure 185 is valid for phase-to-earth. During a three-phase fault, or load, when the quadrilateral
phase-to-phase characteristic is subject to enlargement and rotation the operate area is transformed
according to figure 186. Notice in particular what happens with the resistive blinders of the "phase
selection" "quadrilateral" zone. Due to the 30-degree rotation, the angle of the blinder in quadrant
one is now 100 degrees instead of the original 70 degrees (if the angle setting is 70 degrees). The
blinder that is nominally located to quadrant four will at the same time tilt outwards and increase the
resistive reach around the R-axis. Consequently, it will be more or less necessary to use the load
encroachment characteristic in order to secure a margin to the load impedance.

356 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

X (W / phase)
Phase selection
”Quadrilateral” zone

Distance measuring zone

R (W / phase)

IEC09000049-1-en.vsd
IEC09000049 V1 EN-US

Figure 186: Operating characteristic for FRPSPDIS in forward direction for three-phase fault,
ohm/phase domain
The result from rotation of the load characteristic at a fault between two phases is presented in fig
187. Since the load characteristic is based on the same measurement as the quadrilateral
characteristic, it will rotate with the quadrilateral characteristic clockwise by 30 degrees when subject
to a pure phase-to-phase fault. At the same time the characteristic will "shrink" by 2/√3, from the full
RLdFw and RLdRv reach, which is valid at load or three-phase fault.

Transformer protection RET670 357

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

IEC08000437.vsd

IEC08000437 V1 EN-US

Figure 187: Rotation of load characteristic for a fault between two phases
There is a gain in selectivity by using the same measurement as for the quadrilateral characteristic
since not all phase-to-phase loops will be fully affected by a fault between two phases. It should also
provide better fault resistive coverage in quadrant one. The relative loss of fault resistive coverage in
quadrant four should not be a problem even for applications on series compensated lines.

8.10.6.5 Minimum operate currents GUID-7F780AC7-36AB-4704-843D-C1EA3F5B2D6A v1

The operation of Phase selection, quadrilateral characteristic with settable angle (FRPSPDIS) is
blocked if the magnitude of input currents falls below certain threshold values.

The phase-to-earth loop Ln is blocked if ILn<IMinOpPE, where ILn is the RMS value of the current in
phase Ln.

The phase-to-phase loop LmLn is blocked if (2·ILn<IMinOpPP).

8.10.6.6 Simplified logic diagrams GUID-95AD1A91-86F0-4854-A12B-99C504BFBC6C v1

Figure 188 presents schematically the creation of the phase-to-phase and phase-to-earth operating
conditions. Consider only the corresponding part of measuring and logic circuits, when only a phase-
to-earth or phase-to-phase measurement is available within the IED.

358 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

OperationZ<
AND
LDEblock

3I 0  0.5  IMinOpPE IRELPE

& 15 ms
AND t STPE
INReleasePE
3I 0   Iphmax
100 STCNDLE
Bool to AND
BLOCK integer

15 ms
3I 0  IMinOpPE 10 ms 20 ms & t STPP

OR AND t t
IRELPP
INBlockPP
3I 0   Iphmax
100

IEC09000149-3-en.vsd
IEC09000149 V3 EN-US

Figure 188: Phase-to-phase and phase-to-earth operating conditions (residual current criteria)
A special attention is paid to correct phase selection at evolving faults. A STCNDLE output signal is
created as a combination of the load encroachment characteristic and current criteria, refer to
figure 188. This signal can be configured to STCND functional input signals of the distance protection
zone and this way influence the operation of the phase-to-phase and phase-to-earth zone measuring
elements and their phase related starting and tripping signals.

Figure 189 presents schematically the composition of non-directional phase selective signals
STNDLn. Internal signals ZMLnN and ZMLmLn (m and n change between one and three according
to the phase number) represent the fulfilled operating criteria for each separate loop measuring
element, that is within the characteristic.

INDL1N
INDL2N
INDL3N

15 ms
STNDPE
IRELPE OR t

LDEblockL1N
IL1 AND 15 ms
OR STNDL1
ZML1N OR t
LDEblockL2N
IL2 AND
OR
ZML2N 15 ms
LDEblockL3N STNDL2
OR t
IL3 AND
OR
ZML3N
LDEblockL1L2 15 ms
STNDL3
IL1 & IL2 AND OR t
OR
ZML1L2
LDEblockL2L3
IL2 & IL3 AND INDL1L2
OR
ZML2L3 INDL2L3
LDEblockL3L1
IL3 & IL1 AND
OR INDL3L1
ZML3L1
IRELPP 15 ms
STNDPP
OR t

IEC00000545-4-en.vsd
IEC00000545-TIFF V4 EN-US

Figure 189: Composition on non-directional phase selection signals

Transformer protection RET670 359

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Composition of the directional (forward and reverse) phase selective signals is presented
schematically in figure 190 and figure 191. The directional criteria appears as a condition for the
correct phase selection in order to secure a high phase selectivity for simultaneous and evolving
faults on lines within the complex network configurations. Internal signals DFWLn and DFWLnLm
present the corresponding directional signals for measuring loops with phases Ln and Lm.
Designation FW (figure 191) represents the forward direction as well as the designation RV
(figure 190) represents the reverse direction. All directional signals are derived within the
corresponding digital signal processor.

Figure 190 presents additionally a composition of a STCNDZ output signal, which is created on the
basis of impedance measuring conditions. This signal can be configured to STCND functional input
signals of the distance protection zone and this way influence the operation of the phase-to-phase
and phase-to-earth zone measuring elements and their phase related starting and tripping signals.

INDL1N
AND
DRVL1N
INDL1L2 15 ms STRVL1
AND OR t
DRVL1L2
INDL3L1
AND
DRVL3L1 15 ms
STRVPE
INDL2N OR t
AND
DRVL2N
INDL1L2 15 ms
STRVL2
AND OR t

INDL2L3 INDL1N
AND INDL2N
DRVL2L3
INDL3N Bool to STCNDZ
INDL3N INDL1L2 integer
AND INDL2L3
DRVL3N INDL3L1
INDL2L3 15 ms
STRVL3
AND OR t

INDL3L1
15 ms
AND STRVPP
OR t

IEC00000546_2_en.vsd
IEC00000546-TIFF V2 EN-US

Figure 190: Composition of phase selection signals for reverse direction

360 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

AND

INDL1N
AND 15 ms 15 ms
DFWL1N STFW1PH
AND OR t t
INDL1L2
15 ms STFWL1
AND OR t
DFWL1L2
INDL3L1
AND
AND
DFWL3L1 15 ms
STFWPE
INDL2N OR t
AND
DFWL2N
AND 15 ms
INDL1L2 STFWL2
t
AND OR
15 ms 15 ms
INDL2L3 STFW2PH
AND OR t t
AND
DFWL2L3
INDL3N
AND AND
DFWL3N 15 ms
STFWL3
t
INDL2L3
AND OR
15 ms
INDL3L1 STFW3PH
AND t
AND

15 ms
STFWPP
OR t

IEC05000201_2_en.vsd

IEC05000201 V2 EN-US

Figure 191: Composition of phase selection signals for forward direction

Figure192 presents the composition of output signals TRIP and START, where internal signals
STNDPP, STFWPP and STRVPP are the equivalent to internal signals STNDPE, STFWPE and
STRVPE, but for the phase-to-phase loops.

Transformer protection RET670 361

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

TimerPP=Off
tPP
AND AND
t
TRIP
OR OR
tPE
TimerPE=Off
t
AND AND

STNDPP

STFWPP OR
STRVPP
START
OR
STNDPE

STFWPE OR
STRVPE

IEC08000441_2_en.vsd
IEC08000441-1 V2 EN-US

Figure 192: TRIP and START signal logic

8.10.7 Technical data

GUID-9E13C38A-3B6D-402B-98A6-6CDA20632CE7 v5

Table 211: FRPSPDIS technical data

Function Range or value Accuracy

Minimum operate current (5-500)% of IBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir

Reactive reach, positive (0.50–3000.00) Ω/phase ±2.0% static accuracy

sequence ±2.0 degrees static angular accuracy
Conditions:
Resistive reach, positive (0.10–1000.00) Ω/phase Voltage range: (0.1-1.1) x Ur
sequence
Current range: (0.5-30) x Ir
Reactive reach, zero sequence (0.50–9000.00) Ω/phase Angle: at 0 degrees and 85 degrees

Resistive reach, zero sequence (0.50–3000.00) Ω/phase

Fault resistance, Ph-E faults, (1.00–9000.00) Ω/loop
forward and reverse
Fault resistance, Ph-Ph faults, (0.50–3000.00) Ω/loop
forward and reverse
Reset ratio 105% typically -

362 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.11 High speed distance protection ZMFPDIS GUID-CC4F7338-2281-411D-B55A-67BF03F31681 v4

8.11.1 Function revision history GUID-DD5F2758-15E5-496C-8F8E-93AA34B2ACAC v3

Document Product History

revision revision
A 2.2.1 Impedance measurement and supervision added (ZMMXU).
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 -
M 2.2.4 Zone BU (Backup) is added. Now there are seven zones in total. Zone 2 direction and
directional blinders (ArgDir, ArgNegRes) are now settable. Setting tTauDC is added; a
parameter for optional fine tuning of performance.
Added new setting RStart, which limits the resistive reach of the phase selection outside
of the ArgLd sector. Changed setting name XLd to XStart. Added information about
grouping of complex values and Dynamic Amplitude deadband monitoring.
N 2.2.5 Parallel line mutual coupling compensation feature based on the parallel line residual
current is added with new settings: EnaPar, INPRatio, R0MZ1, X0MZ1, R0MZ2, and
X0MZ2.
Load compensation and direction element are improved for earth faults without zero
sequence current condition.
This update is valid for all the previously released 2.2 products.

8.11.2 Identification GUID-8ACD3565-C607-4399-89D2-A05657840E6D v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
High speed distance protection zone ZMFPDIS 21

Z
S00346 V2 EN-US

8.11.3 Functionality GUID-2E34AB7F-886E-499F-8984-09041A89238D v11

The High speed distance protection (ZMFPDIS) is providing sub-cycle, down towards half-cycle,
operate time for basic faults within 60% of the line length and up to around SIR 5.

The ZMFPDIS function is a seven zone full scheme protection with three fault loops for phase-to-
phase faults and three fault loops for phase-to-earth faults for each of the independent zones, which
makes the function suitable for applications with single-phase autoreclosing.

In each measurement zone, ZMFPDIS function is designed with the flexibility to operate in either
quadrilateral or mho characteristic mode for separate phase-to-earth or phase-to-phase loops.

Transformer protection RET670 363

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

A built-in adaptive load compensation algorithm prevents overreaching of the distance zones in the
load exporting end during phase-to-earth faults on heavily loaded power lines. It also reduces
underreach in the importing end.

The ZMFPDIS function block itself incorporates a phase-selection element and a directional element,
contrary to previous designs in the 600-series, where these elements were represented with
separate function-blocks.

The operation of the phase-selection element is primarily based on current change criteria (i.e. delta
quantities), with significantly increased dependability. There is also a phase selection criterion
operating in parallel which bases its operation only on voltage and current phasors.

The directional element utilizes a set of well-established quantities to provide fast and correct
directional decision during various power system operating conditions, including close-in three-phase
faults, simultaneous faults and faults with only zero-sequence in-feed.

The ZMFPDIS function is also equipped with the parallel line mutual coupling compensation feature
based on the parallel line residual current.

364 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.11.4 Function block GUID-322E158B-C2A1-4F0D-A749-01C7942875ED v1

ZMFPDIS
I3P* TRIP
U3P* TRZ1
BLOCK TRL1Z1
VTSZ TRL2Z1
BLKZ1 TRL3Z1
BLKZ2 TRZ2
BLKZ3 TRL1Z2
BLKZ4 TRL2Z2
BLKZ5 TRL3Z2
BLKZRV TRZ3
BLKZBU TRZ4
BLKTRZ1 TRZ5
BLKTRZ2 TRZRV
BLKTRZ3 TRZBU
BLKTRZ4 START
BLKTRZ5 STZ1
BLKTRZRV STNDZ1
BLKTRZBU STZ2
EXTNST STL1Z2
ORCND STL2Z2
RELCNDZ1 STL3Z2
RELCNDZ2 STNDZ2
RELCNDZ3 STZ3
RELCNDZ4 STNDZ3
RELCNDZ5 STZ4
RELCNDZRV STNDZ4
RELCNDZBU STZ5
STNDZ5
STZRV
STL1ZRV
STL2ZRV
STL3ZRV
STNDZRV
STZBU
STNDZBU
STND
STNDL1
STNDL2
STNDL3
STNDPE
STFWL1
STFWL2
STFWL3
STFWPE
STRVL1
STRVL2
STRVL3
STRVPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP

IEC11000433-6-en.vsdx

IEC11000433 V5 EN-US
IEC11000433 V6 EN-US

Figure 193: ZMFPDIS function block

Transformer protection RET670 365

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.11.5 Signals
PID-7600-INPUTSIGNALS v1

Table 212: ZMFPDIS Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
INP GROUP - Parallel line residual current
SIGNAL
BLOCK BOOLEAN 0 Blocks and resets timers and outputs of entire function
VTSZ BOOLEAN 0 Blocks and resets timers and outputs of entire function
BLKZ1 BOOLEAN 0 Blocks and resets zone 1 timers and outputs
BLKZ2 BOOLEAN 0 Blocks and resets zone 2 timers and outputs
BLKZ3 BOOLEAN 0 Blocks and resets zone 3 timers and outputs
BLKZ4 BOOLEAN 0 Blocks and resets zone 4 timers and outputs
BLKZ5 BOOLEAN 0 Blocks and resets zone 5 timers and outputs
BLKZRV BOOLEAN 0 Blocks and resets reverse zone timers and outputs
BLKZBU BOOLEAN 0 Blocks and resets backup zone timers and outputs
BLKTRZ1 BOOLEAN 0 Blocks and resets zone 1 timers and trip outputs
BLKTRZ2 BOOLEAN 0 Blocks and resets zone 2 timers and trip outputs
BLKTRZ3 BOOLEAN 0 Blocks and resets zone 3 timers and trip outputs
BLKTRZ4 BOOLEAN 0 Blocks and resets zone 4 timers and trip outputs
BLKTRZ5 BOOLEAN 0 Blocks and resets zone 5 timers and trip outputs
BLKTRZRV BOOLEAN 0 Blocks and resets reverse zone timers and trip outputs
BLKTRZBU BOOLEAN 0 Blocks and resets backup zone timers and trip outputs
EXTNST BOOLEAN 0 External start of zone timers
ORCND INTEGER 0 Word for enabling all zones in OR condition with phase selection
RELCNDZ1 INTEGER 127 Release word for the measuring loops of zone 1
RELCNDZ2 INTEGER 127 Release word for the measuring loops of zone 2
RELCNDZ3 INTEGER 127 Release word for the measuring loops of zone 3
RELCNDZ4 INTEGER 127 Release word for the measuring loops of zone 4
RELCNDZ5 INTEGER 127 Release word for the measuring loops of zone 5
RELCNDZRV INTEGER 127 Release word for the measuring loops of zone RV
RELCNDZBU INTEGER 127 Release word for the measuring loops of zone BU

PID-7600-OUTPUTSIGNALS v1

Table 213: ZMFPDIS Output signals

Name Type Description

TRIP BOOLEAN Trip in any phase or phases from any zone or zones
TRZ1 BOOLEAN Trip in any phase or phases from zone 1 - forward direction
TRL1Z1 BOOLEAN Trip in phase L1 from zone 1 - forward direction
TRL2Z1 BOOLEAN Trip in phase L2 from zone 1 - forward direction
TRL3Z1 BOOLEAN Trip in phase L3 from zone 1 - forward direction
Table continues on next page

366 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Name Type Description

TRZ2 BOOLEAN Trip in any phase or phases from zone 2 - zone direction
TRL1Z2 BOOLEAN Trip in phase L1 from zone 2 - zone direction
TRL2Z2 BOOLEAN Trip in phase L2 from zone 2 - zone direction
TRL3Z2 BOOLEAN Trip in phase L3 from zone 2 - zone direction
TRZ3 BOOLEAN Trip in any phase or phases from zone 3 - zone direction
TRZ4 BOOLEAN Trip in any phase or phases from zone 4 - zone direction
TRZ5 BOOLEAN Trip in any phase or phases from zone 5 - zone direction
TRZRV BOOLEAN Trip in any phase or phases from zone RV - reverse direction
TRZBU BOOLEAN Trip in any phase or phases from zone BU - zone direction
START BOOLEAN Start in any phase or phases from any zone or zones
STZ1 BOOLEAN Start in any phase or phases from zone 1 - forward direction
STNDZ1 BOOLEAN Start in any phase or phases from zone 1 - any direction
STZ2 BOOLEAN Start in any phase or phases from zone 2 - zone direction
STL1Z2 BOOLEAN Start in phase L1 from zone 2 - zone direction
STL2Z2 BOOLEAN Start in phase L2 from zone 2 - zone direction
STL3Z2 BOOLEAN Start in phase L3 from zone 2 - zone direction
STNDZ2 BOOLEAN Start in any phase or phases from zone 2 - any direction
STZ3 BOOLEAN Start in any phase or phases from zone 3 - zone direction
STNDZ3 BOOLEAN Start in any phase or phases from zone 3 - any direction
STZ4 BOOLEAN Start in any phase or phases from zone 4 - zone direction
STNDZ4 BOOLEAN Start in any phase or phases from zone 4 - any direction
STZ5 BOOLEAN Start in any phase or phases from zone 5 - zone direction
STNDZ5 BOOLEAN Start in any phase or phases from zone 5 - any direction
STZRV BOOLEAN Start in any phase or phases from zone RV - reverse direction
STL1ZRV BOOLEAN Start in phase L1 from zone RV - reverse direction
STL2ZRV BOOLEAN Start in phase L2 from zone RV - reverse direction
STL3ZRV BOOLEAN Start in phase L3 from zone RV - reverse direction
STNDZRV BOOLEAN Start in any phase or phases from zone RV - any direction
STZBU BOOLEAN Start in any phase or phases from zone BU - zone direction
STNDZBU BOOLEAN Start in any phase or phases from zone BU - any direction
STND BOOLEAN Fault detected in any phase or phases - any direction
STNDL1 BOOLEAN Fault detected in phase L1 - any direction
STNDL2 BOOLEAN Fault detected in phase L2 - any direction
STNDL3 BOOLEAN Fault detected in phase L3 - any direction
STNDPE BOOLEAN Fault with earth connection detected in any phase or phases - any
direction
STFWL1 BOOLEAN Fault detected in phase L1 - forward direction
STFWL2 BOOLEAN Fault detected in phase L2 - forward direction
STFWL3 BOOLEAN Fault detected in phase L3 - forward direction
STFWPE BOOLEAN Fault with earth connection detected - forward direction
STRVL1 BOOLEAN Fault detected in phase L1 - reverse direction
STRVL2 BOOLEAN Fault detected in phase L2 - reverse direction
Table continues on next page

Transformer protection RET670 367

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Type Description

STRVL3 BOOLEAN Fault detected in phase L3 - reverse direction
STRVPE BOOLEAN Fault with earth connection detected - reverse direction
STFW1PH BOOLEAN Single-phase fault detected - forward direction
STFW2PH BOOLEAN Two-phase fault detected - forward direction
STFW3PH BOOLEAN Three-phase fault detected - forward direction
STPE BOOLEAN Ph-E zone measurement enabled - any direction
STPP BOOLEAN Ph-Ph zone measurement enabled - any direction

8.11.6 Settings
PID-7600-SETTINGS v1

Table 214: ZMFPDIS Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups
tTauDC 0.010 - 999.999 s 0.001 999.999 Maximum expected DC time constant in
primary fault current
ZDbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
of range, Int Db: In 0,001%s
ZZeroDb 0 - 100000 m% 100 0 Magnitude zero point clamping in
0,001% of range
ZHiHiLim 0.0 - 5000.0 Ohm 0.1 800.0 High High limit in ohm
ZHiLim 0.0 - 5000.0 Ohm 0.1 150.0 High limit in ohm
ZLowLim 0.0 - 5000.0 Ohm 0.1 50.0 Low limit in ohm
ZLowLowLim 0.0 - 5000.0 Ohm 0.1 35.0 Low Low limit in ohm
ZMin 0.000 - 5000.000 Ohm 0.001 0.005 Minimum value in ohm
ZMax 0.0 - 5000.0 Ohm 0.1 1500.0 Maximum value in ohm
ZRepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & 5s cyclic
Db & 30s cyclic
Db & 1min cyclic
Deadband dyn
Db dyn & 5s cyclic
Db dyn & 30s
cyclic
Db dyn & 1min
cyclic
ZLimHys 0.000 - 100.000 % 0.001 0.500 Hysteresis value in % of range and is
common for all limits
ZAngDbRepInt 1 - 100000 Type 1 10 Cyclic report interval (s)

368 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Table 215: ZMFPDIS Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
RLdFw 0.01 - 5000.00 Ohm/p 0.01 60.00 Resistance determining the load
impedance area - forward
RLdRvFactor 1 - 1000 %RLdF 1 100 Resistance factor determining the load
w impedance area - reverse
RStart 0.01 - 5000.00 Ohm/p 0.01 150.00 Resistive limitation of starting
characteristic
XStart 0.01 - 10000.00 Ohm/p 0.01 400.00 Reactive limitation of starting
characteristic
ArgLd 5 - 70 Deg 1 30 Angle determining the load impedance
area
CVTType Any - - Passive type CVT selection determining filtering of the
Passive type function
None (Magnetic)
ArgDir 5 - 45 Deg 1 15 Angle of blinder in fourth quadrant for
forward direction
ArgNegRes 90 - 175 Deg 1 120 Angle of blinder in second quadrant for
forward direction
EnPar Off - - Off Enable parallel line compensation
On ON/OFF
INPRatio 0.20 - 2.00 - 0.05 1.25 INP/IN high limit for parallel line
compensation
OpModePPZ1 Off - - Quadrilateral On/Off and characteristic setting for Ph-
Quadrilateral Ph loops, zone 1
Mho
MhoOffset
OpModePEZ1 Off - - Quadrilateral On/Off and characteristic setting for Ph-E
Quadrilateral loops, zone 1
Mho
MhoOffset
X1PPZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
Ph, zone 1
R1PPZ1 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-
Ph, zone 1
X1PEZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
E, zone 1
R1PEZ1 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-E,
zone 1
X0Z1 0.01 - 9000.00 Ohm/p 0.01 100.00 Zero sequence reactance reach, zone 1
R0Z1 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, zone 1
X0MZ1 0.00 - 9000.00 Ohm/p 0.01 0.00 Zero sequence mutual reactance reach,
zone 1
R0MZ1 0.00 - 3000.00 Ohm/p 0.01 0.00 Zero sequence mutual resistance reach,
zone 1
RFPPZ1 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 1
RFPEZ1 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 1
tPPZ1 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Phase, zone 1
tPEZ1 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Earth, zone 1
Table continues on next page

Transformer protection RET670 369

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Values (Range) Unit Step Default Description

IMinOpPPZ1 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone 1
IMinOpPEZ1 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone 1
OpModePPZ2 Off - - Quadrilateral On/Off and characteristic setting for Ph-
Quadrilateral Ph loops, zone 2
Mho
MhoOffset
OpModePEZ2 Off - - Quadrilateral On/Off and characteristic setting for Ph-E
Quadrilateral loops, zone 2
Mho
MhoOffset
DirModeZ2 Non-directional - - Forward Direction of zone 2
Forward
Reverse
X1Z2 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach,
zone 2
R1Z2 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, zone
2
X0Z2 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, zone 2
R0Z2 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, zone 2
X0MZ2 0.00 - 9000.00 Ohm/p 0.01 0.00 Zero sequence mutual reactance reach,
zone 2
R0MZ2 0.00 - 3000.00 Ohm/p 0.01 0.00 Zero sequence mutual resistance reach,
zone 2
RFPPZ2 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 2
RFPEZ2 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 2
tPPZ2 0.000 - 60.000 s 0.001 0.400 Time delay to trip, Phase-Phase, zone 2
tPEZ2 0.000 - 60.000 s 0.001 0.400 Time delay to trip, Phase-Earth, zone 2
IMinOpPPZ2 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone 2
IMinOpPEZ2 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone 2
OpModePPZ3 Off - - Quadrilateral On/Off and characteristic setting for Ph-
Quadrilateral Ph loops, zone 3
Mho
MhoOffset
OpModePEZ3 Off - - Quadrilateral On/Off and characteristic setting for Ph-E
Quadrilateral loops, zone 3
Mho
MhoOffset
DirModeZ3 Non-directional - - Forward Direction of zone 3
Forward
Reverse
X1Z3 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach,
zone 3
R1Z3 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, zone
3
X0Z3 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, zone 3
R0Z3 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, zone 3
RFPPZ3 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 3
RFPEZ3 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 3
Table continues on next page

370 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Name Values (Range) Unit Step Default Description

tPPZ3 0.000 - 60.000 s 0.001 0.800 Time delay to trip, Phase-Phase, zone 3
tPEZ3 0.000 - 60.000 s 0.001 0.800 Time delay to trip, Phase-Earth, zone 3
IMinOpPPZ3 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone 3
IMinOpPEZ3 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone 3
OpModePPZ4 Off - - Quadrilateral On/Off and characteristic setting for Ph-
Quadrilateral Ph loops, zone 4
Mho
MhoOffset
OpModePEZ4 Off - - Quadrilateral On/Off and characteristic setting for Ph-E
Quadrilateral loops, zone 4
Mho
MhoOffset
DirModeZ4 Non-directional - - Forward Direction of zone 4
Forward
Reverse
X1Z4 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach,
zone 4
R1Z4 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, zone
4
X0Z4 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, zone 4
R0Z4 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, zone 4
RFPPZ4 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 4
RFPEZ4 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 4
tPPZ4 0.000 - 60.000 s 0.001 1.200 Time delay to trip, Phase-Phase, zone 4
tPEZ4 0.000 - 60.000 s 0.001 1.200 Time delay to trip, Phase-Earth, zone 4
IMinOpPPZ4 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone 4
IMinOpPEZ4 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone 4
OpModePPZ5 Off - - Quadrilateral On/Off and characteristic setting for Ph-
Quadrilateral Ph loops, zone 5
Mho
MhoOffset
OpModePEZ5 Off - - Quadrilateral On/Off and characteristic setting for Ph-E
Quadrilateral loops, zone 5
Mho
MhoOffset
DirModeZ5 Non-directional - - Forward Direction of zone 5
Forward
Reverse
X1Z5 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach,
zone 5
R1Z5 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, zone
5
X0Z5 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, zone 5
R0Z5 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, zone 5
RFPPZ5 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 5
RFPEZ5 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 5
tPPZ5 0.000 - 60.000 s 0.001 1.600 Time delay to trip, Phase-Phase, zone 5
Table continues on next page

Transformer protection RET670 371

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Values (Range) Unit Step Default Description

tPEZ5 0.000 - 60.000 s 0.001 1.600 Time delay to trip, Phase-Earth, zone 5
IMinOpPPZ5 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone 5
IMinOpPEZ5 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone 5
OpModePPZRV Off - - Quadrilateral On/Off and characteristic setting for Ph-
Quadrilateral Ph loops, zone RV
Mho
MhoOffset
OpModePEZRV Off - - Quadrilateral On/Off and characteristic setting for Ph-E
Quadrilateral loops, zone RV
Mho
MhoOffset
X1ZRV 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach,
zone RV
R1ZRV 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, zone
RV
X0ZRV 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, zone
RV
R0ZRV 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, zone RV
RFPPZRV 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone RV
RFPEZRV 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone RV
tPPZRV 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Phase, zone
RV
tPEZRV 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Earth, zone RV
IMinOpPPZRV 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone RV
IMinOpPEZRV 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone RV
OpModePPZBU Off - - Quadrilateral On/Off and characteristic setting for Ph-
Quadrilateral Ph loops, zone BU
Mho
MhoOffset
OpModePEZBU Off - - Quadrilateral On/Off and characteristic setting for Ph-E
Quadrilateral loops, zone BU
Mho
MhoOffset
DirModeZBU Non-directional - - Forward Direction of backup zone
Forward
Reverse
X1ZBU 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach,
zone BU
R1ZBU 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, zone
BU
X0ZBU 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, zone
BU
R0ZBU 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, zone BU
RFPPZBU 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone BU
RFPEZBU 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone BU
tPPZBU 0.000 - 60.000 s 0.001 2.000 Time delay to trip, Phase-Phase, zone
BU
Table continues on next page

372 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Name Values (Range) Unit Step Default Description

tPEZBU 0.000 - 60.000 s 0.001 2.000 Time delay to trip, Phase-Earth, zone BU
IMinOpPPZBU 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone BU
IMinOpPEZBU 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone BU

Table 216: ZMFPDIS Group settings (advanced)

Name Values (Range) Unit Step Default Description

RLdFwMax 0.01 - 5000.00 Ohm/p 0.01 5000.00 Maximum used resistance determining
the load impedance area, if RLdFw is
greater than RLdFwMax then RLdFw is
set to RLdFwMax
RLdFwMin 0.01 - 5000.00 Ohm/p 0.01 0.01 Minimum used resistance determining
the load impedance area, if RLdFw is
less than RLdFwMin then RLdFw is set
to RLdFwMin
ArgLdMax 5 - 70 Deg 1 70 Maximum used angle determining the
load impedance area, if ArgLd is greater
than ArgLdMax then ArgLd is set to
ArgLdMax
ArgLdMin 5 - 70 Deg 1 5 Minimum used angle determining the
load impedance area, if ArgLd is less
than ArgLdMin then ArgLd is set to
ArgLdMin
ZoneLinkStart Phase Selection - - Phase Selection Selection of start source for all
1st starting zone ZoneLinked trip delay timers
INReleasePE 5 - 400 %MaxIP 1 400 3I0 limit for releasing Phase-to-Earth
h measuring loops
TimerModeZ1 Disable all - - Enable Ph-E On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E PhPh output, zone 1
Enable PhPh
Enable Ph-E PhPh
TimerLinksZ1 LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should be
tPE) tPE) linked for zone 1
LoopLink &
ZoneLink
No Links
TimerModeZ2 Disable all - - Enable Ph-E On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E PhPh output, zone 2
Enable PhPh
Enable Ph-E PhPh
TimerLinksZ2 LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should be
tPE) tPE) linked for zone 2
LoopLink &
ZoneLink
No Links
TimerModeZ3 Disable all - - Enable Ph-E On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E PhPh output, zone 3
Enable PhPh
Enable Ph-E PhPh
TimerLinksZ3 LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should be
tPE) tPE) linked for zone 3
LoopLink &
ZoneLink
No Links
Table continues on next page

Transformer protection RET670 373

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Values (Range) Unit Step Default Description

TimerModeZ4 Disable all - - Enable Ph-E On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E PhPh output, zone 4
Enable PhPh
Enable Ph-E PhPh
TimerLinksZ4 LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should be
tPE) tPE) linked for zone 4
LoopLink &
ZoneLink
No Links
TimerModeZ5 Disable all - - Enable Ph-E On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E PhPh output, zone 5
Enable PhPh
Enable Ph-E PhPh
TimerLinksZ5 LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should be
tPE) tPE) linked for zone 5
LoopLink &
ZoneLink
No Links
TimerModeZRV Disable all - - Enable Ph-E On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E PhPh output, zone RV
Enable PhPh
Enable Ph-E PhPh
TimerLinksZRV LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should be
tPE) tPE) linked for zone RV
LoopLink &
ZoneLink
No Links
TimerModeZBU Disable all - - Enable Ph-E On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E PhPh output, zone BU
Enable PhPh
Enable Ph-E PhPh
TimerLinksZBU LoopLink (tPP-tPE) - - LoopLink (tPP- How start of trip delay timers should be
LoopLink & tPE) linked for zone BU
ZoneLink
No Links

8.11.7 Monitored data

PID-7600-MONITOREDDATA v1

Table 217: ZMFPDIS Monitored data

Name Type Values (Range) Unit Description

L1Dir INTEGER 1=Forward - Direction in phase L1
2=Reverse
0=No direction
L2Dir INTEGER 1=Forward - Direction in phase L2
2=Reverse
0=No direction
L3Dir INTEGER 1=Forward - Direction in phase L3
2=Reverse
0=No direction
L1L2Dir INTEGER 1=Forward - Direction in loop L1L2
2=Reverse
0=No direction
L2L3Dir INTEGER 1=Forward - Direction in loop L2L3
2=Reverse
0=No direction
Table continues on next page

374 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Name Type Values (Range) Unit Description

L3L1Dir INTEGER 1=Forward - Direction in loop L3L1
2=Reverse
0=No direction
L1R REAL - Ohm Resistance in phase L1
L1X REAL - Ohm Reactance in phase L1
L2R REAL - Ohm Resistance in phase L2
L2X REAL - Ohm Reactance in phase L2
L3R REAL - Ohm Resistance in phase L3
L3X REAL - Ohm Reactance in phase L3
L12R REAL - Ohm Resistance in phase L1-L2
L12X REAL - Ohm Reactance in phase L1-L2
L23R REAL - Ohm Resistance in phase L2-L3
L23X REAL - Ohm Reactance in phase L2-L3
L31R REAL - Ohm Resistance in phase L3-L1
L31X REAL - Ohm Reactance in phase L3-L1
ZL1IMAG REAL - Ohm ZL1 Amplitude, magnitude of
instantaneous value
ZL1ANGIM REAL - deg ZL1 Angle, magnitude of instantaneous
value
ZL2IMAG REAL - Ohm ZL2 Amplitude, magnitude of
instantaneous value
ZL2ANGIM REAL - deg ZL2 Angle, magnitude of instantaneous
value
ZL3IMAG REAL - Ohm ZL3 Amplitude, magnitude of
instantaneous value
ZL3ANGIM REAL - deg ZL3 Angle, magnitude of instantaneous
value
ZL12IMAG REAL - Ohm ZL12 Amplitude, magnitude of
instantaneous value
ZL12ANGIM REAL - deg ZL12 Angle, magnitude of instantaneous
value
ZL23IMAG REAL - Ohm ZL23 Amplitude, magnitude of
instantaneous value
ZL23ANGIM REAL - deg ZL23 Angle, magnitude of instantaneous
value
ZL31IMAG REAL - Ohm ZL31 Amplitude, magnitude of
instantaneous value
ZL31ANGIM REAL - deg ZL31 Angle, magnitude of instantaneous
value

8.11.8 Operation principle GUID-2432C04F-62E4-4817-9900-C830306FB4B0 v3

Settings, input and output names are sometimes mentioned in the following text
without its zone suffix (i.e. BLKZx instead of BLKZ3) when the description is equally
valid for all zones.

Transformer protection RET670 375

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.11.8.1 Filtering GUID-16B5060B-101C-402A-BF25-06E70FDD7836 v2

Practically all voltage, current and impedance quantities used within the ZMFPDIS function are
derived from fundamental frequency phasors filtered by a half cycle filter.

The phasor filter is frequency adaptive in the sense that its coefficients are changed based on the
estimated power system frequency.

A half cycle filter will not be able to reject both even and odd harmonics. So, while odd harmonics will
be completely attenuated, accuracy will be affected by even harmonics. Even harmonics will not
cause the distance zones to overreach however; instead there will be a slightly variable underreach,
on average in the same order as the magnitude ratio between the harmonic and fundamental
component.

8.11.8.2 Distance measuring zones GUID-74B12BB1-FE0A-4DE4-BDBE-159A438D396B v5

The different fault loops within the IED are of full scheme type, which means that earth fault loop for
phase-to-earth faults and phase-to-phase faults for forward and reverse faults are executed in
parallel.

Figure 194 presents an outline of the different measuring loops for the seven distance zones.

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 1

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 2

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 3

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 4

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 5

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone RV

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone BU

IEC05000458‐3‐en.vsdx

IEC05000458 V3 EN-US

Figure 194: The different measuring loops at phase-to-earth fault and phase-to-phase fault
Each distance protection zone performs like one independent distance protection function with seven
measuring elements.

Transients from CVTs may have a significant impact on the transient overreach of a distance
protection. At the same time these transients can be very diverse in nature from one type to the
other; in fact, more diverse than can be distinguished by the algorithm itself in the course of a few
milliseconds. So, a setting (CVTtype) is introduced in order to inform the algorithm about the type of
CVT applied and thus providing the advantage of knowing how performance should be optimized,
even during the first turbulent milliseconds of the fault period.

There are two types of CVTs from the function point of view, the passive and the active type, which
refers to the type of ferro-resonance suppression device that is employed. The active type requires
more rigorous filtering which will have a negative impact on operate times. However, this will be
evident primarily at higher source impedance ratios (SIRs), SIR 5 and above, or close to the reach
limit.

The IEC 60044-5 transient classification is of little or no use in relation to this. It is not primarily the
damping of transients that is important; it is the frequency content of the transients that is decisive,

376 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

i.e. how difficult it is to filter out the specific frequency. So, even if two CVTs, one passive and the
other active type, comply with the same transient class, the active type requires more extensive
filtering in order to avoid transient overreach.

To avoid overreach and at the same time achieve fast operate times, a supplementary circular
characteristic is implemented. A circular characteristic exists for every measuring loop and
quadrilateral/mho characteristic. There are no specific reach settings for this circular zone. It uses the
normal quadrilateral/mho zone settings to determine a reach that will be appropriate. This implies
that the circular characteristic will always have somewhat shorter reach than the quadrilateral/mho
zone.

8.11.8.3 Phase-selection element GUID-1E718907-C321-4041-B0ED-D55104B2C9B4 v6

The operation of the phase-selection element is primarily based on current change criteria (i.e. delta
quantities) with significantly increased dependability. To handle this, there is also a phase selection
criterion operating in parallel which bases its operation only on voltage and current phasors.

This continuous criteria will, in the vast majority of cases, operate in parallel and carry on the fault
indication after the current change phase has ended. Only in some particularly difficult faults on
heavily loaded lines, the continuous criteria might not be sufficient, for example, when the estimated
fault impedance resides within the load area defined by the load encroachment characteristic. In this
case, the indication will be restricted to a pulse lasting for one or two power system cycles.

The phase-selection element can, owing to the current change criteria, distinguish faults with
minimum influence from load and fault impedance. In other words, it is not restricted by a load
encroachment characteristic during the current change phase. This significantly improves
performance for remote phase-to-earth faults on heavily loaded lines. One exception, however, are
three-phase faults to which the load encroachment characteristic always has to be applied in order to
distinguish fault from load.

Phase-to-phase-earth faults (also called double earth faults) will practically always activate phase-to-
phase zone measurements. Measurement in two phase-to-earth loops at the same time is
associated with so-called simultaneous faults: two earth faults at the same time, one each on the two
circuits of a double line, or when the zero sequence current is relatively high due to a source with low
Z0/Z1 ratio. In these situations zone measurement will be released both for the related phase-to-
earth loops and the phase-to-phase loop simultaneously. On the other hand, simultaneous faults
closer to the remote bus will gradually take on the properties of a phase-to-phase-earth fault and the
function will eventually use phase-to-phase zone measurements also here.

In cases where the fault current infeed is more or less completely of zero sequence nature (all phase
currents in phase), the measurement will be performed in the phase-to-earth loops only for a phase-
to-phase-earth fault.

Transformer protection RET670 377

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

AND
2-phase Fault
I3P detected by
Impedance/ current
2-phase fault
U3P based Phase PHSLy
AND
selection

PHSLxLy
AND
OR
a
b a>b
250%
OR
a
b a>b
50% AND OR

a
b a<b
INMag
IL1Mag IN / Imax
IL2Mag
MAX
IL3Mag a ForcePE
b a<b

INReleasePE

IEC17000230-2-en.vsdx
IEC17000230 V2 EN-US

Figure 195: Phase-selection logic

Figure 195 explains the release of two-phase faults (including simultaneous faults as
well as cross-country faults for high impedance earthed networks. This is not valid
for single-phase faults.

However, should it be desirable to use phase-to-earth (and only phase-to-earth) zone measurement
for phase-to-phase-earth faults, there is a setting INReleasePE that can be lowered from its
excessive default value to the level above which phase-to-earth measurement should be activated.

8.11.8.4 Directional criteria GUID-24431EEC-5037-41CD-BC4A-7AC196F158F3 v6

Several criteria are employed when making the directional decision. The basis is provided by
comparing a positive sequence based polarizing voltage with phase currents. For extra security,
especially in making a very fast decision, this method is complemented with an equivalent
comparison where, instead of the phase current, the change in phase current is used. Moreover, a
basic negative sequence directional evaluation is taken into account as a reliable reference during
high load condition. Finally, a zero sequence directional evaluation is used whenever there is more or
less exclusive zero sequence in-feed.

The directional sectors that represent forward direction, one per measuring loop, are defined by the
following equations.

U PolL1
 ArgDir  arg  ArgNegRes
I L1

IECEQUATION19226 V1 EN-US (Equation 102)

U PolL1L 2
 ArgDir  arg  ArgNegRes
I L1L 2

IECEQUATION19227 V1 EN-US (Equation 103)

Where:

378 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

UPolL1 is the polarizing voltage for phase L1.

IL1 is the phase current in phase L1.

UPolL1L2 is the polarizing voltage difference between phase L1 and L2 (L2 lagging L1).

IL1L2 is the current difference between phase L1 and L2 (L2 lagging L1).

The corresponding reverse directional sectors range from (-ArgDir+180) to (ArgNegRes-180)

degrees.

Since the polarizing voltage is also used for the Mho distance characteristics, the magnitude of the
voltage is just as interesting as the phase. If there are symmetrical conditions and the measured per
phase positive sequence voltage magnitude is above 75% of the base voltage before the fault, the
pre-fault magnitude will be memorized and used as long as there is a fault. The phase angle however
will only be memorized (locked) for 75 ms at a time, not to lose synchronism with the real system
voltage.

Should the positive sequence voltage drop below 2% of the base voltage, it will be considered
invalid. In this situation, directional signals and starts from Mho elements will be sealed-in and kept
static as long as there is a fault.

For ZMFCPDIS, when option SeriesComp is chosen for OperationSC, the voltages of faulty phases
will be discarded in order not to affect the polarizing voltage with voltage reversal.

8.11.8.5 Fuse failure GUID-FA7B94D6-8BAF-4D05-8DC0-7FEBF0967D16 v3

The ZMFPDIS function has to be blocked by an additional function like the Fuse failure supervision
(FUFSPVC) or an equivalent external device. Typically, the binary input VTSZ is used for this
purpose.

A built-in supervision feature within high-speed distance protection itself, based on phase current
change, will ensure that the FUFSPVC blocking signal is received in time. Namely, an intentional
time delay will be introduced if no current magnitude change greater than 5% of IBase has been
detected for any of the three phase currents.

8.11.8.6 Measuring principles

Quadrilateral characteristic GUID-32E76D16-41ED-4CEF-B081-8413211AA783 v11
ZMFPDIS implements quadrilateral and mho characteristic in all the seven zones separately. Set
OpModePEZx or OpModePPZx to Quadrilateral, to choose particular measuring loop in a zone to
work as quadrilateral distance protection.

All ZMFPDIS zones operate according to the non-directional impedance characteristics presented in
figure 197 and figure 196. The phase-to-earth characteristic is given in ohms-per-loop domain while
the phase-to-phase characteristic is given in ohms-per-phase domain.

The voltage and current phasors after the half-cycle filter are used in fault loop equations.

For phase-to-phase faults (Figure 198, lower part), the calculated impedances from the relay to the
fault Z calc  Rcalc  j  X calc follow Equation 104 (example is given for a phase L1 to phase L2 fault).

 
U L1  U L 2  I L1  I L 2  Z calc 
IECEQUATION18003 V1 EN-US (Equation 104)

Where and represents the corresponding voltage and current phasors in the respective
phase Ln (n = 1, 2, 3).

Transformer protection RET670 379

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

The calculated Rcalc and Xcalc are compared with the non-directional phase-to-phase quadrilateral
characteristics. If is inside the non-directional phase-to-phase characteristic, the STNDZx output
is set to TRUE.

For phase-to-earth faults (Figure 198, upper part), the earth return compensation applies according
to Equation 105 (example for a phase L1 to earth fault).

 
U L1  I L1  K N  3I 0  p  Z1  I F  RF
IECEQUATION18007 V1 EN-US (Equation 105)

Where,

p is the fault location and RF is the calculated fault resistance. p and RF are unknown and needs to
be solved.

is the zero-sequence current.

is the earth compensation factor and it is defined as:

Z 0  Z1
KN 
3  Z1
Z 0  R 0 Zx  j  X 0 Zx
Z1  R1Zx  j  X 1Zx
IECEQUATION18010 V1 EN-US

Where,

is the set complex zero-sequence impedance of the line in Ω/phase.

is the set complex positive sequence impedance of the line in Ω/phase.

is the positive sequence reactance reach of the line in Ω/phase for phase-to-earth fault for zone
x (x = 1 to 5, BU or RV).

is the positive sequence resistive reach of the line in Ω/phase for phase-to-earth fault for zone x
(x = 1 to 5, BU or RV).

is the zero-sequence reactance reach of the line in Ω/phase for zone x (x = 1 to 5, BU or RV).

is the zero-sequence resistive reach of the line in Ω/phase for zone x (x = 1 to 5, BU or RV).

Table 218: Settings of positive and zero-sequence impedances for different zones

Zones Pos. Seq. X Pos. Seq. R Zero. Seq. X Zero. Seq. R

Zone 1 X1PEZ1 R1PEZ1 X0Z1 R0Z1
Zone 2 X1Z2 R1Z2 X0Z2 R0Z2
Zone 3 X1Z3 R1Z3 X0Z3 R0Z3
Zone 4 X1Z4 R1Z4 X0Z4 R0Z4
Zone 5 X1Z5 R1Z5 X0Z5 R0Z5
Zone RV X1ZRV R1ZRV X0ZRV R0ZRV

is the fault current. It is chosen among phase, zero or negative sequence currents automatically
by the built-in adaptive load compensation algorithm. If the system behind the relay cannot contribute
enough zero-sequence current, only phase or negative sequence current will be chosen.

The calculated impedances from the relay to the fault Z calc  Rcalc  j  X calc can be represented as:

380 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

X calc  p  X 1Zx
IECEQUATION18017 V1 EN-US

Rcalc  p  R1Zx  RF
IECEQUATION18018 V1 EN-US

When the two unknowns p and RF are solved from the equation 105 then the calculated Rcalc and
Xcalc values are compared with the non-directional phase-to-earth quadrilateral characteristics. If
is inside the non-directional phase-to-earth characteristic and the phase selection algorithm enables
this loop, the STNDZx output is set to TRUE.

The load compensation for zone 1 is achieved by estimating the impedance with three different
values of the IF current with:

• neutral current
• negative sequence current
• phase current.

Impedance estimation is based on the neutral current or negative sequence current essentially that
excludes the current component that causes the over-reach. The reactance values from all the
calculations shall effectively be within the zone reactive boundary in order to get the non-directional
start signal from the zone. This means that the under-reach, that is caused by the load import, is not
compensated.

For the other zones, it is enough in effect if the median value of the three is within the zone reach. If
the neutral current is not sufficient, then the negative sequence current based reactance will
represent the median value. If the negative sequence current is not sufficient, then the other
reactance has to be within the reach.

Zone 1 has individual positive sequence impedance settings for phase-to-phase and phase-to-earth
(X1PPZ1, R1PPZ1 and X1PEZ1, R1PEZ1). For the other zones, the positive sequence impedance
reach is common for phase-to-phase and phase-to-earth (X1Zx, R1Zx).

X (Ohm/phase)

RFPPZx R1Zx RFPPZx

2 2

X1Zx

R (Ohm/phase)

RFPPZx RFPPZx
2 2

X1Zx

RFPPZx R1Zx RFPPZx

2 2
IEC11000416-2-en.vsdx
IEC11000416 V2 EN-US

Figure 196: ZMFPDIS Characteristic for phase-to-phase measuring, ohm/loop domain

Transformer protection RET670 381

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

X (Ohm/loop)

R1Zx+RNZx

RFPEZx RFPEZx

X0Zx-X1Zx
XNZx=
3

X1Zx+XNZx R0Zx-R1Zx
RNZx=
3
φN φN
R (Ohm/loop)

RFPEZx RFPEZx

X1Zx+XNZx

RFPEZx RFPEZx

R1Zx+RNZx IEC11000415-2-en.vsdx
IEC11000415 V2 EN-US

Figure 197: ZMFPDIS Characteristic for phase-to-earth measuring, ohm/loop domain

The faulty loop in relation to the fault type can be presented as in figure 198. The main intention with
this illustration is to make clear how the fault resistive reach should be interpreted and set. Note in
particular that the setting RFPPZx always represents the total fault resistance of the loop, regardless
the fact that the fault resistance (arc) may be divided into parts like for three-phase or phase-to-
phase faults. The R1Zx + jX1Zx represent the positive sequence impedance from the measuring
point to the fault location.

382 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

IL1 R1Zx + j X1Zx

Phase-to-earth
UL1
element

Phase-to-earth
RFPEZx
fault in phase L1
(Arc + tower
resistance)

0
IN (R0Zx-R1Zx)/3 +
j (X0Zx-X1Zx)/3 )

IL1 R1Zx + j X1Zx Phase-to-phase

UL1 element L1-L2
Phase-to-phase
fault in phase RFPPZx
L1-L2 IL2
UL2 (Arc resistance)
R1Zx + j X1Zx

IL1 R1Zx + j X1Zx 0.5·RFPPZx Phase-to-phase

UL1 element L1-L3
Three-phase
fault or Phase-to-
phase-earth fault IL3
UL3
R1Zx + j X1Zx 0.5·RFPPZx
IEC11000419-3-en.vsdx
IEC11000419 V3 EN-US

Figure 198: Fault loop model

The zone impedance characteristic is a product of the two separate characteristics:

• The quadrilateral characteristic

• The directional characteristic

The estimated impedance needs to be inside both characteristics for the zone to start or trip. (The
non-directional start STNDZx is an exception however. It is only dependent on the quadrilateral
characteristic.)

In the following figure, it is shown how the X1PP setting can influence the shape of the quadrilateral
characteristic in the fourth quadrant for short line applications.

Transformer protection RET670 383

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

X (ohm)

X1PP’

X1PP
15° R (ohm)
RFPP/2
-X1PP
R· tan15°

-X1PP’
Line distance protection=IEC19000141=2=en-us=Original.vsdx

IEC19000141 V2 EN-US

Figure 199: Influence of X1PP setting on the quadrilateral shape in the fourth quadrant

The quadrilateral phase-to-earth element is added with the parallel line mutual coupling
compensation feature based on the parallel line residual current. The additional current signal must
be connected to the function through the INP group input. The parallel line residual current hardware
channel must be connected to the residual quantity input of the corresponding SMAI block. The
compensation feature can be switched On/Off with the EnPar setting.

When the parallel compensation is switched On (EnPar is On), the phase-to-earth loop Equation 105
is modified according to Equation 106 (example is given for phase L1 to earth fault).

U L1  ( I L1  K N 3I 0  K Nm 3I 0 p ) p  Z1  I F  RF
IECEQUATION20296 V1 EN-US (Equation 106)

3I 0 p is the parallel line residual current

K Nm is the parallel line earth compensation factor and it is defined as:

Z0m
K Nm =
3 Z1
IECEQUATION20299 V1 EN-US

Z 0 m = R0MZx + j X 0MZx
IECEQUATION20300 V1 EN-US

Where,

Z 0m is the set complex zero-sequence mutual impedance between parallel lines in Ω/phase.

is the zero-sequence resistance between parallel lines in Ω/phase for the phase-to-earth
fault in zone direction for zone x (where x = 1 to 2).

is the zero-sequence reactance between parallel lines in Ω/phase for the phase-to-earth
fault in zone direction for zone x (where x = 1 to 2).

384 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

The compensation feature will only be active when the parallel line residual current is not significantly
higher than the protected line residual current. The deactivation limit of this parallel line
compensation feature is set with the INPRatio setting. Compensation is deactivated when:

3I0p
 INPRatio
3I0
IECEQUATION20302 V1 EN-US

The mutual compensation is also deactivated when the protected line residual current is less than
50% of IMinOp according to the below relation:

3I 0  0.5 IMin0 p
IECEQUATION20303 V1 EN-US

Mho characteristic GUID-9269239B-3A04-44CD-BE00-FD850D42836B v3

ZMFPDIS implements quadrilateral and mho characteristic in all the seven zones separately. Set
OpModePEZx or OpModePPZx setting to Mho or Offset, to choose a particular measuring loop in a
zone to work as mho (or Offset Mho) distance protection.

Zones 2 to 5 and BU can be selected to be either forward or reverse with positive sequence
polarized mho characteristic; alternatively self polarized offset mho characteristics. The operating
characteristic is in accordance to figure 200 where zone 5 is selected offset mho.

X
ZBU X

Z4
Z3
ZS=0
Z2
Z1 R
Z5 R

ZS=Z1
ZRV
ZS=2Z1

IEC150000 56-2-en.vsdx

IEC15000056 V2 EN-US

Figure 200: Mho, offset mho characteristics and the source impedance influence on the mho
characteristic
The mho characteristic has a dynamic expansion due to the source impedance. Instead of crossing
the origin, as for the mho to the left of figure 200, which is only valid where the source impedance
(Zs) is zero, the crossing point is moved to the coordinates of the negative source impedance given
an expansion of the circle shown to the right of figure 200. Z1 denotes the complex positive
sequence impedance.

The magnitude of the polarizing voltage is determined completely by the positive sequence voltage
magnitude from before the fault. This will give a somewhat less dynamic expansion of the mho circle
during faults. However, if the source impedance is high, the dynamic expansion of the mho circle
might lower the security of the function too much with high loading and mild power swing conditions.

Transformer protection RET670 385

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Basic operation characteristics GUID-E6CC3CA7-72BE-40FC-A557-7BDB62F7BC1E v3

In ZMFPDIS, each zone measurement loop characteristic can be set to mho characteristic or offset
mho characteristic by setting OpModePEZx or OpModePPZx (where x = 1 to 5, BU or RV depending
on selected zone).

ZMFPDIS fixes zone 1 in Forward mode and zone RV in Reverse mode. Zone 2 to 5 and BU can be
set to Non-directional, Forward or Reverse by setting the parameter DirModeZx (where x = 2 to 5 or
BU depending on selected zone).

If DirModeZx (where x = 2 to 5 or BU depending on selected zone) is selected as Non-directional, the

directional element will not have any effect on the measurement loop and operation of the function.
When DirModeZx (where x = 2 to 5 or BU depending on selected zone) is selected as Forward or
Reverse, directional lines are introduced. Information about the directional lines is given from the
directional element. Basic Mho and offset Mho characteristics with different mode settings are
indicated in figure 201.

X X X
(a) Rset (b) (c) Rset

Xset Xset

R R R

Xset

(a)-(f)
Rset For phase-to-phase fault
Rset = R1Zx
Forward Reverse Non-directional Xset = X1Zx

Mho Characteristics For phase-to-earth fault

R set = R1Z x + R N Z x
(e) (f) X set = X 1Z x + X N Z x
(d) X X X
X 0 Z x − X 1Z x
XNZx =
3
R 0 Z x − R1Z x
Rset Rset
Rset RNZx =
3

Xset Xset Xset

R R R

Xset Xset Xset

Rset Rset Rset

Forward Reverse Non-directional

Offset Mho Characteristics
(a) and (d) are for Zone 1, Zone 2 and Zone 3-5 when DirModeZ2-BU = Forward.
(b) and (e) are for ZoneRV and Zone 3-5 when DirModeZ2-BU = Reverse
(c) and (f) are for Zone 3-5 when DirModeZ2-BU = Non-Directional
x = 2 to 5 or BU IEC150000 55-4-en.vsdx

IEC15000055 V4 EN-US

Figure 201: Mho and offset Mho characteristics

For each zone, the impedance is set in cartesian coordinates (resistance and reactance) which is the
same as for quadrilateral characteristic.

The ZMFPDIS function has only one set of reach setting so the reverse will be the same as for the
forward reach, meaning that the non-directional offset mho characteristic will always be centered
around the origin. In detail, for Zone 1, the resistive and reactance reaches for phase-to-earth fault
and phase-to-phase fault are set individually using the settings R1PPZ1, X1PPZ1, R1PEZ1,
X1PEZ1, X0Z1 and R0Z1. In Zone 2-5, BU and RV, the same zone reach settings are used for
phase-to-earth fault and phase-to-phase (R1Zx, X1Zx, X0Zx and R0Zx, x = 2 to 5, BU or RV).

386 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Theory of operation SEMOD154224-46 v7

The mho algorithm is based on the phase comparison of an operating phasor and a polarizing
phasor. When the operating phasor leads the reference polarizing phasor by 90 degrees or more, the
function operates and gives a trip output.

Phase-to-phase fault SEMOD154224-240 v3

Mho GUID-D162893C-918A-4DDA-AAC2-0D0A814D85C1 v2
The plain Mho circle has the characteristic as in figure 202. The condition for deriving the angle β is
according to equation 107.

(
β = arg U L1L 2 − I L1L 2 ⋅ Z 1set − arg U pol ) ( )
IECEQUATION15027 V1 EN-US (Equation 107)

where

U L1L2 is the voltage vector difference between phases L1 and L2

EQUATION1790 V2
EN-US

I L1L2 is the current vector difference between phases L1 and L2

EQUATION1791 V2
EN-US

is the positive sequence impedance setting for phase-to-phase fault in zone direction
Z 1set

For Zone 1,

Z 1set = R1PPZ 1 + j ⋅ X 1PPZ 1

IECEQUATION15011 V1 EN-US (Equation 108)

where
R1PPZ1 is the positive sequence resistive reach for phase-to-phase fault for zone 1
X1PPZ1 is the positive sequence reactance reach for phase-to-phase fault for zone 1

For Zone x = 2-5, BU and RV

Z 1set = R1Zx + j ⋅ X 1Zx

IECEQUATION15012 V1 EN-US (Equation 109)

where
R1Zx is the positive sequence resistive reach for zone x (x = 2-5, BU and RV)
X1Zx is the positive sequence reactance reach for zone x (x = 2-5, BU and RV)
is the polarizing voltage
Upol

Operation occurs if 90°≤β≤270°

Transformer protection RET670 387

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

IL1L2  jX

I L1L 2  Z1set
UcompUL1L2 IL1L2 Z1set

UL1L2

U pol

I L1L 2  R

IEC15000060-1-en.vsdx

IEC15000060 V1 EN-US

Figure 202: Simplified mho characteristic and vector diagram for phase L1-to-L2 fault
Offset Mho GUID-3E13E6D5-0832-4386-9677-9A40BFF42F8F v2

The characteristic for offset mho is a circle with origin as the center and magnitude of Z 1set as the
radius, where Z 1set is settable through the resistance and reactance settings.

The condition for operation at phase-to-phase fault is that the angle β between the two compensated
voltages is greater than or equal to 90° (figure 203). The angle will be 90° for fault location on the
boundary of the circle.

The angle β for L1 to L2 fault can be defined according to equation below.

 U 
L1L 2  I L1L 2  Z 1set
  arg  
 
 U L1L 2   I L1L 2  Z1set  

IECEQUATION15008 V2 EN-US (Equation 110)

388 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

I L1L 2  jX

U comp1  U L1L 2  I L1L 2  Z1set

I L1L 2  Z1set

U L1L 2

U comp 2  U L1L 2  ( I L1L 2  Z1set )

I L1L 2  R

I L1L 2  Z1set

IEC15000058-2-en.vsdx

IEC15000058 V2 EN-US

Figure 203: Simplified offset mho characteristic and voltage vector for phase L1 to L2 fault
Operation occurs if 90°≤β≤270 °.

Phase-to-earth fault GUID-DB8CF641-0D3F-4F7A-A628-829F3DB0AC5B

SEMOD154224-283 v3
v2
The measuring of earth faults uses earth return compensation applied in a conventional way. The
compensation voltage is derived by considering the influence from the earth return path.

Compensation for earth return path for faults involving earth is done by setting the positive and zero
sequence impedance of the line. It is known that the earth compensation factor KN is,

Z 0set − Z 1set
KN =
3 ⋅ Z 1set
IECEQUATION15017 V1 EN-US

Z 0set = R 0Zx + j ⋅ X 0 Zx
IECEQUATION15018 V1 EN-US

For Zone 1,
Z 1set = R1PEZ 1 + j ⋅ X 1PEZ 1
IECEQUATION15019 V1 EN-US

For Zone 2-5 and RV,

Z 1set = R1Zx + j ⋅ X 1Zx
IECEQUATION15020 V1 EN-US (Equation 111)

Transformer protection RET670 389

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

where
is the complex zero sequence impedance of the line in Ω/phase
Z 0set
is the complex positive sequence impedance of the line in Ω/phase
Z 1set
R1PEZ1 is the positive sequence resistive reach of the line in Ω/phase for
phase-to-earth fault for zone 1
X1PEZ1 is the positive sequence reactance reach of the line in Ω/phase for
phase-to-earth fault for zone 1
R0Zx is the zero sequence resistive reach of the line in Ω/phase for zone
x (x=2 to 5, BU or RV)
X0Zx is the zero sequence reactance reach of the line in Ω/phase for
zone x (x=2 to 5, BU or RV)

For an earth fault in phase L1, the angle β between the compensation voltage and the polarizing

voltage Upol is,

β = arg [U L1 − ( I L1 + 3I 0 ⋅ K N ) ⋅ Z 1set ] − arg(U pol )

IECEQUATION15021 V1 EN-US (Equation 112)

where
is the phase voltage in faulty phase L1
UL1
is the phase current in faulty phase L1
IL1
3I 0 is the zero-sequence current in faulty phase L1

is the complex positive sequence impedance of the line in Ω/phase

Z 1set for phase-to-earth fault in zone direction

is the polarizing voltage for phase L1

Upol

390 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

IL1•jX

UcompUL1 (IL1 3I0 KN )  Z1set

3I0KN Z1set

U L1
I L1  Z1set
U pol

IL1•R
IEC15000059-1-en.vsdx

IEC15000059 V1 EN-US

Figure 204: Simplified offset mho characteristic and vector diagram for phase L1-to-earth fault
Operation occurs if 90°≤β≤270°.

Offset mho GUID-B1EF3931-7B86-4C7B-BCEA-3034482BA240 v3

The condition for operation of offset mho at phase-to-earth fault is that the angle β between the two
compensated voltages is equal to or greater than 90°, see figure 205. The angle will be 90° for fault
location on the boundary of the circle.

   
  arg U L1  ( I L1  3I 0  K N )  Z1set  arg U L1   ( I L1  3I 0  K N )  Z1set 

IECEQUATION15022 V2 EN-US (Equation 113)

Transformer protection RET670 391

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

IL1• jX

U comp1  U L1  ( I L1  3I 0 K N ) Z1set


( I L1  3I 0 K N ) Z1set
U L1

U comp 2  U L1  (( I L1  3I 0 K N ) Z1set )

IL1• R

( I L1  3I 0 K N ) Z1set

IEC15000057-2-en.vsdx
IEC15000057 V2 EN-US

Figure 205: Simplified offset mho characteristic and voltage vector for phase L1-to-earth fault
Operation occurs if 90 °≤β≤270 °.

8.11.8.7 Under-impedance phase selection with load enchroachment GUID-6785BF05-2775-4422-8077-A663D01C6C07 v8

In some cases the measured load impedance might enter the set zone characteristic without any
fault on the protected line. This phenomenon is called load encroachment and it might occur when an
external fault is cleared and high emergency load is transferred onto the protected line. The effect of
load encroachment is illustrated on the left in figure 206. A load impedance within the characteristic
would cause an unwanted trip. The traditional way of avoiding this situation is to set the distance
zone resistive reach with a security margin to the minimum load impedance. The drawback with this
approach is that the sensitivity of the protection to detect resistive faults is reduced.

The IED has a built-in feature which shapes the under-impedance starting characteristic according to
the characteristic shown in figure 206. The load encroachment algorithm will increase the possibility
to detect high fault resistances, especially for phase-to-earth faults at the remote line end. For
example, for a given setting of the load angle ArgLd, the resistive blinder for the zone measurement
can be set according to figure 206 affording higher fault resistance coverage without risk for
unwanted operation due to load encroachment. Separate resistive blinder settings are available in
forward and reverse direction.

The use of the load encroachment feature is essential for long heavily loaded lines, where there
might be a conflict between the necessary emergency load transfer and necessary sensitivity of the
distance protection. The function can also preferably be used on heavy loaded, medium long lines.

392 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

For short lines, the major concern is to get sufficient fault resistance coverage. Load encroachment is
not a major problem.

The built-in phase selection is based on current change criteria and has no user defined settings.
However, a traditional under-impedance-based phase selector is always working in parallel with it.
This under-impedance-based criterion is defined by the two setting parameters XStart and RStart, as
shown in Figure 206. These two settings are common for both Ph-Ph and Ph-Gnd measurement
loops. In order to ensure proper operation of the distance zones the under-impedance based starting
element shall be set in such a way to always cover (i.e. be larger than) all used distance zones for
both Ph-Ph and Ph-Gnd loops. Consequently, the following settings are recommended:

Parameter XStart shall be set to a value which is at least 20% bigger than the value obtained by
formula (2*X1FwPEZx+X0FwPEZx)/3 applied for the longest reaching zone.

It is recommended that the RStart setting shall not exceed the load impedance, which is typically
defined as UBase/sqrt(3)/IBase in primary ohms. It is recommended to reduce the RStart set value to
maximum 80% of the above defined load impedance value. However, the RLdRvFactor and RLdFw
settings can be utilized to get an additional non-operation sector for emergency load, like for when a
parallel line is opened, as shown in Figure 206.

Distance Zones
RStart
XStart

RLdFw

ArgLd

RLdRvFactor
XStart

* RLdFw
100
RStart

IEC09000248-5-en-us.vsdx
IEC09000248 V5 EN-US

Figure 206: Load encroachment and under-impedance starting characteristic

[1]

8.11.8.8 Simplified logic schemes GUID-B43F2F0B-C8A2-4CFD-A9DD-51E167A90B56 v6

PHSL1, PHSL2,...PHSL3L1 are internal binary logical signals from the Phase-selection element.
They correspond directly to the six loops of the distance zones and determine which loops should be
released to operate.

These signals also have the ORCND input as their source.

[1] RLdRv=RLdRvFactor*RLdFw

Transformer protection RET670 393

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

The ORCND input enables the use of external elements to supplement the internal phase selection
in specialized applications, like unblocking of the distance protection during power swings. Like with
the other CND signals, each bit of its binary encoded integer number corresponds to one of the six
measuring loops to be enabled. See Figure 207.

PHSL1, PHSL2,… PHSL3L1
Phase selection Zone1

Internal
criteria bitwise
OR bitwise release
AND

Zone2

RELCNDZ1
bitwise release
RELCNDZ2 AND

RELCNDZ3
Zone3

IEC19000323-1-en-us.vsdx
IEC19000323 V1 EN-US

Figure 207: Logic of how ORCND input is used

FWL1, FWL2,...FWL3L1 and RVL1, RVL2,...RVL3L1 are the internal binary signals from the
Directional element. An FW signal is activated if the criteria for a forward fault or load is fulfilled for its
particular loop. The equivalent applies to the reverse (RV) signals.

The internal input 'IN present' is activated if the residual current (3I0) exceeds 10% of the maximum
phase current magnitude and at the same time is above 5% of IBase. However, if current transformer
saturation is detected, this criterion is changed to residual voltage (3U0) exceeding 5% of UBase/
sqrt(3) instead.

FW(Ln & LmLn)

FW(Ln & LmLn)

RV(Ln & LmLn)

DirModeZ3-5, BU
TRUE (1)
FW(Ln & LmLn) Forward
RV(Ln & LmLn) Reverse

IEC12000137-4-en.vsd

IEC12000137 V4 EN-US

Figure 208: Connection of directional signals to Zones

394 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

ZML1Zx PEZx
OR
PHSL1
AND

DIRL1Zx AND
ZML2Zx
PHSL2
AND

DIRL2Zx AND
ZML3Zx L1Zx
OR
PHSL3
AND

DIRL3Zx AND

ZML1L2Zx L2Zx
PHSL1L2 OR
AND

DIRL1L2Zx AND
ZML2L3Zx
PHSL2L3 L3Zx
AND OR
DIRL2L3Zx AND
ZML3L1Zx
PHSL3L1
AND

DIRL3L1Zx AND

L1N
PPZx
L2N OR
L3N
RELCNDZx Integer L1L2
to Bool
L2L3
NDZx
L1L3 OR

IEC12000140-2-en.vsdx
IEC12000140 V2 EN-US

Figure 209: Logic used to derive some common internal signals

Transformer protection RET670 395

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

TimerModeZx =
Enable PhPh or
Ph-E PhPh
PPZx AND tPPZx
OR AND
AND t
PEZx
AND tPEZx OR
TimerModeZx = OR
AND t
Enable Ph-E or AND
Ph-E PhPh

VTSZ
BLKZx OR

OR
TimerLinksZx
ZoneLinkStart
LoopLink (tPP-tPE)
Phase Selection
LoopLink & ZoneLink
1st starting zone OR
No Links

LNKZx
FALSE (0) AND
OR
TimerLinksZx =
LoopLink & ZoneLink

EXTNST

IEC12000139-6-en.vsdx
IEC12000139 V6 EN-US

Figure 210: Logic for linking of Zone timers

396 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

15 ms
TZx
t TRIPZx
AND

TRL1Zx
OR AND
BLOCK
VTSZ TRL2Zx
OR AND
BLKZx
TRL3Zx
AND
15 ms
L1Zx
t STL1Zx
AND
15 ms
L2Zx
t STL2Zx
AND
15 ms
t STL3Zx
AND

PPZx 15 ms
PEZx OR t STARTZx
AND

15 ms
NDZx
t STNDZx
AND

IEC12000138-2-en.vsd
IEC12000138 V2 EN-US

Figure 211: Start and trip outputs

15 ms
OR t STPE
AND

15 ms
OR t
AND

15 ms
OR t STNDL2
PHSL1L2 AND

15 ms
OR t STNDL3
AND

15 ms
OR t STPP
AND

BLOCK STARTND
OR
VTSZ OR

STPHS
STNDPE
AND

IEC12000133-3-en.vsdx
IEC12000133 V3 EN-US

Figure 212: Additional start outputs 1

Transformer protection RET670 397

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

PHSL1
FWL1 AND
15 ms
FWL2 AND OR t
AND

FWL3 AND 15 ms
PHSL1L2 OR t STFWL2
AND
FWL1L2 AND
PHSL2L3 15 ms
FWL2L3 AND OR t STFWL3
AND
FWL3L1 AND
OR
STFWPE
IN present AND

STFW1PH
=1
BLOCK
VTSZ OR

STFW2PH
=2

STFW3PH
=3

IEC12000134-2-en.vsd
IEC12000134 V2 EN-US

Figure 213: Additional start outputs 2

PHSL1
RVL1 AND
15 ms
RVL2 AND OR t
AND

RVL3 AND 15 ms
PHSL1L2 OR t STRVL2
AND
RVL1L2 AND
PHSL2L3 15 ms
RVL2L3 AND OR t STRVL3
AND
RVL3L1 AND
OR
STRVPE
IN present AND

BLOCK
VTSZ OR

IEC12000141-2-en.vsdx
IEC12000141 V2 EN-US

Figure 214: Additional start outputs 3

398 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.11.8.9 Measurement
Measurement supervision SEMOD54417-130 v4
The protection, control, and monitoring IEDs have functionality to measure and further process
information for currents and voltages obtained from the pre-processing blocks. The number of
processed alternate measuring quantities depends on the type of IED and built-in options.

The information on measured quantities is available for the user at different locations:

• Locally by means of the local HMI

• Remotely using the monitoring tool within PCM600 or over the station bus
• Internally by connecting the analogue output signals to the Disturbance Report function
GUID-8568A19F-0100-4A1A-B3C3-444FD7D6F00B v1

X equals Z in the name of the below mentioned settings.

Zero point clamping GUID-4894EF16-3376-48EB-863F-9CE14487ACAB v1

Measured value below zero point clamping limit is forced to zero. This allows the noise in the input
signal to be ignored. The zero point clamping limit is a setting (XZeroDb where X equals Z).

Continuous monitoring of the measured quantity SEMOD54417-140 v5

Users can continuously monitor the measured quantity available in the function block by means of
four defined operating thresholds, see figure 215. The monitoring has two different modes of
operating:

• Overfunction, when the measured quantity exceeds the High limit (XHiLim) or High-high limit
(XHiHiLim) pre-set values
• Underfunction, when the measured quantity decreases under the Low limit (XLowLim) or Low-
low limit (XLowLowLim) pre-set values.

X_RANGE is illustrated in figure 215.

Y = Magnitude of the Measured Quantity

X_RANGE = 3
High-high limit

X_RANGE= 1 Hysteresis
High limit

X_RANGE=0

X_RANGE=0 t

Low limit

X_RANGE=2

Low-low limit
X_RANGE=4

IEC05000657-3-en.vsdx
IEC05000657 V3 EN-US

Figure 215: Presentation of operating limits

Each analogue output has one corresponding supervision level output (X_RANGE). The output
signal is an integer in the interval 0-4 (0: Normal, 1: High limit exceeded, 3: High-high limit exceeded,
2: below Low limit and 4: below Low-low limit).

Transformer protection RET670 399

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

The logical value of the functional output signals changes according to figure 215.

The user can set the hysteresis (XLimHyst), which determines the difference between the operating
and reset value at each operating point, in wide range for each measuring channel separately. The
hysteresis is common for all operating values within one channel.

Actual value of the measured quantity SEMOD54417-150 v5

The actual value of the measured quantity is available locally and remotely. The measurement is
continuous for each measured quantity separately, but the reporting of the value to the higher levels
depends on the selected reporting mode. The following basic reporting modes are available:

• Cyclic reporting (Cyclic)

• Amplitude dead-band supervision (Dead band)
• Integral dead-band supervision (Int deadband)
• Amplitude Deadband and 5s cyclic
• Amplitude Deadband and 30s cyclic
• Amplitude Deadband and 1min cyclic
• Dynamic Amplitude Deadband
• Dynamic Amplitude Deadband and 5s cyclic
• Dynamic Amplitude Deadband and 30s cyclic
• Dynamic Amplitude Deadband and 60s cyclic

Cyclic reporting SEMOD54417-158 v3

The cyclic reporting of measured value is performed according to chosen setting (XRepTyp). The
measuring channel reports the value independent of amplitude or integral dead-band reporting.

In addition to the normal cyclic reporting the IED also report spontaneously when measured value
passes any of the defined threshold limits.

Y
Value Reported Value Reported
Value Reported Value Reported
(1st)

Y3 Value Reported
Y2 Y4

Y1 Y5

t (*) t (*) t (*) t (*)

t
Value 1

Value 2

Value 3

Value 4

Value 5

(*)Set value for t: XDbRepInt IEC05000500-2-en.vsdx

IEC05000500 V2 EN-US

Figure 216: Periodic reporting

400 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Amplitude dead-band supervision SEMOD54417-163 v6

If a measuring value is changed, compared to the last reported value, and the change is larger than
the ±ΔY pre-defined limits that are set by user (XDbRepInt), then the measuring channel reports the
new value to a higher level. This limits the information flow to a minimum necessary. Figure 217
shows an example with the amplitude dead-band supervision. The picture is simplified: the process is
not continuous but the values are evaluated with a time interval of one execution cycle from each
other.

Value Reported
Y

Value Reported Value Reported

Value Reported
(1st)
Y3 Y
Y
Y2 Y
Y
Y
Y
Y1

IEC99000529-2-en.vsdx

IEC99000529 V2 EN-US

Figure 217: Amplitude dead-band supervision reporting

After the new value is reported, the ±ΔY limits for dead-band are automatically set around it. The new
value is reported only if the measured quantity changes more than defined by the ±ΔY set limits.

Integral dead-band reporting SEMOD54417-167 v4

The measured value is reported if the time integral of all changes exceeds the pre-set limit
(XDbRepInt), figure 218, where an example of reporting with integral dead-band supervision is
shown. The picture is simplified: the process is not continuous but the values are evaluated with a
time interval of one execution cycle from each other.

The last value reported, Y1 in figure 218 serves as a basic value for further measurement. A
difference is calculated between the last reported and the newly measured value and is multiplied by
the time increment (discrete integral). The absolute values of these integral values are added until
the pre-set value is exceeded. This occurs with the value Y2 that is reported and set as a new base
for the following measurements (as well as for the values Y3, Y4 and Y5).

The integral dead-band supervision is particularly suitable for monitoring signals with small variations
that can last for relatively long periods.

Transformer protection RET670 401

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Y A1 >=
A >= pre-set value
A2 >=
pre-set value pre-set value
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value Reported Y4 A3 A5 A7
Value
(1st) Value
A Reported Y5
Reported Value
Reported Value
Y1 Reported

t
IEC99000530-2-en.vsdx

IEC99000530 V2 EN-US

Figure 218: Reporting with integral dead-band supervision

Amplitude deadband and xx cyclic (xx: 5 sec, 30 sec, 1 min) GUID-297D6481-EDFA-4A38-BC9D-29538491254D v2

In this mode of operation, the reporting interval will be cyclic like in reporting type cyclic and time will
reset on every report. This cyclic time has three options: 5sec, 30 sec and 1 min.

Additionally, if a measuring value has changed from the last reported value, and the change is larger
than ±ΔY predefined limits that are set by user (XDbRepInt), then the measuring channel reports the
new value to a higher level immediately irrespective of cyclic trigger. See Figure 219 for example.

402 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Value

Y1...Y7 : Cyclic reported values, depending upon time Δt.

Y’ and Y” : Deadband reported value, change is greater than setting

Value
Reported

Y5 Y6
+ΔY

-ΔY

Y”
Y’
Y1 Y2 Y7
Y4
Y3

Δt Δt Δt Δt Δt Δt

Time
IEC16000109-2-en.vsdx

IEC16000109 V2 EN-US

Figure 219: Example of value reporting in mode dead band and xx cyclic (xx : 5 sec , 30 sec, 1
min)

Dynamic Amplitude deadband monitoring GUID-ABA7B9A0-B167-4591-9B87-B9010439F64F v1

The purpose of dynamic deadband is to report values more frequently in the critical range. The
motivation is to keep the communication and processing load to a minimum in situations where no
imminent action is necessary.

The term <deadband> is used to describe the maximum deviation between the current value of a
signal and the last reported value.

The current value will be reported when the absolute value of the deviation is larger than the
computed deadband. The set value is entered in percent (as relative deadband), the absolute
deadband is calculated with the set value and the last reported value or actual measured value
(dynamic deadband computation).

Dynamic deadband computation will use smaller of the deadband computed from current value and
deadband computed from the last reported value. As a result, deadband of the last reported value
will be used for values moving away from the critical range, while the current value deadband will be
used when the measured value is approaching the critical range.

range ::= <rMax> - <rMin>

maxDeadBand ::= (<dbRepInt> / 100000) * range

dbRep ::= ( ( Value(rep) – <rMin> ) * maxDeadBand ) / range

Transformer protection RET670 403

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

dbVal ::= ( ( Value(current) – <rMin> ) * maxDeadBand ) / range

dbMin ::= MIN ( dbRep, dbVal)

dbEffective ::= MAX( maxDeadBand/1000 , dbMin)

The effective deadband is always over 0.1% of the total range to prevent excessive reporting of
values close to the minimum value. It is restricted to dB*range using the setting ZdbRepInt, even if
the input value exceeds the configured maximum range value.

A minimum report interval of 250 milli-Seconds is applied to prevent high frequency noise with
amplitudes larger than computed deadband, in the most sensitive value range, from creating
excessive communication load.

Like other deadband profiles, a minimum report rate of 5, 30 or 60 seconds can be specified in the
parameter ZRepTyp. When this time has elapsed, since last report time, the new value will be
reported regardless of deadband or limits.

The applied minimum dead-band for all dead-band types is restricted to 0.1% of the range.

A deadband monitored value will also be reported if the limit value exceeds or when the value cross
over the configure range boundaries.
Rmin

IEC20000216 V1 EN-US

Figure 220: Computed deadband as function of monitored value

Examples for dynamic amplitude deadband handling GUID-119DDCF1-A812-4CE4-8E2A-2328DD79B639 v1

In the following examples, a range from 0 to 1000 is used.

<deadband> (dotted line) is the effective deadband in input units.

<Curr-Rep value> (dashed line) is the absolute value of the difference between current value and last
reported value.

X-axis is time, and Y-axis is signal/deadband/delta value.

404 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

IEC20000217 V1 EN-US

Figure 221: Monotonic increasing value

As the value moves away from critical range (rMin), the deadband increases in steps as a new value
is reported when delta exceeds the deadband calculated with the last reported value. This reported
value will then establish the new deadband.

IEC20000218 V1 EN-US

Figure 222: Monotonic decreasing value

As the input value moves towards critical range, the deadband decreases with value and current
value will be reported when delta exceeds the deadband calculated with the current value.

Transformer protection RET670 405

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

IEC20000219 V1 EN-US

Figure 223: Increasing value, random variation

For values close to rMin the reported value will follow the input value closely, while more variation is
needed for values close to rMax.

IEC20000220 V1 EN-US

Figure 224: Decreasing value, random variation

Grouping of complex values

In order to report a consistent set of data for magnitude and angle, for all three phases, they are
handled as grouped outputs.

• When one signal belonging to a group triggers a sending, then all other signals in the group will
be sent together.
• All cyclic transmission time and dead bands will be reset at transmission.
• The event grouping is only used for IEC 61850 events.

The following outputs are grouped together as shown in Table 219.

406 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Table 219: Grouped outputs

Output IEC 61850 name Description

ZL1, ZL2, ZL3 ZMMMXU.Z.phsA.cVal.mag.f ZL1 Amplitude, magnitude of reported value
ZMMMXU.Z.phsA.cVal.ang.f ZL1 Angle, magnitude of reported value
ZMMMXU.Z.phsA.range ZL1 Amplitude range
ZMMMXU.Z.phsB.cVal.mag.f ZL2 Amplitude, magnitude of reported value
ZMMMXU.Z.phsB.cVal.ang.f ZL2 Angle, magnitude of reported value
ZMMMXU.Z.phsB.range ZL2 Amplitude range
ZMMMXU.Z.phsC.cVal.mag.f ZL3 Amplitude, magnitude of reported value
ZMMMXU.Z.phsC.cVal.ang.f ZL3 Angle, magnitude of reported value
ZMMMXU.Z.phsC.range ZL3 Amplitude range
ZL12, ZL23, ZL31 ZMMMXU.PPZ.phsAB.cVal.mag.f ZL12 Amplitude, magnitude of reported value
ZMMMXU.PPZ.phsAB.cVal.ang.f ZL12 Angle, magnitude of reported value
ZMMMXU.PPZ.phsAB.range ZL12 Amplitude range
ZMMMXU.PPZ.phsBC.cVal.mag.f ZL23 Amplitude, magnitude of reported value
ZMMMXU.PPZ.phsBC.cVal.ang.f ZL23 Angle, magnitude of reported value
ZMMMXU.PPZ.phsBC.range ZL23 Amplitude range
ZMMMXU.PPZ.phsCA.cVal.mag.f ZL31 Amplitude, magnitude of reported value
ZMMMXU.PPZ.phsCA.cVal.ang.f ZL31 Angle, magnitude of reported value
ZMMMXU.PPZ.phsCA.range ZL31 Amplitude range

Measurement ZMMMXU GUID-2DB6F5A4-A3C2-4BBA-8327-393B7F89EDC6 v4

The magnitude and angle of the impedance for each phase-to-earth and phase-to-phase loop are
available on local HMI, monitoring tools within PCM600 or to the station level, for example, via
IEC61850.

Phase-to-earth impedance measurement is calculated based on UL1/ IL1 , UL2 / IL2 , UL3 / IL3 and

phase-to-phase impedance is calculated based on UL1 

 UL 2 / IL1  IL 2 ,
U L2 
 UL 3 / IL 2  IL 3  , U
L3 
 UL1 / IL 3  IL1  , where U LX and ILX are phase-to-earth voltage
and phase current.

When the operating current is too low, the impedance measurement can be erroneous. To avoid such
error, minimum operating current will be checked. For phase-earth currents or phase-phase currents
lower than 2% of IBase, the resistance and reactance of the impedance are forced to 99 999 ohm,
corresponding to a magnitude at 141419 (99 999*√2) ohm and an angle at 45 degree.

Transformer protection RET670 407

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.11.9 Technical data

GUID-6C2EF52A-8166-4A23-9861-38931682AA7D v8

Table 220: ZMFPDIS, ZMFCPDIS technical data

Function Range or value Accuracy

Number of zones 5 selectable -
directions, 2 fixed
directions
Minimum operate current, Ph-Ph (5-6000)% of IBase ±1.0% of Ir
and Ph-E
Positive sequence reactance (0.01 - 3000.00) Pseudo continuous
reach, Ph-E and Ph-Ph loop ohm/p ramp:
±2.0% of set value
Positive sequence resistance (0.00 - 1000.00) Conditions:
reach, Ph-E and Ph-Ph loop ohm/p Voltage range: (0.1-1.1) x Ramp of shots:
Zero sequence reactance reach (0.01 - 9000.00) Ur ±2.0% of set value
ohm/p Current range: (0.5-30) x Conditions:
Ir IEC 60255-121 point B
Zero sequence resistive reach (0.00 - 3000.00) Angle: At 0 degrees and
ohm/p 85 degrees
Fault resistance reach, Ph-E (0.01 -9000.00) ohm/l IEC 60255-121 points
and Ph-Ph A,B,C,D,E

Dynamic overreach < 5% at 85 degrees -

measured with CVTs
and 0.5 < SIR < 30,
IEC 60255-121
Reset ratio 105% typically -
Directional blinders Forward: -15 – 120 Pseudo continuous ramp:
degrees ±2.0 degrees, IEC 60255-121
Reverse: 165 – -60
degrees
Resistance determining the load (0.01 - 5000.00) Pseudo continuous Ramp of shots:
impedance area - forward ohm/p ramp: ±5.0% of set value
±2.0% of set value Conditions:
Conditions: Tested at ArgLd = 30
Tested at ArgLd = 30 degrees
degrees
Angle determining the load 5 - 70 degrees Pseudo continuous ramp:
impedance area ±2.0 degrees
Conditions:
Tested at RLdFw = 20 ohm/p
Definite time delay to trip, Ph-E (0.000-60.000) s ±0.2% of set value or ±35 ms whichever is greater
and Ph-Ph operation
Operate time 16 ms typically, IEC -
60255-121
Reset time at 0.1 to 2 x Zreach Min. = 20 ms -
Max. = 35 ms

408 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.12 High speed distance protection for series compensated

lines ZMFCPDIS GUID-ED71CF5A-1453-4F2F-9C64-3A73C59EA948 v4

8.12.1 Function revision history GUID-96705EE1-C538-4737-AAE9-141287810AAE v3

Document Product History

revision revision
A 2.2.1 Impedance measurement and supervision added (ZMMXU).
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 Transient directional (TD) element added, with associated input and outputs.
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 -
M 2.2.4 Zone BU (Backup) is added. Now there are seven zones in total. Zone 2 direction and
directional blinders (ArgDir, ArgNegRes) are now settable. Setting tTauDC is added; a
parameter for optional fine tuning of performance.
Added new setting RStart, which limits the resistive reach of the phase selection outside
of the ArgLd sector. Changed setting name XLd to XStart.
N 2.2.5 Parallel line mutual coupling compensation feature based on the parallel line residual
current is added with new settings: EnaPar, INPRatio, R0MZ1, X0MZ1, R0MZ2, and
X0MZ2.
Load compensation and direction element are improved for earth faults without zero
sequence current condition.
This update is valid for all the previously released 2.2 products.

8.12.2 Identification GUID-0F03DA72-0687-4762-91CB-EC8E59B86E06 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
High speed distance protection zone ZMFCPDIS 21
(zone 1-6)
Z
S00346 V2 EN-US

8.12.3 Functionality GUID-C5C1ADD8-50A5-4485-848C-77D2222B56DC v10

High speed distance protection (ZMFCPDIS) provides sub-cycle, down towards half-cycle, operate
time for basic faults within 60% of the line length and up to around SIR 5. At the same time, it is
specifically designed for extra care during difficult conditions in high voltage transmission networks,
like faults on long heavily loaded lines and faults generating heavily distorted signals. These faults
are handled with utmost security and dependability, although sometimes with reduced operating
speed.

High speed distance protection ZMFCPDIS is fundamentally the same function as ZMFPDIS but
provides more flexibility in zone settings to suit more complex applications, such as series
compensated lines. In operation for series compensated networks, the parameters of the directional
function are altered to handle voltage reversal.

Transformer protection RET670 409

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

The ZMFCPDIS function is a seven-zone full scheme protection with three fault loops for phase-to-
phase faults and three fault loops for phase-to-earth faults for each of the independent zones, which
makes the function suitable in applications with single-phase autoreclosing.

In each measurement zone, ZMFCPDIS function is designed with the flexibility to operate in either
quadrilateral or mho characteristic mode for separate phase-to-earth or phase-to-phase loops.

A new built-in adaptive load compensation algorithm prevents overreaching of the distance zones in
the load exporting end during phase-to-earth faults on heavily loaded power lines. It also reduces
underreach in the importing end.

The ZMFCPDIS function block incorporates a phase-selection element and a directional element,
contrary to previous designs in the IED series, where these elements were represented with separate
function blocks.

The operation of the phase-selection element is primarily based on current change criteria, with
significant increased dependability. There is also an impedance based part operating as continuous
criteria in parallel.

The directional element utilizes a set of well-established quantities to provide fast and correct
directional evaluation during various conditions, including close-in three-phase faults, simultaneous
faults and faults with only zero-sequence in-feed.

The ZMFCPDIS function has another transient components based directional element with phase
segregated outputs STTDFwLx and STTDRVLx (where, x = 1-3), which are intended for permissive
overreaching transfer trip (POTT) scheme. It provides directionality with high speed, dependability
and security, which is also suitable for extra high voltage and series compensated lines where the
fundamental frequency signals are distorted.

The ZMFCPDIS function is also equipped with the parallel line mutual coupling compensation feature
based on the parallel line residual current.

410 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.12.4 Function block GUID-CBB51E18-15E5-4BC5-A002-6371A6DC725A v1

ZMFCPDIS
I3P* TRIP
U3P* TRZ1
BLOCK TRL1Z1
VTSZ TRL2Z1
BLKZ1 TRL3Z1
BLKZ2 TRZ2
BLKZ3 TRL1Z2
BLKZ4 TRL2Z2
BLKZ5 TRL3Z2
BLKZRV TRZ3
BLKZBU TRZ4
BLKTRZ1 TRZ5
BLKTRZ2 TRZRV
BLKTRZ3 TRZBU
BLKTRZ4 START
BLKTRZ5 STZ1
BLKTRZRV STNDZ1
BLKTRZBU STZ2
BLKTD STL1Z2
EXTNST STL2Z2
ORCND STL3Z2
RELCNDZ1 STNDZ2
RELCNDZ2 STZ3
RELCNDZ3 STNDZ3
RELCNDZ4 STZ4
RELCNDZ5 STNDZ4
RELCNDZRV STZ5
RELCNDZBU STNDZ5
STZRV
STL1ZRV
STL2ZRV
STL3ZRV
STNDZRV
STZBU
STNDZBU
STND
STNDL1
STNDL2
STNDL3
STNDPE
STFWL1
STFWL2
STFWL3
STFWPE
STRVL1
STRVL2
STRVL3
STRVPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
STTDFWL1
STTDFWL2
STTDFWL3
STTDRVL1
STTDRVL2
STTDRVL3

IEC11000422-6-en.vsdx

IEC11000433 V5 EN-US

IEC11000422 V6 EN-US

Figure 225: ZMFCPDIS function block

Transformer protection RET670 411

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.12.5 Signals
PID-7497-INPUTSIGNALS v1

Table 221: ZMFCPDIS Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Blocks and resets timers and outputs of entire function
VTSZ BOOLEAN 0 Blocks and resets timers and outputs of entire function
BLKZ1 BOOLEAN 0 Blocks and resets zone 1 timers and outputs
BLKZ2 BOOLEAN 0 Blocks and resets zone 2 timers and outputs
BLKZ3 BOOLEAN 0 Blocks and resets zone 3 timers and outputs
BLKZ4 BOOLEAN 0 Blocks and resets zone 4 timers and outputs
BLKZ5 BOOLEAN 0 Blocks and resets zone 5 timers and outputs
BLKZRV BOOLEAN 0 Blocks and resets reverse zone timers and outputs
BLKZBU BOOLEAN 0 Blocks and resets backup zone timers and outputs
BLKTRZ1 BOOLEAN 0 Blocks and resets zone 1 timers and trip outputs
BLKTRZ2 BOOLEAN 0 Blocks and resets zone 2 timers and trip outputs
BLKTRZ3 BOOLEAN 0 Blocks and resets zone 3 timers and trip outputs
BLKTRZ4 BOOLEAN 0 Blocks and resets zone 4 timers and trip outputs
BLKTRZ5 BOOLEAN 0 Blocks and resets zone 5 timers and trip outputs
BLKTRZRV BOOLEAN 0 Blocks and resets reverse zone timers and trip outputs
BLKTRZBU BOOLEAN 0 Blocks and resets backup zone timers and trip outputs
BLKTD BOOLEAN 0 Blocks transient direction outputs
EXTNST BOOLEAN 0 External start of zone timers
ORCND INTEGER 0 Word for enabling all zones in OR condition with phase selection
RELCNDZ1 INTEGER 127 Release word for the measuring loops of zone 1
RELCNDZ2 INTEGER 127 Release word for the measuring loops of zone 2
RELCNDZ3 INTEGER 127 Release word for the measuring loops of zone 3
RELCNDZ4 INTEGER 127 Release word for the measuring loops of zone 4
RELCNDZ5 INTEGER 127 Release word for the measuring loops of zone 5
RELCNDZRV INTEGER 127 Release word for the measuring loops of zone RV
RELCNDZBU INTEGER 127 Release word for the measuring loops of zone BU

PID-7497-OUTPUTSIGNALS v1

Table 222: ZMFCPDIS Output signals

Name Type Description

TRIP BOOLEAN Trip in any phase or phases from any zone or zones
TRZ1 BOOLEAN Trip in any phase or phases from zone 1 - forward direction
TRL1Z1 BOOLEAN Trip in phase L1 from zone 1 - forward direction
TRL2Z1 BOOLEAN Trip in phase L2 from zone 1 - forward direction
TRL3Z1 BOOLEAN Trip in phase L3 from zone 1 - forward direction
TRZ2 BOOLEAN Trip in any phase or phases from zone 2 - forward direction
Table continues on next page

412 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Name Type Description

TRL1Z2 BOOLEAN Trip in phase L1 from zone 2 - forward direction
TRL2Z2 BOOLEAN Trip in phase L2 from zone 2 - forward direction
TRL3Z2 BOOLEAN Trip in phase L3 from zone 2 - forward direction
TRZ3 BOOLEAN Trip in any phase or phases from zone 3 - zone direction
TRZ4 BOOLEAN Trip in any phase or phases from zone 4 - zone direction
TRZ5 BOOLEAN Trip in any phase or phases from zone 5 - zone direction
TRZRV BOOLEAN Trip in any phase or phases from zone RV - reverse direction
TRZBU BOOLEAN Trip in any phase or phases from zone BU - zone direction
START BOOLEAN Start in any phase or phases from any zone or zones
STZ1 BOOLEAN Start in any phase or phases from zone 1 - forward direction
STNDZ1 BOOLEAN Start in any phase or phases from zone 1 - any direction
STZ2 BOOLEAN Start in any phase or phases from zone 2 - forward direction
STL1Z2 BOOLEAN Start in phase L1 from zone 2 - forward direction
STL2Z2 BOOLEAN Start in phase L2 from zone 2 - forward direction
STL3Z2 BOOLEAN Start in phase L3 from zone 2 - forward direction
STNDZ2 BOOLEAN Start in any phase or phases from zone 2 - any direction
STZ3 BOOLEAN Start in any phase or phases from zone 3 - zone direction
STNDZ3 BOOLEAN Start in any phase or phases from zone 3 - any direction
STZ4 BOOLEAN Start in any phase or phases from zone 4 - zone direction
STNDZ4 BOOLEAN Start in any phase or phases from zone 4 - any direction
STZ5 BOOLEAN Start in any phase or phases from zone 5 - zone direction
STNDZ5 BOOLEAN Start in any phase or phases from zone 5 - any direction
STZRV BOOLEAN Start in any phase or phases from zone RV - reverse direction
STL1ZRV BOOLEAN Start in phase L1 from zone RV - reverse direction
STL2ZRV BOOLEAN Start in phase L2 from zone RV - reverse direction
STL3ZRV BOOLEAN Start in phase L3 from zone RV - reverse direction
STNDZRV BOOLEAN Start in any phase or phases from zone RV - any direction
STZBU BOOLEAN Start in any phase or phases from zone BU - zone direction
STNDZBU BOOLEAN Start in any phase or phases from zone BU - any direction
STND BOOLEAN Fault detected in any phase or phases - any direction
STNDL1 BOOLEAN Fault detected in phase L1 - any direction
STNDL2 BOOLEAN Fault detected in phase L2 - any direction
STNDL3 BOOLEAN Fault detected in phase L3 - any direction
STNDPE BOOLEAN Fault with earth connection detected in any phase or phases - any
direction
STFWL1 BOOLEAN Fault detected in phase L1 - forward direction
STFWL2 BOOLEAN Fault detected in phase L2 - forward direction
STFWL3 BOOLEAN Fault detected in phase L3 - forward direction
STFWPE BOOLEAN Fault with earth connection detected - forward direction
STRVL1 BOOLEAN Fault detected in phase L1 - reverse direction
STRVL2 BOOLEAN Fault detected in phase L2 - reverse direction
STRVL3 BOOLEAN Fault detected in phase L3 - reverse direction
Table continues on next page

Transformer protection RET670 413

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Type Description

STRVPE BOOLEAN Fault with earth connection detected - reverse direction
STFW1PH BOOLEAN Single-phase fault detected - forward direction
STFW2PH BOOLEAN Two-phase fault detected - forward direction
STFW3PH BOOLEAN Three-phase fault detected - forward direction
STPE BOOLEAN Ph-E zone measurement enabled - any direction
STPP BOOLEAN Ph-Ph zone measurement enabled - any direction
STTDFWL1 BOOLEAN Fault detected in phase L1 by transient directional element -
forward direction
STTDFWL2 BOOLEAN Fault detected in phase L2 by transient directional element -
forward direction
STTDFWL3 BOOLEAN Fault detected in phase L3 by transient directional element -
forward direction
STTDRVL1 BOOLEAN Fault detected in phase L1 by transient directional element -
reverse direction
STTDRVL2 BOOLEAN Fault detected in phase L2 by transient directional element -
reverse direction
STTDRVL3 BOOLEAN Fault detected in phase L3 by transient directional element -
reverse direction

8.12.6 Settings
PID-7497-SETTINGS v1

Table 223: ZMFCPDIS Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups
tTauDC 0.010 - 999.999 s 0.001 999.999 Maximum expected DC time constant in
primary fault current
ZDbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
of range, Int Db: In 0,001%s
ZZeroDb 0 - 100000 m% 100 0 Magnitude zero point clamping in
0,001% of range
ZHiHiLim 0.0 - 5000.0 Ohm 0.1 800.0 High High limit in ohm
ZHiLim 0.0 - 5000.0 Ohm 0.1 150.0 High limit in ohm
ZLowLim 0.0 - 5000.0 Ohm 0.1 50.0 Low limit in ohm
ZLowLowLim 0.0 - 5000.0 Ohm 0.1 35.0 Low Low limit in ohm
ZMin 0.000 - 5000.000 Ohm 0.001 0.005 Minimum value in ohm
ZMax 0.0 - 5000.0 Ohm 0.1 1500.0 Maximum value in ohm
Table continues on next page

414 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Name Values (Range) Unit Step Default Description

ZRepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & 5s cyclic
Db & 30s cyclic
Db & 1min cyclic
Deadband dyn
Db dyn & 5s cyclic
Db dyn & 30s
cyclic
Db dyn & 1min
cyclic
ZLimHys 0.000 - 100.000 % 0.001 0.500 Hysteresis value in % of range and is
common for all limits
ZAngDbRepInt 1 - 100000 Type 1 10 Cyclic report interval (s)

Table 224: ZMFCPDIS Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OperationSC NoSeriesComp - - NoSeriesComp Selection of series compensation
SeriesComp operation Off / On
RLdFw 0.01 - 5000.00 Ohm/p 0.01 60.00 Resistance determining the load
impedance area - forward
RLdRvFactor 1 - 1000 %RLdF 1 100 Resistance factor determining the load
w impedance area - reverse
RStart 0.01 - 5000.00 Ohm/p 0.01 150.00 Resistive limitation of starting
characteristic
XStart 0.01 - 10000.00 Ohm/p 0.01 400.00 Reactive limitation of starting
characteristic
ArgLd 5 - 70 Deg 1 30 Angle determining the load impedance
area
CVTType Any - - Passive type CVT selection determining the filtering of
Passive type the function
None (Magnetic)
ArgDir 5 - 45 Deg 1 15 Angle of blinder in fourth quadrant for
forward direction
ArgNegRes 90 - 175 Deg 1 120 Angle of blinder in second quadrant for
forward direction
OpModePPZ1 Off - - Quadrilateral On/Off and characteristic setting for Ph-
Quadrilateral Ph loops, zone 1
Mho
MhoOffset
OpModePEZ1 Off - - Quadrilateral On/Off and characteristic setting for Ph-E
Quadrilateral loops, zone 1
Mho
MhoOffset
X1FwPPZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
Ph, zone 1, forward direction
R1FwPPZ1 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-
Ph, zone 1, forward direction
RFPPZ1 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 1
X1RvPPZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
Ph, zone 1, reverse direction
Table continues on next page

Transformer protection RET670 415

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Values (Range) Unit Step Default Description

X1FwPEZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
E, zone 1, forward direction
R1FwPEZ1 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-E,
zone 1, forward direction
X0FwPEZ1 0.01 - 9000.00 Ohm/p 0.01 100.00 Zero sequence reactance reach, Ph-E,
zone 1, forward direction
R0FwPEZ1 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, Ph-E,
zone 1, forward direction
RFPEZ1 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 1
X1RvPEZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-
E, zone 1, reverse direction
tPPZ1 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Phase, zone 1
tPEZ1 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Earth, zone 1
IMinOpPPZ1 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone 1
IMinOpPEZ1 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone 1
OpModePPZ2 Off - - Quadrilateral On/Off and characteristic setting for Ph-
Quadrilateral Ph loops, zone 2
Mho
MhoOffset
OpModePEZ2 Off - - Quadrilateral On/Off and characteristic setting for Ph-E
Quadrilateral loops, zone 2
Mho
MhoOffset
DirModeZ2 Non-directional - - Forward Direction of zone 2
Forward
Reverse
X1FwPPZ2 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
Ph, zone 2, forward direction
R1FwPPZ2 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-
Ph, zone 2, forward direction
RFFwPPZ2 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 2,
forward direction
X1RvPPZ2 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
Ph, zone 2, reverse direction
RFRvPPZ2 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 2,
reverse direction
X1FwPEZ2 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
E, zone 2, forward direction
R1FwPEZ2 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-E,
zone 2, forward direction
X0FwPEZ2 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-E,
zone 2, forward direction
R0FwPEZ2 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, Ph-E,
zone 2, forward direction
RFFwPEZ2 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 2,
forward direction
X1RvPEZ2 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
E, zone 2, reverse direction
RFRvPEZ2 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 2,
reverse direction
Table continues on next page

416 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Name Values (Range) Unit Step Default Description

tPPZ2 0.000 - 60.000 s 0.001 0.400 Time delay to trip, Phase-Phase, zone 2
tPEZ2 0.000 - 60.000 s 0.001 0.400 Time delay to trip, Phase-Earth, zone 2
IMinOpPPZ2 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone 2
IMinOpPEZ2 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone 2
OpModePPZ3 Off - - Quadrilateral On/Off and characteristic setting for Ph-
Quadrilateral Ph loops, zone 3
Mho
MhoOffset
OpModePEZ3 Off - - Quadrilateral On/Off and characteristic setting for Ph-E
Quadrilateral loops, zone 3
Mho
MhoOffset
DirModeZ3 Non-directional - - Forward Direction of zone 3
Forward
Reverse
X1FwPPZ3 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
Ph, zone 3, zone direction
R1FwPPZ3 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-
Ph, zone 3, zone direction
RFFwPPZ3 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 3,
zone direction
X1RvPPZ3 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
Ph, zone 3, opposite to zone dir
RFRvPPZ3 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 3,
opposite to zone direction
X1FwPEZ3 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
E, zone 3, zone direction
R1FwPEZ3 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-E,
zone 3, zone direction
X0FwPEZ3 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-E,
zone 3, zone direction
R0FwPEZ3 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, Ph-E,
zone 3, zone direction
RFFwPEZ3 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 3,
zone direction
X1RvPEZ3 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
E, zone 3, opposite to zone dir
RFRvPEZ3 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 3,
opposite to zone direction
tPPZ3 0.000 - 60.000 s 0.001 0.800 Time delay to trip, Phase-Phase, zone 3
tPEZ3 0.000 - 60.000 s 0.001 0.800 Time delay to trip, Phase-Earth, zone 3
IMinOpPPZ3 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone 3
IMinOpPEZ3 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone 3
OpModePPZ4 Off - - Quadrilateral On/Off and characteristic setting for Ph-
Quadrilateral Ph loops, zone 4
Mho
MhoOffset
Table continues on next page

Transformer protection RET670 417

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Values (Range) Unit Step Default Description

OpModePEZ4 Off - - Quadrilateral On/Off and characteristic setting for Ph-E
Quadrilateral loops, zone 4
Mho
MhoOffset
DirModeZ4 Non-directional - - Forward Direction of zone 4
Forward
Reverse
X1FwPPZ4 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
Ph, zone 4, zone direction
R1FwPPZ4 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-
Ph, zone 4, zone direction
RFFwPPZ4 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 4,
zone direction
X1RvPPZ4 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
Ph, zone 4, opposite to zone dir
RFRvPPZ4 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 4,
opposite to zone direction
X1FwPEZ4 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
E, zone 4, zone direction
R1FwPEZ4 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-E,
zone 4, zone direction
X0FwPEZ4 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-E,
zone 4, zone direction
R0FwPEZ4 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, Ph-E,
zone 4, zone direction
RFFwPEZ4 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 4,
zone direction
X1RvPEZ4 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
E, zone 4, opposite to zone dir
RFRvPEZ4 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 4,
opposite to zone direction
tPPZ4 0.000 - 60.000 s 0.001 1.200 Time delay to trip, Phase-Phase, zone 4
tPEZ4 0.000 - 60.000 s 0.001 1.200 Time delay to trip, Phase-Earth, zone 4
IMinOpPPZ4 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone 4
IMinOpPEZ4 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone 4
OpModePPZ5 Off - - Quadrilateral On/Off and characteristic setting for Ph-
Quadrilateral Ph loops, zone 5
Mho
MhoOffset
OpModePEZ5 Off - - Quadrilateral On/Off and characteristic setting for Ph-E
Quadrilateral loops, zone 5
Mho
MhoOffset
DirModeZ5 Non-directional - - Forward Direction of zone 5
Forward
Reverse
X1FwPPZ5 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
Ph, zone 5, zone direction
R1FwPPZ5 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-
Ph, zone 5, zone direction
Table continues on next page

418 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Name Values (Range) Unit Step Default Description

RFFwPPZ5 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 5,
zone direction
X1RvPPZ5 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
Ph, zone 5, opposite to zone dir
RFRvPPZ5 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 5,
opposite to zone direction
X1FwPEZ5 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
E, zone 5, zone direction
R1FwPEZ5 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-E,
zone 5, zone direction
X0FwPEZ5 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-E,
zone 5, zone direction
R0FwPEZ5 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, Ph-E,
zone 5, zone direction
RFFwPEZ5 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 5,
zone direction
X1RvPEZ5 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
E, zone 5, opposite to zone dir
RFRvPEZ5 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 5,
opposite to zone direction
tPPZ5 0.000 - 60.000 s 0.001 1.600 Time delay to trip, Phase-Phase, zone 5
tPEZ5 0.000 - 60.000 s 0.001 1.600 Time delay to trip, Phase-Earth, zone 5
IMinOpPPZ5 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone 5
IMinOpPEZ5 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone 5
OpModePPZRV Off - - Quadrilateral On/Off and characteristic setting for Ph-
Quadrilateral Ph loops, zone RV
Mho
MhoOffset
OpModePEZRV Off - - Quadrilateral On/Off and characteristic setting for Ph-E
Quadrilateral loops, zone RV
Mho
MhoOffset
X1FwPPZRV 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
Ph, zone RV, reverse direction
R1FwPPZRV 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-
Ph, zone RV, reverse direction
RFPPZRV 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone RV
X1RvPPZRV 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
Ph, zone RV, forward direction
X1FwPEZRV 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
E, zone RV, reverse direction
R1FwPEZRV 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-E,
zone RV, reverse direction
X0FwPEZRV 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-E,
zone RV, reverse direction
R0FwPEZRV 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, Ph-E,
zone RV, reverse direction
RFPEZRV 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone RV
X1RvPEZRV 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
E, zone RV, forward direction
Table continues on next page

Transformer protection RET670 419

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Values (Range) Unit Step Default Description

tPPZRV 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Phase, zone
RV
tPEZRV 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Earth, zone RV
IMinOpPPZRV 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone RV
IMinOpPEZRV 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone RV
OpModePPZBU Off - - Quadrilateral On/Off and characteristic setting for Ph-
Quadrilateral Ph loops, zone BU
Mho
MhoOffset
OpModePEZBU Off - - Quadrilateral On/Off and characteristic setting for Ph-E
Quadrilateral loops, zone BU
Mho
MhoOffset
DirModeZBU Non-directional - - Forward Direction of zone BU
Forward
Reverse
X1FwPPZBU 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
Ph, zone BU, zone direction
R1FwPPZBU 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-
Ph, zone BU, zone direction
RFFwPPZBU 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone BU,
zone direction
X1RvPPZBU 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
Ph, zone BU, opposite to zone dir
RFRvPPZBU 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone BU,
opposite to zone direction
X1FwPEZBU 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
E, zone BU, zone direction
R1FwPEZBU 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-E,
zone BU, zone direction
X0FwPEZBU 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-E,
zone BU, zone direction
R0FwPEZBU 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, Ph-E,
zone BU, zone direction
RFFwPEZBU 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone BU,
zone direction
X1RvPEZBU 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, Ph-
E, zone BU, opposite to zone dir
RFRvPEZBU 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone BU,
opposite to zone direction
tPPZBU 0.000 - 60.000 s 0.001 2.000 Time delay to trip, Phase-Phase, zone
BU
tPEZBU 0.000 - 60.000 s 0.001 2.000 Time delay to trip, Phase-Earth, zone BU
IMinOpPPZBU 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone BU
IMinOpPEZBU 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone BU

420 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Table 225: ZMFCPDIS Group settings (advanced)

Name Values (Range) Unit Step Default Description

RLdFwMax 0.01 - 5000.00 Ohm/p 0.01 5000.00 Maximum used resistance determining
the load impedance area, if RLdFw is
greater than RLdFwMax then RLdFw is
set to RLdFwMax
RLdFwMin 0.01 - 5000.00 Ohm/p 0.01 0.01 Minimum used resistance determining
the load impedance area, if RLdFw is
less than RLdFwMin then RLdFw is set
to RLdFwMin
ArgLdMax 5 - 70 Deg 1 70 Maximum used angle determining the
load impedance area, if ArgLd is greater
than ArgLdMax then ArgLd is set to
ArgLdMax
ArgLdMin 5 - 70 Deg 1 5 Minimum used angle determining the
load impedance area, if ArgLd is less
than ArgLdMin then ArgLd is set to
ArgLdMin
ZoneLinkStart Phase Selection - - Phase Selection Selection of start source for all
1st starting zone ZoneLinked trip delay timers
INReleasePE 5 - 400 %MaxIP 1 400 3I0 limit for releasing Phase-to-Earth
h measuring loops
TimerModeZ1 Disable all - - Enable Ph-E On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E PhPh output, zone 1
Enable PhPh
Enable Ph-E PhPh
TimerLinksZ1 LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should be
tPE) tPE) linked for zone 1
LoopLink &
ZoneLink
No Links
TimerModeZ2 Disable all - - Enable Ph-E On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E PhPh output, zone 2
Enable PhPh
Enable Ph-E PhPh
TimerLinksZ2 LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should be
tPE) tPE) linked for zone 2
LoopLink &
ZoneLink
No Links
TimerModeZ3 Disable all - - Enable Ph-E On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E PhPh output, zone 3
Enable PhPh
Enable Ph-E PhPh
TimerLinksZ3 LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should be
tPE) tPE) linked for zone 3
LoopLink &
ZoneLink
No Links
TimerModeZ4 Disable all - - Enable Ph-E On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E PhPh output, zone 4
Enable PhPh
Enable Ph-E PhPh
TimerLinksZ4 LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should be
tPE) tPE) linked for zone 4
LoopLink &
ZoneLink
No Links
Table continues on next page

Transformer protection RET670 421

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Values (Range) Unit Step Default Description

TimerModeZ5 Disable all - - Enable Ph-E On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E PhPh output, zone 5
Enable PhPh
Enable Ph-E PhPh
TimerLinksZ5 LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should be
tPE) tPE) linked for zone 5
LoopLink &
ZoneLink
No Links
TimerModeZRV Disable all - - Enable Ph-E On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E PhPh output, zone RV
Enable PhPh
Enable Ph-E PhPh
TimerLinksZRV LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should be
tPE) tPE) linked for zone RV
LoopLink &
ZoneLink
No Links
TimerModeZBU Disable all - - Enable Ph-E On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E PhPh output, zone BU
Enable PhPh
Enable Ph-E PhPh
TimerLinksZBU LoopLink (tPP-tPE) - - LoopLink (tPP- How start of trip delay timers should be
LoopLink & tPE) linked for zone BU
ZoneLink
No Links

8.12.7 Monitored data

PID-7497-MONITOREDDATA v1

Table 226: ZMFCPDIS Monitored data

Name Type Values (Range) Unit Description

L1Dir INTEGER 1=Forward - Direction in phase L1
2=Reverse
0=No direction
L2Dir INTEGER 1=Forward - Direction in phase L2
2=Reverse
0=No direction
L3Dir INTEGER 1=Forward - Direction in phase L3
2=Reverse
0=No direction
L1L2Dir INTEGER 1=Forward - Direction in loop L1L2
2=Reverse
0=No direction
L2L3Dir INTEGER 1=Forward - Direction in loop L2L3
2=Reverse
0=No direction
L3L1Dir INTEGER 1=Forward - Direction in loop L3L1
2=Reverse
0=No direction
L1R REAL - Ohm Resistance in phase L1
L1X REAL - Ohm Reactance in phase L1
L2R REAL - Ohm Resistance in phase L2
L2X REAL - Ohm Reactance in phase L2
L3R REAL - Ohm Resistance in phase L3
Table continues on next page

422 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Name Type Values (Range) Unit Description

L3X REAL - Ohm Reactance in phase L3
L12R REAL - Ohm Resistance in phase L1-L2
L12X REAL - Ohm Reactance in phase L1-L2
L23R REAL - Ohm Resistance in phase L2-L3
L23X REAL - Ohm Reactance in phase L2-L3
L31R REAL - Ohm Resistance in phase L3-L1
L31X REAL - Ohm Reactance in phase L3-L1
ZL1IMAG REAL - Ohm ZL1 Amplitude, magnitude of
instantaneous value
ZL1ANGIM REAL - deg ZL1 Angle, magnitude of instantaneous
value
ZL2IMAG REAL - Ohm ZL2 Amplitude, magnitude of
instantaneous value
ZL2ANGIM REAL - deg ZL2 Angle, magnitude of instantaneous
value
ZL3IMAG REAL - Ohm ZL3 Amplitude, magnitude of
instantaneous value
ZL3ANGIM REAL - deg ZL3 Angle, magnitude of instantaneous
value
ZL12IMAG REAL - Ohm ZL12 Amplitude, magnitude of
instantaneous value
ZL12ANGIM REAL - deg ZL12 Angle, magnitude of instantaneous
value
ZL23IMAG REAL - Ohm ZL23 Amplitude, magnitude of
instantaneous value
ZL23ANGIM REAL - deg ZL23 Angle, magnitude of instantaneous
value
ZL31IMAG REAL - Ohm ZL31 Amplitude, magnitude of
instantaneous value
ZL31ANGIM REAL - deg ZL31 Angle, magnitude of instantaneous
value

8.12.8 Operation principle GUID-913A0692-F0A7-4B4B-83B4-AC2A96B3A989 v3

Settings, input and output names are sometimes mentioned in the following text
without its zone suffix (i.e. BLKZx instead of BLKZ3) when the description is equally
valid for all zones.

8.12.8.1 Filtering GUID-0EA39CA3-6CDA-41B0-A178-E5800868A0C5 v2

Practically all voltage, current and impedance quantities used within the ZMFCPDIS function are
derived from fundamental frequency phasors filtered by a half-cycle filter.

The phasor filter is frequency adaptive in the sense that its coefficients are changed based on the
estimated power system frequency.

A half-cycle filter will not be able to reject both even and odd harmonics. While odd harmonics will be
completely attenuated, accuracy will be affected by even harmonics. Even harmonics will not cause
the distance zones to overreach; instead there will be a slightly variable underreach, on average in
the same order as the magnitude ratio between the harmonic and the fundamental component.

Transformer protection RET670 423

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.12.8.2 Distance measuring zones GUID-674FC410-9BA3-437E-8358-62E9B81D7B65 v4

The different fault loops within the IED are of full scheme type, which means that earth fault loop for
phase-to-earth faults and phase-to-phase faults for forward and reverse faults are executed in
parallel.

Figure 226 presents an outline of the different measuring loops for the seven distance zones.

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 1

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 2

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 3

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 4

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 5

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone RV

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone BU

IEC05000458‐3‐en.vsdx

IEC05000458 V3 EN-US

Figure 226: The different measuring loops at phase-to-earth fault and phase-to-phase fault
Transients from CVTs may have a significant impact on the transient overreach of a distance
protection. At the same time these transients can be very diverse in nature from one type to the
other; in fact, more diverse than can be distinguished by the algorithm itself in the course of a few
milliseconds. So, a setting is introduced in order to inform the algorithm about the type of CVT
applied and thus providing the advantage of knowing how performance should be optimized, even
during the first turbulent milliseconds of the fault period.

There are two types of CVTs from the function point of view, the passive and the active type, which
refers to the type of ferro-resonance suppression device that is employed. The active type requires
more rigorous filtering which will have a negative impact on operate times. However, this will be
evident primarily at higher source impedance ratios (SIRs), SIR 5 and above, or close to the reach
limit.

The IEC 60044-5 transient classification is of little or no use in relation to this. It is not primarily the
damping of transients that is important; it is the frequency content of the transients that is decisive,
i.e. how difficult it is to filter out the specific frequency. So, even if two CVTs, one passive and the
other active type, comply with the same transient class, the active type requires more extensive
filtering in order to avoid transient overreach.

To avoid overreach and at the same time achieve fast operate times, a supplementary circular
characteristic that includes some alternative processing is implemented. One such circular
characteristic exists for every measuring loop and quadrilateral/mho characteristic. There are no
specific reach settings for this circular zone. It uses the normal quadrilateral/mho zone settings to
determine a reach that will be appropriate. This implies that the circular characteristic will always
have somewhat shorter reach than the quadrilateral/mho zone.

8.12.8.3 Phase-selection element GUID-2BCDB96F-39EE-4C14-9856-D23A4A1B6115 v6

The operation of the phase-selection element is primarily based on current change criteria. The
current change criteria itself can however only be relied on for a short period following the fault
inception (during what we will call the current change phase). Subsequent switching in the network

424 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

may render the change in current invalid. To handle this, the phase-selection element also operates
on impedance based continuous criteria.

The phase-selection element can, owing to the current change criteria, distinguish faults with
minimum influence from load and fault impedance. In other words, it is not restricted by a load
encroachment characteristic during the current change phase. This significantly improves
performance for remote phase-to-earth faults on heavily loaded lines. One exception, however, is
three-phase faults, for which the load encroachment characteristic always has to be applied, in order
to distinguish fault from load.

The continuous criteria will in the vast majority of cases operate in parallel and carry on the fault
indication after the current change phase has ended. Only in some particularly difficult faults on
heavily loaded lines the continuous criteria might not be sufficient, for example, when the estimated
fault impedance resides within the load area defined by the load encroachment characteristic. In this
case, the indication will be restricted to a pulse lasting for one or two power system cycles.

Phase-to-phase-earth faults (also called double earth faults) will practically always activate phase-to-
phase zone measurements. Measurement in two phase-to-earth loops at the same time is
associated with so-called simultaneous faults: two earth faults at the same time, one each on the two
circuits of a double line, or when the zero sequence current is relatively high due to a source with low
Z0/Z1 ratio. In these situations zone measurement will be released both for the related phase-to-
earth loops and the phase-to-phase loop simultaneously. On the other hand, simultaneous faults
closer to the remote bus will gradually take on the properties of a phase-to-phase-earth fault and the
function will eventually use phase-to-phase zone measurements also here.

In cases where the fault current infeed is mostly of zero sequence nature (all phase currents in
phase), the measurement will be performed in the phase-to-earth loops only for a phase-to-phase-
earth fault.

However, should it be desirable to use phase-to-earth (and only phase-to-earth) zone measurement
for phase-to-phase-earth faults, there is a setting INReleasePE that can be lowered from its
excessive default value to the level above which phase-to-earth measurement should be activated.

AND
2-phase Fault
I3P detected by
Impedance/ current
2-phase fault
U3P based Phase PHSLy
AND
selection

PHSLxLy
AND
OR
a
b a>b
250%
OR
a
b a>b
50% AND OR

a
b a<b
INMag
IL1Mag IN / Imax
IL2Mag
MAX
IL3Mag a ForcePE
b a<b

INReleasePE

IEC17000230-2-en.vsdx
IEC17000230 V2 EN-US

Figure 227: Phase-selection logic

8.12.8.4 Directional criteria GUID-24431EEC-5037-41CD-BC4A-7AC196F158F3 v6

Several criteria are employed when making the directional decision. The basis is provided by
comparing a positive sequence based polarizing voltage with phase currents. For extra security,
especially in making a very fast decision, this method is complemented with an equivalent
comparison where, instead of the phase current, the change in phase current is used. Moreover, a
basic negative sequence directional evaluation is taken into account as a reliable reference during

Transformer protection RET670 425

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

high load condition. Finally, a zero sequence directional evaluation is used whenever there is more or
less exclusive zero sequence in-feed.

The directional sectors that represent forward direction, one per measuring loop, are defined by the
following equations.

U PolL1
 ArgDir  arg  ArgNegRes
I L1

IECEQUATION19226 V1 EN-US (Equation 114)

U PolL1L 2
 ArgDir  arg  ArgNegRes
I L1L 2

IECEQUATION19227 V1 EN-US (Equation 115)

Where:
UPolL1 is the polarizing voltage for phase L1.

IL1 is the phase current in phase L1.

UPolL1L2 is the polarizing voltage difference between phase L1 and L2 (L2 lagging L1).

IL1L2 is the current difference between phase L1 and L2 (L2 lagging L1).

The corresponding reverse directional sectors range from (-ArgDir+180) to (ArgNegRes-180)

degrees.

Since the polarizing voltage is also used for the Mho distance characteristics, the magnitude of the
voltage is just as interesting as the phase. If there are symmetrical conditions and the measured per
phase positive sequence voltage magnitude is above 75% of the base voltage before the fault, the
pre-fault magnitude will be memorized and used as long as there is a fault. The phase angle however
will only be memorized (locked) for 75 ms at a time, not to lose synchronism with the real system
voltage.

Should the positive sequence voltage drop below 2% of the base voltage, it will be considered
invalid. In this situation, directional signals and starts from Mho elements will be sealed-in and kept
static as long as there is a fault.

For ZMFCPDIS, when option SeriesComp is chosen for OperationSC, the voltages of faulty phases
will be discarded in order not to affect the polarizing voltage with voltage reversal.

8.12.8.5 Transient directional element GUID-DE9C146F-CD20-4700-B6FF-B81B8DB47631 v1

The ZMFCPDIS function has another directional element with phase segregated outputs STTDFwLx
and STTDRVLx (where, x=1-3), which are intended for the permissive overreaching transfer trip
(POTT) scheme. It provides directionality with high speed, dependability and security. It is also
suitable for extra high voltage and series compensated lines where the fundamental frequency
signals are distorted. The transient directional element is based on the changes in voltage and
current signals due to a fault. The changes can be calculated by subtracting the pre-fault voltage and
current from the measured quantiles due to a fault as shown below:

426 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

u  t   u  t   u p  t 
i  t   i  t   i p  t 
IECEQUATION18056 V1 EN-US (Equation 116)

Where,

∆u(t) and ∆i(t) are the changes in voltage and current due to the fault.

u(t) and i(t) are the measured voltage and current during the fault.

up(t) and ip(t) are the pre-fault voltage and pre-fault current.

When the power network is under stable operation, ∆u(t) and ∆i(t) are negligible. When a fault
occurs, ∆u(t) and ∆i(t) become visible due to the changes in electrical state of the power network.
According to the superposition principle, after a forward fault, ∆u(t) and ∆i(t) are opposite in sign.
While after a reverse fault, ∆u(t) and ∆i(t) are of equal sign.

By inserting a proper replica impedance ZR into the measurement path, a replica delta voltage
ΔuR(t), which is approximately proportional to ∆i(t), is obtained by ΔuR(t) = Δi(t)*ZR. The replica
impedance is optimized in the design to make the relay characteristic angle at 60 degree.
Δu(t)*ΔuR(t) is negative for a forward fault, and positive for a reverse fault.

The operating quantity can be obtained using a simple waveform integration function:

N
2
F t     u  t   u  t    dt
0
R

IECEQUATION18057 V1 EN-US (Equation 117)

Where, N is the number of samples per cycle.

Therefore, the directionality is determined according to the polarities of F(t) as below:

Forward, if F(t) is negative. i.e., F(t) < –Th–

Reverse, if F(t) is positive. i.e., F(t) > Th+

Where, Th– and Th+ are the thresholds for negative and positive polarities of F(t).

To enable good security, the reverse detector is more sensitive compared to the forward one by a
much lower magnitude of Th+ than Th–.

Due to the transient nature, directionality decisions are required to be made after a short duration
when the phase-selection element has detected a fault. Once the decision is made, it issues
directional indications with pulses of duration at about 3-4 cycles.

The transient element has a good sensitivity for the initial fault. In certain cases, for example, a fault
with extremely high fault resistance, where Δu(t) or Δi(t) are very low and the transient directional
element is not active, the fundamental frequency component based directional elements (see Section
Directional criteria) will be available after a certain delay.

8.12.8.6 Fuse failure GUID-AB0D0D20-EF27-4475-8EC5-A3BF69FC5802 v2

The ZMFCPDIS function has to be blocked by an additional function like the Fuse failure supervision
(FUFSPVC) or an equivalent external device. Typically, the binary input VTSZ is used for this
purpose.

However, to guarantee that also very fast operation is blocked in a fuse failure situation, there is a
built-in supervision based on change in current that will delay operation before the FUFSPVC

Transformer protection RET670 427

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

blocking signal is received. The delay will be introduced if no (vector) magnitude change greater than
5% of IBase has been detected in any of the phase currents.

8.12.8.7 Power swings GUID-66627E0F-33AA-4570-9C27-4217EEECC2CE v1

There is need for external blocking of the ZMFCPDIS function during power swings, either from the
Power Swing Blocking function (ZMRPSB) or an external device.

8.12.8.8 Measurement principles

Quadrilateral characteristic GUID-E1366EA0-B04E-4180-BC4C-F042CC8FA8E2 v8
ZMFCPDIS implements quadrilateral and mho characteristic in all the seven zones separately. Set
OpModePEZx or OpModePPZx to Quadrilateral, to choose particular measuring loop in a zone to
work as quadrilateral distance protection.

All ZMFCPDIS zones operate according to the non-directional impedance characteristics presented
in figure 228 and figure 229. The phase-to-earth characteristic is illustrated with the full loop reach
while the phase-to-phase characteristic presents the per-phase reach.

The voltage and current phasors after the half-cycle filter are used in fault loop equations.

For phase-to-phase faults (Figure 230, lower part), the calculated impedances from the relay to the
fault Z calc  Rcalc  j  X calc follow Equation 118 (example is given for a phase L1 to phase L2 fault).

 
U L1  U L 2  I L1  I L 2  Z calc 
IECEQUATION18003 V1 EN-US (Equation 118)

Where and represents the corresponding voltage and current phasors in the respective
phase Ln (n = 1, 2, 3).

The calculated Rcalc and Xcalc are compared with the non-directional phase-to-phase quadrilateral
characteristics. If is inside the non-directional phase-to-phase characteristic, the STNDZx output
is set to TRUE.

For phase-to-earth faults (Figure 230, upper part), the earth return compensation applies according
to Equation 119 (example for a phase L1 to earth fault).

 
U L1  I L1  K N  3I 0  p  Z1  I F  RF
IECEQUATION18007 V1 EN-US (Equation 119)

Where,

p is the fault location and RF is the calculated fault resistance. p and RF are unknown and needs to
be solved.

is the zero-sequence current.

is the earth compensation factor and it is defined as:

Z 0  Z1
KN 
3  Z1
Z 0  R0 FwPEZx  j  X 0 FwPEZx
Z1  R1FwPEZx  j  X 1FwPEZx
IECEQUATION18020 V1 EN-US

Where,

428 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

is the set complex zero-sequence impedance of the line in Ω/phase.

is the set complex positive sequence impedance of the line in Ω/phase.

R1FwPEZx is the positive sequence resistive reach of the line in Ω/phase for phase-to-earth fault in
zone direction for zone x (x = 1 to 5, BU or RV).

X1FwPEZx is the positive sequence reactance reach of the line in Ω/phase for phase-to-earth fault in
zone direction for zone x (x = 1 to 5, BU or RV).

R0FwPEZx is the zero-sequence resistive reach of the line in Ω/phase for phase-to-earth fault in
zone direction for zone x (x = 1 to 5, BU or RV).

X0FwPEZx is the zero-sequence reactance reach of the line in Ω/phase for phase-to-earth fault in
zone direction for zone x (x = 1 to 5, BU or RV).

is the fault current. It is chosen among phase, zero or negative sequence currents automatically
by the built-in adaptive load compensation algorithm. If the system behind the relay cannot contribute
enough zero-sequence current, only phase or negative sequence current will be chosen.

The calculated impedances from the relay to the fault Z calc  Rcalc  j  X calc can be represented as:

X calc  p  X 1FwPEZx
Rcalc  p  R1FwPEZx  RF
IECEQUATION18021 V1 EN-US

When the two unknowns p and RF are solved from the Equation 118 then the calculated Rcalc and
Xcalc values are compared with the non-directional phase-to-earth quadrilateral characteristics. If
is inside the non-directional phase-to-earth characteristic, the STNDZx output is set to TRUE.

The load compensation for zone 1 is achieved by estimating the impedance with three different
values of the IF current with:

• neutral current
• negative sequence current
• phase current.

Impedance estimation is based on the neutral current or negative sequence current essentially that
excludes the current component that causes the over-reach. The reactance values from all the
calculations shall effectively be within the zone reactive boundary in order to get the non-directional
start signal from the zone. This means that the under-reach, that is caused by the load import, is not
compensated.

For the other zones, it is enough in effect if the median value of the three is within the zone reach. If
the neutral current is not sufficient, then the negative sequence current based reactance will
represent the median value. If the negative sequence current is not sufficient, then the other
reactance has to be within the reach.

Transformer protection RET670 429

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

X (Ohm/loop)

X0FwPEZx , X1FwPEZx
XNFwZx <
R1FwPEZx+RNFwZx 3
X1RvPEZx
XNRvZx < XNFwZx √
RFRvPEZx RFFwPEZx X1FwPEZx
R0FwPEZx , R1FwPEZx
RNFwZx <
3
X1RvPEZx
RNRvZx < RNFwZx √
X1FwPEZx
X1RvPEZx
X1FwPEZx+XNFwZx R1RvPEZx < R1FwPEZx √
X1FwPEZx

ιN ιN
R (Ohm/loop)

1) 1)
RFRvPEZx RFFwPEZx

X1RvPEZx+XNRvZx

ιN

RFRvPEZx RFFwPEZx

R1RvPEZx + RNRvZx IEC11000417-3-en.vsd

Settings RFRvPEZx and RFFwPEZx exists for Zones 3 to 5.

1)
For Zone 1, 2 and RV, setting RFPEZx is applicable for both forward and reverse direction.
IEC11000417 V3 EN-US

Figure 228: ZMFCPDIS Characteristic for phase-to-earth measuring loops, ohm/loop domain

430 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

R1FwPPZx
X (Ohm/phase)

RFRvPPZx RFFwPPZx
2 2

X1FwPPZx

ιN
R (Ohm/phase)

1) 1)
RFRvPPZx RFFwPPZx
2 2

X1RvPPZx

ιN

RFRvPPZx RFFwPPZx
2 2
X1RvPPZx IEC11000418-3-en.vsd
R1FwPPZx √
X1FwPPZx

Settings RFRvPPZx and RFFwPPZx exist for Zones 3 to 5.

1)
For Zone 1, 2 and RV, setting RFPPZx is applicable for both forward and reverse direction.
IEC11000418 V3 EN-US

Figure 229: ZMFCPDIS Characteristic for the phase-to-phase measuring loops, ohm/phase
domain

Note that for ZMFCPDIS, the reverse zone ZRV, as well as any of zones 3-5, that
are set to DirMode=Reverse will get their operating impedances inverted (rotated
180 degrees) internally in order to make use of the main settings, which are the
settings designated ‘Fw’. Therefore, a reverse zone will have its Fw-settings
(RFFwPPZRV, X1FwPEZ3, and so on) applied in the third quadrant, that is, towards
the busbar instead of the line.

The fault loop reach in relation to each fault type may also be presented as in figure 230. The main
intention with this illustration is to make clear how the fault resistive reach should be interpreted. Note
in particular that the setting RFPP [2] always represents the total fault resistance of the loop, even
while the fault resistance (arc) may be divided into parts like for three-phase or phase-to-phase-to-
earth faults. R1Zx and jX1Zx represent the positive sequence impedance from the measuring point to
the fault location.

[2] Represents all settings such as RFFwPPZRV, RFRvPPZ5 etc.

Transformer protection RET670 431

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

IL1 R1Zx + j X1Zx

Phase-to-earth
UL1
element

Phase-to-earth
RFPEZx
fault in phase L1
(Arc + tower
resistance)

0
IN (R0Zx-R1Zx)/3 +
j (X0Zx-X1Zx)/3 )

IL1 R1Zx + j X1Zx Phase-to-phase

UL1 element L1-L2
Phase-to-phase
fault in phase RFPPZx
L1-L2 IL2
UL2 (Arc resistance)
R1Zx + j X1Zx

IL1 R1Zx + j X1Zx 0.5·RFPPZx Phase-to-phase

UL1 element L1-L3
Three-phase
fault or Phase-to-
phase-earth fault IL3
UL3
R1Zx + j X1Zx 0.5·RFPPZx
IEC11000419-3-en.vsdx
IEC11000419 V3 EN-US

Figure 230: Fault loop model

The zone impedance characteristic is a product of the two separate characteristics:

• The quadrilateral characteristic

• The directional characteristic

The estimated impedance needs to be inside both characteristics for the zone to start or trip. (The
non-directional start STNDZx is an exception however. It is only dependent on the quadrilateral
characteristic.)

In the following figure, it is shown how the X1PP setting can influence the shape of the quadrilateral
characteristic in the fourth quadrant for short line applications.

432 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

X (ohm)

X1PP’

X1PP
15° R (ohm)
RFPP/2
-X1PP
R· tan15°

-X1PP’
Line distance protection=IEC19000141=2=en-us=Original.vsdx

IEC19000141 V2 EN-US

Figure 231: Influence of X1PP setting on the quadrilateral shape in the fourth quadrant

The quadrilateral phase-to-earth element is added with the parallel line mutual coupling
compensation feature based on the parallel line residual current. The additional current signal must
be connected to the function through the INP group input. The parallel line residual current hardware
channel must be connected to the residual quantity input of the corresponding SMAI block. The
compensation feature can be switched On/Off with the EnPar setting.

When the parallel compensation is switched On (EnPar is On), the phase-to-earth loop Equation 119
is modified according to Equation 120 (example is given for phase L1 to earth fault).

U L1  ( I L1  K N 3I 0  K Nm 3I 0 p ) p  Z1  I F  RF
IECEQUATION20296 V1 EN-US (Equation 120)

3I 0 p is the parallel line residual current

K Nm is the parallel line earth compensation factor and it is defined as:

Z0m
K Nm =
3 Z1
IECEQUATION20299 V1 EN-US

Z 0 m = R0MZx + j X 0MZx
IECEQUATION20300 V1 EN-US

Where,

Z 0m is the set complex zero-sequence mutual impedance between parallel lines in Ω/phase.

is the zero-sequence resistance between parallel lines in Ω/phase for the phase-to-earth
fault in zone direction for zone x (where x = 1 to 2).

is the zero-sequence reactance between parallel lines in Ω/phase for the phase-to-earth
fault in zone direction for zone x (where x = 1 to 2).

Transformer protection RET670 433

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

The compensation feature will only be active when the parallel line residual current is not significantly
higher than the protected line residual current. The deactivation limit of this parallel line
compensation feature is set with the INPRatio setting. Compensation is deactivated when:

3I0p
 INPRatio
3I0
IECEQUATION20302 V1 EN-US

The mutual compensation is also deactivated when the protected line residual current is less than
50% of IMinOp according to the below relation:

3I 0  0.5 IMin0 p
IECEQUATION20303 V1 EN-US

Mho characteristic GUID-DA87F1BC-8037-4E14-96E0-03BCD98ED6F2 v3

ZMFCPDIS implements quadrilateral and mho characteristic in all the seven zones separately. Set
OpModePEZx or OpModePPZx setting to Mho or Offset, to choose a particular measuring loop in a
zone to work as mho (or Offset Mho) distance protection.

Zones 2 to 5 and BU can be selected to be either forward or reverse with positive sequence
polarized mho characteristic; alternatively self polarized offset mho characteristics. The operating
characteristic is in accordance to figure 232 where zone 5 is selected offset mho.

X
ZBU X

Z4
Z3
ZS=0
Z2
Z1 R
Z5 R

ZS=Z1
ZRV
ZS=2Z1

IEC150000 56-2-en.vsdx

IEC15000056 V2 EN-US

Figure 232: Mho, offset mho characteristics and the source impedance influence on the mho
characteristic
The mho characteristic has a dynamic expansion due to the source impedance. Instead of crossing
the origin, as for the mho to the left of figure 232, which is only valid where the source impedance
(Zs) is zero, the crossing point is moved to the coordinates of the negative source impedance given
an expansion of the circle shown to the right of figure 232. Z1 denotes the complex positive
sequence impedance.

The magnitude of the polarized voltage is determined completely by the positive sequence voltage
magnitude from before the fault. This will give a somewhat less dynamic expansion of the mho circle
during faults. However, if the source impedance is high, the dynamic expansion of the mho circle
might lower the security of the function too much with high loading and mild power swing conditions.

434 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Basic operation characteristics GUID-B9D7C3D8-811A-419B-8373-712EC122EB08 v3

In ZMFCPDIS, each zone measurement loop characteristic can be set to mho characteristic or offset
mho characteristic by setting OpModePEZx or OpModePPZx (where x = 1 to 5, BU or RV depending
on selected zone).

ZMFCPDIS fixes zone 1 in Forward mode and zone RV in Reverse mode. Zone 2 to 5 and BU can
be set to Non-directional, Forward or Reverse by setting the parameter DirModeZx (where x = 2 to 5
or BU depending on selected zone).

If DirModeZx (where x = 2 to 5 or BU depending on selected zone) is selected as Non-directional, the

directional element will not have any effect on the measurement loop and operation of the function.
When DirModeZx (where x = 2 to 5 or BU depending on selected zone) is selected as Forward or
Reverse, directional lines are introduced. Information about the directional lines is given from the
directional element. Basic Mho and offset Mho characteristics with different mode settings are
indicated in figure 233.

X X
(a) Rset
X (c)
(b) Rset

(a), (b) and (c)

For Phase-to-Phase fault
Xset Rset=R1FwPPZx; Xset=X1FwPPZx
Xset For Phase-to-earth fault
Rset=R1FwPEZx+RNFwZx
Xset=X1FwPEZx+XNFwZx
R R R X 0 PEZx − X 1 FwPEZx
XNFwZx =
3
R 0 PEZx − R1 FwPEZx
RNFwZx =
Xset 3

Rset

Forward Reverse Non-directional

Mho Characteristics

(d), (e) and (f)

X (e) X (f) X For Phase-to-Phase fault
(d)
RsetFwZx=R1FwPPZx; XsetFwZx=X1FwPPZx
RsetFwZx RsetRvZx=R1RvPPZx; XsetFwZx=X1RvPPZx
RsetFwZx RsetFwZx
R1FwPPZx
R1RvPPZx = X 1 RvPPZx •
X 1FwPPZx

For Phase-to-Earth fault

XsetFwx XsetFwZx
XsetFwZx RsetFwZx = R1FwPEZx + RNFwZx
XsetFwZx = X 1FwPEZx + XNFwZx
R R R X 0FwPEZx − X 1FwPEZx
XNFwZx =
XsetRvZx XsetRvZx XsetRvZx 3
R 0Fw PEZx − R1FwPEZx
RNFwZx =
3
RsetRvZx RsetRvZx = R1RvPEZx + RNRvZx
RsetRvZx RsetRvZx
XsetRvZx = X 1RvPEZx + XNRvZx
R1 RvPEZx
RNRvZx = RNFwZx •
R1 FwPEZx
R1FwPEZx
Forward R1RvPEZx = X 1 RvPEZx •
Reverse Non-directional X 1FwPEZx
X 1RvPEZx
XNRvZx = XNFwZx •
X 1 FwPEZx
Offset Mho Characteristics

(a) and (d) are for Zone 1, Zone 2 and Zone 3-5 when DirModeZ2-BU = Forward
(b) and (e) are for ZoneRV and Zone 3-5 when DirModeZ2-BU = Reverse
(c) and (f) are for Zone 3-5 when DirModeZ2-BU = Non-Directional
X=2 to 5 or BU IEC150000 65-4-en-us.vsdx

IEC15000065 V4 EN-US

Figure 233: Mho and offset Mho characteristics

For each zone, the impedance is set in cartesian coordinates (resistance and reactance) which is the
same as for quadrilateral characteristic.

ZMFCPDIS function uses separate sets of reach settings in forward and reverse directions for phase-
to-earth fault and phase-to-phase fault. These settings are R1FwPPZx, X1FwPPZx, X1RvPPZx,
R1FwPEZx, X1FwPEZx, X1RvPEZx, R0FWPEZx, X0FwPPZx (x= 1 to 5, BU or RV). Thus, the
center of the Non-directional offset mho circle can be arbitrarily located in the circle (figure 233).

Note that the reverse ZoneRV, as well as any of zones 3 to 5 and BU, that are set to
DirModeZx=Reverse will get their operating impedances inverted (rotated 180 degrees) internally in
order to make use of the main settings, which are the settings designated ‘Fw’. Therefore, a reverse
zone will have its Fw-settings (R1FwPPZRV, X1FwPEZ3, and so on) applied in the third quadrant,
that is, towards the busbar instead of the line.

Transformer protection RET670 435

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

In Non-directional mode, for both Mho and Quad, the reach settings are equal to Forward mode in
this respect. The ‘Fw’ settings apply in the first quadrant and the ‘Rv’ settings apply in the third
quadrant.

Theory of operation SEMOD154224-46 v7

The mho algorithm is based on the phase comparison of an operating phasor and a polarizing
phasor. When the operating phasor leads the reference polarizing phasor by 90 degrees or more, the
function operates and gives a trip output.

Phase-to-phase fault GUID-46762EB9-50CA-4045-9D39-80B604C66E0F

SEMOD154224-240 v3
The plain Mho circle has the characteristic as in figure 234. The condition for deriving the angle β is
according to equation 121.

( )
β = arg U L1L 2 − I L1L 2 ⋅ Z 1set − arg U pol ( )
IECEQUATION15027 V1 EN-US (Equation 121)

where

U L1L2 is the voltage vector difference between phases L1 and L2

EQUATION1790 V2
EN-US

I L1L2 is the current vector difference between phases L1 and L2

EQUATION1791
EN-US V2

is the positive sequence impedance setting for phase-to-phase fault in zone direction
Z 1set

is the polarizing voltage

Upol

Z 1set = R1FwPPZx + j ⋅ X 1FwPPZx

IECEQUATION15010 V1 EN-US (Equation 122)

where:
R1FwPPZx is the positive sequence resistive reach for phase-to-phase fault in zone direction for zone x (x=1 to 5,
BU and RV)
X1FwPPZx is the positive sequence reactance reach for phase-to-phase fault in zone direction for zone x (x=1 to 5
BU and RV)

The polarized voltage consists of 100% memorized positive sequence voltage (UL1L2 for phase L1 to
L2 fault). The memorized voltage will prevent collapse of the mho circle for close in faults.

Operation occurs if 90°≤β≤270°.

436 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

IL1L2  jX

I L1L 2  Z1set
UcompUL1L2 IL1L2 Z1set

UL1L2

U pol

I L1L 2  R

IEC15000060-1-en.vsdx

IEC15000060 V1 EN-US

Figure 234: Simplified mho characteristic and vector diagram for phase L1-to-L2 fault
Offset Mho GUID-2E84AD28-CA5F-4D19-B189-57354C8F7CF9 v3
The characteristic for offset mho is a circle where two points on the circle are given by the two
vectors Z 1set and Z 1RVset where Z 1set and Z 1RVset are settable through the resistance and
reactance settings in forward and reverse directions.

The condition for operation at phase-to-phase fault is that the angle β between the two compensated
voltages is greater than or equal to 90° (figure 235). The angle will be 90° for fault location on the
boundary of the circle.

The angle β for L1 to L2 fault can be defined according to equation 124.

 U 
L1L 2  I L1L 2  Z 1set
  arg  
 
 U L1L 2   I L1L 2  Z1set  

IECEQUATION15008 V2 EN-US (Equation 124)

where
is the positive sequence impedance setting for phase-to-phase fault
Z 1RVset opposite to zone direction and is defined as

Z 1RVset = R1RvPPZx + j ⋅ X 1RvPPZx

IECEQUATION15013 V1 EN-US (Equation 125)

Transformer protection RET670 437

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

where
X1RvPPZx is the positive sequence reactance reach for phase-to-phase fault
opposite to zone direction for zone x (x=1 to 5, BU or RV)
R1RvPPZx is the positive sequence resistive reach for phase-to-phase fault
opposite to zone direction for zone x (x=1 to 5, BU or RV) and is
internally calculated according to the equation below,

 R1FwPPZx 
R1RvPPZx = X 1RvPPZx ⋅  
 X 1FwPPZx 
IECEQUATION15014 V1 EN-US (Equation 126)

IL1L 2  jX

Ucomp1  UL1L 2  IL1L 2  Z1set

IL1L 2  Z1set

UL1L 2


Ucomp 2  UL1L 2  IL1L 2  Z1RVset 

IL1L 2  R
IL1L 2  Z1RVset

IEC16000207-1-en.vsdx

IEC16000207 V1 EN-US

Figure 235: Simplified offset mho characteristic and voltage vector for phase L1 to L2 fault
Operation occurs if 90°≤β≤270 °.

Phase-to-earth fault GUID-8A79E50E-9DC0-45DA-A3A7-DF3DBF59618C

SEMOD154224-283 v3
v2
The measuring of earth faults uses earth return compensation applied in a conventional way. The
compensation voltage is derived by considering the influence from the earth return path.

Compensation for earth return path for faults involving earth is done by setting the positive and zero
sequence impedance of the line. It is known that the earth compensation factor KN is,

Z 0set − Z 1set
KN =
3 ⋅ Z 1set
IECEQUATION15017 V1 EN-US

Z 0set = R 0 FwPEZx + j ⋅ X 0 FwPEZx

IECEQUATION15028 V1 EN-US

438 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Z 1set = R1FwPEZx + j ⋅ X 1FwPEZx

IECEQUATION15029 V1 EN-US (Equation 127)

where

Z 0set is the complex zero sequence impedance of the line in Ω/phase

is the complex positive sequence impedance of the line in Ω/phase

Z 1set
R0FwPEZx is the zero sequence resistive reach of the line in Ω/phase for
phase-to-earth fault in zone direction for zone x (x=1 to 5, BU or
RV)
X0FwPEZx is the zero sequence reactance reach of the line in Ω/phase for
phase-to-earth fault in zone direction for zone x (x=1 to 5, BU or
RV)
R1FwPEZx is the positive sequence resistive reach of the line in Ω/phase for
phase-to-earth fault in zone direction for zone x (x=1 to 5, BU or
RV)
X1FwPEZx is the positive sequence reactance reach of the line in Ω/phase for
phase-to-earth fault in zone direction for zone x (x=1 to 5, BU or
RV)

For an earth fault in phase L1, the angle β between the compensation voltage and the polarizing

voltage Upol is,

β = arg [U L1 − ( I L1 + 3I 0 ⋅ K N ) ⋅ Z 1set ] − arg(U pol )

IECEQUATION15021 V1 EN-US (Equation 128)

where
is the phase voltage in faulty phase L1
UL1
is the phase current in faulty phase L1
IL1
3I 0 is the zero-sequence current in faulty phase L1

is the complex positive sequence impedance of the line in Ω/phase

Z 1set for phase-to-earth fault in zone direction

is the polarizing voltage in phase L1

Upol

Transformer protection RET670 439

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

IL1•jX

UcompUL1 (IL1 3I0 KN )  Z1set

3I0KN Z1set

U L1
I L1  Z1set
U pol

IL1•R
IEC15000059-1-en.vsdx

IEC15000059 V1 EN-US

Figure 236: Simplified offset mho characteristic and vector diagram for phase L1-to-earth fault
Operation occurs if 90 °≤β≤270 °.

Offset mho GUID-1CD62635-A76A-41F7-A814-8BB493F5B051 v4

The condition for operation of offset mho at phase-to-earth fault is that the angle β between the two
compensated voltages is equal to or greater than 90°. The angle will be 90° for fault location on the
boundary of the circle.

   
  arg U L1  ( I L1  3I 0  K N )  Z1set  arg U L1   ( I L1  3I 0  K N )  Z1set 

IECEQUATION15022 V2 EN-US (Equation 129)

where
is the complex positive sequence impedance of the line in Ω/phase
Z 1RVset for phase-to-earth fault opposite to zone direction and is defined as,

Z 1RVset = R1RvPEZx + j ⋅ X 1RvPEZx

IECEQUATION15023 V1 EN-US (Equation 130)

where
X1RvPEZx is the positive sequence reactance reach for phase-to-earth fault
opposite to zone direction for zone x (x=1-5, BU and RV)
R1RvPEZx is the positive sequence resistive reach for phase-to-earth fault
opposite to zone direction for zone x (x=1-5 and RV) and expressed
by,

440 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

 R1FwPEZx 
R1RvPEZx = X 1RvPEZx ⋅  
 X 1FwPEZx 
IECEQUATION15024 V1 EN-US (Equation 131)

8.12.8.9 Load encroachment and under-impedance starting element GUID-D846C3D9-4C79-40B5-9ED2-23934214AADB v8

In some cases the load impedance might enter the zone characteristic without any fault on the
protected line. The phenomenon is called load encroachment and it might occur when an external
fault is cleared and high emergency load is transferred on the protected line. The effect of load
encroachment is illustrated in the left part of figure 237. A load impedance within the characteristic
would cause an unwanted trip. The traditional way of avoiding this situation is to set the distance
zone resistive reach with a security margin to the minimum load impedance. The drawback with this
approach is that the sensitivity of the protection to detect resistive faults is reduced.

The IED has a built-in function which shapes the under-impedance starting characteristic according
to the right part of figure 237. The load encroachment algorithm will increase the possibility to detect
high fault resistances, especially for phase-to-earth faults at the remote line end. For example, for a
given setting of the load angle ArgLd the resistive blinder for the zone measurement can be
expanded according to the right part of the figure 237, given higher fault resistance coverage without
risk for unwanted operation due to load encroachment. This is valid in both directions.

The use of the load encroachment feature is essential for long heavily loaded lines, where there
might be a conflict between the necessary emergency load transfer and necessary sensitivity of the
distance protection. The function can also preferably be used on heavy loaded medium long lines.
For short lines, the major concern is to get sufficient fault resistance coverage. Load encroachment is
not a major problem. Nevertheless, always set RLdFw, RLdRv [3] and ArgLd according to the
expected maximum load since these settings are used internally in the function as reference points to
improve the performance of the phase selection.

As already explained the built-in phase selection is mostly based on current change criteria and has
no user defined settings. However, a traditional under-impedance-based phase selector is always
working in parallel with it. This under-impedance-based criterion is defined by the two setting
parameters XStart and RStart, as shown in Figure 237. These two settings are common for both Ph-
Ph and Ph-Gnd measurement loops. In order to ensure proper operation of the distance zones the
under-impedance based starting element shall be set in such a way to always cover (i.e. be larger
than) all used distance zones for both Ph-Ph and Ph-Gnd loops. Consequently, the following settings
are recommended:

Parameter XStart shall be set to a value which is at least 20% bigger than the value obtained by
formula (2*X1FwPEZx+X0FwPEZx)/3 applied for the longest reaching zone.

It is recommended that the RStart setting shall not exceed the load impedance, which is typically
defined as UBase/sqrt(3)/IBase in primary ohms. It is recommended to reduce the RStart set value to
maximum 80% of the above defined load impedance value. However, the RLd settings can be
utilized to get an additional non-operation sector for emergency load, like for when a parallel line is
opened, as shown in Figure 237.

[3] RLdRv=RLdRvFactor*RLdFw.

Transformer protection RET670 441

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Distance Zones
RStart

XStart RLdFw

ArgLd

RLdRvFactor

XStart
* RLdFw
100
RStart

IEC09000248-5-en-us.vsdx
IEC09000248 V5 EN-US

Figure 237: Load encroachment and under-impedance starting characteristic

8.12.8.10 Simplified logic schemes GUID-486BDAF6-6AE2-4671-91AF-4D2F8EBE71AC v7

PHSL1, PHSL2,...PHSL3L1 are internal binary logical signals from the phase-selection element.
They correspond directly to the six loops of the distance zones and determine which loops should be
released to possibly issue a start or a trip.

These signals also have the ORCND input as their source.

The ORCND input enables the use of external elements to supplement the internal phase selection
in specialized applications, like unblocking of the distance protection during power swings. Like with
the other CND signals, each bit of its binary encoded integer number corresponds to one of the six
measuring loops to be enabled. See Figure 238.

PHSL1, PHSL2,… PHSL3L1
Phase selection Zone1

Internal
criteria bitwise
OR bitwise release
AND

Zone2

RELCNDZ1
bitwise release
RELCNDZ2 AND

RELCNDZ3
Zone3

IEC19000323-1-en-us.vsdx
IEC19000323 V1 EN-US

Figure 238: Logic over how ORCND input is used

442 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

FWL1, FWL2,...FWL3L1 and RVL1, RVL2,...RVL3L1 are the internal binary signals from the
directional element. An FW signal is set true if the criteria for a forward fault or load is fulfilled for its
particular loop. The same applies to the reverse (RV) signals.

The internal input 'IN present' is true if the residual current (3I0) exceeds 7% of IBase. However, if
current transformer saturation is detected, this criterion is changed to residual voltage (3U0)
exceeding 5% of UBase/sqrt(3) instead.

FW(Ln & LmLn)

FW(Ln & LmLn)

RV(Ln & LmLn)

DirModeZ3-5, BU
TRUE (1)
FW(Ln & LmLn) Forward
RV(Ln & LmLn) Reverse

IEC12000137-4-en.vsd

IEC12000137 V4 EN-US

Figure 239: Connection of directional signals to zones

Transformer protection RET670 443

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

ZML1Zx PEZx
OR
PHSL1
AND

DIRL1Zx AND
ZML2Zx
PHSL2
AND

DIRL2Zx AND
ZML3Zx L1Zx
OR
PHSL3
AND

DIRL3Zx AND

ZML1L2Zx L2Zx
PHSL1L2 OR
AND

DIRL1L2Zx AND
ZML2L3Zx
PHSL2L3 L3Zx
AND OR
DIRL2L3Zx AND
ZML3L1Zx
PHSL3L1
AND

DIRL3L1Zx AND

L1N
PPZx
L2N OR
L3N
RELCNDZx Integer L1L2
to Bool
L2L3
NDZx
L1L3 OR

IEC12000140-2-en.vsdx
IEC12000140 V2 EN-US

Figure 240: Logic used to derive some common internal signals

444 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

TimerModeZx =
Enable PhPh or
Ph-E PhPh
PPZx AND tPPZx
OR AND
AND t
PEZx
AND tPEZx OR
TimerModeZx = OR
AND t
Enable Ph-E or AND
Ph-E PhPh

VTSZ
BLKZx OR

OR
TimerLinksZx
ZoneLinkStart
LoopLink (tPP-tPE)
Phase Selection
LoopLink & ZoneLink
1st starting zone OR
No Links

LNKZx
FALSE (0) AND
OR
TimerLinksZx =
LoopLink & ZoneLink

EXTNST

IEC12000139-6-en.vsdx
IEC12000139 V6 EN-US

Figure 241: Logic for linking of Zone timers

Transformer protection RET670 445

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

15 ms
TZx
t TRIPZx
AND

TRL1Zx
OR AND
BLOCK
VTSZ TRL2Zx
OR AND
BLKZx
TRL3Zx
AND
15 ms
L1Zx
t STL1Zx
AND
15 ms
L2Zx
t STL2Zx
AND
15 ms
t STL3Zx
AND

PPZx 15 ms
PEZx OR t STARTZx
AND

15 ms
NDZx
t STNDZx
AND

IEC12000138-2-en.vsd
IEC12000138 V2 EN-US

Figure 242: Start and trip outputs

15 ms
OR t STPE
AND

15 ms
OR t
AND

15 ms
OR t STNDL2
PHSL1L2 AND

15 ms
OR t STNDL3
AND

15 ms
OR t STPP
AND

BLOCK STARTND
OR
VTSZ OR

STPHS
STNDPE
AND

IEC12000133-3-en.vsdx
IEC12000133 V3 EN-US

Figure 243: Additional start outputs 1

446 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

PHSL1
FWL1 AND
15 ms
FWL2 AND OR t
AND

FWL3 AND 15 ms
PHSL1L2 OR t STFWL2
AND
FWL1L2 AND
PHSL2L3 15 ms
FWL2L3 AND OR t STFWL3
AND
FWL3L1 AND
OR
STFWPE
IN present AND

STFW1PH
=1
BLOCK
VTSZ OR

STFW2PH
=2

STFW3PH
=3

IEC12000134-2-en.vsd
IEC12000134 V2 EN-US

Figure 244: Additional start outputs 2

PHSL1
RVL1 AND
15 ms
RVL2 AND OR t
AND

RVL3 AND 15 ms
PHSL1L2 OR t STRVL2
AND
RVL1L2 AND
PHSL2L3 15 ms
RVL2L3 AND OR t STRVL3
AND
RVL3L1 AND
OR
STRVPE
IN present AND

BLOCK
VTSZ OR

IEC12000141-2-en.vsdx
IEC12000141 V2 EN-US

Figure 245: Additional start outputs 3

Transformer protection RET670 447

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

TDFWL1 AND
15 ms
TDFWL2 AND OR t
AND
PHSL3
TDFWL3 AND 15 ms
PHSL1L2 OR t STTDFWL2
AND
AND
AND 15 ms
PHSL2L3 OR t STTDFWL3
AND AND
AND
PHSL3L1
AND
AND

PHSL1
TDRVL1 AND
15 ms
TDRVL2 AND OR t
AND

AND 15 ms
OR t STTDRVL2
AND
AND
AND 15 ms
PHSL2L3 OR t STTDRVL3
AND AND
AND
PHSL3L1
AND
AND

VTSZ
OR
BLOCKTD

IEC18000241-1-en.vsdx
IEC18000241 V1 EN-US

Figure 246: Transient directional element

In Figure 246, inputs TDFWLx and TDRVLx (where, x = 1-3) are the directionalities calculated
internally by the transient directional element.

8.12.8.11 Measurement
Measurement supervision SEMOD54417-130 v4
The protection, control, and monitoring IEDs have functionality to measure and further process
information for currents and voltages obtained from the pre-processing blocks. The number of
processed alternate measuring quantities depends on the type of IED and built-in options.

The information on measured quantities is available for the user at different locations:

• Locally by means of the local HMI

• Remotely using the monitoring tool within PCM600 or over the station bus
• Internally by connecting the analogue output signals to the Disturbance Report function

Zero point clamping GUID-4894EF16-3376-48EB-863F-9CE14487ACAB v1

Measured value below zero point clamping limit is forced to zero. This allows the noise in the input
signal to be ignored. The zero point clamping limit is a setting (XZeroDb where X equals Z).

448 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Continuous monitoring of the measured quantity SEMOD54417-140 v5

Users can continuously monitor the measured quantity available in the function block by means of
four defined operating thresholds, see figure 247. The monitoring has two different modes of
operating:

• Overfunction, when the measured quantity exceeds the High limit (XHiLim) or High-high limit
(XHiHiLim) pre-set values
• Underfunction, when the measured quantity decreases under the Low limit (XLowLim) or Low-
low limit (XLowLowLim) pre-set values.

X_RANGE is illustrated in figure 247.

Y = Magnitude of the Measured Quantity

X_RANGE = 3
High-high limit

X_RANGE= 1 Hysteresis
High limit

X_RANGE=0

X_RANGE=0 t

Low limit

X_RANGE=2

Low-low limit
X_RANGE=4

IEC05000657-3-en.vsdx
IEC05000657 V3 EN-US

Figure 247: Presentation of operating limits

Each analogue output has one corresponding supervision level output (X_RANGE). The output
signal is an integer in the interval 0-4 (0: Normal, 1: High limit exceeded, 3: High-high limit exceeded,
2: below Low limit and 4: below Low-low limit).

The logical value of the functional output signals changes according to figure 247.

The user can set the hysteresis (XLimHyst), which determines the difference between the operating
and reset value at each operating point, in wide range for each measuring channel separately. The
hysteresis is common for all operating values within one channel.

Actual value of the measured quantity SEMOD54417-150 v5

The actual value of the measured quantity is available locally and remotely. The measurement is
continuous for each measured quantity separately, but the reporting of the value to the higher levels
depends on the selected reporting mode. The following basic reporting modes are available:

• Cyclic reporting (Cyclic)

• Amplitude dead-band supervision (Dead band)
• Integral dead-band supervision (Int deadband)
• Amplitude Deadband and 5s cyclic
• Amplitude Deadband and 30s cyclic
• Amplitude Deadband and 1min cyclic
• Dynamic Amplitude Deadband
• Dynamic Amplitude Deadband and 5s cyclic
• Dynamic Amplitude Deadband and 30s cyclic
• Dynamic Amplitude Deadband and 60s cyclic

Transformer protection RET670 449

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Cyclic reporting SEMOD54417-158 v3

The cyclic reporting of measured value is performed according to chosen setting (XRepTyp). The
measuring channel reports the value independent of amplitude or integral dead-band reporting.

In addition to the normal cyclic reporting the IED also report spontaneously when measured value
passes any of the defined threshold limits.

Y
Value Reported Value Reported
Value Reported Value Reported
(1st)

Y3 Value Reported
Y2 Y4

Y1 Y5

t (*) t (*) t (*) t (*)

t
Value 1

Value 2

Value 3

Value 4

(*)Set value for t: XDbRepInt Value 5 IEC05000500-2-en.vsdx

IEC05000500 V2 EN-US

Figure 248: Periodic reporting

Amplitude dead-band supervision SEMOD54417-163 v6

If a measuring value is changed, compared to the last reported value, and the change is larger than
the ±ΔY pre-defined limits that are set by user (XDbRepInt), then the measuring channel reports the
new value to a higher level. This limits the information flow to a minimum necessary. Figure 249
shows an example with the amplitude dead-band supervision. The picture is simplified: the process is
not continuous but the values are evaluated with a time interval of one execution cycle from each
other.

450 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Value Reported
Y

Value Reported Value Reported

Value Reported
(1st)
Y3 Y
Y
Y2 Y
Y
Y
Y
Y1

IEC99000529-2-en.vsdx

IEC99000529 V2 EN-US

Figure 249: Amplitude dead-band supervision reporting

After the new value is reported, the ±ΔY limits for dead-band are automatically set around it. The new
value is reported only if the measured quantity changes more than defined by the ±ΔY set limits.

Integral dead-band reporting SEMOD54417-167 v4

The measured value is reported if the time integral of all changes exceeds the pre-set limit
(XDbRepInt), figure 250, where an example of reporting with integral dead-band supervision is
shown. The picture is simplified: the process is not continuous but the values are evaluated with a
time interval of one execution cycle from each other.

The last value reported, Y1 in figure 250 serves as a basic value for further measurement. A
difference is calculated between the last reported and the newly measured value and is multiplied by
the time increment (discrete integral). The absolute values of these integral values are added until
the pre-set value is exceeded. This occurs with the value Y2 that is reported and set as a new base
for the following measurements (as well as for the values Y3, Y4 and Y5).

The integral dead-band supervision is particularly suitable for monitoring signals with small variations
that can last for relatively long periods.

Transformer protection RET670 451

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Y A1 >=
A >= pre-set value
A2 >=
pre-set value pre-set value
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value Reported Y4 A3 A5 A7
Value
(1st) Value
A Reported Y5
Reported Value
Reported Value
Y1 Reported

t
IEC99000530-2-en.vsdx

IEC99000530 V2 EN-US

Figure 250: Reporting with integral dead-band supervision

Measurement ZMMMXU GUID-2DB6F5A4-A3C2-4BBA-8327-393B7F89EDC6 v4

The magnitude and angle of the impedance for each phase-to-earth and phase-to-phase loop are
available on local HMI, monitoring tools within PCM600 or to the station level, for example, via
IEC61850.

Phase-to-earth impedance measurement is calculated based on UL1/ IL1 , UL2 / IL2 , UL3 / IL3 and

phase-to-phase impedance is calculated based on UL1 

 UL 2 / IL1  IL 2 ,
U L2 
 UL 3 / IL 2  IL 3  , U
L3 
 UL1 / IL 3  IL1  , where U LX and ILX are phase-to-earth voltage
and phase current.

When the operating current is too low, the impedance measurement can be erroneous. To avoid such
error, minimum operating current will be checked. For phase-earth currents or phase-phase currents
lower than 2% of IBase, the resistance and reactance of the impedance are forced to 99 999 ohm,
corresponding to a magnitude at 141419 (99 999*√2) ohm and an angle at 45 degree.

452 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.12.9 Technical data

GUID-6C2EF52A-8166-4A23-9861-38931682AA7D v8

Table 227: ZMFPDIS, ZMFCPDIS technical data

Function Range or value Accuracy

Number of zones 5 selectable -
directions, 2 fixed
directions
Minimum operate current, Ph-Ph (5-6000)% of IBase ±1.0% of Ir
and Ph-E
Positive sequence reactance (0.01 - 3000.00) Pseudo continuous
reach, Ph-E and Ph-Ph loop ohm/p ramp:
±2.0% of set value
Positive sequence resistance (0.00 - 1000.00) Conditions:
reach, Ph-E and Ph-Ph loop ohm/p Voltage range: (0.1-1.1) x Ramp of shots:
Zero sequence reactance reach (0.01 - 9000.00) Ur ±2.0% of set value
ohm/p Current range: (0.5-30) x Conditions:
Ir IEC 60255-121 point B
Zero sequence resistive reach (0.00 - 3000.00) Angle: At 0 degrees and
ohm/p 85 degrees
Fault resistance reach, Ph-E (0.01 -9000.00) ohm/l IEC 60255-121 points
and Ph-Ph A,B,C,D,E

Dynamic overreach < 5% at 85 degrees -

measured with CVTs
and 0.5 < SIR < 30,
IEC 60255-121
Reset ratio 105% typically -
Directional blinders Forward: -15 – 120 Pseudo continuous ramp:
degrees ±2.0 degrees, IEC 60255-121
Reverse: 165 – -60
degrees
Resistance determining the load (0.01 - 5000.00) Pseudo continuous Ramp of shots:
impedance area - forward ohm/p ramp: ±5.0% of set value
±2.0% of set value Conditions:
Conditions: Tested at ArgLd = 30
Tested at ArgLd = 30 degrees
degrees
Angle determining the load 5 - 70 degrees Pseudo continuous ramp:
impedance area ±2.0 degrees
Conditions:
Tested at RLdFw = 20 ohm/p
Definite time delay to trip, Ph-E (0.000-60.000) s ±0.2% of set value or ±35 ms whichever is greater
and Ph-Ph operation
Operate time 16 ms typically, IEC -
60255-121
Reset time at 0.1 to 2 x Zreach Min. = 20 ms -
Max. = 35 ms

Transformer protection RET670 453

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.13 Power swing detection, blocking and unblocking

ZMBURPSB GUID-9EA1D091-D5FF-45B1-86E6-E9CDE3DD29BF v1

8.13.1 Function revision history GUID-519970E3-BC9F-4DB7-9608-4CBD4E2ACB30 v2

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 Power swing unblocking feature is made available to have phase selection and thereby,
releasing distance measuring loops for faults during power swing. Added new outputs
FLTL1, FLTL2, FLTL3, FLT1PH, FLT2PH, FLT3PH, STCND, and RELCND. IEC 61850
LN is renamed as ZMBURPSB.
M 2.2.5 -

8.13.2 Identification
GUID-69401D58-00EB-4560-8C35-72AF417E5441 v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Power swing detection, blocking and ZMBURPSB 68
unblocking
Zpsb

SYMBOL-EE V1 EN-US

8.13.3 Functionality GUID-DB043AB6-E571-4DCB-B899-663D13AFDE2E v1

Power swings may occur after disconnection of heavy loads or trip of big generation plants.

Power swing detection, blocking and unblocking function (ZMBURPSB ) is used to detect power
swings and initiate blocking of all distance protection zones.

Also, fault identification and its classification for various types of fault occurrences during the power
swing are available in the ZMBURPSB function. So, six measuring loops used in each distance
protection zone, if blocked during power swing, can be unblocked/released for distance
measurement depending upon the fault type and thereby, reliable fault clearance can be achieved for
faults during power swing.

It is still possible to inhibit the ZMBURPSB function for earth-fault currents during a power swing
without activating power swing unblocking functionality.

454 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.13.4 Function block GUID-C4391A8A-A8FA-42DD-A4F9-B68F05F14922 v1

ZMBURPSB
I3P* START
U3P* ZOUT
BLOCK ZIN
BLKI01 FLTL1
BLKI02 FLTL2
BLK1PH FLTL3
REL1PH FLT1PH
BLK2PH FLT2PH
REL2PH FLT3PH
I0CHECK STCND
TRSP RELCND
EXTERNAL

IEC01000323 V1 EN-US

Figure 251: ZMBURPSB function block

8.13.5 Signals
PID-7380-INPUTSIGNALS v2

Table 228: ZMBURPSB Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKI01 BOOLEAN 0 Block inhibit of start output for slow swing condition
BLKI02 BOOLEAN 0 Block inhibit of start output for subsequent residual current
detection
BLK1PH BOOLEAN 0 Block one-out-of-three-phase operating mode
REL1PH BOOLEAN 0 Release one-out-of-three-phase operating mode
BLK2PH BOOLEAN 0 Block two-out-of-three-phase operating mode
REL2PH BOOLEAN 0 Release two-out-of-three-phase operating mode
I0CHECK BOOLEAN 0 Residual current (3I0) detection used to inhibit start output
TRSP BOOLEAN 0 Single-pole tripping command issued by tripping function
EXTERNAL BOOLEAN 0 Input for external detection of power swing

PID-7380-OUTPUTSIGNALS v1

Table 229: ZMBURPSB Output signals

Name Type Description

START BOOLEAN Power swing detected
ZOUT BOOLEAN Measured impedance within outer impedance boundary
ZIN BOOLEAN Measured impedance within inner impedance boundary
FLTL1 BOOLEAN Fault detected in phase L1 during power swing
FLTL2 BOOLEAN Fault detected in phase L2 during power swing
FLTL3 BOOLEAN Fault detected in phase L3 during power swing
Table continues on next page

Transformer protection RET670 455

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Type Description

FLT1PH BOOLEAN Fault detected in one phase during power swing/Phase to earth
fault detected during power swing
FLT2PH BOOLEAN Fault detected in two phases during power swing/Phase to phase
fault with/without earth detected during power swing
FLT3PH BOOLEAN Fault detected in three phases during power swing/Three phase
fault detected during power swing
STCND INTEGER Binary coded release information for distance measuring loop
RELCND INTEGER Binary coded release information for distance measuring loop
based on power swing condition

8.13.6 Settings
PID-7380-SETTINGS v1

Table 230: ZMBURPSB Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 231: ZMBURPSB Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
X1InFw 0.01 - 3000.00 Ohm/p 0.01 30.00 Inner reactive boundary, forward
R1LIn 0.01 - 1000.00 Ohm/p 0.01 30.00 Line resistance for inner characteristic
angle
R1FInFw 0.01 - 1000.00 Ohm/l 0.01 30.00 Fault resistance coverage to inner
resistive line, forward
X1InRv 0.01 - 3000.00 Ohm/p 0.01 30.00 Inner reactive boundary, reverse
R1FInRv 0.01 - 1000.00 Ohm/l 0.01 30.00 Fault resistance line to inner resistive
boundary, reverse
OperationLdCh Off - - On Operation of load discrimination
On characteristic
RLdOutFw 0.01 - 3000.00 Ohm/p 0.01 30.00 Outer resistive load boundary, forward
ArgLd 5 - 70 Deg 1 25 Load angle determining load impedance
area
RLdOutRv 0.01 - 3000.00 Ohm/p 0.01 30.00 Outer resistive load boundary, reverse
kLdRFw 0.50 - 0.90 Mult 0.01 0.75 Multiplication factor for inner resistive
load boundary, forward
kLdRRv 0.50 - 0.90 Mult 0.01 0.75 Multiplication factor for inner resistive
load boundary, reverse
tEF 0.000 - 60.000 s 0.001 3.000 Timer for overcoming single-pole
reclosing dead time
OpModePSU Off - - Off Operation Off/On of power swing
On unblocking
IMinOpPE 5 - 1000 %IB 1 10 Minimum operate current for phase to
earth loops in % of IBase
IMinOpPP 10 - 1000 %IB 1 15 Minimum operate current for phase to
phase loops in % of IBase

456 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Table 232: ZMBURPSB Group settings (advanced)

Name Values (Range) Unit Step Default Description

tP1 0.000 - 60.000 s 0.001 0.045 Timer for detection of initial power swing
tP2 0.000 - 60.000 s 0.001 0.015 Timer for detection of subsequent power
swings
tW 0.000 - 60.000 s 0.001 0.250 Waiting timer for activation of tP2 timer
tH 0.000 - 60.000 s 0.001 0.500 Timer for holding power swing START
output
tR1 0.000 - 60.000 s 0.001 0.300 Timer giving delay to inhibit by the
residual current
tR2 0.000 - 60.000 s 0.001 2.000 Timer giving delay to inhibit at very slow
swing

8.13.7 Monitored data

PID-7380-MONITOREDDATA v1

Table 233: ZMBURPSB Monitored data

Name Type Values (Range) Unit Description

UL1 REAL - kV Phase L1 votlage
UL2 REAL - kV Phase L2 votlage
UL3 REAL - kV Phase L3 votlage
IL1 REAL - A Phase L1 current
IL2 REAL - A Phase L2 current
IL3 REAL - A Phase L3 current

8.13.8 Operation principle

8.13.8.1 Power swing detection and blocking GUID-336CBF8E-540C-440F-A999-AB5AB92085F1 v1

The power swing detection, blocking and unblocking (ZMBURPSB ) function comprises an inner and
an outer quadrilateral measurement characteristic with load encroachment, as shown in figure 252.

Its principle of operation is based on the measurement of the time it takes for a power swing transient
impedance to pass through the impedance area between the outer and the inner characteristics. The
power swings are identified by transition times longer than a transition time set in corresponding
timers. The impedance measuring principle is the same as that used for the distance protection
zones. The impedance and the characteristic passing times are measured in all three phases
separately.

One-out-of-three or two-out-of-three operating modes can be selected according to the specific

system operating conditions.

Transformer protection RET670 457

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

X1OutFw jX ZL R1LIn
X1InFw DFw

j
DRv
R1FInRv R1FInFw
DFw
ArgLd j

ArgLd
DRv
DFw

DFw

R
DFw
DRv

RLdInRv RLdInFw
DFw

DRv
RLdOutRv RLdOutFw

j DRv X1InRv
X1OutRv

IEC09000222_1_en.vsd
IEC09000222 V1 EN-US

Figure 252: Operating characteristic for ZMBURPSB function (setting parameters in italic)
The impedance measurement within ZMBURPSB function is performed by solving equation 132 and
equation 133 (n = 1, 2, 3 for each corresponding phase L1, L2 and L3).

æ ULn ö
Re çç ÷÷ £ Rset
è ILn ø
EQUATION1183 V2 EN-US (Equation 132)

æ ULn ö
Imçç ÷÷ £ Xset
è ILn ø
EQUATION1184 V2 EN-US (Equation 133)

The Rset and Xset are R and X boundaries.

Resistive reach in forward direction GUID-E63BE60B-2913-4BC5-9B9C-C532804D8162 v1

To avoid load encroachment, the resistive reach is limited in forward direction by setting the
parameter RLdOutFw which is the outer resistive load boundary value while the inner resistive
boundary is calculated according to equation 134.

RLdInFw = kLdRFw·RLdOutFw
EQUATION1185 V2 EN-US (Equation 134)

where:
kLdRFw is a settable multiplication factor less than 1

458 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

The slope of the load encroachment inner and outer boundary is defined by setting the parameter
ArgLd.

The load encroachment in the fourth quadrant uses the same settings as in the first quadrant (same
ArgLd and RLdOutFw and calculated value RLdInFw).

The quadrilateral characteristic in the first quadrant is tilted to get a better adaptation to the distance
measuring zones. The angle is the same as the line angle and derived from the setting of the
reactive reach inner boundary X1InFw and the line resistance for the inner boundary R1LIn. The fault
resistance coverage for the inner boundary is set by the parameter R1FInFw.

From the setting parameter RLdOutFw and the calculated value RLdInFw a distance between the
inner and outer boundary, DFw, is calculated. This value is valid for R direction in first and fourth
quadrant and for X direction in first and second quadrant.

Resistive reach in reverse direction GUID-ECA65E18-4FAD-4605-8340-68B5EFAA4383 v1

To avoid load encroachment in reverse direction, the resistive reach is limited by setting the
parameter RLdOutRv for the outer boundary of the load encroachment zone. The distance to the
inner resistive load boundary RLdInRv is determined by using the setting parameter kLdRRv in
equation 135.

RLdInRv = kLdRRv·RLdOutRv
EQUATION1187 V2 EN-US (Equation 135)

where:
kLdRRv is a settable multiplication factor less than 1

From the setting parameter RLdOutRv and the calculated value RLdInRv, a distance between the
inner and outer boundary, DRv, is calculated. This value is valid for R direction in second and third
quadrant and for X direction in third and fourth quadrant.

The inner resistive characteristic in the second quadrant outside the load encroachment part
corresponds to the setting parameter R1FInRv for the inner boundary. The outer boundary is
internally calculated as the sum of DRv+R1FInRv.

The inner resistive characteristic in the third quadrant outside the load encroachment zone consist of
the sum of the settings R1FInRv and the line resistance R1LIn. The argument of the tilted lines
outside the load encroachment is the same as the tilted lines in the first quadrant. The distance
between the inner and outer boundary is the same as for the load encroachment in reverse direction,
that is DRv.

Reactive reach in forward and reverse direction GUID-BE07E7D9-4659-432B-8EC7-E2BA89BC6A6A v1

The inner characteristic for the reactive reach in forward direction correspond to the setting
parameter X1InFw and the outer boundary is defined as X1InFw + DFw,

where:
DFw = RLdOutFw - KLdRFw · RLdOutFw

The inner characteristic for the reactive reach in reverse direction correspond to the setting
parameter X1InRv for the inner boundary and the outer boundary is defined as X1InRv + DRv.

where:
DRv = RLdOutRv - KLdRRv · RLdOutRv

Transformer protection RET670 459

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Basic detection logic GUID-7AB22E5C-0FAB-49E8-A55E-DC5739BC7AD7 v1

The operation of the Power swing detection ZMBURPSB is only released if the magnitude of the
current is above the setting of the minimum operating current, IMinOpPE.

ZMRBUPSB function can operate in two operating modes:

• The 1 out of 3 operating mode is based on detection of power swing in any of the three phases.
Figure 253 presents a composition of an internal detection signal DET-L1 in this particular
phase.
• The 2 out of 3 operating mode is based on detection of power swing in at least two out of three
phases. Figure 254 presents a composition of the detection signals DET1of3 and DET2of3.

Signals ZOUTLn (outer boundary) and ZINLn (inner boundary) in figure 253 are related to the
operation of the impedance measuring elements in each phase separately (n represents the
corresponding L1, L2 and L3). They are internal signals, calculated by ZMBURPSB function.

The tP1 timer in figure 253 serve as detection of initial power swings, which are usually not as fast as
the later swings are. The tP2 timer become activated for the detection of the consecutive swings, if
the measured impedance exit the operate area and returns within the time delay, set on the tW
waiting timer. The upper part of figure 253 (internal input signal ZOUTL1, ZINL1, AND-gates and tP-
timers) are duplicated for phase L2 and L3. All tP1 and tP2 timers in the figure have the same
settings.

ZOUTL1 AND
0-tP1
ZINL1 0 OR
-loop
0-tP2
-loop
AND
0
OR DET-L1
AND AND

ZOUTL2 OR
ZOUTL3

detected 0
0-tW

IEC05000113-2-en.vsd
IEC05000113 V2 EN-US

Figure 253: Detection of power swing in phase L1

DET-L1
DET-L2 DET1of3 - int.
>1
DET-L3

&

DET2of3 - int.
& >1

&

IEC01000057-2-en.vsd
IEC01000057-TIFF V2 EN-US

Figure 254: Detection of power swing for 1-of-3 and 2-of-3 operating mode

460 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

ZOUTL1 ZOUT
OR
ZOUTL2 ZINL1
ZIN
ZOUTL3 AND ZINL2 OR

ZINL3
tEF
TRSP
t AND

I0CHECK

10 ms
AND t
BLKI02 OR

tR1
AND t INHIBIT
OR
-loop
tR2
BLKI01 AND t
BLOCK
-loop
DET1of3 - int.
REL1PH
AND
BLK1PH
tH
DET2of3 - int. OR t
REL2PH
AND
BLK2PH OR START
AND
EXTERNAL

en05000114.vsd
IEC05000114 V1 EN-US

Figure 255: Simplified block diagram for ZMBURPSB function

Operating and inhibit conditions GUID-51C6AD26-E88D-4D4E-A225-A4625E1F4CA1 v1

Figure 255 presents a simplified logic diagram for the Power swing detection function ZMBURPSB.
The internal signals DET1of3 and DET2of3 relate to the detailed logic diagrams in figure 253 and
figure 254 respectively.

Selection of the operating mode is possible by the proper configuration of the functional input signals
REL1PH, BLK1PH, REL2PH, and BLK2PH.

The load encroachment characteristic can be switched off by setting the parameter OperationLdCh =
Off, but notice that the DFw and DRv will still be calculated from RLdOutFw and RLdOutRv. The
characteristic will in this case be only quadrilateral.

There are four different ways to form the internal INHIBIT signal:

• Logical 1 on functional input BLOCK inhibits the output START signal instantaneously.
• The INHIBIT internal signal is activated, if the power swing has been detected and the
measured impedance remains within its operate characteristic for the time, which is longer than
the time delay set on tR2 timer. It is possible to disable this condition by connecting the logical 1
signal to the BLKI01 functional input.
• The INHIBIT internal signal is activated after the time delay, set on tR1 timer, if an earth-fault
appears during the power swing (input IOCHECK is high) and the power swing has been

Transformer protection RET670 461

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

detected before the earth-fault (activation of the signal I0CHECK). It is possible to disable this
condition by connecting the logical 1 signal to the BLKI02 functional input.
• The INHIBIT logical signals becomes logical 1, if the functional input I0CHECK appears within
the time delay, set on tEF timer activated by the input signal TRSP and the impedance has been
seen within the outer characteristic of ZMBURPSB operate characteristic in all three phases.
This function prevents the operation of ZMBURPSB function in cases, when the circuit breaker
closes onto persistent single-phase fault after single-phase autoreclosing dead time, if the initial
single-phase fault and single-phase opening of the circuit breaker causes the power swing in the
remaining two phases.

8.13.8.2 Power swing unblocking GUID-99A7FA04-74B6-48AF-A444-E64EB04CFA60 v1

Operation of power swing unblocking feature is set to On/Off by a configurable setting parameter
OpModePSU. Power swing unblocking enables reliable phase selection (i.e. accurate selection of
faulty phases) for various types of faults that occur during power swing and keeps healthy phase(s)
remain blocked during power swing.

Filtering GUID-04D2D0B4-98CB-44E0-95A2-955687EB9F76 v1
The calculation of current change criteria (i.e. delta quantities) is implemented from a sample-based
algorithm. The algorithm yields zero changes in currents irrespective of regular load flow and power
swing conditions, while it gives significant changes in currents during power system faults.

Phase selection during power swing GUID-C8A977D0-5872-4676-9382-DD46954B986A v1

Operation of the phase selection element is primarily based on change of current criteria with
increased reliability. There are fault scenarios during power swing where change in current is not
detectable. So, a change in ucosφ (that is, ducosφ, where φ is the impedance angle) based
algorithm is also implemented although it is slow in operation in comparison with the delta current
based algorithm. It compliments the delta current based algorithm.

The phase selection element consists of three phase-to-earth loops and three phase-to-phase loops
which are executed in parallel. Phase-to-phase-earth faults (also called double earth faults)
practically activate phase-to-phase loop for distance measurement.

Phase-to-earth fault detection during power swing GUID-194171AE-6D20-41A5-9A4D-2FB7FCA9DB5C v1

The internal signal FLTL1E is set high when the following conditions are met:

• Power swing condition exists

• Change of current in phase L1 exists during the fault
• Magnitude of the residual current is above 20.0% IB
• Magnitude of the L1E loop current is above set IMinOpPE value

Since delta quantities exist for a short period, the internal signal, FLTL1E is sealed-in as long as
either negative sequence current is above 12.0% IB or residual current is above 20.0% IB.

or

• Power swing condition exists

• Change in ucosφ of L1E loop is approximately zero during the fault
• Magnitude of the negative current is above 12.0% IB or magnitude of the residual current is
above 20.0% IB
• Magnitude of the L1E loop current is above the set IMinOpPE value

The above logic is also valid for the remaining two phase-to-earth loops. Output FLT1PH is set to the
logical 1 if any of three phase-to-earth loops detects a fault during power swing. In case of phase-to-
phase-earth on the protected line, no output from the phase-to-earth loops is shown to avoid
overreaching or underreaching of the distance measuring zones.

If the input signal BLOCK is high during the fault period, output FLT1PH is reset to a logical 0.

462 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Phase-to-phase fault detection during power swing GUID-6945064D-F7D8-41D4-9179-C545D2BB8229 v1

The internal signal FLTL12 is set high when the following conditions are met:

• Power swing condition exists

• Change of current in phases L1 and L2 exist during the fault
• Magnitude of the negative current is above 12.0% IB
• Magnitude of the L1L2 loop current is above set IMinOpPP value

Since delta quantities exist for a short period, the internal signal, FLTL12 is sealed-in as long as
negative sequence current is above 12.0% IB.

or

• Power swing condition exists

• Change in ucosφ of L1L2 loop is approximately zero during the fault
• Magnitude of the negative current is above 12.0% IB
• Magnitude of the L1L2 loop current is above the set IMinOpPP value

The above logic is also valid for the remaining two phase-to-phase loops. Output FLT2PH is set to
the logical 1 if any of three phase-to-phase loops detects a fault during power swing.

If the input signal BLOCK is high during the fault period, output FLT2PH is reset to a logical 0.

Phase-to-phase-earth fault detection during power swing GUID-5F806A00-DF7C-4FE8-A401-A51FBC274FBB v1

The internal signal FLTL12 is set high when the following conditions are met:

• Power swing condition exists

• Change of current in phases L1 and L2 exist during the fault
• Magnitude of the residual current is above 20.0% IB
• Magnitude of the L1L2 loop current is above set IMinOpPP value

Since delta quantities exist for a short period, the internal signal, FLTL12 is sealed-in as long as
either negative sequence current is above 12.0% IB or residual current is above 20.0% IB.

or

• Power swing condition exists

• Change in ucosφ of L1L2 loop is approximately zero during the fault
• Magnitude of the negative current is above 12.0% IB or magnitude of the residual current is
above 20.0% IB
• Magnitude of the L1L2 loop current is above the set IMinOpPP value

The above logic is also valid for the remaining two phase-to-phase loops. Output FLT2PH is set to
the logical 1 if any of three phase-to-phase loops detects a fault during power swing.

If the input signal BLOCK is high during the fault period, output FLT2PH is reset to a logical 0.

Three-phase fault detection during power swing GUID-EECD9C97-7D01-4B58-9948-B4A3228C9C99 v1

Conditions to detect three-phase fault with or without earth connection are as follows:

• Power swing condition exists

• Change of currents in all phases exist
• Magnitude of the phase-to-phase voltages are below 75.0% UB
• Impedance angle measured between phase-to-phase voltages and currents of that loop is
between 45.0 - 110.0 deg
• Rate of change in impedance angle of each phase-to-phase loop is below 5.73 deg to ensure
that fault is discriminated from power swing
• Magnitude of the phase currents is above set IMinOpPE value

Output FLT3PH is set high and sealed-in if the rate of change in impedance angle is lower than 5.73
deg and voltage magnitude in all phases restore above 75.0% UB.

Transformer protection RET670 463

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

or

• Power swing condition exists

• Change of currents in all phases exist
• Change of voltages in all phases exist in negative direction
• Magnitude of the phase currents is above the set IMinOpPE value

Output FLT3PH is set high and sealed-in if the rate of change in impedance angle is lower than 5.73
deg.

or

• Power swing condition exists

• Change of ucosφ in all phases is approximately zero during the fault
• Magnitude of the phase currents is above the set IMinOpPE value

Detected three-phase fault activates all phase-to-phase loops for distance measurement i.e. output
STCND shows 56.

If the input signal BLOCK is high during the fault period, output FLT3PH is reset to a logical 0.

Release logic for distance measuring zones GUID-02F8C1F8-2AA4-4485-ADFB-FF9F3CC2A550 v1

After the fault detection during power swing, respective loop(s) are released for a distance measuring
zone depending on the fault type. Output STCND is provided to indicate the faulty loop(s) as a binary
coded integer and must be connected to the input ORCND of the ZMF(C)PDIS function. STCND
shows 0 if the setting parameter OpModePSU is set to Off.

Code build up for the output STCND to release the measuring fault loops is as follows:

STCND = L1N*1 + L2N*2 + L3N*4 + L1L2*8 + L2L3*16 + L3L1*32

Also, outputs FLTL1, FLTL2 and FLTL3 are shown to indicate the faulty phases during power swing.
The logical diagram of the phase selection logic implemented in ZMBURPSB is depicted in Figure
256.

464 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

BLOCK

FLTL12
&
FLTL23
&
FLT2PH
FLTL31 1
&

FLTL1E
&
&
FLTL2E
& FLT1PH
& 1
FLTL3E
&
&

Bit to word
FLT3PH
b0
&
1 b1
STCND
b2
b3
b4
1 b5

1

FLTL1
1

FLTL2
1

FLTL3
1

IEC19000324 V1 EN-US

Figure 256: Release logic for distance measuring zones

Figure 257 shows the releasing condition for a distance measuring zone. Output RELCND is
provided based on the power swing condition as a binary coded integer and it must be connected to
the input RELCNDZx (where x = 1, 2, 3…) of the ZMF(C)PDIS function.

START
&
OpModePSU
STCND RELCND
T
63 F

IEC19000325 V1 EN-US

Figure 257: Logical diagram of a releasing logic for distance protection function
If the setting parameter OpModePSU is set to On and the output START (i.e. power swing is
detection) is high, RELCND indicates the faulty loop(s) information for the power system faults during
power swing and releases the measuring loops for faults.

If either the setting parameter OpModePSU is set to Off or the output START (no power swing
detection) is low, RELCND indicates 63, i.e. all six loops are released for distance measuring. It
means that no phase selection is performed inside the ZMBURPSB function. However, phase

Transformer protection RET670 465

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

selection is performed in ZMF(C)PDIS function to release the distance measuring loop for distance
measurement.

Usage of outputs START, STCND and RELCND of the ZMBURPSB function

together with ZMF(C)PDIS function to achieve power swing blocking and unblocking
features is explained in the Application manual.

8.13.9 Technical data

GUID-E65CE996-C0CE-4620-8E01-A96896E62802 v1

Table 234: ZMBURPSB technical data

Function Range or value Accuracy

Reactive reach (0.10-3000.00) W/phase ±2.0% static accuracy
Conditions:
Voltage range: (0.1-1.1) x Ur
Current range: (0.5-30) x Ir
Resistive reach (0.10–1000.00) W/loop Angle: at 0 degrees and 85 degrees

Power swing detection operate time (0.000-60.000) s ±0.2% or ±10 ms whichever is greater
Second swing reclaim operate time (0.000-60.000) s ±0.2% or ±20 ms whichever is greater
Minimum operate current, Ph-E (5-1000)% of IBase ±1.0% of Ir

8.14 Automatic switch onto fault logic ZCVPSOF SEMOD153633-1 v3

8.14.1 Function revision history GUID-A7F84AD6-F164-491B-B25E-D3BB002E1BDA v3

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 Updated technical data for setting parameters tDuration, tDLD and tOperate.
M 2.2.5 -

8.14.2 Identification
SEMOD155890-2 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Automatic switch onto fault logic ZCVPSOF - -

466 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.14.3 Functionality SEMOD153644-5 v9

Automatic switch onto fault logic ZCVPSOF is a function that gives an instantaneous trip when
closing the breaker onto a fault. A dead-line detection check is provided to activate ZCVPSOF when
the line is de-energized.

Mho distance protections cannot operate for switch onto fault conditions when the phase voltages
are close to zero. An additional logic based on UI Level is used for this purpose.

ZCVPSOF is a complementary function to the distance protection function. It is enabled for operation
either by the closing command to the circuit breaker (normally closed auxiliary contact of the circuit
breaker) to the BC input or automatically by the dead-line detection. Once enabled, it remains active
for tSOTF duration after the enabling signal is reset. The protection function can be enabled for
tripping during the activated time by connecting the functions included in the terminal to the ZACC
input. Therefore, the start of the selected protection functions connected to ZACC during the enabled
condition results in an immediate TRIP output from the function.

8.14.4 Function block SEMOD156265-4 v6

IEC06000459 V3 EN-US

Figure 258: ZCVPSOF function block

8.14.5 Signals SEMOD156281-1 v2

PID-3875-INPUTSIGNALS v11

Table 235: ZCVPSOF Input signals

Name Type Default Description

I3P GROUP - Current DFT
SIGNAL
U3P GROUP - Voltage DFT
SIGNAL
BLOCK BOOLEAN 0 Block of function
START_DLYD BOOLEAN 0 Start from function to be accelerated with delay by SOTF
BC BOOLEAN 0 External enabling of SOTF
ZACC BOOLEAN 0 Distance zone to be accelerated by SOTF

PID-3875-OUTPUTSIGNALS v10

Table 236: ZCVPSOF Output signals

Name Type Description

TRIP BOOLEAN Trip output

8.14.6 Settings IP15016-1 v2

PID-3875-SETTINGS v11

Table 237: ZCVPSOF Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Transformer protection RET670 467

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Table 238: ZCVPSOF Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
AutoInitMode DLD disabled - - DLD disabled Automatic switch onto fault initialization
Voltage
Current
Current & Voltage
Mode Impedance - - UILevel Mode of operation of SOTF Function
UILevel
UILvl&Imp
IPh< 1 - 100 %IB 1 20 Current level for detection of dead line in
% of IBase
UPh< 1 - 100 %UB 1 70 Voltage level for detection of dead line in
% of UBase
tDuration 0.000 - 60.000 s 0.001 0.020 Time delay for UI detection (s)
tSOTF 0.000 - 60.000 s 0.001 1.000 Drop off delay time of switch onto fault
function
tDLD 0.000 - 60.000 s 0.001 0.200 Delay time for activation of dead line
detection
tOperate 0.03 - 120.00 s 0.01 0.03 Time delay to operate of switch onto fault
function

8.14.7 Monitored data

PID-3875-MONITOREDDATA v8

Table 239: ZCVPSOF Monitored data

Name Type Values (Range) Unit Description

IL1 REAL - A Current in phase L1
IL2 REAL - A Current in phase L2
IL3 REAL - A Current in phase L3
UL1 REAL - kV Voltage in phase L1
UL2 REAL - kV Voltage in phase L2
UL3 REAL - kV Voltage in phase L3

8.14.8 Operation principle SEMOD153665-4 v8

The automatic switch onto fault logic ZCVPSOF can be activated externally (by the breaker-closed
input) or internally (automatically) with the dead-line detection using the UI level-based logic. When
the setting AutoInitMode is DLD disabled, ZCVPSOF is activated by an external binary input BC.
When the setting AutoInitMode is set to Voltage, Current or Current & Voltage modes, ZCVPSOF is
activated by the dead-line detection.

The activation from the dead-line detection function is released if the internal signal DeadLine from
the UILevel Detector function is activated at the same time as the inputs ZACC and START_DLYD
are not activated at least for the duration of tDLD. The internal signal DeadLine from the UILevel
Detector function is activated under any of the following conditions:

• If all three-phase currents are below the setting IPh< and the AutoInitMode setting is set to
Current
• If all three-phase voltages are below the setting UPh< and the AutoInitMode setting is set to
Voltage
• If all three-phase currents and voltages are below the settings IPh< and UPh< and the
AutoInitMode setting is set to Current & Voltage

468 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Once the dead line drops off after energization or once BC drops off, the activated signal is extended
for the duration of tSOTF.

The internal signal SOTFUILevel is activated if the phase voltage is below the set UPh< and the
corresponding phase current is above the set IPh< for a time longer than the duration set by
tDuration.

To get the TRIP signal, one of the different operate modes must also be selected with the Mode
parameter:

• Mode = Impedance; TRIP is released if either the ZACC input (connected normally to a
nondirectional distance protection start zone) or the START_DLYD input is activated. If
START_DLD is activated, TRIP is released after a delay of tOperate.
• Mode = UILevel; TRIP is released if UILevel detector is activated
• Mode = UILvl&Imp; TRIP is released based either on the impedance-measured criteria or
UILevel detection

The ZCVPSOF function can be blocked by activating the input BLOCK.

The measured phase voltages and currents are provided as service values.
BLOCK
15ms
BC TRIP
& t

ZACC tSOTF
tDLD t
START_DLYD ≥1
& t

≥1
tOperate
t

I3P
U3P

DeadLine
IPh< UILevel tDuration
Detector t
UPh<

AutoInitMode

&
Mode = Impedance

SOTFUILevel
& ≥1
Mode = UILevel

≥1
&
Mode = UILvl&Imp

IEC07000084 V3 EN-US

Figure 259: Simplified logic diagram for Automatic switch onto fault logic

8.14.9 Technical data SEMOD173230-1 v1

M16043-1 v14

Table 240: ZCVPSOF technical data

Parameter Range or value Accuracy

Operate voltage, detection of dead line (1–100)% of UBase ±0.5% of Ur

Operate current, detection of dead line (1–100)% of IBase ±1.0% of Ir

Time delay to operate for the switch (0.03-120.00) s ±0.2% or ±30 ms whichever is greater
onto fault function
Table continues on next page

Transformer protection RET670 469

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Parameter Range or value Accuracy

Time delay for UI detection (0.000-60.000) s ±0.2% or ±30 ms whichever is greater
Delay time for activation of dead line (0.000-60.000) s ±0.2% or ±30 ms whichever is greater
detection
Drop-off delay time of switch onto fault (0.000-60.000) s ±0.2% or ±30 ms whichever is greater
function

8.15 Power swing logic PSLPSCH SEMOD153597-1 v3

8.15.1 Function revision history GUID-DFB27CD5-5AC0-4D8B-B306-F74173F71E4E v1

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 -
M 2.2.4 -
N 2.2.5 Deleted DO Rx

8.15.2 Identification
SEMOD175682-2 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Power swing logic PSLPSCH - -

8.15.3 Functionality SEMOD131350-4 v5

Power Swing Logic (PSLPSCH) provides possibility for selective tripping of faults on power lines
during system oscillations (power swings or pole slips), when the distance protection function should
normally be blocked. The complete logic consists of two different parts:

• Communication and tripping part: provides selective tripping on the basis of special distance
protection zones and a scheme communication logic, which are not blocked during the system
oscillations.
• Blocking part: blocks unwanted operation of instantaneous distance protection zone 1 for
oscillations, which are initiated by faults and their clearing on the adjacent power lines and other
primary elements.

470 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.15.4 Function block SEMOD171917-4 v3

PSLPSCH
BLOCK TRIP
STZMUR STZMURPS
STZMOR BLKZMUR
STPSD BLKZMOR
STDEF CS
STZMPSD
CACC
AR1P1
CSUR
CR

IEC07000026-3-en.vsd
IEC07000026 V3 EN-US

Figure 260: PSLPSCH function block

8.15.5 Signals
PID-3664-INPUTSIGNALS v7

Table 241: PSLPSCH Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
STZMUR BOOLEAN 0 Start of the underreaching zone
STZMOR BOOLEAN 0 Start of the overreaching zone
STPSD BOOLEAN 0 Power swing detected
STDEF BOOLEAN 0 Start from Earth Fault Protection in forward or reverse direction
STZMPSD BOOLEAN 0 Operation of Power Swing Detection external characteristic
CACC BOOLEAN 0 Overreaching ZM zone to be accelerated
AR1P1 BOOLEAN 0 Single pole auto-reclosing in progress
CSUR BOOLEAN 0 Carrier send by the underreaching power-swing zone
CR BOOLEAN 0 Carrier receive signal during power swing detection operation

PID-3664-OUTPUTSIGNALS v7

Table 242: PSLPSCH Output signals

Name Type Description

TRIP BOOLEAN Trip through Power Swing Logic
STZMURPS BOOLEAN Start of Underreaching zone controlled by PSL to be used in
configuration
BLKZMUR BOOLEAN Block trip of underreaching impedance zone
BLKZMOR BOOLEAN Block trip of overreaching distance protection zones
CS BOOLEAN Carrier send signal controlled by the power swing

Transformer protection RET670 471

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.15.6 Settings
PID-3664-SETTINGS v6

Table 243: PSLPSCH Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
tDZ 0.000 - 60.000 s 0.001 0.050 Permitted max oper time diff between
higher and lower zone
tDZMUR 0.000 - 60.000 s 0.001 0.200 Delay for oper of underreach zone with
detected diff in oper time
tCS 0.000 - 60.000 s 0.001 0.100 Conditional timer for sending the CS at
power swings
tTrip 0.000 - 60.000 s 0.001 0.100 Conditional timer for tripping at power
swings
tBlkTr 0.000 - 60.000 s 0.001 0.300 Timer for blocking the overreaching
zones trip

8.15.7 Operation principle

8.15.7.1 Communication and tripping logic SEMOD131352-4 v2

Communication and tripping logic as used by the power swing distance protection zones is
schematically presented in figure 261.

STDEF
AR1P1 &

STPSD tCS
CS
BLOCK & t &

CSUR
BLKZMPS
tBlkTr &
tTrip t
t

CACC TRIP
>1
CR &

en06000236.vsd
IEC06000236 V1 EN-US

Figure 261: Simplified logic diagram – power swing communication and tripping logic
The complete logic remains blocked as long as there is a logical one on the BLOCK functional input
signal. Presence of the logical one on the STDEF functional input signal also blocks the logic as long
as this block is not released by the logical one on the AR1P1 functional input signal. The functional
output signal BLKZMPS remains logical one as long as the function is not blocked externally (BLOCK
is logical zero) and the earth-fault is detected on protected line (STDEF is logical one), which is
connected in three-phase mode (AR1P1 is logical zero). Timer tBlkTr prolongs the duration of this
blocking condition, if the measured impedance remains within the operate area of the Power Swing
Detection (ZMRPSB) function (STPSD input active). The BLKZMPS can be used to block the
operation of the power-swing zones.

472 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Logical one on functional input CSUR, which is normally connected to the TRIP functional output of a
power swing carrier sending zone, activates functional output CS, if the function is not blocked by
one of the above conditions. It also activates the TRIP functional output.

Initiation of the CS functional output is possible only, if the STPSD input has been active longer than
the time delay set on the security timer tCS.

Simultaneous presence of the functional input signals PLTR_CRD and CR (local trip condition) also
activates the TRIP functional output, if the function is not blocked by one of the above conditions and
the STPSD signal has been present longer then the time delay set on the trip timer tTrip.

8.15.7.2 Blocking logic SEMOD131352-14 v2

Figure 262 presents the logical circuits, which control the operation of the underreaching zone (zone
1) at power swings, caused by the faults and their clearance on the remote power lines.

&

BLKZMH
&
STZML tZL
STZMLL
BLOCK & t >1
&
STMZH tDZ
STZMPSD & t
>1
STPSD

&
-loop

en06000237.vsd
IEC06000237 V1 EN-US

Figure 262: Control of underreaching distance protection (Zone 1) at power swings caused by
the faults and their clearance on adjacent lines and other system elements
The logic is disabled by a logical one on functional input BLOCK. It can start only if the following
conditions are simultaneously fulfilled:

• STPSD functional input signal must be a logical zero. This means, that Power swing detection
(ZMRPSB) function must not detect power swinging over the protected power line.
• STZMPSD functional input must be a logical one. This means that the impedance must be
detected within the external boundary of ZMRPSB function.
• STZMOR functional input must be a logical one. This means that the fault must be detected by
the overreaching distance protection zone, for example zone 2.

The STZMURPS functional output, which can be used in complete terminal logic instead of a normal
distance protection zone 1, becomes active under the following conditions:

• If the STZMUR signal appears at the same time as the STZMOR or if it appears with a time
delay, which is shorter than the time delay set on timer tDZ.
• If the STZMUR signal appears after the STZMOR signal with a time delay longer than the delay
set on the tDZ timer, and remains active longer than the time delay set on the tZL timer.

The BLKZMOR functional output signal can be used to block the operation of the higher distance
protection zone, if the fault has moved into the zone 1 operate area after tDZ time delay.

Transformer protection RET670 473

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

SEMOD171935-5 v5

Table 244: PSLPSCH technical data

Function Range or value Accuracy

Permitted maximum operating time (0.000 — 60.0000) s ±0,2% or ±15 ms whichever is greater
difference between higher and lower
zone
Delay for operation of underreach zone (0.000 — 60.0000) s ±0,2% or ±15 ms whichever is greater
with detected difference in operating
time
Conditional timer for sending the CS at (0.000 — 60.0000) s ±0,2% or ±15 ms whichever is greater
power swings
Conditional timer for tripping at power (0.000 — 60.0000) s ±0,2% or ±15 ms whichever is greater
swings
Timer for blocking the overreaching (0.000 — 60.0000) s ±0,2% or ±15 ms whichever is greater
zones trip

8.16 Pole slip protection PSPPPAM SEMOD156709-1 v2

8.16.1 Identification
SEMOD158949-2 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Pole slip protection PSPPPAM Ucos 78

8.16.2 Functionality
SEMOD143246-17 v7
Sudden events in an electric power system such as large changes in load, fault occurrence or fault
clearance, can cause power oscillations referred to as power swings. In a non-recoverable situation,
the power swings become so severe that the synchronism is lost, a condition referred to as pole
slipping. The main purpose of the pole slip protection (PSPPPAM) is to detect, evaluate, and take the
required action for pole slipping occurrences in the power system.

8.16.3 Function block SEMOD172911-4 v3

PSPPPAM
I3P* TRIP
U3P* TRIP1
BLOCK TRIP2
BLKGEN START
BLKMOTOR ZONE1
EXTZONE1 ZONE2
GEN
MOTOR
SFREQ
SLIPZOHM
SLIPZPER
UCOS
UCOSPER

IEC10000045-1-en.vsd
IEC10000045 V1 EN-US

Figure 263: PSPPPAM function block

474 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.16.4 Signals
PID-3526-INPUTSIGNALS v3

Table 245: PSPPPAM Input signals

Name Type Default Description

I3P GROUP - Current group connection
SIGNAL
U3P GROUP - Voltage group connection
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKGEN BOOLEAN 0 Block operation in generating direction
BLKMOTOR BOOLEAN 0 Block operation in motor direction
EXTZONE1 BOOLEAN 0 Extension of zone1 with zone2 region

PID-3526-OUTPUTSIGNALS v3

Table 246: PSPPPAM Output signals

Name Type Description

TRIP BOOLEAN Common trip signal
TRIP1 BOOLEAN Trip1 after the N1Limit slip in zone1
TRIP2 BOOLEAN Trip2 after the N2Limit slip in zone2
START BOOLEAN Common start signal
ZONE1 BOOLEAN First slip in zone1 region
ZONE2 BOOLEAN First slip in zone2 region
GEN BOOLEAN Generator is faster than the system
MOTOR BOOLEAN Generator is slower than the system
SFREQ REAL Slip frequency
SLIPZOHM REAL Slip impedance in ohms
SLIPZPER REAL Slip impedance in percent of ZBase
UCOS REAL UCosPhi voltage
UCOSPER REAL UCosPhi voltage in percent of UBase

8.16.5 Settings
PID-3526-SETTINGS v3

Table 247: PSPPPAM Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation On / Off
On
OperationZ1 Off - - On Operation Zone1 On / Off
On
OperationZ2 Off - - On Operation Zone2 On / Off
On
ImpedanceZA 0.00 - 1000.00 % 0.01 10.00 Forward impedance in % of Zbase
ImpedanceZB 0.00 - 1000.00 % 0.01 10.00 Reverse impedance in % of Zbase
ImpedanceZC 0.00 - 1000.00 % 0.01 10.00 Impedance of zone1 limit in % of Zbase
AnglePhi 72.00 - 90.00 Deg 0.01 85.00 Angle of the slip impedance line
StartAngle 0.0 - 180.0 Deg 0.1 110.0 Rotor angle for the start signal
Table continues on next page

Transformer protection RET670 475

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Name Values (Range) Unit Step Default Description

TripAngle 0.0 - 180.0 Deg 0.1 90.0 Rotor angle for the trip1 and trip2 signals
N1Limit 1 - 20 - 1 1 Count limit for the trip1 signal
N2Limit 1 - 20 - 1 3 Count limit for the trip2 signal

Table 248: PSPPPAM Group settings (advanced)

Name Values (Range) Unit Step Default Description

ResetTime 0.000 - 60.000 s 0.001 5.000 Time without slip to reset all signals

Table 249: PSPPPAM Non group settings (basic)

Name Values (Range) Unit Step Default Description

MeasureMode PosSeq - - PosSeq Measuring mode (PosSeq, L1L2, L2L3,
L1L2 L3L1)
L2L3
L3L1
InvertCTcurr No - - No Invert current direction
Yes
GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

8.16.6 Monitored data

PID-3526-MONITOREDDATA v3

Table 250: PSPPPAM Monitored data

Name Type Values (Range) Unit Description

SFREQ REAL - Hz Slip frequency
SLIPZOHM REAL - Ohm Slip impedance in ohms
SLIPZPER REAL - % Slip impedance in percent of ZBase
UCOS REAL - kV UCosPhi voltage
UCOSPER REAL - % UCosPhi voltage in percent of UBase

8.16.7 Operation principle SEMOD155755-4 v5

If the generator is faster than the power system, the rotor movement in the impedance and voltage
diagram is from right to left and generating is signaled. If the generator is slower than the power
system, the rotor movement is from left to right and motoring is signaled (the power system drives
the generator as if it were a motor).

The movements in the impedance plane can be seen in Figure 264. The transient behavior is
described by the transient EMF's EA and EB, and by X'd, XT and the transient system impedance ZS.

476 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Zone 1 Zone 2

EB X’d XT XS EA

IED
B A

jX

XS

Pole slip
impedance XT
d Apparent generator
movement impedance R

X’d

IEC06000437_2_en.vsd
IEC06000437 V2 EN-US

Figure 264: Movements in the impedance plain

where:
X'd = transient reactance of the generator

XT = short-circuit reactance of the unit step-up transformer

ZS = impedance of the power system A

The detection of rotor angle is enabled when:

• the minimum current exceeds 0.10 IN (IN is IBase parameter set under general setting).
• the maximum voltage falls below 0.92 UBase
• the voltage Ucosφ (the voltage in phase with the generator current) has an angular velocity of
0.2...8 Hz and
• the corresponding direction is not blocked.

Transformer protection RET670 477

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

en07000004.vsd
IEC07000004 V1 EN-US

Figure 265: Different generator quantities as function of the angle between the equivalent
generators
An alarm is given when movement of the rotor is detected and the rotor angle exceeds the angle set
for 'WarnAngle'.

Slipping is detected when:

• a change of rotor angle of min. 50 ms is recognized

• the slip line is crossed between ZA and ZB.

When the impedance crosses the slip line between ZB and ZC it counts as being in zone 1 and
between ZC and ZA in zone 2. The entire distance ZA-ZB becomes zone 1 when signal EXTZONE1
is high (external device detects the direction of the centre of slipping).

After the first slip, the signals ZONE1 or ZONE2 and – depending on the direction of slip - either GEN
or MOTOR are issued.

Every time pole slipping is detected, the impedance of the point where the slip line is crossed and the
instantaneous slip frequency are displayed as measurements.

Further slips are only detected, if they are in the same direction and if the rate of rotor movement has
reduced in relation to the preceding slip or the slip line is crossed in the opposite direction outside
ZA-ZB. A further slip in the opposite direction within ZA-ZB resets all the signals and is then signalled
itself as a first slip.

The TRIP1 tripping command and signal are generated after N1 slips in zone 1, providing the rotor
angle is less than TripAngle. The TRIP2 signal is generated after N2 slips in zone 2, providing the
rotor angle is less than TripAngle.

All signals are reset if:

• the direction of movement reverses

• the rotor angle detector resets without a slip being counted or
• no rotor relative movement was detected during the time ResetTime.

478 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Imin > 0.10 IBase

Ucos< 0.92 UBase AND

START
AND
0.2  Slip.Freq.  8 Hz

  startAngle

ZONE1
AND
Z cross line ZC - ZB

ZONE2
AND
Z cross line ZA - ZC

Counter
a
ab
N1Limit b TRIP1
AND

  tripAngle OR
TRIP

Counter
a
ab
N2Limit b TRIP2
AND

IEC07000005.vsd

IEC07000005 V2 EN-US

Figure 266: Simplified logic diagram for pole slip protection PSPPPAM

8.16.8 Technical data SEMOD175138-1 v1

GUID-88E02516-1BFE-4075-BEEB-027484814697 v2

Table 251: PSPPPAM technical data

Function Range or value Accuracy

Impedance reach (0.00 - 1000.00)% of Zbase ±2.0% of Ur/Ir

Zone 1 and Zone 2 trip counters (1 - 20) -

Transformer protection RET670 479

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.17 Out-of-step protection OOSPPAM GUID-667DAF85-B87B-47AA-9EAA-CD349E66F22F v3

8.17.1 Identification
GUID-BF2F1533-BA39-48F0-A55C-0B13A393F780 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Out-of-step protection OOSPPAM 78

<

8.17.2 Functionality GUID-BF2F7D4C-F579-4EBD-9AFC-7C03296BD5D4 v8

The out-of-step protection (OOSPPAM ) function in the IED can be used for both generator protection
and as well for line protection applications.

The main purpose of the OOSPPAM function is to detect, evaluate, and take the required action
during pole slipping occurrences in the power system.

The OOSPPAM function detects pole slip conditions and trips the generator as fast as possible, after
the first pole-slip if the center of oscillation is found to be in zone 1, which normally includes the
generator and its step-up power transformer. If the center of oscillation is found to be further out in
the power system, in zone 2, more than one pole-slip is usually allowed before the generator-
transformer unit is disconnected. A parameter setting is available to take into account the circuit
breaker opening time. If there are several out-of-step relays in the power system, then the one which
finds the center of oscillation in its zone 1 should operate first.

Two current channels I3P1 and I3P2 are available in OOSPPAM function to allow the direct
connection of two groups of three-phase currents; that may be needed for very powerful generators,
with stator windings split into two groups per phase, when each group is equipped with current
transformers. The protection function performs a simple summation of the currents of the two
channels I3P1 and I3P2.

8.17.3 Function block GUID-CB98C615-8A93-438D-9DF0-542F333198AC v4

OOSPPAM
I3P1* TRIP
I3P2* TRIPZ1
U3P* TRIPZ2
BLOCK START
BLKGEN GENMODE
BLKMOT MOTMODE
EXTZ1 R
X
SLIPFREQ
ROTORANG
UCOSPHI

IEC12000188-3-en.vsd
IEC12000188 V3 EN-US

Figure 267: OOSPPAM function block

480 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.17.4 Signals
PID-3539-INPUTSIGNALS v10

Table 252: OOSPPAM Input signals

Name Type Default Description

I3P1 GROUP - Group connection for three-phase current input 1
SIGNAL
I3P2 GROUP - Group connection for three-phase current input 2
SIGNAL
U3P GROUP - Group connection for three-phase voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKGEN BOOLEAN 0 Block operation in generating direction
BLKMOT BOOLEAN 0 Block operation in motor direction
EXTZ1 BOOLEAN 0 Extension of zone1 reach to zone2 settings

PID-3539-OUTPUTSIGNALS v10

Table 253: OOSPPAM Output signals

Name Type Description

TRIP BOOLEAN Common trip, issued when either zone 1 or zone 2 give trip
TRIPZ1 BOOLEAN Zone 1 trip
TRIPZ2 BOOLEAN Zone 2 trip
START BOOLEAN Set when measured impedance enters lens characteristic
GENMODE BOOLEAN Generator rotates faster than the system during pole slip
MOTMODE BOOLEAN Generator rotates slower than the system during pole slip
R REAL Real part of measured positive-sequence impedance % of
UBase/(sqrt(3)*IBase)
X REAL Imaginary part of measured positive-seq impedance % of UBase/
(sqrt(3)*IBase)
SLIPFREQ REAL Slip frequency in Hz
ROTORANG REAL Rotor angle as estimated by the out-of-step function
UCOSPHI REAL Estimated Ucos(Phi) voltage during pole slip, in V

8.17.5 Settings
PID-3539-SETTINGS v10

Table 254: OOSPPAM Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OperationZ1 Off - - On Operation Zone1 Off / On
On
ReachZ1 1.00 - 100.00 % ZFw 0.01 50.00 Percentage part of total forward
impedance; defines Z1 reach
OperationZ2 Off - - On Operation Zone2 Off / On
On
tBreaker 0.000 - 1.000 s 0.001 0.040 Breaker opening time; use default 0s
value if it is unknown

Transformer protection RET670 481

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Table 255: OOSPPAM Group settings (advanced)

Name Values (Range) Unit Step Default Description

NoOfSlipsZ1 1 - 20 - 1 1 Number of pole-slips in zone 1 required
to get zone 1 trip
NoOfSlipsZ2 1 - 60 - 1 3 Number of pole-slips in zone 2 required
to get zone 2 trip
tReset 1.000 - 60.000 s 0.001 6.000 Time without any slip required to
completely reset function

Table 256: OOSPPAM Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups
ForwardR 0.00 - 1000.00 %ZB 0.01 1.00 Real part of total forward impedance for
Z2, in % of UBase/(sqrt(3)*IBase)
ForwardX 0.00 - 1000.00 %ZB 0.01 10.00 Imag. part of total forward impedance for
Z2, in % of UBase/(sqrt(3)*IBase)
ReverseR 0.00 - 1000.00 %ZB 0.01 1.00 Real part of source impedance behind
relay, in % of UBase/(sqrt(3)*IBase)
ReverseX 0.00 - 1000.00 %ZB 0.01 10.00 Imag. part of source impedance behind
relay, in % of UBase/(sqrt(3)*IBase)
InvertCTCurr No - - No Invert current direction
Yes

Table 257: OOSPPAM Non group settings (advanced)

Name Values (Range) Unit Step Default Description

StartAngle 90.0 - 130.0 Deg 0.1 110.0 Angle between two rotors to get the start
signal, in deg
TripAngle 15.0 - 90.0 Deg 0.1 60.0 Maximum rotor angle to allow trip
signals, in deg

8.17.6 Monitored data

PID-3539-MONITOREDDATA v8

Table 258: OOSPPAM Monitored data

Name Type Values (Range) Unit Description

CURRENT REAL - A Magnitude of the measured positive-
sequence current, in A
VOLTAGE REAL - kV Magnitude of the measured positive-
sequence voltage, in V
R REAL - % Real part of measured positive-
sequence impedance % of UBase/
(sqrt(3)*IBase)
X REAL - % Imaginary part of measured positive-seq
impedance % of UBase/(sqrt(3)*IBase)
SLIPFREQ REAL - Hz Slip frequency in Hz
ROTORANG REAL - deg Rotor angle as estimated by the out-of-
step function
UCOSPHI REAL - kV Estimated Ucos(Phi) voltage during pole
slip, in V

482 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.17.7 Operation principle

GUID-787EEB01-B760-4D4B-AB4E-1DCD6ABFFF5E v6

General
Under balanced and stable conditions, a generator operates with a constant rotor angle (power
angle), delivering active electrical power to the power system, which is approximately equal to the
input mechanical power on the generator axis.The currents and voltages are constant and stable. An
out-of-step condition is characterized by periodic changes in the rotor angle, that leads to a wild flow
of the synchronizing power; so there are also periodic changes of rotational speed, currents and
voltages. When displayed in the complex impedance plane, these changes are characterized by a
cyclic change in the complex load impedance Z(R, X) as measured at the terminals of the generator,
or at the location of the instrument transformers of a power line connecting two power subsystems.
This is shown in Figure 268.

1.5 ← trajectory
of Z(R, X)

to the 3rd
The 2nd pole-slip
Imaginary part (X) of Z in Ohms

1 The 1st X in Ohms

pole slip
pole slip
occurred Pre-disturbance
occurred
RE normal load
- - -- -
- - - - ----------- - - - - Z(R, X)
0.5 - -
--- 1 ------ --
Zone 2 - - 3 --- -
--
- -- 2 -- - 0
- --- -
^ --^ ^ ^ ^---^ ^ ^ ^ ^ ^ ^ ---- -
- - ^ ^-- ^ ^ ^ --^
Zone 1 - ---- - -
0 - -- relay ---- -
- - -
- -
- --- - - R in Ohms
limit of reach → -- -- -
-
-
-- ---
-- - -- -
lens determined - - →----- ------ 0- - - pre-disturbance Z(R, X)
- -------- →
-0.5 by the setting - - - - - - - - - -1 → Z(R, X) under 3-phase fault
StartAngle = 120° SE 2 → Z(R, X) when fault cleared
3 → Z when pole-slip declared

-1
-1.5 -1 -0.5 0 0.5 1 1.5
Real part (R) of Z in Ohms
IEC10000109-1-en.vsd
IEC10000109 V1 EN-US

Figure 268: Loci of the complex impedance Z(R, X) for a typical case of generator losing step
after a short circuit that was not cleared fast enough
Under typical, normal load conditions, when the protected generator supplies the active and the
reactive power to the power system, the complex impedance Z(R, X) is in the 1st quadrant, point 0 in
Figure 268. One can see that under a three-phase fault conditions, the centre of oscillation is at the
point of fault, point 1, which is logical, as all three voltages are zero or near zero at that point. Under
the fault conditions the generator accelerated and when the fault was finally cleared, the complex
impedance Z(R, X) jumped to the point 2. By that time, the generator has already lost its step, Z(R,
X) continues its way from the right-hand side to the left-hand side, and the 1st pole-slip cannot be
avoided. If the generator is not immediately disconnected, it will continue pole-slipping — see Figure
268, where two pole-slips (two pole-slip cycles) are shown. Under out-of-step conditions, the centre
of oscillation is where the locus of the complex impedance Z(R, X) crosses the (impedance) line
connecting the points SE (Sending End), and RE (Receiving End). The point on the SE – RE line
where the trajectory of Z(R, X) crosses the impedance line can change with time and is mainly a
function of the internal induced voltages at both ends of the equivalent two-machine system, that is,
at points SE and RE.

Measurement of the magnitude, direction and rate-of-change of load impedance relative to a

generator’s terminals provides a convenient and generally reliable means of detecting whether
machines are out-of-step and pole-slipping is taking place. Measurement of the rotor (power) angle δ
is important as well.

Transformer protection RET670 483

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Rotor (power) angle δ can be thought of as the angle between the two lines, connecting point 0 in
Figure 268, that is, Z(R, X) under normal load, with the points SE and RE, respectively. These two
lines are not shown in Figure 268. Normal values of the power angle, that is, under stable, steady-
state, load conditions, are from 30 to 60 electrical degrees. It can be observed in Figure 269 that the
angle reaches 180 degrees when the complex impedance Z(R, X) crosses the impedance line SE –
RE. It then changes the sign, and continues from -180 degrees to 0 degrees, and so on. Figure 269
shows the rotor (power) angle and the magnitude of Z(R, X) against time for the case from Figure
268.

4
|Z| in Ohms
rotor (power)
3 normal angle in rad
angle
Impe dance Z in Ohm and rotor a ngle in radian ®

load
Z(R, X) unde r fa ult lies |Z|
2
on the impe dance line
or nea r (for 3-ph faults )
1
0
0
fault 500 ms
-1 fa ult
occ urrs
Unde r 3-pha s e fa ult
condition rotor a ngle 3
-2
of a pp. ±180 de gre e s
is m e a s ure d ...
2
-3 Z(R,X) cros s e d
1 1 the im pe da nce line , Z-line ,
conne cting points S E - RE
-4
0 200 400 600 800 1000 1200 1400
Time in millis econds ®

IEC10000110-2-en.vsd
IEC10000110 V2 EN-US

Figure 269: Rotor (power) angle and magnitude of the complex impedance Z(R, X) against the
time
In order to be able to fully understand the principles of OOSPPAM, a stable case, that is, a case
where the disturbance does not make a generator to go out-of-step, must be shown.

484 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

1
SE RE
G X [Ohm]
0.8 Z(R,X) 20 ms
fault
relay after line out
- - - RE - - -
0.6 - - --
-- ----------- - pre-fault
Imaginary part (X) of Z in Ohms → - ---- - - 4 -
zone 2 -
-- -- ---
- - Z(R,X)
0.4 - -- - --- 2 -
- -
- --- -1 5
- --- fault→
- -- -
0.2 X-line → ^ -^ ^ ^ ^ ---^ ^ 3 -- -
- -
- ^ ^ ^ ^ ^ ^ --^- ^ ^ -
- -- Z-line→ -- ^ -^ 0
-- --
- -- -- - 6
0 - -- - - -
- -
- -
- -
limit of -- - R
- -- relay lens → --- -
-- -
-0.2 reach - -- 110° ---- -
zone 1- - --- -
-- -
-
--- -
- --- --- -
-0.4 -- --- ------ --
-- ------ -
- - - - -
-0.6 SE - - -
0 → pre-fault Z(R, X)
this circle forms 3 → Z(R, X) under fault
-0.8 the right-hand side 5 → Z 20 ms after line out
edge of the lens 6 → pow er line reclosed
-1
-1 -0.5 0 0.5 1 1.5
Real part (R) of Z in Ohms → IEC10000111-1-en.vsd
IEC10000111 V1 EN-US

Figure 270: A stable case where the disturbance does not make the generator to go out-of-step
It shall be observed that for a stable case, as shown in Figure 270, where the disturbance does not
cause the generator to lose step, the complex impedance Z(R, X) exits the lens characteristic on the
same side (point 4) it entered it (point 2), and never re-enters the lens. In a stable case, where the
protected generator remains in synchronism, the complex impedance returns to quadrant 1, and,
after the oscillations fade, it returns to the initial normal load position (point 0), or near.

8.17.7.1 Lens characteristic GUID-F9BD3225-C87F-4FA6-A267-2248F0A4E707 v6

A precondition in order to be able to construct a suitable lens characteristic is that the power system
in which OOSPPAM is installed, is modeled as a two-machine equivalent system, or as a single
machine – infinite bus equivalent power system. Then the impedances from the position of
OOSPPAM in the direction of the normal load flow (that is from the measurement point to the remote
system) can be taken as forward. The lens characteristic, as shown in Figure268 and Figure270, is
obtained so that two equal in size but differently offset Mho characteristics are set to overlap. The
resultant lens characteristic is the loci of complex impedance Z(R, X) for which the rotor (power)
angle is constant, for example 110 degrees or 120 degrees; if the rotor (power) angle approaches
this value, then there is a high risk to have an out of step condition. The limit-of- reach circle is
constructed automatically by the algorithm; it is about 10% wider than the the circle that has the line
SE-RE as diameter (that is the out-of-step characteristic which corresponds to the rotor (power)
angle of 90 degrees). Figure 271 illustrates construction of the lens characteristic for a power system.

Transformer protection RET670 485

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

X
Position of the OOS
- - - RE- - -
0.6 - - --- - relay is the origin of
- - -- --- - the R - X plane
- -- - -- -
- --- Ze -- -
- Zone 2 -- -- -
0.4 X-line - - - -
--
Imaginary part (X) of Z in Ohms
--
- - - -
determined -- Zline
-
--
- - -
-- -
by the → ^ ^- ^ --- -- -
0.2 ^ ^ ^- ^ -
setting - - ^ ^ ^ ^ -
--- ^ ^ ^ --- ^
ReachZ1 - -- ^ ^ ^-
--- Ztr
- -- -- - R
0 - Zone 1 -- --
- -
-- relay -
- -- 120° -- Z(R,X) -
- -- --- -
-- ← Z-line -
-0.2 - -- Zgen -- -
- -- --- -
limit-of-reach → - -- -- -
-- -- ← Lens is- the locus
circle depends on -
- -- ---- of constant
- rotor (power)
-0.4 --
the position of the - -- --- - e.g. 120°.
- - --- - -- angle,-
points SE and RE - - - - - - - - -Lens' width determined
SE
-0.6 by the setting StartAngle

-0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1

Real part (R) of Z in Ohms
IEC10000112-1-en.vsd
IEC10000112 V1 EN-US

Figure 271: Construction of the lens characteristic for a power system

ReverseZ
ReverseZ(ReverseR, ReverseX)) ForwardZ(ForwardR, ForwardX)

Zgen(Rgen , Xgen) Ztr(Rtr, Xtr) Zline(Rline, Xline) Zeq(Req, Xeq)

Generator Transformer Infinite power

13.8 kV 13.8 / 220 kV system
Power line System
13.8 kV 220 kV equivalent
G d Y

SE RE

Out-Of-Step ReverseR = Rg ForwardR = Rtr + Rline + Req

REG ReverseX = Xd’ ForwardX = Xtr + Xline + Xeq
protection
OOSPPAM
All impedances must be referred to the generator voltage 13.8 kV

IEC10000113-2-en.vsd
IEC10000113 V2 EN-US

Figure 272: Example of an actual power system

To be able to automatically construct the lens characteristic for a system shown in Figure 272, the
actual power system must be modeled as a two-machine equivalent system, or as a single machine
– infinite bus equivalent system, the following information is necessary: Zgen(Rgen, Xgen), Ztr(Rtr,
Xtr), Zline(Rline, Xline), Zeq(Req, Xeq), and the setting StartAngle , for example 120 degrees. All
impedances must be referred to the voltage level where the out-of-step protection relay is placed; in
the case shown in Figure 272 the relay is connected to the terminals of the generator and, therefore,
the previous quantities shall be referred to the generator nominal voltage and nominal current. The
impedances from the position of the out-of-step protection in the direction of the normal load flow can
be taken as forward.

The out-of-step relay, as in Figure 272 looks into the system and the impedances in that direction are
forward impedances:

486 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

• ForwardX = Xtr + Xline + Xeq (All values referred to generator voltage)

• ForwardR = Rtr + Rline + Req (All values referred to generator voltage)

The impedances that can be measured in the reverse direction are:

• ReverseX = Xd' (Generator transient reactance suitable for this protection)

• ReverseR = Rg (Relatively very small, can often be neglected)

Resistances are much smaller than reactances, but in general can not be neglected. The ratio
(ForwardX + ReverseX) / (ForwardR + ReverseR) determines the inclination of the Z-line, connecting
the point SE (Sending End) and RE (Receiving End), and is typically approximately 85 degrees.
While the length of the Z-line depends on the values of ForwardX, ReverseX, ForwardR, and
ReverseR, the width of the lens is a function of the setting StartAngle .The lens is broader for smaller
values of the StartAngle , and becomes a circle for StartAngle = 90 degrees.

When the complex impedance Z(R, X) enters the lens, pole slipping is imminent, and a start signal is
issued. The angle recommended to form the lens is 110 or 120 degrees, because it is this rotor
(power) angle where problems with dynamic stability usually begin. Rotor (power) angle 120 degrees
is sometimes called “the angle of no return” because if this angle is reached under generator power
swings, the generator is most likely to lose step.

8.17.7.2 Detecting an out-of-step condition GUID-5BBAE253-3D01-4C97-A7CF-A12084FD1810 v4

An out-of-step condition is characterized by periodic changes of the rotor angle, that leads to a wild
flow of the synchronizing power; so there are also periodic changes of rotational speed, currents and
voltages. When displayed in the complex impedance plane, these changes are characterized by a
cyclic change in the complex load impedance Z(R, X) as measured at the terminals of the generator,
or at the location of the instrument transformers of a power line connecting two power sub-systems.
This was shown in Figure 268. When a synchronous machine is out-of-step, pole-slips occur. To
recognize a pole-slip, the complex impedance Z(R,X) must traverse the lens from right to left in case
of a generator and in the opposite direction in case of a motor. Another requirement is that the travel
across the lens takes no less than a specific minimum traverse time, typically 40...60 milliseconds.
The above timing is used to discriminate a fault from an out-of-step condition. In Figure 268, some
important points on the trajectory of Z(R, X) are designated. Point 0: the pre-fault, normal load Z(R,
X). Point 1: impedance Z under a three-phase fault with low fault resistance: Z lies practically on, or
very near, the Z-line. Transition of the measured Z from point 0 to point 1 takes app. 20 ms, due to
Fourier filters. Point 2: Z immediately after the fault has been cleared. Transition of the measured Z
from point 1 to point 2 takes approximately 20 ms, due to Fourier filters. The complex impedance
then travels in the direction from the right to the left, and exits the lens on the opposite side. When
the complex impedance exits the lens on the side opposite to its entrance, the 1st pole-slip has
already occurred and more pole-slips can be expected if the generator is not disconnected. Figure
268 shows two pole-slips. Figures like Figure 268 and Figure 270 are always possible to draw by
means of the analog output data from the pole-slip function, and are of great help with eventual
investigations of the performance of the out-of-step function.

8.17.7.3 Maximum slip frequency GUID-1311529F-21F8-40A0-8D01-0296BD9B4F00 v5

A pole-slip may be detected if it has a slip frequency lower than a maximum value fsMax. The
specific value of fsMax depends on the setting (parameter) StartAngle (which determines the width of
the lens characteristic). A parameter in this calculation routine is the value of the minimum traverse
time, traverseTimeMin. The minimum traverse time is the minimum time that the travel of the
complex impedance Z(R, X) through the lens, from one side to the other, must last in order to
recognize that a pole-slip has occurred. The value of the internal constant traverseTimeMin is a
function of the set StartAngle.For values of StartAngle <= 110°, traverseTimeMin = 50 ms. For values
StartAngle > 110°, traverseTimeMin = 40 ms. The expression which relates the maximum slip
frequency fsMax and the traverseTimeMin is as follows:

Transformer protection RET670 487

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

1000  StartAngle [°] 

fsMax [ Hz ] ≅ ⋅  1.000 - 
traverseTimeMin [ ms ]  180 [°] 
IECEQUATION2319 V1 EN-US (Equation 136)

The maximum slip frequency fsMax for traverseTimeMin = 50 ms is:

StartAngle = 90° → fsMax = 20 × 0.500 = 10.000 Hz

StartAngle = 100° → fsMax = 20 × 0.444 = 8.888 Hz
StartAngle = 110° → fsMax = 20 × 0.388 = 7.777 Hz (default 110°)

The maximum slip frequency fsMax for traverseTimeMin = 40 ms is:

StartAngle = 120° → fsMax = 25 × 0.333 = 8.333 Hz

StartAngle = 130° → fsMax = 25 × 0.277 = 6.944 Hz

The minimum value of fsMax is 6.994 Hz. When StartAngle = 110 degrees, fsMax = 7.777 Hz. This
implies, that the default StartAngle = 110 degrees covers 90% of cases as, the typical final slip
frequency is between 2 - 5Hz. In practice, however, before the slip frequency, for example 7.777 Hz,
is reached, at least three pole-slips have occurred. In other words, if we consider a linear increase of
frequency from 50 Hz to 57.777 Hz, at least three pole-slips will occur (in fact: (57.777 - 50) / 2 =
3.889). The exact instantaneous slip-frequency expressed in Hz (corresponding to number of pole
slips per second) is difficult to calculate. The easiest and most exact method is to measure time
between two successive pole slips. This means that, the instantaneous slip-frequency is measured
only after the second pole-slip, if the protected machine is not already disconnected after the first
pole-slip. The measured value of slipsPerSecond (SLIPFREQ) is equal to the average slip-frequency
of the machine between the last two successive pole-slips.

8.17.7.4 Taking care of the circuit breaker GUID-35B49D7D-80AF-4DB0-A3C5-0CA0E54A9CA1 v4

Although out-of-step events are relatively rare, the out-of-step protection should take care of the
circuit breaker health. The electromechanical stress to which the breaker is exposed shall be
minimized. The maximum currents flowing under out-of-step conditions can be even greater that
those for a three-phase short circuit on generator terminals; see Figure 274. The currents flowing are
highest at rotor angle 180 degrees, and smallest at 0 degrees, where relatively small currents flow.
To open the circuit breaker at 180 degrees, when not only the currents are highest, but the two
internal (that is, induced) voltages at both ends are in opposition, could be fatal for the circuit breaker.
There are two methods available in order to minimize the stress; the second method is more
advanced than the first one.

The first method

The circuit breaker is only allowed to break the current when the rotor angle has become less than
the set value TripAngle, on its way to 0 electrical degrees. A recommended value for the setting
TripAngle is 90 degrees or less, for example 60 degrees. Figure 273 illustrates the case with
TripAngle = 90 degrees. The offset Mho circle represents loci of the complex impedance Z(R, X) for
which the rotor (power) angle is 90 degrees. If the circuit breaker must not open before the rotor
angle has reached 90 degrees on its way towards 0 degrees, then it is clear that the circle delimits
the R – X plane into a “no trip” and a “trip” region. For TripAngle = 90 degrees, the trip command will
be issued at point 3 when the complex impedance Z(R, X) exits the circle. By that time the relay logic
had already ascertained the loss of step, and the general decision to trip the generator has already
been taken.

The second method

This method is more exact. If the break-time of the circuit breaker is known, (and specified as the
setting tBreaker) than it is possible to initiate a trip (break) command almost exactly tBreaker
milliseconds before the rotor (power) angle reaches 0 degrees, where the currents are at their
minimum possible values. The breaker contacts open at almost exactly 0 degrees, as illustrated in

488 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Figure 274 for tBreaker = 0.060 s. The point in time when the breaker opening process must be
initiated is estimated by solving on-line the so called “synchronizer” differential equation. Note that if
tBreaker is left on the initial (default) value, which is zero (0), then the alternative setting TripAngle
decides when the trip command is given. If specified tBreaker > 0, for example tBreaker = 0.040
second, then automatically, the TripAngle is ignored and the second, more exact method applied.

X[Ohm]
0.6 trip RE - Receiving End (infinite bus)
region
loci of Z(R, X)
0.4 3
Imaginary part (X) of Z in Ohms →

no trip
region 1
here rotor here
0.2 2
angle rotor angle
is -90° no trip is +90°
rotor angle
region
= ±180°
0 no trip
relay
region R[Ohm]
inside ← Z - line connects
points SE & RE
-0.2 circle
← this circle
is loci of
outside the
the rotor
-0.4 circle is the trip
angle = 90°
region for
TripAngle <= 90° SE - Sending End (generator)

-0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8

Real part (R) of Z in Ohms →
IEC10000114-1-en.vsd
IEC10000114 V1 EN-US

Figure 273: The imaginary offset Mho circle represents loci of the impedance Z(R, X) for which
the rotor angle is 90 degrees

35
very high currents due
Current in kA, trip command to CB, rotor angle in rad →

pos. seq. current in kA

to out-of-step condition
30 trip command to CB
rotor angle in radian
← after 1st
fault cleared → pole slip
25
← 2nd

20 current increases under

fault conditions
current decreases
15
fault
occurs
10 ← min. current
trip command →
normal load current issued here
← → ← tBreaker = 60 ms
5

← rotor angle
0
angle towards 0°

-5
0 200 400 600 800 1000 1200
Time in milliseconds →
IEC10000115-1-en.vsd
IEC10000115 V1 EN-US

Figure 274: Trip initiation when the break-time of the circuit breaker is known

Transformer protection RET670 489

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.17.7.5 Design GUID-1615F014-3529-45D0-813B-153754DED1C7 v3

At every execution of the function the following is calculated: active power P, reactive power Q, rotor
angle ROTORANG, quantity UCOSPHI, the positive-sequence current CURRENT and voltage
VOLTAGE. All other quantities, that can as well be read as outputs, are only calculated if the Z(R, X)
enters the limit of reach zone, which is a circle in the complex (R – X) plane. When the complex
impedance Z(R, X) enters the limit-of-reach region, the algorithm:

• determines in which direction the impedance Z moves, that is, the direction the lens is traversed
• measures the time taken to traverse the lens from one side to the other one

If the traverse time is more than the limit 40 or 50 ms, a pole-slip is declared. If the complex
impedance Z(R, X) exits the lens on the same side it entered, then it is a stable case and the
protected machine is still in synchronism. If a pole-slip has been detected, then it is determined in
which zone the centre of oscillation is located. If the number of actual pole-slips exceeds the
maximum number of allowed pole-slips in either of the zones, a trip command is issued taking care of
the circuit breaker safety.

R R
UPSRE Calculation of X X
UPSIM R and X parts
of the complex Z(R,X)
UPSMAG
positive-
IPSRE
sequence Z(R,X) NO
IPSIM
impedance within limit of Return
Z(R, X) reach?

YES UCOSPHI

Z(R,X) ROTORANG
within lens NO
Function alert
characteristic?
SLIPFREQ

YES GENMODE

Z(R,X) MOTMODE
LEFT Z(R,X) RIGHT NO
exited lens
entered lens
on the left- hand
from?
Motor losing Generator losing side?
step ? step ?
YES

Was
traverse time NO
more than
Calculation of 50 ms?
P
positive- sequence YES (pole- slip!)
active power P, Q TRIP
>= 1
reactive power Q, Number
ZONE 2 NO
rotor angle UCOSPHI
of pole- slips
ROTORANG exceeded in TRIPZ1
a zone? Open
and
ROTORANG circuit
UCOSPHI ZONE 1 TRIPZ2
breaker
safely

IEC10000116-3-en.vsd
IEC10000116 V3 EN-US

Figure 275: OOSPPAM Simplified function block

8.17.8 Technical data

SEMOD175136-2 v9

Table 259: OOSPPAM technical data

Function Range or value Accuracy

Impedance reach (0.00 - 1000.00)% of Zbase ±2.0% of Ur/(√3 ⋅ I r )

Rotor start angle (90.0 - 130.0) degrees ±5.0 degrees

Rotor trip angle (15.0 - 90.0) degrees ±5.0 degrees
Zone 1 and Zone 2 trip counters (1 - 20) -

490 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

8.18 Phase preference logic PPLPHIZ SEMOD151920-1 v2

8.18.1 Function revision history GUID-E2FF644E-DD3A-4549-B15A-2395B9709DA6 v2

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 Setting ranges and setting descriptions have been updated in order to make the function
more user friendly. The added logic takes over if the relay detects the two faulty phases
within 20 ms and allows a larger margin of undervoltage to detect the faulty phases.
M 2.2.5 -

8.18.2 Identification
SEMOD151937-2 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Phase preference logic PPLPHIZ - -

8.18.3 Functionality SEMOD151924-4 v6

The Phase preference logic function PPLPHIZ is intended to be used in isolated or high impedance
earthed networks where there is a requirement to operate on only one of the faulty lines during a
cross-country fault. It can be used without preference to restrain operation for single earth faults with
a delayed zero-sequence current release.

For cross-country faults, the logic selects either the leading or lagging phase-earth loop for
measurement. It initiates operation on the preferred phase based on the selected phase preference
scheme. A number of different phase preference schemes are available.

PPLPHIZ provides an additional phase selection criteria, namely under voltage criteria, suitable for
phase selection during cross-country faults. In radial networks, where there is no fault current in the
phase with the external fault, current or impedance based phase selection methods become
ineffective. Hence, only voltage can be used for phase selection. The phase selection result will be
the same for all bays on a bus since the voltage is the same, which is an important condition for
operating with phase preference.

In meshed and stronger networks, it may be difficult to find appropriate under-voltage settings for
phase selection. Therefore an automatic phase selection logic is made available which works in
parallel with a set under-voltage criterion in order to detect the two faulty phases even for complex
networks. If for any reason the PPLPHIZ is unable to detect the two faulty phases, then after a short
time delay all three phase-to-earth loops of the distance protection will be released for operation. The
final result might be that both faulty feeders are disconnected. In other words, protection operation is
prioritized over strict adherence to preference.

Transformer protection RET670 491

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.18.4 Function block SEMOD172690-4 v4

PPLPHIZ
I3P* START
U3P* ZREL
BLOCK
RELL1N
RELL2N
RELL3N
STCND

IEC07000029-2-en.vsd
IEC07000029 V2 EN-US

Figure 276: PPLPHIZ function block

8.18.5 Signals SEMOD172700-1 v2

PID-7504-INPUTSIGNALS v1

Table 260: PPLPHIZ Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
RELL1N BOOLEAN 0 Release condition for the L1 to earth loop
RELL2N BOOLEAN 0 Release condition for the L2 to earth loop
RELL3N BOOLEAN 0 Release condition for the L3 to earth loop
STCND INTEGER 0 Integer coded external release signals

PID-7504-OUTPUTSIGNALS v1

Table 261: PPLPHIZ Output signals

Name Type Description

START BOOLEAN Indicates start for earth fault(s), regardless of direction
ZREL INTEGER Integer coded output release signal

8.18.6 Settings SEMOD172702-1 v2

PID-7504-SETTINGS v1

Table 262: PPLPHIZ Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

492 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Table 263: PPLPHIZ Group settings (basic)

Name Values (Range) Unit Step Default Description

OperMode No Filter - - No Filter Operating mode (c=cyclic,a=acyclic).
NoPref This setting shall have the same value
1231c for all distance relays installed in the
1321c protected network.
123a
132a
213a
231a
312a
321a
UPN< 10 - 90 %UB/sq 1 70 Operate value of phase undervoltage in
3 % of UBase/sqrt(3). Two phases shall
pickup to detect cross-country fault.
UPP< 10 - 90 %UB 1 50 Operate value of line to line
undervoltage (% of UBase) to detect
cross-country fault.
3U0> 10 - 300 %UB/sq 1 45 Operate value of residual voltage in % of
3 UBase/sqrt(3). For high impedance
grounded system the maximum UN
value will be 300%.
IN> 10 - 200 %IB 1 30 Operate value of residual current (% of
IBase) to enable the cross-country fault
detection
tUN 0.000 - 60.000 s 0.001 0.100 Pickup-delay for residual voltage
tOffUN 0.000 - 60.000 s 0.001 0.100 Dropoff-delay for residual voltage
tIN 0.000 - 60.000 s 0.001 0.100 Pickup-delay for residual current
OpAutoDetect Off - - On Automatic detection of operation
On principle

8.18.7 Operation principle SEMOD151916-4 v9

PPLPHIZ is connected between the Distance protection zones ZMQPDIS and ZMQAPDIS and
Phase selection FDPSPDIS, see Figure 277. Depending on the setting, the original phase selection
will be supplemented with an additional voltage based phase selection inside PPLPHIZ and then
filtered through the phase preference logic in order to release only the preferred phases of the
distance zones.

Transformer protection RET670 493

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

ZMQAPDIS
FDPSPDIS
W2_CT_B_I3P I3P* TRIP
I3P* TRIP
W2_VT_B_U3P U3P* TRL1
U3P* START FALSE BLOCK TRL2
BLOCK STFWL1 PHS_L1 W2_FSD1-BLKZ VTSZ TRL3
DIRCND STFWL2 PHS_L2 FALSE BLKTR START
STFWL3 PHS_L3 STCND STL1
STFWPE
DIRCND STL2
STRVL1
STL3
STRVL2
STND
STRVL3
STRVPE
STNDL1 ZMQPDIS
STNDL2 I3P* TRIP
W2_CT_B_I3P
STNDL3 U3P* TRL1
W2_VT_B_U3P
STNDPE FALSE BLOCK TRL2
STFW1PH VTSZ TRL3
W2_FSD1-BLKZ
STFW2PH BLKTR START
FALSE
STFW3PH
STCND STL1
STPE DIRCND STL2
STPP STL3
STCNDZ STND
STCNDLE

PPLPHIZ
W2_CT_B_I3P I3P* START
W2_VT_B_U3P U3P* ZREL
FALSE BLOCK
FALSE RELL1N
FALSE RELL2N
FALSE RELL3N
STCND
IEC06000552-3-en.vsd
IEC06000552 V3 EN-US

Figure 277: Phase preference logic overview

PPLPHIZ can be divided into three main parts:

• Residual current criteria

• Phase selection
• Preference logic

8.18.7.1 Residual current criteria GUID-982F5BF4-CB45-4404-94F5-9A24B891056B v2

The fundamental start criterion for a cross-country fault is a continuous residual current (3I0) above
setting level IN>.

Transient residual currents associated with single phase fault inception are not allowed to release the
distance protection. This is taken care of by a time-on-delay tIN, which should be set longer than the
expected duration of the transient.

If a single phase fault remains for some time, it is possible to bypass the tIN time delay, since the
next fault event is expected to be a cross-country fault. The criterion for this bypass is that the
residual voltage is greater than setting level 3U0> for a time longer than setting tUN. The time-off-
delay tOffUN is used to make sure that the bypass is steady during the cross-country fault.

The time delay for residual current start is also bypassed as soon as two low voltages are detected
during the cross-country fault (startUPP). See Figure 278 for a simplified diagram showing the
residual current start logic.

494 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

startUPP

OR
tUN tOffUN
3U0 > 3U0> t t
(Non delayed IN start)
AND

tIN startIN
OR
3I0 > IN> t

IEC16000018-1-en.vsdx
IEC16000018 V2 EN-US

Figure 278: Residual current criteria

8.18.7.2 Phase selection GUID-975FB3BE-A7FE-4CD8-8954-6542870DF482 v2

During a cross-country fault, the phase with an external fault typically does not carry any fault
current, which will make it difficult for a conventional phase selection function to detect the fault.
Therefore, PPLPHIZ function provides an additional phase selection based on voltage.

PPLPHIZ is designed to detect two-phase faults based on under-voltage in two phases or between
two phases.

ULx < UPN<

L1
L2 OR startU
AND
L3

3U0 > 3U0>

AND startUL1L2
OR

AND startUL2L3
OR
startUL1
OR
AND startUL3L1
ULxLy < UPP< OR
startUL2
L1L2 OR
L2L3
startUL3
L3L1 OR
startIN

UL1
UL2 AND
UL3 Automatic
UL1L2 phase
AND
UL2L3 detection
UL3L1
AND
OpAutoDetect

IEC16000019-1-en.vsdx

IEC16000019 V2 EN-US

Figure 279: Voltage based phase selection

The voltage phase selection can be complemented with external phase selection through inputs
RELL1-3N.

Transformer protection RET670 495

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Voltage phase selection is disabled in No Filter and NoPref operating modes.

startUL1
AND
startUL2
AND OR
startUL3
AND
OperMode = No Filter
OR
AND
OperMode = NoPref

OR
RELL1N startL1
OR
OR
RELL2N startL2
OR
OR
RELL3N startL3
OR
OR
L1N
L2N
L3N
STCND Integer L1L2 zrelL1L2
to
Boolean L2L3 zrelL2L3
L3L1 zrelL3L1

IEC16000105-1-en.vsdx
IEC16000105 V2 EN-US

Figure 280: Start logic

In meshed and complex networks, it may be difficult to find appropriate under-voltage settings for
phase selection. Therefore an automatic phase selection logic is made available which works in
parallel with a set under-voltage criterion in order to detect the two faulty phases even for complex
networks. This automatic phase selection logic can be switch off or on with the setting OpAutoDetect,
which by default is set On. If for any reason even this additional logic is unable to detect the two
faulty phases, then after a short time delay all three phase-to-earth loops of the distance protection
will be released for operation. The final result might be that both faulty feeders are disconnected. In
other words, protection operation is prioritized over strict adherence to preference.

8.18.7.3 Preference logic GUID-A7FCCE03-C841-4BAD-98F8-EB9497D53687 v2

The different operating modes (selected with OperMode setting) determine how the internal status is
used to release the phases of the connected distance protection.

This setting shall be set in accordance with used phase preference scheme in the protected network.
It is of uttermost importance that all distance relays installed in this network has the same setting
value for this parameter.

No Filter mode GUID-2D585104-E319-4B6D-82C7-3373CA7E87F7 v1

In No Filter mode, all phase starts of the phase selection will be passed through without any
preference or requirement on residual current or voltage.

No Filter mode is equivalent to connecting the phase selection directly to the distance protection.

496 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

startL1 zrelL1

startL2 zrelL2

startL3 zrelL3

IEC16000106-1-en.vsdx
IEC16000106 V1 EN-US

Figure 281: No Filter mode

No Preference mode GUID-DA373F35-2082-4347-9A35-B34E23C03B01 v1

The ‘NoPref’ mode uses only the residual current criteria (startIN). There is no preference provided in
this mode. All three phase-to-earth loops of the distance protection may be released when a residual
current start has occurred.

startL1
zrelL1
AND
startL2
zrelL2
AND
startL3
zrelL3
AND

startIN

IEC16000107-1-en.vsdx
IEC16000107 V1 EN-US

Figure 282: No Preference mode

Preference modes GUID-BE61A451-E389-4136-8C0B-2C04888EEACE v2

In the preference modes (for example, ‘1231c’), the internal under-voltage phase selection status is
filtered with the selected preference scheme to achieve the desired phase preference. Only the
preferred phase-to-earth loop of the distance protection is released to operate. In addition to the
voltage phase selection, a residual current start is also required for operation.

A logic is also included to handle the special case where only one start (startL1-3) is present.

The internal under-voltage phase selection always issues a release in at least two phases, but the
inputs RELL1-3N can be activated with some time apart. If no measures are taken, the phase
activated first will pass through the preference scheme and release the distance protection. Since it
could a be non-preferred phase, a time delay of 40 ms is provided to release if only one phase is
detected, in order to wait for the second phase to be activated. If no second phase is detected within
40 ms, the single phase is released without preference.

Additionally, there are some cases where no release would be issued:

• All three phases are involved in the fault and a cyclic scheme is selected
• No faulty phase can be detected due to an insufficient voltage drop

In both cases, no release signals come from the phase preference scheme. For these cases, an
additional logic is provided that releases all three phase-to-earth loops if there is no output from the
preference scheme after 40 ms from the activation of the residual current start.

Hence, if there is a residual current start, it is guaranteed that the distance protection is released in at
least one phase. This is valid for all phase preference schemes.

Transformer protection RET670 497

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Preference
OperMode Scheme
Scheme
startL1 prefL1
INL1 OUTL1
startL2 prefL2
INL2 OUTL2
startL3 prefL3
INL3 OUTL3

More than
one true stIN
AND
startIN
40 ms
stIN40ms
t

IEC16000023-1-en.vsdx
IEC16000023 V2 EN-US

Figure 283: Logic to detect the preferred phase

prefL1
OR zrelL1
AND
prefL2
OR zrelL2
AND
prefL3
OR zrelL3
AND
30 ms
OR t

AND
stIN40ms
stIN OR

IEC16000024-1-en.vsdx
IEC16000024 V2 EN-US

Figure 284: Logic to release the preferred phase towards distance protection
Table 264 shows the preferred phase for each detected cross-country fault type and operating mode
(OperMode).

Table 264: Preferred phase for each cross-country fault type and operating mode

Operating mode start in L1 & L2 start in L2 & L3 start in L3 & L1

1231c L1 L2 L3
1321c L2 L3 L1
123a L1 L2 L1
132a L1 L3 L1
213a L2 L2 L1
231a L2 L2 L3
312a L1 L3 L3
321a L2 L3 L3

8.18.7.4 Output GUID-3D64237F-8D45-4CAE-8F2E-31F6741842C2 v2

All loop releasing signals are gathered in the binary coded integer output ZREL. The value of ZREL
can be calculated according to Equation 137.

498 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

ZREL L1N *1 L2N *2  L3N *4  L1L2*8  L2L3*16  L3L1*32

IECEQUATION16018 V1 EN-US (Equation 137)
For example, if only L1N is active, then the value is 1. If both start L1N and L3N are active, then the
value is 1+4=5.

The BLOCK input will only block the enabling signals for phase-to-earth loops,
phase-to-phase loops are still released. The PPLPHIZ is designed not to have any
influence on the phase-to-phase loops of the distance protection.

startU
AND

zrelL1
AND
zrelL2
AND L1N
zrelL3 L2N
AND L3N
Bool to ZREL
zrelL1L2 L1L2 Integer
zrelL2L3 L2L3
BLOCK zrelL3L1 L3L1

IEC16000108-1-en.vsdx
IEC16000108 V1 EN-US

Figure 285: Output signals from the function

GUID-BACA37F7-E945-40BC-BF9D-A65BFC96CA91 v9

Table 265: PPLPHIZ technical data

Function Range or value Accuracy

Operate value, phase-to-phase and (10 - 90)% of UBase ±0.5% of Ur
phase-to-neutral undervoltage, UPN<
and UPP<
Reset ratio, undervoltage < 105% -
Operate value, residual voltage, 3U0> (10 - 300)% of UBase ±0.5% of Ur at U ≤ Ur
±0.5% of U at U > Ur

Reset ratio, residual voltage > 95% -

Operate value, residual current, IN> (10 - 200)% of IBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir

Reset ratio, residual current > 95% -

Independent time delay for residual (0.000 - 60.000) s ±0.2% or ±25 ms whichever is greater
current at 0 to 2 x Iset, tIN

Independent time delay for residual (0.000 - 60.000) s ±0.2% or ±25 ms whichever is greater
voltage at 0.8 x Uset to 1.2 x Uset, tUN

Independent dropoff-delay for residual (0.000 - 60.000) s ±0.2% or ±25 ms whichever is greater
voltage at 1.2 x Uset to 0.8 x Uset,
tOffUN
Operating mode No Filter, NoPref
Cyclic: 1231c, 1321c
Acyclic: 123a, 132a, 213a, 231a,
312a, 321a

Transformer protection RET670 499

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.19 Phase preference logic PPL2PHIZ GUID-80133640-FB3E-400C-B7FF-C2BB0AD1A045 v1

8.19.1 Function revision history GUID-F8B83D26-CCDC-4E1C-940A-F3B47A5AB4B0 v2

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 Setting ranges and setting descriptions have been updated in order to make the function
more user friendly. The added logic takes over if the relay detects the two faulty phases
within 20 ms and allows a larger margin of undervoltage to detect the faulty phases.
M 2.2.5 -

8.19.2 Identification
GUID-850E4134-E912-45EC-981E-E1A2C12A91A8 v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Phase preference logic PPL2PHIZ - -

8.19.3 Functionality GUID-39785DEB-E5D7-447C-977B-9E940CA8E774 v2

The Phase preference logic function (PPL2PHIZ) is used with the high speed distance protection,
quad and mho characteristic (ZMFPDIS). It is intended to be used in isolated or high impedance
earthed networks where there is a requirement to operate on only one of the faulty lines during a
cross-country fault. It can be used without preference to restrain operation for single earth faults with
a delayed zero-sequence current release.

For cross-country faults, the logic selects either the leading or lagging phase-earth loop for
measurement. It initiates operation on the preferred phase based on the selected phase preference
scheme. A number of different phase preference schemes are available.

PPL2PHIZ provides an additional phase selection criteria, namely under voltage criteria, suitable for
phase selection during cross-country faults. In radial networks, where there is no fault current in the
phase with the external fault, current or impedance based phase selection methods become
ineffective. Hence, only voltage can be used for phase selection. The phase selection result will be
the same for all bays on a bus since the voltage is the same, which is an important condition for
operating with phase preference.

In meshed and stronger networks, it may be difficult to find appropriate under-voltage settings for
phase selection. Therefore an automatic phase selection logic is made available which works in
parallel with a set under-voltage criterion in order to detect the two faulty phases even for complex
networks. If for any reason the PPL2PHIZ is unable to detect the two faulty phases, then after a short
time delay all three phase-to-earth loops of the distance protection will be released for operation. The

500 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

final result might be that both faulty feeders are disconnected. In other words, protection operation is
prioritized over strict adherence to preference.

8.19.4 Function block GUID-8C40D1F5-FE37-422D-B9E6-BE14E6A8FED8 v2

PPL2PHIZ
I3P* START
U3P* ZREL
BLOCK
RELL1N
RELL2N
RELL3N

IEC16000016-1-en.vsdx
IEC16000016 V2 EN-US

Figure 286: PPL2PHIZ function block

8.19.5 Signals
PID-7505-INPUTSIGNALS v1

Table 266: PPL2PHIZ Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
RELL1N BOOLEAN 0 Release condition for the L1 to earth loop
RELL2N BOOLEAN 0 Release condition for the L2 to earth loop
RELL3N BOOLEAN 0 Release condition for the L3 to earth loop

PID-7505-OUTPUTSIGNALS v1

Table 267: PPL2PHIZ Output signals

Name Type Description

START BOOLEAN Indicates start for earth fault(s), regardless of direction
ZREL INTEGER Integer coded output release signal

8.19.6 Settings
PID-7505-SETTINGS v1

Table 268: PPL2PHIZ Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Transformer protection RET670 501

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Table 269: PPL2PHIZ Group settings (basic)

Name Values (Range) Unit Step Default Description

OperMode No Filter - - No Filter Operating mode (c=cyclic,a=acyclic).
NoPref This setting shall have the same value
1231c for all distance relays installed in the
1321c protected network.
123a
132a
213a
231a
312a
321a
UPN< 10 - 90 %UB/sq 1 70 Operate value of phase undervoltage in
3 % of UBase/sqrt(3). Two phases shall
pickup to detect cross-country fault.
UPP< 10 - 90 %UB 1 50 Operate value of line to line
undervoltage (% of UBase) to detect
cross-country fault
3U0> 10 - 300 %UB/sq 1 45 Operate value of residual voltage in % of
3 UBase/sqrt(3). For high impedance
grounded system the maximum UN
value will be 300%.
IN> 10 - 200 %IB 1 30 Operate value of residual current (% of
IBase) to enable the cross-country fault
detection
tUN 0.000 - 60.000 s 0.001 0.100 Pickup-delay for residual voltage
tOffUN 0.000 - 60.000 s 0.001 0.100 Dropoff-delay for residual voltage
tIN 0.000 - 60.000 s 0.001 0.100 Pickup-delay for residual current
OpAutoDetect Off - - On Automatic detection of operation
On principle

8.19.7 Operation principle GUID-B304D0D3-1E4E-482D-975F-229467905608 v2

The PPL2PHIZ function releases the phase selection inside the distance protection, see Figure 287.

The phase selection inside the distance protection has to detect the fault before an
operation from the distance zones can be achieved, even when the distance
protection is released by PPL2PHIZ.

502 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

PPL2PHIZ ZMFPDIS
Phase
Phase selection
preference
Zone1
L1N relcndphs TRZ1
L1N bitwise enable
L2N AND
L2N
L3N Zone2
L3N Bool to ZREL bitwise
TRUE L1L2 Integer AND
enable
RELCNDZ1
TRUE L2L3
Zone3
TRUE L3L1 RELCNDZ2 bitwise
enable
AND
RELCNDZ3
Zone4
RELCNDZ4 bitwise
enable
TRZ4
AND
RELCNDZ5 Zone5
bitwise
enable
TRZ5
RELCNDZRV AND
ZoneRV
bitwise
enable
TRZRV
AND

IEC16000017-1-en.vsdx
IEC16000017 V1 EN-US

Figure 287: Phase preference logic overview

PPL2PHIZ can be divided into three main parts:

• Residual current criteria

• Phase selection
• Preference logic

8.19.7.1 Residual current criteria GUID-982F5BF4-CB45-4404-94F5-9A24B891056B v2

The fundamental start criterion for a cross-country fault is a continuous residual current (3I0) above
setting level IN>.

Transient residual currents associated with single phase fault inception are not allowed to release the
distance protection. This is taken care of by a time-on-delay tIN, which should be set longer than the
expected duration of the transient.

If a single phase fault remains for some time, it is possible to bypass the tIN time delay, since the
next fault event is expected to be a cross-country fault. The criterion for this bypass is that the
residual voltage is greater than setting level 3U0> for a time longer than setting tUN. The time-off-
delay tOffUN is used to make sure that the bypass is steady during the cross-country fault.

The time delay for residual current start is also bypassed as soon as two low voltages are detected
during the cross-country fault (startUPP). See Figure 288 for a simplified diagram showing the
residual current start logic.

startUPP

OR
tUN tOffUN
3U0 > 3U0> t t
(Non delayed IN start)
AND

tIN startIN
OR
3I0 > IN> t

IEC16000018-1-en.vsdx
IEC16000018 V2 EN-US

Figure 288: Residual current criteria

Transformer protection RET670 503

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.19.7.2 Phase selection GUID-A3B9F4A9-30D1-40E5-B0A8-6BB66093C27A v2

During a cross-country fault, the phase with an external fault typically does not carry any fault
current, which will make it difficult for a conventional distance phase selection function to detect the
fault. Therefore, PPL2PHIZ function provides an additional phase selection based on voltage.

PPL2PHIZ is designed to detect two-phase faults based on under-voltage in two phases or between
two phases.

ULx < UPN<

L1
L2 OR startU
AND
L3

3U0 > 3U0>

AND startUL1L2
OR

AND startUL2L3
OR
startUL1
OR
AND startUL3L1
ULxLy < UPP< OR
startUL2
L1L2 OR
L2L3
startUL3
L3L1 OR
startIN

UL1
UL2 AND
UL3 Automatic
UL1L2 phase
AND
UL2L3 detection
UL3L1
AND
OpAutoDetect

IEC16000019-1-en.vsdx

IEC16000019 V2 EN-US

Figure 289: Voltage based phase selection

The voltage phase selection can be complemented with external phase selection through inputs
RELL1-3N.

Voltage phase selection is disabled in No Filter and NoPref operating modes.

504 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

startUL1
AND
startUL2
startUPP
AND OR
startUL3
AND
OperMode = No Filter
OR
OperMode = NoPref

startL1
RELL1N OR

startL2
RELL2N OR

startL3
RELL3N OR

IEC16000020-1-en.vsdx
IEC16000020 V1 EN-US

Figure 290: Start logic

In meshed and complex networks, it may be difficult to find appropriate under-voltage settings for
phase selection. Therefore an automatic phase selection logic is made available which works in
parallel with a set under-voltage criterion in order to detect the two faulty phases even for complex
networks. This automatic phase selection logic can be switch off or on with the setting OpAutoDetect,
which by default is set On. If for any reason even this additional logic is unable to detect the two
faulty phases, then after a short time delay all three phase-to-earth loops of the distance protection
will be released for operation. The final result might be that both faulty feeders are disconnected. In
other words, protection operation is prioritized over strict adherence to preference.

8.19.7.3 Preference logic GUID-A7FCCE03-C841-4BAD-98F8-EB9497D53687 v2

The different operating modes (selected with OperMode setting) determine how the internal status is
used to release the phases of the connected distance protection.

This setting shall be set in accordance with used phase preference scheme in the protected network.
It is of uttermost importance that all distance relays installed in this network has the same setting
value for this parameter.

No Filter mode GUID-BB45C4A8-890F-4716-940C-53BBB47710F3 v1

In No Filter mode, all distance protection phases are released constantly, leaving it to the phase
selection inside the distance protection to decide which distance zone loops should be allowed to
operate.

TRUE zrelL1

TRUE zrelL2

TRUE zrelL3

IEC16000021-1-en.vsdx
IEC16000021 V1 EN-US

Figure 291: No Filter mode

No Filter mode is equivalent to disconnecting the PPL2PHIZ from the distance protection.

Transformer protection RET670 505

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

No Preference mode GUID-3D947DCA-7938-4C44-8BA6-4DA2789EDC98 v1

The ‘NoPref’ mode uses only the residual current criteria (startIN). There is no preference provided in
this mode. All three phase-to-earth loops of the distance protection releases when a residual current
start has occurred.

TRUE
zrelL1
AND
TRUE
zrelL2
AND
TRUE
zrelL3
AND

startIN

IEC16000022-1-en.vsdx
IEC16000022 V1 EN-US

Figure 292: No Preference mode

Preference modes GUID-BE61A451-E389-4136-8C0B-2C04888EEACE v2

In the preference modes (for example, ‘1231c’), the internal under-voltage phase selection status is
filtered with the selected preference scheme to achieve the desired phase preference. Only the
preferred phase-to-earth loop of the distance protection is released to operate. In addition to the
voltage phase selection, a residual current start is also required for operation.

A logic is also included to handle the special case where only one start (startL1-3) is present.

The internal under-voltage phase selection always issues a release in at least two phases, but the
inputs RELL1-3N can be activated with some time apart. If no measures are taken, the phase
activated first will pass through the preference scheme and release the distance protection. Since it
could a be non-preferred phase, a time delay of 40 ms is provided to release if only one phase is
detected, in order to wait for the second phase to be activated. If no second phase is detected within
40 ms, the single phase is released without preference.

Additionally, there are some cases where no release would be issued:

• All three phases are involved in the fault and a cyclic scheme is selected
• No faulty phase can be detected due to an insufficient voltage drop

In both cases, no release signals come from the phase preference scheme. For these cases, an
additional logic is provided that releases all three phase-to-earth loops if there is no output from the
preference scheme after 40 ms from the activation of the residual current start.

Hence, if there is a residual current start, it is guaranteed that the distance protection is released in at
least one phase. This is valid for all phase preference schemes.

506 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Preference
OperMode Scheme
Scheme
startL1 prefL1
INL1 OUTL1
startL2 prefL2
INL2 OUTL2
startL3 prefL3
INL3 OUTL3

More than
one true stIN
AND
startIN
40 ms
stIN40ms
t

IEC16000023-1-en.vsdx
IEC16000023 V2 EN-US

Figure 293: Logic to detect the preferred phase

prefL1
OR zrelL1
AND
prefL2
OR zrelL2
AND
prefL3
OR zrelL3
AND
30 ms
OR t

AND
stIN40ms
stIN OR

IEC16000024-1-en.vsdx
IEC16000024 V2 EN-US

Figure 294: Logic to release the preferred phase towards distance protection
Table 270 shows the preferred phase for each detected cross-country fault type and operating mode
(OperMode).

Table 270: Preferred phase for each cross-country fault type and operating mode

Operating mode start in L1 & L2 start in L2 & L3 start in L3 & L1

1231c L1 L2 L3
1321c L2 L3 L1
123a L1 L2 L1
132a L1 L3 L1
213a L2 L2 L1
231a L2 L2 L3
312a L1 L3 L3
321a L2 L3 L3

8.19.7.4 Output GUID-FCDCF1A9-A34D-4FD7-B488-3F31A93BE231 v2

All loop releasing signals are gathered in the binary coded integer output ZREL. The value of ZREL
can be calculated according to Equation 138.

Transformer protection RET670 507

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

ZREL L1N *1 L2N *2  L3N *4  L1L2*8  L2L3*16  L3L1*32

IECEQUATION16018 V1 EN-US (Equation 138)
For example, if only L1N is active, then the value is 1. If both start L1N and L3N are active, then the
value is 1+4=5.

The phase-to-phase loops are always released, that is, the value of ZREL will
always be at least 8+16+32=56. For example:
If only L1N is active, then the value is 1+56=57
If start L1N and L3N are active, then the value is 1+4+56=61

The BLOCK input will only block the enabling signals for phase-to-earth loops,
phase-to-phase loops are still released. The PPL2PHIZ is designed not to have any
influence on the phase-to-phase loops of the distance protection.

startU
AND

zrelL1
AND
zrelL2
AND L1N
zrelL3 L2N
AND L3N
Bool to ZREL
TRUE L1L2 Integer
TRUE L2L3
BLOCK TRUE L3L1

IEC16000025-1-en.vsdx
IEC16000025 V1 EN-US

Figure 295: Output signals from the function

8.19.8 Technical data

GUID-42119BFF-1756-431C-A5A1-0AB637213E96 v2

Table 271: PPL2PHIZ technical data

Function Range or value Accuracy

Operate value, phase-to-phase and (10 - 90)% of UBase ±0.5% of Ur
phase-to-neutral undervoltage, UPN<
and UPP<
Reset ratio, undervoltage < 105% -
Operate value, residual voltage, 3U0> (10 - 300)% of UBase ±0.5% of Ur at U ≤ Ur
±0.5% of U at U > Ur

Reset ratio, residual voltage > 95% -

Operate value, residual current (10 - 200)% of IBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir

Reset ratio, residual current > 95% -

Independent time delay for residual (0.000 - 60.000) s ±0.2% or ±25 ms whichever is greater
current at 0 to 2 x Iset, tIN

Table continues on next page

508 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Function Range or value Accuracy

Independent time delay for residual (0.000 - 60.000) s ±0.2% or ±25 ms whichever is greater
voltage at 0.8 to 1.2 x Uset, tUN

Independent dropoff-delay for residual (0.000 - 60.000) s ±0.2% or ±25 ms whichever is greater
voltage at 1.2 to 0.8 x Uset, tOffUN

Operating mode No Filter, NoPref

Cyclic: 1231c, 1321c
Acyclic: 123a, 132a, 213a, 231a,
312a, 321a

8.20 Under impedance protection for generators and

transformers ZGVPDIS GUID-1A3A4890-5CFA-417B-BDA4-EA001502AA60 v2

8.20.1 Identification GUID-752C21F4-972E-4E97-AB15-075FF720527F v2

Function description IEC 61850 IEC 60617 ANSI/

identification identification IEEEidentificatio
n
Under impedance function for ZGVPDIS 21G
generators and transformers

Z
S00346 V2 EN-US

8.20.2 Functionality GUID-5D0E6F04-8B60-4F12-8DA6-7043BE09A3CC v7

The under impedance protection (ZGVPDIS) function is a three zone full scheme impedance
protection using offset mho characteristics for detecting faults in the generator, generator-transformer
and transmission system. The three zones have fully independent measuring loops and settings. The
functionality also comprises an under voltage seal-in feature to ensure issuing of a trip even if the
current transformer goes into saturation and, in addition, the positive-sequence-based load
encroachment feature for the second and the third impedance zone. Built-in compensation for the
unit step-up transformer vector group connection is available.

8.20.3 Function block GUID-8FA2E41C-1299-40F1-82E7-50EB7E0BE442 v3

ZGVPDIS
I3P* TRIP
U3P* TRZ1
BLOCK TRZ2
BLKZ TRZ3
BLKUV TRUV
START
STZ1
STZ2
STZ3
STUV

IEC14000018-1-en.vsd
IEC14000018 V1 EN-US

Figure 296: ZGVPDIS function block

Transformer protection RET670 509

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.20.4 Signals
PID-3587-INPUTSIGNALS v8

Table 272: ZGVPDIS Input signals

Name Type Default Description

I3P GROUP - Connection for current sample signals
SIGNAL
U3P GROUP - Connection for voltage sample signals
SIGNAL
BLOCK BOOLEAN 0 Block of the function
BLKZ BOOLEAN 0 Block due to fuse failure
BLKUV BOOLEAN 0 Block of the under voltage seal in

PID-3587-OUTPUTSIGNALS v8

Table 273: ZGVPDIS Output signals

Name Type Description

TRIP BOOLEAN General Trip
TRZ1 BOOLEAN Trip signal Zone 1
TRZ2 BOOLEAN Trip signal Zone 2
TRZ3 BOOLEAN Trip signal Zone 3
TRUV BOOLEAN Trip from Under voltage seal in
START BOOLEAN General start
STZ1 BOOLEAN Start signal Zone 1
STZ2 BOOLEAN Start signal Zone 2
STZ3 BOOLEAN Start signal Zone 3
STUV BOOLEAN Start of under voltage seal in

8.20.5 Settings
PID-3587-SETTINGS v8

Table 274: ZGVPDIS Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
ImpedanceAng 5 - 90 Deg 1 80 Impedance angle in degrees, common
for all zones
IMinOp 5 - 80 %IB 1 10 Minimum operate phase current
OpModeZ1 Off - - PP Loops Operation mode of Zone 1: Off/Ph-Ph
PP Loops loops
Z1Fwd 3.0 - 100.0 % Zb 0.1 8.0 Zone 1 forward reach in % of rated
impedance, 100%=full load
Z1Rev 3.0 - 100.0 % Zb 0.1 8.0 Zone 1 reverse reach in % of rated
impedance, 100%=full load
tZ1 0.000 - 60.000 s 0.001 0.000 Time delay to operate for Zone 1
OpModeZ2 Off - - EnhancedReach Operation mode of Zone 2: Off/Ph-Ph/
PP Loops EnhancedReach
EnhancedReach
Z2Fwd 3.0 - 200.0 % Zb 0.1 15.0 Zone 2 forward reach in % of rated
impedance, 100%=full load
Table continues on next page

510 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Name Values (Range) Unit Step Default Description

Z2Rev 3.0 - 200.0 % Zb 0.1 8.0 Zone 2 reverse reach in % of rated
impedance, 100%=full load
tZ2 0.000 - 60.000 s 0.001 0.500 Time delay to operate for Zone 2
OpModeZ3 Off - - EnhancedReach Operation mode of Zone 3: Off/Ph-Ph/
PP Loops EnhancedReach
EnhancedReach
Z3Fwd 3.0 - 200.0 % Zb 0.1 75.0 Zone 3 forward reach in % of rated
impedance, 100%=full load
Z3Rev 3.0 - 200.0 % Zb 0.1 8.0 Zone 3 reverse reach in % of rated
impedance, 100%=full load
tZ3 0.000 - 60.000 s 0.001 1.500 Time delay to operate for Zone 3
OpModeU< Off - - Off Enable under voltage seal in (Off/
Z2Start Z2Start/Z3Start)
Z3Start
U< 5 - 90 %UB 1 70 Start value of under voltage seal in
tU< 0.000 - 60.000 s 0.001 5.000 Time delay to operate for under voltage
seal in

Table 275: ZGVPDIS Group settings (advanced)

Name Values (Range) Unit Step Default Description

RLd 5 - 120 % Zb 1 50 Resistive reach in % for load
encroachment charateristics
ArgLd 5 - 85 Deg 1 38 Load encroachment inclination of load
angular sector
LoadEnchModZ2 Off - - Off Enable load encroachement for Zone 2
On Off/On
LoadEnchModZ3 Off - - On Enable load encroachement for Zone 3
On Off/On

Table 276: ZGVPDIS Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

8.20.6 Monitored data

PID-3587-MONITOREDDATA v7

Table 277: ZGVPDIS Monitored data

Name Type Values (Range) Unit Description

UL1 REAL - kV Voltage in phase L1
UL2 REAL - kV Voltage in phase L2
UL3 REAL - kV Voltage in phase L3
IL1 REAL - A Current in phase L1
IL2 REAL - A Current in phase L2
IL3 REAL - A Current in phase L3

Transformer protection RET670 511

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

8.20.7 Operation principle GUID-DB4C0FEC-2D34-42AA-A105-E30B00CE1B7E v3

The full scheme backup distance element constitutes of three operating zones. Zone1 has only the
phase-to-phase loops enabled. Zone2 and zone3 can be selected for phase –to-phase or Enhanced
reach loop. Each measuring loop use the offset mho characteristic

The base value of impedance can be calculated according to equation 139.

UBase
ZBase =
3 IBase
IECEQUATION1400024 V1 EN-US (Equation 139)

Where,
ZBase is the base value of impedance
UBase is the line-to-line voltage rating at the generator terminal
IBase is the line current rating at the generator terminal

The minimum operating current is provided using the setting IMinOp.

All the outputs will be blocked by activation of the BLOCK or BLKZ input.

Offset mho characteristic

ZGVPDIS consists of three distance elements operated for three zones separately. Each zone
consists of measuring loops which uses self-polarized offset mho characteristics with both forward
and reverse reach settings for the detection of the fault in the respective zone. The operating
characteristics of all the three zones are shown in Figure 297. The ImpedanceAngle setting is
common to all three zones.

512 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

jX

Offset Mho, Zone3

Offset Mho, Zone2

Offset Mho, Zone1

ImpedanceAng

IEC11000294-2-en.vsd
IEC11000294 V2 EN-US

Figure 297: Offset mho characteristics of three zones

The complete functionality is shown in figure 298.

Transformer protection RET670 513

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

U3P STZ1
I3P ZONE 1 TRZ1
BLKZ OpModeZ1
Z1Fwd
BLOCK Z1Rev
tZ1 START
³1

ZONE 2 STZ2
OpModeZ2
Z2Fwd TRZ2
Z2Rev
tZ2
LoadEnchModZ2

OPERATE
³1
³1

STZ3
ZONE 3
OpModeZ3
Z3Fwd
Z3Rev
tZ3 TRZ3
LoadEnchModZ3

LoadEnch

RLd
ArgLd

UVSealIn TRUV

OpModeU< STUV
U<
tU<
BLCKUV

IEC11000295-3-en.vsd
IEC11000295 V2 EN-US

Figure 298: Block diagram of ZGVPDIS

8.20.7.1 Operation principle of zone 1 GUID-994DD2FC-3B69-4ED6-AB94-A0C0D4399637 v3

In general, the zone 1 must cover the generator winding, the cables or busbars and step up
transformer.

Under impedance functionality is provided as selective protection for the phase-to-phase faults in
zone 1. Hence the functionality of zone 1 includes only phase-to-phase measuring loops.

Zone 1 functionality can be set to PP Loops or Off using the setting OpModeZ1.

Figure 299 shows the functionality of zone 1.

514 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

BLOCK

BLKZ

U3P Comparator
ZL1L2 <
I3P
OpModeZ1
Z1Fwd STZ1
Z1Rev
ImpedanceAng

tZ1
Comparator
³1 t TRZ1
ZL2L3 <
OPModeZ1
Z1Fwd
Z1Rev
ImpedanceAng

Comparator
ZL3L1 <
OpModeZ1
Z1Fwd
Z1Rev
ImpedanceAng

IEC11000297-3-en.vsd
IEC11000297 V3 EN-US

Figure 299: Block diagram of zone 1

The functionality included in zone 1:

• Comparator to detect, if the operating impedance has entered inside zone 1 offset mho
characteristic.
• All three phase-to-phase loops are implemented separately.
• Forward and reverse reach values are provided in percentage of impedance base value at
generator.
• Operate time delay is provided.

Comparator characteristics
The comparator consists of offset mho characteristics. Three individual comparators are provided in
the three phase-to-phase loops. The offset mho characteristic is as shown in figure 300.

IL1L2 · jX
IL1L2 · Z 1Fwd
Ucomp1=UL1L2 - I L1L2 · Z1Fwd

Ucomp2=UL1L2 + IL1L2 · Z1REV

IL1L2 · R

- IL1L2· Z1REV
IEC11000296-2-en.vsd
IEC11000296 V2 EN-US

Figure 300: Simplified offset mho characteristics for L1-L2 fault in zone 1

Transformer protection RET670 515

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Criteria: Operation occurs if 90° ≤ β ≤ 270°.

In the above characteristics, Z1Fwd and Z1Rev are the forward and reverse reach percentage values
and ImpedanceAng is the characteristic angle provided for the zone 1 operation region.

Z 1Fwd = Z 1Fwd Ð ImpedanceAng

IECEQUATION14000025 V2 EN-US (Equation 140)

Z 1Rev = Z 1revÐ ImpedanceAng

IECEQUATION14000026 V2 EN-US (Equation 141)

Voltage and current phasors selected for phase-to-phase loops are:

Sl.No Phase-to-phase loop Voltage phasor Current phasor

L1-L2
1 UL1L 2 IL1L 2
L2-L3
2 UL 2 L3 IL 2 L3
L3-L1
3 UL3L1 IL3L1

Operate time
The operate time delay for zone 1 can be provided using the setting tZ1.

8.20.7.2 Operation principle of zone 2 GUID-AE603E22-FD38-46FD-BE31-301272BFD0E1 v5

Figure 301 shows the function block diagram describing the functionality of zone 2.

Zero
sequence
Voltage
Compensation
U3P
Measuring Loop
EnhancedReach
I3P

BLOCK OpModeZ2
Z2Fwd
Z2Rev
BLKZ ImpedanceAng

1

Measuring Loop
phase-to-phase STZ2
(ZL1L2<,ZL2L3<,ZL3L1<) &

OpModeZ2
tZ2
Z2Fwd
t TRZ2
Z2Rev
ImpedanceAng

LoadEnchModZ2
Load
Encroachment T
1 F
RLd
ArgLd

IEC11000298-3-en.vsd

IEC11000298 V3 EN-US

Figure 301: Block diagram of zone 2

516 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Zone 2 can be used to cover up to the HV side of the transformer and the HV bus bar. It also covers
to some degree, the stator winding. The time to trip is provided in order to coordinate with the zone 1
element on the shortest outgoing line from the bus.

Zone 2 coverage provides backup for the phase-to-phase and three-phase faults in generator. It also
protects LV winding of generator transformer and phase-to-earth, phase-to-phase and three-phase
faults in the HV side of transformer and the bus. A separate maximum current feature is provided in
phase-to-earth loop selection which gives correct reach measurement for phase-to-phase fault on HV
side. Zero sequence compensation for the phase voltages is given in phase-to-earth measuring
loops in order to prevent operation for the stator earth faults.

Zone 2 can be selected for different measuring loops using the setting OpModeZ2. The OpModeZ2
can be selected as Off or PP Loops or EnhancedReach. If the OpModeZ2 is selected as
EnhancedReach, the loop used for measurements is the phase-to-earth measuring loop (L1E, L2E
and L3E) which is with maximum phase current of all the three phase currents.

Figure 302 shows the logic to detect the phase to earth loop with maximum phase current.

A startPh1 &
i1Mag a
a==b
b
startPh2 & ³1 start
&

B
i2Mag a
a==b
b startPh3 &
&
³1
C
i3Mag a
a==b
b

MAX

IEC11000307_1_en.vsd
IEC11000307 V1 EN-US

Figure 302: Logic diagram for the selection of the maximum current loop
The phase-to-earth voltage is compensated with zero sequence voltage in order to avoid the function
operating for earth faults in zone 1, that is, complete generator stator winding and LV winding of the
power transformer.

The reach settings for zone 2 can be provided using the Z2Fwd, Z2Rev and ImpedanceAng settings.
The Z2Fwd is forward reach setting and Z2Rev is reverse reach setting. The offset mho
characteristic for phase-to-earth loop is shown in Figure 303. The offset mho characteristics for
phase-to-phase loop is shown in Figure 304.

Transformer protection RET670 517

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

IL1  jX
IL1  Z 2 Fwd
Ucomp1  UL1E  U 0  IL1  Z 2 Fwd

Ucomp 2  U L1E  U 0  IL1  Z 2 REV

IL1  R

 IL1  Z 2 REV

IEC11000299-2-en.vsd
IEC11000299 V2 EN-US

Figure 303: Simplified offset mho characteristics for L1-to-E fault in zone 2

IL1L 2  jX
IL1L2  Z 2 Fwd
Ucomp1  UL1L2  IL1L2  Z 2 Fwd

Ucomp 2  UL1L 2  IL1L 2  Z 2 REV

IL1L 2  R

 IL1L 2  Z 2 REV

IEC11000300-2-en.vsd
IEC11000300 V2 EN-US

Figure 304: Simplified offset mho characteristics for L1-to-L2 fault in zone 2
Operation occurs if 90° ≤ β ≤ 270°.

Impedance defined in the Figure 303 and 304 is described in equation 142.

Z 2 Fwd = Z 2 Fwd Ð ImpedanceAng

Z 2 Rev = Z 2 RevÐ ImpedanceAng

GUID-007D6357-B7CF-4C21-B772-2245F06C83A2 V2 EN-US (Equation 142)

Voltage and current phasors selected for different measuring loops:

Phase Phase:

518 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

Sl.No Measuring Loop Voltage Phasor Current Phasor

L1-L2
1 UL1L 2 IL1L 2
L2-L3
2 UL 2 L3 IL 2 L3
L3-L1
3 UL3L1 IL3L1

Enhanced Reach:

Sl.No Measuring Loop Voltage Phasor Current Phasor

IL1 1)
1 UL1E - U 0 IL1

IL21)
2 UL 2 E - U 0 IL2

3 IL31)
UL3 E - U 0 IL3

1) Only the loop with maximum current is allowed to operate

Operate time
The operate time delay for zone 2 can be provided using the setting tZ2.

Zone 2 is provided load encroachment detection feature based on positive sequence components
measurements.. This feature avoids the function from operating due to load encroachment. The load
encroachment feature for zone 2 can be set using LoadEnchModZ2 to On or Off.

8.20.7.3 Operation principle of zone 3 GUID-23971D73-2CDE-4757-82A7-14691C34CCCB v3

Zone 3 is used to cover up to the HV side of the transformer, interconnecting bus network and
outgoing lines. The time to trip should be provided in order to coordinate with the transmission line
protection.

The zone 3 will provide protection from phase-to-earth, phase-phase and three-phase faults on the
HV side of the system. The zone 3 functionality is same as zone 2 hence the explanation of zone 2
applies except the zone 3 has separate reach (Z3Fwd, Z3Rev), operate timer (tZ3) and load
encroachment enable (LoadEnchModZ3) settings.

8.20.7.4 Load encroachment GUID-DA94E18E-983C-44FA-B643-CAF016CB87F7 v3

The load encroachment characteristics can be set for zone2 and zone3. Load encroachment can be
enabled for zone 2 by setting LoadEnchModZ2 to On. Similarly the load encroachment for zone 3
can be enabled by setting LoadEnchModZ3 to On.

The load encroachment characteristic is based on positive sequence quantities and can be set using
the settings RLd and ArgLd.

RLd is the positive sequence resistive reach value in percentage. ArgLd is angle in degrees from the
origin to the resistive axis as shown in Figure 305.

Transformer protection RET670 519

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 8 1MRK 504 164-UEN Rev. N
Impedance protection

Load encroachment characteristic

jX

ArgLd ArgLd

-RLd RLd R
ArgLd ArgLd

IEC11000304_1_en
IEC11000304 V1 EN-US

Figure 305: Load encroachment characteristics

8.20.7.5 Under voltage seal-in GUID-03357A87-A879-477C-ADBE-CC28AB54D34E v4

The under voltage seal-in logic ensures the trip under fault condition, where as under impedance
function will reset due to CT saturation. The start signal of zone 2 and zone 3 elements trigger the
under voltage seal-in. This can be selected using the setting OpModeU< . The setting OpModeU<
can be selected as Off or Z2Start or Z3Start. Select Z2Start to choose zone 2 for triggering the seal-
in logic. Similarly, select Z3Start to choose zone 3 for triggering the seal-in logic.

Under voltage seal-in is activated from the criterion based on line-to-line voltage magnitude. The
voltage criteria checks by comparing all three line-to-line voltage levels with the level given by the
setting parameter U<. If any loop detects lower voltage, the under voltage seal-in logic gets triggered,
provided the respective selected zone start is also high. Once the under voltage seal-in logic is
triggered, the pick-up signal STUV becomes high. If it is constantly high for a time longer than the
setting tU<, the tripping signal TRUV is issued as a pulse signal with a duration of one second.

Figure 306 shows the functionality of under voltage seal-in for zone 2 and zone 3.

520 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 8
Impedance protection

- STUV
q1
BLOCK
BLKUV 1 tU<
TRUV
Zone 2 Start & t
tPulse = 1sec
&
OpModeU< =
10 ms -
0 = Off b0 1 q1
int 1 t
1 = Z2Start
2 = Z3Start b1
Drop-Off
& timer
Zone 3 Start

uP1P2 a
a<b
U< b

uP2P3 a
a<b 1
U< b

uP3P1 a
a< b
U< b

IEC11000306-3-en.vsd

IEC11000306 V3 EN-US

Figure 306: Under voltage seal-in for zone 2 and zone 3

8.20.8 Technical data

GUID-E8104D00-3183-4F55-89F9-A74B14BFE6FE v7

Table 278: ZGVPDIS technical data

Function Range or value Accuracy

Number of zones 3 -
±5.0% of set impedance
(3.0 - 200.0)% of Zr Conditions:
Forward reach Voltage range: (0.1 - 1.1) x Ur
where Zr=UBase/√3∗IBase
Current range: (0.5 - 30) x Ir

±5.0% of set impedance

(3.0 - 200.0)% of Zr Conditions:
Reverse reach Voltage range: (0.1 - 1.1) x Ur
where Zr=UBase/√3∗IBase
Current range: (0.5 - 30) x Ir

Impedance angle (5 - 90) degrees -

Reset ratio 105% typically -

Start time at 1.2 x set impedance to Min. = 15 ms

-
0.8 x set impedance Max. = 35 ms
Independent time delay to operate at
1.2 x set impedance to 0.8 x set (0.000 – 60.000) s ±0.2% or ±40 ms whichever is greater
impedance

Transformer protection RET670 521

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
522
1MRK 504 164-UEN Rev. N Section 9
Current protection

Section 9 Current protection

9.1 Instantaneous phase overcurrent protection PHPIOC IP14506-1 v6

9.1.1 Identification
M14880-1 v5

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Instantaneous phase overcurrent PHPIOC 50
protection
3I>>

SYMBOL-Z V1 EN-US

9.1.2 Functionality M12910-3 v15

The instantaneous three phase overcurrent (PHPIOC) function has a low transient overreach and
short tripping time to allow use as a high set short-circuit protection function.

9.1.3 Function block M12602-3 v6

PHPIOC
I3P* TRIP
BLOCK TRL1
ENMULT TRL2
TRL3

IEC04000391-2-en.vsd
IEC04000391 V2 EN-US

Figure 307: PHPIOC function block

9.1.4 Signals IP11433-1 v2

PID-6914-INPUTSIGNALS v3

Table 279: PHPIOC Input signals

Name Type Default Description

I3P GROUP - Three phase current
SIGNAL
BLOCK BOOLEAN 0 Block of function
ENMULT BOOLEAN 0 Enable current start value multiplier

PID-6914-OUTPUTSIGNALS v3

Table 280: PHPIOC Output signals

Name Type Description

TRIP BOOLEAN Trip signal from any phase
TRL1 BOOLEAN Trip signal from phase L1
TRL2 BOOLEAN Trip signal from phase L2
TRL3 BOOLEAN Trip signal from phase L3

Transformer protection RET670 523

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.1.5 Settings IP11434-1 v2

PID-6914-SETTINGS v3

Table 281: PHPIOC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OpMode 2 out of 3 - - 1 out of 3 Select operation mode 2-out of 3 / 1-out
1 out of 3 of 3
IP>> 5 - 2500 %IB 1 200 Operate phase current level in % of
IBase

Table 282: PHPIOC Group settings (advanced)

Name Values (Range) Unit Step Default Description

IP>>Min 5 - 2500 %IB 1 5 Minimum used operate phase current
level in % of IBase, if IP>> is less than
IP>>Min then IP>> is set to IP>>Min
IP>>Max 5 - 2500 %IB 1 2500 Maximum used operate phase current
level in % of IBase, if IP>> is greater
than IP>>Max then IP>> is set to
IP>>Max
StValMult 0.5 - 5.0 - 0.1 1.0 Multiplier for operate current level

Table 283: PHPIOC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

9.1.6 Monitored data

PID-6914-MONITOREDDATA v3

Table 284: PHPIOC Monitored data

Name Type Values (Range) Unit Description

IL1 REAL - A Current in phase L1
IL2 REAL - A Current in phase L2
IL3 REAL - A Current in phase L3

9.1.7 Operation principle M12913-3 v8

The sampled analogue phase currents are pre-processed in a discrete Fourier filter (DFT) block. The
RMS value of each phase current is derived from the fundamental frequency components, as well as
sampled values of each phase current. These phase current values are fed to the instantaneous
phase overcurrent protection 3-phase output function PHPIOC. In a comparator the RMS values are
compared to the set operation current value of the function (IP>>).

If a phase current is larger than the set operation current a signal from the comparator for this phase
is set to true. This signal will, without delay, activate the output signal TRLn (n=1,2,3) for this phase
and the TRIP signal that is common for all three phases.

There is an operation mode (OpMode) setting: 1 out of 3 or 2 out of 3. If the parameter is set to 1 out
of 3, any phase trip signal will be activated. If the parameter is set to 2 out of 3, at least two phase
signals must be activated for trip.

524 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

There is also a possibility to activate a preset change of the set operation current (StValMult) via a
binary input (ENMULT). In some applications the operation value needs to be changed, for example,
due to transformer inrush currents.

The operation current value IP>>, is limited to be between IP>>Max and IP>>Min. The default values
of the limits are the same as the setting limits for IP>>, and the limits can only be used for reducing
the allowed range of IP>>. This feature is used when remote setting of the operation current value is
allowed, making it possible to ensure that the operation value used is reasonable. If IP>> is set
outside IP>>Max and IP>>Min, the closest of the limits to IP>> is used by the function. If IP>>Max is
smaller then IP>>Min, the limits are swapped. The principle of the limitation is shown in Figure 308.

IP>>Max
MAX hi

u y
IP>>_used
IP>>

MIN lo
IP>>Min
IEC17000016-1-en.vsdx
IEC17000016 V1 EN-US

Figure 308: Logic for limitation of used operation current value

PHPIOC can be blocked using the binary input BLOCK.

9.1.8 Technical data IP11435-1 v1

M12336-1 v14

Table 285: PHPIOC technical data

Function Range or value Accuracy

Operate current (5-2500)% of lBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir

Reset ratio > 95% at (50–2500)% of IBase -

Operate time at 0 to 2 x Iset Min. = 15 ms -
Max. = 25 ms
Reset time at 2 x Iset to 0 Min. = 15 ms -
Max. = 30 ms
Critical impulse time 10 ms typically at 0 to 2 x Iset -

Operate time at 0 to 10 x Iset Min. = 5 ms -

Max. = 15 ms
Reset time at 10 x Iset to 0 Min. = 25 ms -
Max. = 40 ms
Critical impulse time 2 ms typically at 0 to 10 x Iset -

Dynamic overreach < 5% at t = 100 ms -

9.2 Directional phase overcurrent protection, four steps

OC4PTOC SEMOD129998-1 v8

Transformer protection RET670 525

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.2.1 Function revision history GUID-154CAE8E-8FD4-460C-852D-6E5C93545F0D v1

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 -
M 2.2.4 -
N 2.2.5 • The harmonic restraint function changed to freeze the definite and IDMT timers.
• The maximum value of the settings IMin1, IMin2, IMin3 and IMin4 has been
decreased to 1000.0 % of IBase.

9.2.2 Identification
M14885-1 v6

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Directional phase overcurrent OC4PTOC 51_67
protection, four steps

TOC-REVA V2 EN-US

9.2.3 Functionality M12846-3 v18

Directional phase overcurrent protection, four steps (OC4PTOC) has an inverse or definite time delay
for each step.

All IEC and ANSI inverse time characteristics are available together with an optional user defined
time characteristic.

The directional function needs voltage as it is voltage polarized with memory. The function can be set
to be directional or non-directional independently for each of the steps.

A second harmonic blocking level can be set for the function and can be used to block each step
individually.

526 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

9.2.4 Function block M12609-3 v8

OC4PTOC
I3P* TRIP
U3P* TR1
BLOCK TR2
BLKTR TR3
BLKST1 TR4
BLKST2 TRL1
BLKST3 TRL2
BLKST4 TRL3
ENMULT1 TR1L1
ENMULT2 TR1L2
ENMULT3 TR1L3
ENMULT4 TR2L1
TR2L2
TR2L3
TR3L1
TR3L2
TR3L3
TR4L1
TR4L2
TR4L3
START
ST1
ST2
ST3
ST4
STL1
STL2
STL3
ST1L1
ST1L2
ST1L3
ST2L1
ST2L2
ST2L3
ST3L1
ST3L2
ST3L3
ST4L1
ST4L2
ST4L3
ST2NDHRM
DIRL1
DIRL2
DIRL3
STDI RCND
IEC06000187-4-en.vsdx
IEC06000187 V4 EN-US

Figure 309: OC4PTOC function block

9.2.5 Signals
PID-7873-INPUTSIGNALS v1

Table 286: OC4PTOC Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Block of trip
BLKST1 BOOLEAN 0 Block of Step1
BLKST2 BOOLEAN 0 Block of Step2
BLKST3 BOOLEAN 0 Block of Step3
BLKST4 BOOLEAN 0 Block of Step4
Table continues on next page

Transformer protection RET670 527

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Name Type Default Description

ENMULT1 BOOLEAN 0 When activated, the current multiplier is in use for step1
ENMULT2 BOOLEAN 0 When activated, the current multiplier is in use for step2
ENMULT3 BOOLEAN 0 When activated, the current multiplier is in use for step3
ENMULT4 BOOLEAN 0 When activated, the current multiplier is in use for step4

PID-7873-OUTPUTSIGNALS v1

Table 287: OC4PTOC Output signals

Name Type Description

TRIP BOOLEAN Trip
TR1 BOOLEAN Common trip signal from step1
TR2 BOOLEAN Common trip signal from step2
TR3 BOOLEAN Common trip signal from step3
TR4 BOOLEAN Common trip signal from step4
TRL1 BOOLEAN Trip signal from phase L1
TRL2 BOOLEAN Trip signal from phase L2
TRL3 BOOLEAN Trip signal from phase L3
TR1L1 BOOLEAN Trip signal from step1 phase L1
TR1L2 BOOLEAN Trip signal from step1 phase L2
TR1L3 BOOLEAN Trip signal from step1 phase L3
TR2L1 BOOLEAN Trip signal from step2 phase L1
TR2L2 BOOLEAN Trip signal from step2 phase L2
TR2L3 BOOLEAN Trip signal from step2 phase L3
TR3L1 BOOLEAN Trip signal from step3 phase L1
TR3L2 BOOLEAN Trip signal from step3 phase L2
TR3L3 BOOLEAN Trip signal from step3 phase L3
TR4L1 BOOLEAN Trip signal from step4 phase L1
TR4L2 BOOLEAN Trip signal from step4 phase L2
TR4L3 BOOLEAN Trip signal from step4 phase L3
START BOOLEAN General start signal
ST1 BOOLEAN Common start signal from step1
ST2 BOOLEAN Common start signal from step2
ST3 BOOLEAN Common start signal from step3
ST4 BOOLEAN Common start signal from step4
STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3
ST1L1 BOOLEAN Start signal from step1 phase L1
ST1L2 BOOLEAN Start signal from step1 phase L2
ST1L3 BOOLEAN Start signal from step1 phase L3
ST2L1 BOOLEAN Start signal from step2 phase L1
ST2L2 BOOLEAN Start signal from step2 phase L2
ST2L3 BOOLEAN Start signal from step2 phase L3
Table continues on next page

528 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Type Description

ST3L1 BOOLEAN Start signal from step3 phase L1
ST3L2 BOOLEAN Start signal from step3 phase L2
ST3L3 BOOLEAN Start signal from step3 phase L3
ST4L1 BOOLEAN Start signal from step4 phase L1
ST4L2 BOOLEAN Start signal from step4 phase L2
ST4L3 BOOLEAN Start signal from step4 phase L3
ST2NDHRM BOOLEAN Second harmonic detected
DIRL1 INTEGER Direction for phase1
DIRL2 INTEGER Direction for phase2
DIRL3 INTEGER Direction for phase3
STDIRCND INTEGER Binary coded start and directional information

9.2.6 Settings
PID-7873-SETTINGS v1

Table 288: OC4PTOC Non group settings (basic)

Name Values (Range) Unit Step Default Description

MeasType DFT - - DFT Selection between DFT and RMS
RMS measurement
GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 289: OC4PTOC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
AngleRCA 40 - 65 Deg 1 55 Relay characteristic angle (RCA)
AngleROA 40 - 89 Deg 1 80 Relay operation angle (ROA)
StartPhSel 1 out of 3 - - 1 out of 3 Number of phases required for op (1 of
2 out of 3 3, 2 of 3, 3 of 3)
3 out of 3
DirMode1 Off - - Non-directional Directional mode of step 1 (off, nodir,
Non-directional forward, reverse)
Forward
Reverse
Table continues on next page

Transformer protection RET670 529

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Name Values (Range) Unit Step Default Description

Characterist1 ANSI Ext. inv. - - ANSI Def. Time Selection of time delay curve type for
ANSI Very inv. step 1
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I1> 5 - 2500 %IB 1 1000 Operating phase current level for step 1
in % of IBase
t1 0.000 - 60.000 s 0.001 0.000 Definite time delay / additional time delay
for IDMT characteristics of step 1
k1 0.05 - 999.00 - 0.01 0.05 Time multiplier for the inverse time delay
for step 1
IMin1 1 - 1000 %IB 1 100 Minimum operate current for step1 in %
of IBase
t1Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse curves
for step 1
I1Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for current operate level for
step 1
DirMode2 Off - - Non-directional Directional mode of step 2 (off, nodir,
Non-directional forward, reverse)
Forward
Reverse
Characterist2 ANSI Ext. inv. - - ANSI Def. Time Selection of time delay curve type for
ANSI Very inv. step 2
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I2> 5 - 2500 %IB 1 500 Operating phase current level for step 2
in % of IBase
t2 0.000 - 60.000 s 0.001 0.400 Definite time delay / additional time delay
for IDMT characteristics of step 2
k2 0.05 - 999.00 - 0.01 0.05 Time multiplier for the inverse time delay
for step 2
Table continues on next page

530 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Values (Range) Unit Step Default Description

IMin2 1 - 1000 %IB 1 50 Minimum operate current for step2 in %
of IBase
t2Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse curves
for step 2
I2Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for current operate level for
step 2
DirMode3 Off - - Non-directional Directional mode of step 3 (off, nodir,
Non-directional forward, reverse)
Forward
Reverse
Characterist3 ANSI Ext. inv. - - ANSI Def. Time Selection of time delay curve type for
ANSI Very inv. step 3
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I3> 5 - 2500 %IB 1 250 Operating phase current level for step 3
in % of IBase
t3 0.000 - 60.000 s 0.001 0.800 Definite time delay / additional time delay
for IDMT characteristics of step 3
k3 0.05 - 999.00 - 0.01 0.05 Time multiplier for the inverse time delay
for step 3
IMin3 1 - 1000 %IB 1 33 Minimum operate current for step3 in %
of IBase
t3Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse curves
for step 3
I3Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for current operate level for
step 3
DirMode4 Off - - Non-directional Directional mode of step 4 (off, nodir,
Non-directional forward, reverse)
Forward
Reverse
Table continues on next page

Transformer protection RET670 531

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Name Values (Range) Unit Step Default Description

Characterist4 ANSI Ext. inv. - - ANSI Def. Time Selection of time delay curve type for
ANSI Very inv. step 4
ANSI Norm. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I4> 5 - 2500 %IB 1 175 Operating phase current level for step 4
in % of IBase
t4 0.000 - 60.000 s 0.001 2.000 Definite time delay / additional time delay
for IDMT characteristics of step 4
k4 0.05 - 999.00 - 0.01 0.05 Time multiplier for the inverse time delay
for step 4
IMin4 1 - 1000 %IB 1 17 Minimum operate current for step4 in %
of IBase
t4Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse curves
for step 4
I4Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for current operate level for
step 4

Table 290: OC4PTOC Group settings (advanced)

Name Values (Range) Unit Step Default Description

IMinOpPhSel 1 - 100 %IB 1 7 Minimum current for phase selection in
% of IBase
2ndHarmStab 5 - 100 % 1 20 Operate level of 2nd harmonic curr in %
of fundamental curr
I1>Max 5 - 2500 %IB 1 2500 Maximum used operating phase current
level for step 1 in % of IBase, if I1> is
greater than I1>Max then I1> is set to
I1>Max
I1>Min 5 - 2500 %IB 1 5 Minimum used operating phase current
level for step 1 in % of IBase, if I1> is
less than I1>Min then I1> is set to
I1>Min
ResetTypeCrv1 Instantaneous - - Instantaneous Selection of reset curve type for step 1
IEC Reset
ANSI reset
tReset1 0.000 - 60.000 s 0.001 0.020 Constant reset time for step 1
tPCrv1 0.005 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 1
tACrv1 0.005 - 200.000 - 0.001 13.500 Parameter A for customer programmable
curve for step 1
tBCrv1 0.00 - 20.00 - 0.01 0.00 Parameter B for customer programmable
curve for step 1
tCCrv1 0.1 - 10.0 - 0.1 1.0 Parameter C for customer
programmable curve for step 1
Table continues on next page

532 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Values (Range) Unit Step Default Description

tPRCrv1 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer
programmable curve for step 1
tTRCrv1 0.005 - 100.000 - 0.001 13.500 Parameter TR for customer
programmable curve for step 1
tCRCrv1 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer
programmable curve for step 1
HarmBlock1 Off - - Off Enable block of step 1 from harmonic
On restrain
I2>Max 5 - 2500 %IB 1 2500 Maximum used operating phase current
level for step 2 in % of IBase, if I2> is
greater than I2>Max then I2> is set to
I2>Max
I2>Min 5 - 2500 %IB 1 5 Minimum used operating phase current
level for step 2 in % of IBase, if I2> is
less than I2>Min then I2> is set to
I2>Min
ResetTypeCrv2 Instantaneous - - Instantaneous Selection of reset curve type for step 2
IEC Reset
ANSI reset
tReset2 0.000 - 60.000 s 0.001 0.020 Constant reset time for step 2
tPCrv2 0.005 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 2
tACrv2 0.005 - 200.000 - 0.001 13.500 Parameter A for customer programmable
curve for step 2
tBCrv2 0.00 - 20.00 - 0.01 0.00 Parameter B for customer programmable
curve for step 2
tCCrv2 0.1 - 10.0 - 0.1 1.0 Parameter C for customer
programmable curve for step 2
tPRCrv2 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer
programmable curve for step 2
tTRCrv2 0.005 - 100.000 - 0.001 13.500 Parameter TR for customer
programmable curve for step 2
tCRCrv2 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer
programmable curve for step 2
HarmBlock2 Off - - Off Enable block of step 2 from harmonic
On restrain
I3>Max 5 - 2500 %IB 1 2500 Maximum used operating phase current
level for step 3 in % of IBase, if I3> is
greater than I3>Max then I3> is set to
I3>Max
I3>Min 5 - 2500 %IB 1 5 Minimum used operating phase current
level for step 3 in % of IBase, if I3> is
less than I3>Min then I3> is set to
I3>Min
ResetTypeCrv3 Instantaneous - - Instantaneous Selection of reset curve type for step 3
IEC Reset
ANSI reset
tReset3 0.000 - 60.000 s 0.001 0.020 Constant reset time for step 3
tPCrv3 0.005 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 3
tACrv3 0.005 - 200.000 - 0.001 13.500 Parameter A for customer programmable
curve for step 3
tBCrv3 0.00 - 20.00 - 0.01 0.00 Parameter B for customer programmable
curve for step 3
Table continues on next page

Transformer protection RET670 533

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Name Values (Range) Unit Step Default Description

tCCrv3 0.1 - 10.0 - 0.1 1.0 Parameter C for customer
programmable curve for step 3
tPRCrv3 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer
programmable curve for step 3
tTRCrv3 0.005 - 100.000 - 0.001 13.500 Parameter TR for customer
programmable curve for step 3
tCRCrv3 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer
programmable curve for step 3
HarmBlock3 Off - - Off Enable block of step 3 from harmonic
On restrain
I4>Max 5 - 2500 %IB 1 2500 Maximum used operating phase current
level for step 4 in % of IBase, if I4> is
greater than I4>Max then I4> is set to
I4>Max
I4>Min 5 - 2500 %IB 1 5 Minimum used operating phase current
level for step 4 in % of IBase, if I4> is
less than I4>Min then I4> is set to
I4>Min
ResetTypeCrv4 Instantaneous - - Instantaneous Selection of reset curve type for step 4
IEC Reset
ANSI reset
tReset4 0.000 - 60.000 s 0.001 0.020 Constant reset time for step 4
tPCrv4 0.005 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 4
tACrv4 0.005 - 200.000 - 0.001 13.500 Parameter A for customer programmable
curve for step 4
tBCrv4 0.00 - 20.00 - 0.01 0.00 Parameter B for customer programmable
curve for step 4
tCCrv4 0.1 - 10.0 - 0.1 1.0 Parameter C for customer
programmable curve for step 4
tPRCrv4 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer
programmable curve for step 4
tTRCrv4 0.005 - 100.000 - 0.001 13.500 Parameter TR for customer
programmable curve for step 4
tCRCrv4 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer
programmable curve for step 4
HarmBlock4 Off - - Off Enable block of step 4 from harmonic
On restrain

9.2.7 Monitored data

PID-7873-MONITOREDDATA v1

Table 291: OC4PTOC Monitored data

Name Type Values (Range) Unit Description

DIRL1 INTEGER 0=No direction - Direction for phase1
1=Forward
2=Reverse
DIRL2 INTEGER 0=No direction - Direction for phase2
1=Forward
2=Reverse
DIRL3 INTEGER 0=No direction - Direction for phase3
1=Forward
2=Reverse
Table continues on next page

534 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Type Values (Range) Unit Description

IL1 REAL - A Current in phase L1
IL2 REAL - A Current in phase L2
IL3 REAL - A Current in phase L3

9.2.8 Operation principle M12883-3 v11

Directional phase overcurrent protection, four steps OC4PTOC is divided into four different sub-
functions. For each step x , where x is step 1, 2, 3 and 4, an operation mode is set by DirModex: Off/
Non-directional/Forward/Reverse.

The protection design can be divided into four parts:

• The direction element

• The harmonic restraint blocking function
• The four step overcurrent function
• The mode selection

If VT inputs are not available or not connected, setting parameter DirModex shall be
left to default value, Non-directional.

4 step overcurrent
Direction dirPh1Flt element faultState
faultState
Element One element for each
dirPh2Flt step
I3P dirPh3Flt START

U3P

TRIP

Harmonic harmRestrBlock
Restraint
Element

enableDir
Mode Selection
enableStep1-4
DirectionalMode1-4

IEC05000740-3-en.vsdx

IEC05000740 V3 EN-US

Figure 310: Functional overview of OC4PTOC

M12883-16 v13
A common setting for all steps, StartPhSel, is used to specify the number of phase currents to be
high to enable operation. These settings can be chosen: 1 out of 3, 2 out of 3 or 3 out of 3.

Using a parameter setting MeasType within the general settings for the function OC4PTOC, it is
possible to select the type of the measurement used for all overcurrent stages. Either discrete
Fourier filter (DFT) or true RMS filter (RMS) can be selected.

If the DFT option is selected, only the RMS value of the fundamental frequency component of each
phase current is derived. The influence of the DC current component and higher harmonic current
components are almost completely suppressed. If the RMS option is selected, then the true RMS

Transformer protection RET670 535

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

value is used. The true RMS value includes the contribution from the current DC component as well
as from the higher current harmonic in addition to the fundamental frequency component.

In a comparator, the DFT or RMS values are compared to the set operation current value of the
function (I1>, I2>, I3> or I4>) for each phase current. If a phase current is larger than the set
operation current, outputs START, STx, STL1, STL2 and STL3 are activated without delay. Output
signals STL1, STL2 and STL3 are common for all steps. This means that the lowest set step will
initiate the activation. The START signal is common for all three phases and all steps. It shall be
noted that the selection of measured value (DFT or RMS) do not influence the operation of
directional part of OC4PTOC.

Service values for individually measured phase currents are available on the local HMI for OC4PTOC
function, which simplifies testing, commissioning and in service operational checking of the function.

A harmonic restrain of the function can be chosen. A set 2nd harmonic current in relation to the
fundamental current is used.

The function can be directional. The direction of a fault is given as the current angle in relation to the
voltage angle. The fault current and fault voltage for the directional function are dependent on the
fault type. The selection of the measured value (DFT or RMS) does not influence the operation of the
directional part of OC4PTOC. To enable directional measurement at close-in faults, causing a low
measured voltage, the polarization voltage is a combination of the apparent voltage (85%) and a
memory voltage (15%). The following combinations are used.

Phase-phase short circuit:

U refL1L 2 = U L1 - U L 2 I dirL1L 2 = I L1 - I L 2
EQUATION1449 V1 EN-US (Equation 143)

U refL 2 L 3 = U L 2 - U L 3 I dirL 2 L 3 = I L 2 - I L 3
EQUATION1450 V1 EN-US (Equation 144)

U refL 3 L1 = U L 3 - U L1 I dirL 3 L1 = I L 3 - I L1
EQUATION1451 V1 EN-US (Equation 145)

Phase-earth short circuit:

U refL1 = U L1 I dirL1 = I L1
EQUATION1452 V1 EN-US (Equation 146)

U refL 2 = U L 2 I dirL 2 = I L 2
EQUATION1453 V1 EN-US (Equation 147)

U refL 3 = U L 3 I dirL 3 = I L 3
EQUATION1454 V1 EN-US (Equation 148)

The polarizing voltage is available as long as the positive-sequence voltage exceeds 5% of the set
base voltage UBase. So the directional element can be used for all unsymmetrical faults including
close-in faults.

For close-in three-phase faults, the U1L1M memory voltage, based on the same positive sequence
voltage, ensures correct directional discrimination.

The memory voltage is used for 100 ms or until the positive sequence voltage is restored.

After 100 ms, the following occurs:

536 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

• If the current is still above the set value of the minimum operating current (7% of the set terminal
rated current IBase), the condition seals in.
• If the fault has caused tripping, the trip endures.
• If the fault was detected in the reverse direction, the measuring element in the reverse
direction remains in operation.
• If the current decreases below the minimum operating value, the memory resets until the
positive sequence voltage exceeds 10% of its rated value.

The directional setting is given as a characteristic angle AngleRCA for the function and an angle
window ROADir.

Reverse

Uref

RCA
ROA

ROA Forward

Idir

en05000745.vsd
IEC05000745 V1 EN-US

Figure 311: Directional characteristic of the phase overcurrent protection

The default value of AngleRCA is –55°. The parameter AngleROA gives the angular distance from
AngleRCA to define the directional borders.

A minimum current for the directional phase start current signal can be set. IMinOpPhSel is the start
level for the directional evaluation of IL1, IL2 and IL3. The directional signals release the overcurrent
measurement in the respective phases if their current amplitudes are higher than the start level
(IMinOpPhSel) and the direction of the current is according to the set direction of the step.

If no blocking signals are active, the start signal will start the timer of the steps. The time
characteristic for each step can be chosen as definite time delay or an inverse time delay
characteristic. A wide range of standardized inverse time delay characteristics is available. It is also
possible to create a tailor made time characteristic.

The possibilities for inverse time characteristics are described in section "Inverse characteristics".

Transformer protection RET670 537

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

HarmBlockx = Enabled
Freeze Timers
AND
2ndH_FreezeTimers_int

EMULTX

IMinx Characteristx=DefTime
X T b tx
F a>b
a t
TRx
AND AND
|IOP|
a OR
a>b
b

STx
IxMult AND
X T
F
Inverse
Ix>
AND

AND
Characteristx=Inverse

txmin
DirModex=Off t

OR STEPx_DIR_Int

DirModex=Non-directional

DirModex=Forward AND OR
FORWARD_Int
DirModex=Reverse
AND
REVERSE_Int

IEC12000008‐2‐en.vsdx
IEC12000008 V3 EN-US

Figure 312: Simplified logic diagram for OC4PTOC

I3P
DFWDLx

U3P DFWDLxx

DREVLx
Directional
Element
AngleRCA DREVLxx FORWARD_int

Directional
AngleROA Release REVERSE_int
Block

STLx

Greater
IMinOpPhSel Comparator
x‐ means three phases 1,2 and 3
xx – means phase to phase 12,23,31

IEC15000266-2-en.vsdx
IEC15000266 V2 EN-US

Figure 313: OC4 directional release block diagram

Different types of reset time can be selected as described in section "Inverse characteristics".

538 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

There is a possibility to activate a preset change (IxMult x= 1, 2, 3 or 4) of the set operation current
via a binary input ENMULTx (enable multiplier). In some applications the operation value needs to be
changed, for example due to changed network switching state.

The operation current value Ix>, is limited to be between Ix>Max and Ix>Min. The default values of
the limits are the same as the setting limits for Ix>, and the limits can only be used for reducing the
allowed range of Ix>. This feature is used when remote setting of the operation current value is
allowed, making it possible to ensure that the operation value used is reasonable. If Ix> is set outside
Ix>Max and Ix>Min, the closest of the limits to Ix> is used by the function. If Ix>Max is smaller then
Ix>Min, the limits are swapped. The principle of the limitation is shown in Figure 314.

Ix>Max
MAX hi

u y
Ix>_used
Ix>

MIN lo
Ix>Min

IEC17000018-1-en.vsdx
IEC17000018 V1 EN-US

Figure 314: Logic for limitation of used operation current value

The STDIRCND output provides an integer signal that depends on the start and directional
evaluation and is derived from a binary coded signal as described in Table 292.

Table 292: Code description for STDIRCND output signal

STDIRCND Description
bit 0 (1) General start
bit 1 (2) Direction detected in forward
bit 2 (4) Direction detected in reverse
bit 3 (8) Start in phase L1
bit 4 (16) Forward direction detected in phase L1
bit 5 (32) Reverse direction detected in phase L1
bit 6 (64) Start in phase L2
bit 7 (128) Forward direction detected in phase L2
bit 8 (256) Reverse direction detected in phase L2
bit 9 (512) Start in phase L3
bit 10 (1024) Forward direction detected in phase L3
bit 11 (2048) Reverse direction detected in phase L3

All four steps in OC4PTOC can be blocked from the binary input BLOCK. The binary input BLKSTx
(x=1, 2, 3 or 4) blocks the operation of the respective step.

The start signals from the function can be blocked by the binary input BLKST. The trip signals from
the function can be blocked by the binary input BLKTR.
GUID-E3980B2D-EEDA-4BF1-A07D-E7B721130554 v7
A harmonic restrain of the directional phase overcurrent protection function OC4PTOC can be
chosen. If the ratio of the 2nd harmonic component in relation to the fundamental frequency
component in a phase current exceeds the preset level defined by the parameter 2ndHarmStab
setting, any of the four overcurrent stages can have their timers selectively frozen by the parameter
HarmBlockx setting. When the 2nd harmonic restraint feature is active, the OC4PTOC function
output signal ST2NDHRM will be set to the logical value one.

Transformer protection RET670 539

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

BLOCK

a
a>b
0.07*IBase b

a
a>b
b
Extract second AND
IOP
harmonic current a
a>b
component b

Extract 2ndH_FreezeTimers_Int
fundamental
current component
X
2ndHarmStab

IEC13000014-3-en.vsdx
IEC13000014 V3 EN-US

Figure 315: Second harmonic blocking

When enabled, the 2nd harmonic blocking function is used to freeze the Definite
and/or the Inverse Characteristics internal timers. When the function detects a 2nd
harmonic higher than the set threshold, the internal function timers are frozen but
START outputs continues to be active as long as the measured current is above the
set pickup level. Internal timers will again resume timing when harmonic content
becomes smaller than the set threshold and the measured current is higher than the
pickup value. If TRIP output is already active when harmonic blocking signal appears
the TRIP output will not be affected.

When DirModex is set to Forward/Reverse and Ix> is set at its minimum value, that
is, 5.0% of IBase, the operation from the respective overcurrent step takes place at
20.0% of IBase. This is done to avoid unintentional maloperations during unbalanced
loading conditions that might appear in power systems and the unbalanced loading
condition might lead to a neutral current in the range of 10.0% to 15.0% of IBase.

9.2.9 Technical data

M12342-1 v23

Table 293: OC4PTOC technical data

Function Range or value Accuracy

Operate current, step 1-4 (5-2500)% of lBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir

Reset ratio > 95% at (50–2500)% of lBase -

Minimum operate current, step 1-4 (1-10000)% of lBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir

Relay characteristic angle (RCA) (40.0–65.0) degrees ±2.0 degrees

Relay operating angle (ROA) (40.0–89.0) degrees ±2.0 degrees
Second harmonic blocking (5–100)% of fundamental ±2.0% of Ir

Independent time delay at 0 to 2 x Iset, (0.000-60.000) s ±0.2% or ±35 ms whichever is greater

step 1-4
Minimum operate time for inverse (0.000-60.000) s ±0.2% or ±35 ms whichever is greater
curves , step 1-4
Inverse time characteristics, see 16 curve types See table 1294, table 1295 and table
table 1294, table 1295 and table 1296 1296
Operate time, start non-directional at 0 Min. = 15 ms -
to 2 x Iset
Max. = 30 ms
Table continues on next page

540 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Function Range or value Accuracy

Reset time, start non-directional at 2 x Min. = 15 ms -
Iset to 0
Max. = 30 ms
Operate time, start non-directional at 0 Min. = 5 ms -
to 10 x Iset Max. = 20 ms

Reset time, start non-directional at 10 x Min. = 20 ms -

Iset to 0 Max. = 35 ms

Critical impulse time 10 ms typically at 0 to 2 x Iset -

Impulse margin time 15 ms typically -

Operate frequency, directional 38-83 Hz -
overcurrent
Operate frequency, non-directional 10-90 Hz -
overcurrent

9.3 Instantaneous residual overcurrent protection EFPIOC IP14508-1 v3

9.3.1 Identification
M14887-1 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Instantaneous residual overcurrent EFPIOC 50N
protection
IN>>

IEF V1 EN-US

9.3.2 Functionality M12701-3 v16

The Instantaneous residual overcurrent protection (EFPIOC) has a low transient overreach and short
tripping times to allow use for instantaneous earth-fault protection, with the reach limited to less than
typical eighty percent of the transformer impedance at minimum source impedance. EFPIOC can be
configured to measure the residual current from the three-phase current inputs or the current from a
separate current input.

9.3.3 Function block M12614-3 v6

EFPIOC
I3P* TRIP
BLOCK
BLKAR
ENMULT

IEC06000269-3-en.vsdx
IEC06000269 V3 EN-US

Figure 316: EFPIOC function block

9.3.4 Signals IP11448-1 v2

Transformer protection RET670 541

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

PID-6915-INPUTSIGNALS v4

Table 294: EFPIOC Input signals

Name Type Default Description

I3P GROUP - Three phase currents
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKAR BOOLEAN 0 Block input for auto reclose
ENMULT BOOLEAN 0 Enable current multiplier

PID-6915-OUTPUTSIGNALS v4

Table 295: EFPIOC Output signals

Name Type Description

TRIP BOOLEAN Trip signal

9.3.5 Settings IP11449-1 v2

PID-6915-SETTINGS v4

Table 296: EFPIOC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
IN>> 5 - 2500 %IB 1 200 Operate residual current level in % of
IBase

Table 297: EFPIOC Group settings (advanced)

Name Values (Range) Unit Step Default Description

IN>>Min 5 - 2500 %IB 1 5 Minimum used operate residual current
level in % of IBase, if IN>> is less than
IN>>Min then IN>> is set to IN>>Min
IN>>Max 5 - 2500 %IB 1 2500 Maximum used operate residual current
level in % of IBase, if IN>> is greater
than IN>>Max then IN>> is set to
IN>>Max
StValMult 0.5 - 5.0 - 0.1 1.0 Multiplier for operate current level

Table 298: EFPIOC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

9.3.6 Monitored data

PID-6915-MONITOREDDATA v4

Table 299: EFPIOC Monitored data

Name Type Values (Range) Unit Description

IN REAL - A Residual current

9.3.7 Operation principle M12704-3 v8

The sampled analog residual currents are pre-processed in a discrete Fourier filter (DFT) block.
From the fundamental frequency components of the residual current, as well as from the sample
values the equivalent RMS value is derived. This current value is fed to the Instantaneous residual

542 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

overcurrent protection (EFPIOC). In a comparator the RMS value is compared to the set operation
current value of the function (IN>>).

If the residual current is larger than the set operation current a signal from the comparator is set to
true. This signal will, without delay, activate the output signal TRIP.

There is also a possibility to activate a preset change of the set operation current via a binary input
(enable multiplier ENMULT). In some applications the operation value needs to be changed, for
example, due to transformer inrush currents.

The operation current value IN>>, is limited to be between IN>>Max and IN>>Min. The default values
of the limits are the same as the setting limits for IN>>, and the limits can only be used for reducing
the allowed range of IN>>. This feature is used when remote setting of the operation current value is
allowed, making it possible to ensure that the operation value used is reasonable. If IN>> is set
outside IN>>Max and IN>>Min, the closest of the limits to IN>> is used by the function. If IN>>Max is
smaller then IN>>Min, the limits are swapped. The principle of the limitation is shown in Figure 317.

IN>>Max
MAX hi

u y
IN>>_used
IN>>

MIN lo
IN>>Min

IEC17000015-1-en.vsdx
IEC17000015 V1 EN-US

Figure 317: Logic for limitation of used operation current value

EFPIOC function can be blocked from the binary input BLOCK. The trip signals from the function can
be blocked from the binary input BLKAR, that can be activated during single pole trip and
autoreclosing sequences.

9.3.8 Technical data IP11450-1 v1

M12340-2 v10

Table 300: EFPIOC technical data

Function Range or value Accuracy

Operate current (5-2500)% of lBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir

Reset ratio > 95% at (50–2500)% of lBase -

Operate time at 0 to 2 x Iset Min. = 15 ms -
Max. = 25 ms
Reset time at 2 x Iset to 0 Min. = 15 ms -
Max. = 25 ms
Critical impulse time 10 ms typically at 0 to 2 x Iset -

Operate time at 0 to 10 x Iset Min. = 5 ms -

Max. = 15 ms
Reset time at 10 x Iset to 0 Min. = 25 ms -
Max. = 35 ms
Critical impulse time 2 ms typically at 0 to 10 x Iset -

Dynamic overreach < 5% at t = 100 ms -

Transformer protection RET670 543

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.4 Directional residual overcurrent protection, four steps

EF4PTOC IP14509-1 v8

9.4.1 Function revision history GUID-0F9199B0-3F86-45E0-AFC2-747052A20AE1 v2

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 Technical data table updated with note “Operate time and reset time are only valid if
harmonic blocking is turned off for a step”.
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 -
M 2.2.4 The phase selection logic is added to allow phase segregated trip. The new phase
selections outputs added to this release are PHSELL1, PHSELL2 and PHSELL3. The
setting EnPhaseSel is added to enable or disable phase selection. The maximum value
changed to 2000.0 % of IBase for IMin1, IMin2, IMin3 and IMin4 settings.
N 2.2.5 The harmonic restrain function changed to freeze the definite and IDMT timers.

9.4.2 Identification
M14881-1 v7

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Directional residual overcurrent EF4PTOC 4(IN>)
51N_67N
protection, four steps
4
alt
4
TEF-REVA V2 EN-US

9.4.3 Functionality M13667-3 v20

EF4PTOC has an inverse or definite time delay independent for each step.

All IEC and ANSI time-delayed characteristics are available together with an optional user-defined
characteristic.

EF4PTOC can be set to be directional or non-directional independently for each step.

IDir, UPol and IPol can be independently selected to be either zero sequence or negative sequence.

A second harmonic blocking can be set individually for each step.

The residual current can be calculated by summing the three-phase currents or taking the input from
the neutral CT.

544 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

EF4PTOC also provides very fast and reliable faulty phase identification for phase selective tripping
and subsequent reclosing during earth fault.

9.4.4 Function block M12619-3 v9

EF4PTOC
I3P* TRIP
I3PDIR* TRIN1
I3PPOL* TRIN2
U3P* TRIN3
BLOCK TRIN4
BLKTR TRSOTF
BLKST1 START
BLKST2 STIN1
BLKST3 STIN2
BLKST4 STIN3
BLKPHSEL STIN4
ENMULT1 STSOTF
ENMULT2 STFW
ENMULT3 STRV
ENMULT4 PHSELL1
CBPOS PHSELL2
CLOSECB PHSELL3
OPENCB 2NDHARMD

IEC06000424-6-en.vsdx
IEC06000424 V6 EN-US

Figure 318: EF4PTOC function block

9.4.5 Signals IP11453-1 v2

PID-7797-INPUTSIGNALS v1

Table 301: EF4PTOC Input signals

Name Type Default Description

I3P GROUP - Group connection for operate current
SIGNAL
I3PDIR GROUP - Group connection for directional current
SIGNAL
I3PPOL GROUP - Group connection for polarizing current
SIGNAL
U3P GROUP - Group connection for polarizing voltage
SIGNAL
BLOCK BOOLEAN 0 General block
BLKTR BOOLEAN 0 Block of trip
BLKST1 BOOLEAN 0 Block of step 1 (Start and trip)
BLKST2 BOOLEAN 0 Block of step 2 (Start and trip)
BLKST3 BOOLEAN 0 Block of step 3 (Start and trip)
BLKST4 BOOLEAN 0 Block of step 4 (Start and trip)
BLKPHSEL BOOLEAN 0 Block phase selection
ENMULT1 BOOLEAN 0 When activated, the current multiplier is in use for step1
ENMULT2 BOOLEAN 0 When activated, the current multiplier is in use for step2
ENMULT3 BOOLEAN 0 When activated, the current multiplier is in use for step3
ENMULT4 BOOLEAN 0 When activated, the current multiplier is in use for step4
CBPOS BOOLEAN 0 Breaker position
CLOSECB BOOLEAN 0 Breaker close command
OPENCB BOOLEAN 0 Breaker open command

Transformer protection RET670 545

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

PID-7797-OUTPUTSIGNALS v1

Table 302: EF4PTOC Output signals

Name Type Description

TRIP BOOLEAN General trip signal
TRIN1 BOOLEAN Trip signal from step 1
TRIN2 BOOLEAN Trip signal from step 2
TRIN3 BOOLEAN Trip signal from step 3
TRIN4 BOOLEAN Trip signal from step 4
TRSOTF BOOLEAN Trip signal from earth fault switch onto fault function
START BOOLEAN General start signal
STIN1 BOOLEAN Start signal step 1
STIN2 BOOLEAN Start signal step 2
STIN3 BOOLEAN Start signal step 3
STIN4 BOOLEAN Start signal step 4
STSOTF BOOLEAN Start signal from earth fault switch onto fault function
STFW BOOLEAN Start signal forward direction
STRV BOOLEAN Start signal reverse direction
PHSELL1 BOOLEAN Start of phase selection, phase L1
PHSELL2 BOOLEAN Start of phase selection, phase L2
PHSELL3 BOOLEAN Start of phase selection, phase L3
2NDHARMD BOOLEAN 2nd harmonic block signal

9.4.6 Settings IP11454-1 v2

PID-7797-SETTINGS v1

Table 303: EF4PTOC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups
SeqTypeIDir Zero seq - - Zero seq Choice of measurand for directional
Neg seq current
SeqTypeIPol Zero seq - - Zero seq Choice of measurand for polarizing
Neg seq current
SeqTypeUPol Zero seq - - Zero seq Choice of measurand for polarizing
Neg seq voltage

Table 304: EF4PTOC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
EnDir Disable - - Enable Enabling the Directional calculation
Enable
AngleRCA -180 - 180 Deg 1 65 Relay Characteristic Angle (RCA)
PolMethod Voltage - - Voltage Type of polarization
Current
Dual
UPolMin 1 - 100 %UB 1 1 Minimum voltage level for polarization in
% of UBase
Table continues on next page

546 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Values (Range) Unit Step Default Description

IPolMin 2 - 100 %IB 1 5 Minimum current level for polarization in
% of IBase
RNPol 0.50 - 1000.00 Ohm 0.01 5.00 Real part of source impedance used for
current polarisation
XNPol 0.50 - 3000.00 Ohm 0.01 40.00 Imaginary part of source imp. used for
current polarisation
IN>Dir 1 - 100 %IB 1 10 Residual current level in % of IBase for
Direction release
2ndHarmStab 5 - 100 % 1 20 Operate level of 2nd harmonic curr in %
of fundamental curr
BlkParTransf Off - - Off Enable blocking at energizing of parallel
On transformers
UseStartValue IN1> - - IN4> Current level blk at parallel transf (step1,
IN2> 2, 3 or 4)
IN3>
IN4>
SOTF Off - - Off SOTF operation mode (Off/SOTF/
SOTF Undertime/SOTF&Undertime)
UnderTime
SOTF&UnderTime
ActivationSOTF Open - - Open Select signal to activate SOTF: CB-
Closed Open/ -Closed/ -Close cmd
CloseCommand
StepForSOTF Step 2 - - Step 2 Select start from step 2 or 3 to start
Step 3 SOTF
HarmBlkSOTF Off - - Off Enable harmonic restrain function in
On SOTF
tSOTF 0.000 - 60.000 s 0.001 0.200 Time delay for SOTF
t4U 0.000 - 60.000 s 0.001 1.000 Switch-onto-fault active time
ActUnderTime CB position - - CB position Select signal to activate under time (CB
CB command Pos / CB Command)
tUnderTime 0.000 - 60.000 s 0.001 0.300 Time delay for under time
EnPhaseSel Off - - Off Enable phase selection
On
DirMode1 Off - - Non-directional Directional mode of step 1 (Off, Non-dir,
Non-directional Forward, Reverse)
Forward
Reverse
Characterist1 ANSI Ext. inv. - - ANSI Def. Time Time delay characteristic for step 1
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
Table continues on next page

Transformer protection RET670 547

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Name Values (Range) Unit Step Default Description

IN1> 1 - 2500 %IB 1 100 Residual current operate level for step 1
in % of IBase
t1 0.000 - 60.000 s 0.001 0.000 Definite time delay / additional time delay
for IDMT characteristics of step 1
k1 0.05 - 999.00 - 0.01 0.05 Time multiplier for the step 1 selected
time characteristic
IMin1 1.00 - 2000.00 %IB 1.00 100.00 Minimum operate residual current for
step 1 in % of IBase
t1Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse time
characteristic step 1
IN1Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for the residual current setting
value for step 1
HarmBlock1 Off - - On Enable block of step 1 from harmonic
On restrain
DirMode2 Off - - Non-directional Directional mode of step 2 (Off, Non-dir,
Non-directional Forward, Reverse)
Forward
Reverse
Characterist2 ANSI Ext. inv. - - ANSI Def. Time Time delay characteristic for step 2
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IN2> 1 - 2500 %IB 1 50 Residual current operate level for step 2
in % of IBase
t2 0.000 - 60.000 s 0.001 0.400 Definite time delay / additional time delay
for IDMT characteristics of step 2
k2 0.05 - 999.00 - 0.01 0.05 Time multiplier for the step 2 selected
time characteristic
IMin2 1.00 - 2000.00 %IB 1.00 50 Minimum operate residual current for
step 2 in % of IBase
t2Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse time
characteristic step 2
IN2Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for the residual current setting
value for step 2
HarmBlock2 Off - - On Enable block of step 2 from harmonic
On restrain
DirMode3 Off - - Non-directional Directional mode of step 3 (Off, Non-dir,
Non-directional Forward, Reverse)
Forward
Reverse
Table continues on next page

548 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Values (Range) Unit Step Default Description

Characterist3 ANSI Ext. inv. - - ANSI Def. Time Time delay characteristic for step 3
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IN3> 1 - 2500 %IB 1 33 Residual current operate level for step 3
in % of IBase
t3 0.000 - 60.000 s 0.001 0.800 Definite time delay / additional time delay
for IDMT characteristics of step 3
k3 0.05 - 999.00 - 0.01 0.05 Time multiplier for the step 3 selected
time characteristic
IMin3 1.00 - 2000.00 %IB 1.00 33 Minimum operate residual current for
step 3 in % of IBase
t3Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse time
characteristic step 3
IN3Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for the residual current setting
value for step 3
HarmBlock3 Off - - On Enable block of step 3 from harmonic
On restrain
DirMode4 Off - - Non-directional Directional mode of step 4 (Off, Non-dir,
Non-directional Forward, Reverse)
Forward
Reverse
Characterist4 ANSI Ext. inv. - - ANSI Def. Time Time delay characteristic for step 4
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IN4> 1 - 2500 %IB 1 17 Residual current operate level for step 4
in % of IBase
t4 0.000 - 60.000 s 0.001 1.200 Definite time delay / additional time delay
for IDMT characteristics of step 4
Table continues on next page

Transformer protection RET670 549

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Name Values (Range) Unit Step Default Description

k4 0.05 - 999.00 - 0.01 0.05 Time multiplier for the step 4 selected
time characteristic
IMin4 1.00 - 2000.00 %IB 1.00 17 Minimum operate residual current for
step 4 in % of IBase
t4Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse time
characteristic step 4
IN4Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for the residual current setting
value for step 4
HarmBlock4 Off - - On Enable block of step 4 from harmonic
On restrain

Table 305: EF4PTOC Group settings (advanced)

Name Values (Range) Unit Step Default Description

IN1>Max 1 - 2500 %IB 1 2500 Maximum used operate residual current
level for step 1 in % of IBase, if IN1> is
greater than IN1>Max then IN1> is set to
IN1>Max
IN1>Min 1 - 2500 %IB 1 1 Minimum used operate residual current
level for step 1 in % of IBase, if IN1> is
less than IN1>Min then IN1> is set to
IN1>Min
ResetTypeCrv1 Instantaneous - - Instantaneous Reset curve type for step1
IEC Reset (Instantaneous / IEC / ANSI)
ANSI reset
tReset1 0.000 - 60.000 s 0.001 0.020 Reset time delay for step 1
tPCrv1 0.005 - 3.000 - 0.001 1.000 Param P for customized inverse trip time
curve for step 1
tACrv1 0.005 - 200.000 - 0.001 13.500 Param A for customized inverse trip time
curve for step 1
tBCrv1 0.00 - 20.00 - 0.01 0.00 Param B for customized inverse trip time
curve for step 1
tCCrv1 0.1 - 10.0 - 0.1 1.0 Param C for customized inverse trip time
curve for step 1
tPRCrv1 0.005 - 3.000 - 0.001 0.500 Param PR for customized inverse reset
time curve for step 1
tTRCrv1 0.005 - 100.000 - 0.001 13.500 Param TR for customized inverse reset
time curve for step 1
tCRCrv1 0.1 - 10.0 - 0.1 1.0 Param CR for customized inverse reset
time curve for step 1
IN2>Max 1 - 2500 %IB 1 2500 Maximum used operate residual current
level for step 2 in % of IBase, if IN2> is
greater than IN2>Max then IN2> is set to
IN2>Max
IN2>Min 1 - 2500 %IB 1 1 Minimum used operate residual current
level for step 2 in % of IBase, if IN2> is
less than IN2>Min then IN2> is set to
IN2>Min
ResetTypeCrv2 Instantaneous - - Instantaneous Reset curve type for step2
IEC Reset (Instantaneous / IEC / ANSI)
ANSI reset
tReset2 0.000 - 60.000 s 0.001 0.020 Reset time delay for step 2
tPCrv2 0.005 - 3.000 - 0.001 1.000 Param P for customized inverse trip time
curve for step 2
Table continues on next page

550 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Values (Range) Unit Step Default Description

tACrv2 0.005 - 200.000 - 0.001 13.500 Param A for customized inverse trip time
curve for step 2
tBCrv2 0.00 - 20.00 - 0.01 0.00 Param B for customized inverse trip time
curve for step 2
tCCrv2 0.1 - 10.0 - 0.1 1.0 Param C for customized inverse trip time
curve for step 2
tPRCrv2 0.005 - 3.000 - 0.001 0.500 Param PR for customized inverse reset
time curve for step 2
tTRCrv2 0.005 - 100.000 - 0.001 13.500 Param TR for customized inverse reset
time curve for step 2
tCRCrv2 0.1 - 10.0 - 0.1 1.0 Param CR for customized inverse reset
time curve for step 2
IN3>Max 1 - 2500 %IB 1 2500 Maximum used operate residual current
level for step 3 in % of IBase, if IN3> is
greater than IN3>Max then IN3> is set to
IN3>Max
IN3>Min 1 - 2500 %IB 1 1 Minimum used operate residual current
level for step 3 in % of IBase, if IN3> is
less than IN3>Min then IN3> is set to
IN3>Min
ResetTypeCrv3 Instantaneous - - Instantaneous Reset curve type for step3
IEC Reset (Instantaneous / IEC / ANSI)
ANSI reset
tReset3 0.000 - 60.000 s 0.001 0.020 Reset time delay for step 3
tPCrv3 0.005 - 3.000 - 0.001 1.000 Param P for customized inverse trip time
curve for step 3
tACrv3 0.005 - 200.000 - 0.001 13.500 Param A for customized inverse trip time
curve for step 3
tBCrv3 0.00 - 20.00 - 0.01 0.00 Param B for customized inverse trip time
curve for step 3
tCCrv3 0.1 - 10.0 - 0.1 1.0 Param C for customized inverse trip time
curve for step 3
tPRCrv3 0.005 - 3.000 - 0.001 0.500 Param PR for customized inverse reset
time curve for step 3
tTRCrv3 0.005 - 100.000 - 0.001 13.500 Param TR for customized inverse reset
time curve for step 3
tCRCrv3 0.1 - 10.0 - 0.1 1.0 Param CR for customized inverse reset
time curve for step 3
IN4>Max 1 - 2500 %IB 1 2500 Maximum used operate residual current
level for step 4 in % of IBase, if IN4> is
greater than IN4>Max then IN4> is set to
IN4>Max
IN4>Min 1 - 2500 %IB 1 1 Minimum used operate residual current
level for step 4 in % of IBase, if IN4> is
less than IN4>Min then IN4> is set to
IN4>Min
ResetTypeCrv4 Instantaneous - - Instantaneous Reset curve type for step4
IEC Reset (Instantaneous / IEC / ANSI)
ANSI reset
tReset4 0.000 - 60.000 s 0.001 0.020 Reset time delay for step 4
tPCrv4 0.005 - 3.000 - 0.001 1.000 Param P for customized inverse trip time
curve for step 4
tACrv4 0.005 - 200.000 - 0.001 13.500 Param A for customized inverse trip time
curve for step 4
Table continues on next page

Transformer protection RET670 551

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Name Values (Range) Unit Step Default Description

tBCrv4 0.00 - 20.00 - 0.01 0.00 Param B for customized inverse trip time
curve for step 4
tCCrv4 0.1 - 10.0 - 0.1 1.0 Param C for customized inverse trip time
curve for step 4
tPRCrv4 0.005 - 3.000 - 0.001 0.500 Param PR for customized inverse reset
time curve for step 4
tTRCrv4 0.005 - 100.000 - 0.001 13.500 Param TR for customized inverse reset
time curve for step 4
tCRCrv4 0.1 - 10.0 - 0.1 1.0 Param CR for customized inverse reset
time curve for step 4

9.4.7 Monitored data

PID-7797-MONITOREDDATA v1

Table 306: EF4PTOC Monitored data

Name Type Values (Range) Unit Description

IOp REAL - A Operating current level
UPol REAL - kV Polarizing voltage level
IPol REAL - A Polarizing current level
UPOLIANG REAL - deg Polarizing angle between voltage and
current
IPOLIANG REAL - deg Polarizing current angle

9.4.8 Operation principle IP12992-1 v2

M13941-51 v8
This function has the following four analog inputs on its function block in the configuration tool:

1. I3P, input used for the operating quantity. Supplies the zero-sequence magnitude measuring
functionality.
2. U3P, input used for the voltage polarizing quantity. Supplies either the zero or the negative
sequence voltage to the directional functionality
3. I3P and U3P also supply current and voltage samples for faulty phase selection functionality.
4. I3PPOL, input used for the current polarizing quantity. Provides polarizing current to the
directional functionality. This current is normally taken from the grounding of a power
transformer.
5. I3PDIR, input used for directional detection. Supplies either the zero or the negative sequence
current to the directional functionality.

These inputs are connected from the corresponding pre-processing function blocks in the
configuration tool in PCM600.

9.4.8.1 Operating quantity within the function M13941-58 v10

The function always uses residual current (3I0) for its operating quantity. The residual current can be:

1. Directly measured (when a dedicated CT input of the IED is connected in PCM600 to the fourth
analog input of the pre-processing block connected to EF4PTOC function input I3P). This
dedicated IED CT input can be, for example, connected to:

552 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

• Parallel connection of current instrument transformers in all three phases (Holm-Green

connection).
• One single core balance current instrument transformer (cable CT).
• One single current instrument transformer located between power system star point and
earth (current transformer located in the star point of a star connected transformer
winding).
• One single current instrument transformer located between two parts of a protected object
(current transformer located between two star points of double star shunt capacitor bank).
2. Calculated from three-phase current input within the IED (when the fourth analog input of the
pre-processing block, connected to EF4PTOC function Analog Input I3P, is not connected to a
dedicated CT input of the IED in PCM600). In such a case, the pre-processing block will
calculate 3I0 from the first three inputs into the pre-processing block by using the following
formula (will take 3I0 from SMAI AI3P and will be connected to I3PDIR and I3P inputs.

If the zero sequence current is selected,

Iop = 3I0 = IL1 + IL2 + IL3

EQUATION1874 V2 EN-US (Equation 149)

where:
IL1, IL2, and IL3 are fundamental frequency phasors of three individual phase currents.

The residual current is pre-processed by a discrete Fourier filter. Thus the phasor of the fundamental
frequency component of the residual current is derived. The phasor magnitude is used within the
EF4PTOC protection to compare it with the set operation current value of the four steps (IN1>, IN2>,
IN3>, or IN4>).

If the residual current is larger than the set operation current and the step is used in non-directional
mode a signal from the comparator for this step is set to true. This signal will, without delay, activate
the output signal STINx (x=step 1-4) for this step and a common START signal.

9.4.8.2 Internal polarizing M13941-82 v12

A polarizing quantity is used within the protection in order to determine the direction to the earth fault
(forward/reverse).

The function can be set to use voltage polarizing, current polarizing or dual polarizing.

Voltage polarizing
When voltage polarizing is selected, the protection will use the residual voltage -3U0 as the polarizing
quantity U3P.

This voltage can be:

1. Directly measured (when a dedicated VT input of the IED is connected in PCM600 to the fourth
analog input of the pre-processing block connected to EF4PTOC function input U3P). This
dedicated IED VT input shall be then connected to the open delta winding of a three-phase main
VT.
2. Calculated from three-phase voltage input within the IED (when the fourth analog input of the
pre-processing block, connected to EF4PTOC analog function input U3P, is NOT connected to a
dedicated VT input of the IED in PCM600). In such a case, the pre-processing block will
calculate -3U0 from the first three inputs into the pre-processing block by using the following
formula:

UPol = -3U 0 = -(UL1 + UL2 + UL3)

EQUATION1875 V2 EN-US (Equation 151)

Transformer protection RET670 553

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

where:

UL1, UL2, and UL3 are fundamental frequency phasors of three individual phase voltages.

In order to use this, all three phase-to-earth voltages must be connected to three IED
VT inputs.

The residual voltage is pre-processed by a discrete Fourier filter. Thus, the phasor of the
fundamental frequency component of the residual voltage is derived.

This phasor is used together with the phasor of the operating directional current, in order to
determine the direction to the earth fault (Forward/Reverse). In order to enable voltage polarizing the
magnitude of polarizing voltage shall be bigger than a minimum level defined by setting parameter
UPolMin.

It shall be noted that residual voltage (-3U0) or negative sequence voltage (-3U2) is used to
determine the location of the earth fault. This ensures the required inversion of the polarizing voltage
within the earth-fault function.

Current polarizing
When current polarizing is selected, the function will use an external residual current (3I0) as the
polarizing quantity IPol. This current can be:

1. Directly measured (when a dedicated CT input of the IED is connected in PCM600 to the fourth
analog input of the pre-processing block, connected to EF4PTOC function input I3PPOL). This
dedicated IED CT input is then typically connected to one single current transformer located
between power system star point and earth (current transformer located in the star point of a
star connected transformer winding).
• For some special line protection applications, this dedicated IED CT input can be
connected to a parallel connection of current transformers in all three phases (Holm-
Green connection).
2. Calculated from three phase current input within the IED (when the fourth analog input into the
pre-processing block, connected to EF4PTOC function analog input I3PPOL, is NOT connected
to a dedicated CT input of the IED in PCM600). In such case, the pre-processing block will
calculate 3I0 from the first three inputs into the pre-processing block by using the following
formula:

IPol = 3I0 = IL1 + IL2 + IL3

EQUATION2018 V2 EN-US (Equation 153)

where:
IL1, IL2, and IL3 are fundamental frequency phasors of three individual phase currents.

The residual current is pre-processed by a discrete fourier filter. Thus the phasor of the fundamental
frequency component of the polarizing current is derived. This phasor is then multiplied with the pre-
set equivalent zero-sequence source impedance in order to calculate the equivalent polarizing
voltage UIPol in accordance with the following formula:

UIPol = Z 0s × IPol = (RNPol + j × XNPol) × IPol

EQUATION1877 V2 EN-US (Equation 154)

which will be then used, together with the phasor of the operating current, in order to determine the
direction to the earth fault (forward/reverse).

In order to enable current polarizing, the magnitude of the polarizing current shall be bigger than a
minimum level defined by setting parameter IPolMin.

554 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Dual polarizing
When dual polarizing is selected, the function will use the vectorial sum of the voltage based and
current based polarizing in accordance with the following formula:

UTotPol=UPol  UIPol=UPol  Z 0s  IPol  UPol   RNPol  jXNPol   Ipol

IECEQUATION2408 V2 EN-US (Equation 155)

UPol and IPol can be either zero sequence component or negative sequence component depending
upon the user selection.

Then the phasor of the total polarizing voltage UTotPol will be used, together with the phasor of the
operating current, to determine the direction of the earth fault (forward/reverse).

9.4.8.3 External polarizing for earth-fault function M13941-144 v6

The individual steps within the protection can be set as non-directional. When this setting is selected,
it is possible via the function binary input BLKSTx to provide external directional control (that is,
torque control) by, for example, using one of the following functions if available in the IED:

1. Distance protection directional function.

2. Negative sequence polarized general current and voltage multi purpose protection function.

9.4.8.4 Directional detection for earth fault function GUID-FC382DD3-E2C8-455E-8CD5-1DE1793DD178 v6

Zero sequence components will be used for detecting directionality for the earth fault function. In
some cases, zero sequence quantities might detect directionality incorrectly. In such a scenario,
negative sequence quantities will be used. The user can select either zero sequence components or
negative sequence components for detecting directionality with the parameter SeqTypeIPol. I3PDIR
input is always connected to the same source as I3P input.

9.4.8.5 Base quantities within the protection M13941-152 v6

The base quantities are entered as global settings for all functions in the IED. Base current (IBase)
shall be entered as rated phase current of the protected object in primary amperes. Base voltage
(UBase) shall be entered as rated phase-to-phase voltage of the protected object in primary kV.

9.4.8.6 Internal earth-fault protection structure M13941-157 v5

The protection is internally divided into the following parts:

1. Four residual overcurrent steps.

2. Directional supervision element for residual overcurrent steps with integrated directional
comparison step for communication based earth-fault protection schemes (permissive or
blocking).
3. Second harmonic blocking element with additional feature for sealed-in blocking during
switching of parallel transformers.
4. Switch on to fault feature with integrated Under-Time logic for detection of breaker problems
during breaker opening or closing sequence.

9.4.8.7 Four residual overcurrent steps M13941-166 v9

Each overcurrent step uses operating quantity Iop (residual current) as the measuring quantity. Each
of the four residual overcurrent steps has the following built-in facilities:

Transformer protection RET670 555

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

• Directional mode can be set to Off/Non-directional/Forward/Reverse. By this parameter setting

the directional mode of the step is selected.
• Residual current start value.
• Type of operating characteristic (inverse or definite time). By this parameter setting it is possible
to select inverse or definite time delay for the earth-fault protection. Most of the standard IEC
and ANSI inverse characteristics are available. For the complete list of available inverse curves,
please refer to section "Inverse characteristics".
• Type of reset characteristic (Instantaneous / IEC Reset / ANSI Reset). By this parameter setting
it is possible to select the reset characteristic of the step. For the complete list of available reset
curves, please refer to section "Inverse characteristics".
• Time delay related settings. By these parameter settings the properties like definite time delay,
minimum operating time for inverse curves, reset time delay and parameters to define user
programmable inverse curve are defined.
• Supervision by second harmonic blocking feature (On/Off). By this parameter setting it is
possible to prevent operation of the step if the second harmonic content in the residual current
exceeds the preset level.
• Multiplier for scaling of the set residual current pickup value by external binary signal. By this
parameter setting it is possible to increase residual current pickup value when function binary
input ENMULTx has logical value 1.
• The operation current value INx>, is limited to be between INx>Max and INx>Min. The default
values of the limits are the same as the setting limits for INx>, and the limits can only be used for
reducing the allowed range of INx>. This feature is used when remote setting of the operation
current value is allowed, making it possible to ensure that the operation value used is
reasonable. If INx> is set outside INx>Max and INx>Min, the closest of the limits to INx> is used
by the function. If INx>Max is smaller then INx>Min, the limits are swapped. The principle of the
limitation is shown in Figure 319.

INx>Max
MAX hi

INx>_used
INx> u y

MIN lo
INx>Min

IEC17000017-2-en.vsdx
IEC17000017 V2 EN-US

Figure 319: Logic for limitation of used operation current value

Simplified logic diagram for one residual overcurrent step is shown in Figure 320.

556 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

HarmBlockx = Enabled
Freeze Timers
AND
2ndH_FreezeTimers_int

EMULTX

IMinx Characteristx=DefTime
X T b tx
F a>b
a t
TRINx
AND AND
|IOP|
a OR
a>b
b

STINx
INxMult AND
X T
F
Inverse
INx>
AND

AND
Characteristx=Inverse

txmin
DirModex=Off t

OR STEPx_DIR_Int

DirModex=Non-directional

DirModex=Forward AND OR
FORWARD_Int
DirModex=Reverse
AND
REVERSE_Int

IEC10000008-7-en.vsdx

IEC10000008 V7 EN-US

Figure 320: Simplified logic diagram for residual overcurrent step x, where x = step 1, 2, 3 or 4
The protection can be completely blocked from the binary input BLOCK. Output signals for respective
step, and STINx and TRINx, can be blocked from the binary input BLKSTx. The trip signals from the
function can be blocked from the binary input BLKTR.

9.4.8.8 Directional supervision element with integrated directional comparison

function M13941-179 v11

At least one of the four residual overcurrent steps shall be set as directional in order
to enable execution of the directional supervision element and the integrated
directional comparison function.

The protection has an integrated directional feature. As the operating quantity current Iop is always
used, the polarizing method is determined by the parameter setting polMethod. The polarizing
quantity will be selected by the function in one of the following three ways:

1. When polMethod = Voltage, UPol will be used as polarizing quantity.

2. When polMethod = Current, IPol will be used as polarizing quantity.
3. When polMethod = Dual, UPol + IPol · ZNPol will be used as polarizing quantity.

The operating and polarizing quantity are then used inside the directional element, as shown in
Figure 321, in order to determine the direction of the earth fault.

Transformer protection RET670 557

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Operating area

STRV
0.6 * IN>DIR
Characteristic for reverse
release of measuring steps
-RCA -85 deg
Characteristic
for STRV 40% of
IN>DIR RCA +85 deg

RCA
65° Upol = -3U 0

-RCA +85 deg

RCA -85 deg

Characteristic for forward
release of measuring steps
IN>DIR

STFW

I op = 3I0

Operating area
Characteristic
for STFW IEC11000243-1-en.ai
IEC11000243 V1 EN-US

Figure 321: Operating characteristic for earth-fault directional element using the zero sequence
components
The relevant setting parameters for the directional supervision element are:

• The directional element will be internally enabled to operate as soon as Iop is bigger than 40%
of IN>Dir and the directional condition is fulfilled in the set direction.
• The relay characteristic angle AngleRCA, which defines the position of forward and reverse
areas in the operating characteristic.

The directional comparison will set the output binary signals:

1. STFW=1 when operating quantity magnitude Iop x cos(φ - AngleRCA) is bigger than setting
parameter IN>Dir and directional supervision element detects fault in forward direction.
2. STRV=1 when operating quantity magnitude Iop x cos(φ - AngleRCA) is bigger than 60% of
setting parameter IN>Dir and directional supervision element detects fault in reverse direction.

These signals shall be used for communication based earth-fault teleprotection communication
schemes (permissive or blocking).

Simplified logic diagram for directional supervision element with integrated directional comparison
step is shown in Figure 322:

558 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

| IopDir |
a
a>b STRV
b AND
REVERSE_Int
0.6
X
a
a>b STFW
IN>Dir b AND
FORWARD_Int

X
0.4

FWD
AND FORWARD_Int
AngleRCA
polMethod=Voltage
OR
UPolMin

Characteristic
Directional
polMethod=Dual IPolMin
UPol T
I3PDIR
0.0 F
polMethod=Current
OR
UTotPol
IPol AND REVERSE_Int
T RVS
F

UIPol
RNPol STAGE1_DIR_Int
X T
Complex 0.0 STAGE2_DIR_Int
Number 0.0 F OR
XNPol STAGE3_DIR_Int
STAGE4_DIR_Int

BLOCK AND

IEC07000067-7-en.vsdx

IEC07000067 V7 EN-US

Figure 322: Simplified logic diagram for directional supervision element with integrated directional comparison
step

9.4.8.9 Second harmonic blocking element M13941-200 v10

A harmonic restrain can be chosen for each step by a parameter setting HarmBlockx. If the ratio of
the 2nd harmonic component in relation to the fundamental frequency component in the residual
current exceeds the preset level (defined by parameter 2ndHarmStab), output signal 2NDHARMD is
set to logical value one and the harmonic restraining feature to the function block will be applicable.

Blocking from the 2nd harmonic element activates if all of three criteria are satisfied:

1. The fundamental frequency component of the current > 1% of IBase

2. The second harmonic component > 1% of IBase
3. The ratio of the 2nd harmonic component in relation to the fundamental frequency component in
the residual current exceeds the preset level defined by the parameter 2ndHarmStab setting

In addition to the basic functionality explained above, the 2nd harmonic blocking can be set in such
way to seal-in until residual current disappears. This feature might be required to stabilize EF4PTOC
during switching of parallel transformers in the station. In case of parallel transformers there is a risk
of sympathetic inrush current. If one of the transformers is in operation, and the parallel transformer
is switched in, the asymmetric inrush current of the switched-in transformer will cause partial
saturation of the transformer already in service. This is called transferred saturation. The 2nd
harmonic of the inrush currents of the two transformers is in phase opposition. The summation of the
two currents thus gives a small 2nd harmonic current. The residual fundamental current is however
significant. The inrush current of the transformer in service before the parallel transformer energizing,

Transformer protection RET670 559

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

is a little delayed compared to the first transformer. Therefore, we have high 2nd harmonic current
component initially. After a short period this current is however small and the normal 2nd harmonic
blocking resets. If the BlkParTransf function is activated, the 2nd harmonic restrain signal is latched
as long as the residual current measured by the relay is larger than a selected step current level by
using setting UseStartValue.

This feature has been called Block for Parallel Transformers. This 2nd harmonic seal-in feature is
activated when all of the following three conditions are simultaneously fulfilled:

1. Feature is enabled by entering setting parameter BlkParTransf = On.

2. Basic 2nd harmonic restraint feature has been active for at least 70ms.
3. Residual current magnitude is higher than the set start value for one of the four residual
overcurrent stages. By a parameter setting UseStartValue it is possible to select which one of
the four start values that will be used (IN1> or IN2> or IN3> or IN4>).

Once Block for Parallel Transformers is activated, the basic 2nd harmonic blocking signal is sealed-in
until the residual current magnitude falls below a value defined by parameter setting UseStartValue
(see condition 3 above).

Simplified logic diagram for 2nd harmonic blocking feature is shown in Figure 323.

BLOCK

a
a>b
0.07*IBase b

a
a>b
b
Extract second AND
IOP
harmonic current a
a>b
component b

Extract
fundamental
current component
X
2ndHarmStab

q-1

0-70ms OR 2ndH_FreezeTimers_int
AND OR
0

BlkParTransf=On
|IOP|
a
a>b
b
Use_PUValue
Pickup1>
Pickup2>
Pickup3>
Pickup4>

ANSI13000015-2-en.vsdx

ANSI13000015 V2 EN-US

Figure 323: Simplified logic diagram for 2nd harmonic blocking feature and Block for Parallel Transformers
feature

560 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

When enabled, the 2nd harmonic blocking function is used to freeze the Definite
and/or the Inverse Characteristics internal timers. When the function detects a 2nd
harmonic higher than the set threshold, the internal function timers are frozen but
START outputs continues to be active as long as the measured current is above the
set pickup level. Internal timers will again resume timing when harmonic content
becomes smaller than the set threshold and the measured current is higher than the
pickup value. If TRIP output is already active when harmonic blocking signal appears
the TRIP output will not be affected.

9.4.8.10 Switch on to fault feature M13941-211 v5

Integrated in the four step residual overcurrent protection are the switch on to fault logic (SOTF) and
the under-time logic. The setting parameter SOTF is set to activate SOTF, the under-time logic or
both. When the circuit breaker is closing there is a risk to close it onto a permanent fault, for example
during an autoreclosing sequence. The SOTF logic will enable fast fault clearance during such
situations. The time during which SOTF and under-time logics will be active after activation is defined
by the setting parameter t4U.

The SOTF logic uses the start signal from step 2 or step 3 for its operation, selected by setting
parameter StepForSOTF. The setting parameter ActivationSOTF can be set for activation of CB
position open change, CB position closed change or CB close command. In case of a residual
current start from step 2 or 3 (dependent on setting) the function will give a trip after a set delay
tSOTF. This delay is normally set to a short time (default 200 ms).

The under-time logic acts as a circuit breaker pole-discordance protection, but it is only active
immediately after breaker switching. The under-time logic can only be used in solidly or low
impedance grounded systems.

The under-time logic always uses the start signal from the step 4. The under-time logic will normally
be set to operate for a lower current level than the SOTF function. The under-time logic can also be
blocked by the 2nd harmonic restraint feature. This enables high sensitivity even if power transformer
inrush currents can occur at breaker closing. This logic is typically used to detect asymmetry of CB
poles immediately after switching of the circuit breaker. The under-time logic is activated either from
change in circuit breaker position or from circuit breaker close and open command pulses. This
selection is done by setting parameter ActUnderTime. In case of a start from step 4 this logic will give
a trip after a set delay tUnderTime. This delay is normally set to a relatively short time (default 300
ms).

Transformer protection RET670 561

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

SOTF

200 ms
Open
t
t4U
200 ms
Closed
t ActivationSOTF

Close command
tSOTF
AND t
AND
STIN2

StepForSOTF
STIN3

SOTF
BLOCK
OFF
SOTF
UNDERTIME
UnderTime TRIP

tUnderTime
SOTF or
AND
2nd Harmonic HarmResSOFT t UnderTime

OR

Open

Close OR

t4U

ActUnderTime
Close command AND

STIN4

IEC06000643-7-en.vsdx

IEC06000643 V7 EN-US

Figure 324: Simplified logic diagram for SOTF and under-time features
M13941-3 v6
Simplified logic diagram for the complete EF4PTOC function is shown in Figure 325:

signal to communication scheme

Directional Check
Element

4 step over current

INPol Direction
operatingCurrent element
Element
3U0 One element for each
earthFaultDirection step
3I0
angleValid
I3PDIR
DirMode
enableDir

harmRestrBlock
3I0 Harmonic
Restraint 1
Element TRIP


start step 2, 3 and 4

Blocking at parallel
transformers
SwitchOnToFault
TRSOTF

CB
DirMode pos
or cmd
enableDir
Mode
Selection enableStep1-4

DirectionalMode1-4

IEC06000376-4-en.vsdx
IEC06000376 V4 EN-US

Figure 325: Functional overview of EF4PTOC

562 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

9.4.8.11 Phase selection element GUID-81F5DC32-C8AF-4EF4-BEF6-8335A9197617 v1

The phase selection element provides very fast and reliable faulty phase identification for phase
selective tripping and subsequent reclosing during earth faults. The operation of the phase selection
element is based on both voltage phasor comparison and current change criteria. This measuring
principle successfully distinguishes the faulty phase with minimum influence from load current or
other disturbances, such as power swing. The phase selection feature can be enabled by setting
EnPhaseSel.

The faulty phases are primarily identified by a delta current criteria. Per-phase and phase-to-phase
delta currents are calculated and compared with different criteria to determine if there is a single
phase or phase-to-phase to earth fault. In case the fault cannot be identified by the delta current
criteria, a voltage phasor based method will be applied by comparing the angle between the voltage
phasor and the zero sequence current. The voltage phasor based method is applicable for forward
direction single phase to ground faults. If a three phase disturbance has been identified (for example,
during power swing), the voltage based method will be temporarily disabled until the disturbance
disappears.

The operation of the phase selection element is controlled by the measured zero sequence current.
When the measured zero sequence current is above the operate level (60% of IN>Dir), phase
selection is released. Once the faulty phase is selected, the selected phase will be latched until the
zero sequence current drops below the operate level.

Outputs PHSELL1, PHSELL2, and PHSELL3 are used to indicate the selected faulty phases. The
outputs are released when general START from EF4 function is TRUE.

The phase selection element will be blocked by the external input BLKPHSEL or when the circuit
breaker position is open. The CBPOS input will be high when the circuit breaker is closed and it will
be low when the circuit breaker is open. The CBPOS input provides the CB position to phase
selection element.

I3P Phase selection by

delta current AND S Q
SR AND
R
3I0 a
a>b
0.6* IN>Dir
b PHSELLx
OR
CBPOS

tON = 20ms
Phase selection by
U3P voltage and zero
AND 1s AND
sequence current
phasor

No 3 Phase Disturbance

STFW

IEC20000563-2-en.vsdx

IEC20000563 V2 EN-US

Figure 326: Simplified logic diagram for Phase selection

Transformer protection RET670 563

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.4.9 Technical data IP11455-1 v1

M15223-1 v18

Table 307: EF4PTOC technical data

Function Range or value Accuracy

Operate current, step 1-4 (1-2500)% of IBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir

Reset ratio > 95% at (10-2500)% of IBase -

Relay characteristic angle (-180 to 180) degrees ±2.0 degrees
(RCA)
Operate current for directional release (1–100)% of IBase For RCA ±60 degrees:
±2.5% of Ir at I ≤ Ir
±2.5% of I at I > Ir

Independent time delay at 0 to 2 x Iset, step (0.000-60.000) s ±0.2% or ±35 ms whichever is

1-4 greater

Minimum operate time for inverse curves, (0.000 - 60.000) s ±0.2% or ±35 ms whichever is
step 1-4 greater
Inverse time characteristics, see Table 1294, 16 curve types See Table 1294, Table 1295 and
Table 1295 and Table 1296 Table 1296
Second harmonic blocking (5–100)% of fundamental ±2.0% of Ir

Minimum polarizing voltage (1–100)% of UBase ±0.5% of Ur

Minimum polarizing current (2-100)% of IBase ±1.0% of Ir

Real part of source Z used for current (0.50-1000.00) W/phase -

polarization
Imaginary part of source Z used for current (0.50–3000.00) W/phase -
polarization
*Operate time, start non-directional at 0 to 2 Min. = 15 ms -
x Iset Max. = 30 ms

*Reset time, start non-directional at 2 x Iset to Min. = 15 ms -

0 Max. = 30 ms

*Operate time, start non-directional at 0 to 10 Min. = 5 ms -

x Iset Max. = 20 ms

*Reset time, start non-directional at 10 x Iset Min. = 20 ms -

to 0 Max. = 35 ms

Critical impulse time 10 ms typically at 0 to 2 x Iset -

Impulse margin time 15 ms typically -

*Note: Operate time and reset time are only valid if harmonic blocking is turned off for a step.

9.5 Four step directional negative phase sequence

overcurrent protection NS4PTOC GUID-E8CF8AA2-AF54-4FD1-A379-3E55DCA2FA3A v1

564 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

9.5.1 Function revision history GUID-FEAFB742-D0DA-4F9E-B4AC-84E568301282 v2

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 Maximum value changed to 2000.0 % of IBase for IMin1, IMin2, IMin3 and IMin4
settings.
M 2.2.5 -

9.5.2 Identification
GUID-E1720ADA-7F80-4F2C-82A1-EF2C9EF6A4B4 v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Four step negative sequence NS4PTOC 46I2
overcurrent protection I2
4
alt
4
IEC10000053 V1 EN-US

9.5.3 Functionality GUID-485E9D36-0032-4559-9204-101539A32F47 v6

Four step directional negative phase sequence overcurrent protection (NS4PTOC) has an inverse or
definite time delay independent for each step separately.

All IEC and ANSI time delayed characteristics are available together with an optional user defined
characteristic.

The directional function is voltage polarized.

NS4PTOC can be set directional or non-directional independently for each of the steps.

Transformer protection RET670 565

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.5.4 Function block GUID-8EDB8B12-0D86-4F6B-A1FB-F5D0C72AA545 v3

NS4PTOC
I3P* TRIP
I3PDIR* TR1
U3P* TR2
BLOCK TR3
BLKTR TR4
BLKST1 START
BLKST2 ST1
BLKST3 ST2
BLKST4 ST3
ENMULT1 ST4
ENMULT2 STFW
ENMULT3 STRV
ENMULT4

IEC10000054-2-en.vsd
IEC10000054 V2 EN-US

Figure 327: NS4PTOC function block

9.5.5 Signals
PID-7798-INPUTSIGNALS v1

Table 308: NS4PTOC Input signals

Name Type Default Description

I3P GROUP - Group connection for operate current
SIGNAL
I3PDIR GROUP - Group connection for directional current
SIGNAL
U3P GROUP - Group connection for polarizing voltage
SIGNAL
BLOCK BOOLEAN 0 General block
BLKTR BOOLEAN 0 Block of trip
BLKST1 BOOLEAN 0 Block of step 1 (Start and trip)
BLKST2 BOOLEAN 0 Block of step 2 (Start and trip)
BLKST3 BOOLEAN 0 Block of step 3 (Start and trip)
BLKST4 BOOLEAN 0 Block of step 4 (Start and trip)
ENMULT1 BOOLEAN 0 When activated, the current multiplier is in use for step1
ENMULT2 BOOLEAN 0 When activated, the current multiplier is in use for step2
ENMULT3 BOOLEAN 0 When activated, the current multiplier is in use for step3
ENMULT4 BOOLEAN 0 When activated, the current multiplier is in use for step4

PID-7798-OUTPUTSIGNALS v1

Table 309: NS4PTOC Output signals

Name Type Description

TRIP BOOLEAN General trip signal
TR1 BOOLEAN Trip signal from step 1
TR2 BOOLEAN Trip signal from step 2
TR3 BOOLEAN Trip signal from step 3
TR4 BOOLEAN Trip signal from step 4
START BOOLEAN General start signal
ST1 BOOLEAN Start signal step 1
Table continues on next page

566 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Type Description

ST2 BOOLEAN Start signal step 2
ST3 BOOLEAN Start signal step 3
ST4 BOOLEAN Start signal step 4
STFW BOOLEAN Forward directional start signal
STRV BOOLEAN Reverse directional start signal

9.5.6 Settings
PID-7798-SETTINGS v1

Table 310: NS4PTOC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 311: NS4PTOC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
EnDir Disable - - Enable Enabling the Directional calculation
Enable
AngleRCA -180 - 180 Deg 1 65 Relay characteristic angle (RCA)
UPolMin 1 - 100 %UB 1 5 Minimum voltage level for polarization in
% of UBase
I2>Dir 1 - 100 %IB 1 10 Residual current level in % of IBase for
Direction release
DirMode1 Off - - Non-directional Directional mode of step 1 (off, nodir,
Non-directional forward, reverse)
Forward
Reverse
Characterist1 ANSI Ext. inv. - - ANSI Def. Time Time delay characteristic for step 1
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I2-1> 1 - 2500 %IB 1 100 Negative sequence current op level for
step 1 in % of IBase
t1 0.000 - 60.000 s 0.001 0.000 Definite time delay / additional time delay
for IDMT characteristics of step 1
k1 0.05 - 999.00 - 0.01 0.05 Time multiplier for the step 1 selected
time characteristic
Table continues on next page

Transformer protection RET670 567

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Name Values (Range) Unit Step Default Description

IMin1 1.00 - 2000.00 %IB 1.00 100.00 Minimum current for step 1
t1Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse time
characteristic step 1
I1Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current setting
value for step 1
DirMode2 Off - - Non-directional Directional mode of step 2 (off, nodir,
Non-directional forward, reverse)
Forward
Reverse
Characterist2 ANSI Ext. inv. - - ANSI Def. Time Time delay characteristic for step 2
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I2-2> 1 - 2500 %IB 1 50 Negative sequence current op level for
step 2 in % of IBase
t2 0.000 - 60.000 s 0.001 0.400 Definite time delay / additional time delay
for IDMT characteristics of step 2
k2 0.05 - 999.00 - 0.01 0.05 Time multiplier for the step 2 selected
time characteristic
IMin2 1.00 - 2000.00 %IB 1.00 50 Minimum current for step 2
t2Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse time
characteristic step 2
I2Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current setting
value for step 2
DirMode3 Off - - Non-directional Directional mode of step 3 (off, nodir,
Non-directional forward, reverse)
Forward
Reverse
Table continues on next page

568 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Values (Range) Unit Step Default Description

Characterist3 ANSI Ext. inv. - - ANSI Def. Time Time delay characteristic for step 3
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I2-3> 1 - 2500 %IB 1 33 Negative sequence current op level for
step 3 in % of IBase
t3 0.000 - 60.000 s 0.001 0.800 Definite time delay / additional time delay
for IDMT characteristics of step 3
k3 0.05 - 999.00 - 0.01 0.05 Time multiplier for the step 3 selected
time characteristic
IMin3 1.00 - 2000.00 %IB 1.00 33 Minimum current for step 3
t3Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse time
characteristic step 3
I3Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current setting
value for step 3
DirMode4 Off - - Non-directional Directional mode of step 4 (off, nodir,
Non-directional forward, reverse)
Forward
Reverse
Characterist4 ANSI Ext. inv. - - ANSI Def. Time Time delay characteristic for step 4
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I2-4> 1 - 2500 %IB 1 17 Negative sequence current op level for
step 4 in % of IBase
t4 0.000 - 60.000 s 0.001 1.200 Definite time delay / additional time delay
for IDMT characteristics of step 4
k4 0.05 - 999.00 - 0.01 0.05 Time multiplier for the step 4 selected
time characteristic
Table continues on next page

Transformer protection RET670 569

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Name Values (Range) Unit Step Default Description

IMin4 1.00 - 2000.00 %IB 1.00 17 Minimum current for step 4
t4Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse time
characteristic step 4
I4Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current setting
value for step 4

Table 312: NS4PTOC Group settings (advanced)

Name Values (Range) Unit Step Default Description

ResetTypeCrv1 Instantaneous - - Instantaneous Reset curve type for step1
IEC Reset (Instantaneous / IEC / ANSI)
ANSI reset
tReset1 0.000 - 60.000 s 0.001 0.020 Reset time delay for step 1
tPCrv1 0.005 - 3.000 - 0.001 1.000 Param P for customized inverse trip time
curve for step 1
tACrv1 0.005 - 200.000 - 0.001 13.500 Param A for customized inverse trip time
curve for step 1
tBCrv1 0.00 - 20.00 - 0.01 0.00 Param B for customized inverse trip time
curve for step 1
tCCrv1 0.1 - 10.0 - 0.1 1.0 Param C for customized inverse trip time
curve for step 1
tPRCrv1 0.005 - 3.000 - 0.001 0.500 Param PR for customized inverse reset
time curve for step 1
tTRCrv1 0.005 - 100.000 - 0.001 13.500 Param TR for customized inverse reset
time curve for step
tCRCrv1 0.1 - 10.0 - 0.1 1.0 Param CR for customized inverse reset
time curve for step 1
ResetTypeCrv2 Instantaneous - - Instantaneous Reset curve type for step2
IEC Reset (Instantaneous / IEC / ANSI)
ANSI reset
tReset2 0.000 - 60.000 s 0.001 0.020 Reset time delay for step 2
tPCrv2 0.005 - 3.000 - 0.001 1.000 Param P for customized inverse trip time
curve for step 2
tACrv2 0.005 - 200.000 - 0.001 13.500 Param A for customized inverse trip time
curve for step 2
tBCrv2 0.00 - 20.00 - 0.01 0.00 Param B for customized inverse trip time
curve for step 2
tCCrv2 0.1 - 10.0 - 0.1 1.0 Param C for customized inverse trip time
curve for step 2
tPRCrv2 0.005 - 3.000 - 0.001 0.500 Param PR for customized inverse reset
time curve for step 2
tTRCrv2 0.005 - 100.000 - 0.001 13.500 Param TR for customized inverse reset
time curve for step 2
tCRCrv2 0.1 - 10.0 - 0.1 1.0 Param C for customized inverse reset
time curve for step 2
ResetTypeCrv3 Instantaneous - - Instantaneous Reset curve type for step3
IEC Reset (Instantaneous / IEC / ANSI)
ANSI reset
tReset3 0.000 - 60.000 s 0.001 0.020 Reset time delay for step 3
tPCrv3 0.005 - 3.000 - 0.001 1.000 Param P for customized inverse trip time
curve for step 3
Table continues on next page

570 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Values (Range) Unit Step Default Description

tACrv3 0.005 - 200.000 - 0.001 13.500 Param A for customized inverse trip time
curve for step 3
tBCrv3 0.00 - 20.00 - 0.01 0.00 Param B for customized inverse trip time
curve for step 3
tCCrv3 0.1 - 10.0 - 0.1 1.0 Param C for customized inverse trip time
curve for step 3
tPRCrv3 0.005 - 3.000 - 0.001 0.500 Param PR for customized inverse reset
time curve for step 3
tTRCrv3 0.005 - 100.000 - 0.001 13.500 Param TR for customized inverse reset
time curve for step 3
tCRCrv3 0.1 - 10.0 - 0.1 1.0 Param CR for customized inverse reset
time curve for step 3
ResetTypeCrv4 Instantaneous - - Instantaneous Reset curve type for step4
IEC Reset (Instantaneous / IEC / ANSI)
ANSI reset
tReset4 0.000 - 60.000 s 0.001 0.020 Reset time delay for step 4
tPCrv4 0.005 - 3.000 - 0.001 1.000 Param P for customized inverse trip time
curve for step 4
tACrv4 0.005 - 200.000 - 0.001 13.500 Param A for customized inverse trip time
curve for step 4
tBCrv4 0.00 - 20.00 - 0.01 0.00 Param B for customized inverse trip time
curve for step 4
tCCrv4 0.1 - 10.0 - 0.1 1.0 Param C for customized inverse trip time
curve for step 4
tPRCrv4 0.005 - 3.000 - 0.001 0.500 Param PR for customized inverse reset
time curve for step 4
tTRCrv4 0.005 - 100.000 - 0.001 13.500 Param TR for customized inverse reset
time curve for step 4
tCRCrv4 0.1 - 10.0 - 0.1 1.0 Param CR for customized inverse reset
time curve for step 4

9.5.7 Monitored data

PID-7798-MONITOREDDATA v1

Table 313: NS4PTOC Monitored data

Name Type Values (Range) Unit Description

IOp REAL - A Operating current level
UPol REAL - kV Polarizing voltage level
UPOLIANG REAL - deg Polarizing angle between voltage and
current

9.5.8 Operation principle GUID-8923EC0B-A5BA-431B-9699-EB67E2637560 v3

Four step negative sequence overcurrent protection NS4PTOC function has the following three
“Analog Inputs” on its function block in the configuration tool:

1. I3P, input used for “Operating Quantity”.

2. U3P, input used for “Polarizing Quantity”.
3. I3PDIR, input used for "Directional finding"

These inputs are connected from the corresponding pre-processing function blocks in the
Configuration Tool within PCM600.

Transformer protection RET670 571

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.5.8.1 Operating quantity within the function GUID-8F0A5BDE-AC98-4188-9085-42A8DF00C476 v3

Four step negative sequence overcurrent protection NS4PTOC function always uses negative
sequence current (I2) for its operating quantity. The negative sequence current is calculated from
three-phase current input within the IED. The pre-processing block calculates I2 from the first three
inputs into the pre-processing block by using the following formula:

1
I2 = (
× IL1 + a × IL 2 + a × IL 3
2
)
3
EQUATION2266 V2 EN-US (Equation 156)

where:
IL1, IL2 and IL3 are fundamental frequency phasors of three individual phase currents.
a is so called operator which gives a phase shift of 120 deg, that is, a = 1∠120 deg

a2 similarly gives a phase shift of 240 deg, that is, a2 = 1∠240 deg

The phasor magnitude is used within the NS4PTOC protection to compare it with the set operation
current value of the four steps (I1>, I2>, I3> or I4>). If the negative sequence current is larger than
the set operation current and the step is used in non-directional mode a signal from the comparator
for this step is set to true. This signal, without delay, activates the output signal STx (x=1 - 4) for this
step and a common START signal.

9.5.8.2 Internal polarizing facility of the function GUID-B00FE98B-F269-4F1B-AC03-68250798851B v3

A polarizing quantity is used within the protection to determine the direction to the fault (Forward/
Reverse).

Four step negative sequence overcurrent protection NS4PTOC function uses the voltage polarizing
method.

NS4PTOC uses the negative sequence voltage -U2 as polarizing quantity U3P. This voltage is
calculated from three phase voltage input within the IED. The pre-processing block calculates -U2
from the first three inputs into the pre-processing block by using the following formula:

1
UPol = -U 2 = - × (UL1 + a 2 × UL 2 + a × UL3 )
3
EQUATION2267 V2 EN-US

where:
UL1, UL2 and UL3 are fundamental frequency phasors of three individual phase voltages.

To use this all three phase-to-earth voltages must be connected to three IED VT inputs.

This phasor is used together with the phasor of the operating current, in order to determine the
direction to the fault (Forward/Reverse).To enable voltage polarizing the magnitude of polarizing
voltage must be bigger than a minimum level defined by setting UpolMin.

Note that –U2 is used to determine the location of the fault. This ensures the required inversion of the
polarizing voltage within the function.

572 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

9.5.8.3 External polarizing for negative sequence function GUID-21930E81-1B40-4BA4-B1D8-3B365327AEF6 v1

The individual steps within the protection can be set as non-directional. When this setting is selected
it is then possible via function binary input BLKSTx (where x indicates the relevant step within the
protection) to provide external directional control (that is, torque control) by for example using one of
the following functions if available in the IED:

• Distance protection directional function

• Negative sequence polarized general current and voltage multi purpose protection function

9.5.8.4 Internal negative sequence protection structure GUID-A6B9B3F1-A1FE-4653-A8AF-61FCCF19CE95 v1

The protection is internally divided into the following parts:

• Four negative sequence overcurrent steps

• Directional supervision element for negative sequence overcurrent steps with integrated
directional comparison step for communication based negative sequence protection schemes
(permissive or blocking)

Each part is described separately in the following sections.

9.5.8.5 Four negative sequence overcurrent stages GUID-D8ACB136-2BA6-4ADA-A096-5C38BD12DB72 v2

Each overcurrent stage uses Operating Quantity I2 (negative sequence current) as measuring
quantity. Every of the four overcurrent stage has the following built-in facilities:

• Operating mode (Off/ Non-directional /Forward / Reverse). By this parameter setting the
operating mode of the stage is selected. Note that the directional decision (Forward/Reverse) is
not made within the overcurrent stage itself. The direction of the fault is determined in common
“Directional Supervision Element” described in the next paragraph.
• Negative sequence current pickup value.
• Type of operating characteristic (Inverse or Definite Time). By this parameter setting it is
possible to select Inverse or definite time delay for negative sequence overcurrent function.
Most of the standard IEC and ANSI inverse characteristics are available. For the complete list of
available inverse curves, refer to Chapter "Inverse characteristics"
• Type of reset characteristic (Instantaneous / IEC Reset /ANSI reset).By this parameter setting it
is possible to select the reset characteristic of the stage. For the complete list of available reset
curves, refer to Chapter "Inverse characteristics"
• Time delay related settings. By these parameter settings the properties like definite time delay,
minimum operating time for inverse curves, reset time delay and parameters to define user
programmable inverse curve are defined.
• Multiplier for scaling of the set negative sequence current pickup value by external binary signal.
By this parameter setting it is possible to increase negative sequence current pickup value when
function binary input ENMULTx has logical value 1.

Simplified logic diagram for one negative sequence overcurrent stage is shown in the following
figure:

Transformer protection RET670 573

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

BLKTR

Characteristx=DefTime AND
TRx
|IOP| AND
tx
a OR
a>b
ENMULTx b

STx
IxMult AND
X T
Ix> F
txmin
BLKSTx AND
BLOCK
Inverse

Characteristx=Inverse

DirModex=Off OR STAGEx_DIR_Int
DirModex=Non-directional
DirModex=Forward
AND OR
FORWARD_Int
DirModex=Reverse

AND
REVERSE_Int

IEC09000683.vsd
IEC09000683 V3 EN-US

Figure 328: Simplified logic diagram for negative sequence overcurrent stage x , where x=1, 2, 3 or 4
NS4PTOC can be completely blocked from the binary input BLOCK. The start signals from
NS4PTOC for each stage can be blocked from the binary input BLKSTx. The trip signals from
NS4PTOC can be blocked from the binary input BLKTR.

9.5.8.6 Directional supervision element with integrated directional comparison

function GUID-F54E21F7-7C99-41D6-BEC6-2D6EC6D2B2A3 v3

At least one of the four negative sequence overcurrent steps must be set as
directional in order to enable execution of the directional supervision element and
the integrated directional comparison function.

The operating and polarizing quantity are then used inside the directional element, as shown in figure
329, to determine the direction of the fault.

574 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Reverse
Area

AngleRCA Upol=-U2

Forward
Area
Iop = I2

IEC10000031-1-en.vsd
IEC10000031 V1 EN-US

Figure 329: Operating characteristic for fault directional element

Two relevant setting parameters for directional supervision element are:

• Directional element is internally enable to operate as soon as Iop is bigger than 40% of I>Dir
and the directional condition is fulfilled in set direction.
• Relay characteristic angle AngleRCA which defines the position of forward and reverse areas in
the operating characteristic.

Directional comparison step, built-in within directional supervision element, set NS4PTOC output
binary signals:

1. STFW=1 when tip of I2 phasor (operating quantity magnitude) is in forward area, see fig 329
(Operating quantity magnitude is bigger than setting I>Dir)
2. STRV=1 when tip of I2 phasor (operating quantity magnitude) is in the reverse area, see fig 329.
(Operating quantity magnitude is bigger than 60% of setting I>Dir)

These signals must be used for communication based fault teleprotection communication schemes
(permissive or blocking).

Simplified logic diagram for directional supervision element with integrated directional comparison
step is shown in figure 330:

Transformer protection RET670 575

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

|Iop|
a a>
STRV
b b REVERSE_Int
AND
0.6
X
a a>
STFW
I>Dir b b FORWARD_Int
AND

X
0.4

FWD
AND FORWARD_Int
AngleRCA

C h a r a c e ri s ti c
D i r e c ti o n a l
UPolMin

IPolMin

t
Iop

UPol
AND REVERSE_Int
RVS

STAGE1_DIR_Int
STAGE2_DIR_Int
STAGE3_DIR_Int OR
STAGE4_DIR_Int
BLOCK AND

IEC07000067-4.vsd

IEC07000067-4 V2 EN-US

Figure 330: Simplified logic diagram for directional supervision element with integrated directional comparison
step

9.5.9 Technical data GUID-10E9194D-3AE9-4D0F-867E-473E6F4BF443 v1

GUID-E83AD807-8FE0-4244-A50E-86B9AF92469E v7

Table 314: NS4PTOC technical data

Function Range or value Accuracy

Operate current, step 1 - 4 (1-2500)% of lBase ±1.0% of Ir at I £ Ir
±1.0% of I at I > Ir

Reset ratio > 95% at (10-2500)% of IBase -

Independent time delay at 0 to 2 x Iset, (0.000-60.000) s ±0.2% or ±35 ms whichever is greater
step 1 - 4
Minimum operate time for inverse curves, (0.000 - 60.000) s ±0.2% or ±35 ms whichever is greater
step 1 - 4
Inverse time characteristics, see table 16 curve types See table 1294, table 1295 and table
1294, table 1295 and table 1296 1296
Minimum operate current, step 1 - 4 (1.00 - 10000.00)% of IBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir

Relay characteristic angle (RCA) (-180 to 180) degrees ±2.0 degrees

Table continues on next page

576 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Function Range or value Accuracy

Operate current for directional release (1–100)% of IBase For RCA ±60 degrees:
±2.5% of Ir at I ≤ Ir
±2.5% of I at I > Ir

Minimum polarizing voltage (1–100)% of UBase ±0.5% of Ur

Real part of negative sequence source (0.50-1000.00) W/phase -

impedance used for current polarization
Imaginary part of negative sequence (0.50–3000.00) W/phase -
source impedance used for current
polarization
Operate time, start non-directional at 0 to Min. = 15 ms -
2 x Iset Max. = 30 ms

Reset time, start non-directional at 2 x Iset Min. = 15 ms -

to 0 Max. = 30 ms

Operate time, start non-directional at 0 to Min. = 5 ms -

10 x Iset Max. = 20 ms

Reset time, start non-directional at 10 x Min. = 20 ms -

Iset to 0 Max. = 35 ms

Critical impulse time 10 ms typically at 0 to 2 x Iset -

Impulse margin time 15 ms typically -

Transient overreach <10% at τ = 100 ms -

9.6 Sensitive directional residual overcurrent and power

protection SDEPSDE SEMOD171436-1 v4

9.6.1 Identification
SEMOD172025-2 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Sensitive directional residual over SDEPSDE - 67N
current and power protection

9.6.2 Functionality SEMOD171959-4 v12

In networks with high impedance earthing, the phase-to-earth fault current is significantly smaller
than the short circuit currents. Another difficulty for earth fault protection is that the magnitude of the
phase-to-earth fault current is almost independent of the fault location in the network.

Directional residual current can be used to detect and give selective trip of phase-to-earth faults in
high impedance earthed networks. The protection uses the residual current component 3I0 · cos φ,
where φ is the angle between the residual current and the residual voltage (-3U0), compensated with
a characteristic angle. Alternatively, the function can be set to strict 3I0 level with a check of angle φ.

Directional residual power can also be used to detect and give selective trip of phase-to-earth faults
in high impedance earthed networks. The protection uses the residual power component 3I0 · 3U0 ·
cos φ, where φ is the angle between the residual current and the reference residual voltage,
compensated with a characteristic angle.

A normal non-directional residual current function can also be used with definite or inverse time
delay.

Transformer protection RET670 577

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

A backup neutral point voltage function is also available for non-directional residual overvoltage
protection.

In an isolated network, that is, the network is only coupled to earth via the capacitances between the
phase conductors and earth, the residual current always has -90º phase shift compared to the
residual voltage (3U0). The characteristic angle is chosen to -90º in such a network.

In resistance earthed networks or in Petersen coil earthed, with a parallel resistor, the active residual
current component (in phase with the residual voltage) should be used for the earth fault detection. In
such networks, the characteristic angle is chosen to 0º.

As the amplitude of the residual current is independent of the fault location, the selectivity of the earth
fault protection is achieved by time selectivity.

When should the sensitive directional residual overcurrent protection be used and when should the
sensitive directional residual power protection be used? Consider the following:

• Sensitive directional residual overcurrent protection gives possibility for better sensitivity. The
setting possibilities of this function are down to 0.25 % of IBase, 1 A or 5 A. This sensitivity is in
most cases sufficient in high impedance network applications, if the measuring CT ratio is not
too high.
• Sensitive directional residual power protection gives possibility to use inverse time
characteristics. This is applicable in large high impedance earthed networks, with large
capacitive earth fault currents. In such networks, the active fault current would be small and by
using sensitive directional residual power protection, the operating quantity is elevated.
Therefore, better possibility to detect earth faults. In addition, in low impedance earthed
networks, the inverse time characteristic gives better time-selectivity in case of high zero-
resistive fault currents.

Phase
currents

IN

Phase-
Ground
voltages
UN

IEC13000013 V2 EN-US

Figure 331: Connection of SDEPSDE to analog preprocessing function block

Overcurrent functionality uses true 3I0, i.e. sum of GRPxL1, GRPxL2 and GRPxL3. For 3I0 to be
calculated, connection is needed to all three phase inputs.

Directional and power functionality uses IN and UN. If a connection is made to GRPxN this signal is
used, else if connection is made to all inputs GRPxL1, GRPxL2 and GRPxL3 the internally calculated
sum of these inputs (3I0 and 3U0) will be used.

578 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

9.6.3 Function block SEMOD172780-4 v6

SDEPSDE
I3P* TRIP
U3P* TRDIRIN
BLOCK TRNDIN
BLKTR TRUN
BLKTRDIR START
BLKNDN STDIRIN
BLKUN STNDIN
STUN
STFW
STRV
STDIR
UNREL

IEC07000032-2-en.vsd
IEC07000032 V2 EN-US

Figure 332: SDEPSDE function block

9.6.4 Signals
PID-3892-INPUTSIGNALS v7

Table 315: SDEPSDE Input signals

Name Type Default Description

I3P GROUP - Group signal for current
SIGNAL
U3P GROUP - Group signal for voltage
SIGNAL
BLOCK BOOLEAN 0 Blocks all the outputs of the function
BLKTR BOOLEAN 0 Blocks the trip outputs of the function
BLKTRDIR BOOLEAN 0 Blocks the directional operate outputs of the function
BLKNDN BOOLEAN 0 Blocks the Non directional current residual outputs
BLKUN BOOLEAN 0 Blocks the Non directional voltage residual outputs

PID-3892-OUTPUTSIGNALS v7

Table 316: SDEPSDE Output signals

Name Type Description

TRIP BOOLEAN General trip of the function
TRDIRIN BOOLEAN Trip of the directional residual over current function
TRNDIN BOOLEAN Trip of non directional residual over current
TRUN BOOLEAN Trip of non directional residual over voltage
START BOOLEAN General start of the function
STDIRIN BOOLEAN Start of the directional residual over current function
STNDIN BOOLEAN Start of non directional residual over current
STUN BOOLEAN Start of non directional residual over voltage
STFW BOOLEAN Start of directional function for a fault in forward direction
STRV BOOLEAN Start of directional function for a fault in reverse direction
STDIR INTEGER Direction of fault. A general signal common to all three mode of
residual over current protection
UNREL BOOLEAN Residual voltage release of operation of all directional modes

Transformer protection RET670 579

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.6.5 Settings
PID-3892-SETTINGS v7

Table 317: SDEPSDE Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OpMode 3I0Cosfi - - 3I0Cosfi Selection of operation mode for
3I03U0Cosfi protection
3I0 and fi
DirMode Forward - - Forward Direction of operation forward or reverse
Reverse
RCADir -179 - 180 Deg 1 -90 Relay characteristic angle RCA, in deg
RCAComp -10.0 - 10.0 Deg 0.1 0.0 Relay characteristic angle compensation
ROADir 0 - 90 Deg 1 90 Relay open angle ROA used as release
in phase mode, in deg
INCosPhi> 0.25 - 200.00 %IB 0.01 1.00 Set level for 3I0cosFi, directional res
over current in % of IBase
SN> 0.25 - 200.00 %SB 0.01 10.00 Set level for 3I03U0cosFi, starting inv
time count in % of SBase
INDir> 0.25 - 200.00 %IB 0.01 5.00 Set level for directional residual over
current prot in % of IBase
tDef 0.000 - 60.000 s 0.001 0.100 Definite time delay directional residual
overcurrent, in sec
SRef 0.03 - 200.00 %SB 0.01 10.00 Reference value of res power for inverse
time count in % of SBase
kSN 0.00 - 2.00 - 0.01 0.10 Time multiplier setting for directional
residual power mode
OpINNonDir> Off - - Off Operation of non-directional residual
On overcurrent protection
INNonDir> 1.00 - 400.00 %IB 0.01 10.00 Set level for non directional residual over
current in % of IBase
tINNonDir 0.000 - 60.000 s 0.001 1.000 Time delay for non-directional residual
over current, in sec
TimeChar ANSI Ext. inv. - - IEC Norm. inv. Operation curve selection for IDMT
ANSI Very inv. operation
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
tMin 0.000 - 60.000 s 0.001 0.040 Minimum operate time for IEC IDMT
curves, in sec
Table continues on next page

580 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Values (Range) Unit Step Default Description

kIN 0.05 - 2.00 - 0.01 1.00 IDMT time mult for non-dir res over
current protection
OpUN> Off - - Off Operation of non-directional residual
On overvoltage protection
UN> 1.00 - 200.00 %UB 0.01 20.00 Set level for non-directional residual over
voltage in % of UBase
tUN 0.000 - 60.000 s 0.001 0.100 Time delay for non-directional residual
over voltage, in sec
INRel> 0.25 - 200.00 %IB 0.01 1.00 Residual release current for all
directional modes in % of IBase
UNRel> 1.00 - 300.00 %UB 0.01 3.00 Residual release voltage for all direction
modes in % of UBase

Table 318: SDEPSDE Group settings (advanced)

Name Values (Range) Unit Step Default Description

tReset 0.000 - 60.000 s 0.001 0.040 Time delay used for reset of definite
timers, in sec
tPCrv 0.005 - 3.000 - 0.001 1.000 Setting P for customer programmable
curve
tACrv 0.005 - 200.000 - 0.001 13.500 Setting A for customer programmable
curve
tBCrv 0.00 - 20.00 - 0.01 0.00 Setting B for customer programmable
curve
tCCrv 0.1 - 10.0 - 0.1 1.0 Setting C for customer programmable
curve
ResetTypeCrv Immediate - - IEC Reset Reset mode when current drops off.
IEC Reset
ANSI reset
tPRCrv 0.005 - 3.000 - 0.001 0.500 Setting PR for customer programmable
curve
tTRCrv 0.005 - 100.000 - 0.001 13.500 Setting TR for customer programmable
curve
tCRCrv 0.1 - 10.0 - 0.1 1.0 Setting CR for customer programmable
curve

Table 319: SDEPSDE Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Global base selection for function groups

Table 320: SDEPSDE Non group settings (advanced)

Name Values (Range) Unit Step Default Description

RotResU 0 deg - - 180 deg Setting for rotating polarizing quantity if
180 deg necessary

Transformer protection RET670 581

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.6.6 Monitored data

PID-3892-MONITOREDDATA v6

Table 321: SDEPSDE Monitored data

Name Type Values (Range) Unit Description

INCOSPHI REAL - A Magnitude of residual current along the
polarizing quantity 3I0cos(Fi-RCA)
IN REAL - A Measured magnitude of the residual
current 3I0
UN REAL - kV Measured magnitude of the residual
voltage 3U0
SN REAL - MVA Measured magnitude of residual power
3I03U0cos(Fi-RCA)
ANG FI-RCA REAL - deg Angle between 3U0 and 3I0 minus RCA
(Fi-RCA)

9.6.7 Operation principle

9.6.7.1 Function inputs SEMOD171963-4 v5

The function is using phasors of the residual current and voltage. Group signals I3P and U3P
containing phasors of residual current and voltage which are taken from pre-processor blocks.

The sensitive directional earth fault protection has the following sub-functions included:

Directional residual current protection measuring 3I0·cos φ

SEMOD171963-8 v7
φ is defined as the angle between the residual current 3I0 and the reference voltage (|φ=ang(3I0)-
ang(Uref)|). The reference voltage (Uref) is the polarizing quantity which is used for directionality and
is defined as Uref = -3U0 e—jRCADir, that is -3U0 inversely rotated by the set characteristic angle
RCADir. RCADir is normally set equal to 0 in a high impedance earthed network with a neutral point
resistor as the active current component is appearing out on the faulted feeder only. RCADir is set
equal to -90° in an isolated network as all currents are mainly capacitive. The function operates when
3I0·cos φ gets larger than the set value.

RCADir = 0o,ROADir = 90o

3I0

j = ang(3I0 ) - ang(3Uref )
-3U0 = Uref
3I0 × cosj

IEC06000648-4-en.vsd
IEC06000648 V4 EN-US

Figure 333: RCADir set to 0°

582 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Uref
RCADir = −90 , ROADir = 90

3I0

3I0 ⋅ cos ϕ

ϕ = ang (3I0 ) − ang (Uref )

−3U0

IEC06000649_3_en.vsd
IEC06000649 V3 EN-US

Figure 334: RCADir set to -90°

For trip, the operating quantity 3I0 cos φ, the residual current 3I0, and the residual voltage 3U0 must
be larger than the set levels : INCosPhi>, INRel> and UNRel>. Refer to the simplified logical diagram
in Figure 338.

Trip from this function can be blocked from the binary input BLKTRDIR.

When the function picks up, binary output signals START and STDIRIN are activated. If the output
signals START and STDIRIN remain active for the set delay tDef the binary output signals TRIP and
TRDIRIN get activated. The trip from this sub-function has definite time delay.

ROADir is Relay Operating Angle. ROADir is identifying a window around the reference direction in
order to detect directionality. Figure 335 shows the restrictions made by the ROADir.

Transformer protection RET670 583

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

RCADir = 0o

3I0
Operate area

j
-3U0 = Uref
3I0 × cos j

ROADir

IEC06000650_2_en.vsd
IEC06000650 V2 EN-US

Figure 335: Characteristic with ROADir restriction

The function indicates forward/reverse direction to the fault. Reverse direction is defined as 3I0·cos
(φ + 180°) ≥ the set value.

It is also possible to tilt the characteristic to compensate for current transformer angle error with a
setting RCAComp as shown in the Figure 336:

584 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

RCADir = 0º

Operate area

-3U0 =Uref

Instrument
transformer
angle error 
RCAcomp
Characteristic after
angle compensation

3I0 (prim) 3I0 (to prot)

IEC06000651-3-en.vsd

IEC06000651 V3 EN-US

Figure 336: Explanation of RCAComp

Directional residual power protection measuring 3I0 · 3U0 · cos φ

SEMOD171963-32 v6

φ is defined as the angle between the residual current 3I0 and the reference voltage (Uref = -3U0 e-
jRCA) compensated with the set characteristic angle RCADir (|φ=ang(3I )—ang(U )|). The function
0 ref
operates when 3I0 · 3U0 · cos φ gets larger than the set value SN>. Refer to the simplified logical
diagram in Figure 338.

For trip, the residual power 3I0 · 3U0 · cos φ, the residual current 3I0 and the release voltage 3U0,
shall be larger than the set levels (SN>, INRel> and UNRel>).

Trip from this function can be blocked from the binary input BLKTRDIR.

When the function picks up, binary output signals START and STDIRIN are activated. If the output
signals START and STDIRIN remain active for the set delay tDef or after the inverse time delay
(setting kSN) the binary output signals TRIP and TRDIRIN get activated.

The function shall indicate forward/reverse direction to the fault. Reverse direction is defined as 3I0 ·
3U0·cos (φ + 180°) ³ the set value.

This variant has the possibility of choice between definite time delay and inverse time delay.

The inverse time delay is defined as:

kSN × (3I0 × 3U 0 × cos j(reference))

t inv =
3I0 × 3U 0 × cos j(measured)
EQUATION1942 V2 EN-US (Equation 157)

Transformer protection RET670 585

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Directional residual current protection measuring 3I0 and φ

SEMOD171963-48 v4
The function will operate if the residual current is larger than the set value and the angle |φ =
ang(3I0)-ang(Uref)| is within the sector RCADir ± ROADir

RCADir = 0º

ROADir = 80º

Operate area

3I0

-3U0

IEC06000652-3-en.vsd
IEC06000652 V3 EN-US

Figure 337: Example of characteristic

For trip, Residual current 3I0 shall be larger than both INRel> and INDir>, and residual voltage 3U0
shall be larger than the UNRel>. In addition, the angle φ shall be in the set area defined by ROADir
and RCADir. Refer to the simplified logical diagram in Figure 338.

Trip from this function can be blocked from the binary input BLKTRDIR.

When the function picks up, binary output signals START and STDIRIN are activated. If the output
signals START and STDIRIN remain active for the set delay tDef the binary output signals TRIP and
TRDIRIN get activated.

The function indicates forward/reverse direction to the fault. Reverse direction is defined as φ is
within the angle sector: RCADir + 180° ± ROADir

This variant has definite time delay.

Directional functions SEMOD171963-60 v4

For all the directional functions there are directional start signals STFW: fault in the forward direction,
and STRV: fault in the reverse direction. Even if the directional function is set to operate for faults in
the forward direction, a fault in the reverse direction will give the start signal STRV. Also if the
directional function is set to operate for faults in the reverse direction, a fault in the forward direction
will give the start signal STFW.

Non-directional earth fault current protection SEMOD171963-63 v6

This function will measure the residual current without checking the phase angle. The function will be
used to detect cross-country faults. This function can serve as alternative or backup to distance
protection with phase preference logic. To assure selectivity the distance protection can block the
non-directional earth fault current function via the input BLKNDN.

The non-directional function is using the calculated residual current, derived as sum of the phase
currents. This will give a better ability to detect cross-country faults with high residual current, also
when dedicated core balance CT for the sensitive earth fault protection will saturate.

586 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

This variant has the possibility of choice between definite time delay and inverse time delay
(TimeChar parameter). The inverse time delay shall be according to IEC 60255-3.

For trip, the residual current 3I0 shall be larger than the set level (INNonDir>).

Trip from this function can be blocked from the binary input BLKNDN.

When the function picks up, binary output signal STNDIN is activated. If the output signal STNDIN
remains active for the set delay tINNonDir or after the inverse time delay the binary output signals
TRIP and TRNDIN get activated.

Residual overvoltage release and protection SEMOD171963-72 v8

All the directional functions shall be released when the residual voltage gets higher than a set level
UNRel>.

In addition, there is also a separate non-directional residual over voltage protection, with its own
definite time delay tUN and set level UN>.

For trip, the residual voltage 3U0 shall be larger than the set level (UN>).

Trip from this function can be blocked from the binary input BLKUN.

When the function picks up, binary output signal STUN is activated. If the output signal STUN is
active for the set delay tUNNonDir, the binary output signals TRIP and TRUN get activated. A
simplified logical diagram of the total function is shown in Figure 338.

Transformer protection RET670 587

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

OpINNonDir> = On
STNDIN
&
INNonDir>
t
TRNDIN
TimeChar IN
OpUN> = On
STUN
&
UN>
tUN TRUN
t

OpMode = 3I0Cosfi
INRel>

UNRel> & &

tDef
INCosPhi> t

OpMode = 3I0 and fi

& ³ STDIRIN
INDir> &
1

tDef ³ TRDIRIN
t 1
OpMode = 3I03U0Cosfi
& &
SN>
t
³ S
1 N
STFW
RCADir Direction &
Detection
RCAComp Logic STRV
&
ROADir

DirMode = Forward

DirMode = Reverse
IEC06000653.vsd

IEC06000653 V4 EN-US

Figure 338: Simplified logical diagram of the sensitive earth fault current protection

9.6.8 Technical data SEMOD173352-1 v1

SEMOD173350-2 v16

Table 322: SDEPSDE technical data

Function Range or value Accuracy

Operate level for 3I0·cosj directional (0.25-200.00)% of IBase ±1.0% of Ir at I £ Ir
residual overcurrent ±1.0% of I at I > Ir

Operate level for ·3I0·3U0 cosj directional (0.25-200.00)% of SBase ±1.0% of Sr at S £ Sr

residual power ±1.0% of S at S > Sr

Operate level for 3I0 and j residual (0.25-200.00)% of IBase ±1.0% of Ir at £ Ir

overcurrent ±1.0% of I at I > Ir

Operate level for non-directional overcurrent (1.00-400.00)% of IBase ±1.0% of Ir at I £ Ir

±1.0% of I at I > Ir

Operate level for non-directional residual (1.00-200.00)% of UBase ±0.5% of Ur at U £ Ur

overvoltage ±0.5% of U at U > Ur

Table continues on next page

588 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Function Range or value Accuracy

Residual release current for all directional (0.25-200.00)% of IBase ±1.0% of Ir at I £ Ir
modes ±1.0% of I at I > Ir

Residual release voltage for all directional (1.00-300.00)% of UBase ±0.5% of Ur at U £ Ur

modes ±0.5% of U at U > Ur

Operate time for non-directional residual Min. = 40 ms

overcurrent at 0 to 2 x Iset
Max. = 65 ms
Reset time for non-directional residual Min. = 40 ms
overcurrent at 2 x Iset to 0
Max. = 65 ms
Operate time for directional residual Min. = 110 ms
overcurrent at 0 to 2 x Iset
Max. = 160 ms
Reset time for directional residual Min. = 20 ms
overcurrent at 2 x Iset to 0
Max. = 60 ms
Independent time delay for non-directional (0.000 – 60.000) s ±0.2% or ± 75 ms whichever is greater
residual overvoltage at 0.8 x Uset to 1.2 x
Uset

Independent time delay for non-directional (0.000 – 60.000) s ±0.2% or ± 75 ms whichever is greater
residual overcurrent at 0 to 2 x Iset

Independent time delay for directional (0.000 – 60.000) s ±0.2% or ± 170 ms whichever is
residual overcurrent at 0 to 2 x Iset greater

Inverse characteristics, see table 1297, 16 curve types See Table 1297, Table 1298 and Table
Table 1298 and Table 1299 1299
Relay characteristic angle (RCADir) (-179 to 180) degrees ±2.0 degrees
Relay operate angle (ROADir) (0 to 90) degrees ±2.0 degrees

9.7 Thermal overload protection, one time constant,

Celsius/Fahrenheit LCPTTR/LFPTTR IP14512-1 v7

9.7.1 Identification
M17106-1 v7

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Thermal overload protection, one time LCPTTR 26
constant, Celsius

Thermal overload protection, one time LFPTTR 26

constant, Fahrenheit

9.7.2 Functionality M12020-4 v14

The increasing utilization of the power system closer to the thermal limits has generated a need of a
thermal overload protection for power lines.

Transformer protection RET670 589

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

A thermal overload will often not be detected by other protection functions and the introduction of the
thermal overload protection can allow the protected circuit to operate closer to the thermal limits.

The three-phase current measuring protection has an I2t characteristic with settable time constant
and a thermal memory. The temperature is displayed in either Celsius or Fahrenheit, depending on
whether the function used is Thermal overload protection (LCPTTR) (Celsius) or (LFPTTR)
(Fahrenheit).

An alarm level gives early warning to allow operators to take action well before the line is tripped.

Estimated time to trip before operation, and estimated time to reclose after operation are presented.

9.7.3 Function block M12627-3 v8

LCPTTR
I3P* TRIP
BLOCK START
BLKTR ALARM
ENMULT LOCKOUT
AMBTEMP
SENSFLT
RESET

IEC13000199-1-en.vsd
IEC13000199 V1 EN-US
LFPTTR
I3P* TRIP
BLOCK START
BLKTR ALARM
ENMULT LOCKOUT
AMBTEMP
SENSFLT
RESET

IEC13000301-1-en.vsd
IEC13000301 V1 EN-US

Figure 339: LCPTTR/LFPTTR function bloc

9.7.4 Signals
PID-3908-INPUTSIGNALS v7

Table 323: LCPTTR Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Block of trip
ENMULT BOOLEAN 0 Current multiplyer used when THOL is for two or more lines
AMBTEMP REAL 0 Ambient temperature from external temperature sensor
SENSFLT BOOLEAN 0 Validity status of ambient temperature sensor
RESET BOOLEAN 0 Reset of internal thermal load counter

PID-3909-INPUTSIGNALS v9

Table 324: LFPTTR Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Block of trip
Table continues on next page

590 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Type Default Description

ENMULT BOOLEAN 0 Current multiplyer used when THOL is for two or more lines
AMBTEMP REAL 0 Ambient temperature from external temperature sensor
SENSFLT BOOLEAN 0 Validity status of ambient temperature sensor
RESET BOOLEAN 0 Reset of internal thermal load counter

PID-3908-OUTPUTSIGNALS v7

Table 325: LCPTTR Output signals

Name Type Description

TRIP BOOLEAN Trip
START BOOLEAN Start Signal
ALARM BOOLEAN Alarm signal
LOCKOUT BOOLEAN Lockout signal

PID-3909-OUTPUTSIGNALS v8

Table 326: LFPTTR Output signals

Name Type Description

TRIP BOOLEAN Trip
START BOOLEAN Start Signal
ALARM BOOLEAN Alarm signal
LOCKOUT BOOLEAN Lockout signal

9.7.5 Settings
PID-3908-SETTINGS v7

Table 327: LCPTTR Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
TRef 0 - 300 Deg C 1 90 End temperature rise above ambient of
the line when loaded with IRef
IRef 0 - 400 %IB 1 100 The load current (in % of IBase) leading
to TRef temperature
IMult 1-5 - 1 1 Current multiplier when function is used
for two or more lines
Tau 1 - 1000 Min 1 45 Time constant of the line in minutes.
AlarmTemp 0 - 200 Deg C 1 80 Temperature level for start (alarm)
TripTemp 0 - 300 Deg C 1 90 Temperature level for trip
ReclTemp 0 - 300 Deg C 1 75 Temperature for reset of lockout after trip
tPulse 0.05 - 0.30 s 0.01 0.10 Operate pulse length. Minimum one
execution cycle
AmbiSens Off - - Off External temperature sensor available
On
DefaultAmbTemp -50 - 100 Deg C 1 20 Ambient temperature used when
AmbiSens is set to Off.
DefaultTemp -50 - 300 Deg C 1 50 Temperature raise above ambient
temperature at startup

Transformer protection RET670 591

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Table 328: LCPTTR Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

PID-3909-SETTINGS v8

Table 329: LFPTTR Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
TRef 0 - 600 Deg F 1 160 End temperature rise above ambient of
the line when loaded with IRef
IRef 0 - 400 %IB 1 100 The load current (in % of IBase) leading
to TRef temperature
IMult 1-5 - 1 1 Current multiplier when function is used
for two or more lines
Tau 1 - 1000 Min 1 45 Time constant of the line in minutes.
AlarmTemp 0 - 400 Deg F 1 175 Temperature level for start (alarm)
TripTemp 0 - 600 Deg F 1 195 Temperature level for trip
ReclTemp 0 - 600 Deg F 1 170 Temperature for reset of lockout after trip
tPulse 0.05 - 0.30 s 0.01 0.10 Operate pulse length. Minimum one
execution cycle
AmbiSens Off - - Off External temperature sensor available
On
DefaultAmbTemp -50 - 250 Deg F 1 60 Ambient temperature used when
AmbiSens is set to Off.
DefaultTemp -50 - 600 Deg F 1 100 Temperature raise above ambient
temperature at startup

Table 330: LFPTTR Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

9.7.6 Monitored data

PID-3908-MONITOREDDATA v7

Table 331: LCPTTR Monitored data

Name Type Values (Range) Unit Description

TTRIP INTEGER - - Estimated time to trip (in min)
TENRECL REAL - - Estimated time to reset of lockout (in
min)
TEMP REAL - deg Calculated temperature of the device
TEMPAMB REAL - deg Ambient temperature used in the
calculations
TERMLOAD REAL - - Temperature relative to operate
temperature

592 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

PID-3909-MONITOREDDATA v7

Table 332: LFPTTR Monitored data

Name Type Values (Range) Unit Description

TTRIP INTEGER - - Estimated time to trip (in min)
TENRECL REAL - - Estimated time to reset of lockout (in
min)
TEMP REAL - Temperature Calculated temperature of the device
Fahrenheit
TEMPAMB REAL - Temperature Ambient temperature used in the
Fahrenheit calculations
TERMLOAD REAL - - Temperature relative to operate
temperature

9.7.7 Operation principle M12018-3 v12

The sampled analog phase currents are pre-processed and for each phase current the RMS value is
derived. These phase current values are fed to the thermal overload protection, one time constant
LCPTTR/LFPTTR function. The temperature is displayed either in Celsius or Fahrenheit, depending
on whether LCPTTR/LFPTTR function is selected.

From the largest of the three-phase currents a final temperature is calculated according to the
expression:

2
æ I ö
Q final =ç ÷÷ × Tref
ç I ref
è ø
EQUATION1167 V1 EN-US (Equation 158)

where:
I is the largest phase current,
Iref is a given reference current and

Tref is steady state temperature rise corresponding to Iref

The ambient temperature is added to the calculated final temperature. If this temperature is larger
than the set operate temperature level, TripTemp, a START output signal is activated.

The actual temperature at the actual execution cycle is calculated as:

æ Dt
ö
Qn = Qn -1 + ( Q final - Q n-1 ) × ç1 - e t ÷
-

è ø
EQUATION1168 V1 EN-US (Equation 159)

where:
Qn is the calculated present temperature,

Q n-1 is the calculated temperature at the previous time step,

Q final is the calculated final temperature with the actual current,

Dt is the time step between calculation of the actual temperature and

t is the set thermal time constant for the protected device (line or cable)

Transformer protection RET670 593

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

The actual temperature of the protected component (line or cable) is calculated by adding the
ambient temperature to the calculated temperature, as shown above. The ambient temperature can
be taken from a separate sensor or can be given a constant value. The used ambient temperature is
available as a real figure signal, TEMPAMB. The calculated component temperature is available as a
real figure signal, TEMP. The temperature of the component compared to the setting TripTemp is also
available as a real figure signal, TERMLOAD which indicates the thermal status compared to the trip
level.

When the component temperature reaches the set alarm level AlarmTemp the output signal ALARM
is set. When the component temperature reaches the set trip level TripTemp the output signal TRIP is
set.

There is also a calculation of the present time to operate with the present current. This calculation is
only performed if the final temperature is calculated to be above the operation temperature:

æQ - Qoperate ö
toperate = -t × ln ç final
ç Q final - Q n ÷÷
è ø
EQUATION1169 V1 EN-US (Equation 160)

The calculated time to trip is available as a real figure signal, TTRIP.

After a trip, caused by the thermal overload protection, there can be a lockout to reconnect the
tripped circuit. The output lockout signal LOCKOUT is activated when the device temperature is
above the set lockout release temperature setting ReclTemp.

The time to lockout release is calculated by the following cooling time calculation. The thermal
content of the function can be reset with input RESET.

æQ - Qlockout _ release ö
tlockout _ release = -t × ln ç final ÷÷
ç Q final - Q n
è ø
EQUATION1170 V1 EN-US (Equation 161)

In the above equation, the final temperature is equal to the set or measured ambient temperature.
The calculated time to reset of lockout is available as a real figure signal, TENRECL. This signal is
enabled when the LOCKOUT output is activated.

In some applications the measured current can involve a number of parallel lines. This is often used
where one bay connects several parallel cables. By setting the parameter IMult to the number of
parallel lines (cables) the actual current on one line is used in the protection algorithm by dividing the
measured current by the total number of cables. To activate this option the input ENMULT must be
activated.

The protection has a reset input: RESET. By activating this input the calculated temperature is reset
to its default initial value. This is useful during testing when secondary injected current has given a
calculated “false” temperature level.

594 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

START
Final Temp > Trip Temp

TEMP
Calculation of actual
temperature

AMBTEMP ALARM
Actual Temp > Alarm Temp

I3P

Calculation of final
temperature
ENMULT
TRIP

Actual Temp > Trip Temp

SENSFLT

LOCKOUT
Lockout logic

Actual Temp < Recl Temp

BLOCK

TTRIP
Calculation of time to trip
BLKTR

TENRECL
Calculation of time to reset
of lockout

IEC09000637-2-en.vsd
IEC09000637 V2 EN-US

Figure 340: Functional overview of LCPTTR/LFPTTR

Transformer protection RET670 595

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.7.8 Technical data

M12352-1 v15

Table 333: LCPTTR/LFPTTR technical data

Function Range or value Accuracy

Reference current (2-400)% of IBase ±1.0% of Ir

Reference temperature (0-300)°C, (0 - 600)°F ± 1.0°C, ±2.0°F

Operate time: Time constant t = (1–1000) IEC 60255-149, ±5.0% or ±200
minutes ms whichever is greater
 
 I , Ip
2 2 
t < σ ln  
 2 TTrip , TAmb 2 
I , T √ I ref

 ref 
EQUATION13000039 V3 EN-US (Equation 162)

TTrip = set operate temperature

TAmb = ambient temperature
Tref = temperature rise above ambient at Iref
Iref = reference load current
I = actual measured current
Ip = load current before overload occurs

Alarm temperature (0-200)°C, (0-400)°F ±2.0°C, ±4.0°F

Operate temperature (0-300)°C, (0-600)°F ±2.0°C, ±4.0°F
Reset level temperature (0-300)°C, (0-600)°F ±2.0°C, ±4.0°F

9.8 Thermal overload protection, two time constants

TRPTTR IP14513-1 v4

9.8.1 Identification
M14877-1 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Thermal overload protection, two time TRPTTR 49
constants

SYMBOL-A V1 EN-US

9.8.2 Functionality M13243-3 v12

If a power transformer reaches very high temperatures the equipment might be damaged. The
insulation within the transformer will experience forced ageing. As a consequence of this the risk of
internal phase-to-phase or phase-to-earth faults will increase.

The thermal overload protection (TRPTTR) estimates the internal heat content of the transformer
(temperature) continuously. This estimation is made by using a thermal model of the transformer with
two time constants, which is based on current measurement.

596 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Two warning levels are available. This enables actions in the power system to be done before
dangerous temperatures are reached. If the temperature continues to increase to the trip value, the
protection initiates a trip of the protected transformer.

The estimated time to trip before operation is presented.

9.8.3 Function block M13299-3 v6

TRPTTR
I3P* TRIP
BLOCK START
COOLING ALARM1
ENMULT ALARM2
RESET LOCKOUT
WARNING

IEC06000272_2_en.vsd
IEC06000272 V2 EN-US

Figure 341: TRPTTR function block

9.8.4 Signals
PID-4148-INPUTSIGNALS v4

Table 334: TRPTTR Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
BLOCK BOOLEAN 0 Block of function
COOLING BOOLEAN 0 Cooling input Off / On. Changes Ib setting and time constant
ENMULT BOOLEAN 0 Enable Multiplier for currentReference setting
RESET BOOLEAN 0 Reset of function

PID-4148-OUTPUTSIGNALS v4

Table 335: TRPTTR Output signals

Name Type Description

TRIP BOOLEAN Trip Signal
START BOOLEAN Start signal
ALARM1 BOOLEAN First level alarm signal
ALARM2 BOOLEAN Second level alarm signal
LOCKOUT BOOLEAN Lockout signal
WARNING BOOLEAN Warning signal: Trip within set warning time

9.8.5 Settings
PID-6862-SETTINGS v1

Table 336: TRPTTR Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
IRef 10.0 - 1000.0 % 1.0 100.0 Reference current in %
IRefMult 0.01 - 10.00 - 0.01 1.00 Multiplication Factor for reference
current
Table continues on next page

Transformer protection RET670 597

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Name Values (Range) Unit Step Default Description

IBase1 30.0 - 250.0 %IB 1.0 100.0 Base current,IBase1 without Cooling
input in % of IBase
IBase2 30.0 - 250.0 %IB 1.0 100.0 Base Current,IBase2, with Cooling input
ON in % of IBase
Tau1 0.10 - 500.00 Min 0.01 60.00 Time constant without cooling input in
min, with IBase1
Tau2 0.10 - 500.00 Min 0.01 60.00 Time constant with cooling input in min,
with IBase2
IHighTau1 30.0 - 250.0 %IB1 1.0 100.0 Current Sett, in % of IBase1 for rescaling
TC1 by TC1-IHIGH
Tau1High 5 - 2000 %tC1 1 100 Multiplier in % to TC1 when current is >
IHIGH-TC1
ILowTau1 30.0 - 250.0 %IB1 1.0 100.0 Current Set, in % of IBase1 for rescaling
TC1 by TC1-ILOW
Tau1Low 5 - 2000 %tC1 1 100 Multiplier in % to TC1 when current is <
ILOW-TC1
IHighTau2 30.0 - 250.0 %IB2 1.0 100.0 Current Set, in % of IBase2 for rescaling
TC2 by TC2-IHIGH
Tau2High 5 - 2000 %tC2 1 100 Multiplier in % to TC2 when current is
>IHIGH-TC2
ILowTau2 30.0 - 250.0 %IB2 1.0 100.0 Current Set, in % of IBase2 for rescaling
TC2 by TC2-ILOW
Tau2Low 5 - 2000 %tC2 1 100 Multiplier in % to TC2 when current is <
ILOW-TC2
ITrip 50.0 - 250.0 %IBx 1.0 110.0 Steady state operate current level in %
of IBasex
Alarm1 50.0 - 99.0 %Itr 1.0 80.0 First alarm level in % of heat content trip
value
Alarm2 50.0 - 99.0 %Itr 1.0 90.0 Second alarm level in % of heat content
trip value
ResLo 10.0 - 95.0 %Itr 1.0 60.0 Lockout reset level in % of heat content
trip value
ThetaInit 0.0 - 95.0 % 1.0 50.0 Initial Heat content, in % of heat content
trip value
Warning 1.0 - 500.0 Min 0.1 30.0 Time setting, below which warning would
be set (in min)
tPulse 0.01 - 0.30 s 0.01 0.10 Length of the pulse for trip signal (in
sec).

Table 337: TRPTTR Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

598 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

9.8.6 Monitored data

PID-4148-MONITOREDDATA v3

Table 338: TRPTTR Monitored data

Name Type Values (Range) Unit Description

HEATCONT REAL - % Percentage of the heat content of the
transformer
I-MEASUR REAL - % Current measured by the function in % of
the rated current
TTRIP INTEGER - - Estimated time to trip (in min)
TRESLO INTEGER - - Estimated time to reset of the function (in
min)
TTRIPCAL INTEGER 0=Not Active - Calculated time status to trip: not active/
1=Long Time long time/active
2=Active
TRESCAL INTEGER 0=Not Active - Calculated time status to reset: not
1=Long Time active/long time/active
2=Active

9.8.7 Operation principle M13249-3 v8

The sampled analog phase currents are pre-processed and for each phase current the true RMS
value of each phase current is derived. These phase current values are fed to the protection function.

From the largest of the three phase currents a relative final temperature (heat content) is calculated
according to the expression:

2
æ I ö
Q final =ç ÷÷
ç I ref
è ø
EQUATION1171 V1 EN-US (Equation 163)

where:
I is the largest phase current
Iref is a given reference current

If this calculated relative temperature is larger than the relative temperature level corresponding to
the set operate (trip) current, then the start output signal START will be activated.

The actual temperature at the actual execution cycle is calculated as:

Transformer protection RET670 599

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

If Q final > Q n
EQUATION1172 V1 EN-US (Equation 164)

æ Dt
ö
Qn = Qn -1 + ( Q final - Q n-1 ) × ç1 - e t ÷
-

è ø
EQUATION1173 V1 EN-US (Equation 165)

If Q final < Qn
EQUATION1174 V1 EN-US (Equation 166)

Dt
Qn = Q final - ( Q final - Qn -1 ) × e
-
t

EQUATION1175 V1 EN-US (Equation 167)

where:
Qn is the calculated present temperature

Q n-1 is the calculated temperature at the previous time step

Q final is the calculated final (steady state) temperature with the actual current

Dt is the time step between calculation of the actual and final temperature
t is the thermal time constant of the protected circuit given in minutes. There are different time
constants depending on the cooling used. Please refer to manufacturer's manuals for details

The calculated transformer relative temperature can be monitored and it is exported from the function
as a real figure HEATCONT.

When the transformer temperature reaches any of the set alarm levels Alarm1 or Alarm2 the
corresponding output signal ALARM1 or ALARM2 is activated. When the temperature of the object
reaches the set trip level which corresponds to continuous current equal to ITrip the output signal
TRIP is activated.

There is also a calculation of the time to operation with the present current. This calculation is only
performed if the final temperature is calculated to be above the operation temperature:

æQ - Qoperate ö
toperate = -t × ln ç final
ç Q final - Q n ÷÷
è ø
EQUATION1176 V1 EN-US (Equation 168)

The calculated time to trip can be monitored and it is exported from the function as an integer output
TTRIP.

After a trip there can be a lockout to inhibit reconnecting the tripped circuit. The output lockout signal
LOCKOUT is activated when the temperature of the object is above the set lockout release
temperature setting ResLo.

The time to lockout release is calculated by the following cooling time calculation.

600 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

æQ - Qlockout _ release ö
tlockout _ release = -t × ln ç final ÷÷
ç Q final - Q n
è ø
EQUATION1177 V1 EN-US (Equation 169)

In the above equation, the final temperature is calculated according to equation 163. The calculated
component temperature can be monitored as it is exported from the function as a real figure,
TRESLO.

When the current is so high that it has given a start signal START, the estimated time to trip is
continuously calculated and given as analogue output TTRIP. If this calculated time get less than the
setting time Warning, set in minutes, the output WARNING is activated.

In case of trip a pulse with a set duration tPulse is activated.

Transformer protection RET670 601

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Final Temp START

> TripTemp

RESET HEATCONT
Calculation
of heat
content

I3P
Calculation
ENMULT of final
temperature
ALARM1
Actual Temp >
Alarm1,Alarm2
ALARM2
Temp

Current base used

TRIP
Actual Temp
> TripTemp

S LOCKOUT
Management of R
COOLING setting
parameters: Tau,
Actual Temp
IBase Tau used
< Recl
Temp

TTRIP
Calculation
of time to
WARNING
trip

Calculation
of time to TRESCAL
reset of
lockout

IEC05000833-2-en.vsd

IEC05000833 V2 EN-US

Figure 342: Functional overview of TRPTTR

602 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

9.8.8 Technical data IP13072-1 v1

M13266-2 v9

Table 339: TRPTTR technical data

Function Range or value Accuracy

Base current 1 and 2 (30–250)% of IBase ±1.0% of Ir

Operate time: Time constant τ = (0.10–500.00) ±5.0% or ±200 ms whichever is greater

minutes
∑ I 2 , I p2 ⌡
t < σ √ ln  2 
 I , ITrip 2 
 
EQUATION1356 V3 EN-US (Equation 170)

I = actual measured current

Ip = load current before overload
occurs
ITrip = steady state operate
current level in % of IBasex
Alarm level 1 and 2 (50–99)% of heat content ±2.0% of heat content trip
operate value
Operate current (50–250)% of IBase ±1.0% of Ir

Reset level temperature (10–95)% of heat content trip ±2.0% of heat content trip

9.9 Breaker failure protection CCRBRF IP14514-1 v6

9.9.1 Function revision history GUID-3A043295-3AE3-437E-BBE9-D7FD6F349892 v2

Document Product History

revision revision
A 2.2.1 I>BlkCBPos setting functionality correction.
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 Setting StartMode is added to choose how retrip and backup trip timers are run. The
choices are; to run the timers by external start signal which is latched, to follow the
external start signal only or to follow the external start signal and the selected
FunctionMode.
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 -
M 2.2.5 -

Transformer protection RET670 603

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.9.2 Identification
M14878-1 v5

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Breaker failure protection, 3-phase CCRBRF 50BF
activation and output
3I>BF

SYMBOL-U V1 EN-US

9.9.3 Functionality M11550-6 v19

Breaker failure protection (CCRBRF) ensures a fast backup tripping of the surrounding breakers in
case the own breaker fails to open. CCRBRF measurement criterion can be current based, CB
position based or an adaptive combination of these two conditions.

A current based check with extremely short reset time is used as check criterion to achieve high
security against inadvertent operation.

CB position check criteria can be used where the fault current through the breaker is small.

CCRBRF provides three different options to select how t1 and t2 timers are run:

1. By external start signals which is internally latched

2. Follow external start signal only
3. Follow external start signal and the selected FunctionMode

CCRBRF can be single- or three- phase initiated to allow its use with single phase tripping
applications. For the three-phase application of the CCRBRF the current criteria can be set to
operate only if “2 elements operates out of three phases and neutral” for example; two phases or one
phase plus the residual current start. This gives a higher security to the backup trip command.

The CCRBRF function can be programmed to give a single- or three- phase retrip to its own breaker
to avoid unnecessary tripping of surrounding breakers at an incorrect initiation due to mistakes during
testing.

9.9.4 Function block M11944-3 v9

CCRBRF
I3P* TRBU
BLOCK TRBU2
START TRRET
STL1 TRRETL1
STL2 TRRETL2
STL3 TRRETL3
CBCLDL1 CBALARM
CBCLDL2 STALARM
CBCLDL3
CBFLT

IEC18001006-1-en.vsd
IEC18001006 V1 EN-US

Figure 343: CCRBRF function block

604 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

9.9.5 Signals
PID-7233-INPUTSIGNALS v1

Table 340: CCRBRF Input signals

Name Type Default Description

I3P GROUP - Three phase group signal for current inputs
SIGNAL
BLOCK BOOLEAN 0 Block of function
START BOOLEAN 0 Three phase start for breaker failure protection function
STL1 BOOLEAN 0 Start signal for phase L1
STL2 BOOLEAN 0 Start signal for phase L2
STL3 BOOLEAN 0 Start signal for phase L3
CBCLDL1 BOOLEAN 0 Circuit breaker closed in phase L1
CBCLDL2 BOOLEAN 0 Circuit breaker closed in phase L2
CBCLDL3 BOOLEAN 0 Circuit breaker closed in phase L3
CBFLT BOOLEAN 0 CB faulty, unable to trip. Backup trip instantaneously

PID-7233-OUTPUTSIGNALS v1

Table 341: CCRBRF Output signals

Name Type Description

TRBU BOOLEAN Backup trip by breaker failure protection function
TRBU2 BOOLEAN Second backup trip by breaker failure protection function
TRRET BOOLEAN Retrip by breaker failure protection function
TRRETL1 BOOLEAN Retrip by breaker failure protection function phase L1
TRRETL2 BOOLEAN Retrip by breaker failure protection function phase L2
TRRETL3 BOOLEAN Retrip by breaker failure protection function phase L3
CBALARM BOOLEAN Alarm for faulty circuit breaker
STALARM BOOLEAN External start signal timed out, when by setting StartMode the
external start signal is followed (i.e. when is NOT Latched)

9.9.6 Settings
PID-7233-SETTINGS v1

Table 342: CCRBRF Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Transformer protection RET670 605

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Table 343: CCRBRF Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
FunctionMode Current - - Current Selection of measurement principle:
CB Pos Current / CB Position / Current or CB
Current or CB Pos Position
StartMode LatchedStart - - LatchedStart Select how t1 and t2 timers are run: By
FollowStart external start signals which is internally
FollowStart&Mode latched / Follow the external start signal
only / Follow external start signal and
selected FunctionMode
tStartTimeout 0.5 - 600.0 s 0.1 1.0 Time delay after which the external start
signal will be ignored, when by setting
StartMode the external start signal is
followed (i.e. when is NOT Latched)
BuTripMode 2 out of 4 - - 1 out of 3 Select backup trip mode when t2 timer
1 out of 3 expires and current measurement is
1 out of 4 used: 2 elements operate out of three
phases and neutral / 1 element operates
out of three phases / 1 element operates
out of three phases and neutral
RetripMode Off - - Off Select retrip mode when t1 timer expires:
UseFunctionMode Off / use FunctionMode to check /
Always always without any check
IPh> 5 - 200 %IB 1 10 Operate phase current level in % of
IBase
IN> 2 - 200 %IB 1 10 Operate residual current level in % of
IBase
t1 0.000 - 60.000 s 0.001 0.000 Time delay of retrip
t2 0.000 - 60.000 s 0.001 0.150 Time delay of backup trip
t2MPh 0.000 - 60.000 s 0.001 0.150 Time delay of backup trip at multi-phase
start. It can be used to speed up backup
trip command for multi-phase faults on
OHLs
tPulse 0.010 - 60.000 s 0.001 0.200 Minimum trip pulse duration

Table 344: CCRBRF Group settings (advanced)

Name Values (Range) Unit Step Default Description

I>BlkCBPos 5 - 200 %IB 1 20 I> in % of IBase to block operation based
on CB Position when
FunctionMode=Current or CB Pos
t3 0.000 - 60.000 s 0.001 0.030 Additional time delay which is added to
t2. It can be used as a second backup
trip
tCBAlarm 0.000 - 60.000 s 0.001 5.000 Time delay for alarm when faulty circuit
breaker indicated

606 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

9.9.7 Monitored data

PID-7233-MONITOREDDATA v1

Table 345: CCRBRF Monitored data

Name Type Values (Range) Unit Description

IL1 REAL - A Measured current in phase L1
IL2 REAL - A Measured current in phase L2
IL3 REAL - A Measured current in phase L3
IN REAL - A Measured residual current

9.9.8 Operation principle M16914-3 v12

Breaker failure protection CCRBRF is initiated from the protection trip command, either from
protection functions within the IED or from external protection devices.

To this function the three-phase current input and/or change to: the breaker normally open auxiliary
contact (i.e. "52a" or "closed") shall be connected. On OHL feeders where single pole auto-reclosing
is used, auxiliary contact from each CB pole shall be connected separately

The input START signal (i.e. initiate signal) can be phase selective or common (for all three phases).
Phase selective start signals enable single pole retrip functionality. This means that a second attempt
to open the same breaker can be done phase-selective. The retrip attempt is made after a set time
delay t1. For transmission lines, single pole trip and auto-reclosing is often used. The retrip function
can be phase selective if it is initiated from the phase selective line protection.

The retrip function can be done with or without FunctionMode check. With this check, the retrip is
only performed if the circuit breaker is still seen as closed when t1 timer has elapsed.

The START signal will also start the backup trip timer. The function detects the successful breaker
opening, either by detection of low current through RMS evaluation and a special adapted current
algorithm or by monitoring the circuit breaker status using normally open auxiliary contact from the
breaker. The special algorithm enables a very fast detection of successful breaker opening, which is,
fast resetting of the current measurement. If the function has not detected breaker opening before
the backup timer has run-out its time a backup trip is initiated.

Further the following possibilities are available:

• Three phase (i.e. common) start/initiation via input START or individual start/initiation per phase
by using phase segregated inputs STLx.
• The minimum length of the retrip pulse, the backup trip pulse and the second backup trip pulse
are settable. This pulse duration is defined by a parameter setting tPulse. The retrip pulse, the
backup trip pulse and the second backup trip pulse will however sustain as long as there is an
indication of closed breaker.
• If the current detection is used it is possible to use three different options: 1 out of 3 where it is
sufficient to detect failure to open (high current) in one pole, 1 out of 4 where it is sufficient to
detect failure to open (high current) in one pole or high residual current and 2 out of 4 where at
least two currents (phase current and/or residual current) shall be high for breaker failure
detection.
• The current detection level for the residual current can be set different from the setting of phase
current detection.
• It is possible to have different backup time delays for single-phase faults and for multi-phase
faults.
• It is possible to have instantaneous backup trip function if the circuit breaker is incapable to clear
faults, for example, at low gas pressure. This will happen when input signal CBFLT has logical
value one and timer tCBAlarm has expired. This situation will be indicated via output signal
CBALARM.

Transformer protection RET670 607

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

The selection of measurement criterion is done with setting parameter FunctionMode, to determine if
the breaker has opened or not:

• Option 1 - Current: Compares the measured phase current magnitude to setting IPh> (operate
phase current level in % of IBase), and the measured residual current magnitude to setting IN>
(Operate residual current level in % of IBase). Criterion is active (i.e. breaker did not open yet) if
the measured current magnitudes are higher than the set values.

• Option 2 - CB Pos: This criterion is active (i.e. breaker did not open yet in phase Lx) if the binary
input CBCLDLx has logical value one. Thus function simply follows the status of CB pole
normally open auxiliary contact (i.e. "52a" or "closed") which shall be connected to this input.
If TRBU has been given and CBCLDLx still has value one, TRBU and TRRET will internally be
reset intentionally after approximately 10 seconds. Another way of resetting TRBU and TRRET
is either to shortly activate BLOCK input or setting CCRBRF to blocked when the IED is in
TestMode.
• Option 3 - Current or CB Pos: It uses a combination of Current or CB Pos criteria. Note that
Current criterion will be then always used, while the CB Pos criterion will be only enabled and
used if current is smaller than set value I>BlkCBPos at the moment when external START signal
has been received. It is recommended to set value for I>BlkCBPos higher than the set value for
IPh>.
If TRBU has been given and CBCLDLx still has value one and if the CB Pos criterion is
used,TRBU and TRRET will internally be reset intentionally after approximately 10 seconds.
Another way of resetting TRBU and TRRET is either to shortly activate BLOCK input or setting
CCRBRF to blocked when the IED is in TestMode.

By the setting StartMode it is possible to select how t1 and t2 timers are run and consequently how
output commands are given from the function:

• Option 1 - LatchedStart: “By external start signals which is internally latched”.

When function is once started by external START signal, the timers t1 and t2 will always elapse
and then measurement criterion defined by parameter FunctionMode will be always checked in
order to verify if the appropriate command shall be given out from the function. Timers cannot be
stopped by removing the external START signal. Function can be started again only when all of
the following three timers t1, t2 and fixed timer of 150 ms in function internal design has expired
and the measurement criterion defined by parameter FunctionMode has been deactivated, see
Figure 344.

• Option 2 - FollowStart: “Follow the external start signal only”.

The timers t1 and t2 will run while external START signal is present. If they elapse then
measurement criterion defined by parameter FunctionMode will be checked in order to verify if
the appropriate command shall be given out from the function. Timers can be always stopped by
resetting the external START signal, see Figure 345.

• Option 3- FollowStart&Mode: “Follow external start signal and selected FunctionMode”.

The timers t1 and t2 will run while external START signal is present and in the same time the
measurement criterion defined by parameter FunctionMode is active. If they elapse then the
appropriate command will be given out from the function. Timers can be stopped by resetting the
external START signal or if the measurement criterion de-activates, see Figure 346.

When one of the two “follow modes” is used, there is a settable timer tStartTimeout which will block
the external START input signal when it times-out. This will automatically also reset the t1 and t2
timers and consequently prevent any backup trip command. At the same time the STALARM output
from the function will have logical value one. To reset this signal external START signal shall be
removed. This is done in order to prevent unwanted operation of the breaker failure function for
cases where a permanent START signal is given by mistake (e.g. due to a fault in the station battery
system). Note that any backup trip command will inhibit running of tStartTimeout timer.

The BLOCK signal overrides any StartMode condition and resets START signal, running of t1 and t2
timers and all function outputs.

608 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

30ms t1 30ms
START OR TRRET
S Q t AND

t2 30ms
OR TRBU
t AND

Current Check
CB Position Check OR

150ms
AND
t
NOT

IEC18001002-1-en.vsdx

IEC18001002 V1 EN-US

Figure 344: Simplified overall logic for LatchedStart

t1
START OR TRRET
t AND

Current Check
CB Position Check OR

t2
TRBU
t AND
OR

IEC18001003-1-en.vsdx
IEC18001003 V1 EN-US

Figure 345: Simplified overall logic for FollowStart

START t1 TRRET
AND t

Current Check
CB Position Check OR t2 TRBU
t

IEC18001004-1-en.vsdx
IEC18001004 V1 EN-US

Figure 346: Simplified overall logic for FollowStart&Mode

The BuTripMode setting defines how many measurement elements must operate, when current
criterion is used, to determine if the CB is opened or not:

• 2 elements operate out of three phases and neutral

• 1 element operates out of three phases
• 1 element operates out of three phases and neutral

Note that it is possible to set several timers for the backup trip as described below:

Transformer protection RET670 609

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

1. Timer t2 is used when function is started in one phase only (i.e. for single-phase to ground fault
on an OHL (Over Head Lines) when single-pole auto-reclosing is used).
2. Timer t2MPh is used when function is started in at least two phases. This will allow to have
shorter backup trip times for a multi-phase fault on an OHL Note that for a protected object
which are always tripped three-phase (e.g. transformers, generators, reactors, cables, etc.) this
timer shall always be set to the same value as t2 timer.
3. Timer t3 can be used to give a second backup trip command. It can be used in stations having
small DC battery which is not capable to trip all surrounding breakers at once. Note that t3 timer
will only start when t2 timer expires.

The RetripMode defines how retrip feature will behave:

• Off: The retrip command to the own circuit breaker is permanently disabled.
• UseFunctionMode: Retrip command to the own circuit breaker is given only if measurement
criterion defined by setting parameter FunctionMode is still active when set timer t1 expires (e.g.
if FunctionMode=Current and current magnitude is higher than set value IPh> when t1 expires,
the retrip command will be issued).
• Always: Retrip command to the own circuit breaker is given always when set timer t1 expires
without any further checks.

The simplified logic for the function is given in the following figures.

StartMode

LatchedStart

FollowStart
1 FollowStart&Mode OR

START 30ms
int startL1
STL1 OR AND S Q
BLOCK
NOT

int reset
OR R
NOT

TRBU
NOT int startAlarmL1

tStartTimeout
AND t NOT
AND AND int startAlarmL2 STALARM
From other OR
phases int startAlarmL3

IEC18001005-1-en.vsdx

IEC18001005 V1 EN-US

Figure 347: Start logic for all three Function Modes of operation

IL1
a
a>b NOT
IPh> b

FunctionMode
Current
CB Pos OR AND int reset
OR
1
Current or CB Pos 150 ms
int startL1
t
OR AND
t1
t
t2
t OR
t2MPh
t

AND

CBCLDL1
NOT

IEC18001007-1-en.vsdx

IEC18001007 V1 EN-US

Figure 348: Reset logic in latched mode

610 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

StartMode
LatchedStart
FollowStart
1 FollowStart&Mode OR AND

int retrip
currPh1Check
CB Position Check OR
AND t1 30ms
OR AND
int startL1 t OR

t1
t

BLOCK

RetripMode
Off tPulse
TRRETL1
UseFunctionMode AND OR AND
1
Always

TRRETL2 TRRET
TRRETL3
OR

tPulse
From other
AND phases

IEC18001008-2-en.vsdx

IEC18001008 V2 EN-US

Figure 349: Simplified retrip logic

StartMode
LatchedStart

1 FollowStart
FollowStart&Mode OR AND

currCheck
CB Position Check OR
backupTripL1
t2
AND t 30ms
OR AND
OR OR
int startL1

BLOCK

t2MPh tPulse TRBU

int startL2 From backupTripL2 OR AND
2 of 3 OR
int startL3 t other backupTripL3
phases

t3
t TRBU2
OR
AND
tPulse

CBFLT tCBAlarm CBALARM

t
IEC18001009-2-en.vsdx

IEC18001009 V2 EN-US

Figure 350: Simplified backup trip logic

When the function Start mode is set to LatchedStart and the function mode is set CB Pos, Re-trip,
and Backup trip will internally operate and latch. To reset these two signals the breaker position has
to indicate that the CB is open.

To avoid continuous lockout of Re-trip and Back up trip signals, the signals are rested internally
under the following conditions:

1. When the function blocking input is activated breaker position input (CBCLDLxx) will internally
be forced to zero in all phases (that is simulating that CB is open), which will reset Re-
trip(TRRET) and back up trip (TRBU) output signals.
2. If TRBU is active for 10 seconds, then the activated breaker position input (CBCLDLxx) will
internally be forced to zero which will reset both RETRIP and TRBU.
3. When using FunctionMode=Current/CB pos, the same behavior is applicable only when the CB
pos part is active; that is, when the measured current is below the set value I>BlkCBPos.

Transformer protection RET670 611

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.9.9 Technical data IP10269-1 v1

M12353-1 v15

Table 346: CCRBRF technical data

Function Range or value Accuracy

Operate phase current (5-200)% of lBase ±1.0% of Ir at I £ Ir
±1.0% of I at I > Ir

Reset ratio, phase current > 95% -

Operate residual current (2-200)% of lBase ±1.0% of Ir at I £ Ir
±1.0% of I at I > Ir

Reset ratio, residual current > 95% -

Phase current level for blocking of contact (5-200)% of lBase ±1.0% of Ir at I £ Ir
function ±1.0% of I at I > Ir

Reset ratio > 95% -

Operate time for current detection 10 ms typically -
Reset time for current detection 10 ms maximum * -
Time delay for retrip at 0 to 2 x Iset (0.000-60.000) s ±0.2% or ±15 ms whichever is
greater
Time delay for backup trip at 0 to 2 x Iset (0.000-60.000) s ±0.2% or ±15 ms whichever is
greater
Time delay for backup trip at multi-phase start at (0.000-60.000) s ±0.2% or ±20 ms whichever is
0 to 2 x Iset greater

Additional time delay for a second backup trip at (0.000-60.000) s ±0.2% or ±20 ms whichever is
0 to 2 x Iset greater

Time delay for alarm for faulty circuit breaker (0.000-60.000) s ±0.2% or ±15 ms whichever is
greater
Minimum trip pulse duration (0.010-60.000) s ±0.2% or ±5 ms whichever is greater
* Valid for product version 2.2.3 or later

9.10 Stub protection STBPTOC IP14515-1 v3

9.10.1 Function revision history GUID-D32C2C38-452F-45B0-85C1-6C9542089357 v1

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
Table continues on next page

612 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Document Product History

revision revision
L 2.2.4 -
M 2.2.4 -
N 2.2.5 -

9.10.2 Identification
M17108-1 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Stub protection STBPTOC 50STB

3I>STUB

SYMBOL-T V1 EN-US

9.10.3 Functionality M12902-3 v11

When a power line is taken out of service for maintenance and the line disconnector is opened in
multi-breaker arrangements the voltage transformers will mostly be outside on the disconnected part.
The primary line distance protection will thus not be able to operate and must be blocked.

The stub protection (STBPTOC) covers the zone between the current transformers and the open
disconnector. The three-phase instantaneous overcurrent function is released from a normally
closed, NC (b) auxiliary contact on the line disconnector.

9.10.4 Function block M12524-3 v5

STBPTOC
I3P* TRIP
BLOCK START
BLKTR
RELEASE

IEC05000678-2-en.vsd
IEC05000678 V2 EN-US

Figure 351: STBPTOC function block

9.10.5 Signals
PID-7754-INPUTSIGNALS v1

Table 347: STBPTOC Input signals

Name Type Default Description

I3P GROUP - Three phase currents
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Block of trip
RELEASE BOOLEAN 0 Release of stub protection

PID-7754-OUTPUTSIGNALS v1

Table 348: STBPTOC Output signals

Name Type Description

TRIP BOOLEAN General trip
START BOOLEAN General start

Transformer protection RET670 613

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.10.6 Settings
PID-7754-SETTINGS v1

Table 349: STBPTOC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 350: STBPTOC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
ReleaseMode Release - - Release Release of stub protection
Continuous
I> 5 - 2500 %IB 1 200 Operate current level in % of IBase
tDelay 0.000 - 60.000 s 0.001 0.000 Time delay

9.10.7 Monitored data

PID-7754-MONITOREDDATA v1

Table 351: STBPTOC Monitored data

Name Type Values (Range) Unit Description

IL1 REAL - A Current in phase L1
IL2 REAL - A Current in phase L2
IL3 REAL - A Current in phase L3

9.10.8 Operation principle M12905-3 v6

The sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. From
the fundamental frequency components of each phase current the RMS value of each phase current
is derived. These phase current values are fed to a comparator in the stub protection function
STBPTOC. In a comparator the RMS values are compared to the set operating current value of the
function I>.

If a phase current is larger than the set operating current the signal from the comparator for this
phase is activated. This signal will, in combination with the release signal from either line
disconnector (RELEASE input) and ReleaseMode is set to Release or ReleaseMode is set to
Continuous activates START signal and timer tDelay. The output signal TRIP activates, if the fault
current remains during the set timer tDelay.

The function can be blocked by activation of the BLOCK input. Also, activation of BLKTR resets TRIP
output.

614 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

BLOCK

I3P* IL1
a
IL2 a>b
IL3 b
AND
START
1

a
a>b tDelay
b TRIP
AND t AND

a
a>b
I> b
AND
RELEASE
AND
ReleaseMode = Release 1

ReleaseMode = Continuous

BLKTR

IEC05000731 V2 EN-US

Figure 352: Simplified logic diagram for Stub protection

9.10.9 Technical data

M12350-1 v13

Table 352: STBPTOC technical data

Function Range or value Accuracy

Operating current (5-2500)% of IBase ± 1.0% of Ir at I ≤ Ir
± 1.0% of I at I > Ir

Reset ratio >95% at (50- 2500)% of IBase

Independenttime delay at 0 to 2 x Iset (0.000-60.000) s ±0.2% or ±30 ms whichever is
greater
Operate time, start at 0 to 2 x Iset Min.= 10 ms
Max.= 25 ms
Reset time, start at 2 x Iset to 0 Min.= 10 ms
Max.= 25 ms
Operate time, start at 0 to 5 x Iset Min.= 5 ms
Max.= 20 ms
Reset time, start at 5 x Iset to 0 Min.= 15 ms
Max.= 30 ms
Critical impulse time 10 ms typically at 0 to 2 x Iset

Impulse margin time 15 ms typically

9.11 Overcurrent protection with binary release BRPTOC GUID-0C91A3D4-EDB4-4CE8-85AF-44901F81B702 v1

9.11.1 Function revision history GUID-23898A65-D896-479E-9122-E8D9D6CC4FEB v1

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
Table continues on next page

Transformer protection RET670 615

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Document Product History

revision revision
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 -
M 2.2.4 -
N 2.2.5 New function release

9.11.2 Identification GUID-FB950979-9387-43A7-B1D7-D5D392EA6638 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Overcurrent protection with binary BRPTOC 3I> 50
release

9.11.3 Functionality GUID-17DA02BB-B0C0-4AE9-8441-DDA4082A776B v4

Overcurrent protection with binary release (BRPTOC) is a simple, non-directional three-phase

overcurrent protection function with definite time delay. A single step is available within the function.
The current pickup level and definite time delay can be set independently. It is possible to release the
function operation via a binary signal. If the binary signal is not connected, the function will
automatically operate in a continuous mode of operation. Several function instances are available.

From the measured three-phase currents, various types of measurement modes such as DFT, Peak,
and Peak-to-peak can be selected for the BRPTOC operation.

Peak and Peak-to-Peak measurement mode allow this function to be used as instantaneous over-
current protection as well. If required by application, short time delay can also be applied.

BRPTOC can be used for different line and transformer protection applications. If required, it can also
be used to supervise on-load tap-changer operation.

9.11.4 Function block GUID-391B0308-F1A5-494F-BA0F-804A3D8F3F0C v2

9.11.5 Signals
PID-7755-INPUTSIGNALS v1

Table 353: BRPTOC Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Block of trip
RELEASE BOOLEAN 1 Release of protection

616 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

PID-7755-OUTPUTSIGNALS v1

Table 354: BRPTOC Output signals

Name Type Description

TRIP BOOLEAN General trip
START BOOLEAN General start
STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3

9.11.6 Settings
PID-7755-SETTINGS v1

Table 355: BRPTOC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups
MeasType DFT - - DFT Selection between DFT, Peak and Peak-
Peak to-peak measurements
Peak to peak

Table 356: BRPTOC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
I> 5 - 2500 %IB 1 200 Operate current level in % of IBase
tDelay 0.000 - 60.000 s 0.001 0.025 Time delay

9.11.7 Monitored data

PID-7755-MONITOREDDATA v1

Table 357: BRPTOC Monitored data

Name Type Values (Range) Unit Description

IL1 REAL - A Current in phase L1
IL2 REAL - A Current in phase L2
IL3 REAL - A Current in phase L3

9.11.8 Operation principle GUID-615ABC71-399B-425A-822A-AEDE51EDD69E v3

Using a parameter setting MeasType within the general settings for the function BRPTOC, it is
possible to select the type of the measurements such as DFT, Peak, and Peak-to-peak used for
overcurrent operation.

If the DFT option is selected, only the RMS value of the fundamental frequency component of each
phase current is derived. The influence of the DC current component and higher harmonic current
components are completely suppressed.

If the Peak-to-peak option is selected, the influence of CT saturation is almost suppressed.

The peak-to-peak measurement efficiently suppers the DC current component from the measured
phase currents. On the contrary, when Peak measurement mode is selected, it allows the DC current
component into the measurement signal for the BRPTOC function.

Transformer protection RET670 617

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

If the Peak/Peak-to-peak option is selected, RMS equivalent phase currents are derived and
therefore, the set value of I> is remained intact irrespective of any type of the measurement mode.

These phase current values are fed to a comparator in the overcurrent protection with binary release
function BRPTOC. In a comparator, the RMS values are compared to the set operating current value
of the function I>.

If a phase current is larger than the set operating current, comparator output signal for this phase will
be high. This signal will, in combination with the release signal (RELEASE input), activate the timer
for the TRIP signal. If the current magnitude remains high during the timer tdelay, the TRIP output
signal is activated. The function can be blocked by activation of the BLOCK input.

I3P* IL1
a
IL2 a>b
IL3 b STL1
AND

a
a>b
b STL2
AND

a
a>b
I> b STL3
AND

RELEASE START
1
BLOCK

tDelay
TRIP
t AND
BLKTR

GUID-CAC3BE85-59F2-4264-A060-CA53DF9CA3E8 V1 EN-US

Figure 353: Simplified logic diagram for overcurrent protection with binary release

9.11.9 Technical data

GUID-754FFD93-04C7-4129-B658-32F17F272211 v4

Table 358: BRPTOC technical data

Function Range or value Accuracy

Operating current (5-2500)% of IBase DFT:
± 1.0% of Ir at I ≤ Ir
± 1.0% of I at I > Ir

Peak and Peak to peak:

± 2.5% of Ir at I ≤ Ir
± 2.5% of I at I > Ir

Reset ratio > 95% at (25-2500)% of IBase -

Independent time delay at 0 to 2 x (0.000-60.000) s DFT:
Iset ±0.2% or ±30 ms whichever is
greater
Peak to peak:
±0.2% or ±25 ms whichever is
greater
Peak:
±0.2% or ±20 ms whichever is
greater
Table continues on next page

618 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Function Range or value Accuracy

Operate time, start at 0 to 1.2 x Iset DFT: -
Min.= 15 ms
Max. = 30 ms
Peak to peak:
Min.= 10 ms
Max. =25 ms
Peak:
Min.= 5 ms
Max. = 20 ms
Reset time, start at 1.2 x Iset to 0 < 60 ms -

Operate time, start at 0 to 2 x Iset DFT: -

Min.= 10 ms
Max. = 25 ms
Peak to peak:
Min.= 5 ms
Max. =20 ms
Peak:
Min.= 5 ms
Max. = 15 ms
Reset time, start at 2 x Iset to 0 < 60 ms -

Operate time, start at 0 to 5 x Iset DFT: -

Min.= 5 ms
Max. = 20 ms
Peak to peak:
Min.= 5 ms
Max. =15 ms
Peak:
Min.= 5 ms
Max. = 10 ms
Reset time, start at 5 x Iset to 0 < 60 ms -

Critical impulse time DFT: -

10 ms typically at 0 to 2 x Iset

Peak to peak:
5 ms typically at 0 to 2 x Iset

Peak:
1 ms typically at 0 to 2 x Iset

9.12 Pole discordance protection CCPDSC IP14516-1 v5

9.12.1 Identification
M14888-1 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Pole discordance protection CCPDSC 52PD

PD

SYMBOL-S V1 EN-US

Transformer protection RET670 619

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.12.2 Functionality M13269-3 v15

An open phase can cause negative and zero sequence currents which cause thermal stress on
rotating machines and can cause unwanted operation of zero sequence or negative sequence
current functions.

Normally the own breaker is tripped to correct such a situation. If the situation persists the
surrounding breakers should be tripped to clear the unsymmetrical load situation.

The Pole discordance protection function (CCPDSC) operates based on information from auxiliary
contacts of the circuit breaker for the three phases with additional criteria from unsymmetrical phase
currents when required.

9.12.3 Function block M17149-3 v7

CCPDSC
I3P* TRIP
BLOCK START
BLKDBYAR
CLOSECMD
OPENCMD
EXTPDIND
POLE1OPN
POLE1CL
POLE2OPN
POLE2CL
POLE3OPN
POLE3CL

IEC13000305-1-en.vsd
IEC13000305 V1 EN-US

Figure 354: CCPDSC function block

9.12.4 Signals
PID-3525-INPUTSIGNALS v8

Table 359: CCPDSC Input signals

Name Type Default Description

I3P GROUP - Three phase currents
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKDBYAR BOOLEAN 0 Block of function at CB single phase auto re-closing cycle
CLOSECMD BOOLEAN 0 Close order to CB
OPENCMD BOOLEAN 0 Open order to CB
EXTPDIND BOOLEAN 0 Pole discordance signal from CB logic
POLE1OPN BOOLEAN 1 Pole one opened indication from CB
POLE1CL BOOLEAN 0 Pole one closed indication from CB
POLE2OPN BOOLEAN 1 Pole two opened indication from CB
POLE2CL BOOLEAN 0 Pole two closed indication from CB
POLE3OPN BOOLEAN 1 Pole three opened indication from CB
POLE3CL BOOLEAN 0 Pole three closed indication from CB

620 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

PID-3525-OUTPUTSIGNALS v8

Table 360: CCPDSC Output signals

Name Type Description

TRIP BOOLEAN Trip signal to CB
START BOOLEAN Trip condition TRUE, waiting for time delay

9.12.5 Settings
PID-3525-SETTINGS v8

Table 361: CCPDSC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
tTrip 0.000 - 60.000 s 0.001 0.300 Time delay between trip condition and
trip signal
ContSel Off - - Off Contact function selection
PD signal from CB
Pole pos aux cont.
CurrSel Off - - Off Current function selection
CB oper monitor
Continuous
monitor
CurrUnsymLevel 0 - 100 % 1 80 Unsym magn of lowest phase current
compared to the highest.
CurrRelLevel 0 - 100 %IB 1 10 Current magnitude for release of the
function in % of IBase

Table 362: CCPDSC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

9.12.6 Monitored data

PID-3525-MONITOREDDATA v6

Table 363: CCPDSC Monitored data

Name Type Values (Range) Unit Description

IMin REAL - A Lowest phase current
IMax REAL - A Highest phase current

9.12.7 Operation principle

M13273-3 v6
The detection of pole discordance can be made in two different ways. If the contact based function is
used an external logic can be made by connecting the auxiliary contacts of the circuit breaker so that
a pole discordance is indicated, see figure 355.

Transformer protection RET670 621

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

circuit breaker

Pole discordance signal from circuit breaker

en05000287.vsd

IEC05000287 V2 EN-US

Figure 355: Pole discordance external detection logic

This binary signal is connected to a binary input of the IED. The appearance of this signal will start a
timer that will give a trip signal after the set time delay.

There is also a possibility to connect all phase selective auxiliary contacts (phase contact open and
phase contact closed) to binary inputs of the IED, see figure 356.

C.B.

poleOneClosed from C.B.

poleTwoClosed from C.B.

poleThreeClosed from C.B.

+
poleOneOpened from C.B.

poleTwoOpened from C.B.

poleThreeOpened from C.B.

en05000288.vsd
IEC05000288 V1 EN-US

Figure 356: Pole discordance signals for internal logic

In this case the logic is realized within the function. If the inputs are indicating pole discordance the
trip timer is started. This timer will give a trip signal after the set delay.

Pole discordance can also be detected by means of phase selective current measurement. The
sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. From the
fundamental frequency components of each phase current the RMS value of each phase current is
derived. The smallest and the largest phase current are derived. If the smallest phase current is
lower than the setting CurrUnsymLevel times the largest phase current the settable trip timer (tTrip) is
started. The tTrip timer gives a trip signal after the set delay. The TRIP signal is a pulse 150 ms long.
The current based pole discordance function can be set to be active either continuously or only
directly in connection to breaker open or close command.

The function also has a binary input that can be configured from the autoreclosing function, so that
the pole discordance function can be blocked during sequences with a single pole open if single pole
autoreclosing is used.
M13946-3 v7
The simplified block diagram of the current and contact based Pole discordance protection function
CCPDSC is shown in figure 357.

622 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

BLOCK
OR
BLKDBYAR

PolPosAuxCont

AND
POLE1OPN
POLE1CL
POLE2OPN
Discordance
POLE2CL
detection
POLE3OPN
POLE3CL t 150 ms
t TRIP
AND
OR

PD Signal from CB
AND
EXTPDIND

CLOSECMD t+200 ms
OR
OPENCMD

AND

Unsymmetry current
detection

en05000747.vsd
IEC05000747 V1 EN-US

Figure 357: Simplified block diagram of pole discordance function CCPDSC - contact and
current based
CCPDSC is blocked if:

• The IED is in TEST mode and CCPDSC has been blocked from the local HMI
• The input signal BLOCK is high
• The input signal BLKDBYAR is high

The BLOCK signal is a general purpose blocking signal of the pole discordance protection. It can be
connected to a binary input in the IED in order to receive a block command from external devices or
can be software connected to other internal functions in the IED itself in order to receive a block
command from internal functions. Through OR gate it can be connected to both binary inputs and
internal function outputs.

The BLKDBYAR signal blocks the pole discordance operation when a single phase autoreclosing
cycle is in progress. It can be connected to the output signal 1PT1 on SMBRRECfunction block. If the
autoreclosing function is an external device, then BLKDBYAR has to be connected to a binary input
in the IED and this binary input is connected to a signalization “1phase autoreclosing in progress”
from the external autoreclosing device.

If the pole discordance protection is enabled, then two different criteria can generate a trip signal
TRIP:

• Pole discordance signaling from the circuit breaker.

• Unsymmetrical current detection.

9.12.7.1 Pole discordance signaling from circuit breaker M13946-18 v4

If one or two poles of the circuit breaker have failed to open or to close the pole discordance status,
then the function input EXTPDIND is activated from the pole discordance signal derived from the
circuit breaker auxiliary contacts (one NO contact for each phase connected in parallel, and in series
with one NC contact for each phase connected in parallel) and, after a settable time interval tTrip
(0-60 s), a 150 ms trip pulse command TRIP is generated by the Polediscordance function.

Transformer protection RET670 623

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.12.7.2 Unsymmetrical current detection M13946-21 v4

Unsymmetrical current indicated if:

• any phase current is lower than CurrUnsymLevel of the highest current in the three phases.
• the highest phase current is greater than CurrRelLevel of IBase.

If these conditions are true, an unsymmetrical condition is detected and the internal signal INPS is
turned high. This detection is enabled to generate a trip after a set time delay tTrip if the detection
occurs in the next 200 ms after the circuit breaker has received a command to open trip or close and
if the unbalance persists. The 200 ms limitation is for avoiding unwanted operation during
unsymmetrical load conditions.

The pole discordance protection is informed that a trip or close command has been given to the
circuit breaker through the inputs CLOSECMD (for closing command information) and OPENCMD
(for opening command information). These inputs can be connected to terminal binary inputs if the
information are generated from the field (that is from auxiliary contacts of the close and open push
buttons) or may be software connected to the outputs of other integrated functions (that is close
command from a control function or a general trip from integrated protections).

9.12.8 Technical data

M13279-1 v10

Table 364: CCPDSC technical data

Function Range or value Accuracy

Operate current (0–100)% of IBase ±1.0% of Ir

Independent time delay between trip (0.000-60.000) s ±0.2% or ± 30 ms whichever is

condition and trip signal greater

9.13 Directional underpower protection GUPPDUP SEMOD156693-1 v4

9.13.1 Identification
SEMOD158941-2 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Directional underpower protection GUPPDUP 37
P<
2
SYMBOL-LL V2 EN-US

9.13.2 Functionality SEMOD155787-4 v6

The task of a generator in a power plant is to convert mechanical energy available as a torque on a
rotating shaft to electric energy.

Sometimes, the mechanical power from a prime mover may decrease so much that it does not cover
bearing losses and ventilation losses. Then, the synchronous generator becomes a synchronous
motor and starts to take electric power from the rest of the power system. This operating state, where
individual synchronous machines operate as motors, implies no risk for the machine itself. If the
generator under consideration is very large and if it consumes lots of electric power, it may be
desirable to disconnect it to ease the task for the rest of the power system.

624 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Often, the motoring condition may imply that the turbine is in a very dangerous state. The task of the
low forward power protection is to protect the turbine and not to protect the generator itself.

Figure 358 illustrates the low forward power and reverse power protection with underpower and
overpower functions respectively. The underpower IED gives a higher margin and should provide
better dependability. On the other hand, the risk for unwanted operation immediately after
synchronization may be higher. One should set the underpower IED to trip if the active power from
the generator is less than about 2%. One should set the overpower IED to trip if the power flow from
the network to the generator is higher than 1% depending on the type of turbine.

When IED with a metering class input CTs is used pickup can be set to more sensitive value
(e.g.0,5% or even to 0,2%).

Underpower IED Overpower IED

Operate
Q Q
Operate
Line Line

Margin Margin
P P

Operating point Operating point

without without
turbine torque turbine torque

IEC06000315-2-en.vsd
IEC06000315 V2 EN-US

Figure 358: Protection with underpower IED and overpower IED

9.13.3 Function block SEMOD172623-4 v4

GUPPDUP
I3P* TRIP
U3P* TRIP1
BLOCK TRIP2
BLOCK1 START
BLOCK2 START1
START2
P
PPERCENT
Q
QPERCENT

IEC07000027-2-en.vsd
IEC07000027 V2 EN-US

Figure 359: GUPPDUP function block

Transformer protection RET670 625

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.13.4 Signals
PID-3709-INPUTSIGNALS v6

Table 365: GUPPDUP Input signals

Name Type Default Description

I3P GROUP - Current group connection
SIGNAL
U3P GROUP - Voltage group connection
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLOCK1 BOOLEAN 0 Block of stage 1
BLOCK2 BOOLEAN 0 Block of stage 2

PID-3709-OUTPUTSIGNALS v6

Table 366: GUPPDUP Output signals

Name Type Description

TRIP BOOLEAN Common trip signal
TRIP1 BOOLEAN Trip of stage 1
TRIP2 BOOLEAN Trip of stage 2
START BOOLEAN Common start
START1 BOOLEAN Start of stage 1
START2 BOOLEAN Start of stage 2
P REAL Active Power in MW
PPERCENT REAL Active power in % of SBase
Q REAL Reactive power in MVAr
QPERCENT REAL Reactive power in % of SBase

9.13.5 Settings
PID-3709-SETTINGS v6

Table 367: GUPPDUP Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OpMode1 Off - - UnderPower Operation mode for stage 1 Off / On
UnderPower
Power1 0.0 - 500.0 %SB 0.1 1.0 Stage 1 underpower setting in Angle1
direction in % of SBase
Angle1 -180.0 - 180.0 Deg 0.1 0.0 Characteristic angle for max power
senistivity stage 1
TripDelay1 0.01 - 6000.00 s 0.01 1.00 Trip delay for stage 1
DropDelay1 0.01 - 6000.00 s 0.01 0.06 Drop-off delay for stage 1
OpMode2 Off - - UnderPower Operation mode for stage 2 Off / On
UnderPower
Power2 0.0 - 500.0 %SB 0.1 1.0 Power setting for stage 2 in % of SBase
Angle2 -180.0 - 180.0 Deg 0.1 0.0 Characteristic angle for max power
senistivity stage 2
TripDelay2 0.01 - 6000.00 s 0.01 1.00 Trip delay for stage 2
DropDelay2 0.01 - 6000.00 s 0.01 0.06 Drop-off delay for stage 2

626 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Table 368: GUPPDUP Group settings (advanced)

Name Values (Range) Unit Step Default Description

k 0.000 - 0.999 - 0.001 0.000 Low pass filter coefficient for power
measurement, P and Q
Hysteresis1 0.2 - 5.0 %SB 0.1 0.5 Absolute hysteresis of stage 1 in %
SBase
Hysteresis2 0.2 - 5.0 %SB 0.1 0.5 Absolute hysteresis of stage 2 in %
SBase
IAmpComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates
current error at 5% of Ir
IAmpComp30 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates
current error at 30% of Ir
IAmpComp100 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates
current error at 100% of Ir
UAmpComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates
voltage error at 5% of Ur
UAmpComp30 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates
voltage error at 30% of Ur
UAmpComp100 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates
voltage error at 100% of Ur
IAngComp5 -10.000 - 10.000 Deg 0.001 0.000 Corr of error betw current and voltage
angles at 5% of Ir
IAngComp30 -10.000 - 10.000 Deg 0.001 0.000 Corr of error betw current and voltage
angles at 30% of Ir
IAngComp100 -10.000 - 10.000 Deg 0.001 0.000 Corr of error betw current and voltage
angles at 100% of Ir

Table 369: GUPPDUP Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups
Mode L1, L2, L3 - - Pos Seq Selection of measured current and
Arone voltage
Pos Seq
L1L2
L2L3
L3L1
L1
L2
L3

9.13.6 Monitored data

PID-3709-MONITOREDDATA v5

Table 370: GUPPDUP Monitored data

Name Type Values (Range) Unit Description

P REAL - MW Active Power in MW
PPERCENT REAL - % Active power in % of SBase
Q REAL - MVAr Reactive power in MVAr
QPERCENT REAL - % Reactive power in % of SBase

Transformer protection RET670 627

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.13.7 Operation principle

SEMOD172136-4 v4
A simplified scheme showing the principle of the power protection function is shown in figure 360.
The function has two stages with individual settings.

Chosen current
phasors P

Complex Derivation of S(angle)

S(angle) < t TRIP1
power S(composant)
Chosen voltage Power1
calculation in Char angle
phasors Q
START1

S(angle) < t TRIP2

Power2
START2

P = POWRE

Q = POWIM

IEC09000018-2-en.vsd
IEC09000018 V2 EN-US

Figure 360: Simplified logic diagram of the power protection function

The function will use voltage and current phasors calculated in the pre-processing blocks. The
apparent complex power is calculated according to chosen formula as shown in table 371.

Table 371: Complex power calculation

Set value: Mode Formula used for complex power calculation

L1, L2, L3
S = U L1 × I L1* + U L 2 × I L 2* + U L 3 × I L 3*
EQUATION1697 V1 EN-US (Equation 171)
Arone
S = U L1L 2 × I L1* - U L 2 L 3 × I L 3*
EQUATION1698 V1 EN-US (Equation 172)
PosSeq
S = 3 × U PosSeq × I PosSeq*
EQUATION1699 V1 EN-US (Equation 173)
L1L2
S = U L1L 2 × ( I L1* - I L 2* )
EQUATION1700 V1 EN-US (Equation 174)
L2L3
S = U L 2 L 3 × ( I L 2* - I L 3* )
EQUATION1701 V1 EN-US (Equation 175)
L3L1
S = U L 3 L1 × ( I L 3* - I L1* )
EQUATION1702 V1 EN-US (Equation 176)
Table continues on next page

628 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Set value: Mode Formula used for complex power calculation

L1
S = 3 × U L1 × I L1*
EQUATION1703 V1 EN-US (Equation 177)
L2
S = 3 × U L 2 × I L 2*
EQUATION1704 V1 EN-US (Equation 178)
L3
S = 3 × U L 3 × I L 3*
EQUATION1705 V1 EN-US (Equation 179)

The active and reactive power is available from the function and can be used for monitoring and fault
recording.

The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this angle
is 0° the active power component P is calculated. If this angle is 90° the reactive power component Q
is calculated.

The calculated power component is compared to the power pick up setting Power1(2). For directional
underpower protection, a start signal START1(2) is activated if the calculated power component is
smaller than the pick up value. For directional overpower protection, a start signal START1(2) is
activated if the calculated power component is larger than the pick up value. After a set time delay
TripDelay1(2) a trip TRIP1(2) signal is activated if the start signal is still active. At activation of any of
the two stages a common signal START will be activated. At trip from any of the two stages also a
common signal TRIP will be activated.

To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis of the
stage1(2) is Hysteresis1(2) = abs (Power1(2) + drop-power1(2)). For generator low forward power
protection the power setting is very low, normally down to 0.02 p.u. of rated generator power. The
hysteresis should therefore be set to a smaller value. The drop-power value of stage1 can be
calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) + Hysteresis1(2)

For small power1 values the hysteresis1 may not be too big, because the drop-power1(2) would be
too small. In such cases, the hysteresis1 greater than (0.5 · Power1(2)) is corrected to the minimal
value.

If the measured power drops under the drop-power1(2) value, the function will reset after a set time
DropDelay1(2). The reset means that the start signal will drop out and that the timer of the stage will
reset.

9.13.7.1 Low pass filtering SEMOD172136-39 v4

In order to minimize the influence of the noise signal on the measurement it is possible to introduce a
recursive, low pass filtering of the measured values for S (P, Q). This will make slower measurement
response to the step changes in the measured quantity. Filtering is performed in according to the
following recursive formula:

Transformer protection RET670 629

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

S = k × SOld + (1 - k ) × SCalculated
EQUATION1959 V1 EN-US (Equation 180)

Where
S is a new measured value to be used for the protection function
Sold is the measured value given from the function in previous execution cycle

SCalculated is the new calculated value in the present execution cycle

k is settable parameter by the end user which influence the filter properties
TD

Default value for parameter k is 0.00. With this value the new calculated value is immediately given
out without any filtering (that is without any additional delay). When k is set to value bigger than 0,
the filtering is enabled. A typical value for k=0.92 in case of slow operating functions.

9.13.7.2 Calibration of analog inputs SEMOD172136-57 v3

Measured currents and voltages used in the Power function can be calibrated to get class 0.5
measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100% of
rated current and voltage. The compensation below 5% and above 100% is constant and linear in
between, see example in figure 361.

IEC05000652 V2 EN-US

Figure 361: Calibration curves

The first current and voltage phase in the group signals will be used as reference and the amplitude
and angle compensation will be used for related input signals.

Analog outputs (Monitored data) from the function can be used for service values or in the
disturbance report. The active power is provided as MW value: P, or in percent of base power:
PPERCENT. The reactive power is provided as Mvar value: Q, or in percent of base power:
QPERCENT.

630 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

9.13.8 Technical data SEMOD175153-1 v1

SEMOD175152-2 v11

Table 372: GUPPDUP technical data

Function Range or value Accuracy

Power level (0.0–500.0)% of SBase ±1.0% of Sr at S ≤ Sr
for Step 1 and Step 2 ±1.0% of S at S > Sr
where

S r = 1.732 × U r × I r

Characteristic angle (-180.0–180.0) degrees ±2.0 degrees

for Step 1 and Step 2
Independent time delay to operate for Step 1 (0.01-6000.00) s ±0.2% or ±40 ms whichever is
and Step 2 at 2 x Sr to 0.5 x Sr and k=0.000 greater

9.14 Directional overpower protection GOPPDOP SEMOD172360-1 v4

9.14.1 Identification
SEMOD176574-2 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Directional overpower protection GOPPDOP 32
P>
2
DOCUMENT172362-IMG158942
V2 EN-US

9.14.2 Functionality SEMOD172356-4 v5

The task of a generator in a power plant is to convert mechanical energy available as a torque on a
rotating shaft to electric energy.

Sometimes, the mechanical power from a prime mover may decrease so much that it does not cover
bearing losses and ventilation losses. Then, the synchronous generator becomes a synchronous
motor and starts to take electric power from the rest of the power system. This operating state, where
individual synchronous machines operate as motors, implies no risk for the machine itself. If the
generator under consideration is very large and if it consumes lots of electric power, it may be
desirable to disconnect it to ease the task for the rest of the power system.

Often, the motoring condition may imply that the turbine is in a very dangerous state. The task of the
reverse power protection is to protect the turbine and not to protect the generator itself.

Figure 362 illustrates the low forward power and reverse power protection with underpower and
overpower functions respectively. The underpower IED gives a higher margin and should provide
better dependability. On the other hand, the risk for unwanted operation immediately after
synchronization may be higher. One should set the underpower IED to trip if the active power from
the generator is less than about 2%. One should set the overpower IED to trip if the power flow from
the network to the generator is higher than 1%.

When IED with a metering class input CTs is used pickup can be set to more sensitive value
(e.g.0,5% or even to 0,2%).

Transformer protection RET670 631

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Underpower IED Overpower IED

Operate
Q Q
Operate
Line Line

Margin Margin
P P

Operating point Operating point

without without
turbine torque turbine torque

IEC06000315-2-en.vsd
IEC06000315 V2 EN-US

Figure 362: Reverse power protection with underpower IED and overpower IED

9.14.3 Function block SEMOD172667-4 v4

GOPPDOP
I3P* TRIP
U3P* TRIP1
BLOCK TRIP2
BLOCK1 START
BLOCK2 START1
START2
P
PPERCENT
Q
QPERCENT

IEC07000028-2-en.vsd
IEC07000028 V2 EN-US

Figure 363: GOPPDOP function block

9.14.4 Signals
PID-3710-INPUTSIGNALS v7

Table 373: GOPPDOP Input signals

Name Type Default Description

I3P GROUP - Current group connection
SIGNAL
U3P GROUP - Voltage group connection
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLOCK1 BOOLEAN 0 Block of stage 1
BLOCK2 BOOLEAN 0 Block of stage 2

PID-3710-OUTPUTSIGNALS v7

Table 374: GOPPDOP Output signals

Name Type Description

TRIP BOOLEAN Common trip signal
TRIP1 BOOLEAN Trip of stage 1
TRIP2 BOOLEAN Trip of stage 2
Table continues on next page

632 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Type Description

START BOOLEAN Common start
START1 BOOLEAN Start of stage 1
START2 BOOLEAN Start of stage 2
P REAL Active power P in MW
PPERCENT REAL Active power P in % of SBase
Q REAL Reactive power Q in MVAr
QPERCENT REAL Reactive power Q in % of SBase

9.14.5 Settings
PID-3710-SETTINGS v7

Table 375: GOPPDOP Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OpMode1 Off - - OverPower Operation mode for stage 1 Off / On
OverPower
Power1 0.0 - 500.0 %SB 0.1 120.0 Stage 1 overpower setting in Angle1
direction in % of SBase
Angle1 -180.0 - 180.0 Deg 0.1 0.0 Characteristic angle for max power
senistivity stage 1
TripDelay1 0.01 - 6000.00 s 0.01 1.00 Trip delay for stage 1
DropDelay1 0.01 - 6000.00 s 0.01 0.06 Drop-off delay for stage 1
OpMode2 Off - - OverPower Operation mode for stage 2 Off / On
OverPower
Power2 0.0 - 500.0 %SB 0.1 120.0 Stage 2 overpower setting in Angle2
direction in % of SBase
Angle2 -180.0 - 180.0 Deg 0.1 0.0 Characteristic angle for max power
senistivity stage 2
TripDelay2 0.01 - 6000.00 s 0.01 1.00 Trip delay for stage 2
DropDelay2 0.01 - 6000.00 s 0.01 0.06 Drop-off delay for stage 2

Table 376: GOPPDOP Group settings (advanced)

Name Values (Range) Unit Step Default Description

k 0.000 - 0.999 - 0.001 0.000 Low pass filter coefficient for power
measurement, P and Q
Hysteresis1 0.2 - 5.0 %SB 0.1 0.5 Absolute hysteresis of stage 1 in % of
SBase
Hysteresis2 0.2 - 5.0 %SB 0.1 0.5 Absolute hysteresis of stage 2 in % of
SBase
IAmpComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates
current error at 5% of Ir
IAmpComp30 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates
current error at 30% of Ir
IAmpComp100 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates
current error at 100% of Ir
UAmpComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates
voltage error at 5% of Ur
Table continues on next page

Transformer protection RET670 633

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Name Values (Range) Unit Step Default Description

UAmpComp30 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates
voltage error at 30% of Ur
UAmpComp100 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates
voltage error at 100% of Ur
IAngComp5 -10.000 - 10.000 Deg 0.001 0.000 Corr of error betw current and voltage
angles at 5% of Ir
IAngComp30 -10.000 - 10.000 Deg 0.001 0.000 Corr of error betw current and voltage
angles at 30% of Ir
IAngComp100 -10.000 - 10.000 Deg 0.001 0.000 Corr of error betw current and voltage
angles at 100% of Ir

Table 377: GOPPDOP Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups
Mode L1, L2, L3 - - Pos Seq Selection of measured current and
Arone voltage
Pos Seq
L1L2
L2L3
L3L1
L1
L2
L3

9.14.6 Monitored data

PID-3710-MONITOREDDATA v6

Table 378: GOPPDOP Monitored data

Name Type Values (Range) Unit Description

P REAL - MW Active power P in MW
PPERCENT REAL - % Active power P in % of SBase
Q REAL - MVAr Reactive power Q in MVAr
QPERCENT REAL - % Reactive power Q in % of SBase

9.14.7 Operation principle

SEMOD172154-4 v3
A simplified scheme showing the principle of the power protection function is shown in figure 364.
The function has two stages with individual settings.

634 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Chosen current
phasors P

Complex Derivation of S(angle)

S(angle) > t TRIP1
power S(composant)
Chosen voltage Power1
calculation in Char angle
phasors Q
START1

S(angle) > t TRIP2

Power2
START2

P = POWRE

Q = POWIM

IEC06000567-2-en.vsd
IEC06000567 V2 EN-US

Figure 364: Simplified logic diagram of the power protection function

The function will use voltage and current phasors calculated in the pre-processing blocks. The
apparent complex power is calculated according to chosen formula as shown in table 379.

Table 379: Complex power calculation

Set value: Mode Formula used for complex power calculation

L1, L2, L3
S = U L1 × I L1* + U L 2 × I L 2* + U L 3 × I L 3*
EQUATION1697 V1 EN-US (Equation 181)
Arone
S = U L1L 2 × I L1* - U L 2 L 3 × I L 3*
EQUATION1698 V1 EN-US (Equation 182)
PosSeq
S = 3 × U PosSeq × I PosSeq*
EQUATION1699 V1 EN-US (Equation 183)
L1L2
S = U L1L 2 × ( I L1* - I L 2* )
EQUATION1700 V1 EN-US (Equation 184)
L2L3
S = U L 2 L 3 × ( I L 2* - I L 3* )
EQUATION1701 V1 EN-US (Equation 185)
L3L1
S = U L 3 L1 × ( I L 3* - I L1* )
EQUATION1702 V1 EN-US (Equation 186)
L1
S = 3 × U L1 × I L1*
EQUATION1703 V1 EN-US (Equation 187)
L2
S = 3 × U L 2 × I L 2*
EQUATION1704 V1 EN-US (Equation 188)
L3
S = 3 × U L 3 × I L 3*
EQUATION1705 V1 EN-US (Equation 189)

Transformer protection RET670 635

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

The active and reactive power is available from the function and can be used for monitoring and fault
recording.

The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this angle
is 0° the active power component P is calculated. If this angle is 90° the reactive power component Q
is calculated.

The calculated power component is compared to the power pick up setting Power1(2). A start signal
START1(2) is activated if the calculated power component is larger than the pick up value. After a set
time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the start signal is still active. At
activation of any of the two stages a common signal START will be activated. At trip from any of the
two stages also a common signal TRIP will be activated.

To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis of the
stage1(2) is Hysteresis1(2) = abs (Power1(2) – drop-power1(2)). For generator reverse power
protection the power setting is very low, normally down to 0.02 p.u. of rated generator power. The
hysteresis should therefore be set to a smaller value. The drop-power value of stage1 can be
calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) – Hysteresis1(2)

For small power1 values the hysteresis1 may not be too big, because the drop-power1(2) would be
too small. In such cases, the hysteresis1 greater than (0.5 · Power1(2)) is corrected to the minimal
value.

If the measured power drops under the drop-power1(2) value the function will reset after a set time
DropDelay1(2). The reset means that the start signal will drop out ant that the timer of the stage will
reset.

9.14.7.1 Low pass filtering SEMOD172154-37 v4

In order to minimize the influence of the noise signal on the measurement it is possible to introduce
the recursive, low pass filtering of the measured values for S (P, Q). This will make slower
measurement response to the step changes in the measured quantity. Filtering is performed in
accordance with the following recursive formula:

S = k × SOld + (1 - k ) × SCalculated
EQUATION1959 V1 EN-US (Equation 190)

Where
S is a new measured value to be used for the protection function
Sold is the measured value given from the function in previous execution cycle

SCalculated is the new calculated value in the present execution cycle

k is settable parameter by the end user which influence the filter properties

Default value for parameter k is 0.00. With this value the new calculated value is immediately given
out without any filtering (that is, without any additional delay). When k is set to value bigger than 0,
the filtering is enabled. A typical value for k = 0.92 in case of slow operating functions.

9.14.7.2 Calibration of analog inputs SEMOD172154-55 v2

Measured currents and voltages used in the Power function can be calibrated to get class 0.5
measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100% of
rated current and voltage. The compensation below 5% and above 100% is constant and linear in
between, see example in figure 365.

636 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

IEC05000652 V2 EN-US

Figure 365: Calibration curves

The first current and voltage phase in the group signals will be used as reference and the amplitude
and angle compensation will be used for related input signals.

Analog outputs from the function can be used for service values or in the disturbance report. The
active power is provided as MW value: P, or in percent of base power: PPERCENT. The reactive
power is provided as Mvar value: Q, or in percent of base power: QPERCENT.

9.14.8 Technical data SEMOD175160-1 v1

SEMOD175159-2 v9

Table 380: GOPPDOP technical data

Function Range or value Accuracy

Power level (0.0–500.0)% of SBase ±1.0% of Sr at S ≤ Sr
for Step 1 and Step 2 ±1.0% of S at S > Sr

Characteristic angle (-180.0–180.0) degrees ±2.0 degrees

for Step 1 and Step 2
Operate time, start at 0.5 x Sr to 2 x Sr and Min. =10 ms
k=0.000
Max. = 25 ms
Reset time, start at 2 x Sr to 0.5 x Sr and Min. = 35 ms
k=0.000
Max. = 55 ms
Independent time delay to operate for Step 1 (0.01-6000.00) s ±0.2% or ±40 ms whichever is
and Step 2 at 0.5 x Sr to 2 x Sr and k=0.000 greater

9.15 Broken conductor check BRCPTOC SEMOD171761-1 v3

Transformer protection RET670 637

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.15.1 Function revision history GUID-912F1AC6-6A15-49D7-8224-BC100CA1905A v1

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 -
M 2.2.4 -
N 2.2.5 A fixed time delay of 50 ms is added before asserting START signal.

9.15.2 Identification
SEMOD172362-2 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Broken conductor check BRCPTOC - 46

9.15.3 Functionality SEMOD171805-5 v6

Conventional protection functions cannot detect the broken conductor condition. Broken conductor
check BRCPTOC function, consisting of continuous phase selective current unsymmetrical check on
the line where the IED is connected, gives an alarm or trip at detecting broken conductors.

9.15.4 Function block SEMOD171906-11 v4

BRCPTOC
I3P* TRIP
BLOCK START
BLKTR

IEC07000034-2-en.vsd
IEC07000034 V2 EN-US

Figure 366: BRCPTOC function block

9.15.5 Signals
PID-3479-INPUTSIGNALS v6

Table 381: BRCPTOC Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Block of trip

638 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

PID-3479-OUTPUTSIGNALS v7

Table 382: BRCPTOC Output signals

Name Type Description

TRIP BOOLEAN Operate signal of the protection logic
START BOOLEAN Start signal of the protection logic

9.15.6 Settings
PID-3479-SETTINGS v7

Table 383: BRCPTOC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
Iub> 50 - 90 %IM 1 50 Highest and lowest phase currents
difference in % of highest phase current
IP> 5 - 100 %IB 1 20 Minimum phase current for operation of
Iub> in % of IBase
tOper 0.000 - 60.000 s 0.001 5.000 Operate time delay

Table 384: BRCPTOC Group settings (advanced)

Name Values (Range) Unit Step Default Description

tReset 0.010 - 60.000 s 0.001 0.100 Time delay in reset

Table 385: BRCPTOC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

9.15.7 Monitored data

PID-3479-MONITOREDDATA v6

Table 386: BRCPTOC Monitored data

Name Type Values (Range) Unit Description

IUNBAL REAL - - Measured unbalance of phase currents

9.15.8 Operation principle SEMOD171791-5 v6

Broken conductor check (BRCPTOC) detects a broken conductor condition by detecting the
asymmetry between currents in the three phases. The current-measuring elements continuously
measure the three-phase currents.

The current asymmetry signal output START is set on after 50.0 ms if:

• The difference in currents between the phase with the lowest current and the phase with the
highest current is greater than set percentage Iub> of the highest phase current
• The highest phase current is greater than the minimum setting value IP>.
• The lowest phase current is below 50% of the minimum setting value IP>

The third condition is included to avoid problems in systems involving parallel lines. If a conductor
breaks in one phase on one line, the parallel line will experience an increase in current in the same
phase. This might result in the first two conditions being satisfied. If the unsymmetrical detection lasts
for a period longer than the set time tOper, the TRIP output is activated.

Transformer protection RET670 639

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

The simplified logic diagram of the broken conductor check function is shown in Figure

BRCPTOC is disabled (blocked) if:

• The IED is in TEST status and the function has been blocked from the local HMI test menu
(BlockBRC=Yes).
• The input signal BLOCK is high.

The BLOCK input can be connected to a binary input of the IED in order to receive a block command
from external devices, or can be software connected to other internal functions of the IED itself to
receive a block command from internal functions.

The output trip signal TRIP is a three-phase trip. It can be used to command a trip to the circuit
breaker or for alarm purpose only.

TEST

TEST-ACTIVE
AND
Block BRCPTOC=Yes

50 ms
START
t
Function Enable
BLOCK OR
tOper TRIP
AND
AND t
Unsymmetrical
Current Detection

STI

IL1<50%IP>

IL2<50%IP> OR

IL3<50%IP>

IEC09000158-4-en.vsd
IEC09000158 V4 EN-US

Figure 367: Simplified logic diagram for Broken conductor check BRCPTOC

9.15.9 Technical data SEMOD171939-1 v1

SEMOD175200-2 v9

Table 387: BRCPTOC technical data

Function Range or value Accuracy

Minimum phase current for operation (5–100)% of IBase ±1.0% of Ir

Unbalance current operation (50–90)% of maximum current ±1.0% of Ir

Independent operate time delay (0.050-60.000) s ±0.2% or ±45 ms whichever is

greater
Independent reset time delay (0.010-60.000) s ±0.2% or ±30 ms whichever is
greater
Start time at current change from Ir to 0 Min. = 80 ms -
Max. = 95 ms
Reset time at current change from 0 to Ir Min. = 5 ms -
Max. = 20 ms

640 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

9.16 Capacitor bank protection CBPGAPC GUID-41731DCF-840C-4717-9F51-899FC648F881 v2

9.16.1 Identification
GUID-67FC8DBF-4391-4562-A630-3F244CBB4A33 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Capacitor bank protection CBPGAPC - -

9.16.2 Functionality GUID-D55CEBF7-9377-4E36-BD8B-533609048A1E v3

Shunt Capacitor Banks (SCB) are used in a power system to provide reactive power compensation
and power factor correction. They are as well used as integral parts of Static Var Compensators
(SVC) or Harmonic Filters installations. Capacitor bank protection (CBPGAPC) function is specially
designed to provide protection and supervision features for SCBs.

9.16.3 Function block

GUID-338FBDF8-0360-4EA4-8663-D2D30F845B44 v1

CBPGAPC
I3P* TRIP
BLOCK TROC
BLKTR TRUC
BLKOC TRQOL
BLKUC TRHOL
BLKUCCUT START
BLKQOL STOC
BLKHOL STUC
STQOL
STHOL
STOCL1
STOCL2
STOCL3
STUCL1
STUCL2
STUCL3
STQOLL1
STQOLL2
STQOLL3
STHDTL1
STHDTL2
STHDTL3
STHIDML1
STHIDML2
STHIDML3
RECNINH

IEC14000046-1-en.vsd
IEC08000500 V2 EN-US

Figure 368: CBPGAPC function block

Transformer protection RET670 641

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.16.4 Signals
PID-3580-INPUTSIGNALS v5

Table 388: CBPGAPC Input signals

Name Type Default Description

I3P GROUP - Three Phase Current Input
SIGNAL
BLOCK BOOLEAN 0 Block the complete function
BLKTR BOOLEAN 0 Block all trip output signals
BLKOC BOOLEAN 0 Block over current functionality
BLKUC BOOLEAN 0 Block under current functionality
BLKUCCUT BOOLEAN 0 Block UC function when the capacitor bank is disconnected
BLKQOL BOOLEAN 0 Block reactive power over load functionality
BLKHOL BOOLEAN 0 Block harmonic over load functionality

PID-3580-OUTPUTSIGNALS v5

Table 389: CBPGAPC Output signals

Name Type Description

TRIP BOOLEAN General trip signal
TROC BOOLEAN Trip signal for over current
TRUC BOOLEAN Trip signal for under current
TRQOL BOOLEAN Trip signal for reactive power over load
TRHOL BOOLEAN Trip signal for harmonic over load
START BOOLEAN General start signal
STOC BOOLEAN Start signals for over current
STUC BOOLEAN Start signal for under current
STQOL BOOLEAN Start signal for reactive power over load
STHOL BOOLEAN Start signal for harmonic over load
STOCL1 BOOLEAN Start signal for over current of phase L1
STOCL2 BOOLEAN Start signal for over current of phase L2
STOCL3 BOOLEAN Start signal for over current of phase L3
STUCL1 BOOLEAN Start signal for under current of phase L1
STUCL2 BOOLEAN Start signal for under current of phase L2
STUCL3 BOOLEAN Start signal for under current of phase L3
STQOLL1 BOOLEAN Start signal for reactive power over load of phase L1
STQOLL2 BOOLEAN Start signal for reactive power over load of phase L2
STQOLL3 BOOLEAN Start signal for reactive power over load of phase L3
STHDTL1 BOOLEAN Start signal harmonic over load Definite Time stage phase L1
STHDTL2 BOOLEAN Start signal harmonic over load Definite Time stage phase L2
STHDTL3 BOOLEAN Start signal harmonic over load Definite Time stage phase L3
STHIDML1 BOOLEAN Start signal for harmonic over load IDMT stage of phase L1
STHIDML2 BOOLEAN Start signal for harmonic over load IDMT stage of phase L2
STHIDML3 BOOLEAN Start signal for harmonic over load IDMT stage of phase L3
RECNINH BOOLEAN Capacitor bank reconnection inhibit signal

642 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

9.16.5 Settings
PID-3580-SETTINGS v5

Table 390: CBPGAPC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off/On
On
OperationRecIn Off - - On Inhibit reconnection for operation Off/On
On
IRecnInhibit< 4 - 1000 %IB 1 10 Current in % of IBase below which the
SCB is disconnected
tReconnInhibit 1.00 - 6000.00 s 0.01 300.00 Time delay for Capacitor Bank voltage to
discharge to <5%
OperationOC Off - - On Operation over current Off/On
On
IOC> 10 - 900 %IB 1 135 Start level for over current operation, %
of IBase
tOC 0.00 - 6000.00 s 0.01 30.00 Time delay for over current operation
OperationUC Off - - Off Operation under current Off/On
On
IUC< 5 - 100 %IB 1 70 Start level for under current operation in
% of IBase
tUC 0.00 - 6000.00 s 0.01 5.00 Time delay for under current operation
OperationQOL Off - - On Operation reactive power over load
On Off/On
QOL> 10 - 900 % 1 130 Start level for reactive power over load in
%
tQOL 1.00 - 6000.00 s 0.01 60.00 Time delay for reactive power overload
operation
OperationHOL Off - - On Operation harmonic over load Off/On
On
HOLDTU> 10 - 500 % 1 200 Start value of voltage in % for DT
harmonic voltage overload
tHOLDT 0.00 - 6000.00 s 0.01 10.00 Time delay for operation of harmonic
voltage overload
HOLIDMTU> 80 - 200 % 1 110 Start value of voltage in % for IDMT
harm. voltage overload
kHOLIDMT 0.50 - 1.50 - 0.01 1.00 Time multiplier for harmonic voltage
overload IDMT curve
tMaxHOLIDMT 0.05 - 6000.00 s 0.01 2000.00 Maximum trip delay for harmonic voltage
overload
tMinHOLIDMT 0.05 - 60.00 s 0.01 0.10 Minimum trip delay for harmonic voltage
overload

Table 391: CBPGAPC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Transformer protection RET670 643

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.16.6 Monitored data

PID-3580-MONITOREDDATA v5

Table 392: CBPGAPC Monitored data

Name Type Values (Range) Unit Description

IPEAKL1 REAL - A Equivalant RMS current for phase L1
IPEAKL2 REAL - A Equivalant RMS current for phase L2
IPEAKL3 REAL - A Equivalant RMS current for phase L3
URMSL1 REAL - % Calculated voltage RMS for phase L1
URMSL2 REAL - % Calculated voltage RMS for phase L2
URMSL3 REAL - % Calculated voltage RMS for phase L3
QL1 REAL - % Reactive power value for phase L1
QL2 REAL - % Reactive power value for phase L2
QL3 REAL - % Reactive power value for phase L3

9.16.7 Operation principle GUID-07CD9DBD-5ACB-4091-A480-7D0EEF76C241 v3

Capacitor bank protection (CBPGAPC) function measures the SCB three-phase current. CBPGAPC
has several built-in features:

• Overcurrent stage
• Undercurrent stage
• Reconnection inhibit
• Harmonic overload
• Reactive power overload

9.16.7.1 Measured quantities GUID-48C0B6DE-2DAD-4631-A967-72DF92A72B0B v2

Three-phase input current from the SCB is connected via the preprocessing block to CBPGAPC
function. From this preprocessing block CBPGAPC function obtains the following quantities for every
phase:

• Current sample values with sampling rate of 1 kHz in 50 Hz power system and 1.2 kHz in 60 Hz
power system (that is, 20 samples in fundamental power system cycle). These samples
correspond to the instantaneous current waveform of the protected SCB and in further text will
be marked with symbol “i~”
• Equivalent RMS current value based on Peak Current measurement. This value is obtained as
maximum absolute current sample value over last power system cycle divided by √2 and in
further text will be marked with symbol “IpeakRMS”
• Equivalent true RMS current value based on the following formula:

åi 2
~m

I
TRMS = m =1

N
EQUATION2232 V1 EN-US (Equation 191)

where N is used number of samples in one power system cycle (that is, 20) and i~m are last N
samples of the current waveform. In further text this equivalent true rms current quantity will be
marked with symbol ITRMS.

Note that the measured IpeakRMS value is available as a service value in primary amperes for every
phase from the function.

644 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

From the measured SCB currents, voltage value across every SCB phase is calculated. This is done
by continuous integration of the measured current waveform by using the following principal
equation:

1
u (t ) = × i ( t ) × ¶t
ò
C
EQUATION2233 V1 EN-US (Equation 192)

Where:
u(t) is voltage waveform across capacitor
i(t) is capacitor current waveform
C is capacitance in Farads

By using this integration procedure and subsequent filtering the following quantities for every phase
are calculated within the function:

• Voltage sample values with rate of 1 kHz in 50 Hz power system and 1.2 kHz in 60 Hz power
system (that is, 20 samples in fundamental power system cycle). These samples correspond to
the instantaneous voltage waveform across the protected SCB and in further text will be marked
with symbol u~
• Equivalent rms voltage value based on Peak Voltage measurement. This value is obtained as
maximum absolute voltage sample value over last power system cycle divided by √2 and in
further text will be marked with symbol UpeakRMS
• Equivalent true RMS voltage value based on the following formula:

åu 2
~m

U TRMS = m =1

N
EQUATION2234 V1 EN-US (Equation 193)

Where:
N is used number of samples in one power system cycle (for example, 20)
u ~m are last N samples of the voltage waveform

In further text this equivalent true RMS voltage quantity will be marked with symbol UTRMS

Some additional filtering of the calculated voltage quantities is additionally performed within the
function in order to avoid equivalent RMS voltage values overshooting during capacitor switching.

In order to avoid dependence of the current integration on exact value of the protected capacitor
bank capacitance the whole integration process is done in per unit system. In order to convert
measured current in primary amperes into per unit value the base current for the protected capacitor
bank shall be known. This value is set as parameter IBase and it represents the rated SCB current in
primary amperes at fundamental frequency. This value is calculated for a three-phase SCB as
follows:

1000 × Q [ MVAr ]
IBase =
3 × U [ kV ]
EQUATION2235 V1 EN-US (Equation 194)

Transformer protection RET670 645

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Where:
IBase is base current for the function in primary amperes
Q[MVAr] is shunt capacitor bank MVAr rating
U[kV] is shunt capacitor bank rated phase-to-phase voltage in kV

Once the base current is known the internal voltage calculations can be performed. Note that the
calculated UpeakRMS value is available as a service value in percent for every phase from the
function.

Generated reactive power (Q) by the capacitor bank is calculated within the function for every phase
as given by the following equation:

Q =U TRMS ×I TRMS

EQUATION2236 V1 EN-US (Equation 195)

Where:
Q is generated reactive power in per-unit
U TRMS is capacitor equivalent true RMS voltage in per-unit

ITRMS is capacitor equivalent true RMS current in per-unit

Additional filtering of the calculated Q quantity is performed within the function in order to avoid
overshooting during capacitor switching. Note that the calculated Q value is available as a service
value in percent for every phase from the function.

Simplified logic diagram about used analog quantities within one phase of the capacitor bank
protection function are shown in figure 369.

I3P I PeakRMS [A]

Overcurrent

Undercurrent

I TRMS[A]
Reconnection Inhibit

TRMS UTRMS[pu] Reactive Power Overload

FILTER
i~ [A]
IBase
 u~ [pu] PEAK UPeakRMS[pu]
Harmonic Overload
FILTER

IEC09000746-2-en.vsd

IEC09000746 V2 EN-US

Figure 369: Simplified logic diagram about used analog quantities within one phase

9.16.7.2 Reconnection inhibit feature GUID-00A2F589-AAE4-47A3-A8F3-85A01D072254 v2

This feature determines that capacitor banks are disconnected from the power system and is used to
prevent reconnection of a charged capacitor bank to a live network. The IRMS values of the three
phase currents are compared with the IRecnInhibit< parameter in order to determine when the
capacitor bank is energized or disconnected. The simplified logic diagram is shown in fig 370.

646 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

currentRMS a 0.02 s
CapBank Energised
a>b t
b
IRecnInhibit<

CAPDISC
Phx
NOT

IEC08000345-1-en.vsd
IEC08000345 V1 EN-US

Figure 370: Capacitor bank energization check for one phase. Similar for all three phases

When SCB is disconnected in all three phases, the reconnection inhibit signal will be given. This
signal will be active until the preset time elapsed and is used to inhibit the reconnection of charged
capacitor bank to live network. The internal logic diagram for the inhibit feature is shown in figure
371.

CAPDISC

CAPDISC
_ Ph1

CAPDISC Ph2 tReconnInhibit

AND
AND RECNINH
CAPDISC Ph3
AND
Z-2

Z-2

en08000346.vsd
IEC08000346 V1 EN-US

Figure 371: Capacitor bank reconnection inhibit

9.16.7.3 Overcurrent feature GUID-4182050D-0CEC-4570-B90A-5BCEDF535595 v2

The overcurrent protection feature protects the capacitor bank from excessive current conditions.
The sub function takes the current peakRMS value from the preprocessing block in the IED as input.
The peakRMS value of the current is compared with the setting of parameter IOC>. Whenever the
peakRMS value of the current crosses the set level the function sends a START signal as output.
The signal is passed through the definite timer for giving the TRIP signal. Each phase will have its
own START and TRIP signals for overcurrent. The internal logic for the overcurrent feature is shown
in fig 372.

IPeakRMS a
a>b tOC
IOC> b TROC
AND t AND

OperationOC=On
STOC

BLKTR

BLKOC

BLOCK OR

IEC08000350-1-en.vsd
IEC08000350 V1 EN-US

Figure 372: Capacitor bank overcurrent protection

Transformer protection RET670 647

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.16.7.4 Undercurrent feature GUID-6D21DA11-BCBC-4A03-91CF-723883386224 v2

Undercurrent protection feature is used to disconnect the capacitor bank from the rest of the power
system when the voltage at the capacitor bank terminals is too low for too long period of time. This
sub function uses the current peakRMS value from the preprocessing block in the IED as input. The
peakRMS value of the current is compared to the set value of the parameter IUC<. Whenever the
peakRMS value of the current falls below the set undercurrent level, the function will send a START
signal as output. The function can be blocked when the current falls below the cut off level. The
capacitor bank disconnected signals are used for this blocking. This feature will help to prevent trip
operation when the capacitor bank is disconnected from the power system. The TRIP output signal is
delayed by a definite timer. Each phase will have its own START and TRIP signals for undercurrent.
The internal logic for the undercurrent feature is shown in fig 373.

IPeakRMS
a
b>a
IUC< b
tUC

AND t
AND TRUC
OperationUC=On

BLKUC
STUC
BLOCK
OR
CAPDISC

BLKTR

en08000351.vsd
IEC08000351 V1 EN-US

Figure 373: Capacitor bank undercurrent protection

9.16.7.5 Capacitor harmonic overload feature GUID-8F40ED8B-2276-4C44-B06A-8FE9C099357C v3

Harmonic overload protection feature will protect the capacitor from over load conditions caused by
harmonics. The sub-function protects the capacitor in two stages, first stage is Inverse time delay
(IDMT) based and a second stage is based on Definite Time (DT) delay.

IDMT curve has adjustable k factor and inverse time characteristic is shown in figure 374, where k =
1. The IDMT curve starts only when the equivalent RMS voltage value is higher than set value of
parameter HOLIDMTU> and stays active until the value falls below the reset value.

2.3
Voltage Peak RMS [pu]

2.1

1.9

1.7

1.5

1.3

1.1
0.1 1 10 100 1000 10000
Operate Time [s]
IEC08000352-1-en.vsd
IEC08000352 V1 EN-US

Figure 374: IDMT curve for harmonic overload (kHOLIDMT=1.0)

Main seven operating points for this IDMT curve are defined by IEC/ANSI standards and they are
shown in above figure and summarized in the following table:

648 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Table 393: Main operating points for IDMT curve

UpeakRMS 1.15 1.2 1.3 1.4 1.7 2.0 2.2

[pu]
Time [s] 1800 300 60 15 1.0 0.3 0.12

Note the following regarding this IDMT curve:

1. When parameter kHOLIDMT has different value from 1.0 operating time is proportionally
changed (for example, when kHOLIDMT =0.9 operating times will be 90% of the values shown
in above figure 374 and table 393)
2. Between the seven main points in table 393, the operate time is calculate by using linear
interpolation in the logarithmic scale
3. Integration process is used to calculate the operate time for varying voltage condition
4. By setting parameter tMinHOLIDMT =0.1s standard requirements for minimum operating time of
100ms for harmonic overload IDMT curve can be fluffed
5. By setting parameter tMaxHOLIDMT =2000s operation for small harmonics overload condition
when UpeakRMS is in-between 1.1pu and 1.2pu is assured

Harmonic overload definite time curve has settings facilities for independent pickup and time delay. It
can be used as separate tripping stage or as an alarm stage.

Both of these two harmonic overload stages are active during capacitor bank energizing and are
capable to properly measure and operate up to and including 9th harmonic.

The internal logic for harmonic overload feature is shown in figure 375:

STHDTLx
UPeakRMS [pu]
a
a>b
HOLDTU> b

tHOLDT
t
OperationHOL=On AND
OR TRHOL
AND

BLKHOL

BLOCK
OR OR STHOL

BLKTR

OperationHOL=On AND
TR
UPeakRMS [pu]
a
a>b kHOLIDMT IDMT
HOLIDMTU> b
tMaxHOLIDMT
STHIDMLx
tMinHOLIDMT ST

UPeakRMS [pu]

IEC09000752-1-en.vsd
IEC09000752 V1 EN-US

Figure 375: Simplified logic diagram for harmonic overload

Transformer protection RET670 649

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.16.7.6 Capacitor reactive power overload feature GUID-894B9C67-71F7-48B1-8D54-1816CB3F79A9 v2

Reactive power overload protection feature will protect the capacitor bank from reactive power
overload conditions.

The sub-function will use the reactive power values as input. The reactive power input values are
calculated from the true RMS value of voltage and current. The reactive power value is compared
with the QOL> setting. When the reactive power value exceeds the QOL> setting the STQOL signal
will be activated. The start signal is delayed by the definite timer before activating the TRQOL signal.
The internal logic diagram for this feature is shown in figure 376.

Q [pu]
a
a>b
QOL> b

tQOL
t
OperationQOL=On AND
TRQOL
AND
BLKTR

BLKQOL
STQOL
BLOCK
OR

en08000353.vsd
IEC08000353 V1 EN-US

Figure 376: Capacitor bank reactive power overload protection

9.16.8 Technical data

GUID-6A7DA510-E145-4C5B-A7DC-97BC4258E621 v10

Table 394: CBPGAPC technical data

Function Range or value Accuracy

Operate value, overcurrent (10-900)% of lBase ±2.0% of Ir at I ≤ Ir
±2.0% of I at I > Ir

Reset ratio, overcurrent >95% at (100-900)% of IBase -

Start time, overcurrent, at 0.5 x Iset Min. = 5 ms -
to 2 x Iset Max. = 20 ms
Reset time, overcurrent, at 2 x Iset to Min. = 25 ms -
0.5 x Iset Max. = 45 ms
Critical impulse time, overcurrent 2 ms typically at 0.5 x Iset to 2 x Iset -
protection start 1 ms typically at 0.5 x Iset to 10 x
Iset
Impulse margin time, overcurrent 10 ms typically
protection start
Operate value, undercurrent (5-100)% of IBase ±2.0% of Ir

Reset ratio, undercurrent <105% at (30-100)% of IBase -

Operate value, reconnection inhibit (4-1000)% of IBase ±1.0% of Ir at I ≤ Ir
function ±1.0% of I at I > Ir

Operate value, reactive power (10-900)% ±1.0% of Sr at S ≤ Sr

overload function ±1.0% of S at S > Sr

Operate value, voltage protection (10-500)% ±0.5% of Ur at U ≤ Ur

function for harmonic overload ±0.5% of U at U > Ur
(Definite time)
Table continues on next page

650 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Function Range or value Accuracy

Operate value, voltage protection (80-200)% ±0.5% of Ur at U ≤ Ur
function for harmonic overload ±0.5% of U at U > Ur
(Inverse time)
Inverse time characteristic According to IEC 60871-1 (2005) ±20% or ±200 ms whichever is
and IEEE/ANSI C37.99 (2000) greater
Maximum trip delay, harmonic (0.05-6000.00) s ±20% or ±200 ms whichever is
overload IDMT greater
Minimum trip delay, harmonic (0.05-60.00) s ±20% or ±200 ms whichever is
overload IDMT greater
Independent time delay, overcurrent (0.00-6000.00) s ±0.2% or ±30 ms whichever is
at 0 to 2 x Iset greater
Independent time delay, (0.00-6000.00) s ±0.2% or ±60 ms whichever is
undercurrent at 2 x Iset to 0 greater
Independent time delay, reactive (1.00-6000.00) s ±0.2% or ±100 ms whichever is
power overload function at 0 to 2 x greater
QOL>
Independent time delay, harmonic (0.00-6000.00) s ±0.2% or ±35 ms whichever is
overload at 0 to 2 x HOL> greater

9.17 Negativ sequence time overcurrent protection for

machines NS2PTOC GUID-25821361-229A-44BB-A60F-FC6DD9F4F140 v2

9.17.1 Identification GUID-19BB1653-55AE-44D1-B964-F59AED5350C4 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Negative sequence time overcurrent NS2PTOC 2I2> 46I2
protection for machines

9.17.2 Functionality GUID-DBF3EC07-D947-4483-ABD1-4F7D29F48D61 v7

Negative-sequence time overcurrent protection for machines (NS2PTOC) is intended primarily for the
protection of generators against possible overheating of the rotor caused by negative sequence
current in the stator current.

The negative sequence currents in a generator may, among others, be caused by:

• Unbalanced loads
• Line to line faults
• Line to earth faults
• Broken conductors
• Malfunction of one or more poles of a circuit breaker or a disconnector

NS2PTOC can also be used as a backup protection, that is, to protect the generator in case line
protections or circuit breakers fail to clear unbalanced system faults.

To provide an effective protection for the generator for external unbalanced conditions, NS2PTOC is
able to directly measure the negative sequence current. NS2PTOC also has a time delay
2
characteristic which matches the heating characteristic of the generator I 2 t = K as defined in
standard IEEE C50.13.

Transformer protection RET670 651

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

where:
I2 is negative sequence current expressed in per unit of the rated generator
current
t is operating time in seconds
K is a constant which depends of the generators size and design

NS2PTOC has a wide range of K settings and the sensitivity and capability of detecting and tripping
for negative sequence currents down to the continuous capability of a generator.

In order to match the heating characteristics of the generator a reset time parameter can be set.

A separate definite time delayed output is available as an alarm feature to warn the operator of a
potentially dangerous situation.

9.17.3 Function block GUID-7071A62D-AB87-43C4-922A-1DD2E6DD5623 v2

NS2PTOC
I3P* TRIP
BLOCK TR1
BLKST1 TR2
BLKST2 START
BLKTR ST1
ST2
ALARM
NSCURR
IEC08000359.vsdx

IEC08000359-1-EN V3 EN-US

Figure 377: NS2PTOC function block

9.17.4 Signals
PID-7431-INPUTSIGNALS v1

Table 395: NS2PTOC Input signals

Name Type Default Description

I3P GROUP - Group connection for neg seq.
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKST1 BOOLEAN 0 Block of step 1
BLKST2 BOOLEAN 0 Block of step 2
BLKTR BOOLEAN 0 Block of trip signals

PID-7431-OUTPUTSIGNALS v1

Table 396: NS2PTOC Output signals

Name Type Description

TRIP BOOLEAN Common trip signal
TR1 BOOLEAN Trip signal from step 1
TR2 BOOLEAN Trip signal from step 2
START BOOLEAN Common start signal
ST1 BOOLEAN Start signal from step 1
Table continues on next page

652 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Type Description

ST2 BOOLEAN Start signal from step 2
ALARM BOOLEAN Alarm signal
NSCURR REAL Negative sequence current in primary amps

9.17.5 Settings
PID-7431-SETTINGS v1

Table 397: NS2PTOC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 398: NS2PTOC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
tAlarm 0.00 - 6000.00 s 0.01 3.00 Time delay for Alarm (operated by
START signal), in sec
OpStep1 Off - - On Enable execution of step 1
On
I2-1> 3 - 100 %IB 1 10 Negative sequence current level for step
1 in % of IBase
CurveType1 Definite - - Definite Selection of definite or inverse time-
Inverse characteri. for step 1
t1 0.00 - 6000.00 s 0.01 10.00 Definite time delay for trip of step 1, in
sec
tResetDef1 0.000 - 60.000 s 0.001 0.000 Time delay for reset of definite timer of
step 1, in sec
K1 1.0 - 99.0 s 0.1 10.0 Neg. seq. capability value of generator
for step 1, in sec
t1Min 0.000 - 60.000 s 0.001 5.000 Minimum operate time for inverse curves
for step 1
t1Max 0.00 - 6000.00 s 0.01 1000.00 Maximum trip delay for step 1, in sec
ResetMultip1 0.01 - 20.00 - 0.01 1.00 Reset multiplier for K1, defines reset
time of inverse curve
OpStep2 Off - - On Enable execution of step 2
On
I2-2> 3 - 100 %IB 1 10 Negative sequence current level for step
2 in % of IBase
CurveType2 Definite - - Definite Selection of definite or inverse time-
Inverse characteri. for step 2
t2 0.00 - 6000.00 s 0.01 10.00 Definite time delay for trip of step 2, in
sec
tResetDef2 0.000 - 60.000 s 0.001 0.000 Time delay for reset of definite timer of
step 2, in sec
K2 1.0 - 99.0 s 0.1 10.0 Neg. seq. capability value of generator
for step 2, in sec
Table continues on next page

Transformer protection RET670 653

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Name Values (Range) Unit Step Default Description

t2Min 0.000 - 60.000 s 0.001 5.000 Minimum operate time for inverse curves
for step 2
t2Max 0.00 - 6000.00 s 0.01 1000.00 Maximum trip delay for step 2, in sec
ResetMultip2 0.01 - 20.00 - 0.01 1.00 Reset multiplier for K2, defines reset
time of inverse curve

9.17.6 Monitored data

PID-7431-MONITOREDDATA v1

Table 399: NS2PTOC Monitored data

Name Type Values (Range) Unit Description

NSCURR REAL - A Negative sequence current in primary
amps

9.17.7 Operation principle

GUID-0DEE12AC-2CA3-4E10-8DD0-888000BD898A v4
The negative sequence time overcurrent protection for machines (NS2PTOC) function directly
measures the amplitude of the negative phase sequence component of the measured current.
NS2PTOC sets the START, ST1 or ST2 outputs active and starts to count trip time only when the
measured negative sequence current value rises above the set value of parameters I2-1> or I2-2>
respectively.

To avoid oscillation in the output signals, a certain hysteresis has been included. For both steps, the
reset ratio is 0.97.

Step 1 of NS2PTOC can operate in the Definite Time (DT) or Inverse Time (IDMT) mode depending
on the selected value for the CurveType1 parameter. If CurveType1= Definite, NS2PTOC operates
with a Definite Time Delay characteristic and if CurveType1 = Inverse, NS2PTOC operates with an
Inverse Time Delay characteristic. Step 2 is operating in an analogous way as Step 1.

Definite time delay is not dependent on the magnitude of measured negative sequence current. Once
the measured negative sequence current exceeds the set level, the settable definite timer t1 or t2
respectively, starts to count and the corresponding trip signal gets activated after the pre-set definite
time delay has elapsed. Reset time in definite time mode is determined by the setting parameters
tResetDef1 or tResetDef2 respectively. If NS2PTOC has already started but not tripped and
measured negative sequence current drops below the start value, the start outputs remains active for
the time defined by the resetting parameters.

A BLOCK input signal resets NS2PTOC momentarily.

When the parameter CurveType1 is set to Inverse, an inverse curve is selected according to selected
value for parameter K1. The minimum trip time setting of parameter t1Min and reset time parameter
ResetMultip1 also influence step operation. However, to match the heating characteristics of the
generator, the reset time is depending on the setting of parameter K1, which must be set according
to the generators negative sequence current capacity.

K = I 2 2t
EQUATION2112 V1 EN-US

Where:
I2 is negative sequence current expressed in per unit of the rated generator current

t is operating time in seconds

K is a constant [s], which depends on generator size and design

654 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Operate
time

t1Max
(Default= 1000 s)

t1Min
(Default= 5 s)

K1

Current I2-1>
IEC09000691-2-en.vsd
IEC09000691 V2 EN-US

Figure 378: Inverse time characteristic with t1Min and t1Max

For a detailed description of inverse time characteristic, see chapter "Inverse characteristics".

The reset time is exponential and is given by the following expression:

 
 
ResetTime [ s ] =  ResetMultip 
⋅K
  I 2 
  NS  − 1 
  I Start  
EQUATION2111 V4 EN-US (Equation 196)

Where
INS is the measured negative sequence current

IStart is the desired start level in pu of rated generator current

ResetMultip is multiplier of the generator capability constant K equal to setting K1 and thus defines reset time
of inverse time characteristic

9.17.7.1 Start sensitivity GUID-1D038486-7086-466F-A92F-30E1A47D0298 v3

The trip start levels Current I2-1> and I2-2> of NS2PTOC are freely settable over a range of 3 to 500
% of rated generator current IBase. The wide range of start setting is required in order to be able to
protect generators of different types and sizes.

After start, a certain hysteresis is used before resetting start levels. For both steps the reset ratio is
0.97.

9.17.7.2 Alarm function GUID-1B932D89-3233-4841-977A-5B61346B057B v2

The alarm function is operated by START signal and used to warn the operator for an abnormal
situation, for example, when generator continuous negative sequence current capability is exceeded,
thereby allowing corrective action to be taken before removing the generator from service. A settable

Transformer protection RET670 655

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

time delay tAlarm is provided for the alarm function to avoid false alarms during short-time
unbalanced conditions.

9.17.7.3 Logic diagram GUID-71553DAF-374C-4980-82D8-D3AF79861C5B v3

CurveType1=Definite
AND t1 TR1
OR
Negative sequence current a
a>b
b Inverse
I2-1>

Operation=ON AND
t1Min AND
BLKST1

BLOCK

CurveType1=Inverse
t1Max
AND
ST1

IEC080004661-4-en.vsdx

IEC08000466-1-EN V4 EN-US

Figure 379: Simplified logic diagram for step 1 of Negative sequence time overcurrent
protection for machines (NS2PTOC)
Step 2 for Negative sequence time overcurrent protection for machines (NS2PTOC) is similar to step
1.

ST1
START
ST2 OR

tAlarm ALARM

TR1
TRIP
TR2 OR

IEC09000690-2-en.vsd
IEC09000690 V2 EN-US

Figure 380: Simplified logic diagram for the START, ALARM and TRIP signals for NS2PTOC

9.17.8 Technical data

GUID-E5718F80-556D-4852-A8F2-90E0F578D763 v10

Table 400: NS2PTOC technical data

Function Range or value Accuracy

Operate current, step 1 - 2 (3-500)% of IBase ±1.0% of Ir

Reset ratio >95% -

Operate time, start at 0 to 2 x Iset Min. = 15 ms -
Max. = 30 ms
Reset time, start at 2 x Iset to 0 Min. = 15 ms -
Max. = 30 ms
Operate time, start at 0 to 10 x Iset Min. = 5 ms -
Max. = 20 ms
Reset time, start at 10 x Iset to 0 Min. = 20 ms -
Max. = 35 ms
Time characteristics Definite or Inverse -
Table continues on next page

656 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Function Range or value Accuracy

Inverse time characteristic, step 1 - 2 K=1.0-99.0 ±2.0% or ±40 ms whichever is greater

I 22t = K

Reset time, inverse characteristic, Reset Multiplier = 0.01-20.00 ±10.0% or ±40 ms whichever is greater
step 1 - 2

I 22t = K

Minimum operate time for inverse (0.000-60.000) s ±0.2% or ±35 ms whichever is greater
time characteristic, step 1 - 2
Maximum trip delay at 0.5 x Iset to 2 (0.00-6000.00) s ±0.2% or ±35 ms whichever is greater
x Iset, step 1 - 2

Independent time delay at 0.5 x Iset (0.00-6000.00) s ±0.2% or ±35 ms whichever is greater
to 2 x Iset, step 1 - 2

Independent time delay for Alarm at (0.00-6000.00) s ±0.2% or ±35 ms whichever is greater
0.5 x Iset to 2 x Iset

9.18 Voltage-restrained time overcurrent protection VRPVOC GUID-613620B1-4092-4FB6-901D-6810CDD5C615 v4

9.18.1 Identification GUID-7835D582-3FF4-4587-81CE-3B40D543E287 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Voltage-restrained time overcurrent VRPVOC I>/U< 51V
protection

9.18.2 Functionality GUID-935E1CE8-601F-40E2-8D22-2FF68420FADF v6

Voltage-restrained time overcurrent protection (VRPVOC) function can be used as generator backup
protection against short-circuits.

The overcurrent protection feature has a settable current level that can be used either with definite
time or inverse time characteristic. Additionally, it can be voltage controlled/restrained.

One undervoltage step with definite time characteristic is also available within the function in order to
provide functionality for overcurrent protection with undervoltage seal-in.

9.18.3 Function block GUID-6B4EB1A4-2226-4397-A6FD-14F9DD02B12E v4

VRPVOC
I3P* TRIP
U3P* TROC
BLOCK TRUV
BLKOC START
BLKUV STOC
STUV

IEC12000184-1-en.vsd
IEC12000184 V1 EN-US

Figure 381: VRPVOC function block

Transformer protection RET670 657

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.18.4 Signals
PID-7805-INPUTSIGNALS v1

Table 401: VRPVOC Input signals

Name Type Default Description

I3P GROUP - Three phase group signal for current inputs
SIGNAL
U3P GROUP - Three phase group signal for voltage inputs
SIGNAL
BLOCK BOOLEAN 0 Block of function both stages
BLKOC BOOLEAN 0 Block of voltage restraint overcurrent stage (ANSI 51V)
BLKUV BOOLEAN 0 Block of under voltage function

PID-7805-OUTPUTSIGNALS v1

Table 402: VRPVOC Output signals

Name Type Description

TRIP BOOLEAN General trip signal
TROC BOOLEAN Trip signal from voltage restrained overcurrent stage
TRUV BOOLEAN Trip signal from undervoltage function
START BOOLEAN General start signal
STOC BOOLEAN Start signal from voltage restrained overcurrent stage
STUV BOOLEAN Start signal from undervoltage function

9.18.5 Settings
PID-7805-SETTINGS v1

Table 403: VRPVOC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 404: VRPVOC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
StartCurr 2.0 - 5000.0 %IB 1.0 120.0 Start current level in % of IBase
Characteristic ANSI Ext. inv. - - IEC Norm. inv. Time delay curve type for 51V Voltage
ANSI Very inv. restrained overcurrent
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
t_OC 0.00 - 6000.00 s 0.01 0.50 Definite time delay / additional time delay
for IDMT curves for OC
Table continues on next page

658 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Values (Range) Unit Step Default Description

k 0.05 - 999.00 - 0.01 1.00 Time multiplier for IDMT curves
tMin 0.00 - 60.00 s 0.01 0.05 Minimum operate time for IDMT curves
for OC
Operation_UV Off - - Off Operation of under-voltage stage (ANSI
On 27) Off / On
StartVolt 2.0 - 100.0 %UB 0.1 50.0 Voltage for start of under-voltage stage
in % of UBase
tDef_UV 0.00 - 6000.00 s 0.01 1.00 Definite time delay when used for Under-
Voltage
EnBlkLowV Off - - Off Enable internal low voltage level
On blocking for Under-Voltage
BlkLowVolt 0.0 - 5.0 %UB 0.1 3.0 Internal low voltage level for blocking of
UV in % of UBase

Table 405: VRPVOC Group settings (advanced)

Name Values (Range) Unit Step Default Description

VDepMode Step - - Slope Voltage dependent mode OC (step,
Slope slope)
VDepFact 5.0 - 100.0 % 0.1 25.0 Start current level in % of pickup when
U< 25% of UBase
UHighLimit 30.0 - 100.0 %UB 0.1 100.0 Voltage high limit setting in % of UBase

9.18.6 Monitored data

PID-7805-MONITOREDDATA v1

Table 406: VRPVOC Monitored data

Name Type Values (Range) Unit Description

IMAX REAL - A Maximum phase current magnitude
UUMIN REAL - kV Minimum ph-to-ph voltage magnitude

9.18.7 Operation principle

9.18.7.1 Measured quantities GUID-0D511C03-3750-4F61-9555-69DAD96CDC21 v5

The voltage-restrained time overcurrent protection VRPVOC function is always connected to three-
phase current and three-phase voltage input in the configuration tool (ACT), but it will always
measure the maximum of the three-phase currents and the minimum of the three phase-to-phase
voltages. If frequency tracking mode for preprocessing blocks is used, then the function operates
properly in wide frequency range (e.g. 10-90 Hz).

9.18.7.2 Base quantities GUID-08944177-73CF-4FB4-818E-3B7AC4F625EE v4

GlobalBaseSel defines the particular Global Base Values Group where the base quantities of the
function are set. In that Global Base Values Group:

IBase shall be entered as rated phase current of the protected object in primary amperes.

UBase shall be entered as rated phase-to-phase voltage of the protected object in primary kV.

Transformer protection RET670 659

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.18.7.3 Overcurrent protection GUID-7BB29872-EBC1-4628-AFB5-7A15E2EC41A8 v2

The overcurrent step simply compares the magnitude of the measured current quantity with the set
start level. The overcurrent step starts if the magnitude of the measured current quantity is higher
than the set level.

Voltage restraint/control feature GUID-E7C59BAD-47A1-46C2-8929-7E589548045C v3

The overcurrent protection operation is made dependent of a measured voltage quantity. This means
that the start level of the overcurrent step is not constant but decreases with the decrease in
magnitude of the measured voltage quantity. This feature affects the start current value of both
definite time and inverse time IDMT overcurrent protection; in particular the overcurrent with IDMT
curve operates faster during low voltage conditions. Two different types of dependencies are
available:

• Voltage restrained overcurrent (when setting parameter VDepMode = Slope); the start level of
the overcurrent stage changes according to the Figure 382. The voltage restrained characteristic
is defined by the two points: (0.25*UBase ; VDepFact *StartCurr/100*IBase) and (UHighLimit/
100*UBase; StartCurr/100*IBase). In the first point the factor 0.25 that multiply UBase cannot be
changed.

Start level of the current

StartCurr

VDepFact * StartCurr

0,25 UHighLimit
UBase
IEC10000123-2-en.vsd
IEC10000123 V2 EN-US

Figure 382: Example for start level of the current variation as function of measured voltage
magnitude in Slope mode of operation

• Voltage controlled overcurrent (when setting parameter VDepMode = Step); the start level of the
overcurrent stage changes according to the Figure 383.

660 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Start level of the current

StartCurr

VDepFact * StartCurr

UHighLimit UBase

IEC10000124-2-en.vsd
IEC10000124 V2 EN-US

Figure 383: Example for start level of the current variation as function of measured voltage
magnitude in Step mode of operation

9.18.7.4 Logic diagram GUID-0A1565A4-74E1-4171-968B-50529AABF192 v2

DEF time
selected
TROC
OR

MaxPhCurr
a STOC
a>b
b

StartCurr
X Inverse

Inverse
Voltage time
control or selected
restraint
feature

MinPh-PhVoltage

IEC10000214-1-en.vsd

IEC10000214 V1 EN-US

Figure 384: Simplified internal logic diagram for overcurrent function

Transformer protection RET670 661

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

DEF time
selected TRUV

MinPh-phVoltage a
b>a
b STUV
AND
StartVolt

Operation_UV=On

BLKUV

IEC10000213-1-en.vsd

IEC10000213 V1 EN-US

Figure 385: Simplified internal logic diagram for undervoltage function

9.18.7.5 Undervoltage protection GUID-96171DC7-9F8E-47B4-BE0D-E1B9EE214612 v5

The undervoltage step simply compares the magnitude of the lowest measured phase-phase voltage
quantity with the set start level. The undervoltage step starts if the magnitude of the measured
voltage quantity is lower than the set level.

The start signal starts a definite time delay. If the value of the start signal is logical TRUE for longer
than the set time delay, the undervoltage step sets its trip signal to logical TRUE.

This undervoltage functionality together with additional ACT logic can be used to provide functionality
for overcurrent protection with undervoltage seal-in.

9.18.8 Technical data

GUID-7EA9731A-8D56-4689-9072-D72D9CDFD795 v8

Table 407: VRPVOC technical data

Function Range or value Accuracy

Start overcurrent (2.0 - 5000.0)% of IBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir

Reset ratio, overcurrent > 95% -

Operate time, start overcurrent at 0 to 2 x Iset Min. = 15 ms -
Max. = 30 ms
Reset time, start overcurrent at 2 x Iset to 0 Min. = 15 ms -
Max. = 30 ms
Operate time, start overcurrent at 0 to 10 x Min. = 5 ms -
Iset Max. = 20 ms

Reset time, start overcurrent at 10 x Iset to 0 Min. = 20 ms -

Max. = 35 ms
Independent time delay to operate at 0 to 2 x (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is
Iset greater

Inverse time characteristics, 13 curve types See tables 1294 and 1295
see tables 1294 and 1295
Minimum operate time for inverse time (0.00 - 60.00) s ±0.2% or ±35 ms whichever is
characteristics greater
Table continues on next page

662 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Function Range or value Accuracy

High voltage limit, voltage dependent (30.0 - 100.0)% of UBase ±1.0% of Ur
operation
Start undervoltage (2.0 - 100.0)% of UBase ±0.5% of Ur

Reset ratio, undervoltage < 105% -

Operate time start undervoltage at 2 x Uset to Min. = 15 ms -
0
Max. = 30 ms
Reset time start undervoltage at 0 to 2 x Uset Min. = 15 ms -
Max. = 30 ms
Independent time delay to operate, (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is
undervoltage at 2 x Uset to 0 greater

Internal low voltage blocking (0.0 - 5.0)% of UBase ±0.25% of Ur

Overcurrent: -
Critical impulse time 10 ms typically at 0 to 2 x Iset
Impulse margin time 15 ms typically
Undervoltage: -
Critical impulse time 10ms typically at 2 x Uset to 0
Impulse margin time 15 ms typically

9.19 Average Power Transient Earth Fault Protection,

APPTEF GUID-0FFF3E30-FBE7-48FD-A242-DF67DD748BA8 v1

9.19.1 Identification GUID-505DB872-1C09-47DB-BAD4-2FBDF652FE9F v1

Table 408:

Function description IEC 61850 identification IEC 60617 identification ANSI/IEEE C37.2 device
number
Average Power Transient APPTEF Io > → TEF 67NT
Earth Fault Protection

9.19.2 Functionality GUID-A16ED4BC-855F-4561-8512-B4F30775784F v1

High impedance grounded power systems are characterized by a relatively high impedance which is
connected between the power system neutral point and ground. The most extreme example is an
isolated power system where this impedance is practically infinite. However, it is important to
understand that the natural distributed capacitances between the individual phase conductors and
ground are always present in any power network irrespective of the neutral point grounding. These
distributed capacitances are important to understand the power system behavior, during an Earth
Fault (EF) in a high impedance grounded power system.

The APPTEF (Average Power Transient Earth Fault Protection) function is a transient measuring
directional earth-fault protection. Determination of the earth fault direction is based on the short-term
built-up transient at the beginning of the earth fault. This transient is to a large extent independent of
the neutral point treatment. This means that the function can be used without any modification in all
types of high-impedance grounded, resonant grounded or isolated power systems.

For a resonant grounded system, the correct directional measurement is ensured regardless of how
many Petersen coils are used throughout the interconnected power network. The function is not
sensitive to the actual compensation degree of the coils. It will operate equally well in an under- or
over-compensated system. Parallel neutral resistor to the Petersen coil are not needed to correctly
determine earth fault direction. However, these neutral resistors can still be used if already installed
in the network.

Transformer protection RET670 663

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

9.19.3 Function block GUID-9D07F6F8-16F7-45ED-9D6B-E6E557DFBD0A v1

APPTEF
I3P* TRIP
U3P* STFW
BLOCK STRV
BLKTR STUN
RESET STIEF
WRNFW
ALMCC
ALMCIRI
IFUNDRE
IFUNDIM
IHARMIM

IEC19000949-1-en.vsdx
GUID-62978D0E-DC7C-43E3-85FB-85A75D7672AD V1 EN-US

Figure 386: APPTEF function block

9.19.4 Signals
GUID-FA45F1A1-E73B-43D0-B074-07F1561CCB18 v1

Table 409: APPTEF Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of the function
BLKTR BOOLEAN 0 Block of trip output
RESET BOOLEAN 0 Reset of the function including all internal calculations and all
outputs

GUID-5ACF7D05-F1F6-4977-A83E-B29B9956F2AD v1

Table 410: APPTEF Output signals

Name Type Description

TRIP BOOLEAN Trip for earth fault in forward direction
STFW BOOLEAN Start in forward direction
STRV BOOLEAN Start in reverse direction
STUN BOOLEAN Start of the residual overvoltage stage 3Uo>
STIEF BOOLEAN Intermittent earth fault detetcted
WRNFW BOOLEAN Warning, a transient corresponding to the forward fault has been
detected
ALMCC BOOLEAN Alarm when cross country fault condition is detected by 3Io
measurement. Transient EF function will be prevented to make
any directional decision while this signal is active.
ALMCIRI BOOLEAN Alarm when 3Io circulating current is detected, which can
influence the Io*cos(Phi) calculations. Pickup for Io*cos(Phi) part
will be adjusted accordingly. 3Io circulating current shall be
reduced by appropriate action in the primary system.
Table continues on next page

664 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Name Type Description

IFUNDRE REAL Integrated real part (proportional to active power) of the
fundamental frequency phasor in the residual current 3Io, given in
primary amperes
IFUNDIM REAL Integrated imaginary part (proportional to reactive power) of the
fundamental frequency phasor in the residual current 3Io, given in
primary amperes
IHARMIM REAL Integrated imaginary part (proportional to harmonic reactive
power) of the lumped harmonic phasors in the residual current
3Io, given in primary amperes

9.19.5 Settings
GUID-080EE324-4997-4090-86D0-E96B5491E545 v1

Table 411: APPTEF Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 412: APPTEF Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OperationMode Start Only - - Start Only Operation mode ( Start Only / Start and
Start and Trip Trip )
tPulseMin 0.02 - 1.00 s 0.01 0.15 Minimum pulse length duration in
seconds, for trip and/or start outputs
UN> 5 - 80 %UB 1 30 Minimum threshold level for residual
overvoltage start condition 3Uo>
IN> 3 - 100 %IB 1 5 Minimum threshold level for residual
overcurrent start condition 3Io>
IMinForward 1.5 - 100.0 %IB 0.1 2.5 Minimum operate level for integrated
current in order to declare the forward
direction
IMinReverse 1.0 - 100.0 %IB 0.1 1.5 Minimum operate level for integrated
current in order to declare the reverse
direction
tStart 0.04 - 2.00 s 0.01 0.15 Minimum time delay to declare EF
direction in seconds. Timer will be
activated with STUN signal.
tReset 0.05 - 5.00 s 0.01 0.5 Drop off time delay added to 3Uo
overvoltage condition start signal STUN,
after which the function will be fully reset
tTrip 0.00 - 20.00 s 0.01 2.00 Minimum trip time delay in seconds after
STFW signal has been issued
UN>StartsNo 2 - 20 - 1 4 Minimum number of consequitive 3Uo>
start conditions to detect intermitten EF.
Note that this counting will only be active
while reset timer is running.

Transformer protection RET670 665

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Table 413: APPTEF Group settings (advanced)

Name Values (Range) Unit Step Default Description

OperationCC Off - - On Operation of cross country fault
On detection On/Off
CrossCntry_IN> 20 - 1000 %IB 1 120 Operate 3Io current level for cross
country fault detection
tCC 0.02 - 1.00 s 0.01 0.03 Time delay in seconds to activate cross
country fault detection
Circulate_IN> 2 - 200 %IB 1 10 Operate 3Io current level for circulating
current detection
tCircIN 5.0 - 60.0 s 0.1 10.0 Time delay in seconds to activate
circulating current detection

9.19.6 Monitored data

GUID-1DB36592-BEA2-4F2D-8518-D3EF4DF681C4 v1

Table 414: APPTEF Monitored data

Name Type Values (Range) Unit Description

INRMS REAL - A RMS value of residual current 3Io
UNMAG REAL - kV Magnitude of fundamental frequency
phasor for measured neutral voltage 3Uo
in primary kV
ANGDIF REAL - deg Phase angle difference between rotated
-3Uo voltage phasor and 3Io current
phasor in degrees
DIR INTEGER 0=None - Detected earth fault direction (0 = None,
1=Forward 1 = Forward, 2 = Reverse)
2=Reverse
IFUNDRE REAL - A Integrated real part (proportional to
active power) of the fundamental
frequency phasor in the residual current
3Io, given in primary amperes
IFUNDIM REAL - A Integrated imaginary part (proportional to
reactive power) of the fundamental
frequency phasor in the residual current
3Io, given in primary amperes
IHARMIM REAL - A Integrated imaginary part (proportional to
harmonic reactive power) of the lumped
harmonic phasors in the residual current
3Io, given in primary amperes

9.19.7 Operation principle GUID-BAACF528-D83C-4900-9C18-D0B181493E50 v1

The basic operating condition for the transient earth fault (EF) protection in a high impedance
grounded system is explained for a substation having a single incoming transformer which will be
feeding a LV side busbar having three outgoing feeders. The associated directional EF protection for
every feeder are also shown in Figure 387 as well as a grounding impedance connected to the
transformer LV winding star point.

666 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

HV Busbar

HV
CB

Power Δ 
Transformer
Y Ground
Grounding
Impedance

Transformer 
LV Bay
CB
Feeder 1 Feeder 2 Feeder 3
LV Busbar
VT
F1 F2 F3
CB CB CB

67NT‐F1 67NT‐F2 67NT‐F3

IEC19000933-1-en.vsdx

IEC19000933 V1 EN-US

Figure 387: Example Substation

Figure 388, displays a simplified equivalent circuit for the zero-sequence system during an earth-fault
in Feeder 1.

Transformer 
Feeder 1 Bay Feeder 2 Feeder 3
LV Busbar
VT
Uo
F1 LV F2 F3
CB CB CB CB
Io_F1

Io_F2

Io_F3
Io_Tr

67NT‐F1 67NT‐F2 67NT‐F3

Faulty Feeder

Fault Point Power
HV Busbar

Transformer HV
Y Δ  CB

Rf Grounding
Impedance

C_F1'' C_F1' L R C_F2 L_F3 C_F3 R_F3

‐UPh‐Gnd Coil Resistor

Ground

IEC19000934-1-en.vsdx

IEC19000934 V1 EN-US

Figure 388: Simplified zero-sequence equivalent circuit during an EF in Feeder 1

Such an equivalent circuit can be used to facilitate the understanding of the basic physics-processes
which occurs when EF happens in a high-impedance grounded system.

Note the following in respect to this equivalent circuit:

Transformer protection RET670 667

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

1. The EF location is in Feeder 1. Consequently, its distributed capacitance is split into two parts,
one in-between the LV busbar and the fault point (that is C_F1’) and the second one behind the
fault point (that is C_F1”).
2. All feeders are just represented with a capacitance to ground. All series parameters of any
feeder are ignored because their impedance is much lower than this capacitive impedance and
consequently these series parameters can be ignored.
3. A resistance to ground (R_F3) is shown with dashed lines for Feeder 3, in practice these
resistances are extremely large and typically can be ignored. Consequently, these are not
shown for other feeders.
4. An inductance to ground ( L_F3) is also shown with dashed lines for Feeder 3, that in practice
may represent distributed coils along that feeder or remote coils located in the other substation
at the end of Feeder 3. In systems with multiple coils the above-mentioned resistance to ground
(R_F3) may also include the coil losses.
5. The grounding impedance at the transformer LV winding neutral point is represented as a
parallel connection of an inductor ( L) and a resistor ( R). This is the most practical
representation because it can then represent the most commonly used grounding principles (for
isolated system L= R=∞).
6. The location of all CTs and VTs are also given because these are used to determine the
measurement points for Io and respectively Uo signals in each feeder.
7. Note that Io and Uo are correct values for this equivalent circuit. In a real installation the IED will
actually measure 3Io and 3Uo, but the difference between them is just a fixed factor of 3. In
further writing only Io and Uo notation will be used, but whatever is written is applicable to 3Io
and 3Uo as well.
8. The reference direction for current measurement (towards the protected feeder) is also given
with associated directional EF protection ( 67NT-F1 for Feeder 1) in each outgoing feeder bay.
9. As per the superposition theorem, a single source in the zero-sequence system is located at the
fault point. Its magnitude is equal to the phase-to-ground voltage in the faulty phase just before
the fault, but its phase angle shall be turned-around for 180 degrees. If it is assumed that the
fault resistance (that is Rf) has approximately a value of zero ( a bolted fault), then the Uo
voltage will be equal to this source voltage. The Uo voltage will be approximately the same for
all IEDs throughout the system. That means that the differences in the measured Io currents in
the individual feeders are important to determine the faulty versus the healthy feeder.

9.19.7.1 Fundamental frequency signals behavior during an EF in a high-

impedance grounded system GUID-38415416-F60F-46F4-B68D-AEDE78C47FF5 v1

When EF happens (that is when the switch at the fault point closes in Figure 388) the source located
at the fault point energizes all the distributed capacitances of all the feeders connected to the LV
busbar.

Note that these capacitors are not energized (that is the capacitors are empty or without any stored
energy) just before the earth fault.

Consequently, these are first charged to an energy level corresponding to the Uo voltage level (using
the formula 0.5*Uo2*C) before starting to exchange reactive power with either the source located at
the fault point or with the coil(s) which are possibly located at transformer neutral point(s). This active
power surge is quite short, but if it can be measured or detected by the IED, then it can be used to
detect the faulty feeder. Figure 389 displays the path for this active but transient power from the
source to the distributed capacitors.

668 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

Transformer 
Feeder 1 Bay Feeder 2 Feeder 3
LV Busbar
VT
Uo
F1 LV F2 F3
CB CB CB CB

Io_F1

Io_F2

Io_F3
Io_Tr
67NT‐F1 67NT‐F2 67NT‐F3
Faulty Feeder

Fault Point Power

HV Busbar
Transformer HV
Y Δ  CB

Rf Grounding
Impedance

C_F1'' C_F1' L R C_F2 L_F3 C_F3 R_F3

‐UPh‐Gnd Coil Resistor

Ground

IEC19000935-1-en.vsdx

IEC19000935 V1 EN-US

Figure 389: Flow of active power in the zero-sequence system at the moment when EF
happens
Note that the existence of any shunt resistance in the system (R or R_F3 in Figure 389) will increase
the active transient power flow and consequently make it easier for the active power measurement
principle to determine the EF position. The same is true if the fault resistance Rf is present in the
circuit. At the same time, the existence of any inductor in the circuit (L or L_F3) will not influence the
active power flow in any way.

The EF position can be determined because the flow of the active transient power will be in the
opposite direction through the CTs in the faulty feeder and the healthy feeders. In simple words this
active power will be negative in the faulty feeder and positive in a healthy feeder. Note that the
transient EF IED installed in a healthy feeder will measure the transient charging power of the own
distributed capacitance, while the IED installed in the faulty feeder will measure the active transient
charging power of all healthy feeders lumped together. Consequently, this transient charging power
signal magnitude will be the largest for the faulty feeder and the smallest for the shortest healthy
feeder.

It is quite a common protection practice to use -Uo voltage (that is Uo voltage phasor which is turned
around/rotated for 180 degrees) for all EF protection functions. This will only invert all power
directions previously explained. For example, in an actual IED implementation the measured power
will be essentially positive in the faulty feeder and negative in a healthy feeder. This can be simply
understood as a sign convention which is commonly used in protective relaying practice.

In a power system the active power can be only supplied by the fundamental frequency signals,
which means that this active power must be generated by one or more generation plant connected to
the networks. Consequently, only the fundamental frequency content of the Io and Uo signals shall
be used to measure this active transient power in every bay. To calculate active power based on
fundamental frequency phasors the formula given below is used. Note that Uo is taken with the
minus sign as explained previously.

P  U 01 * I 01 *cos( 1)

IECEQUATION19108 V1 EN-US (Equation 197)

The index one in this equation indicates that only the fundamental frequency component signals are
used for the active power calculation. As mentioned previously -Uo is a constant for all EF IEDs in
the galvanically interconnected system, and consequently only the active fundamental frequency
current component Io*cos(ɸ) can be used to determine the direction of the EF.

Transformer protection RET670 669

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Figure 390 displays the method to derive the Io*cos(ɸ) component. Practically it is a part of Io
phasors which is in phase with -Uo phasor. This calculation is done at every execution of the
algorithm.

For fundamental frequency current phasor, only the Io*cos(ɸ) component has a useful physical
meaning. The Io*sin(ɸ) component is just a disturbing part of the input signal which can only cause
confusion and possible wrong operation of the transient EF IED if it is used. This is because when
multiple compensation coils are installed in the network, the flow of the reactive power in the zero-
sequence system is quite unpredictable.

‐Uo

Io

IEC19000936-1-en.vsdx

IEC19000936 V1 EN-US

Figure 390: Deriving Io*cos(ɸ) and Io*sin(ɸ) quantities from -Uo and Io phasors
Because the instantaneous Io*cos(ɸ) values will vary quite a lot during the transient an averaged
(that is integrated) value is used. This averaged power value will correspond to the actual energy
stored in the distributed capacitances. In the feeder where EF is located this averaged value will be
always positive, while in all healthy feeders this averaged value will be always negative. Thus, by
setting two simple current threshold levels (one positive and the second one negative) the direction
of the EF can be determined. The averaged Io*cos(ɸ) value is also given as a service value from the
APPTEF function in order to make easier testing and understanding of the function operation
principles (that is see signal IFUNDRE in Figure 395). This value can be recorded by the built in DR
and even be used to fine-tune the settings for the respective pickup levels.

An example how these signals may look like for an EF on a faulty feeder and on a healthy feeder are
given in Figure 391 and Figure 392 respectively.

670 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

IEC19000937 V1 EN-US

Figure 391: Example how waveforms and the active power signals may look like for a faulty
feeder

IEC19000938=IEC19000938=1=en-us=Original.vsdx

IEC19000938=IEC19000938=1=en-us=Original.vsdx
IEC19000938-1-en.vsdx

IEC19000938 V1 EN-US

Figure 392: Example how waveforms and the active power signals may look like for a healthy
feeder
Note that the presence of a grounding resistor is clearly visible in Figure 391b because the averaged
value of the Io*cos(ɸ) component do not drop to zero after the transient for a faulty feeder, but it
drops to zero for a healthy feeder as shown in Figure 392b.

The advantages of the averaged Io*cos(ɸ) method to detect the EF direction in high-impedance
grounded system are:

1. Simplicity, because only the active part of the fundamental frequency component of the Io
current phasor is used.
2. Use of the widely recognized protection principle Io*cos(ɸ).
3. Independence from the compensation degree, number of coils used and their physical location
in the protected network (Petersen coils do not consume active power).
4. Averaging (numerical integration) is performed continuously. No need to start/stop this
calculation process.
5. The Io*cos(ɸ) quantity will be approximately equal to zero during all operating conditions of the
protected network except during the transient charging process of the capacitors. Consequently,
it is relatively simple to determine when this quantity appears. As additional security measure it
can also be verified that this coincides with the jump of Uo voltage magnitude.
6. A low sampling rate is sufficient because only the fundamental frequency phasors of Uo and Io
are calculated from the input signal. A sampling rate of 20 samples per fundamental power
system cycle is enough for proper operation of the transient EF IED.

Transformer protection RET670 671

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

7. Raw samples of residual voltage and current are not at all directly used in the algorithm which
simplifies the overall design.
8. There are no angular accuracy issues because no angle-based criterion is used.
9. Separate operate levels for forward and reverse directions can be used.

9.19.7.2 Higher harmonic signals behavior during an EF in a high-impedance

grounded system GUID-EB54A5C5-1A92-480F-A048-8113AEE674EA v1

The energizing of a shunt capacitor in a power system is typically followed by relatively large current
and voltage transients which contains a lot of harmonics. When an EF happens the same holds true
for the zero-sequence circuit.

As shown in Figure 391, some damped oscillation is clearly visible in the Io signal at the beginning of
this EF. The frequency of that oscillation is determined by network parameters (that is L, R and C)
and is almost never an exact multiple of the fundamental frequency signal. The frequency of the
oscillating signal may vary from 100Hz up to theoretically 5kHz. In modern numerical IEDs typically
full-cycle filters (that is 20ms long filtering window in 50Hz power system) will be used to extract the
fundamental frequency phasors but, also higher harmonic phasors. The filtering time is quite short
and the oscillation signal during an EF will pass through this filter making it visible in some of the Io
current harmonic phasors.

For resonant grounded systems the total inductance of all coils is tuned to the distributed
capacitance of the overall power system only at the fundamental (rated) frequency. For all higher
harmonic signals the coils have a h2 times higher impedance than the corresponding capacitive
reactance, where h is the harmonic number. Already for the second harmonic component (h=2) the
compensation coils will have a 4 times higher impedance than distributed capacitances. Therefore all
coils can be omitted from the zero-sequence equivalent circuit shown in Figure 388 for all harmonic
components. A simplification is that all harmonic components in any high-impedance grounded
systems behave as the fundamental frequency component in an isolated power system.
Subsequently the Io*sin(ɸ) principle which is typically used in an isolated power system can be now
applied to all the higher order harmonic components irrespective of the actual type of the grounding
used in the protected network.

Since the higher harmonics will primarily be present during the transient part of the EF, these
harmonic components will behave in a similar transient way as previously explained for the
fundamental frequency Io*cos(ɸ) component. Consequently, the same integration principle can be
used to measure this transient harmonic reactive power exchange between the capacitors and the
harmonic source located at the fault point.

To simplify the IED calculations, the following sum is formed first, where all reactive power
components from all current harmonics are lumped together:

K
IOh *sin( h )
h2

IECEQUATION19109 V1 EN-US (Equation 198)

where K is the maximum harmonic component which can be measured by the relay. This summed
value is proportional to the total harmonic reactive power seen by the IED during an EF.

Since the summed instantaneous Io*sin(ɸ) harmonic values will vary quite a lot during a transient
period of the EF, the averaged (integrated) value is used. In the feeder where the EF is located this
averaged value will be positive, while in all feeders which see the EF in reverse, this averaged value
will be negative. By settings, two current threshold levels (one positive and the second negative), the
direction of the EF can be determined. Since everything is scaled back to current, even the same
pickup levels as for the active transient power part can be used.

672 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

The summed averaged Io*sin(ɸ) harmonic value is also given as a service value from the function
(see signal IHARMIM in Figure 395) to make testing and understanding of the function operation
principles easier. This value can be recorded by the built in disturbance recorder and even be used to
fine-tune the settings for the respective pickup levels.

Examples how these signals may look like for an EF on a faulty feeder and on a healthy feeder are
given in Figure 393 and Figure 394 respectively. Note that this is the same EF and feeders as shown
in Figure 391 and Figure 392.

IEC19000939=IEC19000939=1=en-us=Original.vsdx

IEC19000939-1-en.vsdx

IEC19000939-1-en.vsdx

IEC19000939 V1 EN-US

Figure 393: Example how waveforms and the summed harmonic reactive power signals may
look like for a faulty feeder

IEC19000940=IEC19000940=1=en-us=Original.vsdx

IEC19000939-1-en.vsdx

IEC19000940=IEC19000940=1=en-us=Original.vsdx

IEC19000940=IEC19000940=1=en-us=Original.vsdx

IEC19000940 V1 EN-US

Figure 394: Example how waveforms and the summed harmonic reactive power signals may
look like for a healthy feeder
Advantages of this harmonic based transient reactive power method to detect the EF direction in
high-impedance grounded system are:

1. Simplicity, because only the reactive part of the higher harmonic phasors of Io current is used.
2. Use of the widely recognized protection principle Io*sin(ɸ).
3. Independence from the compensation degree, number of coils used and their physical location
in the protected network (all coils are disregarded for harmonic calculations).
4. Averaging (that is numerical integration) is performed continuously. There is no need to start/
stop this calculation process.
5. The Ʃ(Ioh*sin(ɸh)) quantity will be approximately equal to zero during all operating conditions of
the protected network except during the transient period of the EF. Consequently, it is simple to
determine when this quantity appears. As an additional security measure, it can be verified that
this coincides with the jump of the fundamental frequency Uo voltage magnitude.

Transformer protection RET670 673

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

6. A low sampling rate is sufficient, because typically only up to and including the 5th harmonic is
required to be taken into calculation.
7. Raw samples of residual voltage and current are not at all directly used in the algorithm which
simplifies the overall design.
8. Separate operate levels for forward and reverse direction are possible.

9.19.7.3 Summary of the measurement principle for transient EF protection GUID-62E25B5D-2238-4D8C-B51B-A1C269005A7F v1

As explained in the previous two sections this transient EF protection function is based on two
principles:

1. Distribution of the active transient power at fundamental frequency, which is supplied from the
fault point to initially charge all distributed capacitances to ground in the zero-sequence system
at the moment of an EF inception in a high-impedance grounded network.
2. Distribution of the reactive transient power for higher harmonic components at the moment of an
EF inception in a high-impedance grounded network.

These two principles will hold true for any type of EF in a high-impedance grounded network,
including low-ohmic, high-ohmic, intermittent and restriking earth-faults. Consequently, this function is
able to operate for all of them.

Note that the neutral voltage Uo is common for all relays installed in the galvanically interconnected
system and typically the voltage measurement does not pose any problem for the IED operation.

It is not trivial to properly measure the residual current signal Io and extract the useful parts from it.
Due to this, use of complete current phasors for either fundamental frequency or higher harmonics
can be a problem and can lead to incorrect operation of the relays which are using complete current
phasors for measurement.

For fundamental frequency current phasor only the Io*cos(ɸ) component has useful physical
meaning, while the Io*sin(ɸ) component is just a disturbing part of the signal.

For all higher harmonic current phasors the situation is exactly the opposite. Io*sin(ɸ) is a useful
component with physical meaning, while the Io*cos(ɸ) component shall be avoided.

To achieve a stable and reliable signal, only the useful components of the current signal are
integrated in time. This makes these integral values proportional to the respective energy. However,
these integral values are scaled back to the measured current magnitude by using the moving
average method. Only the sign of this integral (positive or negative) during an EF is used in this
design to determine the direction of the earth fault. Some minimum (settable) magnitude level of the
integrated signal shall be exceeded for security reasons and to avoid any possible issues with IED
hardware accuracy. Using two independent measurement principles, the best practical results in
respect to dependability and security for the transient earth-fault protection will be ensured.

Figure 395 displays the overall simplified logic diagram for the APPTEF function.

674 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

a uormshigh
a > b
UN>  b

UNMAG *)
ioangle
ANGDIF *)
uoangle ‐
uofundamp
iofundamp
Continuous
Extract  ‐Uo1 Integration IFUNDRE
|Io1|*cos(ɸ1)
Fundamental Derive current 
(Averaging) 
active and  |Io1|*sin(ɸ1)
Extract  Io1 reactive part Continuous IFUNDIM
Fundamental
Integration
Invert (Averaging) 
Uo
Extract  ‐Uo2 a activepowerhigh
3Uo |Io2|*cos(ɸ2) a > b
2nd Harmonic Derive current  IMinForward  b
VT input active and 
Extract  Io2 |Io2|*sin(ɸ2)
reactive part a activepowerlow
2nd Harmonic a < b
IMinReverse 
‐1
x b

Extract  ‐Uo3 2% of IBase a activepoweralarm

3Io |Io3|*cos(ɸ3) a > b
3rd Harmonic Derive current  b
CT input active and  Continuous
Io3 |Io3|*sin(ɸ3)
rd
Extract 
3  Harmonic
reactive part
Ʃ  Integration
(Averaging) 
a
b
a > b reactivepowerhigh

a reactivepowerlow
a < b
Extract  ‐Uo5 b
|Io5|*cos(ɸ5)
5th Harmonic Derive current 
active and  |Io5|*sin(ɸ5) IHARMIM
Extract  Io5 reactive part
5th Harmonic
INRMS *)
5 cycles
Io True RMS
a     t iormshigh
Filter a > b
IN>  b

*) shown only in PCM600 Monitoring Tool and LHMI
IEC19000941-1-en.vsdx

IEC19000941 V1 EN-US

Figure 395: Simplified logic for measurement part of the APPTEF function
Service values for 3Uo magnitude, 3Io magnitude and angle between them are only displayed in the
Monitoring Tool and LHMI, in order to facilitate function testing and commissioning.

The integrated value of the fundamental frequency Io*sin(ɸ) reactive part (IFUNDIM ) is not used in
the function but is provided as a service value. This enables the end user for easier understanding of
the flow of reactive power in the zero-sequence circuit during an EF in a complex sub-transmission
network configurations when several compensation coils are used which are geographically spread-
out throughout the system.

The output signals displayed in Figure 395 with small letters are only used in
simplified logic diagrams which are given below. These signals are not available
outside of the function.

9.19.7.4 Simplified Boolean logic diagrams GUID-FBFE197C-5916-4736-B97C-1E301AE2D9E3 v1

After performing the measurement of the two averaged power components, the following Boolean
logics are used to derive required binary outputs from the transient EF protection function.

Residual over-voltage start logic and function overall reset logic GUID-C68D706F-BABC-48E2-B5E0-98A26121C09C v1
The residual over-voltage start signal is internally used in the APPTEF function to arm the function to
operate in case of an EF.

Note that this voltage signal defines when the function resets internally as well.

Transformer protection RET670 675

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

BLOCK block

stunwindow
2.5 cycles AND

STUN
AND
tStart
     stun
t tStartOn

tReset      20ms

uormshigh
t
AND

RESET 5ms
From LHMI reset
IEC61850 Command OR OR
almcc

IEC19000942-1-en.vsdx

IEC19000942 V1 EN-US

Figure 396: Residual over-voltage start logic and reset logic

Intermittent start logic GUID-A4A737BB-3385-4855-95F8-8961B4134587 v1

This logic will enable operation of the function in case of an intermittent EF when the residual over-
voltage start will not be able to do that due to short duration of STUN signal.

20ms
stfw Counter
AND Set CounterLimit
stun reset Reached STIEF
Reset block AND
UN>StartsNo CounterLimit

stief

IEC19000943-1-en.vsdx

IEC19000943 V1 EN-US

Figure 397: Intermittent EF start logic

Forward Start and Trip logic of the function GUID-D7606A7E-9D34-4A83-9A0F-F5C885509316 v1

The following logic diagram shows how the binary signals WRNFW, STFW and TRIP are derived.

uofundamp High = 600ms

iofundamp Impedance t
Fault 50ms
activepoweralarm stun
almciri Logic block WRNFW
AND

activepowerhigh
OR
reactivepowerhigh

stunwindow stfw
iormshigh AND
almcc S AND
reset RS
R STFW
tPulseMin OR

stief
tStartOn OR
tTrip
TRIP
t OR
AND
OperationMode = Start and Trip tPulseMin

BLKTR AND

IEC19000944-1-en.vsdx

IEC19000944 V1 EN-US

Figure 398: Start and Trip logic for an EF in forward direction

Reverse start logic of the function GUID-BA6416AB-C991-4F77-B919-1C4ACD98F7A8 v1

The following logic diagram shows how the binary signal STRV is derived.

676 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 9
Current protection

stunwindow
activepowerlow
reactivepowerlow OR
iormshigh AND
almcc
stfw
S
reset RS
R
stief
tStartOn OR AND STRV
OR
block tPulseMin
stun

IEC19000945-1-en.vsdx

IEC19000945 V1 EN-US

Figure 399: Start logic for an EF in reverse direction

Cross country detection logic GUID-54722D7C-F36C-4DF9-9C50-64E738D52BF3 v1

The following logic diagram shows the implementation of cross country fault logic.

     tCC
OperationCC = On 200ms    
t
iofundamp AND t ALMCC
a reset AND AND
a > b block
CrossCntry_IN> b
almcc

IEC19000946-1-en.vsdx

IEC19000946 V1 EN-US

Figure 400: Cross country fault logic

Note that the operation of this logic unconditionally resets either the STFW or STRV signal.

Circulating current detection logic GUID-5405CC9B-96AB-4F07-B4E9-E9031127E185 v1

The following logic diagram shows the implementation of circulating current logic.

tCircIN
    
iofundamp 500ms     block
a t
a > b reset t ALMCIRI
Circulate_IN> b AND AND

200ms
    
activepowerhigh
t
activepowerlow OR AND OR
stun

almciri

IEC19000947-1-en.vsdx

IEC19000947 V1 EN-US

Figure 401: Circulating current detection logic

Circulating residual current may appear in a meshed high-impedance grounded network. It will be
mostly of a reactive nature. However, if the above logic operates due to the presence of some active
current component in the fundamental frequency circulating current, then the pickup for the
integrated active power component of the fundamental frequency residual current is altered. This is
done to prevent possible mal-operation of the function. If the ALMCIRI signal becomes active the end
user shall try to rectify this problem in the primary system as this may influence proper operation of
the transient EF protection. Especially, the operation of the APPTEF function for high ohmic EF will
become much more difficult.
GUID-BCCA5F2D-9FF7-4188-9B5D-DA05E8E80CC0 v1

Table 415: Average Power Transient Earth Fault Protection APPTEF

Function Range or value Accuracy

Minimum operate level for residual (5-80)% of UBase ±0.5% of Ur
overvoltage 3Uo> start condition "UN>"
Reset ratio for residual overvoltage 3Uo> > 75% -
Operate time for residual overvoltage 3Uo> Min. = 5 ms -
at 0 to 2 x Uset Max. = 15 ms

Table continues on next page

Transformer protection RET670 677

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 9 1MRK 504 164-UEN Rev. N
Current protection

Function Range or value Accuracy

Minimum threshold level for residual (3-100)% of lBase ±1.5% of Ir
overcurrent start condition "IN>"
Minimum operate level for integrated current (2.0-100.0)% of lBase ±1.5% of Ir
to declare the forward direction
"IMinForward”
Minimum operate level for integrated current (2.0-100.0)% of lBase ±1.5% of Ir
to declare the reverse direction
"IMinReverse"
Minimum time delay to declare EF direction (0.04-2.00) s ±0.2% or ±25 ms whichever is
"tStart" greater
Minimum trip time delay "tTrip" (0.00-20.00) s ±0.2% or ±25 ms whichever is
greater
Minimum pulse length duration for trip and/or (0.02-1.00) s ±0.2% or ±10 ms whichever is
start outputs "tPulseMin" greater
Operate 3Io current level for cross country (20-1000)% of lBase ±1.0% of Ir at I ≤ Ir
fault detection "CrossCntry_IN>" ±1.0% of I at I > Ir
Time delay to activate cross country fault (0.02-1.00) s ±0.2% or ±25 ms whichever is
detection "tCC" at 0 to 2 x Iset greater

Drop off time delay to de-activate cross Fixed 0.2 s ±0.2% or ±25 ms whichever is
country fault detection at 2 x Iset to 0 greater

Operate 3Io current level for circulating (2-200)% of lBase ±1.0% of Ir at I ≤ Ir

current detection "Circulate_IN>" ±1.0% of I at I > Ir
Time delay to activate circulating current (5.0-60.0) s ±0.2% or ±25 ms whichever is
detection "tCircIN" at 0 to 2 x Iset greater

Drop off time delay to de-activate circulating Fixed 0.5 s ±0.2% or ±25 ms whichever is
current detection at 2 x Iset to 0 greater

678 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

Section 10 Voltage protection

10.1 Two step undervoltage protection UV2PTUV IP14544-1 v3

10.1.1 Identification
M16876-1 v7

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Two step undervoltage protection UV2PTUV 27

3U<

V2 EN-US
SYMBOL-R-2U-GREATER-THAN

10.1.2 Functionality M13789-3 v14

Undervoltages can occur in the power system during faults or abnormal conditions. The two-step
undervoltage protection function (UV2PTUV) can be used to open circuit breakers to prepare for
system restoration at power outages or as a long-time delayed back-up to the primary protection.

UV2PTUV has two voltage steps, each with inverse or definite time delay.

It has a high reset ratio to allow settings close to the system service voltage.

10.1.3 Function block M13794-3 v7

UV2PTUV
U3P* TRIP
BLOCK TR1
BLKTR1 TR1L1
BLKST1 TR1L2
BLKTR2 TR1L3
BLKST2 TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3

IEC06000276-2-en.vsd
IEC06000276 V2 EN-US

Figure 402: UV2PTUV function block

Transformer protection RET670 679

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

10.1.4 Signals
PID-3586-INPUTSIGNALS v7

Table 416: UV2PTUV Input signals

Name Type Default Description

U3P GROUP - Three phase voltages
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTR1 BOOLEAN 0 Block of operate signal, step 1
BLKST1 BOOLEAN 0 Block of step 1
BLKTR2 BOOLEAN 0 Block of operate signal, step 2
BLKST2 BOOLEAN 0 Block of step 2

PID-3586-OUTPUTSIGNALS v7

Table 417: UV2PTUV Output signals

Name Type Description

TRIP BOOLEAN Trip
TR1 BOOLEAN Common trip signal from step1
TR1L1 BOOLEAN Trip signal from step1 phase L1
TR1L2 BOOLEAN Trip signal from step1 phase L2
TR1L3 BOOLEAN Trip signal from step1 phase L3
TR2 BOOLEAN Common trip signal from step2
TR2L1 BOOLEAN Trip signal from step2 phase L1
TR2L2 BOOLEAN Trip signal from step2 phase L2
TR2L3 BOOLEAN Trip signal from step2 phase L3
START BOOLEAN General start signal
ST1 BOOLEAN Common start signal from step1
ST1L1 BOOLEAN Start signal from step1 phase L1
ST1L2 BOOLEAN Start signal from step1 phase L2
ST1L3 BOOLEAN Start signal from step1 phase L3
ST2 BOOLEAN Common start signal from step2
ST2L1 BOOLEAN Start signal from step2 phase L1
ST2L2 BOOLEAN Start signal from step2 phase L2
ST2L3 BOOLEAN Start signal from step2 phase L3

680 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

10.1.5 Settings
PID-3586-SETTINGS v7

Table 418: UV2PTUV Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OperationStep1 Off - - On Enable execution of step 1
On
Characterist1 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A step 1
Inverse curve B
Prog. inv. curve
OpMode1 1 out of 3 - - 1 out of 3 Number of phases required for op (1 of
2 out of 3 3, 2 of 3, 3 of 3) from step 1
3 out of 3
U1< 1.0 - 100.0 %UB 0.1 70.0 Voltage setting/start val (DT & IDMT) in
% of UBase, step 1
t1 0.00 - 6000.00 s 0.01 5.00 Definitive time delay of step 1
t1Min 0.000 - 60.000 s 0.001 5.000 Minimum operate time for inverse curves
for step 1
k1 0.05 - 1.10 - 0.01 0.05 Time multiplier for the inverse time delay
for step 1
IntBlkSel1 Off - - Off Internal (low level) blocking mode, step 1
Block of trip
Block all
IntBlkStVal1 1 - 50 %UB 1 20 Voltage setting for internal blocking in %
of UBase, step 1
tBlkUV1 0.000 - 60.000 s 0.001 0.000 Time delay of internal (low level)
blocking for step 1
HystAbs1 0.0 - 50.0 %UB 0.1 0.5 Absolute hysteresis in % of UBase, step
1
OperationStep2 Off - - On Enable execution of step 2
On
Characterist2 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A step 2
Inverse curve B
Prog. inv. curve
OpMode2 1 out of 3 - - 1 out of 3 Number of phases required for op (1 of
2 out of 3 3, 2 of 3, 3 of 3) from step 2
3 out of 3
U2< 1.0 - 100.0 %UB 0.1 50.0 Voltage setting/start val (DT & IDMT) in
% of UBase, step 2
t2 0.000 - 60.000 s 0.001 5.000 Definitive time delay of step 2
t2Min 0.000 - 60.000 s 0.001 5.000 Minimum operate time for inverse curves
for step 2
k2 0.05 - 1.10 - 0.01 0.05 Time multiplier for the inverse time delay
for step 2
IntBlkSel2 Off - - Off Internal (low level) blocking mode, step 2
Block of trip
Block all
Table continues on next page

Transformer protection RET670 681

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

Name Values (Range) Unit Step Default Description

IntBlkStVal2 1 - 50 %UB 1 20 Voltage setting for internal blocking in %
of UBase, step 2
tBlkUV2 0.000 - 60.000 s 0.001 0.000 Time delay of internal (low level)
blocking for step 2
HystAbs2 0.0 - 50.0 %UB 0.1 0.5 Absolute hysteresis in % of UBase, step
2

Table 419: UV2PTUV Group settings (advanced)

Name Values (Range) Unit Step Default Description

tReset1 0.000 - 60.000 s 0.001 0.025 Reset time delay used in IEC Definite
Time curve step 1
ResetTypeCrv1 Instantaneous - - Instantaneous Selection of used IDMT reset curve type
Frozen timer for step 1
Linearly decreased
tIReset1 0.000 - 60.000 s 0.001 0.025 Time delay in IDMT reset (s), step 1
ACrv1 0.005 - 200.000 - 0.001 1.000 Parameter A for customer programmable
curve for step 1
BCrv1 0.50 - 100.00 - 0.01 1.00 Parameter B for customer programmable
curve for step 1
CCrv1 0.0 - 1.0 - 0.1 0.0 Parameter C for customer
programmable curve for step 1
DCrv1 0.000 - 60.000 - 0.001 0.000 Parameter D for customer
programmable curve for step 1
PCrv1 0.000 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 1
CrvSat1 0 - 100 % 1 0 Tuning param for prog. under voltage
IDMT curve, step 1
tReset2 0.000 - 60.000 s 0.001 0.025 Reset time delay used in IEC Definite
Time curve step 2
ResetTypeCrv2 Instantaneous - - Instantaneous Selection of used IDMT reset curve type
Frozen timer for step 2
Linearly decreased
tIReset2 0.000 - 60.000 s 0.001 0.025 Time delay in IDMT reset (s), step 2
ACrv2 0.005 - 200.000 - 0.001 1.000 Parameter A for customer programmable
curve for step 2
BCrv2 0.50 - 100.00 - 0.01 1.00 Parameter B for customer programmable
curve for step 2
CCrv2 0.0 - 1.0 - 0.1 0.0 Parameter C for customer
programmable curve for step 2
DCrv2 0.000 - 60.000 - 0.001 0.000 Parameter D for customer
programmable curve for step 2
PCrv2 0.000 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 2
CrvSat2 0 - 100 % 1 0 Tuning param for prog. under voltage
IDMT curve, step 2

682 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

Table 420: UV2PTUV Non group settings (basic)

Name Values (Range) Unit Step Default Description

ConnType PhN DFT - - PhN DFT Group selector for connection type
PhPh RMS
PhN RMS
PhPh DFT
GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

10.1.6 Monitored data

PID-3586-MONITOREDDATA v6

Table 421: UV2PTUV Monitored data

Name Type Values (Range) Unit Description

UL1 REAL - kV Voltage in phase L1
UL2 REAL - kV Voltage in phase L2
UL3 REAL - kV Voltage in phase L3

10.1.7 Operation principle M15326-3 v11

Two-step undervoltage protection (UV2PTUV) is used to detect low power system voltage. If one,
two or three phase voltages decrease below the set value, a corresponding START signal is
generated. The parameters OpMode1 and OpMode2 influence the requirements to activate the
START outputs: the measured voltages 1 out of 3, 2 out of 3, or 3 out of 3 have to be lower than the
corresponding set point to issue the corresponding START signal.

UV2PTUV has two voltage-measuring steps with separate time delays. If the voltage remains below
the set value for the chosen time delay, the corresponding trip signal is issued. To avoid an unwanted
trip due to the disconnection of the related high-voltage equipment, a voltage-controlled blocking of
the function is available: if the voltage is lower than the set blocking level, the function is blocked and
no START or TRIP signal is generated. The time delay characteristic is individually chosen for each
step and can be either definite time delay or inverse time delay.

To avoid oscillations of the output START signal, a hysteresis has been included.

10.1.7.1 Measurement principle M15326-6 v7

Depending on the value of the ConnType parameter, UV2PTUV can be set to measure phase-to-
earth fundamental value, phase-to-phase fundamental value, phase-to-earth true RMS value or
phase-to-phase true RMS value, and compares it against the set values, U1< and U2<. The voltage-
related settings are made in percentage of the base voltage which is set in kV phase-to-phase
voltage. This means operation for phase-to-earth voltage under:

UBase(kV )
U (%) ·
3
EQUATION1429 V3 EN-US (Equation 199)

and operation for phase-to-phase voltage under:

U < (%) × UBase(kV)

EQUATION1990 V1 EN-US (Equation 200)

Transformer protection RET670 683

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

When the phase-to-earth voltage measurement is selected, the function

automatically introduces division of the base value by the square root of three.

10.1.7.2 Time delay M15326-10 v13

The time delay for the two steps can be either definite time delay (DT) or inverse time delay (IDMT).
For the inverse time delay three different modes are available:

• inverse curve A
• inverse curve B
• customer programmable inverse curve

The type A curve is described as:

k
t=
æ Un < -U ö
ç ÷
è Un < ø
EQUATION1431 V2 EN-US (Equation 201)

where:
Un< Set value for step 1 and step 2
U Measured voltage

The type B curve is described as:

k × 480
t= 2.0
+ 0.055
æ Un < - U ö
ç 32 × - 0.5 ÷
è Un < ø
EQUATION1432 V2 EN-US (Equation 202)

The customer programmable curve can be created as:

é ù
ê ú
ê k×A ú
t=ê pú
+D
ê æ Un < - U ö ú
êçB × -C÷ ú
ëè Un < ø û
EQUATION1433 V2 EN-US (Equation 203)

When the denominator in the expression is equal to zero the time delay will be infinity. There will be
an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this
phenomenon. In the voltage interval Un< down to Un< · (1.0 – CrvSatn/100) the used voltage will be:
Un< · (1.0 – CrvSatn/100). If the programmable curve is used this parameter must be calculated so
that:

CrvSatn
B× -C > 0
100
EQUATION1435 V1 EN-US (Equation 204)

684 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

The lowest voltage is always used for the inverse time delay integration. The details of the different
inverse time characteristics are shown in section "Inverse characteristics".

Voltage

UL1
UL2
UL3

IDMT Voltage

Time

IEC12000186-1-en.vsd

IEC12000186 V1 EN-US

Figure 403: Voltage used for the inverse time characteristic integration
Trip signal issuing requires that the undervoltage condition continues for at least the user set time
delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by some
special voltage level dependent time curves for the inverse time mode (IDMT). If the start condition,
with respect to the measured voltage, ceases during the delay time, and is not fulfilled again within a
user-defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 pickup
for the inverse time) the corresponding start output is reset. After leaving the hysteresis area, the
start condition must be fulfilled again and it is not sufficient for the signal to only return back to the
hysteresis area. For the undervoltage function the IDMT reset time is constant and does not depend
on the voltage fluctuations during the drop-off period. However, there are three ways to reset the
timer: the timer is reset instantaneously, the timer value is frozen during the reset time, or the timer
value is linearly decreased during the reset time. See figure 404 and figure 405.

Transformer protection RET670 685

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

tIReset1
Voltage Measured
START Voltage
HystAbs1
TRIP

U1<

Time

START

TRIP

Time
Integrator Frozen Timer

Time
Linearly
Instantaneous
decreased IEC05000010-5-en.vsdx

IEC05000010 V5 EN-US

Figure 404: Voltage profile not causing a reset of the START signal for step 1, and inverse time delay at
different reset types

686 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

tIReset1
Voltage
START
START
HystAbs1 Measured Voltage
TRIP

U1<

Time

START t

TRIP

Time
Integrator Frozen Timer

Time
Instantaneous Linearly decreased
IEC05000011-en-4.vsdx

IEC05000011 V4 EN-US

Figure 405: Voltage profile causing a reset of the START signal for step 1, and inverse time delay at different
reset types
Definite timer delay

When definite time delay is selected the function will operate as shown in figure 406. Detailed
information about individual stage reset/operation behavior is shown in figure 407 and figure 408
respectively. Note that by setting tResetn = 0.0s, instantaneous reset of the definite time delayed
stage is ensured.

Transformer protection RET670 687

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

ST1

U t1
a tReset1
TR1
t
a<b t
U1< R
b
AND

IEC09000785-3-en.vsd
IEC09000785 V3 EN-US

Figure 406: Logic diagram for step 1, DT operation

U1<

ST1

TR1

tReset1

t1

IEC10000039-3-en.vsd
IEC10000039 V3 EN-US

Figure 407: Example for Definite Time Delay stage1 reset

U1<

ST1

TR1

tReset1

t1

IEC10000040-3-en.vsd
IEC10000040 V3 EN-US

Figure 408: Example for Definite Time Delay stage1 operation

688 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

10.1.7.3 Blocking M15326-20 v9

It is possible to block Two step undervoltage protection UV2PTUV partially or completely, by binary
input signals or by parameter settings, where:

BLOCK: blocks all outputs

BLKTR1: blocks all trip outputs of step 1
BLKST1: blocks all start and trip outputs related to step 1
BLKTR2: blocks all trip outputs of step 2
BLKST2: blocks all start and trip outputs related to step 2

If the measured voltage level decreases below the setting of IntBlkStVal1, either the trip output of
step 1, or both the trip and the START outputs of step 1, are blocked. The characteristic of the
blocking is set by the IntBlkSel1 parameter. This internal blocking can also be set to Off resulting in
no voltage based blocking. Corresponding settings and functionality are valid also for step 2.

In case of disconnection of the high voltage component the measured voltage will get very low. The
event will START both the under voltage function and the blocking function, as seen in figure 409.
The delay of the blocking function must be set less than the time delay of under voltage function.

U Disconnection

Normal voltage

U1<

U2<

tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2

Time

Block step 1

Block step 2
en05000466.vsd
IEC05000466 V1 EN-US

Figure 409: Blocking function

Transformer protection RET670 689

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

10.1.7.4 Design M15326-35 v10

The voltage measuring elements continuously measure the three phase-to-neutral voltages or the
three phase-to-phase voltages. Recursive fourier filters or true RMS filters of input voltage signals
are used. The voltages are individually compared to the set value, and the lowest voltage is used for
the inverse time characteristic integration. A special logic is included to achieve the 1 out of 3, 2 out
of 3 and 3 out of 3 criteria to fulfill the START condition. The design of Two step undervoltage
protection UV2PTUV is schematically shown in Figure 410.

UL1 Comparator ST1L1

UL1 < U1< Voltage Phase Phase 1
Selector
OpMode1 ST1L2
UL2 Comparator Phase 2
1 out of 3
UL2 < U1< 2 out of 3 ST1L3
3 out of 3 Phase 3 Start t1
UL3 Comparator t1Reset
UL3 < U1< IntBlkStVal1 &
OR ST1
Trip
Output
START Logic TR1L1

Step 1 TR1L2
Time integrator TRIP
MinVoltSelector tIReset1
ResetTypeCrv1 TR1L3

TR1
OR

Comparator ST2L1
UL1 < U2< Voltage Phase Phase 1
Selector
OpMode2 ST2L2
Comparator Phase 2
UL2 < U2< 1 out of 3
2 out of 3 Start t2 ST2L3
3 out of 3 Phase 3 t2Reset
Comparator IntBlkStVal2 &
UL3 < U2< Trip ST2
Output OR
Logic
START TR2L1

Step 2
TR2L2
Time integrator TRIP
MinVoltSelector tIReset2
ResetTypeCrv2 TR2L3

TR2
OR
START
OR

TRIP
OR

IEC05000834-2-en.vsd
IEC05000834 V2 EN-US

Figure 410: Schematic design of Two step undervoltage protection UV2PTUV

690 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

10.1.8 Technical data IP13001-1 v1

M13290-1 v16

Table 422: UV2PTUV technical data

Function Range or value Accuracy

Operate voltage, low and high step (1.0–100.0)% of UBase ±0.5% of Ur

Absolute hysteresis (0.0–50.0)% of UBase ±0.5% of Ur

Internal blocking level, step 1 and step 2 (1–50)% of UBase ±0.5% of Ur

Inverse time characteristics for step 1 - See table 1303

and step 2, see table 1303
Definite time delay, step 1 at 1.2 x Uset to (0.00-6000.00) s ±0.2% or ±40ms whichever is greater
0
Definite time delay, step 2 at 1.2 x Uset to (0.000-60.000) s ±0.2% or ±40ms whichever is greater
0
Minimum operate time, inverse (0.000–60.000) s ±0.5% or ±40ms whichever is greater
characteristics
Operate time, start at 2 x Uset to 0 Min. = 15 ms -
Max. = 30 ms
Reset time, start at 0 to 2 x Uset Min. = 15 ms -
Max. = 30 ms
Operate time, start at 1.2 x Uset to 0 Min. = 5 ms -
Max. = 25 ms
Reset time, start at 0 to 1.2 x Uset Min. = 15 ms -
Max. = 35 ms
Critical impulse time 5 ms typically at 1.2 x Uset to 0 -

Impulse margin time 15 ms typically -

10.2 Two step overvoltage protection OV2PTOV IP14545-1 v3

10.2.1 Identification
M17002-1 v8

Function description IEC 61850 IEC 60617 identification ANSI/IEEE C37.2

identification device number
Two step overvoltage protection OV2PTOV 59

3U>

SYMBOL-C-2U-SMALLER-THAN V2 EN-US

10.2.2 Functionality OV2PTOV M13798-3 v17

Overvoltages may occur in the power system during abnormal conditions such as sudden power
loss, tap changer regulating failures, and open line ends on long lines.

Two step overvoltage protection (OV2PTOV) function can be used to detect open line ends, normally
then combined with a directional reactive over-power function to supervise the system voltage. When
triggered, the function will cause an alarm, switch in reactors, or switch out capacitor banks.

OV2PTOV has two voltage steps, each of them with inverse or definite time delayed.

Transformer protection RET670 691

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

OV2PTOV has a high reset ratio to allow settings close to system service voltage.

10.2.3 Function block M13803-3 v6

OV2PTOV
U3P* TRIP
BLOCK TR1
BLKTR1 TR1L1
BLKST1 TR1L2
BLKTR2 TR1L3
BLKST2 TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3

IEC06000277-2-en.vsd
IEC06000277 V2 EN-US

Figure 411: OV2PTOV function block

10.2.4 Signals
PID-3535-INPUTSIGNALS v7

Table 423: OV2PTOV Input signals

Name Type Default Description

U3P GROUP - Group signal for three phase voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTR1 BOOLEAN 0 Block of operate signal, step 1
BLKST1 BOOLEAN 0 Block of step 1
BLKTR2 BOOLEAN 0 Block of operate signal, step 2
BLKST2 BOOLEAN 0 Block of step 2

PID-3535-OUTPUTSIGNALS v7

Table 424: OV2PTOV Output signals

Name Type Description

TRIP BOOLEAN Trip
TR1 BOOLEAN Common trip signal from step1
TR1L1 BOOLEAN Trip signal from step1 phase L1
TR1L2 BOOLEAN Trip signal from step1 phase L2
TR1L3 BOOLEAN Trip signal from step1 phase L3
TR2 BOOLEAN Common trip signal from step2
TR2L1 BOOLEAN Trip signal from step2 phase L1
TR2L2 BOOLEAN Trip signal from step2 phase L2
TR2L3 BOOLEAN Trip signal from step2 phase L3
START BOOLEAN General start signal
ST1 BOOLEAN Common start signal from step1
Table continues on next page

692 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

Name Type Description

ST1L1 BOOLEAN Start signal from step1 phase L1
ST1L2 BOOLEAN Start signal from step1 phase L2
ST1L3 BOOLEAN Start signal from step1 phase L3
ST2 BOOLEAN Common start signal from step2
ST2L1 BOOLEAN Start signal from step2 phase L1
ST2L2 BOOLEAN Start signal from step2 phase L2
ST2L3 BOOLEAN Start signal from step2 phase L3

10.2.5 Settings
PID-3535-SETTINGS v7

Table 425: OV2PTOV Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OperationStep1 Off - - On Enable execution of step 1
On
Characterist1 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A step 1
Inverse curve B
Inverse curve C
Prog. inv. curve
OpMode1 1 out of 3 - - 1 out of 3 Number of phases required for op (1 of
2 out of 3 3, 2 of 3, 3 of 3) from step 1
3 out of 3
U1> 1.0 - 200.0 %UB 0.1 120.0 Voltage setting/start val (DT & IDMT) in
% of UBase, step 1
t1 0.00 - 6000.00 s 0.01 5.00 Definitive time delay of step 1
t1Min 0.000 - 60.000 s 0.001 5.000 Minimum operate time for inverse curves
for step 1
k1 0.05 - 1.10 - 0.01 0.05 Time multiplier for the inverse time delay
for step 1
HystAbs1 0.0 - 50.0 %UB 0.1 0.5 Absolute hysteresis in % of UBase, step
1
OperationStep2 Off - - On Enable execution of step 2
On
Characterist2 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A step 2
Inverse curve B
Inverse curve C
Prog. inv. curve
OpMode2 1 out of 3 - - 1 out of 3 Number of phases required for op (1 of
2 out of 3 3, 2 of 3, 3 of 3) from step 2
3 out of 3
U2> 1.0 - 200.0 %UB 0.1 150.0 Voltage setting/start val (DT & IDMT) in
% of UBase, step 2
t2 0.000 - 60.000 s 0.001 5.000 Definitive time delay of step 2
Table continues on next page

Transformer protection RET670 693

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

Name Values (Range) Unit Step Default Description

t2Min 0.000 - 60.000 s 0.001 5.000 Minimum operate time for inverse curves
for step 2
k2 0.05 - 1.10 - 0.01 0.05 Time multiplier for the inverse time delay
for step 2
HystAbs2 0.0 - 50.0 %UB 0.1 0.5 Absolute hysteresis in % of UBase, step
2

Table 426: OV2PTOV Group settings (advanced)

Name Values (Range) Unit Step Default Description

tReset1 0.000 - 60.000 s 0.001 0.025 Reset time delay used in IEC Definite
Time curve step 1
ResetTypeCrv1 Instantaneous - - Instantaneous Selection of used IDMT reset curve type
Frozen timer for step 1
Linearly decreased
tIReset1 0.000 - 60.000 s 0.001 0.025 Time delay in IDMT reset (s), step 1
ACrv1 0.005 - 200.000 - 0.001 1.000 Parameter A for customer programmable
curve for step 1
BCrv1 0.50 - 100.00 - 0.01 1.00 Parameter B for customer programmable
curve for step 1
CCrv1 0.0 - 1.0 - 0.1 0.0 Parameter C for customer
programmable curve for step 1
DCrv1 0.000 - 60.000 - 0.001 0.000 Parameter D for customer
programmable curve for step 1
PCrv1 0.000 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 1
CrvSat1 0 - 100 % 1 0 Tuning param for prog. over voltage
IDMT curve, step 1
tReset2 0.000 - 60.000 s 0.001 0.025 Reset time delay used in IEC Definite
Time curve step 2
ResetTypeCrv2 Instantaneous - - Instantaneous Selection of used IDMT reset curve type
Frozen timer for step 2
Linearly decreased
tIReset2 0.000 - 60.000 s 0.001 0.025 Time delay in IDMT reset (s), step 2
ACrv2 0.005 - 200.000 - 0.001 1.000 Parameter A for customer programmable
curve for step 2
BCrv2 0.50 - 100.00 - 0.01 1.00 Parameter B for customer programmable
curve for step 2
CCrv2 0.0 - 1.0 - 0.1 0.0 Parameter C for customer
programmable curve for step 2
DCrv2 0.000 - 60.000 - 0.001 0.000 Parameter D for customer
programmable curve for step 2
PCrv2 0.000 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 2
CrvSat2 0 - 100 % 1 0 Tuning param for prog. over voltage
IDMT curve, step 2

694 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

Table 427: OV2PTOV Non group settings (basic)

Name Values (Range) Unit Step Default Description

ConnType PhN DFT - - PhN DFT Group selector for connection type
PhPh DFT
PhN RMS
PhPh RMS
GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

10.2.6 Monitored data

PID-3535-MONITOREDDATA v6

Table 428: OV2PTOV Monitored data

Name Type Values (Range) Unit Description

UL1 REAL - kV Voltage in phase L1
UL2 REAL - kV Voltage in phase L2
UL3 REAL - kV Voltage in phase L3

10.2.7 Operation principle M15330-3 v11

Two step overvoltage protection OV2PTOV is used to detect high power system voltage. OV2PTOV
has two steps with separate time delays. If one-, two- or three-phase voltages increase above the set
value, a corresponding START signal is issued. OV2PTOV can be set to START/TRIP, based on 1
out of 3, 2 out of 3 or 3 out of 3 of the measured voltages, being above the set point. If the voltage
remains above the set value for a time period corresponding to the chosen time delay, the
corresponding trip signal is issued.

The time delay characteristic is individually chosen for the two steps, and can be either definite time
or inverse time delayed.

The voltage related settings are made in percent of the global set base voltage UBase, which is set
in kV, phase-to-phase.

OV2PTOV can be set to measure phase-to-earth fundamental value, phase-to-phase fundamental

value, phase-to-earth RMS value or phase-to-phase RMS value. The choice of measuring is done by
the parameter ConnType.

The setting of the analog inputs are given as primary phase-to-earth or phase-to-phase voltage.
OV2PTOV will operate if the voltage gets higher than the set percentage of the set base voltage
UBase. This means operation for phase-to-earth voltage over:

U > (%) × UBase( kV )

3
EQUATION1434 V1 EN-US (Equation 205)

and operation for phase-to-phase voltage over:

U > (%) × UBase(kV)

EQUATION1993 V1 EN-US (Equation 206)

When phase-to-earth voltage measurement is selected the function automatically

introduces division of the base value by the square root of three.

Transformer protection RET670 695

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

10.2.7.1 Measurement principle M15330-6 v6

All the three voltages are measured continuously, and compared with the set values, U1> for Step 1
and U2> for Step 2. The parameters OpMode1 and OpMode2 influence the requirements to activate
the START outputs. Either 1 out of 3, 2 out of 3 or 3 out of 3 measured voltages have to be higher
than the corresponding set point to issue the corresponding START signal.

To avoid oscillations of the output START signal, a hysteresis is included.

10.2.7.2 Time delay M15330-10 v12

The time delay for the two steps can be either definite time delay (DT) or inverse time delay (IDMT).
For the inverse time delay four different modes are available:

• inverse curve A
• inverse curve B
• inverse curve C
• customer programmable inverse curve

The type A curve is described as:

k
t=
æ U - Un > ö
ç ÷
è Un > ø
IECEQUATION2422 V1 EN-US (Equation 207)

where:
Un> Set value for step 1 and step 2
U Measured voltage

The type B curve is described as:

k  480
t 2.0
 0.035
 U  Un  
 32   0.5 
 Un  

IECEQUATION2423 V2 EN-US (Equation 208)

The type C curve is described as:

k × 480
t= 3.0
+ 0.035
æ U - Un > ö
ç 32 × - 0.5 ÷
è Un > ø
IECEQUATION2425 V1 EN-US (Equation 209)

The customer programmable curve is defined by the below equation, where A, B, C, D, k and p are
settings:

696 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

k×A
t= p
+D
æ U -Un > ö
çB× -C÷
è Un > ø
EQUATION1439 V2 EN-US (Equation 210)

When the denominator in the expression is equal to zero the time delay will be infinity. There will be
an undesired discontinuity. Therefore, a tuning parameter CrvSatn is set to compensate for this
phenomenon. In the voltage interval Un> up to Un> · (1.0 + CrvSatn/100) the used voltage will be:
Un> · (1.0 + CrvSatn/100). If the programmable curve is used this parameter must be calculated so
that:

CrvSatn
B× -C > 0
100
EQUATION1435 V1 EN-US (Equation 211)

The highest phase (or phase-to-phase) voltage is always used for the inverse time delay integration,
see figure 412. The details of the different inverse time characteristics are shown in section "Inverse
characteristics".

Voltage
IDMT Voltage

UL1
UL2
UL3

Time

IEC05000016-2-en.vsd
IEC05000016 V2 EN-US

Figure 412: Voltage used for the inverse time characteristic integration
Operation of the trip signal requires that the overvoltage condition continues for at least the user set
time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by
selected voltage level dependent time curves for the inverse time mode (IDMT). If the START
condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled
again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and
tIReset2 for the inverse time) the corresponding START output is reset, after that the defined reset
time has elapsed. Here it should be noted that after leaving the hysteresis area, the START condition
must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area.
The hysteresis value for each step is settable HystAbsn (where n means either 1 or 2 respectively) to
allow a high and accurate reset of the function. For OV2PTOV the IDMT reset time is constant and
does not depend on the voltage fluctuations during the drop-off period. However, there are three
ways to reset the timer: either the timer is reset instantaneously, or the timer value is frozen during
the reset time, or the timer value is linearly decreased during the reset time.

Transformer protection RET670 697

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

tIReset1
Voltage
START
TRIP

U1>

HystAbs1 Measured
Voltage

Time

START t

TRIP

Time
Integrator Linearly decreased
Frozen Timer
t

Instantaneous Time
IEC09000055‐3‐en.vsdx

IEC09000055 V3 EN-US

Figure 413: Voltage profile not causing a reset of the START signal for step 1, and inverse time delay at
different reset types

698 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

tIReset1
Voltage
START TRIP
START HystAbs1

U1>
Measured
Voltage

Time

START t

TRIP

Time
Integrator Frozen Timer

Time
Linearly
Instantaneous decreased
IEC05000020‐4‐en.vsdx

IEC05000020 V4 EN-US

Figure 414: Voltage profile causing a reset of the START signal for step 1, and inverse time delay at different
reset types
Definite time delay

When definite time delay is selected, the function will operate as shown in figure 415. Detailed
information about individual stage reset/operation behavior is shown in figure 416 and figure 417
respectively. Note that by setting tResetn = 0.0s (where n means either 1 or 2 respectively),
instantaneous reset of the definite time delayed stage is ensured.

Transformer protection RET670 699

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

ST1

U tReset1 t1
a
a>b t t
TR1
U1>
b AND
OFF ON
Delay Delay

IEC10000100-2-en.vsd
IEC10000100 V2 EN-US

Figure 415: Logic diagram for step 1, definite time delay, DT operation

U1>

START

TRIP

tReset1

t1

IEC10000037-2-en.vsd
IEC10000037 V2 EN-US

Figure 416: Example for step 1, Definite Time Delay stage 1 reset

U1>

START

TRIP

tReset1

t1

IEC10000038-2-en.vsd
IEC10000038 V2 EN-US

Figure 417: Example for Definite Time Delay stage 1 operation

700 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

10.2.7.3 Blocking M15330-20 v8

It is possible to block Two step overvoltage protection OV2PTOV partially or completely, by binary
input signals where:

BLOCK: blocks all outputs

BLKTR1: blocks all trip outputs of step 1
BLKST1: blocks all start and trip outputs related to step 1
BLKTR2: blocks all trip outputs of step 2
BLKST2: blocks all start and trip outputs related to step 2

10.2.7.4 Design M15330-34 v8

The voltage measuring elements continuously measure the three phase-to-earth voltages or the
three phase-to-phase voltages. Recursive Fourier filters or true RMS filters of input voltage signals
are used. The phase voltages are individually compared to the set value, and the highest voltage is
used for the inverse time characteristic integration. A special logic is included to achieve the 1 out of
3, 2 out of 3 or 3 out of 3 criteria to fulfill the START condition. The design of Two step overvoltage
protection (OV2PTOV) is schematically described in figure 418.

Transformer protection RET670 701

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

UL1 Comparator ST1L1

UL1 > U1> Phase 1
Voltage Phase
Selector ST1L2
UL2 Comparator OpMode1 Phase 2
UL2 > U1> 1 out of 3
Start ST1L3
2 out of 3
3 out of 3 Phase 3 t1
UL3 Comparator t1Reset
UL3 > U1> & ST1
OR
Trip
START Output TR1L1
Logic

Time integrator Step 1 TR1L2

TRIP
MaxVoltSelect tIreset1
ResetTypeCrv1 TR1L3

OR TR1

Comparator ST2L1
UL1 > U2> Phase 1
Voltage Phase
Selector ST2L2
Comparator OpMode2 Phase 2
UL2 > U2> 1 out of 3
Start ST2L3
2 out of 3
Phase 3 t2
3 out of 3
Comparator t2Reset
UL3 > U2> & ST2
OR
Trip
START Output TR2L1
Logic

Time integrator Step 2 TR2L2

MaxVoltSelect tIreset2 TRIP
ResetTypeCrv2 TR2L3

TR2
OR

START
OR

TRIP
OR

IEC05000013-2-en.vsd
IEC05000013-WMF V2 EN-US

Figure 418: Schematic design of Two step overvoltage protection OV2PTOV

10.2.8 Technical data IP13013-1 v1

M13304-1 v15

Table 429: OV2PTOV technical data

Function Range or value Accuracy

Operate voltage, step 1 and 2 (1.0-200.0)% of UBase ±0.5% of Ur at U ≤ Ur
±0.5% of U at U > Ur

Absolute hysteresis (0.0–50.0)% of UBase ±0.5% of Ur at U ≤ Ur

±0.5% of U at U > Ur

Inverse time characteristics for steps 1 - See table 1302

and 2, see table 1302
Definite time delay, low step (step 1) at 0 (0.00 - 6000.00) s ±0.2% or ±45 ms whichever is greater
to 1.2 x Uset

Table continues on next page

702 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

Function Range or value Accuracy

Definite time delay, high step (step 2) at 0 (0.000-60.000) s ±0.2% or ±45 ms whichever is greater
to 1.2 x Uset

Minimum operate time, Inverse (0.000-60.000) s ±0.2% or ±45 ms whichever is greater

characteristics
Operate time, start at 0 to 2 x Uset Min. = 15 ms -
Max. = 30 ms
Reset time, start at 2 x Uset to 0 Min. = 15 ms -
Max. = 30 ms
Operate time, start at 0 to 1.2 x Uset Min. = 20 ms -
Max. = 35 ms
Reset time, start at 1.2 x Uset to 0 Min. = 5 ms -
Max. = 25 ms
Critical impulse time 10 ms typically at 0 to 2 x Uset -

Impulse margin time 15 ms typically -

10.3 Two step residual overvoltage protection ROV2PTOV IP14546-1 v4

10.3.1 Function revision history GUID-22110E0B-DEFB-461F-A437-4D221DB88799 v2

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
M 2.2.4 -
N 2.2.5 -

10.3.2 Identification
SEMOD54295-2 v6

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Two step residual overvoltage ROV2PTOV 59N
protection
2(U0>)

IEC15000108 V1 EN-US

10.3.3 Functionality M13808-3 v12

Residual voltages may occur in the power system during earth faults.

Transformer protection RET670 703

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

Two step residual overvoltage protection (ROV2PTOV) function calculates the residual voltage from
the three-phase voltage input transformers or measures it from a single voltage input transformer fed
from an open delta or neutral point voltage transformer.

ROV2PTOV has two voltage steps, each with inverse or definite time delay.

A reset delay ensures operation for intermittent earth faults.

10.3.4 Function block M13812-3 v6

ROV2PTOV
U3P* TRIP
BLOCK TR1
BLKTR1 TR2
BLKST1 START
BLKTR2 ST1
BLKST2 ST2

IEC06000278-2-en.vsd
IEC06000278 V2 EN-US

Figure 419: ROV2PTOV function block

10.3.5 Signals
PID-7438-INPUTSIGNALS v1

Table 430: ROV2PTOV Input signals

Name Type Default Description

U3P GROUP - Three phase voltages
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTR1 BOOLEAN 0 Block of operate signal, step 1
BLKST1 BOOLEAN 0 Block of step 1
BLKTR2 BOOLEAN 0 Block of operate signal, step 2
BLKST2 BOOLEAN 0 Block of step 2

PID-7438-OUTPUTSIGNALS v1

Table 431: ROV2PTOV Output signals

Name Type Description

TRIP BOOLEAN Trip
TR1 BOOLEAN Common trip signal from step1
TR2 BOOLEAN Common trip signal from step2
START BOOLEAN General start signal
ST1 BOOLEAN Common start signal from step1
ST2 BOOLEAN Common start signal from step2

10.3.6 Settings
PID-7438-SETTINGS v1

Table 432: ROV2PTOV Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

704 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

Table 433: ROV2PTOV Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OperationStep1 Off - - On Enable execution of step 1
On
Characterist1 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A step 1
Inverse curve B
Inverse curve C
Prog. inv. curve
U1> 1.0 - 200.0 %UB 0.1 30.0 Voltage setting/start val (DT & IDMT),
step 1 in % of UBase
t1 0.00 - 6000.00 s 0.01 5.00 Definitive time delay of step 1
t1Min 0.000 - 60.000 s 0.001 5.000 Minimum operate time for inverse curves
for step 1
k1 0.05 - 1.10 - 0.01 0.05 Time multiplier for the inverse time delay
for step 1
HystAbs1 0.0 - 50.0 %UB 0.1 0.5 Absolute hysteresis in % of UBase, step
1
OperationStep2 Off - - On Enable execution of step 2
On
Characterist2 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A step 2
Inverse curve B
Inverse curve C
Prog. inv. curve
U2> 1.0 - 200.0 %UB 0.1 45.0 Voltage setting/start val (DT & IDMT),
step 2 in % of UBase
t2 0.000 - 60.000 s 0.001 5.000 Definitive time delay of step 2
t2Min 0.000 - 60.000 s 0.001 5.000 Minimum operate time for inverse curves
for step 2
k2 0.05 - 1.10 - 0.01 0.05 Time multiplier for the inverse time delay
for step 2
HystAbs2 0.0 - 50.0 %UB 0.1 0.5 Absolute hysteresis in % of UBase, step
2

Table 434: ROV2PTOV Group settings (advanced)

Name Values (Range) Unit Step Default Description

tReset1 0.000 - 60.000 s 0.001 0.025 Reset time delay used in IEC Definite
Time curve step 1
ResetTypeCrv1 Instantaneous - - Instantaneous Selection of used IDMT reset curve type
Frozen timer for step 1
Linearly decreased
tIReset1 0.000 - 60.000 s 0.001 0.025 Time delay in IDMT reset (s), step 1
ACrv1 0.005 - 200.000 - 0.001 1.000 Parameter A for customer programmable
curve for step 1
BCrv1 0.50 - 100.00 - 0.01 1.00 Parameter B for customer programmable
curve for step 1
CCrv1 0.0 - 1.0 - 0.1 0.0 Parameter C for customer
programmable curve for step 1
DCrv1 0.000 - 60.000 - 0.001 0.000 Parameter D for customer
programmable curve for step 1
Table continues on next page

Transformer protection RET670 705

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

Name Values (Range) Unit Step Default Description

PCrv1 0.000 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 1
CrvSat1 0 - 100 % 1 0 Tuning param for prog. over voltage
IDMT curve, step 1
tReset2 0.000 - 60.000 s 0.001 0.025 Time delay in DT reset (s), step 2
ResetTypeCrv2 Instantaneous - - Instantaneous Selection of used IDMT reset curve type
Frozen timer for step 2
Linearly decreased
tIReset2 0.000 - 60.000 s 0.001 0.025 Time delay in IDMT reset (s), step 2
ACrv2 0.005 - 200.000 - 0.001 1.000 Parameter A for customer programmable
curve for step 2
BCrv2 0.50 - 100.00 - 0.01 1.00 Parameter B for customer programmable
curve for step 2
CCrv2 0.0 - 1.0 - 0.1 0.0 Parameter C for customer
programmable curve for step 2
DCrv2 0.000 - 60.000 - 0.001 0.000 Parameter D for customer
programmable curve for step 2
PCrv2 0.000 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 2
CrvSat2 0 - 100 % 1 0 Tuning param for prog. over voltage
IDMT curve, step 2

10.3.7 Monitored data

PID-7438-MONITOREDDATA v1

Table 435: ROV2PTOV Monitored data

Name Type Values (Range) Unit Description

ULevel REAL - kV Magnitude of measured voltage

10.3.8 Operation principle M15331-3 v9

Two step residual overvoltage protection ROV2PTOV is used to detect a high residual voltage. The
residual voltage can be measured directly from a voltage transformer in the neutral of a power
transformer or from a three-phase voltage transformer, where the secondary windings are connected
in an open delta. Another possibility is to measure the three phase-to-earth voltages, and calculate
the corresponding residual voltage internally in the IED. ROV2PTOV has two steps with separate
time delays. If the residual voltage remains above the set value for a time period corresponding to
the chosen time delay, the corresponding TRIP signal is issued.

The time delay characteristic is individually chosen for the two steps and can be either definite time
delay or inverse time delay.

The voltage-related settings are made in percent of the base voltage, which is set in kV, phase-
phase. The set UBase value is divided by sqrt(3) before the set value is calculated.

10.3.8.1 Measurement principle M15331-6 v6

The residual voltage is measured continuously, and compared with the set values, U1> and U2>.

To avoid oscillations of the output START signal, a settable hysteresis has been included.

706 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

10.3.8.2 Time delay M15331-10 v11

The time delay for the two steps can be either definite time delay (DT) or inverse time delay (IDMT).
For the inverse time delay four different modes are available:

• inverse curve A
• inverse curve B
• inverse curve C
• customer programmable inverse curve

The type A curve is described as:

k
t=
æ U - Un > ö
ç ÷
è Un > ø
IECEQUATION2422 V1 EN-US (Equation 212)

where:
Un> Set value for step 1 and step 2
U Measured voltage

The type B curve is described as:

k  480
t 2.0
 0.035
 U  Un  
 32   0.5 
 Un  

IECEQUATION2423 V2 EN-US (Equation 213)

The type C curve is described as:

k × 480
t= 3.0
+ 0.035
æ U - Un > ö
ç 32 × - 0.5 ÷
è U > ø
IECEQUATION2421 V1 EN-US (Equation 214)

The customer programmable curve can be created as:

k×A
t= p
+D
æ U -Un > ö
çB× -C÷
è Un > ø
EQUATION1439 V2 EN-US (Equation 215)

When the denominator in the expression is equal to zero, the time delay will be infinite. There will be
an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this
phenomenon. In the voltage interval Un> up to Un> · (1.0 + CrvSatn/100) the used voltage will be:
Un> · (1.0 + CrvSatn/100). If the programmable curve is used this parameter must be calculated so
that:

Transformer protection RET670 707

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

CrvSatn
B× -C > 0
100
EQUATION1440 V1 EN-US (Equation 216)

The details of the different inverse time characteristics are shown in section "Inverse characteristics".

TRIP signal issuing requires that the residual overvoltage condition continues for at least the user set
time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by some
special voltage level dependent time curves for the inverse time mode (IDMT).

If the START condition, with respect to the measured voltage ceases during the delay time, and is
not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and
tIReset1 and tIReset2 for the inverse time) the corresponding START output is reset, after the
defined reset time has elapsed.

Here it should be noted that after leaving the hysteresis area, the START condition must be fulfilled
again and it is not sufficient for the signal to only return back to the hysteresis area. Also, notice that
for the overvoltage function, IDMT reset time is constant and does not depend on the voltage
fluctuations during the drop-off period.

There are three ways to reset the timer: the timer is reset instantaneously, the timer value is frozen
during the reset time, or the timer value is linearly decreased during the reset time. See figure 420
and figure 421.

708 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

tIReset1
Voltage
START
TRIP

U1>

HystAbs1 Measured
Voltage

Time

START t

TRIP

Time
Integrator Linearly decreased
Frozen Timer
t

Instantaneous Time
IEC09000055‐3‐en.vsdx

IEC09000055 V3 EN-US

Figure 420: Voltage profile not causing a reset of the START signal for step 1, and inverse time delay

Transformer protection RET670 709

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

tIReset1
Voltage
START TRIP
START HystAbs1

U1>
Measured
Voltage

Time

START t

TRIP

Time
Integrator Frozen Timer

Time
Linearly
Instantaneous decreased
IEC05000020‐4‐en.vsdx

IEC05000020 V4 EN-US

Figure 421: Voltage profile causing a reset of the START signal for step 1, and inverse time delay
Definite time delay

When definite time delay is selected, the function will operate as shown in figure 422. Detailed
information about individual stage reset/operation behavior is shown in figure 423 and figure 424
respectively. Note that by setting tResetn = 0.0s, instantaneous reset of the definite time delayed
stage is ensured.

710 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

ST1

U tReset1 t1
a
a>b t t
TR1
U1>
b AND
OFF ON
Delay Delay

IEC10000100-2-en.vsd
IEC10000100 V2 EN-US

Figure 422: Logic diagram for step 1, Definite time delay, DT operation

U1<

ST1

TR1

tReset1

t1

IEC10000039-3-en.vsd
IEC10000039 V3 EN-US

Figure 423: Example for Definite Time Delay stage 1 reset

U1<

ST1

TR1

tReset1

t1

IEC10000040-3-en.vsd
IEC10000040 V3 EN-US

Figure 424: Example for Definite Time Delay stage 1 operation

Transformer protection RET670 711

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

10.3.8.3 Blocking M15331-18 v7

It is possible to block two step residual overvoltage protection ROV2PTOV partially or completely by
binary input signals where:

BLOCK: blocks all outputs

BLKTR1: blocks all trip outputs of step 1
BLKST1: blocks all start and trip outputs related to step 1
BLKTR2: blocks all trip outputs of step 2
BLKST2: blocks all start and trip inputs related to step 2

10.3.8.4 Design M15331-32 v7

The voltage measuring elements continuously measure the residual voltage. Recursive Fourier filters
filter the input voltage signal for the rated frequency. The residual voltage is compared to the set
value, and is also used for the inverse time characteristic integration. The design of the function is
schematically described in figure 425.

UN Comparator Phase 1 ST1

UN > U1>
Start TR1
START t1
tReset1
&
Trip
Time integrator Output
tIReset1 TRIP
Logic
ResetTypeCrv1
Step 1

ST2
Comparator Phase 1
UN > U2> TR2
Start
t2
START tReset2
& START
Trip OR
Time integrator Output
TRIP Logic
tIReset2
ResetTypeCrv2 TRIP
Step 2 OR

IEC05000748_2_en.vsd
IEC05000748 V2 EN-US

Figure 425: Schematic design of Two step residual overvoltage protection ROV2PTOV

712 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

10.3.9 Technical data

M13317-2 v16

Table 436: ROV2PTOV technical data

Function Range or value Accuracy

Operate voltage, step 1 - step 2 (1.0-200.0)% of UBase ± 0.5% of Ur at U ≤ Ur
± 0.5% of U at U > Ur

Absolute hysteresis (0.0–50.0)% of UBase ± 0.5% of Ur at U ≤ Ur

± 0.5% of U at U > Ur

Inverse time characteristics for low and - See table 1302

high step, see table
Definite time delay low step (step 1) at 0 (0.00–6000.00) s ± 0.2% or ± 45 ms whichever is
to 1.2 x Uset greater

Definite time delay high step (step 2) at 0 (0.000–60.000) s ± 0.2% or ± 45 ms whichever is

to 1.2 x Uset greater

Minimum operate time (0.000-60.000) s ± 0.2% or ± 45 ms whichever is

greater
Operate time, start at 0 to 2 x Uset Min. = 15 ms -
Max. = 30 ms
Reset time, start at 2 x Uset to 0 Min. = 15 ms -
Max. = 30 ms
Operate time, start at 0 to 1.2 x Uset Min. = 20 ms -
Max. = 35 ms
Reset time, start at 1.2 x Uset to 0 Min. = 5 ms -
Max. = 25 ms
Critical impulse time 10 ms typically at 0 to 2 x U set -

Impulse margin time 15 ms typically -

10.4 Overexcitation protection OEXPVPH IP14547-1 v3

10.4.1 Identification
M14867-1 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Overexcitation protection OEXPVPH 24

U/f >

SYMBOL-Q V1 EN-US

10.4.2 Functionality M13319-3 v9

When the laminated core of a power transformer or generator is subjected to a magnetic flux density
beyond its design limits, stray flux will flow into non-laminated components that are not designed to
carry flux. This will cause eddy currents to flow. These eddy currents can cause excessive heating
and severe damage to insulation and adjacent parts in a relatively short time. The function has
settable inverse operating curves and independent alarm stages.

Transformer protection RET670 713

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

10.4.3 Function block M13326-3 v5

OEXPVPH
I3P* TRIP
U3P* START
BLOCK ALARM
RESET

IEC05000329-2-en.vsd
IEC05000329 V3 EN-US

Figure 426: OEXPVPH function block

10.4.4 Signals
PID-3514-INPUTSIGNALS v6

Table 437: OEXPVPH Input signals

Name Type Default Description

I3P GROUP - Current connection
SIGNAL
U3P GROUP - Voltage connection
SIGNAL
BLOCK BOOLEAN 0 Block of function
RESET BOOLEAN 0 Reset operation

PID-3514-OUTPUTSIGNALS v6

Table 438: OEXPVPH Output signals

Name Type Description

TRIP BOOLEAN Trip from overexcitation function
START BOOLEAN Overexcitation above set operate level (instantaneous)
ALARM BOOLEAN Overexcitation above set alarm level (delayed)

10.4.5 Settings
PID-3514-SETTINGS v6

Table 439: OEXPVPH Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
V/Hz> 100.0 - 180.0 %UB/f 0.1 110.0 Operate level of V/Hz at no load and
rated freq in % of (UBase/frated)
V/Hz>> 100.0 - 200.0 %UB/f 0.1 140.0 High level of V/Hz above which tMin is
used, in % of (UBase/frated)
XLeak 0.000 - 200.000 Ohm 0.001 0.000 Winding leakage reactance in primary
ohms
TrPulse 0.000 - 60.000 s 0.001 0.100 Length of the pulse for trip signal (in sec)
tMin 0.000 - 60.000 s 0.001 7.000 Minimum trip delay for V/Hz inverse
curve, in sec
tMax 0.00 - 9000.00 s 0.01 1800.00 Maximum trip delay for V/Hz inverse
curve, in sec
tCooling 0.10 - 9000.00 s 0.01 1200.00 Transformer magnetic core cooling time
constant, in sec
Table continues on next page

714 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

Name Values (Range) Unit Step Default Description

CurveType IEEE - - IEEE Inverse time curve selection, IEEE/Tailor
Tailor made made
kForIEEE 1 - 60 - 1 1 Time multiplier for IEEE inverse type
curve
AlarmLevel 50.0 - 120.0 % 0.1 100.0 Alarm operate level as % of operate
level
tAlarm 0.00 - 9000.00 s 0.01 5.00 Alarm time delay, in sec

Table 440: OEXPVPH Group settings (advanced)

Name Values (Range) Unit Step Default Description

t1Tailor 0.00 - 9000.00 s 0.01 7200.00 Time delay t1 (longest) for tailor made
curve, in sec
t2Tailor 0.00 - 9000.00 s 0.01 3600.00 Time delay t2 for tailor made curve, in
sec
t3Tailor 0.00 - 9000.00 s 0.01 1800.00 Time delay t3 for tailor made curve, in
sec
t4Tailor 0.00 - 9000.00 s 0.01 900.00 Time delay t4 for tailor made curve, in
sec
t5Tailor 0.00 - 9000.00 s 0.01 450.00 Time delay t5 for tailor made curve, in
sec
t6Tailor 0.00 - 9000.00 s 0.01 225.00 Time delay t6 (shortest) for tailor made
curve, in sec

Table 441: OEXPVPH Non group settings (basic)

Name Values (Range) Unit Step Default Description

MeasuredU PosSeq - - L1L2 Selection of measured voltage
L1L2
L2L3
L3L1
MeasuredI L1L2 - - L1L2 Selection of measured current
L2L3
L3L1
PosSeq
GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

10.4.6 Monitored data

PID-3514-MONITOREDDATA v5

Table 442: OEXPVPH Monitored data

Name Type Values (Range) Unit Description

TMTOTRIP REAL - s Calculated time to trip for overexcitation,
in sec
VPERHZ REAL - V/Hz Voltage to frequency ratio in per-unit
THERMSTA REAL - % Overexcitation thermal status in % of trip
level

10.4.7 Operation principle

M5854-3 v9
The importance of Overexcitation protection (OEXPVPH) function is growing as the power
transformers as well as other power system elements today operate near their designated limits most
of the time.

Transformer protection RET670 715

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

Modern design transformers are more sensitive to overexcitation than earlier types. This is a result of
the more efficient designs and designs which rely on the improvement in the uniformity of the
excitation level of modern systems. If an emergency that causes overexcitation does occur,
transformers may be damaged unless corrective action is taken. Transformer manufacturers
recommend an overexcitation protection as a part of the transformer protection system.

Overexcitation results from excessive applied voltage, possibly in combination with below-normal
frequency. Such conditions may occur when a transformer unit is loaded, but are more likely to arise
when the transformer is unloaded, or when loss of load occurs. Transformers directly connected to
generators are in particular danger to experience an overexcitation conditions. It follows from the
fundamental transformer equation, see equation 217, that the peak flux density Bmax is directly
proportional to induced voltage E, and inversely proportional to frequency f and turns n.

E = 4.44 × f × n × Bmax× A
EQUATION898 V2 EN-US (Equation 217)

The relative excitation M is therefore according to equation 218.

E f
M ( p.u.) =
( Ur ) ( fr )
IECEQUATION2296 V1 EN-US (Equation 218)

Disproportional variations in quantities E and f may give rise to core overfluxing. If the core flux
density Bmax increases to a point above saturation level (typically 1.9 Tesla), the flux will no longer
be contained within the core, but will extend into other (non-laminated) parts of the power transformer
and give rise to eddy current circulations.

Overexcitation will result in:

• overheating of the non-laminated metal parts

• a large increase in magnetizing currents
• an increase in core and winding temperature
• an increase in transformer vibration and noise

Protection against overexcitation is based on calculation of the relative volt per hertz (V/Hz) ratio.
Protection initiates a reduction of excitation, and if this fails, or if this is not possible, the TRIP signal
will disconnect the transformer from the source after a delay ranging from seconds to minutes,
typically 5-10 seconds.

Overexcitation protection may be of particular concern on directly connected generator unit Step-up
Transformer. Directly connected generator-transformers are subjected to a wide range of frequencies
during the acceleration and deceleration of the turbine. In such cases, OEXPVPH (24) may trip the
field breaker during a start-up of a machine, by means of the overexcitation ALARM signal. If this is
not possible, the power transformer can be disconnected from the source, after a delay, by the TRIP
signal.

The IEC 60076 - 1 standard requires that transformers operate continuously at not more than 10%
above rated voltage at no load, and rated frequency. At no load, the ratio of the actual generator
terminal voltage to the actual frequency should not exceed 1.1 times the ratio of transformer rated
voltage to the rated frequency on a sustained basis, see equation 219.

E
---- £ 1.1 × Ur
------
f fr
EQUATION900 V1 EN-US (Equation 219)

or equivalently, with 1.1 · Ur = V/Hz> according to equation 220.

716 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

E V Hz >
£
f fr
IECEQUATION2297 V2 EN-US (Equation 220)

where:
V/Hz> is the maximum continuously allowed voltage at no load, and rated frequency.

V/Hz> is a setting parameter. The setting range is 100% to 180%. If the user does not know exactly
what to set, then the default value for V/Hz> = 110 % given by the IEC 60076-1 standard shall be
used.

In OEXPVPH, the relative excitation M is expressed according to equation 221.

E f
M ( p.u.) =
Ur fr
IECEQUATION2299 V1 EN-US (Equation 221)

It is clear from the above formula that, for an unloaded power transformer, M = 1 for any E and f,
where the ratio E/f is equal to Ur/fr. A power transformer is not overexcited as long as the relative
excitation is M ≤ V/Hz>, V/Hz> expressed in % of Ur/fr.

The overexcitation protection algorithm is fed with an input voltage U which is in general not the
induced voltage E from the fundamental transformer equation. For no load condition, these two
voltages are the same, but for a loaded power transformer the internally induced voltage E may be
lower or higher than the voltage U which is measured and fed to OEXPVPH , depending on the
direction of the power flow through the power transformer, the power transformer side where
OEXPVPH is applied, and the power transformer leakage reactance of the winding. It is important to
specify in the application configuration on which side of the power transformer OEXPVPH is placed.

As an example, at a transformer with a 15% short circuit impedance Xsc, the full load, 0.8 power
factor, 105% voltage on the load side, the actual flux level in the transformer core, will not be
significantly different from that at the 110% voltage, no load, rated frequency, provided that the short
circuit impedance X can be equally divided between the primary and the secondary winding: Xleak =
Xleak1 = Xleak2 = Xsc / 2 = 0.075 pu.

OEXPVPH calculates the internal induced voltage E if Xleak (meaning the leakage reactance of the
winding where OEXPVPH is connected) is known to the user. The assumption taken for two-winding
power transformers that Xleak = Xsc / 2 is unfortunately most often not true. For a two-winding power
transformer the leakage reactances of the two windings depend on how the windings are located on
the core with respect to each other. In the case of three-winding power transformers the situation is
still more complex. If a user has the knowledge on the leakage reactance, then it should applied. If a
user has no idea about it, Xleak can be set to Xc/2. OEXPVPH protection will then take the given
measured voltage U, as the induced voltage E.

It is assumed that overexcitation is a symmetrical phenomenon, caused by events such as loss-of-

load, etc. A high phase-to-earth voltage does not mean overexcitation. For example, in an unearthed
power system, a single phase-to-earth fault means high voltages of the “healthy” two phases-to-
earth, but no overexcitation on any winding. The phase-to-phase voltages will remain essentially
unchanged. The important voltage is the voltage between the two ends of each winding.

10.4.7.1 Measured voltage M5854-39 v9

If one phase-to-phase voltage is available from the side where overexcitation protection is applied,
then Overexcitation protection OEXPVPH shall be set to measure this voltage, MeasuredU. The
particular voltage which is used determines the two currents that must be used. This must be chosen
with the setting MeasuredI.

Transformer protection RET670 717

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

It is extremely important that MeasuredU and MeasuredI are set to same value.

If, for example, voltage UL1L2 is fed to OEXPVPH, then currents IL1, and IL2 must be applied. From
these two input currents, current IL1L2 = IL1 - IL2 is calculated internally by the OEXPVPH algorithm.
The phase-to-phase magnitude and frequency of the voltage must be both higher than 20% of the
rated value, when any of the two quantities are below this threshold, otherwise the protection
algorithm exits without calculating the excitation. ERROR output is set to 1, and the displayed value
of relative excitation V/Hz shows 0.000.

If three phase-to-earth voltages are available from the side where overexcitation is connected, then
OEXPVPH shall be set to measure positive sequence voltage and current. In this case the positive
sequence voltage and the positive sequence current are used by OEXPVPH. A check is made if the
positive sequence magnitude and frequency are higher than 20% of the rated phase-to-earth voltage
and rated frequency respectively, when any of the two quantities are below this threshold, OEXPVPH
exits immediately, and no excitation is calculated. ERROR output is set to 1, and the displayed value
of relative excitation V/Hz shows 0.000.

• OEXPVPH can be connected to any power transformer side, independent from the power flow.
• The side with a possible load tap changer must not be used.

10.4.7.2 Operate time of the overexcitation protection M5854-52 v8

The operate time of OEXPVPH is a function of the relative overexcitation.

Basically there are two different delay laws available to choose between:

• the so called IEEE law, and

• a tailor-made law.

The so called IEEE law approximates a square law and has been chosen based on analysis of the
various transformers’ overexcitation capability characteristics. They can match the transformer core
capability well.

The square law is according to equation 222.

0.18 × k 0.18 × k
top = 2
= 2
æ M ö overexcitation
ç V Hz> - 1 ÷
è ø
IECEQUATION2298 V2 EN-US (Equation 222)

where:
M the relative excitation
V/Hz> is maximum continuously allowed voltage at no load, and rated frequency, in pu and
k is time multiplier for inverse time functions, see figure 428.
Parameter k (“time multiplier setting”) selects one delay curve from the family of curves.

The relative excitation M is calculated using equation223

718 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

æ Umeasured ö
ç ÷ Umeasured frated
=è
fmeasured ø
M = ×
æ UBase ö UBase fmeasured
ç ÷
è frated ø
IECEQUATION2404 V1 EN-US (Equation 223)

An analog overexcitation relay would have to evaluate the following integral expression, which
means to look for the instant of time t = top according to equation 224.

top

ò (M (t) - V Hz > ) dt ³ 0.18 × k

2

IECEQUATION2300 V1 EN-US (Equation 224)

A digital, numerical relay will instead look for the lowest j (that is, j = n) where it becomes true that:

n
2
Dt × å ( M(j) – V/Hz> ) ³ 0.18 × k
j=k
EQUATION906 V1 EN-US (Equation 225)

where:
Dt is the time interval between two successive executions of OEXPVPH and
M(j) - V/Hz> is the relative excitation at (time j) in excess of the normal (rated) excitation which is given as Ur/fr.

As long as M > V/Hz> (that is, overexcitation condition), the above sum can only be larger with time,
and if the overexcitation persists, the protected transformer will be tripped at j = n.

Inverse delays as per figure 428, can be modified (limited) by two special definite delay settings,
namely tMax and tMin, see figure 427.

delay in s

tMax

under - inverse delay law

excitation

overexcitation
tMin
0 Mmax - V/Hz> Overexcitation M-V/Hz>

M=V/Hz> Mmax Excitation M

V/Hz> Emax E (only if f = fr = const)

99001067.vsd
IEC99001067 V1 EN-US

Figure 427: Restrictions imposed on inverse delays by tMax and tMin

A definite maximum time, tMax, can be used to limit the operate time at low degrees of
overexcitation. Inverse delays longer than tMax will not be allowed. In case the inverse delay is
longer than tMax, OEXPVPH trips after tMax seconds.

Transformer protection RET670 719

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

A definite minimum time, tMin, can be used to limit the operate time at high degrees of
overexcitation. In case the inverse delay is shorter than tMin, OEXPVPH function trips after tMin
seconds. The inverse delay law is not valid for values exceeding Mmax. The delay will be tMin,
irrespective of the overexcitation level, when values exceed Mmax (that is, M>V/Hz>).

Time (s) IEEE OVEREXCITATION CURVES

1000

100

k = 60

k = 20

k = 10
10 k=9
k=8
k=7
k=6
k=5
k=4
k=3

k=2

k=1
1
1 2 3 4 5 10 20 30 40

OVEREXCITATION IN % (M-Emaxcont)*100)

en01000373.vsd
IEC01000373 V1 EN-US

Figure 428: Delays inversely proportional to the square of the overexcitation

The critical value of excitation M is determined indirectly via OEXPVPH setting V/Hz>>. V/Hz>> can
be thought of as a no-load voltage at rated frequency, where the inverse law should be replaced by a
short definite delay, tMin. If, for example, V/Hz>> = 140 %, then M is according to equation 226.

(V Hz>> ) / f
M= = 1.40
Ur/fr
IECEQUATION2286 V1 EN-US (Equation 226)

The Tailor-Made law allows a user to design an arbitrary delay characteristic. In this case the interval
between M = V/Hz>, and M = Mmax is automatically divided into five equal subintervals, with six
delays. (settings t1, t2, t3, t4, t5 and t6) as shown in figure 429. These times should be set so that t1
=> t2 => t3 => t4 => t5 => t6.

The lower V/Hz limit is always the set value V/Hz> in %.

The upper V/Hz limit for the Tailor-Made characteristic is always the greater value among the
following two values in %:

720 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

• 1.10 x V/Hz>
• V/Hz>>

The reason is to prevent the loss of accuracy of the Tailor-Made characteristic when small set value
for V/Hz>> is used.

delay in s

tMax

under- tMin
excitation Overexcitation M-Emaxcont
0 Mmax - Emaxcont Excitation M

Emaxcont Mmax
99001068.vsd
IEC99001068 V1 EN-US

Figure 429: An example of a Tailor-Made delay characteristic

Delays between two consecutive points, for example t3 and t4, are obtained by linear interpolation.

Should it happen that tMax be lower than, for example, delays t1, and t2, the actual delay would be
tMax. Above Mmax, the delay can only be tMin.

10.4.7.3 Cooling M5854-92 v6

Overexcitation protection OEXPVPH is basically a thermal protection; therefore a cooling process

has been introduced. Exponential cooling process is applied. Parameter Setting tool is an OEXPVPH
setting, with a default time constant tCooling of 20 minutes. This means that if the voltage and
frequency return to their previous normal values (no more overexcitation), the normal temperature is
assumed to be reached not before approximately 5 times tCooling minutes. If an overexcitation
condition would return before that, the time to trip will be shorter than it would be otherwise.

10.4.7.4 Overexcitation protection function measurands M5854-95 v8

A monitored data value, TMTOTRIP, is available on the local HMI and in PCM600. This value is an
estimation of the remaining time to trip (in seconds), if the overexcitation remained on the level it had
when the estimation was done. This information can be useful during small or moderate
overexcitation situations.

If the overexcitation is so low that the valid delay is tMax, then the estimation of the remaining time to
trip is done against tMax.

The relative excitation M, shown on the local HMI and in PCM600 has a monitored data value
VPERHZ and is calculated from the expression:

E f
M ( p.u.) =
Ur fr
IECEQUATION2299 V1 EN-US (Equation 227)

If VPERHZ value is less than setting V/Hz> (in %), the power transformer is underexcited. If
VPERHZ is equal to V/Hz> (in %), the excitation is exactly equal to the power transformer continuous
capability. If VPERHZ is higher than V/Hz>, the protected power transformer is overexcited. For

Transformer protection RET670 721

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

example, if VPERHZ = 1.100, while V/Hz> = 110 %, then the power transformer is exactly on its
maximum continuous excitation limit.

The monitored data value THERMSTA shows the thermal status of the protected power transformer
iron core. THERMSTA gives the thermal status in % of the trip value which corresponds to 100%.
THERMSTA should reach 100% at the same time, as TMTOTRIP reaches 0 seconds. If the
protected power transformer is then for some reason not switched off, THERMSTA shall go over
100%.

If the delay as per IEEE law, or Tailor-made Law, is limited by tMax, and/or tMin, then the Thermal
status will generally not reach 100% at the same time, when tTRIP reaches 0 seconds. For example,
if, at low degrees of overexcitation, the very long delay is limited by tMax, then the OEXPVPH TRIP
output signal will be set to 1 before the Thermal status reaches 100%.

10.4.7.5 Overexcitation alarm M5854-123 v6

A separate step, AlarmLevel, is provided for alarming purpose. It is normally set 2% lower than (V/
Hz>) and has a definite time delay, tAlarm. This will give the operator an early warning.

10.4.7.6 Logic diagram M13333-9 v4

BLOCK
AlarmLevel
tAlarm ALARM
&
t

M>V/Hz>
TRIP
&
V/Hz>
U3P Calculation
Ei k
M
of internal M=
I3P induced (Ei / f) IEEE law &
voltage Ei (Ur / fr) tMax ³1
M t
Tailor-made law
M>V/Hz>>
tMin
Xleak
t
V/Hz>>

M = relative V/Hz as service value

IEC05000162-3-en.vsd
IEC05000162 V3 EN-US

Figure 430: A simplified logic diagram of the Overexcitation protection OEXPVPH

Simplification of the diagram is in the way the IEEE and Tailor-made delays are calculated. The
cooling process is not shown. It is not shown that voltage and frequency are separately checked
against their respective limit values.

722 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

10.4.8 Technical data

M13338-2 v12

Table 443: OEXPVPH technical data

Function Range or value Accuracy

Operate value, start (100–180)% of (UBase/frated) ±0.5% of U

Operate value, alarm (50–120)% of start level ±0.5% of Ur at U ≤ Ur

±0.5% of U at U > Ur

Operate value, high level (100–200)% of (UBase/frated) ±0.5% of U

Curve type IEEE or customer defined ±5.0 % or ±45 ms, whichever is greater

(0.18 × k )
IEEE : t =
( M - 1) 2

EQUATION1319 V1 EN-US (Equation 228)

where M = (E/f)/(Ur/fr)
Minimum time delay for inverse (0.000–60.000) s ±1.0% or ±45 ms, whichever is greater
function
Maximum time delay for inverse (0.00–9000.00) s ±1.0% or ±45 ms, whichever is greater
function
Alarm time delay (0.00–9000.00) ±1.0% or ±45 ms, whichever is greater

The healthy condition close to the rated values (that is, V/Hz below the set pickup
value) must be applied first when the operate time of a function is tested. Otherwise,
an additional delay of up to 50 ms should be added to stated operate times.

10.5 Voltage differential protection VDCPTOV SEMOD153860-1 v2

10.5.1 Function revision history GUID-04679E4E-E0D2-4BA6-A002-4020E52DB973 v1

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
M 2.2.4 -
N 2.2.5 -

Transformer protection RET670 723

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

10.5.2 Identification
SEMOD167723-2 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Voltage differential protection VDCPTOV - 60

10.5.3 Functionality SEMOD153862-5 v7

A voltage differential monitoring function is available. It compares the voltages from two three phase
sets of voltage transformers and has one sensitive alarm step and one trip step.

10.5.4 Function block SEMOD159374-4 v2

VDCPTOV
U3P1* TRIP
U3P2* START
BLOCK ALARM
U1LOW
U2LOW
UL1DIFF
UL2DIFF
UL3DIFF

IEC06000528-2-en.vsd
IEC06000528 V2 EN-US

Figure 431: VDCPTOV function block

10.5.5 Signals
PID-7421-INPUTSIGNALS v1

Table 444: VDCPTOV Input signals

Name Type Default Description

U3P1 GROUP - Bus voltage
SIGNAL
U3P2 GROUP - Capacitor voltage
SIGNAL
BLOCK BOOLEAN 0 Block of function

PID-7421-OUTPUTSIGNALS v1

Table 445: VDCPTOV Output signals

Name Type Description

TRIP BOOLEAN Voltage differential protection operated
START BOOLEAN Start of voltage differential protection
ALARM BOOLEAN Voltage differential protection alarm
U1LOW BOOLEAN Loss of U1 voltage
U2LOW BOOLEAN Loss of U2 voltage
UL1DIFF REAL Differential voltage phase L1
UL2DIFF REAL Differential voltage phase L2
UL3DIFF REAL Differential voltage phase L3

724 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

10.5.6 Settings
PID-7421-SETTINGS v1

Table 446: VDCPTOV Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 447: VDCPTOV Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off/On
On
BlkDiffAtULow No - - Yes Block operation at low voltage
Yes
UDTrip 2.0 - 100.0 %UB 0.1 5.0 Operate level, in % of UBase
tTrip 0.000 - 60.000 s 0.001 1.000 Time delay for voltage differential
operate, in seconds
tReset 0.000 - 60.000 s 0.001 0.000 Time delay for voltage differential reset,
in seconds
UDAlarm 2.0 - 100.0 %UB 0.1 2.0 Alarm level, in % of UBase
tAlarm 0.000 - 60.000 s 0.001 2.000 Time delay for voltage differential alarm,
in seconds
U1Low 1.0 - 100.0 %UB 0.1 70.0 Input 1 undervoltage level, in % of
UBase
U2Low 1.0 - 100.0 %UB 0.1 70.0 Input 2 undervoltage level, in % of
UBase
tBlock 0.000 - 60.000 s 0.001 0.000 Reset time for undervoltage block

Table 448: VDCPTOV Group settings (advanced)

Name Values (Range) Unit Step Default Description

RFL1 0.000 - 3.000 - 0.001 1.000 Ratio compensation factor phase L1
U2L1*RFL1=U1L1
RFL2 0.000 - 3.000 - 0.001 1.000 Ratio compensation factor phase L2
U2L2*RFL2=U1L2
RFL3 0.000 - 3.000 - 0.001 1.000 Ratio compensation factor phase L3
U2L3*RFL3=U1L3

10.5.7 Monitored data

PID-7421-MONITOREDDATA v1

Table 449: VDCPTOV Monitored data

Name Type Values (Range) Unit Description

UL1DIFF REAL - kV Differential voltage phase L1
UL2DIFF REAL - kV Differential voltage phase L2
UL3DIFF REAL - kV Differential voltage phase L3

10.5.8 Operation principle SEMOD153866-61 v4

The Voltage differential protection function VDCPTOV (60) is based on comparison of the amplitudes
of the two voltages connected in each phase. Possible differences between the ratios of the two
Voltage/Capacitive voltage transformers can be compensated for with a ratio correction factors RFLx.

Transformer protection RET670 725

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

The voltage difference is evaluated and if it exceeds the alarm level UDAlarm or trip level UDATrip
signals for alarm (ALARM output) or trip (TRIP output) is given after definite time delay tAlarm
respectively tTrip. The two three phase voltage supplies are also supervised with undervoltage
settings U1Low and U2Low. The outputs for loss of voltage U1LOW resp U2LOW will be activated.
The U1 voltage is supervised for loss of individual phases whereas the U2 voltage is supervised for
loss of all three phases.

Loss of all U1 or all U2 voltages will block the differential measurement. This blocking can be
switched off with setting BlkDiffAtULow = No.

VDCPTOV function can be blocked from an external condition with the binary BLOCK input. It can,
for example, be activated from Fuse failure supervision function FUFSPVC.

To allow easy commissioning the measured differential voltage is available as service value. This
allows simple setting of the ratio correction factor to achieve full balance in normal service.

The principle logic diagram is shown in figure 432.

UDTripL1>
AND

UDTripL2> O tReset tTrip

AND
R t t
AND TRIP

UDTripL3>
AND
AND START

UDAlarmL1>
AND

UDAlarmL2> O tAlarm
AND
R t AND ALARM

UDAlarmL3>
AND

U1<L1
tAlarm
U1<L2 AND t U1LOW
AND

U1<L3 AND

OR
BlkDiffAtULow

U2<L1
t1
U2<L2 AND t U2LOW
AND

U2<L3

BLOCK

en06000382-2.vsd
IEC06000382 V3 EN-US

Figure 432: Principle logic for Voltage differential function VDCPTOV

726 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

10.5.9 Technical data

SEMOD166919-2 v7

Table 450: VDCPTOV technical data

Function Range or value Accuracy

Voltage difference for alarm and trip (2.0–100.0) % of UBase ±0.5% of Ur

Under voltage level (1.0–100.0) % of UBase ±0.5% of Ur

Independent time delay for voltage (0.000–60.000)s ±0.2% or ±40 ms whichever is

differential alarm at 0.8 x UDAlarm to 1.2 x greater
UDAlarm
Independent time delay for voltage (0.000–60.000)s ±0.2% or ±40 ms whichever is
differential trip at 0.8 x UDTrip to 1.2 x greater
UDTrip
Independent time delay for voltage (0.000–60.000)s ±0.2% or ±40 ms whichever is
differential reset at 1.2 x UDTrip to 0.8 x greater
UDTrip

10.6 Loss of voltage check LOVPTUV SEMOD171453-1 v3

10.6.1 Identification
SEMOD171954-2 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Loss of voltage check LOVPTUV - 27

10.6.2 Functionality SEMOD171457-5 v8

Loss of voltage check (LOVPTUV ) is suitable for use in networks with an automatic system
restoration function. LOVPTUV issues a three-pole trip command to the circuit breaker, if all three
phase voltages fall below the set value for a time longer than the set time and the circuit breaker
remains closed.

The operation of LOVPTUV is supervised by the fuse failure supervision FUFSPVC.

10.6.3 Function block SEMOD171785-4 v4

LOVPTUV
U3P* TRIP
BLOCK START
CBOPEN
VTSU

IEC07000039-2-en.vsd
IEC07000039 V2 EN-US

Figure 433: LOVPTUV function block

Transformer protection RET670 727

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

10.6.4 Signals
PID-3519-INPUTSIGNALS v6

Table 451: LOVPTUV Input signals

Name Type Default Description

U3P GROUP - Voltage connection
SIGNAL
BLOCK BOOLEAN 0 Block the all outputs
CBOPEN BOOLEAN 0 Circuit breaker open
VTSU BOOLEAN 0 Block from voltage circuit supervision

PID-3519-OUTPUTSIGNALS v6

Table 452: LOVPTUV Output signals

Name Type Description

TRIP BOOLEAN Trip signal
START BOOLEAN Start signal

10.6.5 Settings
PID-3519-SETTINGS v6

Table 453: LOVPTUV Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off/On
On
UPE 1 - 100 %UB 1 70 Operate voltage in % of base voltage
UBase
tTrip 0.000 - 60.000 s 0.001 7.000 Operate time delay

Table 454: LOVPTUV Group settings (advanced)

Name Values (Range) Unit Step Default Description

tPulse 0.050 - 60.000 s 0.001 0.150 Duration of TRIP pulse
tBlock 0.000 - 60.000 s 0.001 5.000 Time delay to block when all 3ph
voltages are not low
tRestore 0.000 - 60.000 s 0.001 3.000 Time delay for enable the function after
restoration

Table 455: LOVPTUV Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

10.6.6 Operation principle SEMOD171765-4 v6

The operation of Loss of voltage check LOVPTUV is based on line voltage measurement. LOVPTUV
is provided with a logic, which automatically recognizes if the line was restored for at least tRestore
before starting the tTrip timer. All three phases are required to be low before the output TRIP is
activated. The START output signal indicates start.

Additionally, LOVPTUV is automatically blocked if only one or two phase voltages have been
detected low for more than tBlock.

728 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 10
Voltage protection

LOVPTUV operates again only if the line has been restored to full voltage for at least tRestore.
Operation of the function is also inhibited by fuse failure and open circuit breaker information signals,
by their connection to dedicated inputs of the function block.

Due to undervoltage conditions being continuous the trip pulse is limited to a length set by setting
tPulse.

The operation of LOVPTUV is supervised by the fuse-failure function (BLKU input) and the
information about the open position (CBOPEN) of the associated circuit breaker.

The BLOCK input can be connected to a binary input of the IED in order to receive a block command
from external devices or can be software connected to other internal functions of the IED itself in
order to receive a block command from internal functions. LOVPTUV is also blocked when the IED is
in TEST status and the function has been blocked from the HMI test menu. (Blocked=Yes).

TEST

TEST-ACTIVE
&
Blocked = Yes

START
BLOCK >1
Function Enable tTrip tPulse TRIP
STUL1N & t

STUL2N &
only 1 or 2 phases are low for
Latched at least 10 s (not three)
STUL3N Enable
&

tBlock
>1 t

CBOPEN Reset Enable

>1
&
VTSU
tRestore
>1 Set Enable
t
>1
Line restored for
at least 3 s

IEC07000089_2_en.vsd

IEC07000089 V2 EN-US

Figure 434: Simplified diagram of Loss of voltage check LOVPTUV

Transformer protection RET670 729

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 10 1MRK 504 164-UEN Rev. N
Voltage protection

10.6.7 Technical data

SEMOD175210-2 v7

Table 456: LOVPTUV technical data

Function Range or value Accuracy

Operate voltage (1–100)% of UBase ±0.5% of Ur

Pulse timer when disconnecting all three (0.050–60.000) s ±0.2% or ±15 ms whichever is
phases greater
Time delay for enabling the functions after (0.000–60.000) s ±0.2% or ±35 ms whichever is
restoration greater
Operate time delay when disconnecting all (0.000–60.000) s ±0.2% or ±35 ms whichever is
three phases greater
Time delay to block when all three phase (0.000–60.000) s ±0.2% or ±35 ms whichever is
voltages are not low greater

730 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

Section 11 Unbalance protection

11.1 Shunt capacitor cascading failure protection
SCCFPVOC GUID-08928884-88E3-4A40-9B50-BDA5F1A451D9 v1

11.1.1 Function revision history GUID-D7C922F5-2C3F-40E2-8B7F-B42F12597971 v1

Document Product History

revision revision
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 -
M 2.2.4 -
N 2.2.5 The harmonic restraint function changed to freeze the definite timers.

11.1.2 Identification GUID-86BB3D32-8E40-48FB-8619-8D0B28B60AFA v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2 device

identification identification number
Shunt capacitor cascading failure SCCFPVOC 2(I > /U <) 51 V
protection

11.1.3 Functionality GUID-ACDFCB71-0652-4A60-8B2A-B18144DC3917 v1

Cascading failures are series faults in shunt capacitor banks involving more than one capacitor unit
(or even more than one rack) as shown in Figure 435. Cascading failures are characterized by the
presence of an unbalanced shunt capacitor bank (SCB) current. However, as the connected power
system is much stronger than the SCB rating, any unbalance voltage due to cascading faults inside
the capacitor bank is typically not present in the system.

The SCCFPVOC function provides protection against cascading faults and has the following
protection modes to detect the unbalances.

• Two step, negative sequence based voltage restrained over-current protection

• Two step, zero sequence based voltage restrained over-current protection

At any time only one mode can be selected for the operation. The zero sequence mode shall only be
selected if the capacitor is solidly earthed.

The zero sequence based function can also be used as a turn to turn fault protection for a shunt
reactor with a earthed neutral point.

Transformer protection RET670 731

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

Bus

VT

670 IED
CT

Cascading failure

Optional earthing of the SCB

IECI19000101-1-en.vsdx
IEC19000101 V1 EN-US

Figure 435: Cascading failure within SCB

11.1.4 Function block GUID-77A3F430-4372-4671-BF70-F1C993767434 v1

SCCFPVOC
I3P* TRIP
U3P* TR1
BLOCK TR2
BLKST1 START
BLKST2 ST1
ST2
IMEAS
UMEAS

IEC19000102-1-en.vsdx
IEC19000102 V1 EN-US

Figure 436: Function block of cascading failure protection

11.1.5 Signals
PID-7804-INPUTSIGNALS v1

Table 457: SCCFPVOC Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKST1 BOOLEAN 0 Block of step 1
BLKST2 BOOLEAN 0 Block of step 2

732 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

PID-7804-OUTPUTSIGNALS v1

Table 458: SCCFPVOC Output signals

Name Type Description

TRIP BOOLEAN General trip signal
TR1 BOOLEAN Trip signal from step 1
TR2 BOOLEAN Trip signal from step 2
START BOOLEAN General start signal
ST1 BOOLEAN Start signal from step 1
ST2 BOOLEAN Start signal from step 2
IMEAS REAL Measured current magnitude
UMEAS REAL Measured voltage magnitude

11.1.6 Settings
PID-7804-SETTINGS v1

Table 459: SCCFPVOC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 460: SCCFPVOC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
CurrentInput NegSeq - - 3*ZeroSeq Select current signal which will be
3*ZeroSeq measured inside function. Note: Needs
to have same value as VoltageInput
VoltageInput -NegSeq - - -3*ZeroSeq Select voltage signal which will be
-3*ZeroSeq measured inside function. Note: Needs
to have same value as CurrentInput
l_2nd/l_fund 10.0 - 50.0 % 1.0 40.0 Ratio of second to fundamental current
harmonic in %
Operation1 Off - - Off Operation step 1 Off / On
On
I> 121 - 400 %IB 1 125 Operate current level for step 1 in % of
IBase
tDef1 0.00 - 60.00 s 0.01 0.50 Independent (definite) time delay of step
1
VDepFact1 0.0330 - 0.7075 - 0.0001 0.0640 Voltage dependent factor for step 1.
Note: it is recommended to be set as
[1-(117/I>)], to follow the capacitor
impedance
HarmRestr1 Off - - Off Enable block of step 1 by 2nd harmonic
On restrain to be used for 3I0 current only
Operation2 Off - - Off Operation step 2 Off / On
On
I>> 125 - 400 %IB 1 130 Operate current level for step 2 in % of
IBase
Table continues on next page

Transformer protection RET670 733

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

Name Values (Range) Unit Step Default Description

tDef2 0.00 - 60.00 s 0.01 0.50 Independent (definite) time delay of step
2
VDepFact2 0.0640 - 0.7075 - 0.0001 0.1000 Voltage dependent factor for step 2.
Note: it is recommended to be set as
[1-(117/I>>)], to follow the capacitor
impedance
HarmRestr2 Off - - Off Enable block of step 2 by 2nd harmonic
On restrain to be used for 3I0 current only

11.1.7 Monitored data

PID-7804-MONITOREDDATA v1

Table 461: SCCFPVOC Monitored data

Name Type Values (Range) Unit Description

IMEAS REAL - A Measured current magnitude
UMEAS REAL - kV Measured voltage magnitude

11.1.8 Operation principle GUID-0CE296ED-BBD7-4B4C-B631-6EB55E49B2CC v2

The negative or the zero sequence voltage restrained over-current principle is used to detect a
cascading failure within the shunt capacitor bank (SCB). Table 462 summarizes the current/voltage
pairs which are used for the voltage restrained principle.

Table 462: Measurement quantities for cascading failure detection

Current signal I Voltage signal U

SCB Neg. Seq. Current SCB Neg. Seq. Voltage Can be used on any SCB
SCB Zero Seq. Current SCB Zero Seq. Voltage Can only be used on directly earthed
SCB

The choice between the negative or the zero sequence quantity depends on whether the star point is
earthed or not. The restrained characteristics for this application is set in accordance with Figure 437.

734 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

Measured Current
(%IBase)

1.0 × Current start

level (I> or I>>)

VDepFact × Current
start level (I> or I>>)

3.0% 120% Measured Voltage

(% of UBase)

IEC19000103-1-en.vsdx
IEC19000103 V1 EN-US

Figure 437: General voltage restrained characteristic for SCB cascading protection (Stage 1
and stage 2)
The SCCFPVOC function has two stages of definite time voltage restrained over-current functionality.
In both the stages, voltage restrained over-current feature will follow the characteristics shown in
Figure 437. In the characteristics, the over-current set values I > and I >> are modified according to
the measured voltage as follows:

When U <3% UBase:

Stage1Current set level = VDepFact1 ´ I >

Stage2 Current set level = VDepFact 2 ´ I >>
IECEQUATION19007 V1 EN-US (Equation 229)

When U ≥ 120% UBase:

Stage 1 Current set level = I >

Stage 2 Current set level = I >>
IECEQUATION19008 V1 EN-US (Equation 230)

When 3% UBase ≤ U < 120% UBase:

Transformer protection RET670 735

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

é æ U öù
ê 120 - ç ´100 ÷ ú
Stage1Current set level = ê VDepFact1 ´ è UBase øú ´ I >
ê 117 ú
êë úû

é æ U öù
ê 120 - ç ´ 100 ÷ ú
Stage2Current set level = êVDepFact 2 ´ è UBase ø ú ´ I >>
ê 117 ú
êë úû
IECEQUATION19001 V1 EN-US (Equation 231)

Where, U is the measured voltage.

Since the capacitor impedance is linearly dependent with respect to voltage across the capacitor, the
two steps of SCCFPVOC should work as parallel characteristics (see Figure 438) to achieve the
combination of security and speed. This parallel characteristics of two steps are achieved by setting
VDepFactx as follows:

æ 117 ö
For Stage1: VDepFact1 = 1 - ç ÷
èI>ø

æ 117 ö
For Stage2 : VDepFact 2 = 1 - ç ÷
è I >> ø
IECEQUATION19009 V1 EN-US (Equation 232)

Once the VDepFact1 and VDepFact2 are set as per the above equations, the current pick up level
for the linear part of Figure 437 (between 3% - 120% of the measured voltage) is calculated as
follows:

éæ UBase ö ù
Stage1 Current pickup level = I > - êç 120 ´ ÷ -Uú
ëè 3 ø û
éæ UBase ö ù
Stage2 Current pickup level = I >> - êç 120 ´ ÷ -Uú
ëè 3 ø û
IECEQUATION190010 V1 EN-US (Equation 233)

Set IBase and UBase according to the capacitor bank rating. That is,

UBase = Rated Ph - Ph voltage of the capacitor bank

UBase
IBase =
3 ´ X SCB
IECEQUATION19011 V1 EN-US

The above rated settings are required for the restrained characteristic to follow the
capacitor impedance properly.

The resultant operating characteristic is shown in Figure 438.

736 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

%IBase

I>>:130

First sensitive step Second fast step

I>:125

120

100

Characteristic for
external faults
defined by XSCB

13.0(VDepFact2: 0.100)

8 (VDepFact1: 0.064)

3 100 120 % UBase

IEC19000106-1-en.vsdx
IEC19000106 V1 EN-US

Figure 438: General voltage restrained characteristic for SCB cascading failure protection
(Stage 1 and Stage 2)
Based on the current input and the voltage input selection, Equation 229, Equation 230, and
Equation 231 uses either the negative or the zero sequence quantities.

The simplified logic diagram of the function is shown in Figure 439. Start of each stage will release
the trip signal respectively after a definite time delay.

This function has an additional zero sequence 2nd harmonic restrained feature which can be
switched On/Off by setting HarmRestrx (x = 1, 2). If this setting is set to On, then the respective
stage will be blocked, if:

IzeroSeq (2nd HarmMag ) > I _ 2nd I _ fund ´ IzeroSeq ( FundamentalMag )

IECEQUATION19002 V1 EN-US (Equation 234)

This second harmonic restrained feature shall only be enabled if the zero sequence mode of
operation is selected.

When enabled, the 2nd harmonic blocking function is used to freeze the Definite
and/or the Inverse Characteristics internal timers. When the function detects a 2nd
harmonic higher than the set threshold, the internal function timers are frozen but
START outputs continues to be active as long as the measured current is above the
set pickup level. Internal timers will again resume timing when harmonic content
becomes smaller than the set threshold and the measured current is higher than the
pickup value. If TRIP output is already active when harmonic blocking signal appears
the TRIP output will not be affected.

Transformer protection RET670 737

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

Freeze
HarmRestr1=On/Off Timer
AND
ST1

tDef1
I3P a
Voltage / Current I> a>b t TR1
X b AND
input selection
U3P
(Zero Sequence /
currentInput = NegSeq/3.ZeroSeq Negative Sequence)
1

voltageInput = NegSeq/3.ZeroSeq K

START
BLOCK 1
TRIP
VDepFact1 1
a
a>b tDef2
Zero sequence 2nd harmonic and I>> X b TR2
AND t
fundamental current extraction from
phase current
ST2
1

K
VDepFact2
Freeze
HarmRestr2 = On/Off AND Timer

I_2ndHarm/I_fund
I_2nd/I_fund Comparison

IEC19000104 V2 EN-US

Figure 439: Logic Diagram of cascading failure protection

11.1.9 Technical data

GUID-ABB8C954-A47E-47E2-BD6B-1632325FE0C9 v1

Table 463: Shunt Capacitor Cascading Failure Protection SCCFPVOC

Function Range Accuracy

Measuring current input NegSeq, -3*ZeroSeq -
Measuring voltage input NegSeq, -3*ZeroSeq -
Operating characteristics Voltage restrained over-current ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir

Operate current, Step 1 (121-400)% of IBase ±1.0% of Ir at I ≤ Ir

±1.0% of I at I > Ir

Operate current, Step 2 (125-400)% of IBase ±1.0% of Ir at I ≤ Ir

±1.0% of I at I > Ir

Reset ratio >95% -

Operate time, START at 0 to 2 x Iset Min. = 15 ms -
Max.= 30 ms
Reset time, START at 2 x Iset to 0 Min. = 15 ms -
Max. = 30 ms
Independent time delay at 0 to 2 x Iset (0.00-60.00) s ±0.2% or ±45 ms, whichever is
greater
Second harmonic blocking (10.0-50.0)% of fundamental ±1.0% of Ir

Critical impulse time 10 ms typically at 0 to 2 x Iset -

Impulse margin time 15 ms typically -

738 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

11.2 Current unbalance protection of SCB, SCUCPTOC GUID-6B41F976-9393-41E4-82F8-8AD841AC6E63 v1

11.2.1 Identification GUID-235120CF-F959-4092-A275-8511903520E8 v1

Function description IEC 61850 identification IEC 60617 identification ANSI/IEEE C37.2 device
number
Current unbalance SCUCPTOC dI>C 60N
protection of SCB

11.2.2 Functionality Functionality GUID-0038D23F-5C59-4B31-A747-60F5C02560A9 v1

Shunt capacitor banks (SCB) are used in transmission and distribution substations for the benefit of
reactive power support and filtering. Any internal fault in the capacitor bank leads to unbalance in the
SCB and severe damage to the entire bank, which can result in an explosion or fire. Generally
internal faults in the shunt capacitor bank are due to the open or short-circuit of the capacitor units or
elements.

An internal fault will typically lead to an unbalance of currents between the two legs of the SCB. To
measure the unbalance current, several configurations are possible:

• Place a CT between the two neutral point connections of a double WYE configuration as shown
in Figure 440.
• Place a CT between the two strings of the same phase of a single WYE configuration as shown
in Figure 441.
• Place a CT between the two legs of the same phase of a H-bridge configuration as shown in
Figure 442.

For unbalance current calculation, the SCUCPTOC function uses measured phase current (I3P) and
measured unbalance current (I3UNB). Based on the measured unbalance current deviation from the
stored reference current value, the function identifies the severity of the internal fault in the SCB.

Transformer protection RET670 739

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

L1

IL1
L2

IL2
L3

IL3

C C C C C C

C C C C C C

C C C C C C

C C C C C C

IUNB1

Grounded

IUNB1 Ungrounded

IEC19000181-1-en.vsdx

IEC19000181 V1 EN-US

Figure 440: Typical earthed/unearthed double WYE connected SCB

740 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

L1

IL1

L2

IL2
L3

IL3

C C C C C C

C C C C C C

C C C C C C

C IUNB1 C C IUNB2 C C IUNB3 C

Grounded/Ungrounded

IEC19000182-1-en-us. vsdx

IEC19000182 V1 EN-US

Figure 441: Typical earthed/unearthed single WYE connected SCB with strings in each phase

L1

IL1

L2

IL2

L3

IL3

C C C C C C

IUNB1 IUNB2 IUNB3

C C C C C C

Grounded/Ungrounded

IEC19000183-1-en-us.vsdx

IEC19000183 V1 EN-US

Figure 442: Typical earthed/unearthed H-bridge connected SCB

Transformer protection RET670 741

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

11.2.3 Function block GUID-A8D1DBFA-AA21-449A-917C-7BA01EBDEDFB v1

SCUCPTOC
I3P* TRIP
I3UNB* TRL1
BLOCK TRL2
BLKTR TRL3
BLKALM START
BLKWRN STL1
INHIBIT STL2
TRIGCOMP STL3
RESETCOMP ALARM
ALML1
ALML2
ALML3
WARNING
WRN L1
WRN L2
WRN L3
BLKDL1
BLKDL2
BLKDL3
COMP EX ED
IUNBCLCL1
IUNBCLCL2
IUNBCLCL3

IEC19000184-1-en-us.vsdx
IEC19000184 V1 EN-US

Figure 443: Function block

11.2.4 Signals
PID-7215-INPUTSIGNALS v1

Table 464: SCUCPTOC Input signals

Name Type Default Description

I3P GROUP - Group signal for phase current input
SIGNAL
I3UNB GROUP - Group signal for unbalance current input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Block of trip
BLKALM BOOLEAN 0 Block of alarm
BLKWRN BOOLEAN 0 Block of warning
INHIBIT BOOLEAN 0 Inhibit the function
TRIGCOMP BOOLEAN 0 Trigger input to store the measured quantities into the IED
memory. The stored values will be used for future compensation
of the function measurement.
RESETCOMP BOOLEAN 0 Force the stored natural unbalance current and stored reference
current to zero.

742 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

PID-7215-OUTPUTSIGNALS v2

Table 465: SCUCPTOC (60N) Output signals

Name Type Description

TRIP BOOLEAN Common trip signal
TR_A BOOLEAN Trip signal from either phase A or from the neutral unbalance
depending how many unbalance currents are used (3 or 1).
TR_B BOOLEAN Trip signal from phase B. Forced to zero when only one
unbalance current is used.
TR_C BOOLEAN Trip signal from phase C. Forced to zero when only one
unbalance current is used.
BFI BOOLEAN Common pickup signal
PU_A BOOLEAN Start signal from either phase A or from the neutral unbalance
depending how many unbalance currents are used (3 or 1).
PU_B BOOLEAN Start signal from phase B. Forced to zero when only one
unbalance current is used.
PU_C BOOLEAN Start signal from phase C. Forced to zero when only one
unbalance current is used.
ALARM BOOLEAN General alarm signal
ALMA BOOLEAN Alarm signal for either phase A or for the neutral unbalance
depending how many unbalance currents are used (3 or 1)
ALMB BOOLEAN Alarm signal from phase B. Forced to zero when only one
unbalance current is used.
ALMC BOOLEAN Alarm signal from phase C. Forced to zero when only one
unbalance current is used.
WARNING BOOLEAN General warning signal
WRNA BOOLEAN Warning signal for either phase A or for the neutral unbalance
depending how many unbalance currents are used (3 or 1).
WRNB BOOLEAN Warning signal from phase B. Forced to zero when only one
unbalance current is used.
WRNC BOOLEAN Warning signal from phase C. Forced to zero when only one
unbalance current is used.
BLKDA BOOLEAN Phase A or neutral unbalance operation blocked, depending how
many unbalance currents are used (3 or 1), when corresponding
reference current going lower than set IMin value
BLKDB BOOLEAN Phase B operation blocked when corresponding reference current
goes lower than set IMin value. Forced to zero when only one
unbalance current is used.
BLKDC BOOLEAN Phase C operation blocked when corresponding reference current
goes lower than set IMin value. Forced to zero when only one
unbalance current is used.
COMPEXED BOOLEAN Indicates that a trigger was made for natural unbalance current
calculation
IUNBCLCA REAL Magnitude of calculated unbalance current for either phase A or
neutral unbalance depending how many unbalance currents are
used (3 or 1).
IUNBCLCB REAL Magnitude of calculated unbalance current of phase B. Forced to
zero when only one unbalance current is used.
IUNBCLCC REAL Magnitude of calculated unbalance current of phase C. Forced to
zero when only one unbalance current is used.

Transformer protection RET670 743

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

11.2.5 Settings
PID-7215-SETTINGS v1

Table 466: SCUCPTOC Non group settings (basic)

Name Values (Range) Unit Step Default Description

SCBConf 1 unbalance curr - - 1 unbalance curr Number of unbalance currents available
3 unbalance curr
GlobalBaseSel1 1 - 12 - 1 1 Global base value selector for phase
current
GlobalBaseSel2 1 - 12 - 1 1 Global base value selector for unbalance
current

Table 467: SCUCPTOC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
IMin 5.0 - 100.0 %IB1 0.1 10.0 Minimum reference phase current for
operation in % of IBase1 with reference
to phase current CT
IUnbalWrn> 1.0 - 1000.0 %IB2 0.1 10.0 Current unbalance warning level for
unbalance current in % of IBase2 with
reference to unbalance current CT
tDefWrn 0.00 - 60.00 s 0.01 5.00 Definite time delay for warning
IUnbalAlm> 1.0 - 1000.0 %IB2 0.1 20.0 Current unbalance alarm level for
unbalance current in % of IBase2 with
reference to unbalance current CT
tDefAlm 0.00 - 60.00 s 0.01 5.00 Definite time delay for alarm
IUnbal> 1.0 - 1000.0 %IB2 0.1 30.0 Current unbalance trip level for
unbalance current in % of IBase2 with
reference to unbalance current CT
CurveType Definite time - - Definite time Selection of time delay curve type for trip
Programmable
tDefTrip 0.00 - 60.00 s 0.01 5.00 Definite time delay for trip. Note that
when Programmable IDMT curve is
used, this definite time delay will be
added to the calculated IDMT time.
k 0.05 - 999.00 - 0.01 1.00 Time multiplier for programmable curve
for trip
tMin 0.00 - 60.00 s 0.01 0.00 Minimum operate time for programmable
curve for trip
tReset 0.00 - 60.00 s 0.01 0.02 Reset time delay for warning, alarm and
trip
tPCrv 0.005 - 3.000 - 0.001 2.00 Parameter P for programmble curve for
trip
tACrv 0.005 - 200.000 - 0.001 28.200 Parameter A for programmble curve for
trip
tBCrv 0.0000 - 20.0000 - 0.0001 0.1217 Parameter B for programmble curve for
trip
tCCrv 0.1 - 10.0 - 0.1 1.0 Parameter C for programmble curve for
trip

Table 468: SCUCPTOC Non group settings (advanced)

Name Values (Range) Unit Step Default Description

BlockTrip Trip disabled - - Trip enabled Trip blocked / enabled
Trip enabled

744 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

11.2.6 Monitored data

PID-7215-MONITOREDDATA v1

Table 469: SCUCPTOC Monitored data

Name Type Values (Range) Unit Description

LASTCOMP GROUP - - Indicates date and time when last trigger
SIGNAL was made for natural unbalance current
calculation
IUNBCLCL1 REAL - A Magnitude of calculated unbalance
current for either phase L1 or neutral
unbalance depending how many
unbalance currents are used (3 or 1).
IUNBCLCL2 REAL - A Magnitude of calculated unbalance
current of phase L2. Forced to zero
when only one unbalance current is
used.
IUNBCLCL3 REAL - A Magnitude of calculated unbalance
current of phase L3. Forced to zero
when only one unbalance current is
used.
IL1 REAL - A Reference quantity which is either phase
L1 current or positive sequence current
depending how many unbalance
currents are used (3 or 1).
IL2 REAL - A Current in phase L2. Forced to zero
when only one unbalance current is
used.
IL3 REAL - A Current in phase L3. Forced to zero
when only one unbalance current is
used.
IUNBL1 REAL - A Unbalance current in either phase L1 or
neutral depending how many unbalance
currents are used (3 or 1).
IUNBL2 REAL - A Unbalance current in phase L2. Forced
to zero when only one unbalance current
is used.
IUNBL3 REAL - A Unbalance current in phase L3. Forced
to zero when only one unbalance current
is used.
IMEML1 REAL - A Stored value for either phase L1 current
or positive sequence current depending
how many unbalance currents are used
(3 or 1).
IMEML2 REAL - A Stored phase current of phase L2.
Forced to zero when only one unbalance
current is used.
IMEML3 REAL - A Stored phase current of phase L3.
Forced to zero when only one unbalance
current is used.
IMEMUNBL1 REAL - A Stored unbalance current for either
phase L1 or neutral depending how
many unbalance currents are used (3 or
1).
IMEMUNBL2 REAL - A Stored unbalance current of phase L2.
Forced to zero when only one unbalance
current is used.
Table continues on next page

Transformer protection RET670 745

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

Name Type Values (Range) Unit Description

IMEMUNBL3 REAL - A Stored unbalance current of phase L3.
Forced to zero when only one unbalance
current is used.
IREFUNBL1 REAL - A Magnitude of stored unbalance current
scaled to the reference quantity for either
phase L1 or neutral depending how
many unbalance currents are used (3 or
1).
IREFUNBL2 REAL - A Magnitude of stored unbalance current
scaled to present phase current of phase
L2. Forced to zero when only one
unbalance current is used.
IREFUNBL3 REAL - A Magnitude of stored unbalance current
scaled to present phase current of phase
L3. Forced to zero when only one
unbalance current is used.

11.2.7 Operation principle GUID-EBE289B2-BE8B-46BE-AD75-BCD57C42D6B9 v1

In case of single WYE or H-bridge capacitor bank configurations the three-phase unbalance currents
are used for the protection. For double WYE configuration, only the neutral unbalance current is used
for the protection. The internal unbalance in the capacitor bank due to capacitor units or elements
failure is measured by the SCUCPTOC function and warning, alarm, start and trip signals are issued
when the unbalance current exceeds preset levels. The terminologies of different currents used in
the document are mentioned in the following table:

Table 470: Different terminologies of currents used in the function

Quantity Description
ĪLy Measured phase current
(where y = 1, 2, and 3)
ĪUnbLy Measured unbalance current

Īx Reference current

ĪMemUnbLy Stored natural unbalance current

ĪMemLy Stored reference current

ĪRefUnbLy Reference unbalance current

ĪUnbClcLy Calculated unbalance current

IBase1 and IBase2 corresponds to the primary phase currents and primary
unbalance currents, respectively.

The unbalance current in a phase or in the neutral is either due to natural differences in the capacitor
bank impedances or due to faults within the capacitor bank.

The natural unbalance current in the capacitor bank (ĪMemUnbLy) is present because of the following
factors:

• Mismatch of capacitor value with the manufacturing data

• Varying temperature
• Aging of capacitors

To avoid operation of the SCUCPTOC function during healthy conditions of the capacitor bank, the
natural unbalance current (ĪMemUnbLy) is measured during a healthy situation and stored for future
reference. The actively measured unbalance current (ĪUnbLy) is then compensated by subtracting the
stored natural unbalance current (ĪMemUnbLy) and the resulting current is referred to as the calculated

746 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

unbalance current (ĪUnbClcLy ). By doing this, the sensitivity of the protection function improves and
can be maintained as the capacitor bank changes its natural unbalance current over its lifetime.

Storing of the natural unbalance current is achieved through an active trigger input (TRIGCOMP).
This TRIGCOMP input can be activated by using either a binary input, MMS input or through an
LHMI command.

The unbalance current flowing through the capacitor bank is directly proportional to the respective
phase current in the shunt capacitor bank and is expressed through the following equation:

I UNBLy = k ´ I X
IECEQUATION19016 V1 EN-US (Equation 235)

Where k depends on the impedance of the capacitor bank.

If any external disturbances occur, the phase currents of the SCB will be affected, which in turn
changes the unbalance current as per Equation 235. Since the natural unbalance current (ĪMemUnbLy)
is stored under the healthy condition of the system, it is scaled to the present phase current (Īx) in
order to compare correctly with the present unbalance current. This scaled natural unbalance current
is considered as the reference unbalance current which is compensated from the measured (present)
unbalance current.

For double WYE connected capacitor banks, the positive sequence component of the three-phase
current is selected as the reference current (Īx). Whereas for single WYE or H-bridge connected
capacitor banks, individual phase currents are considered as the reference current (Īx) to the
respective phase unbalance currents.

If SCBConf is selected as 1 unbalance curr, then:

• One unbalance current is connected to the function.

• Positive sequence component of the three-phase current is selected as reference current (Īx).

If SCBConf is selected as 3 unbalance curr, then:

• Three unbalance currents are connected to the function.

• Three individual phase currents are considered as the reference current (Īx) to the respective
phase unbalance currents.

The measured unbalance current (ĪUnbLy) is referred with respect to its reference
current (Īx).

The stored natural unbalance current (ĪMemUnbLy) is scaled with the present phase current, which is
considered as the reference unbalance current (ĪRefUnbLy).

The reference unbalance current is obtained by the following equation:

I
X
I = ×I
RefUnbLy MemUnbLy
I
MemLy

IECEQUATION19021 V1 EN-US (Equation 236)

The outputs IMEMUNBLy (where y = 1, 2, and 3) and IMEMLy shows the magnitude of the recorded
value of natural unbalance current (ĪMemUnbLy) and reference current (ĪMemLy), respectively. The
output IREFUNBLy shows the magnitude of the reference unbalance current (ĪRefUnbLy).

When there is no stored current, such as when the function is first turned on, the
stored reference and stored natural unbalance current are considered as zero.

Transformer protection RET670 747

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

The calculated unbalance current is obtained by the following equation:

I
UnbClcLy (
= I
UnbLy
-I
Re fUnbLy )
IECEQUATION19022 V1 EN-US (Equation 237)

IX

IMemLy = IX
IMemLy

IRefUnbLy
IMemUnbLy = IUnbLy IUnbLy
IMemUnbLy

IUnbClcLy -IRefUnbLy

At the instant of TRIG CO MP Afte r the element fai lure

IEC19000188-1-en-us.vsdx
IEC19000188 V1 EN-US

Figure 444: Unbalance current calculation

If the magnitude of the calculated unbalance current (ĪUnbClcLy) is higher than the set value, an
internal fault is declared in the shunt capacitor bank.

The output IUNBCLCLy (where y = 1, 2, and 3) shows the magnitude of the calculated unbalance
current (ĪUnbClcLy).

When TRIGCOMP is activated:

• The measured unbalance current and reference current are considered as stored natural
unbalance current (ĪMemUnbLy) and stored reference current (ĪMemLy) respectively, and these two
currents are used for further calculation of unbalance current.
• The output COMPEXED is pulsed for a duration of 100 ms. This indicates that the function is
ready for the reference unbalance current calculation.
• The output LASTCOMP displays the date and time of the latest successfully performed trigger
event.

748 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

100 ms
COMPEXED

TRIGCOMP DATE LASTCOMP

AND
TIME
IUnbLy
T IMemUnbLy

Z -1

Ix
T IMemLy

Z -1

IEC19000187-1-en.vsdx
IEC19000187 V1 EN-US

Figure 445: Trigger logic

TRIGCOMP input is inhibited when:

• Any measured unbalance current has disturbances at the time of trigger.

• The trip signals exist.
• INHIBIT input is active.
• Reference current is below set IMin.

Ensure that IED date and time values are set or synchronized properly before the
compensation process.

All the stored current values can be reset to zero by activating RESETCOMP input. When
RESETCOMP is activated by using either a binary input or through an LHMI command, the stored
natural unbalance current (ĪMemUnbLy) and the stored reference current (ĪMemLy) resets to zero. By
returning the stored natural unbalance current value to zero, the SCUCPTOC function behaves as an
over-current protection and will respond directly to the measured unbalance current.

Minimum reference current check

If SCBConf is selected as 1 unbalance curr and if the magnitude of the positive sequence component
of the three-phase current goes below the set minimum current level, the SCUCPTOC function is
blocked and the output BLKDL1 rises. The corresponding analog output IUNBCLCL1 will show a
zero value.

If SCBConf is selected as 3 unbalance curr and if any of the phase current magnitude goes below
the set minimum current level, the corresponding phase operation is blocked and the respective
output BLKDLy (where y = 1, 2, and 3) rises. The corresponding analog output IUNBCLCLy will show
a zero value.

The setting IMin is used to set the minimum current level.

Transformer protection RET670 749

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

ScbConf

IL1 Reference Current (Ix)

IL2
Reference current BLKDLy
IL3 selection
IMin
<

Positive sequence component

IEC19000186-1-en-us.vsdx
IEC19000186 V1 EN-US

Figure 446: Minimum reference current check logic

Warning, Alarm, and Trip logic

The current unbalance protection function has warning, alarm, and trip signals based on the
calculated unbalance current magnitude. The operation levels for the warning, alarm, and trip can be
independently set. If the magnitude of the calculated unbalance current (ĪUnbClcLy) is higher than the
set warning level IUnbalWrn>, a security time delay of approximately 20 ms is considered to check
the stability of the warning pickup level. This security time avoids incorrect operation due to de-
energization and energization of the SCB.

The warning level pickup signal is passed through a definite timer before giving the output WRNLy
(where y = 1, 2, and 3). The definite time delay for the warning signal can be set by using the setting
tDefWrn. The general warning output WARNING is activated when any one of the outputs among
WRNLy becomes active.

Similar to the warning logic, for the alarm output the set alarm limit IUnbalAlm> is checked. Once the
alarm level is crossed, the ALMLy output raises after the security time delay. The definite time delay
for the alarm signal can be set by using the setting tDefAlm. The general alarm output ALARM is
activated when any one of the outputs among ALMLy becomes active.

The STLy output is activated if the magnitude of the calculated unbalance current (ĪUnbClcLy) is above
the set trip level which is set by using the setting IUnbal>. The stability is checked by adding a
security time delay of approximately 20 ms.

The TRLy output is issued after a time delay, which is based on the setting CurveType.

If the setting CurveType is selected as Definite time, then definite time delay is selected for the trip
operation and the output is activated after a time delay given by the setting tDefTrip.

If the setting CurveType is selected as Programmable, then programmable curve is selected for the
trip operation and the output is activated after a time delay given by the following equation:

ì ææ A ö öü
top = max ítMin, ç ç P + B ÷ ´ k + tDef ÷ý
î èè I - C ø øþ

IECEQUATION19370 V1 EN-US (Equation 238)

Where,

A, B, C, and P are the numerical coefficients which can be set by using the settings tACrv, tBCrv,
tCCrv, and tPCrv respectively.

750 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

k is the time multiplier setting value which can be set by using the setting ‘k’

tMin is the setting which provides the minimum operating time for the programmable curve

tDef is the definite time delay which can be set by using the setting tDefTrip

I is the ratio between the magnitude of calculated unbalance current (ĪUnbClcLy) and the setting
IUnbal>

top is the operating time in seconds

The general start output START is activated when any one of the outputs among STLy becomes
active. Similarly, the general trip output TRIP is activated when any one of the outputs among TRLy
becomes active.

Once the magnitude of the calculated unbalance current (ĪUnbClcLy) goes below the set warning level,
the warning output resets after the set time delay tReset. Similarly, the alarm and trip outputs reset
after the set tReset time delay and when the magnitude of the calculated unbalance current
(ĪUnbClcLy) goes below the corresponding set levels. To avoid oscillations at the boundary conditions,
hysteresis is added to the calculated unbalance current for comparison with the set value.

The setting BlockTrip can be used to avoid tripping of the function during energization or de-
energization of SCB or while commissioning the IED. To block the TRLy and TRIP signals, select the
setting as Trip disabled.

BLKDL1
tOn  20 ms
IUnbClcL1 a tOn = tDefWrn
ABS From other WRNL3
a >b t tOff = tReset WARNING
phases WRNL2 OR
IUnbalWrn> b t
t WRNL1
tDefWrn AND

BLKWRN
tOn  20 ms
a tOn = tDefAlm
From other ALML3
a >b t tOff = tReset phases
ALARM
t ALML2 OR
IUnbalAlm> b
t ALML1
AND
tDefAlm
STL3
BLKALM From other START
phases
STL2 OR
BlockTrip STL1
AND
tOn  20 ms

a
a >b t AND tOn = tDefTrip

IUnbal> b
t
CurveType
tDefTrip From other TRL3
Definite Time tOff = tReset phases TRIP
TRL2 OR
k
t TRL1
tPCrv AND
t
tACrv

tBCrv IDMT Curve

tCCrv
tMin
tReset

INHIBIT
OR
BLOCK

BLKTR

IEC19000179-1-en.vsdx
IEC19000179 V1 EN-US

Figure 447: Simplified Warning, Alarm, and Trip logic

Transformer protection RET670 751

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

If any programmable curve is selected as IEC curve, then tDef should be set to 0.

When SCBConf is selected as 1 unbalance curr, then all the outputs corresponding
to one unbalance current are referred to phase L1 and the remaining phases (L2 and
L3) outputs show zero.

2.8

2.6
Unbalance current (I) in (pu)

2.4

2.2

2.0

1.8

1.6

1.4

1.2

1
0 500 1000 1500
Operate time (sec)
IEC19000192-1-en.vsdx

IEC19000192 V1 EN-US

Figure 448: Typical programmable curve

The programmable curve with the following values of the numerical coefficients are shown in Figure
448.

Name Value
tMin 0.0
k 1
tPCrv 2.0
tACrv 28.2
tBCrv 0.1217
tCCrv 1.0
tDef 5.00
tMin 0.00

Blocking logic
• When the BLOCK input is activated, the binary outputs of the function will be reset.
• The warning, alarm, and trip outputs can be blocked individually by using BLKWRN, BLKALM,
and BLKTR inputs respectively.
• The INHIBIT input can be used in case of any problems during switching On/Off of a capacitor
bank and also it can be used to freeze all the calculations and to block binary outputs.

Table 471 summarizes the INHIBIT and BLOCK behavior in the function.

752 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

Table 471: INHIBIT and BLOCK behavior in the function

Activated ILy and IMEMLy and IUNBCLCLy TIMER operation TRIGCOMP RESETCOMP
input signal IUNBLy IMEMUNBLy
INHIBIT - Freeze Freeze Reset Not allowed Allowed
BLOCK - - - Reset Allowed Allowed
– No impact due to the respective input activation

IEC 61850 reporting

The reporting of reference unbalance current is performed in 1 minute interval over IEC 61850. If the
reference unbalance current changes from the last reported value, and if the change is larger than
the pre-defined limit of 2% of IBase2, then the measuring channel reports the new value irrespective
of the cyclic trigger as shown in Figure 449. Similarly the calculated unbalance current is also
reported.

Set IBase2 equal to the unbalance CT rated primary current.

Value

Y1...Y7 : Cyclic reported values, depending upon time Δt.

Y’ and Y” : Deadband reported value, change is greater than setting

Value
Reported

Y5 Y6
+ΔY

-ΔY

Y”
Y’
Y1 Y2 Y7
Y4
Y3

Δt Δt Δt Δt Δt Δt

Time
IEC16000109-2-en.vsdx

IEC16000109 V2 EN-US

Figure 449: Reporting over IEC 61850

Transformer protection RET670 753

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

11.2.8 Technical data

GUID-E6D094FC-3059-4B7A-B171-485B48B9EBC5 v1

Table 472: Current unbalance protection of shunt capacitor bank SCUCPTOC

Function Range Accuracy

Current unbalance level (1.0 -1000.0)% of IBase2 ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir
Reset ratio >95% at (5.0 - 1000.0)% of IBase2 -
>75% at (1.0 - 5.0)% of IBase2
Minimum reference current (5.0 - 100.0)% of IBase1 ±1.0% of Ir
Independent time delay at 0 to 2 x (0.00-60.00) s ±0.2% or ±65 ms, whichever is
Iset greater

Reset time delay at to 2 x Iset to 0 (0.00 - 60.00) s ±0.2% or ±45 ms, whichever is
greater
Inverse time characteristics Programmable ±5.0% or ±65 ms, whichever is
greater
Minimum operate time for inverse (0.00 - 60.00) s ±0.2% or ±65 ms, whichever is
curve greater
Operate time, START at 0 to 2 x Iset Min = 30 ms -
Max = 60 ms
Reset time, START at 2 x Iset to 0 Min = 20 ms -
Max = 35 ms
Critical impulse time 10 ms typically at 0 to 10 x Iset -

Impulse margin time 20 ms typically -

11.3 Phase voltage differential based capacitor bank

unbalanced protection, SCPDPTOV GUID-662626C7-409B-4CE2-9DF0-A47A3A2FC5DF v1

11.3.1 Identification
GUID-9E095985-CC54-4BDE-8108-B10BBB5EE3EE v1

Function description IEC 61850 IEC 60617 identification ANSI/IEEE C37.2 device number
identification
Phase voltage differential SCPDPTOV Ud> 87V
based capacitor bank
unbalanced protection

11.3.2 Functionality GUID-EA91752D-C383-4215-A4E9-7678FD3E5D6D v1

Shunt capacitor banks (SCB) are used in transmission and distribution substations for the benefit of
reactive power support and filtering. Any internal fault in the capacitor bank leads to unbalance in the
SCB and severe damage to the entire bank, which can result in an explosion or fire. In the shunt
capacitor bank, the internal faults are due to open-circuit or short circuit of the capacitor units or
elements. The phase voltage differential protection function (SCPDPTOV) can detect the voltage
unbalance in the capacitor bank.

The SCPDPTOV function can be applied to grounded and ungrounded capacitor bank
configurations, where the three-phase bus and tap voltage measurements are available. The function
has the option of connecting an ungrounded capacitor bank configuration with or without neutral
voltage measurement. If a neutral VT is not available, then the zero sequence component of the bus
voltage is used as the neutral voltage (UN).The tapped voltage can be measured in percentage of the

754 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

total series capacitor groups in the bank from the ground or across a low-voltage capacitor in each
phase. The typical shunt capacitor bank configuration with VT connections is shown in Figure 450.

Bus

ULx

UTapLx

SCB

UN

Grounded/Ungrounded

Lx = Phase L1, L2 and L3

IEC19000639-1-en.vsdx
IEC19000639 V1 EN-US

Figure 450: Single line diagram of the typical single WYE shunt capacitor bank configuration

11.3.3 Function block GUID-0F409D7D-DF47-4B56-9A15-0B09D801375A v1

SCPDPTOV
U3P* TRIP
U3PTAP* TRL1
U3NEUT TRL2
BLOCK TRL3
BLKTR START
BLKALM STL1
BLKWRN STL2
INHIBIT STL3
TRIGCOMP ALARM
RESETCOMP ALML1
ALML2
ALML3
WARNING
WRNL1
WRNL2
WRNL3
BLKDL1
BLKDL2
BLKDL3
DIFURATL1
DIFURATL2
DIFURATL3
COMPEXED
PUDIFL1
PUDIFL2
PUDIFL3
USEDURATL1
USEDURATL2
USEDURATL3
URATIOL1
URATIOL2
URATIOL3

IEC19000716-1-en.vsdx
IEC19000716 V1 EN-US

Figure 451: SCPDPTOV function block

Transformer protection RET670 755

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

11.3.4 Signals
PID-7276-INPUTSIGNALS v1

Table 473: SCPDPTOV Input signals

Name Type Default Description

U3P GROUP - Group signal for three phase bus voltage
SIGNAL
U3PTAP GROUP - Group signal for three phase tap voltage
SIGNAL
U3NEUT GROUP - Group signal for capacitor bank neutral voltage
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Block of trip
BLKALM BOOLEAN 0 Block of alarm
BLKWRN BOOLEAN 0 Block of warning
INHIBIT BOOLEAN 0 Inhibit the function
TRIGCOMP BOOLEAN 0 Trigger input to store the voltage ratios into the IED memory. The
stored values will be used for future compensation in the function.
RESETCOMP BOOLEAN 0 Reset the stored voltage ratios to set voltage ratio value

PID-7276-OUTPUTSIGNALS v1

Table 474: SCPDPTOV Output signals

Name Type Description

TRIP BOOLEAN General trip signal
TRL1 BOOLEAN Trip signal from phase L1
TRL2 BOOLEAN Trip signal from phase L2
TRL3 BOOLEAN Trip signal from phase L3
START BOOLEAN General start signal
STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3
ALARM BOOLEAN General alarm signal
ALML1 BOOLEAN Alarm signal from phase L1
ALML2 BOOLEAN Alarm signal from phase L2
ALML3 BOOLEAN Alarm signal from phase L3
WARNING BOOLEAN General warning signal
WRNL1 BOOLEAN Warning signal from phase L1
WRNL2 BOOLEAN Warning signal from phase L2
WRNL3 BOOLEAN Warning signal from phase L3
BLKDL1 BOOLEAN Function operation blocked due to bus voltage in phase L1 or all
three phase equivalent tap voltages going below UMin>
BLKDL2 BOOLEAN Function operation blocked due to bus voltage in phase L2 or all
three phase equivalent tap voltages going below UMin>
BLKDL3 BOOLEAN Function operation blocked due to bus voltage in phase L3 or all
three phase equivalent tap voltages going below UMin>
Table continues on next page

756 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

Name Type Description

DIFURATL1 BOOLEAN Alarm when deviation between the calculated and the set voltage
ratio for phase L1 is larger than the set threshold limit for
percentage variation (URatioVar>)
DIFURATL2 BOOLEAN Alarm when deviation between the calculated and the set voltage
ratio for phase L2 is larger than the set threshold limit for
percentage variation (URatioVar>)
DIFURATL3 BOOLEAN Alarm when deviation between the calculated and the set voltage
ratio for phase L3 is larger than the set threshold limit for
percentage variation (URatioVar>)
COMPEXED BOOLEAN Indicates that a trigger was made for compensation
PUDIFL1 REAL Differential voltage magnitude of phase L1 in % of UBase
PUDIFL2 REAL Differential voltage magnitude of phase L2 in % of UBase
PUDIFL3 REAL Differential voltage magnitude of phase L3 in % of UBase
USEDURATL1 REAL Magnitude of ratio between tap and bus voltages stored and used
for calculation of differential voltage of phase L1
USEDURATL2 REAL Magnitude of ratio between tap and bus voltages stored and used
for calculation of differential voltage of phase L2
USEDURATL3 REAL Magnitude of ratio between tap and bus voltages stored and used
for calculation of differential voltage of phase L3
URATIOL1 REAL Magnitude of ratio between tap and bus voltages of phase L1
URATIOL2 REAL Magnitude of ratio between tap and bus voltages of phase L2
URATIOL3 REAL Magnitude of ratio between tap and bus voltages of phase L3

11.3.5 Settings
PID-7276-SETTINGS v1

Table 475: SCPDPTOV Non group settings (basic)

Name Values (Range) Unit Step Default Description

SCBGndType Grounded - - Grounded Selection of shunt capacitor bank ground
Ungrounded type
NeutVoltMeas Not available - - Available Selection of shunt capacitor bank neutral
Available voltage VT availability
GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups
VoltRatioL1 0.010 - 0.950 - 0.001 0.500 Voltage ratio of tap voltage to bus
voltage for phase L1
VoltRatioL2 0.010 - 0.950 - 0.001 0.500 Voltage ratio of tap voltage to bus
voltage for phase L2
VoltRatioL3 0.010 - 0.950 - 0.001 0.500 Voltage ratio of tap voltage to bus
voltage for phase L3

Table 476: SCPDPTOV Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
URatioVar> 5 - 300 % 1 10 Threshold limit for percentage variation
of calculated voltage ratio from set
voltage ratios (VoltRatioLx, where Lx is
phase L1, L2 and L3)
UMin> 5.0 - 100.0 %UB 0.1 50.0 Minimum bus voltage for operation in %
of UBase
Table continues on next page

Transformer protection RET670 757

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

Name Values (Range) Unit Step Default Description

UdifWrn> 1.0 - 95.0 %UB 0.1 5.0 Phase voltage differential warning level
in % of UBase
tDefWrn 0.00 - 60.00 s 0.01 5.00 Definite time delay to warning
UdifAlm> 1.0 - 95.0 %UB 0.1 8.0 Phase voltage differential alarm level in
% of UBase
tDefAlm 0.00 - 60.00 s 0.01 5.00 Definite time delay to alarm
Udif> 1.0 - 95.0 %UB 0.1 10.0 Phase voltage differential trip level in %
of UBase
CurveType Definite time - - Definite time Selection of time delay curve type for trip
Programmable
tDefTrip 0.00 - 60.00 s 0.01 5.00 Definite time delay for trip
k 0.05 - 1.10 - 0.01 0.05 Time multiplier for programmable curve
for trip
tMin 0.00 - 60.00 s 0.01 0.10 Minimum operate time for programmable
curve for trip
tReset 0.00 - 60.00 s 0.01 0.02 Reset time delay for warning, alarm and
trip
tPCrv 0.000 - 3.000 - 0.001 1.000 Parameter P for programmble curve for
trip
tACrv 0.005 - 200.000 - 0.001 1.000 Parameter A for programmble curve for
trip
tBCrv 0.50 - 100.00 - 0.01 1.00 Parameter B for programmble curve for
trip
tCCrv 0.0 - 1.0 - 0.1 0.0 Parameter C for programmble curve for
trip
tDCrv 0.000 - 60.000 - 0.001 0.000 Parameter D for programmble curve for
trip
CrvSat 0 - 100 - 1 0 Tuning parameter for programmable
curve

Table 477: SCPDPTOV Non group settings (advanced)

Name Values (Range) Unit Step Default Description

BlockTrip Trip disabled - - Trip enabled Trip blocked / enabled
Trip enabled

11.3.6 Monitored data

PID-7276-MONITOREDDATA v1

Table 478: SCPDPTOV Monitored data

Name Type Values (Range) Unit Description

LASTCOMP GROUP - - Indicates date and time when the last
SIGNAL trigger was made for compensation
UDIFL1 REAL - kV Magnitude of differential voltage of
phase L1
UDIFL2 REAL - kV Magnitude of differential voltage of
phase L2
UDIFL3 REAL - kV Magnitude of differential voltage of
phase L3
PUDIFL1 REAL - % Differential voltage magnitude of phase
L1 in % of UBase
Table continues on next page

758 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

Name Type Values (Range) Unit Description

PUDIFL2 REAL - % Differential voltage magnitude of phase
L2 in % of UBase
PUDIFL3 REAL - % Differential voltage magnitude of phase
L3 in % of UBase
UL1 REAL - kV Bus voltage of phase L1
UL2 REAL - kV Bus voltage of phase L2
UL3 REAL - kV Bus voltage of phase L3
UTAPL1 REAL - kV Tap voltage of phase L1
UTAPL2 REAL - kV Tap voltage of phase L2
UTAPL3 REAL - kV Tap voltage of phase L3
UNSCB REAL - kV Measured voltage at capacitor bank
neutral
USEDURATL1 REAL - - Magnitude of ratio between tap and bus
voltage used for calculation of differential
voltage of phase L1
USEDURATL2 REAL - - Magnitude of ratio between tap and bus
voltage used for calculation of differential
voltage of phase L2
USEDURATL3 REAL - - Magnitude of ratio between tap and bus
voltage used for calculation of differential
voltage of phase L3
URATIOL1 REAL - - Magnitude of ratio between tap and bus
voltage of phase L1
URATIOL2 REAL - - Magnitude of ratio between tap and bus
voltage of phase L2
URATIOL3 REAL - - Magnitude of ratio between tap and bus
voltage of phase L3

11.3.7 Operation principle GUID-55F8BC0C-9A36-4CA0-A390-6F49A8EEDB28 v1

The SCPDPTOV function is based on the voltage division principle across the capacitor bank. It uses
the measured bus and tap voltages to calculate the differential voltage in the shunt capacitor bank
which is caused by the internal faults. The differential voltage is either due to the difference in the
capacitor bank impedances or due to the faults within the capacitor bank. The phase voltage
differential protection is intended to operate for the capacitor elements or the units failure within the
capacitor bank.

The measured tap voltages are multiplied by the voltage ratio and subtracted from the bus voltages
to give the differential voltage (UDIFLx, where Lx = Phase L1, L2 and L3).

1
UDIFLx  U Lx   U TapLx
m

IECEQUATION19371 V1 EN-US (Equation 239)

Where,

m is the voltage ratio of the tap voltage to bus voltage.

As per the tap position, the measured bus voltage and the tap voltage have a constant voltage ratio.
This voltage ratio can be calculated based on the tap position and set in the function (VoltRatioLx).
The function continuously calculates the voltage ratio using the measured bus voltage and tap
voltage. This calculated voltage ratio can be stored and used in the function by activating a trigger

Transformer protection RET670 759

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

input (TRIGCOMP). The trigger input can be activated by using either a binary input, MMS input or
through an LHMI command.

The stored voltage ratio helps to remove the differential voltage due to mismatch between real
capacitor unit values and ideal manufacturing data, variation in temperature and aging of capacitors.
In the case of ungrounded shunt capacitor bank configuration, measured neutral voltage or zero
sequence component of the bus voltage is used to calculate the voltage ratio and differential voltage.

The Shunt capacitor bank grounding type can be selected by using the parameter setting
SCBGndType.

• If the parameter setting SCBGndType is selected as Grounded, then the function uses grounded
capacitor bank configuration.
• If the parameter setting SCBGndType is selected as Ungrounded, then the function uses
ungrounded capacitor bank configuration.

The internal fault caused by open circuiting or short circuiting of the capacitor elements or the units in
the bank results in a differential voltage. Based on the magnitude of a differential voltage, the
function identifies the severity of the internal fault in the SCB.

UBase corresponds to the primary bus voltage.

11.3.7.1 Voltage ratio calculation and trigger update GUID-3F5432F2-E84D-4963-A284-71CF20772C6E v1

The voltage ratio is calculated using bus, tap, and neutral voltage as follows:

U TapLx U N
U RatClcLx 
U Lx U N
IECEQUATION19372 V1 EN-US (Equation 240)

Where URatClcLx is an internal signal which represents the calculated voltage ratio for phase Lx (Lx =
Phase L1, L2 and L3).

For a grounded SCB configuration, the neutral voltage UN is 0.

The URatClcLx is checked against plausibility limit (0.000 ≤ URatClcLx ≤ 1.000). If URatClcLx passes the
plausibility check, the output URATIOLx shows the calculated voltage ratio (URatClcLx). Otherwise, the
output URATIOLx shows 9999.999 to indicate that the calculated voltage ratio is invalid.

If URATIOLx is valid, its percentage variation from the set value (VoltRatioLx) is monitored as shown
in Equation 241. If the monitored percentage value goes above the set percentage limit
(URatioVar>), the binary output DIFURATLx is raised.

| VoltRatioLx  U RatClcLx |  | (URatioVar  /100)  VoltRatioLx |

IECEQUATION19373 V1 EN-US (Equation 241)

The voltage ratio URATIOLx can be stored and used for the calculation of differential voltage by
activating a trigger input (TRIGCOMP). The output USEDURATLx shows the stored voltage ratio.

When TRIGCOMP is activated:

760 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

• The calculated voltage ratio (URATIOLx) is saved as the stored voltage ratio (USEDURATLx)
and used for further calculation of the differential voltage.
• The output COMPEXED is pulsed for a duration of 100 ms. This indicates that the calculated
voltage ratio (URATIOLx) is ready to use for differential voltage calculation.
• The output LASTCOMP displays the date and time of the latest successfully performed trigger
event.

TRIGCOMP input is inhibited if:

• The URatClcLx variation is more than ± 25% of set VoltRatioLx at the time of trigger.
• The trip signal exists.
• Bus voltage or tap voltage of any phase has disturbances at the time of trigger.

When there is no stored voltage ratio, such as when the function is first turned ON,
the set voltage ratio (VoltRatioLx) is considered as stored voltage ratio
(USEDURATLx).

When RESETCOMP is activated by using either a binary input, MMS input or through a LHMI
command, the setting value of voltage ratio (VoltRatioLx) is considered as the stored voltage ratio
(USEDURATLx) and it is used for the differential voltage calculation.

Irrespective of any other inputs (INHIBIT and BLOCK) and minimum voltage
condition, RESETCOMP input activation resets the stored voltage ratios
(USEDURATLx) to set values (VoltRatioLx).

11.3.7.2 Differential voltage calculation GUID-3A9E56C1-D603-4519-84AA-17A3D0C2A11C v1

For a grounded single WYE capacitor bank, the phase wise differential voltage is calculated using
the measured bus voltage (ULx, where Lx = Phase L1, L2 and L3), the tap voltage (UTapLx) and the
stored voltage ratio USEDURATLx. The typical grounded single WYE capacitor bank is shown in
Figure 452.

Transformer protection RET670 761

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

L1

L2

L3

C C C

C C C

Tap
UL1

C C C
UTapL1

C C C

IEC19000644-1-en.vsdx

IEC19000644 V1 EN-US

Figure 452: Grounded single WYE connected SCB

The differential voltage for grounded capacitor bank is calculated as follows:

1
UDIFLx  | U Lx   U TapLx |
USEDURATLx
IECEQUATION19374 V1 EN-US (Equation 242)

Where,

UDIFLx is the differential voltage of phase Lx (Lx = Phase L1, L2 and L3)

ULx is the voltage of phase Lx at the bus. These voltages (UL1, UL2 and UL3) are derived from the
U3P input.

UTapLx is the tap voltage of the phase Lx. These voltages (UTapL1, UTapL2 and UTapL3) are derived from
the U3PTAP input.

USEDURATLx is the stored voltage ratio used for the differential voltage calculation for the phase Lx
(Lx = Phase L1, L2 and L3).

For an ungrounded single WYE capacitor bank, the phase wise differential voltage is calculated
using the measured bus voltage (ULx, where Lx = Phase L1, L2 and L3), the tap voltage (UTapLx), the
capacitor bank neutral voltage (UN) and the stored voltage ratio USEDURATLx. A typical ungrounded
single WYE capacitor bank is shown in Figure 453.

If the neutral VT is not available, the differential voltage is calculated by using the zero-sequence
component of the bus voltage. The selection of the shunt capacitor bank neutral VT availability can
be done using the parameter setting NeutVoltMeas.

762 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

• If the parameter setting NeutVoltMeas is selected as Available, then the measured neutral
voltage from the capacitor bank is used for calculation of the differential voltage.
• If the parameter setting NeutVoltMeas is selected as Not available, then the zero sequence
component of the bus voltage is used for the differential voltage calculation. In this case, the
neutral voltage is calculated as follows.

U L1  U L 2  U L3
U N U 0 
3

IECEQUATION19257 V1 EN-US (Equation 243)

L1

L2

L3

C C C

C C C

Tap
UL1

C C C UTapL1

C C
C

UN

IEC19000645-1-en.vsdx

IEC19000645 V1 EN-US

Figure 453: Ungrounded single WYE connected SCB

The differential voltage for an ungrounded capacitor bank is calculated as follows:

1
UDIFLx  | U Lx  U N    U TapLx  U N  |
USEDURATLx
IECEQUATION19375 V1 EN-US (Equation 244)

Where,

UN is either the measured neutral voltage or the zero sequence component of the bus voltage

The differential voltages are expressed in percentage of base voltage UBase as follows:

UDIFLx
PUDIFLx = ´ 100
UBase 3

IECEQUATION19376 V1 EN-US (Equation 245)

Transformer protection RET670 763

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

Where,

UBase is the Rated bus voltage(L-L)

PUDIFLx is the percentage differential voltage of the phase Lx (Lx = Phase L1, L2 and L3).

11.3.7.3 Minimum voltage check GUID-10B214B7-3769-40D8-9606-30A998E3DF1F v1

A minimum voltage check is performed on both the bus voltages and their equivalent tap voltages.
The equivalent tap voltage is calculated by dividing the tap voltage with the stored voltage ratio
(UEDURATLx).

The output BLKDLx (Lx = Phase L1, L2 and L3) is raised if the corresponding phase bus voltage or
all three phase equivalent tap voltage goes below the set minimum voltage level. To avoid
oscillations of the BLKDLx output, a hysteresis is added for comparison with the set value.

When the function is blocked due to a minimum voltage violation, the output URATIOLx shows
9999.99 and outputs UDIFLx and PUDIFLx show a zero value.

The setting UMin> is used to set the minimum bus voltage or equivalent tap voltage level.

11.3.7.4 Warning, Alarm, and Trip logic GUID-C861D048-1CA2-4788-B165-FF024990B7D7 v1

The phase voltage differential function has warning, alarm, and trip signals based on the magnitude
of the differential voltage. The operation levels for the warning, alarm, and trip can be independently
set. If the magnitude of the differential voltage (UDIFLx) is above the set warning level UdifWrn>, a
security time delay of approximately 20 ms is considered to check the stability of the warning pickup
level. This security time avoids incorrect operation due to de-energization and energization of the
SCB.

The warning level pickup signal is passed through a definite timer before providing the output
WRNLx (Where, x = 1, 2, and 3). The definite time delay for the warning can be set by using the
setting tDefWrn. The general warning output WARNING is raised when any of the outputs among
WRNLx becomes active.

Similar to the warning logic, the set alarm limit UdifAlm> will be checked for the alarm level. Once the
alarm level is crossed, the ALMLx output raises after a security time delay and a definite time delay.
The definite time delay can be set by using the setting tDefAlm. The general alarm output ALARM
will be raised when any of the outputs among ALMLx becomes active.

The SCPDPTOV function raises the STLx output if the magnitude of the differential voltage (UDIFLx)
is above the set trip level which is set by using the setting Udif>, after the stability is checked by
adding a security time delay of approximately 20 ms. The TRLx output activates from the output
STLx after a time delay which is based on the setting CurveType.

If the setting CurveType is selected as Definite time, the definite time delay is selected for the trip
operation and the output is activated after a time delay given by the setting tDefTrip.

If the setting CurveType is selected as Programmable, the programmable curve is selected for the
trip operation and the output is activated after a time delay set by the setting tMin or the time delay
calculated by the equation 246, whichever is greater:

 
 
 k . A 
t op  max tMin, p
 D 
  U U   
 B.  C 
  U  

IECEQUATION19210 V1 EN-US (Equation 246)

764 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

Where,

top is the operating time in seconds

A, B, C, D, and P are the numerical coefficients which can be set using the settings tACrv, tBCrv,
tCCrv, tDCrv, and tPCrv respectively.

k is the time multiplier setting which can be set using the setting k

U is the calculated differential voltage

U> is the settable trip level in % UBase which can be set using the setting Udif>

tMin is the settable minimum operating time for programmable curve which can be set using the
setting tMin

When the denominator in the expression is equal to zero, the time delay is infinity and there is an
undesired discontinuity. Therefore, a tuning parameter CrvSat is set to compensate for this
phenomenon.

In the voltage interval U> up to U>×(1.0 + CrvSat/100) the used voltage is: U>× (1.0 + CrvSat /100).
If the programmable curve is used, then this parameter can be calculated as mentioned below:

CrvSat
B´ -C = 0
100
GUID-5B25EED3-C433-4B55-B545-71205E1E6E79 V1 EN-US (Equation 247)

The general start output START is activated when any one of the outputs among STLx becomes
active. Similarly, the general trip output TRIP is activated when any one of the outputs among TRLx
becomes active.

Once the magnitude of the differential voltage (UDIFLx) drops below the set warning level, the
warning output resets after the set time delay tReset. Similarly, alarm and trip outputs reset after the
set tReset time delay and once the magnitude of the differential voltage (UDIFLx) drops below the
corresponding set levels. To avoid oscillations at boundary conditions, a hysteresis is added to the
calculated differential voltage for comparison with the set value.

The setting BlockTrip can be used to avoid tripping of the function so that the function can be used
for alarming only. To block the TRLx and TRIP signals, select the setting as Trip disabled.

Transformer protection RET670 765

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

BLKDL1
tOn = 20 ms
UDIFL1 a tOn = tDefWrn
ABS From other WRNL3
a>b t tOff = tReset WARNING
phases WRNL2 OR
UdifWrn> b t
t WRNL1
AND
tDefWrn

BLKWRN
tOn = 20 ms

a tOn = tDefAlm
From other ALML3
a>b t tOff = tReset phases
ALARM
ALML2 OR
UdifAlm> t
b
t ALML1
AND
tDefAlm
STL3
BLKALM From other START
phases STL2 OR
BlockTrip STL1
AND
tOn = 20 ms

a
a>b t AND tOn = tDefTrip

Udif> b
t
CurveType
TRL3
tDefTrip Definite Time tOff = tReset From other TRIP
phases TRL2 OR
k
t TRL1
AND
tPCrv
tACrv t

tBCrv
tCCrv
Programmable
tDCrv Curve
CrvSat
tMin

tReset
INHIBIT
OR
BLOCK

BLKTR

IEC19000650-1-en.vsdx
IEC19000650 V1 EN-US

Figure 454: Simplified Warning, Alarm, and Trip logic

Figure 454 shows the programmable curve with the following values of the numerical coefficients:

Table 479: Numerical coefficient values for programmable curve

Name Value
tMin 0.10
k 0.05
tPCrv 1.000
tACrv 1.000
tBCrv 1.00
tCCrv 0.0
tDCrv 0.000
CrvSat 0

766 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

2.5

Differential voltage (U/U>)(pu)

1.5

1
0 tMin 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Operate time (sec)
IEC19000649-1-en.vsdx

IEC19000649 V1 EN-US

Figure 455: Programmable curve

11.3.7.5 Blocking logic GUID-D5E0798D-BF17-488C-9186-916C2FEE6A3F v1

The blocking behavior of the function is mentioned as below:

• When the BLOCK input is activated, the binary outputs of the function will reset and will be
suppressed as long as the BLOCK signal is active.
• The warning, alarm and trip outputs can be blocked individually using BLKWRN, BLKALM, and
BLKTR inputs respectively.
• The INHIBIT input can be used in case of any problems during switching On/Off of a capacitor
bank. Also, it can be used to freeze all the calculations and to block binary outputs.

Table 480 summarizes the INHIBIT and BLOCK behavior in the function.

Table 480: INHIBIT and BLOCK behavior in the function

Active input URATIOLx USEDURATLx PUDIFLx TIMER TRIGCOMP RESETCOMP

signal Operation
INHIBIT Freeze Freeze Freeze Reset Not allowed Allowed
BLOCK - - - Reset Allowed Allowed
- No impact due to the respective input activation

11.3.7.6 IEC 61850 reporting GUID-E5806E17-A3CB-4C9F-A32C-1EA715335CA0 v1

The SCPDPTOV Function has below service values reported over IEC 61850:

• Calculated voltage ratio (URATIOLx) (Cyclic reporting at every 30 seconds)

• Stored voltage ratio (USEDURATLx) (Cyclic reporting at every 30 seconds)
• Differential voltage (UDIFLx) (Dead band reporting for value change more than 1% of UBase
and cyclic reporting at every 1 minute)

The cyclic reporting of the calculated voltage ratio (URATIOLx) and stored voltage ratio
(USEDURATLx) is performed over IEC61850 in a reporting interval of 30 seconds. The measuring
channel reports the value independent of amplitude change as shown in Figure 456.

Transformer protection RET670 767

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

Y1…Y5: Cyclic reported values

∆t: Reporting interval

Y
Value Reported Value Reported
Value Reported Value Reported
(1st)

Y3 Value Reported

Y4
Y2

Y1 Y5

∆t ∆t ∆t ∆t

t
Value 1

Value 2

Value 3

Value 4

Value 5
IEC19000016‐1‐en.vsdx

IEC19000016 V1 EN-US

Figure 456: Cyclic reporting of calculated and stored voltage ratios over IEC 61850
The reporting of differential voltage over IEC 61850 is performed in a reporting interval of 1 minute.
Additionally, if the value has changed from the last reported value, and the change is larger than the
predefined limit of 1% of UBase, then the measuring channel reports the new value to a higher level
immediately irrespective of cyclic trigger as shown in Figure 457.

768 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

Value

Y1...Y7 : Cyclic reported values, depending upon time Δt.

Y’ and Y” : Deadband reported value, change is greater than setting

Value
Reported

Y5 Y6
+ΔY

-ΔY

Y”
Y’
Y1 Y2 Y7
Y4
Y3

Δt Δt Δt Δt Δt Δt

Time
IEC16000109-2-en.vsdx

IEC16000109 V2 EN-US

Figure 457: Differential voltage reporting over IEC 61850

11.3.8 Technical data

GUID-42E90A81-B44D-42C1-B9B5-CD4CDB6E376C v1

Table 481: Phase voltage differential based capacitor bank unbalanced protection SCPDPTOV

Parameters Range Accuracy

Phase voltage differential level (1.0-95.0) % of UBase ±0.5% of Ur
Reset Ratio >90 % at (5.0 – 95.0)% of UBase -
>45% at (1.0 – 5.0)% of UBase
Minimum Bus Voltage (5.0-100.0) % of UBase ±0.5% of Ur
Independent time delay at 0 to 2 x (0.00-60.00) s ±0.2% or ±70 ms whichever is
Uset greater
Reset time Delay at to 2 x Uset to 0 (0.00-60.00) s ±0.2% or ±45 ms whichever is
greater
Inverse time characteristics Programmable ±5.0% or ±70 ms whichever is
greater
Minimum Operate Time for Inverse (0.00-60.00) s ±0.2% or ±70 ms whichever is
Curve greater
Table continues on next page

Transformer protection RET670 769

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

Parameters Range Accuracy

Operate Time, START at 0 to 2 x Min = 30 ms -
Uset Max = 60 ms
Reset Time, START at 2 x Uset to 0 Min = 15 ms -
Max = 35 ms
Critical impulse time 20 ms typically at 0 to 2 x Uset -
Impulse margin time 20 ms typically -

11.4 Voltage unbalance protection of shunt capacitor bank,

SCUVPTOV GUID-C41B59C8-9CA0-4B5F-9F90-354804BC1449 v1

11.4.1 Identification GUID-62C0BF41-EB2D-41E1-A2C6-799C46C1BFD2 v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Voltage unbalance protection of the shunt SCUVPTOV Uub> 60 V
capacitor bank

11.4.2 Functionality GUID-DB1F5E61-48E0-4C2B-852A-42D8EC5F7095 v1

The unbalance protection function provides the protection against faults within the shunt capacitor
bank (SCB). The protection scheme is decided based on the following:

• Fusing method
• Size of the capacitor bank
• Method of grounding
• Available CT or VT installation

The SCUVPTOV function uses the neutral voltage measurement of an ungrounded single or double
WYE configuration of SCB.

The protection arrangements are based on the terminal voltage limit and the current limit of the
capacitor units.

In practice, the unbalance is present in the SCB due to:

• Loss of individual capacitor units or elements

• Inherent system and the capacitor bank unbalances

The natural unbalance, which exists on all the capacitor bank installations, is due to the system
voltage unbalance and the capacitor manufacturing tolerances. In addition to these natural
unbalances, there are secondary unbalance errors that are introduced by the measurement device
tolerances and variations, and by the relative changes in the capacitance due to the difference in the
capacitor unit temperatures in the capacitor bank.

The use of fuses for protecting the capacitor units and its location has influence in the design of the
capacitor bank unbalance protection. Removal of a failed element or unit by its fuse, results in an
increase in the voltage across the remaining elements or units, causing unbalance in the capacitor
bank. Unbalance protection senses these changes associated with the failure of a capacitor element
or unit.

The SCUVPTOV function considers both the bus voltage and the capacitor bank neutral voltage
which is measured between the capacitor bank neutral and ground of the system. It uses the system
bus voltages to remove the system unbalance from the measured neutral voltage. If any internal fault
occurs in the capacitor elements, then there is an unbalance in the capacitor bank and that

770 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

unbalance voltage appears across the neutral. The protection decision is taken based on the
magnitude of the neutral voltage.

11.4.3 Function block GUID-974B2016-611D-499E-A894-22419D6DE2A8 v1

SCUVPTOV
U3P* TRIP
U3NEUT* START
BLOCK ALARM
BLKTR WARNING
BLKALM BLKD
BLKWRN COMP EX ED
INHIBIT PUNU NBAL
TRIGCOMP
RESETCOMP

IEC19000110-1-en.vsdx
IEC19000110 V1 EN-US

Figure 458: SCUVPTOV function block

11.4.4 Signals
PID-7329-INPUTSIGNALS v1

Table 482: SCUVPTOV Input signals

Name Type Default Description

U3P GROUP - Group signal for three phase bus voltage
SIGNAL
U3NEUT GROUP - Group signal for capacitor bank neutral voltage
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Block of trip
BLKALM BOOLEAN 0 Block of alarm
BLKWRN BOOLEAN 0 Block of warning
INHIBIT BOOLEAN 0 Inhibit the function
TRIGCOMP BOOLEAN 0 Trigger input to store the calculated compensation factors into the
IED memory. The stored values will be used for future
compensation in the function.
RESETCOMP BOOLEAN 0 Force the stored compensation factors to zero.

PID-7329-OUTPUTSIGNALS v1

Table 483: SCUVPTOV Output signals

Name Type Description

TRIP BOOLEAN Trip signal
START BOOLEAN Start signal
ALARM BOOLEAN Alarm signal
WARNING BOOLEAN Warning signal
BLKD BOOLEAN Block due to bus voltage in any phase is lower than the set
UMin> value or SCB disconnection is detected
COMPEXED BOOLEAN Indicates that a trigger was made for compensation
PUNUNBAL REAL Capacitor bank neutral unbalance voltage in % of UBase

Transformer protection RET670 771

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

11.4.5 Settings
PID-7329-SETTINGS v1

Table 484: SCUVPTOV Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 485: SCUVPTOV Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
UMin> 5.0 - 100.0 %UB 0.1 75.0 Minimum bus voltage for operation in %
of UBase
CompEnable Disable - - Enable Selection of neutral voltage unbalance
Enable compensation
UNUnbalWrn> 1.0 - 95.0 %UB 0.1 1.0 Neutral voltage unbalance warning level
in % of UBase
tDefWrn 0.00 - 60.00 s 0.01 5.00 Definite time delay to warning
UNUnbalAlm> 1.0 - 95.0 %UB 0.1 2.5 Neutral voltage unbalance alarm level in
% of UBase
tDefAlm 0.00 - 60.00 s 0.01 5.00 Definite time delay to alarm
UNUnbal> 1.0 - 95.0 %UB 0.1 5.5 Neutral voltage unbalance trip level in %
of UBase
CurveType Definite time - - Definite time Selection of time delay curve type for trip
Programmable
tDefTrip 0.00 - 60.00 s 0.01 5.00 Definite time delay for trip
k 0.05 - 15.00 - 0.01 0.05 Time multiplier for programmable curve
for trip
tMin 0.00 - 60.00 s 0.01 0.10 Minimum operate time for programmable
curve for trip
tReset 0.00 - 60.00 s 0.01 0.02 Reset time delay for warning, alarm and
trip
tPCrv 0.000 - 3.000 - 0.001 1.000 Parameter P for programmable curve for
trip
tACrv 0.005 - 200.000 - 0.001 1.000 Parameter A for programmable curve for
trip
tBCrv 0.50 - 100.00 - 0.01 1.00 Parameter B for programmable curve for
trip
tCCrv 0.0 - 1.0 - 0.1 0.0 Parameter C for programmable curve for
trip
tDCrv 0.000 - 60.000 - 0.001 0.000 Parameter D for programmable curve for
trip
CrvSat 0 - 100 - 1 0 Tuning parameter for programmable
curve

Table 486: SCUVPTOV Non group settings (advanced)

Name Values (Range) Unit Step Default Description

BlockTrip Trip disabled - - Trip enabled Trip blocked / enabled
Trip enabled

772 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

11.4.6 Monitored data

PID-7329-MONITOREDDATA v1

Table 487: SCUVPTOV Monitored data

Name Type Values (Range) Unit Description

LASTCOMP GROUP - - Indicates date and time when the last
SIGNAL trigger was made for compensation
UNUNBAL REAL - kV Instantaneous magnitude of capacitor
bank neutral unbalance voltage
PUNUNBAL REAL - % Capacitor bank neutral unbalance
voltage in % of UBase
UL1 REAL - kV Bus voltage of phase L1
UL2 REAL - kV Bus voltage of phase L2
UL3 REAL - kV Bus voltage of phase L3
UNSCB REAL - kV Capacitor bank neutral voltage
K1USED REAL - - Used compensation factor of K1 for
unbalance neutral voltage calculation
K2USED REAL - - Used compensation factor of K2 for
unbalance neutral voltage calculation
K1MON REAL - - Monitored compensation factor of K1 for
unbalance neutral voltage calculation
K2MON REAL - - Monitored compensation factor of K2 for
unbalance neutral voltage calculation

11.4.7 Operation principle GUID-7D38A783-EC0F-45BA-8D9F-05A8E3D9B554 v1

The SCUVPTOV function is used to protect an ungrounded shunt capacitor bank, which has a
neutral voltage transformer. The measured neutral voltage is used to calculate the unbalance neutral
voltage due to the capacitor failure. The function uses the bus voltage to avoid any system
unbalance effect.

A neutral voltage transformer for an ungrounded-WYE connected capacitor bank is connected

between the neutral of the WYE connection and the substation ground. If all the capacitor units are in
service and the system voltage is balanced, then the neutral of the WYE should be close to the
ground potential. If there is some voltage, there is an indication of an unbalance in the bank due to
an out of service capacitor, or due to the system unbalance.

The function can compensate the natural unbalance in the capacitor bank from the measured
unbalance voltage. A zero-sequence component of the three phase bus voltage is used to
compensate the system unbalance from the calculated neutral unbalance voltage. If there is any
neutral unbalance voltage after compensating for the natural and the system unbalances, then it is
because of the unit or elements failure in the capacitor bank.

As the unbalance voltage value is very small, for security reasons the warning and alarm signals
have a settable definite time delay and the trip signal has a definite time delay or a programmable
curve-based time delay.

Figure 459 shows the simplified block diagram of a neutral voltage unbalance protection function.

Transformer protection RET670 773

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

BLKD

Minimum COMPEXED
U3P*
voltage check LASTCOMP
K1MON
SCB
K2MON
disconnection
detection Calculation of K1USED
compensation K2USED
factors
U3NEUT*
TRIGCOMP PUNUNBAL
RESETCOMP Calculation of
INHIBIT neutral
unbalance
voltage UNUNBAL

Warning,
alarm, and
trip logic

START

WARNING
BLOCK Blocking logic ALARM
BLKWRN
TRIP
BLKALM

BLKTR

IEC19000307-1-en.vsdx

IEC19000307 V1 EN-US

Figure 459: SCUVPTOV block diagram

Figure 460 shows the connection between SMAI and the function block of a typical ungrounded
single WYE capacitor bank.

L3

L2

L1

VL1
VL2
VL3

C C C
VL1N

C C C

V L1G C C C

C C C

N
VNG UN

IEC19000308-1-en.vsdx

IEC19000308 V1 EN-US

Figure 460: Ungrounded single WYE SCB connected to function block

Calculation of neutral-to-ground voltage(VNG)

The neutral unbalance voltage is calculated as follows:

Generally, the zero-sequence voltage component is calculated as,

3V0 = VL1G + VL 2G + VL 3G
IECEQUATION19321 V1 EN-US (Equation 248)

Where,

VL1G, VL2G, and VL3G are the phase-to-ground bus voltages of phases L1, L2, and L3, respectively.

3V0 is the zero-sequence voltage component.

774 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

Equation 1 can be re-written by considering the measured neutral voltage as,

3V0 = (VL1N + VNG ) + (VL 2 N + VNG ) + (VL 3 N + VNG )

IECEQUATION19322 V1 EN-US (Equation 249)

Where,

VL1N, VL2N, and VL3N are the bus voltages with respect to the neutral of phases L1, L2, and L3,
respectively.

VNG is the neutral-to-ground voltage.

and,

3VNG - 3V0 = - I L1Z L1 - I L 2 Z L 2 - I L 3 Z L 3

IECEQUATION19323 V1 EN-US (Equation 250)

Where,

IL1, IL2, and IL3 are the phase currents.

ZL1, ZL2, and ZL3 are the impedances of SCB of phases L1, L2, and L3, respectively.

As the capacitor bank is ungrounded,

I L1 + I L 2 + I L 3 = 0
IECEQUATION19324 V1 EN-US (Equation 251)

I L1 = - ( I L 2 + I L 3 )
IECEQUATION19325 V1 EN-US (Equation 252)

Now Equation 250 can be written as,

3 (VNG - VO ) = ( Z L1 - Z L 2 ) I L 2 + ( Z L1 - Z L 3 ) I L 3
IECEQUATION19326 V1 EN-US (Equation 253)

Therefore, the neutral voltage should be,

æ Z - Z L1 ö æ Z L 3 - Z L1 ö
VNG = V0 + ç L 2 ÷ (VNG - VL 2G ) + ç ÷ (VNG - VL 3G )
è 3 Z L2 ø è 3Z L 3 ø
IECEQUATION19327 V1 EN-US (Equation 254)

The neutral-to-ground voltage (VNG) has the following components:

• System unbalance voltage

• Inherent unbalance within the capacitor bank

The voltage appearing at the capacitor bank neutral due to the system unbalance is the zero-
sequence component. An equivalent zero-sequence component can be derived utilizing three-phase
bus voltages. The voltage difference between the neutral unbalance voltage due to the system
unbalance and the zero-sequence voltage is adjusted to zero. Once this adjustment is made, the
effect of the system voltage unbalance is compensated for all conditions of the system unbalance.

In Equation 254, assume that all the impedances at different phases are equal (ZL1 = ZL2 = ZL3), then
Equation 254 can be written as,

Transformer protection RET670 775

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

VNG = V0
IECEQUATION19328 V1 EN-US (Equation 255)

The neutral unbalance voltage is derived as,

VNU = VNG - V0
IECEQUATION19329 V1 EN-US (Equation 256)

However, the effects of manufacturer’s capacitor tolerances are not considered in the calculation of
VNU in Equation 256. An impedance ratio compensates for the remaining error appearing at the
neutral due to the manufacturer’s capacitor tolerance. When this error is subtracted from the
measured neutral-to-ground voltage, the remaining quantity represents the true unbalance resulting
from an element or a unit failure within the bank.

The neutral unbalance voltage is derived as,

VNU = VNG - V0 - (VNG - VL 2G ) K1 - (VNG - VL 3G ) K2

IECEQUATION19330 V1 EN-US (Equation 257)

Note that K1 and K2 factors are scalar quantities whose values are ideally zero if the bank is
completely balanced.

The calculated neutral unbalance voltage is presented at the output PUNUNBAL in terms of % of
UBase and the actual value UNUNBAL is communicated through IEC 61850.

The magnitude of the compensated neutral unbalance voltage (VNU), indicates the presence of faulty
elements in the capacitor bank.

Calculation of compensation factors

To compensate for inherent unbalance within the bank, the factors K1 and K2 are derived from
Equation 257. Since the factors K1 and K2 are scalars and Equation 257 is a phasor equation, this
can be represented as a real and imaginary equation, to solve K1 and K2. If the capacitor bank is
healthy, then the magnitude of the unbalance voltage (VNU) should be zero. Thus,

R e (VNG ) - R e (V0 ) - ( R e (VNG ) - R e (VL 2G ) ) K1 - ( R e (VNG ) - R e (VL 3G ) ) K 2 = 0

IECEQUATION19331 V1 EN-US (Equation 258)

and

I m (VNG ) - I m (V0 ) - ( I m (VNG ) - I m (VL 2G ) ) K1 - ( I m (VNG ) - I m (VL 3G ) ) K 2 = 0

IECEQUATION19332 V1 EN-US (Equation 259)

After solving Equation 258 and Equation 259, the factors are,

K1 =
( ( ( R (V
e ) - Re (V0 ) ) ´ ( I m (VNG ) - I m (VL 3G ) ) ) - ( ( I m (VNG ) - I m (V0 ) ) ´ ( Re (VNG ) - Re (VL 3G ) ) ) )
NG

( ( ( Re (VNG ) - Re (VL 2G ) ) ´ ( I m (VNG ) - I m (VL3G ) ) ) - ( ( I m (VNG ) - I m (VL2G ) ) ´ ( Re (VNG ) - Re (VL3G ) ) ) )

IECEQUATION19333 V1 EN-US (Equation 260)

and

K2 =
( ( ( R (V
e ) - Re (V0 ) ) ´ ( I m (VNG ) - I m (VL 2G ) ) ) - ( ( I m (VNG ) - I m (V0 ) ) ´ ( Re (VNG ) - Re (VL 2G ) ) ) )
NG

( ( ( Re (VNG ) - Re (VL3G ) ) ´ ( I m (VNG ) - I m (VL 2G ) ) ) - ( ( I m (VNG ) - I m (VL3G ) ) ´ ( Re (VNG ) - Re (VL2G ) ) ) )

IECEQUATION19334 V1 EN-US (Equation 261)

776 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

The compensation factors are automatically calculated based on the available voltage
measurements. However, it is assumed that the capacitor bank is in an acceptably balanced state
and neutral unbalance voltage is zero, for the calculation of compensation factors. The calculated
compensation factors can be stored in the IED and used for further calculation of neutral unbalance
voltage by activating the trigger input TRIGCOMP. This TRIGCOMP input can be activated by using
either a binary input, MMS input or through an LHMI command. After the successful operation of the
compensation factor update, a binary output COMPEXED is pulsed for a period of 100 ms. Also, the
function output LASTCOMP indicates the date and time of the latest successfully performed trigger
event.

Ensure that IED date and time values are set or synchronized properly before the
compensation process.

The compensation for the natural unbalance with factors K1 and K2 can be either enabled or disabled
based on the setting CompEnable. If the setting CompEnable is enabled, then the calculated
compensation factors can be stored in the IED for compensation by activating TRIGCOMP input. If
the setting CompEnable is disabled, then the compensation factors are considered as zero. The
calculated compensation factors are shown at the outputs K1MON and K2MON. When there is no
stored compensation factors, such as when the function is first turned on, the stored compensation
factors are considered as zero. The used compensation factor values are shown at outputs K1USED
and K2USED. The used compensation factor values can be reset to zero by activating the
RESETCOMP input. The RESETCOMP input can be activated either through binary input or the
LHMI command.

Stabilization and plausibility check for compensation factors

Only when the calculated compensation factors are within ± 1.000, they will be considered, otherwise
these values will be discarded. These calculated values of compensation factors are provided as
outputs K1MON and K2MON to monitor continuously. When the calculated values are out of range,
the outputs K1MON and K2MON will show 9999.999.

The calculated compensation factors are checked for stability before using them for unbalance
voltage calculation. This check will be performed once the TRIGCOMP input is received. The stability
is checked by observing the deviation in the last five K1 and K2 calculated values. If the difference is
within 2% of the present value, then the compensation factor is updated and COMPEXED is set. If
the calculated compensation factors fail during stability check or if the TRIP output exists in the
SCUVPTOV function, the present TRIGCOMP input is discarded and the COMPEXED output is not
raised.

Minimum bus voltage check

To validate the healthy voltage measurement, the bus voltages are checked for a minimum voltage
level. If the bus voltages are greater than the minimum bus voltage set level, then the function works
as expected. If the bus voltages are below the set minimum bus voltage limit, then function is blocked
and the output BLKD is made high. Additionally the calculated neutral unbalance voltage is forced to
zero.

The minimum voltage level can be set using the setting UMin>.

To avoid oscillations of the BLKD output at the boundary conditions, a hysteresis is added with the
bus voltage for comparison with the set value.

SCB disconnection detection

To avoid maloperation when the SCB is disconnected, the measured neutral voltage and the zero
sequence voltage are checked. If the SCB is disconnected, then the calculated compensation factors
are frozen and the calculated unbalance neutral voltage is set to zero. Also, BLKD output is raised to
indicate the function is blocked.

Transformer protection RET670 777

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

Warning, Alarm, and Trip logic

The neutral voltage unbalance function has warning, alarm, and trip signals based on the calculated
neutral unbalance voltage magnitude. The operation levels for warning, alarm, and trip are settable
independently. As the unbalance voltage value is very small, for security reasons the warning and
alarm signals have a settable definite time delay and the trip signal has a definite time delay or a
programmable curve-based time delay.

If the magnitude of the neutral unbalance voltage (UNUNBAL) is above the set warning level
UNUnbalWrn>, then a security time delay of approximately 20 ms is considered to check the stability
of the warning pickup level. This security time prevents maloperation due to de-energization,
energization, and asymmetrical switching of the SCB.

The warning level pickup signal is passed through a definite timer before giving the output
WARNING. The definite time delay for the warning signal can be set by using the setting tDefWrn.
Similar to the warning logic, the set alarm limit UNUnbalAlm> is checked for the alarm output. Once
the alarm level is crossed, the ALARM output is activated after the security time delay and the set
definite time delay (tDefAlm).

The function gives START output, if the magnitude of the neutral unbalance voltage (UNUNBAL) is
above the trip level set by the setting UNUnbal>. The stability is checked by adding a security time
delay. The TRIP output is activated from the START after a time delay based on the setting
CurveType.

If the setting CurveType is selected as Definite time, then:

• The definite time delay is selected for the trip operation.

• The output is activated after a time delay set by the setting tDefTrip.

If the setting CurveType is selected as Programmable, then:

• The programmable curve is selected for the trip operation.

• The output is activated after a time delay as shown in Equation 262.

ì ü
ï ï
ï k´A ï
top = max ítMin, + D ý
UNUNBAL - UNUnbal >
P
ï æ ö ï
ç B ´ - C ÷
ïî è UNUnbal > ø ïþ

IECEQUATION19335 V1 EN-US (Equation 262)

Where,

A, B, C, D, and P are the numerical coefficients provided by the settings tACrv, tBCrv, tCCrv, tDCrv,
and tPCrv, respectively.

k is the time multiplier setting value provided by the setting k.

tMin is the minimum operating time for the programmable curve.

The time delay is infinity when the denominator in Equation 262 is equal to zero. There will be an
undesired discontinuity. Therefore, a tuning parameter CrvSat is set to compensate for this
phenomenon. In the unbalance voltage interval UNUnbal> up to UNUnbal> × (1.0 + CrvSat/100), the
used voltage will be: UNUnbal> × (1.0 + CrvSat/100). If the programmable curve is used, the
parameter must be calculated so that:

UNUNBAL - UNUnbal >

B´ -C >0
UNUnbal >
IECEQUATION19336 V1 EN-US (Equation 263)

778 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

Once the magnitude of the neutral unbalance voltage is below the set warning level, the warning
output is reset after the set time delay tReset. Similarly, the alarm and the trip outputs are reset after
the set tReset time delay once the magnitude of the neutral unbalance voltage is less than the
corresponding set levels. But the START output resets immediately once the magnitude of the
neutral unbalance voltage is less than the set trip level. To avoid oscillations at the boundary
conditions, a hysteresis is added with the neutral unbalance voltage for comparison with the set
value.

Blocking logic
The function can be blocked by activating the BLOCK input. When the BLOCK input is activated,

• - The function will be blocked from operating binary outputs, the function will reset and will be
suppressed as long as the BLOCK signal is active.
• All the ongoing timers will reset.
• If the TRIGCOMP input is received, the calculated compensation factors can be stored in the
IED.
• The COMPEXED pulse output will be active, if the trigger command is received and valid
compensation factors are calculated and stored.

In each individual level of the warning, the alarm and the trip can be blocked through separate binary
inputs BLKWRN, BLKALM, and BLKTR respectively.

The INHIBIT input can be used in case of any problems during switching On/Off of a capacitor bank.
When the INHIBIT input is activated,

• Binary outputs from the function will reset and will be suppressed as long as the INHIBIT signal
is active.
• All the ongoing timers will reset.
• Processed values (K1MON, K2MON, K1USED, K2USED, PUNUNBAL, and UNUNBAL) are
frozen with the previous valid (plausibility checked) values.
• The function is not allowed to store the compensation factors in the IED.

The INHIBIT input can be connected from the output RECNINH of the CBPGAPC function or an
operation of any bay protection function. Figure 461 shows the logic diagram for the warning, alarm,
and trip logic.

Irrespective of INHIBIT and BLOCK inputs and minimum voltage condition, RESETCOMP input
activation resets the stored compensation factors to zero.

Transformer protection RET670 779

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

BLKD
tOn » 20 ms
UNUNBAL a tOn = tDefWrn
ABS
a>b t tOff = tReset
b t
UNUnbalWrn> t
WARNING
tDefWrn AND

BLKWRN
tOn » 20 ms
a tOn = tDefAlm
t
a>b tOff = tReset
UNUnbalAlm> b t
t
AND
ALARM
tDefAlm
BLKALM

BlockTrip START
AND
tOn » 20 ms
a
t AND tOn = tDefTrip
a>b
UNUnbal> b
t
CurveType
tDefTrip Definite Time tOff = tReset
k t
AND
TRIP
tPCrv
tACrv t
tBCrv
tCCrv IDMT Curve
tDCrv
tMin
CrvSat
tReset
INHIBIT
BLOCK OR

BLKTR

IEC19000309-1-en.vsdx
IEC19000309 V1 EN-US

Figure 461: Simplified Warning, Alarm, and Trip logic

The setting BlockTrip can be used to avoid tripping of the function, so that the function can be used
for alarming only. To block the TRIP signal, select the BlockTrip setting as Trip disabled.

IEC 61850 reporting

The reporting of neutral unbalance voltage is performed in 1 minute interval over IEC 61850. If the
neutral unbalance voltage changes from the last reported value, and if the change is larger than the
pre-defined limit of 1% of UBase, then the measuring channel reports the new value irrespective of
the cyclic trigger as shown in Figure 462.

780 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 11
Unbalance protection

Value

Y1...Y7 : Cyclic reported values, depending upon time Δt.

Y’ and Y” : Deadband reported value, change is greater than setting

Value
Reported

Y5 Y6
+ΔY

-ΔY

Y”
Y’
Y1 Y2 Y7
Y4
Y3

Δt Δt Δt Δt Δt Δt

Time
IEC16000109-2-en.vsdx

IEC16000109 V2 EN-US

Figure 462: Reporting over IEC 61850

Set UBase corresponding to primary bus voltage.

11.4.8 Technical data

GUID-47B33B7C-0F5E-4731-A7A8-FF1BDA5D5F41 v1

Table 488: Voltage unbalance protection of shunt capacitor bank SCUVPTOV

Function Range Accuracy

Neutral voltage unbalance level (1.0-95.0) % of UBase ±0.5% of Ur
Reset ratio >90% at (5.0 – 95.0)% of UBase -
>45% at (1.0 – 5.0)% of UBase
Minimum bus voltage (5.0 - 100.0)% of UBase ±0.5% of Ur
Independent time delay at 0 to 2 x (0.00-60.00) s ±0.2% or ±65 ms, whichever is
Uset greater

Reset time delay at to 2 x Uset to 0 (0.00-60.00) s ±0.2% or ±45 ms, whichever is

greater
Inverse time characteristics Programmable ±5.0% or ±65 ms, whichever is
greater
Table continues on next page

Transformer protection RET670 781

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 11 1MRK 504 164-UEN Rev. N
Unbalance protection

Function Range Accuracy

Minimum operate time for inverse (0.00-60.00) s ±0.2% or ±65 ms, whichever is
curve greater
Operate time, START at 0 to 2 x Uset Min = 30 ms -
Max = 60 ms
Reset time, START at 2 x Uset to 0 Min = 15 ms -
Max = 35 ms
Critical impulse time 20 ms typically at 0 to 2 x Uset -

Impulse margin time 20 ms typically -

782 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 12
Frequency protection

Section 12 Frequency protection

12.1 Underfrequency protection SAPTUF IP15746-1 v3

12.1.1 Identification
M14865-1 v5

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Underfrequency protection SAPTUF 81

f<

SYMBOL-P V1 EN-US

12.1.2 Functionality M13349-3 v13

Underfrequency occurs as a result of a lack of generation in the network.

Underfrequency protection (SAPTUF) measures frequency with high accuracy, and is used for load
shedding systems, remedial action schemes, gas turbine startup and so on. Separate definite time
delays are provided for operate and restore.

SAPTUF is provided with undervoltage blocking.

The operation is based on positive sequence voltage measurement and requires two phase-phase or
three phase-neutral voltages to be connected. For information about how to connect analog inputs,
refer to Application manual /IED application /Analog inputs /Setting guidelines .

12.1.3 Function block M13352-3 v6

SAPTUF
U3P* TRIP
BLOCK START
BLKTRIP RESTORE
BLKREST BLKDMAGN
FREQ

IEC06000279_2_en.vsd
IEC06000279 V2 EN-US

Figure 463: SAPTUF function block

12.1.4 Signals
PID-6752-INPUTSIGNALS v2

Table 489: SAPTUF Input signals

Name Type Default Description

U3P GROUP - Three phase group signal for voltage inputs
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTRIP BOOLEAN 0 Blocking operate output
BLKREST BOOLEAN 0 Blocking restore output

Transformer protection RET670 783

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 12 1MRK 504 164-UEN Rev. N
Frequency protection

PID-6752-OUTPUTSIGNALS v2

Table 490: SAPTUF Output signals

Name Type Description

TRIP BOOLEAN General trip signal
START BOOLEAN General start signal
RESTORE BOOLEAN Restore signal for load restoring purposes
BLKDMAGN BOOLEAN Blocking indication due to low amplitude
FREQ REAL Measured frequency

12.1.5 Settings
PID-6752-SETTINGS v2

Table 491: SAPTUF Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
StartFrequency 35.00 - 75.00 Hz 0.01 48.80 Frequency set value
IntBlockLevel 0.0 - 100.0 %UB 1.0 50.0 Internal blocking level in % of UBase
tDelay 0.000 - 60.000 s 0.001 0.200 Operate time delay
tReset 0.000 - 60.000 s 0.001 0.000 Time delay for reset
tRestore 0.000 - 60.000 s 0.001 0.000 Restore time delay
RestoreFreq 45.00 - 65.00 Hz 0.01 49.90 Restore frequency value
TimerMode Definite timer - - Definite timer Setting for choosing timer mode
Volt based timer
UNom 50.0 - 150.0 %UB 1.0 100.0 Nominal voltage for voltage based timer
in % of UBase
UMin 50.0 - 150.0 %UB 1.0 90.0 Lower operation limit for voltage based
timer in % of UBase
Exponent 0.0 - 5.0 - 0.1 1.0 For calculation of the curve form for
voltage based timer
tMax 0.010 - 60.000 s 0.001 1.000 Maximum time operation limit for voltage
based timer
tMin 0.010 - 60.000 s 0.001 1.000 Minimum time operation limit for voltage
based timer

Table 492: SAPTUF Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

12.1.6 Operation principle M13354-3 v9

Underfrequency protection SAPTUF is used to detect low power system frequency. SAPTUF can
either have a definite time delay or a voltage magnitude dependent time delay. If the voltage
magnitude dependent time delay is applied, the time delay will be longer if the voltage is higher, and
the delay will be shorter if the voltage is lower. If the frequency remains below the set value for a time
period corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid an
unwanted trip due to uncertain frequency measurement at low voltage magnitude, a voltage
controlled blocking of the function is available, that is, if the voltage is lower than the set blocking
voltage IntBlockLevel, the function is blocked and no START or TRIP signal is issued.

784 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 12
Frequency protection

12.1.6.1 Measurement principle M13354-6 v8

The fundamental frequency of the measured input voltage is measured continuously, and compared
with the set value, StartFrequency. The frequency function is dependent on the voltage magnitude. If
the voltage magnitude decreases below the setting IntBlockLevel, SAPTUF gets blocked, and the
output BLKDMAGN is issued. All voltage settings are made in percent of the setting UBase, which
should be set as a phase-phase voltage in kV.

To avoid oscillations of the output START signal, a hysteresis has been included.

12.1.6.2 Time delay M13354-10 v10

The time delay for underfrequency protection SAPTUF can be either a settable definite time delay or
a voltage magnitude dependent time delay, where the time delay depends on the voltage level; a
high voltage level gives a longer time delay and a low voltage level causes a short time delay. For the
definite time delay, the setting tDelay sets the time delay.

For the voltage dependent time delay the measured voltage level and the settings UNom, UMin,
Exponent, tMax and tMin set the time delay according to Figure 464 and Equation 264. The setting
TimerMode is used to decide what type of time delay to apply.

Trip signal issuing requires that the underfrequency condition continues for at least the user set time
delay tDelay. If the START condition, with respect to the measured frequency ceases during this user
set delay time, and is not fulfilled again within a user defined reset time, tReset, the START output is
reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the
hysteresis area, the START condition must be fulfilled again and it is not sufficient for the signal to
only return back to the hysteresis area.

The total time delay consists of the set value for time delay plus the minimum
operate time of the start function (80-90 ms).

On the RESTORE output of SAPTUF a 100ms pulse is issued, after a time delay corresponding to
the setting of tRestore, when the measured frequency returns to the level corresponding to the
setting RestoreFreq, after an issue of the TRIP output signal. If tRestore is se to 0.000 s the restore
functionality is disabled, and no output will be given.

12.1.6.3 Voltage dependent time delay M13354-19 v6

Since the fundamental frequency in a power system is the same all over the system, except some
deviations during power oscillations, another criterion is needed to decide, where to take actions,
based on low frequency. In many applications the voltage level is very suitable, and in most cases is
load shedding preferable in areas with low voltage. Therefore, a voltage dependent time delay has
been introduced, to make sure that load shedding, or other actions, take place at the right location. At
constant voltage, U, the voltage dependent time delay is calculated according to Equation 264
undervoltage and overvoltage functions.

Transformer protection RET670 785

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 12 1MRK 504 164-UEN Rev. N
Frequency protection

Exponent
é U - UMin ù
t=ê × ( tMax - tMin) + tMin
ëUNom - UMin úû

U = U measured

EQUATION1182 V2 EN-US (Equation 264)

where:
t is the voltage dependent time delay (at constant voltage),
U is the measured voltage
Exponent is a setting,
UMin, UNom are voltage settings corresponding to
tMax, tMin are time settings.

The inverse time characteristics are shown in Figure 464, for:

UMin = 90%
UNom = 100%
tMax = 1.0 s
tMin = 0.0 s
Exponent = 0, 1, 2, 3, and 4

1
0
1
Exponenent
TimeDlyOperate [s]

2
3
0.5 4

0
90 95 100

U [% of UBase]
en05000075.vsd
IEC05000075 V1 EN-US

Figure 464: Voltage dependent inverse time characteristics for underfrequency protection
SAPTUF. The time delay to operate is plotted as a function of the measured
voltage, for the Exponent = 0, 1, 2, 3, 4 respectively.

12.1.6.4 Blocking M13354-50 v7

It is possible to block underfrequency protection SAPTUF partially or completely, by binary input

signals or by parameter settings, where:

BLOCK: blocks the START, TRIP and

RESTORE outputs
BLKTRIP: blocks the TRIP output
BLKREST: blocks the RESTORE output

786 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 12
Frequency protection

If the measured voltage level decreases below the setting of IntBlockLevel, both the START and the
TRIP outputs are blocked.

12.1.6.5 Design M13354-63 v10

The frequency measuring element continuously measures the frequency of the positive sequence
voltage and compares it to the setting StartFrequency. The frequency signal is filtered to avoid
transients due to switchings and faults. The time integrator can operate either due to a definite delay
time or to the special voltage dependent delay time. When the frequency has returned back to the
setting of RestoreFreq, the RESTORE output is issued after the time delay tRestore. The design of
underfrequency protection SAPTUF is schematically described in figure 465.

BLKDMAGN

BLOCK

block START
OR

U < IntBlockLevel

Start
&
start Trip
Voltage
output
Definite timer
logic TRIP
or
Voltage based timer
Frequency
f < StartFrequency
tReset trip
tDelay RESTORE
AND

BLKTRIP

f > RestoreFreq tRestore

restore
AND
BLKREST

IEC16000041-1-en.vsdx
IEC16000041 V1 EN-US

Figure 465: Simplified logic diagram for SAPTUF

Transformer protection RET670 787

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 12 1MRK 504 164-UEN Rev. N
Frequency protection

12.1.7 Technical data

M13360-1 v16

Table 493: SAPTUF technical data

Function Range or Value Accuracy

Operate value, start function, at (35.00 - 75.00) Hz ±2.0 mHz
symmetrical three phase voltage,
StartFrequency 1)
Reset hysteresis 10.0 mHz fixed ±2.0 mHz

Operate time 1) Start time measurement Min. = 175 ms -

with sudden frequency
change Max. = 195 ms
fr = 50 Hz
Start time measurement Min. = 70 ms
with frequency ramp
Max. = 90 ms
Start time measurement Min. = 150 ms -
with sudden frequency
change Max. = 165 ms
fr = 60 Hz
Start time measurement Min. = 60 ms
with frequency ramp
Max. = 75 ms

Disengaging time 1) Start time measurement Min. = 20 ms -

with sudden frequency
change Max. = 30 ms
fr = 50 Hz
Start time measurement Min. = 75 ms
with frequency ramp
Max. = 100 ms
Start time measurement Min. = 20 ms -
with sudden frequency
change Max. = 30 ms
fr = 60 Hz
Start time measurement Min. = 65 ms
with frequency ramp
Max. = 90 ms
Operate time delay, fr = 50 Hz ±0.2% or ±200 ms
tDelay 1) whichever is greater
(0.000-60.000)s
fr = 60 Hz ±0.2% or ±175 ms
whichever is greater
Voltage dependent Settings: ±1.0% or ±120 ms
time delay UNom = (50-150)% of UBase whichever is greater
UMin = (50-150)% of UBase
Exponent = 0.0-5.0
tMax = (0.010-60.000)s
tMin = (0.010- 60.000)s

Exponent
é U - UMin ù
t=ê × ( tMax - tMin) + tMin
ëUNom - UMin úû

U = U measured
EQUATION1182 V2 EN-US

Note: The stated accuracy is valid for the voltage range 50 V – 250 V secondary.

1) The settings and test conditions are in accordance with IEC 60255-181 standard (section 6.2 – 6.7).

12.2 Overfrequency protection SAPTOF IP15747-1 v3

788 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 12
Frequency protection

12.2.1 Identification
M14866-1 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Overfrequency protection SAPTOF 81

f>

SYMBOL-O V1 EN-US

12.2.2 Functionality M14953-3 v12

Overfrequency protection function (SAPTOF) is applicable in all situations, where reliable detection
of high fundamental power system frequency is needed.

Overfrequency occurs because of sudden load drops or shunt faults in the power network. Close to
the generating plant, generator governor problems can also cause over frequency.

SAPTOF measures frequency with high accuracy, and is used mainly for generation shedding and
remedial action schemes. It is also used as a frequency stage initiating load restoring. A definite time
delay is provided for operate.

SAPTOF is provided with an undervoltage blocking.

The operation is based on positive sequence voltage measurement and requires two phase-phase or
three phase-neutral voltages to be connected. For information about how to connect analog inputs,
refer to Application manual /IED application /Analog inputs /Setting guidelines .

12.2.3 Function block M14956-3 v5

SAPTOF
U3P* TRIP
BLOCK START
BLKTRIP BLKDMAGN
FREQ

IEC06000280_2_en.vsd
IEC06000280 V2 EN-US

Figure 466: SAPTOF function block

12.2.4 Signals
PID-6751-INPUTSIGNALS v2

Table 494: SAPTOF Input signals

Name Type Default Description

U3P GROUP - Three phase group signal for voltage inputs
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTRIP BOOLEAN 0 Blocking operate output

Transformer protection RET670 789

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 12 1MRK 504 164-UEN Rev. N
Frequency protection

PID-6751-OUTPUTSIGNALS v2

Table 495: SAPTOF Output signals

Name Type Description

TRIP BOOLEAN General trip signal
START BOOLEAN General start signal
BLKDMAGN BOOLEAN Blocking indication due to low amplitude
FREQ REAL Measured frequency

12.2.5 Settings
PID-6751-SETTINGS v2

Table 496: SAPTOF Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
StartFrequency 35.00 - 90.00 Hz 0.01 51.20 Frequency set value
IntBlockLevel 0.0 - 100.0 %UB 1.0 50.0 Internal blocking level in % of UBase
tDelay 0.000 - 60.000 s 0.001 0.000 Operate time delay
tReset 0.000 - 60.000 s 0.001 0.000 Time delay for reset

Table 497: SAPTOF Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

12.2.6 Operation principle M14958-3 v7

Overfrequency protection SAPTOF is used to detect high power system frequency. SAPTOF has a
settable definite time delay. If the frequency remains above the set value for a time period
corresponding to the chosen time delay, the corresponding TRIP signal is issued. To avoid an
unwanted TRIP due to uncertain frequency measurement at low voltage magnitude, a voltage
controlled blocking of the function is available, that is, if the voltage is lower than the set blocking
voltage IntBlockLevel, the function is blocked and no START or TRIP signal is issued.

12.2.6.1 Measurement principle M14958-6 v9

The fundamental frequency of the positive sequence voltage is measured continuously, and
compared with the set value, StartFrequency. Overfrequency protection SAPTOF is dependent on
the voltage magnitude. If the voltage magnitude decreases below the setting IntBlockLevel, SAPTOF
is blocked and the output BLKDMAGN is issued. All voltage settings are made in percent of the
UBase, which should be set as a phase-phase voltage in kV. To avoid oscillations of the output
START signal, a hysteresis has been included.

12.2.6.2 Time delay M14958-9 v8

The time delay for Overfrequency protection SAPTOF is a settable definite time delay, specified by
the setting tDelay.

TRIP signal issuing requires that the overfrequency condition continues for at least the user set time
delay, tDelay. If the START condition, with respect to the measured frequency ceases during this
user set delay time, and is not fulfilled again within a user defined reset time, tReset, the START

790 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 12
Frequency protection

output is reset, after that the defined reset time has elapsed. It is to be noted that after leaving the
hysteresis area, the START condition must be fulfilled again and it is not sufficient for the signal to
only return back to the hysteresis area.

The total time delay consists of the set value for time delay plus minimum operate
time of the start function (80 - 90 ms).

12.2.6.3 Blocking M14958-13 v7

It is possible to block overfrequency protection SAPTOF partially or completely, by binary input

signals or by parameter settings, where:

BLOCK: blocks the START and TRIP outputs

BLKTRIP: blocks the TRIP output

If the measured voltage level decreases below the setting of IntBlockLevel, both the START and the
TRIP outputs are blocked.

12.2.6.4 Design M14958-24 v9

The frequency measuring element continuously measures the frequency of the positive sequence
voltage and compares it to the setting StartFrequency. The frequency signal is filtered to avoid
transients due to switchings and faults in the power system. The time integrator operates due to a
definite delay time. The design of overfrequency protection SAPTOF is schematically described in
figure 467.

BLKDMAGN

BLOCK

block START
OR

U < IntBlockLevel

Start
&
start Trip
Voltage
output
logic TRIP
Definite timer
Frequency
f > StartFrequency tReset
trip
tDelay

AND

BLKTRIP

IEC16000042-1-en.vsdx
IEC16000042 V1 EN-US

Figure 467: Simplified logic diagram for SAPTOF

Transformer protection RET670 791

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 12 1MRK 504 164-UEN Rev. N
Frequency protection

12.2.7 Technical data

M14964-1 v13

Table 498: SAPTOF technical data

Function Range or Value Accuracy

Operate value, start function, (35.00 - 90.00) Hz ±2.0 mHz
at symmetrical three phase
voltage, StartFrequency 1)

Reset hysteresis 1) 10.0 mHz fixed ±2.0 mHz

Operate time 1) Start time measurement with Min. = 175 ms -

sudden frequency change
Max. = 195 ms
fr = 50 Hz
Start time measurement with Min. = 70 ms
frequency ramp
Max. = 90 ms
Start time measurement with Min. = 150 ms -
sudden frequency change
Max. = 165 ms
fr = 60 Hz
Start time measurement with Min. = 60 ms
frequency ramp
Max. = 75 ms

Disengaging time 1) Start time measurement with Min. = 20 ms -

sudden frequency change
Max. = 30 ms
fr = 50 Hz
Start time measurement with Min. = 75 ms
frequency ramp
Max. = 100 ms
Start time measurement with Min. = 20 ms -
sudden frequency change
Max. = 30 ms
fr = 60 Hz
Start time measurement with Min. = 65 ms
frequency ramp
Max. = 90 ms
Operate time delay, fr = 50 Hz ±0.2% or ±200 ms
tDelay 1) whichever is greater
(0.000-60.000)s
fr = 60 Hz ±0.2% or ±175 ms
whichever is greater
Note: The stated accuracy is valid for the voltage range 50 V – 250 V secondary.

1) The settings and test conditions are in accordance with IEC 60255-181 standard (section 6.2 – 6.7).

12.3 Rate-of-change of frequency protection SAPFRC IP15748-1 v4

12.3.1 Identification
M14868-1 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Rate-of-change of frequency protection SAPFRC 81

df/dt >
<

SYMBOL-N V1 EN-US

792 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 12
Frequency protection

12.3.2 Functionality M14965-3 v14

The rate-of-change of frequency protection function (SAPFRC) gives an early indication of a main
disturbance in the system. SAPFRC measures frequency with high accuracy, and can be used for
generation shedding, load shedding and remedial action schemes. SAPFRC can discriminate
between a positive or negative change of frequency. A definite time delay is provided for operate.

SAPFRC is provided with an undervoltage blocking. The operation is based on positive sequence
voltage measurement and requires two phase-phase or three phase-neutral voltages to be
connected. For information about how to connect analog inputs, refer to Application manual/IED
application/Analog inputs/Setting guidelines .

12.3.3 Function block M14968-3 v6

SAPFRC
U3P* TRIP
BLOCK START
BLKTRIP RESTORE
BLKREST BLKDMAGN

IEC06000281-2-en.vsd
IEC06000281 V2 EN-US

Figure 468: SAPFRC function block

12.3.4 Signals
PID-6754-INPUTSIGNALS v2

Table 499: SAPFRC Input signals

Name Type Default Description

U3P GROUP - Three phase group signal for voltage inputs
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTRIP BOOLEAN 0 Blocking operate output
BLKREST BOOLEAN 0 Blocking restore output

PID-6754-OUTPUTSIGNALS v2

Table 500: SAPFRC Output signals

Name Type Description

TRIP BOOLEAN Trip signal
START BOOLEAN Start signal
RESTORE BOOLEAN Restore signal for load restoring purposes
BLKDMAGN BOOLEAN Blocking indication due to low amplitude

Transformer protection RET670 793

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 12 1MRK 504 164-UEN Rev. N
Frequency protection

12.3.5 Settings
PID-6754-SETTINGS v2

Table 501: SAPFRC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
StartFreqGrad -10.00 - 10.00 Hz/s 0.01 0.50 Frequency gradient start value, the sign
defines direction
IntBlockLevel 0.0 - 100.0 %UB 1.0 50.0 Internal blocking level in % of UBase
tDelay 0.000 - 60.000 s 0.001 0.200 Operate time delay
RestoreFreq 45.00 - 65.00 Hz 0.01 49.90 Restore frequency value
tRestore 0.000 - 60.000 s 0.001 0.000 Restore time delay
tReset 0.000 - 60.000 s 0.001 0.000 Time delay for reset

Table 502: SAPFRC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

12.3.6 Operation principle M14970-3 v9

Rate-of-change frequency protection SAPFRC is used to detect fast power system frequency
changes at an early stage. SAPFRC has a settable definite time delay. If the rate-of-change of
frequency remains below the set value, for negative rate-of-change, for a time period equal to the
chosen time delay, the TRIP signal is issued. If the rate-of-change of frequency remains above the
set value, for positive rate-of-change, for a time period equal to the chosen time delay, the TRIP
signal is issued. To avoid an unwanted trip due to uncertain frequency measurement at low voltage
magnitude a voltage controlled blocking of the function is available, that is, if the voltage is lower than
the set blocking voltage IntBlockLevel the function is blocked and no START or TRIP signal is issued.
If the frequency recovers, after a frequency decrease, a restore signal is issued.

12.3.6.1 Measurement principle M14970-6 v8

The rate-of-change of the fundamental frequency of the selected voltage is measured continuously,
and compared with the set value, StartFreqGrad. Rate-of-change frequency protection SAPFRC is
also dependent on the voltage magnitude. If the voltage magnitude decreases below the setting
IntBlockLevel , SAPFRC is blocked, and the output BLKDMAGN is issued. The sign of the setting
StartFreqGrad, controls if SAPFRC reacts on a positive or on a negative change in frequency. If
SAPFRC is used for decreasing frequency that is, the setting StartFreqGrad has been given a
negative value, and a trip signal has been issued, then a 100 ms pulse is issued on the RESTORE
output, when the frequency recovers to a value higher than the setting RestoreFreq. A positive
setting of StartFreqGrad, sets SAPFRC to START and TRIP for frequency increases.

To avoid oscillations of the output START signal, a hysteresis has been included.

12.3.6.2 Time delay M14970-10 v7

Rate-of-change frequency protection SAPFRC has a settable definite time delay, tDelay.

Trip signal issuing requires that the rate-of-change of frequency condition continues for at least the
user set time delay, tDelay. If the START condition, with respect to the measured frequency ceases
during the delay time, and is not fulfilled again within a user defined reset time, tReset, the START
output is reset, after that the defined reset time has elapsed. Here it should be noted that after

794 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 12
Frequency protection

leaving the hysteresis area, the START condition must be fulfilled again and it is not sufficient for the
signal to only return back into the hysteresis area.

The RESTORE output of SAPFRC is set, after a time delay equal to the setting of tDelay, when the
measured frequency has returned to the level corresponding to RestoreFreq, after an issue of the
TRIP output signal. If tRestore is set to 0.000 s the restore functionality is disabled, and no output will
be given. The restore functionality is only active for lowering frequency conditions and the restore
sequence is disabled if a new negative frequency gradient is detected during the restore period,
defined by the settings RestoreFreq and tRestore.

12.3.6.3 Blocking M14970-23 v6

Rate-of-change frequency protection (SAPFRC) can be partially or totally blocked, by binary input
signals or by parameter settings, where:

BLOCK: blocks the START and TRIP outputs

BLKTRIP: blocks the TRIP output
BLKREST: blocks the RESTORE output

If the measured voltage level decreases below the setting of IntBlockLevel, both the START and the
TRIP outputs are blocked.

12.3.6.4 Design M14970-34 v7

Rate-of-change frequency protection (SAPFRC) measuring element continuously measures the

frequency of the selected voltage and compares it to the setting StartFreqGrad. The frequency signal
is filtered to avoid transients due to power system switchings and faults. The time integrator operates
with a definite delay time. When the frequency has returned back to the setting of RestoreFreq, the
RESTORE output is issued after the time delay tRestore, if the TRIP signal has earlier been issued.
The sign of the setting StartFreqGrad is essential, and controls if the function is used for raising or
lowering frequency conditions. The design of SAPFRC is schematically described in figure 469.

Transformer protection RET670 795

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 12 1MRK 504 164-UEN Rev. N
Frequency protection

BLKDMAGN

BLOCK
block
OR
Voltage
U < IntBlockLevel

START

Start
Rate-of-change
&
of Frequency start
If Trip
[StartFreqGrad<0 output
AND logic
Definite timer
df/dt < StartFreqGrad]
start TRIP
OR
tReset
[StartFreqGrad>0
AND
tDelay
df/dt > StartFreqGrad]
Then
START trip
AND
BLKTRIP
RESTORE

Frequency restore
f > RestoreFreq
> tRestore
AND
BLKREST

IEC16000040-1-en.vsdx
IEC16000040 V1 EN-US

Figure 469: Simplified logic diagram for SAPFRC

12.3.7 Technical data

M14976-1 v11

Table 503: SAPFRC technical data

Function Range and value Accuracy

Operate value, start function, at Positive gradient: from 0.05 to 10.00 Hz/s ** ±10.0 mHz/s
symmetrical three phase voltage Negative gradient: from -0.05 to -10.00 Hz/s **
*, StartFreqGrad or Gs per IEC
60255-181 standard
Reset hysteresis * < 15.0 mHz/s
Operate value, restore enable (45.00 - 65.00) Hz ±2.0 mHz
frequency, at symmetrical three
phase voltage, RestoreFreq
Table continues on next page

796 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 12
Frequency protection

Function Range and value Accuracy

Restore time delay, tRestore fr = 50 Hz (0.025 - 60.000) s ±0.2% or ±110 ms
whichever is greater
Test conditions: fr = 60 Hz ±0.2% or ±100 ms
Restore time delay whichever is greater
measurement with sudden
frequency change from
RestoreFreq -0.02 Hz to
RestoreFreq + 0.02 Hz
Start time * fr = 50 Hz Gs: ±0.05 & ±0.50 Hz/s Min. = 110 ms
Tested frequency slope:
1.2, 2.0, 5.0, 10.0 x Gs Max. = 290 ms

Gs: ±1.00 Hz/s Min. = 180 ms

Tested frequency slope:
1.2, 2.0, 5.0 x Gs Max. = 300 ms

Gs: ±3.00, ±6.00 & ±10.00 Min. = 300 ms

Hz/s
Tested frequency slope: Max. = 390 ms
1.2, 2.0 x Gs
fr = 60 Hz Gs: ±0.05 & ±0.50 Hz/s Min. = 90 ms
Tested frequency slope:
1.2, 2.0, 5.0, 10.0 x Gs Max. = 220 ms

Gs: ±1.00 Hz/s Min. = 140 ms

Tested frequency slope:
1.2, 2.0, 5.0 x Gs Max. = 240 ms

Gs: ±3.00, ±6.00 & ±10.00 Min. = 180 ms

Hz/s
Tested frequency slope: Max. = 300 ms
1.2, 2.0 x Gs
Disengaging time * fr = 50 Hz Gs: ±0.05 Hz/s Min. = 130 ms
Tested frequency slope:
1.2, 2.0, 5.0, 10.0 x Gs Max. = 270 ms

Gs: ±5.00 Hz/s Min. = 130 ms

Tested frequency slope:
1.2, 2.0 x Gs Max. = 210 ms

Gs: ±10.00 Hz/s Min. = 130 ms

Tested frequency slope:
1.2 x Gs Max. = 160 ms

fr = 60 Hz Gs: ±0.05 Hz/s Min. = 100 ms

Tested frequency slope:
1.2, 2.0, 5.0, 10.0 x Gs Max. = 210 ms

Gs: ±5.00 Hz/s Min. = 100 ms

Tested frequency slope:
1.2, 2.0 x Gs Max. = 170 ms

Gs: ±10.00 Hz/s Min. = 100 ms

Tested frequency slope:
1.2 x Gs Max. = 130 ms

Operate time delay *, tDelay fr = 50 Hz (0.000-60.000) s ±0.2% or ±220 ms

Test conditions: whichever is greater
Gs: ± 0.2 Hz/s
Frequency slope: 0.4 Hz/s fr = 60 Hz ±0.2% or ±180 ms
Test points: 10%, 20%, 30%, whichever is greater
50% and 100% of the time delay
setting range
Table continues on next page

Transformer protection RET670 797

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 12 1MRK 504 164-UEN Rev. N
Frequency protection

Function Range and value Accuracy

Reset time delay, tReset fr = 50 Hz (0.000-60.000) s ±0.2% or ±220 ms
Test conditions: whichever is greater
Gs: ±0.2 Hz/s
Frequency slope: 0.4 Hz/s fr = 60 Hz ±0.2% or ±180 ms
whichever is greater
* The settings and test conditions are in accordance with IEC 60255-181 standard (section 6.2 – 6.7).
** The value ±0.05 Hz/s is used as minimum pickup value for frequency gradient.
Note! The stated accuracy is valid for phase-to-earth voltage range from 50 V to 250 V secondary. During testing three phase-to-earth
voltages with magnitude of 110/sqrt(3)=63.5 V were always used.

798 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 13
Multipurpose protection

Section 13 Multipurpose protection

13.1 General current and voltage protection CVGAPC IP14552-1 v2

13.1.1 Function revision history GUID-74F9B9A9-91EB-45BA-A883-6BA325C8B272 v1

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 -
M 2.2.4 -
N 2.2.5 • The harmonic restraint function changed to freeze the definite and IDMT timers.
• The maximum value of the settings IMin1 and IMin2 has been decreased to 1000.0
% of IBase.
• Setting BlkLevel2nd was removed from the function.
• Previously called stepwise settings t_DefOCx and tResetDef_OCx had their names
changed to t_OCx and tReset_OCx for more clear understanding.

13.1.2 Identification
M14886-2 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
General current and voltage protection CVGAPC 2(I>/U<) -

13.1.3 Functionality
M13083-3 v6
The protection module is recommended as a general backup protection with many possible
application areas due to its flexible measuring and setting facilities.

The built-in overcurrent protection feature has two settable current levels. Both of them can be used
either with definite time or inverse time characteristic. The overcurrent protection steps can be made
directional with selectable voltage polarizing quantity. Additionally they can be voltage and/or current
controlled/restrained. 2nd harmonic restraining facility is available as well. At too low polarizing
voltage the overcurrent feature can be either blocked, made non directional or ordered to use voltage
memory in accordance with a parameter setting.

Transformer protection RET670 799

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 13 1MRK 504 164-UEN Rev. N
Multipurpose protection

Additionally two overvoltage and two undervoltage steps, either with definite time or inverse time
characteristic, are available within each function.

The general function suits applications with underimpedance and voltage controlled overcurrent
solutions. The general function can also be utilized for generator transformer protection applications
where positive, negative or zero sequence components of current and voltage quantities are typically
required.

13.1.4 Function block M13748-3 v3

CVGAPC
I3P* TRIP
U3P* TROC1
BLOCK TROC2
BLKOC1 TRUC1
BLKOC1TR TRUC2
ENMLTOC1 TROV1
BLKOC2 TROV2
BLKOC2TR TRUV1
ENMLTOC2 TRUV2
BLKUC1 START
BLKUC1TR STOC1
BLKUC2 STOC2
BLKUC2TR STUC1
BLKOV1 STUC2
BLKOV1TR STOV1
BLKOV2 STOV2
BLKOV2TR STUV1
BLKUV1 STUV2
BLKUV1TR BLK2ND
BLKUV2 DIROC1
BLKUV2TR DIROC2
UDIRLOW
CURRENT
ICOSFI
VOLTAGE
UIANGLE

IEC05000372-2-en.vsd
IEC05000372 V2 EN-US

Figure 470: CVGAPC function block

13.1.5 Signals
PID-7803-INPUTSIGNALS v1

Table 504: CVGAPC Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKOC1 BOOLEAN 0 Block of over current function OC1
BLKOC1TR BOOLEAN 0 Block of trip for over current function OC1
ENMLTOC1 BOOLEAN 0 When activated, the current multiplier is in use for OC1
BLKOC2 BOOLEAN 0 Block of over current function OC2
BLKOC2TR BOOLEAN 0 Block of trip for over current function OC2
ENMLTOC2 BOOLEAN 0 When activated, the current multiplier is in use for OC2
BLKUC1 BOOLEAN 0 Block of under current function UC1
BLKUC1TR BOOLEAN 0 Block of trip for under current function UC1
Table continues on next page

800 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 13
Multipurpose protection

Name Type Default Description

BLKUC2 BOOLEAN 0 Block of under current function UC2
BLKUC2TR BOOLEAN 0 Block of trip for under current function UC2
BLKOV1 BOOLEAN 0 Block of over voltage function OV1
BLKOV1TR BOOLEAN 0 Block of trip for over voltage function OV1
BLKOV2 BOOLEAN 0 Block of over voltage function OV2
BLKOV2TR BOOLEAN 0 Block of trip for over voltage function OV2
BLKUV1 BOOLEAN 0 Block of under voltage function UV1
BLKUV1TR BOOLEAN 0 Block of trip for under voltage function UV1
BLKUV2 BOOLEAN 0 Block of under voltage function UV2
BLKUV2TR BOOLEAN 0 Block of trip for under voltage function UV2

PID-7803-OUTPUTSIGNALS v1

Table 505: CVGAPC Output signals

Name Type Description

TRIP BOOLEAN General trip signal
TROC1 BOOLEAN Trip signal from overcurrent function OC1
TROC2 BOOLEAN Trip signal from overcurrent function OC2
TRUC1 BOOLEAN Trip signal from undercurrent function UC1
TRUC2 BOOLEAN Trip signal from undercurrent function UC2
TROV1 BOOLEAN Trip signal from overvoltage function OV1
TROV2 BOOLEAN Trip signal from overvoltage function OV2
TRUV1 BOOLEAN Trip signal from undervoltage function UV1
TRUV2 BOOLEAN Trip signal from undervoltage function UV2
START BOOLEAN General start signal
STOC1 BOOLEAN Start signal from overcurrent function OC1
STOC2 BOOLEAN Start signal from overcurrent function OC2
STUC1 BOOLEAN Start signal from undercurrent function UC1
STUC2 BOOLEAN Start signal from undercurrent function UC2
STOV1 BOOLEAN Start signal from overvoltage function OV1
STOV2 BOOLEAN Start signal from overvoltage function OV2
STUV1 BOOLEAN Start signal from undervoltage function UV1
STUV2 BOOLEAN Start signal from undervoltage function UV2
BLK2ND BOOLEAN Block from second harmonic detection
DIROC1 INTEGER Directional mode of OC1 (nondir, forward,reverse)
DIROC2 INTEGER Directional mode of OC2 (nondir, forward,reverse)
UDIRLOW BOOLEAN Low voltage for directional polarization
CURRENT REAL Measured current value
ICOSFI REAL Measured current multiplied with cos (Phi)
VOLTAGE REAL Measured voltage value
UIANGLE REAL Angle between voltage and current

Transformer protection RET670 801

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 13 1MRK 504 164-UEN Rev. N
Multipurpose protection

13.1.6 Settings
PID-7803-SETTINGS v1

Table 506: CVGAPC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 507: CVGAPC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
CurrentInput phase1 - - MaxPh Select current signal which will be
phase2 measured inside function
phase3
PosSeq
NegSeq
3*ZeroSeq
MaxPh
MinPh
UnbalancePh
phase1-phase2
phase2-phase3
phase3-phase1
MaxPh-Ph
MinPh-Ph
UnbalancePh-Ph
VoltageInput phase1 - - MaxPh Select voltage signal which will be
phase2 measured inside function
phase3
PosSeq
-NegSeq
-3*ZeroSeq
MaxPh
MinPh
UnbalancePh
phase1-phase2
phase2-phase3
phase3-phase1
MaxPh-Ph
MinPh-Ph
UnbalancePh-Ph
OperHarmRestr Off - - Off Operation of 2nd harmonic restrain Off /
On On
l_2nd/l_fund 10.0 - 50.0 % 1.0 20.0 Ratio of second to fundamental current
harmonic in %
EnRestrainCurr Off - - Off Enable current restrain function On / Off
On
RestrCurrInput PosSeq - - PosSeq Select current signal which will be used
NegSeq for curr restrain
3*ZeroSeq
Max
RestrCurrCoeff 0.00 - 5.00 - 0.01 0.00 Restraining current coefficient
RCADir -180 - 180 Deg 1 -75 Relay Characteristic Angle
ROADir 1 - 90 Deg 1 75 Relay Operate Angle
LowVolt_VM 0.0 - 5.0 %UB 0.1 0.5 Below this level in % of UBase setting
ActLowVolt takes over
Table continues on next page

802 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 13
Multipurpose protection

Name Values (Range) Unit Step Default Description

Operation_OC1 Off - - Off Operation OC1 Off / On
On
StartCurr_OC1 2.0 - 5000.0 %IB 1.0 120.0 Operate current level for OC1 in % of
IBase
CurveType_OC1 ANSI Ext. inv. - - ANSI Def. Time Selection of time delay curve type for
ANSI Very inv. OC1
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
t_OC1 0.00 - 6000.00 s 0.01 0.50 Definite time delay / additional time delay
for IDMT curves for OC1
k_OC1 0.05 - 999.00 - 0.01 0.30 Time multiplier for IDMT curves for OC1
IMin1 1 - 1000 %IB 1 100 Minimum operate current for step1 in %
of IBase
tMin_OC1 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT curves
for OC1
VCntrlMode_OC1 Voltage control - - Off Control mode for voltage controlled OC1
Off function
VDepMode_OC1 Step - - Step Voltage dependent mode OC1 (step,
Slope slope)
VDepFact_OC1 0.02 - 5.00 - 0.01 1.00 Multiplying factor for I pickup when OC1
is U dependent
ULowLimit_OC1 1.0 - 200.0 %UB 0.1 50.0 Voltage low limit setting OC1 in % of
UBase
UHighLimit_OC1 1.0 - 200.0 %UB 0.1 100.0 Voltage high limit setting OC1 in % of
UBase
HarmRestr_OC1 Off - - Off Enable block of OC1 by 2nd harmonic
On restrain
DirMode_OC1 Non-directional - - Non-directional Directional mode of OC1 (nondir,
Forward forward, reverse)
Reverse
DirPrinc_OC1 I&U - - I&U Measuring on IandU or IcosPhiandU for
IcosPhi&U OC1
ActLowVolt1_VM Non-directional - - Non-directional Low voltage level action for Dir_OC1
Block (Nodir, Blk, Mem)
Memory
Operation_OC2 Off - - Off Operation OC2 Off / On
On
StartCurr_OC2 2.0 - 5000.0 %IB 1.0 120.0 Operate current level for OC2 in % of
IBase
Table continues on next page

Transformer protection RET670 803

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 13 1MRK 504 164-UEN Rev. N
Multipurpose protection

Name Values (Range) Unit Step Default Description

CurveType_OC2 ANSI Ext. inv. - - ANSI Def. Time Selection of time delay curve type for
ANSI Very inv. OC2
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
t_OC2 0.00 - 6000.00 s 0.01 0.50 Definite time delay / additional time delay
for IDMT curves for OC2
k_OC2 0.05 - 999.00 - 0.01 0.30 Time multiplier for IDMT curves for OC2
IMin2 1 - 1000 %IB 1 100 Minimum operate current for step2 in %
of IBase
tMin_OC2 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT curves
for OC2
VCntrlMode_OC2 Voltage control - - Off Control mode for voltage controlled OC2
Off function
VDepMode_OC2 Step - - Step Voltage dependent mode OC2 (step,
Slope slope)
VDepFact_OC2 0.02 - 5.00 - 0.01 1.00 Multiplying factor for I pickup when OC2
is U dependent
ULowLimit_OC2 1.0 - 200.0 %UB 0.1 50.0 Voltage low limit setting OC2 in % of
UBase
UHighLimit_OC2 1.0 - 200.0 %UB 0.1 100.0 Voltage high limit setting OC2 in % of
UBase
HarmRestr_OC2 Off - - Off Enable block of OC2 by 2nd harmonic
On restrain
DirMode_OC2 Non-directional - - Non-directional Directional mode of OC2 (nondir,
Forward forward, reverse)
Reverse
DirPrinc_OC2 I&U - - I&U Measuring on IandU or IcosPhiandU for
IcosPhi&U OC2
ActLowVolt2_VM Non-directional - - Non-directional Low voltage level action for Dir_OC2
Block (Nodir, Blk, Mem)
Memory
Operation_UC1 Off - - Off Operation UC1 Off / On
On
EnBlkLowI_UC1 Off - - Off Enable internal low current level blocking
On for UC1
BlkLowCurr_UC1 0 - 150 %IB 1 20 Internal low current blocking level for
UC1 in % of IBase
StartCurr_UC1 2.0 - 150.0 %IB 1.0 70.0 Operate undercurrent level for UC1 in %
of IBase
tDef_UC1 0.00 - 6000.00 s 0.01 0.50 Independent (definite) time delay of UC1
tResetDef_UC1 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite
Time curve UC1
Table continues on next page

804 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 13
Multipurpose protection

Name Values (Range) Unit Step Default Description

HarmRestr_UC1 Off - - Off Enable block of UC1 by 2nd harmonic
On restrain
Operation_UC2 Off - - Off Operation UC2 Off / On
On
EnBlkLowI_UC2 Off - - Off Enable internal low current level blocking
On for UC2
BlkLowCurr_UC2 0 - 150 %IB 1 20 Internal low current blocking level for
UC2 in % of IBase
StartCurr_UC2 2.0 - 150.0 %IB 1.0 70.0 Operate undercurrent level for UC2 in %
of IBase
tDef_UC2 0.00 - 6000.00 s 0.01 0.50 Independent (definite) time delay of UC2
HarmRestr_UC2 Off - - Off Enable block of UC2 by 2nd harmonic
On restrain
Operation_OV1 Off - - Off Operation OV1 Off / On
On
StartVolt_OV1 2.0 - 200.0 %UB 0.1 150.0 Operate voltage level for OV1 in % of
UBase
CurveType_OV1 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A OV1
Inverse curve B
Inverse curve C
Prog. inv. curve
tDef_OV1 0.00 - 6000.00 s 0.01 1.00 Definite time delay of OV1
tMin_OV1 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT curves
for OV1
k_OV1 0.05 - 999.00 - 0.01 0.30 Time multiplier for IDMT curves for OV1
Operation_OV2 Off - - Off Operation OV2 Off / On
On
StartVolt_OV2 2.0 - 200.0 %UB 0.1 150.0 Operate voltage level for OV2 in % of
UBase
CurveType_OV2 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A OV2
Inverse curve B
Inverse curve C
Prog. inv. curve
tDef_OV2 0.00 - 6000.00 s 0.01 1.00 Definite time delay of OV2
tMin_OV2 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT curves
for OV2
k_OV2 0.05 - 999.00 - 0.01 0.30 Time multiplier for IDMT curves for OV2
Operation_UV1 Off - - Off Operation UV1 Off / On
On
StartVolt_UV1 2.0 - 150.0 %UB 0.1 50.0 Operate undervoltage level for UV1 in %
of UBase
CurveType_UV1 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A UV1
Inverse curve B
Prog. inv. curve
tDef_UV1 0.00 - 6000.00 s 0.01 1.00 Definite time delay of UV1
tMin_UV1 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT curves
for UV1
k_UV1 0.05 - 999.00 - 0.01 0.30 Time multiplier for IDMT curves for UV1
Table continues on next page

Transformer protection RET670 805

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 13 1MRK 504 164-UEN Rev. N
Multipurpose protection

Name Values (Range) Unit Step Default Description

EnBlkLowV_UV1 Off - - On Enable internal low voltage level
On blocking for UV1
BlkLowVolt_UV1 0.0 - 5.0 %UB 0.1 0.5 Internal low voltage blocking level for
UV1 in % of UBase
Operation_UV2 Off - - Off Operation UV2 Off / On
On
StartVolt_UV2 2.0 - 150.0 %UB 0.1 50.0 Operate undervoltage level for UV2 in %
of UBase
CurveType_UV2 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A UV2
Inverse curve B
Prog. inv. curve
tDef_UV2 0.00 - 6000.00 s 0.01 1.00 Definite time delay of UV2
tMin_UV2 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT curves
for UV2
k_UV2 0.05 - 999.00 - 0.01 0.30 Time multiplier for IDMT curves for UV2
EnBlkLowV_UV2 Off - - On Enable internal low voltage level
On blocking for UV2
BlkLowVolt_UV2 0.0 - 5.0 %UB 0.1 0.5 Internal low voltage blocking level for
UV2 in % of UBase

Table 508: CVGAPC Group settings (advanced)

Name Values (Range) Unit Step Default Description

CurrMult_OC1 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current setting
value for OC1
ResCrvType_OC1 Instantaneous - - Instantaneous Selection of reset curve type for OC1
IEC Reset
ANSI reset
tReset_OC1 0.00 - 6000.00 s 0.01 0.00 Constant reset time for OC1
P_OC1 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OC1
A_OC1 0.000 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OC1
B_OC1 0.000 - 99.000 - 0.001 0.000 Parameter B for customer programmable
curve for OC1
C_OC1 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
programmable curve for OC1
PR_OC1 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer
programmable curve for OC1
TR_OC1 0.005 - 600.000 - 0.001 13.500 Parameter TR for customer
programmable curve for OC1
CR_OC1 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer
programmable curve for OC1
CurrMult_OC2 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current setting
value for OC2
ResCrvType_OC2 Instantaneous - - Instantaneous Selection of reset curve type for OC2
IEC Reset
ANSI reset
tReset_OC2 0.00 - 6000.00 s 0.01 0.00 Constant reset time for OC2
P_OC2 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OC2
Table continues on next page

806 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 13
Multipurpose protection

Name Values (Range) Unit Step Default Description

A_OC2 0.000 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OC2
B_OC2 0.000 - 99.000 - 0.001 0.000 Parameter B for customer programmable
curve for OC2
C_OC2 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
programmable curve for OC2
PR_OC2 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer
programmable curve for OC2
TR_OC2 0.005 - 600.000 - 0.001 13.500 Parameter TR for customer
programmable curve for OC2
CR_OC2 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer
programmable curve for OC2
tResetDef_UC2 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite
Time curve UC2
ResCrvType_OV1 Instantaneous - - Instantaneous Selection of reset curve type for OV1
Frozen timer
Linearly decreased
tResetDef_OV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in Definite Time
characteristic for OV1
tResetIDMT_OV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IDMT curves
for OV1
A_OV1 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OV1
B_OV1 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for OV1
C_OV1 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
programmable curve for OV1
D_OV1 0.000 - 10.000 - 0.001 0.000 Parameter D for customer
programmable curve for OV1
P_OV1 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OV1
ResCrvType_OV2 Instantaneous - - Instantaneous Selection of reset curve type for OV2
Frozen timer
Linearly decreased
tResetDef_OV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in Definite Time
characteristic for OV2
tResetIDMT_OV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IDMT curves
for OV2
A_OV2 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OV2
B_OV2 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for OV2
C_OV2 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
programmable curve for OV2
D_OV2 0.000 - 10.000 - 0.001 0.000 Parameter D for customer
programmable curve for OV2
P_OV2 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OV2
ResCrvType_UV1 Instantaneous - - Instantaneous Selection of reset curve type for UV1
Frozen timer
Linearly decreased
Table continues on next page

Transformer protection RET670 807

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 13 1MRK 504 164-UEN Rev. N
Multipurpose protection

Name Values (Range) Unit Step Default Description

tResetDef_UV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in Definite Time
characteristic for UV1
tResetIDMT_UV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IDMT curves
for UV1
A_UV1 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for UV1
B_UV1 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for UV1
C_UV1 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
programmable curve for UV1
D_UV1 0.000 - 10.000 - 0.001 0.000 Parameter D for customer
programmable curve for UV1
P_UV1 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for UV1
ResCrvType_UV2 Instantaneous - - Instantaneous Selection of reset curve type for UV2
Frozen timer
Linearly decreased
tResetDef_UV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in Definite Time
characteristic for UV2
tResetIDMT_UV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IDMT curves
for UV2
A_UV2 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for UV2
B_UV2 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for UV2
C_UV2 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
programmable curve for UV2
D_UV2 0.000 - 10.000 - 0.001 0.000 Parameter D for customer
programmable curve for UV2
P_UV2 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for UV2

13.1.7 Monitored data

PID-7803-MONITOREDDATA v1

Table 509: CVGAPC Monitored data

Name Type Values (Range) Unit Description

DIROC1 INTEGER 0=Non- - Directional mode of OC1 (nondir,
directional forward,reverse)
1=Forward
2=Reverse
DIROC2 INTEGER 0=Non- - Directional mode of OC2 (nondir,
directional forward,reverse)
1=Forward
2=Reverse
CURRENT REAL - A Measured current value
ICOSFI REAL - A Measured current multiplied with cos
(Phi)
VOLTAGE REAL - kV Measured voltage value
UIANGLE REAL - deg Angle between voltage and current

808 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 13
Multipurpose protection

13.1.8 Operation principle

13.1.8.1 Measured quantities within CVGAPC M13751-3 v4

General current and voltage protection (CVGAPC) function is always connected to three-phase
current and three-phase voltage input in the configuration tool, but it will always measure only one
current and one voltage quantity selected by the end user in the setting tool.

The user can select a current input, by a setting parameter CurrentInput, to measure one of the
current quantities shown in table 510.

Table 510: Current selection for CVGAPC function

Set value for the

parameter Comment
CurrentInput
1 Phase1 CVGAPC function will measure the phase L1 current phasor
2 Phase2 CVGAPC function will measure the phase L2 current phasor
3 Phase3 CVGAPC function will measure the phase L3 current phasor
4 PosSeq CVGAPC function will measure internally calculated positive sequence current phasor
5 NegSeq CVGAPC function will measure internally calculated negative sequence current phasor
6 3ZeroSeq CVGAPC function will measure internally calculated zero sequence current phasor
multiplied by factor 3
7 MaxPh CVGAPC function will measure current phasor of the phase with maximum magnitude
8 MinPh CVGAPC function will measure current phasor of the phase with minimum magnitude
9 UnbalancePh CVGAPC function will measure magnitude of unbalance current, which is internally
calculated as the algebraic magnitude difference between the current phasor of the
phase with maximum magnitude and current phasor of the phase with minimum
magnitude. Phase angle will be set to 0° all the time
10 Phase1-Phase2 CVGAPC function will measure the current phasor internally calculated as the vector
difference between the phase L1 current phasor and phase L2 current phasor (IL1-IL2)

11 Phase2-Phase3 CVGAPC function will measure the current phasor internally calculated as the vector
difference between the phase L2 current phasor and phase L3 current phasor (IL2-IL3)

12 Phase3-Phase1 CVGAPC function will measure the current phasor internally calculated as the vector
difference between the phase L3 current phasor and phase L1 current phasor ( IL3-IL1)

13 MaxPh-Ph CVGAPC function will measure ph-ph current phasor with the maximum magnitude
14 MinPh-Ph CVGAPC function will measure ph-ph current phasor with the minimum magnitude
15 UnbalancePh-Ph CVGAPC function will measure magnitude of unbalance current, which is internally
calculated as the algebraic magnitude difference between the ph-ph current phasor
with maximum magnitude and ph-ph current phasor with minimum magnitude. Phase
angle will be set to 0° all the time

The user can select a voltage input, by a setting parameter VoltageInput, to measure one of the
voltage quantities shown in table 511:

Table 511: Voltage selection for CVGAPC function

Set value for the

parameter Comment
VoltageInput
1 Phase1 CVGAPC function will measure the phase L1 voltage phasor
2 Phase2 CVGAPC function will measure the phase L2 voltage phasor
3 Phase3 CVGAPC function will measure the phase L3 voltage phasor
Table continues on next page

Transformer protection RET670 809

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 13 1MRK 504 164-UEN Rev. N
Multipurpose protection

Set value for the

parameter Comment
VoltageInput
4 PosSeq CVGAPC function will measure internally calculated positive sequence voltage phasor
5 -NegSeq CVGAPC function will measure internally calculated negative sequence voltage
phasor. This voltage phasor will be intentionally rotated for 180° in order to enable
easier settings for the directional feature when used.
6 -3ZeroSeq CVGAPC function will measure internally calculated zero sequence voltage phasor
multiplied by factor 3. This voltage phasor will be intentionally rotated for 180° in order
to enable easier settings for the directional feature when used.
7 MaxPh CVGAPC function will measure voltage phasor of the phase with maximum magnitude
8 MinPh CVGAPC function will measure voltage phasor of the phase with minimum magnitude
9 UnbalancePh CVGAPC function will measure magnitude of unbalance voltage, which is internally
calculated as the algebraic magnitude difference between the voltage phasor of the
phase with maximum magnitude and voltage phasor of the phase with minimum
magnitude. Phase angle will be set to 0° all the time
10 Phase1-Phase2 CVGAPC function will measure the voltage phasor internally calculated as the vector
difference between the phase L1 voltage phasor and phase L2 voltage phasor (UL1-
UL2)

11 Phase2-Phase3 CVGAPC function will measure the voltage phasor internally calculated as the vector
difference between the phase L2 voltage phasor and phase L3 voltage phasor (UL2-
UL3)

12 Phase3-Phase1 CVGAPC function will measure the voltage phasor internally calculated as the vector
difference between the phase L3 voltage phasor and phase L1 voltage phasor ( UL3-
UL1)

13 MaxPh-Ph CVGAPC function will measure ph-ph voltage phasor with the maximum magnitude
14 MinPh-Ph CVGAPC function will measure ph-ph voltage phasor with the minimum magnitude
15 UnbalancePh-Ph CVGAPC function will measure magnitude of unbalance voltage, which is internally
calculated as the algebraic magnitude difference between the ph-ph voltage phasor
with maximum magnitude and ph-ph voltage phasor with minimum magnitude. Phase
angle will be set to 0° all the time

Note that the voltage selection from table 511 is always applicable regardless the actual external VT
connections. The three-phase VT inputs can be connected to IED as either three phase-to-earth
voltages, UL1, UL2 and UL3, , and or three phase-to-phase voltages UL1L2, UL2L3 and UL3L1, , and .
This information about actual VT connection is entered as a setting parameter for the pre-processing
block, which will then be taken care automatically.

The user can select one of the current quantities shown in table 512 for built-in current restraint
feature:

Table 512: Restraint current selection for CVGAPC function

Set value for the

parameter RestrCurr Comment
1 PosSeq CVGAPC function will measure internally calculated positive sequence current phasor
2 NegSeq CVGAPC function will measure internally calculated negative sequence current phasor
3 3ZeroSeq CVGAPC function will measure internally calculated zero sequence current phasor
multiplied by factor 3
4 MaxPh CVGAPC function will measure current phasor of the phase with maximum magnitude

13.1.8.2 Base quantities for CVGAPC function SEMOD53443-112 v4

The parameter settings for the base quantities, which represent the base (100%) for pickup levels of
all measuring stages shall be entered as setting parameters for every CVGAPC function.

810 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 13
Multipurpose protection

Base current shall be entered as:

1. rated phase current of the protected object in primary amperes, when the measured Current
Quantity is selected from 1 to 9, as shown in table "".
2. rated phase current of the protected object in primary amperes multiplied by √3 (1.732 x
Iphase), when the measured Current Quantity is selected from 10 to 15, as shown in table "".

Base voltage shall be entered as:

1. rated phase-to-earth voltage of the protected object in primary kV, when the measured Voltage
Quantity is selected from 1 to 9, as shown in table "".
2. rated phase-to-phase voltage of the protected object in primary kV, when the measured Voltage
Quantity is selected from 10 to 15, as shown in table "".

13.1.8.3 Built-in overcurrent protection steps M13751-136 v3

Two overcurrent protection steps are available. They are absolutely identical and therefore only one
will be explained here.

Overcurrent step simply compares the magnitude of the measured current quantity (see table 510)
with the set pickup level. Non-directional overcurrent step will pickup if the magnitude of the
measured current quantity is bigger than this set level. However depending on other enabled built-in
features this overcurrent pickup might not cause the overcurrent step start signal. Start signal will
only come if all of the enabled built-in features in the overcurrent step are fulfilled at the same time.

Second harmonic feature M13751-254 v3

The overcurrent protection step can be restrained by a second harmonic component in the measured
current quantity (see table 510). However it shall be noted that this feature is not applicable when
one of the following measured currents is selected:

• PosSeq (positive sequence current)

• NegSeq (negative sequence current)
• UnbalancePh (unbalance phase current)
• UnbalancePh-Ph (unbalance phase-phase current)

This feature will prevent overcurrent step start if the second-to-first harmonic ratio in the measured
current exceeds the set level.

Directional feature M13751-263 v5

The overcurrent protection step operation can be made dependent on the relevant phase angle
between measured current phasor (see table 510) and measured voltage phasor (see table 511). In
protection terminology it means that the General currrent and voltage protection (CVGAPC) function
can be made directional by enabling this built-in feature. In that case overcurrent protection step will
only operate if the current flow is in accordance with the set direction (Forward, which means towards
the protected object, or Reverse, which means from the protected object). For this feature it is of the
outmost importance to understand that the measured voltage phasor (see table 511) and measured
current phasor (see table 510) will be used for directional decision. Therefore it is the sole
responsibility of the end user to select the appropriate current and voltage signals in order to get a
proper directional decision. CVGAPC function will NOT do this automatically. It will simply use the
current and voltage phasors selected by the end user to check for the directional criteria.

Table 513 gives an overview of the typical choices (but not the only possible ones) for these two
quantities from traditional directional relays.

Transformer protection RET670 811

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 13 1MRK 504 164-UEN Rev. N
Multipurpose protection

Table 513: Typical current and voltage choices for directional feature

Set value for the Set value for the

parameter parameter Comment
CurrentInput VoltageInput
PosSeq PosSeq Directional positive sequence overcurrent function is obtained.
Typical setting for RCADir is from 45° to 90° depending on the power
system voltage level (X/R ratio)
NegSeq -NegSeq Directional negative sequence overcurrent function is obtained.
Typical setting for RCADir is from 45° to 90° depending on the power
system voltage level (X/R ratio)
3ZeroSeq -3ZeroSeq Directional zero sequence overcurrent function is obtained. Typical
setting for RCADir is from 0° to 90° depending on the power system
earthing (that is, solidly earthed, earthed via resistor)
Phase1 Phase2-Phase3 Directional overcurrent function for the first phase is obtained.
Typical setting for RCADir is +30° or +45°
Phase2 Phase3-Phase1 Directional overcurrent function for the second phase is obtained.
Typical setting for RCADir is +30° or +45°
Phase3 Phase1-Phase2 Directional overcurrent function for the third phase is obtained.
Typical setting for RCADir is +30° or +45°

Unbalance current or voltage measurement shall not be used when the directional feature is enabled.

Two types of directional measurement principles are available, I & U and IcosPhi&U. The first
principle, referred to as "I & U" in the parameter setting tool, checks that:

• the magnitude of the measured current is bigger than the set pick-up level
• the phasor of the measured current is within the operating region (defined by the relay operate
angle, ROADir parameter setting; see figure 471).

U=-3U0
RCADir

Ipickup ROADir I=3Io

Operate region
MTA line
IEC05000252-2-en.vsd

IEC05000252 V2 EN-US

Figure 471: I & U directional operating principle for CVGAPC function

where:
RCADir is 75°
ROADir is 50°

The second principle, referred to as "IcosPhi&U" in the parameter setting tool, checks that:

• that the product I·cos(Φ) is bigger than the set pick-up level, where Φ is angle between the
current phasor and the mta line
• that the phasor of the measured current is within the operating region (defined by the I·cos(Φ)
straight line and the relay operate angle, ROADir parameter setting; see figure 471).

812 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 13
Multipurpose protection

U=-3U0

Ipickup ROADir  I=3Io

Operate region
MTA line
IEC05000253-2-en.vsdx

IEC05000253 V2 EN-US

Figure 472: CVGAPC, IcosPhi&U directional operating principle

where:
RCADir is 75°
ROADir is 50°

Note that it is possible to decide by a parameter setting how the directional feature shall behave
when the magnitude of the measured voltage phasor falls below the pre-set value. User can select
one of the following three options:

• Non-directional (operation allowed for low magnitude of the reference voltage)

• Block (operation prevented for low magnitude of the reference voltage)
• Memory (memory voltage shall be used to determine direction of the current)

It shall also be noted that the memory duration is limited in the algorithm to 100 ms. After that time
the current direction will be locked to the one determined during memory time and it will re-set only if
the current fails below set pickup level or voltage goes above set voltage memory limit.

Voltage restraint/control feature M13751-326 v4

The overcurrent protection step operation can be made dependent of a measured voltage quantity
(see table 511). Practically then the pickup level of the overcurrent step is not constant but instead
decreases with the decrease in the magnitude of the measured voltage quantity. Two different types
of dependencies are available:

• Voltage restraint overcurrent (when setting parameter VDepMode_OC1=Slope)

Transformer protection RET670 813

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 13 1MRK 504 164-UEN Rev. N
Multipurpose protection

OC1 Stage Pickup Level

StartCurr_OC1

VDepFact_OC1 * StartCurr_OC1

ULowLimit_OC1 UHighLimit_OC1
Selected Voltage
Magnitude
en05000324.vsd
IEC05000324 V1 EN-US

Figure 473: Example for OC1 step current pickup level variation as function of measured
voltage magnitude in Slope mode of operation

• Voltage controlled overcurrent (when setting parameter VDepMode_OC1=Step)

OC1 Stage Pickup Level

StartCurr_OC1

VDepFact_OC1 * StartCurr_OC1

UHighLimit_OC1 Selected Voltage Magnitude

en05000323.vsd
IEC05000323 V1 EN-US

Figure 474: Example for OC1 step current pickup level variation as function of measured
voltage magnitude in Step mode of operation
This feature will simply change the set overcurrent pickup level in accordance with magnitude
variations of the measured voltage. It shall be noted that this feature will as well affect the pickup
current value for calculation of operate times for IDMT curves (overcurrent with IDMT curve will
operate faster during low voltage conditions).

Current restraint feature M13751-338 v3

The overcurrent protection step operation can be made dependent of a restraining current quantity
(see table 512). Practically then the pickup level of the overcurrent step is not constant but instead
increases with the increase in the magnitude of the restraining current.

814 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 13
Multipurpose protection

Imeasured

StartCurr_OC2

StartCurr_OC1

Atan(RestrCoeff)

Restraint

IEC05000255 V2 EN-US

Figure 475: Current pickup variation with restraint current magnitude

This feature will simply prevent overcurrent step to start if the magnitude of the measured current
quantity is smaller than the set percentage of the restrain current magnitude. However this feature
will not affect the pickup current value for calculation of operate times for IDMT curves. This means
that the IDMT curve operate time will not be influenced by the restrain current magnitude.

When set, the start signal will start definite time delay or inverse (IDMT) time delay in accordance
with the end user setting. If the start signal has value one for longer time than the set time delay, the
overcurrent step will set its trip signal to one. Reset of the start and trip signal can be instantaneous
or time delay in accordance with the end user setting.

13.1.8.4 Built-in undercurrent protection steps M13751-231 v2

Two undercurrent protection steps are available. They are absolutely identical and therefore only one
will be explained here. Undercurrent step simply compares the magnitude of the measured current
quantity (see table 510) with the set pickup level. The undercurrent step will pickup and set its start
signal to one if the magnitude of the measured current quantity is smaller than this set level. The start
signal will start definite time delay with set time delay. If the start signal has value one for longer time
than the set time delay the undercurrent step will set its trip signal to one. Reset of the start and trip
signal can be instantaneous or time delay in accordance with the setting.

13.1.8.5 Built-in overvoltage protection steps M13751-234 v3

Two overvoltage protection steps are available. They are absolutely identical and therefore only one
will be explained here.

Overvoltage step simply compares the magnitude of the measured voltage quantity (see table 511)
with the set pickup level. The overvoltage step will pickup if the magnitude of the measured voltage
quantity is bigger than this set level.

The start signal will start definite time delay or inverse (IDMT) time delay in accordance with the end
user setting. If the start signal has value one for longer time than the set time delay, the overvoltage
step will set its trip signal to one. Reset of the start and trip signal can be instantaneous or time delay
in accordance with the end user setting.

Transformer protection RET670 815

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 13 1MRK 504 164-UEN Rev. N
Multipurpose protection

13.1.8.6 Built-in undervoltage protection steps M13751-239 v3

Two undervoltage protection steps are available. They are absolutely identical and therefore only one
will be explained here.

Undervoltage step simply compares the magnitude of the measured voltage quantity (see table 511)
with the set pickup level. The undervoltage step will pickup if the magnitude of the measured voltage
quantity is smaller than this set level.

The start signal will start definite time delay or inverse (IDMT) time delay in accordance with the end
user setting. If the start signal has value one for longer time than the set time delay, the undervoltage
step will set its trip signal to one. Reset of the start and trip signal can be instantaneous or time delay
in accordance with the end user setting.

13.1.8.7 Logic diagram M13085-3 v8

The simplified internal logics, for CVGAPC function are shown in the following figures.

The following currents and voltages are inputs to the multipurpose protection function. They must all
be expressed in true power system (primary) Amperes and kilovolts.

1. Instantaneous values (samples) of currents & voltages from one three-phase current and one
three-phase voltage input.
2. Fundamental frequency phasors from one three-phase current and one three-phase voltage
input calculated by the pre-processing modules.
3. Sequence currents & voltages from one three-phase current and one three-phase voltage input
calculated by the pre-processing modules.

The multipurpose protection function:

1. Selects one current from the three-phase input system (see table 510) for internally measured
current.
2. Selects one voltage from the three-phase input system (see table 511) for internally measured
voltage.
3. Selects one current from the three-phase input system (see table 512) for internally measured
restraint current.

816 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 13
Multipurpose protection

CURRENT

UC1
TRUC1
2nd Harmonic
Selected current restraint
STUC2
UC2
nd
TRUC2
2 Harmonic
restraint

STOC1
OC1 TROC1

2nd Harmonic BLK2ND

restraint ³1
Selected restraint current
Current restraint
DIROC1
Directionality
Voltage control /
restraint

STOC2
OC2 TROC2

2nd Harmonic
restraint
Current restraint ³1
UDIRLOW

Directionality DIROC2

Voltage control /
restraint

STOV1
OV1 TROV1

STOV2
OV2 TROV2

STUV1
Selected voltage
UV1 TRUV1

STUV2
UV2 TRUV2

VOLTAGE

en05000170.vsd
IEC05000170 V1 EN-US

Figure 476: CVGAPC function main logic diagram for built-in protection elements
Logic in figure 476 can be summarized as follows:

Transformer protection RET670 817

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 13 1MRK 504 164-UEN Rev. N
Multipurpose protection

1. The selected currents and voltage are given to built-in protection elements. Each protection
element and step makes independent decision about status of its START and TRIP output
signals.
2. More detailed internal logic for every protection element is given in the following four figures.
3. Common START and TRIP signals from all built-in protection elements & steps (internal OR
logic) are available from multipurpose function as well.

a Freeze Timers
a>b AND
BlkLevel2nd b

Enable  DEF time 
second  Second harmonic  selected
harmonic check DEF BLKTROC1 TROC1
AND
OR
a
a>b
b
OC1=On STOC1
AND
StartCurr_OC1 BLKOC1
X
Inverse

Voltage 
control or  Directionality  DIR_OK Inverse 
time 
restraint  check selected
feature

Selected voltage Current
Restraint
Feature
Selected restrain current Imeasured > k Irestraint

IEC05000831‐2‐en.vsdx

IEC05000831 V3 EN-US

Figure 477: Simplified internal logic diagram for built-in first overcurrent step that is, OC1 (step OC2 has the
same internal logic)

BLKUC1TR

a Freeze Timer
a>b AND
BlkLevel2nd b

Enable 
second  Second harmonic 
harmonic check

a TRUC1
b>a
DEF AND
b
StartCurr_UC1
AND

Operation_UC1=On
STUC1

BLKUC1

IEC05000750‐2‐en.vsdx

IEC05000750 V2 EN-US

Figure 478: Simplified internal logic diagram for built-in first undercurrent step that is, UC1 (step UC2 has the
same internal logic)

818 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 13
Multipurpose protection

DEF time BLKTROV1

selected DEF TROV1
AND
OR
Selected voltage a
a>b
b STOV1
StartVolt_OV1
AND

Inverse
Operation_OV1=On
Inverse time
BLKOV1 selected

en05000751.vsd

IEC05000751 V1 EN-US

Figure 479: Simplified internal logic diagram for built-in first overvoltage step OV1 (step OV2 has the same
internal logic)

DEF time BLKTRUV

selected DEF 1 TRUV1
AND
OR
Selected voltage a
b>a
b STUV1
AND
StartVolt_UV1

Inverse
Operation_UV1=On
Inverse time
BLKUV1 selected

en05000752.vsd

IEC05000752 V1 EN-US

Figure 480: Simplified internal logic diagram for built-in first undervoltage step UV1 (step UV2 has the same
internal logic)

When enabled, the 2nd harmonic blocking function applied in UC1, UC2, OC1 and
OC2 is used to freeze the Definite and/or the Inverse Characteristics internal timers.
When the function detects a 2nd harmonic higher than the set threshold, the internal
function timers are frozen but START outputs continues to be active as long as the
measured current is above the set pickup level. Internal timers will again resume
timing when harmonic content becomes smaller than the set threshold and the
measured current is higher than the pickup value. If TRIP output is already active
when harmonic blocking signal appears the TRIP output will not be affected.

Transformer protection RET670 819

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 13 1MRK 504 164-UEN Rev. N
Multipurpose protection

13.1.9 Technical data

M13095-2 v11

Table 514: CVGAPC technical data

Function Range or value Accuracy

Measuring current input phase1, phase2, phase3, PosSeq, - -
NegSeq, -3*ZeroSeq, MaxPh,
MinPh, UnbalancePh, phase1-
phase2, phase2-phase3, phase3-
phase1, MaxPh-Ph, MinPh-Ph,
UnbalancePh-Ph
Measuring voltage input phase1, phase2, phase3, PosSeq, - -
NegSeq, -3*ZeroSeq, MaxPh,
MinPh, UnbalancePh, phase1-
phase2, phase2-phase3, phase3-
phase1, MaxPh-Ph, MinPh-Ph,
UnbalancePh-Ph
Start overcurrent, step 1 - 2 (2 - 5000)% of IBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir

Start undercurrent, step 1 - 2 (2 - 150)% of IBase ±1.0% of Ir at I ≤ Ir

±1.0% of I at I > Ir

Independent time delay, overcurrent at 0 (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is

to 2 x Iset, step 1 - 2 greater

Independent time delay, undercurrent at (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is

2 x Iset to 0, step 1 - 2 greater

Overcurrent (non-directional):
Start time at 0 to 2 x Iset Min. = 15 ms -
Max. = 30 ms
Reset time at 2 x Iset to 0 Min. = 15 ms -
Max. = 30 ms
Start time at 0 to 10 x Iset Min. = 5 ms -
Max. = 20 ms
Reset time at 10 x Iset to 0 Min. = 20 ms -
Max. = 35 ms
Undercurrent:
Start time at 2 x Iset to 0 Min. = 15 ms -
Max. = 30 ms
Reset time at 0 to 2 x Iset Min. = 15 ms -
Max. = 30 ms
Overcurrent:
Inverse time characteristics, see table 16 curve types See table 1294, 1295 and table
1294, 1295 and table 1296 1296
Overcurrent:
Minimum operate time for inverse (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is
curves, step 1 - 2 greater
Voltage level where voltage memory (0.0 - 5.0)% of UBase ±0.5% of Ur
takes over
Start overvoltage, step 1 - 2 (2.0 - 200.0)% of UBase ±0.5% of Ur at U ≤ Ur
±0.5% of U at U > Ur

Start undervoltage, step 1 - 2 (2.0 - 150.0)% of UBase ±0.5% of Ur at U ≤ Ur

±0.5% of U at U > Ur

Independent time delay, overvoltage at (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is

0.8 x Uset to 1.2 x Uset, step 1 - 2 greater

Table continues on next page

820 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 13
Multipurpose protection

Function Range or value Accuracy

Independent time delay, undervoltage at (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is
1.2 x Uset to 0.8 x Uset, step 1 - 2 greater

Overvoltage:
Start time at 0.8 x Uset to 1.2 x Uset Min. = 15 ms -
Max. = 30 ms
Reset time at 1.2 x Uset to 0.8 x Uset Min. = 15 ms -
Max. = 30 ms
Undervoltage:
Start time at 1.2 x Uset to 0.8 x Uset Min. = 15 ms -
Max. = 30 ms
Reset time at 1.2 x Uset to 0.8 x Uset Min. = 15 ms -
Max. = 30 ms
Overvoltage:
Inverse time characteristics, see table 4 curve types See table 1302
1302
Undervoltage:
Inverse time characteristics, see table 3 curve types See table 1303
1303
High and low voltage limit, voltage (1.0 - 200.0)% of UBase ±1.0% of Ur at U ≤ Ur
dependent operation, step 1 - 2 ±1.0% of U at U > Ur

Directional function Settable: NonDir, forward and -

reverse
Relay characteristic angle (-180 to +180) degrees ±2.0 degrees
Relay operate angle (1 to 90) degrees ±2.0 degrees
Reset ratio, overcurrent > 95% -
Reset ratio, undercurrent < 105% -
Reset ratio, overvoltage > 95% -
Reset ratio, undervoltage < 105% -
Operate frequency 10-90 Hz -
Overcurrent:
Critical impulse time 10 ms typically at 0 to 2 x Iset -

Impulse margin time 15 ms typically -

Undercurrent:
Critical impulse time 10 ms typically at 2 x Iset to 0 -

Impulse margin time 15 ms typically -

Overvoltage:
Critical impulse time 10 ms typically at 0.8 x Uset to 1.2 x -
Uset

Impulse margin time 15 ms typically -

Undervoltage:
Critical impulse time 10 ms typically at 1.2 x Uset to 0.8 x -
Uset

Impulse margin time 15 ms typically -

Transformer protection RET670 821

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
822
1MRK 504 164-UEN Rev. N Section 14
System protection and control

Section 14 System protection and control

14.1 Multipurpose filter SMAIHPAC GUID-6B541154-D56B-452F-B143-4C2A1B2D3A1F v1

14.1.1 Identification GUID-8224B870-3DAA-44BF-B790-6600F2AD7C5D v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Multipurpose filter SMAIHPAC - -

14.1.2 Functionality GUID-EB0B11C3-FF79-4B8D-A335-649623E832F9 v3

The multi-purpose filter function block (SMAIHPAC) is arranged as a three-phase filter. It has very
much the same user interface (e.g. inputs and outputs) as the standard pre-processing function block
SMAI. However the main difference is that it can be used to extract any frequency component from
the input signal. Thus it can, for example, be used to build sub-synchronous resonance protection for
synchronous generator.

14.1.3 Function block GUID-FA590757-0DB1-4605-9DE2-20FA8304795F v1

SMAIHPAC
BLOCK AI3P
G3P* AI1
AI2
AI3
AI4

IEC13000180-1-en.vsd
IEC13000180 V1 EN-US

14.1.4 Signals GUID-DF7C833A-9AB9-40CA-867B-950AC1F662B5 v1

PID-6733-INPUTSIGNALS v1

Table 515: SMAIHPAC Input signals

Name Type Default Description

G3P GROUP - Analog input group from SMAI
SIGNAL
BLOCK BOOLEAN 0 Block of function

PID-6733-OUTPUTSIGNALS v1

Table 516: SMAIHPAC Output signals

Name Type Description

AI3P GROUP SIGNAL Analog input 3-phase group
AI1 GROUP SIGNAL Analog input 1
AI2 GROUP SIGNAL Analog input 2
AI3 GROUP SIGNAL Analog input 3
AI4 GROUP SIGNAL Analog input 4

Transformer protection RET670 823

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 14 1MRK 504 164-UEN Rev. N
System protection and control

14.1.5 Settings GUID-5EA398AD-66E2-4240-8918-4332995CED11 v1

PID-6733-SETTINGS v1

Table 517: SMAIHPAC Non group settings (basic)

Name Values (Range) Unit Step Default Description

ConnectionType Ph - Ph - - Ph - N Analogue input connection type
Ph - N
SetFrequency 2.0 - 500.0 Hz 0.1 50.0 Desired frequency to be extracted by the
filter
FreqBandWidth 0.0 - 60.0 Hz 0.1 0.0 Extra added frequency band around the
set frequency
FilterLength 0.1 s - - 1.0 s Approximate length of the filtering
0.2 s window in seconds
0.5 s
1.0 s
2.0 s
4.0 s
OverLap 0 - 95 % 5 20 Filtering window overlap between two
calculations in percent

14.1.6 Operation principle GUID-262C1783-3A0A-46B6-99FC-1202AE8E7519 v3

For all four analogue input signals into this filter (i.e. three phases and the residual quantity) the input
samples from the TRM module which are coming at rate of 20 samples per fundamental system
cycle are first stored. When enough samples are available in the internal memory, the phasor values
at set frequency defined by the setting parameter SetFrequency are calculated. The following values
are internally available for each of the calculated phasors:

• Magnitude
• Phase angle
• Exact frequency of the extracted signal

Note that the special filtering algorithm is used to extract these phasors. This algorithm is different
from the standard one-cycle Digital Fourier Filter typically used by the numerical IEDs. This filter
provides extremely good accuracy of measurement and excellent noise rejection, but at the same
time it has much slower response time. It is capable to extract phasor (i.e. magnitude, phase angle
and actual frequency) of any signal (e.g. 37,2Hz) present in the waveforms of the connected CTs
and/or VTs. The magnitude and the phase angle of this phasor are calculated with very high
precision. For example the magnitude and phase angle of the phasor can be estimated even if it has
magnitude of one per mille (i.e. 1‰ ) in comparison to the dominating signal (e.g. the fundamental
frequency component). Several instances of this function block are provided. These instances are
fully synchronized between each-other in respect of phase angle calculation. Thus if two multi-
purpose filters are used for some application, one for current and the second one for the voltage
signals, the power values (i.e. P & Q) at the set frequency can be calculated from them by the over-/
under-power function or CVMMXN measurement function block.

In addition to these phasors the following quantities are internally calculated as well:

• Phasors for the individual phases as well as phase-to-phase phasors

• True RMS value of the input signal over all samples available in the memory
• Positive sequence phasor
• Negative sequence phasor
• Zero sequence phasor
• etc.

In order to properly calculate phase-to-phase phasors from the individual phase phasors or vice
versa, the setting parameters ConnectionType is provided. It defines what quantities (i.e. individual
phases or phase-to-phase quantities) are physically connected to the IED analogue inputs by wiring.

824 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 14
System protection and control

Then the IED knows which one of them are the measured quantities and the other one is then
internally calculated. This setting is only important for the VT inputs, because the CTs are typically
star connected all the time.

Thus when this filter is used in conjunction with multi-purpose protection function or overcurrent
function or over-voltage function or over-power function many different protection applications can be
arranged. For example the following protection, monitoring or measurement features can be realized:

• Sub-synchronous resonance protection for turbo generators

• Sub-synchronous protection for wind turbines/wind farms
• Detection of sub-synchronous oscillation between HVDC links and synchronous generators
• Super-synchronous protection
• Detection of presence of the geo-magnetic induced currents
• Overcurrent or overvoltage protection at specific frequency harmonic, sub-harmonic, inter-
harmonic etc.
• Presence of special railway frequencies (e.g. 16.7Hz or 25Hz) in the three-phase power system
• Sensitive reverse power protection
• Stator or rotor earth fault protection for special injection frequencies (e.g. 25Hz)
• etc.

The filter output can also be connected to the measurement function blocks such as CVMMXN
(Measurements), CMMXU (Phase current measurement), VMMXU (Phase-phase voltage
measurement), etc.

The filter has as well additional capability to report the exact frequency of the extracted signal. Thus
the user can check the actual frequency of some phenomenon in the power system (e.g. frequency
of the sub-synchronous currents) and compare it with expected value obtained previously by either
calculation or simulation. For the whole three-phase filter group the frequency of the signal
connected to the first input (i.e. phase L1) is reported. This value can be then used either by over-/
under-frequency protections or reported to the built-in HMI or any other external client via the
measurement blocks such is the CVMMXN.

How many samples in the memory are used for the phasor calculation depends on the setting
parameter FilterLength. Table 518 gives overview of the used number of samples for phasor
calculation by the filter. Note that the used number of samples is always a power of number two.

Table 518: Length of the filtering window

Value for parameter Used No of samples for Corresponding length of Corresponding length of
FilterLength calculation (fixed, the input waveform in the input waveform in
independent from rated miliseconds for 50Hz miliseconds for 60Hz
frequency) power system power system
0.1 s 128 = 27 128 ms 107 ms

0.2 s 256 = 28 256 ms 213 ms

0.5 s 512 = 29 512 ms 427 ms

1.0 s 1024 = 210 1024 ms 853 ms

2.0 s 2048 = 211 2048 ms 1707 ms

4.0 s 4096 = 212 4096 ms 3413 ms

Note that the selected value for the parameter FilterLength automatically defines certain filter
properties as described below:

First in order to secure proper filter operation the selected length of the filter shall always be longer
than three complete periods of the signal which shall be extracted. Actually the best results are
obtained if at least five complete periods are available within the filtering window. Thus, this filter
feature will limit which filter lengths can be used to extract low frequency signals. For example if 16,7
Hz signal shall be extracted the minimum filter length in milliseconds shall be:

Transformer protection RET670 825

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 14 1MRK 504 164-UEN Rev. N
System protection and control

1000
3× = 180ms
16.7
EQUATION000028 V1 EN-US (Equation 265)

Thus based on the data from Table 518 the minimum acceptable value for this parameter would be
“FilterLength = 0.2 s” but more accurate results will be obtained by using “FilterLength = 0.5 s”

Second feature which is determined by the selected value for parameter FilterLength is the capability
of the filter to separate the desired signal from the other disturbing signals which may have similar
frequency value. Note that the filter output will be the phasor with the highest magnitude within
certain “pass frequency band” around the SetFrequency. Table 519 defines the natural size of this
pass frequency band for the filter, depending on the selected value for parameter FilterLength.

Table 519: Pass frequency band due to FilterLength

Value for parameter FilterLength For 50Hz power system For 60Hz power system
0.1 s ±22.5 Hz ±27.0 Hz
0.2 s ±11.5 Hz ±14.0 Hz
0.5 s ±6.0 Hz ±7.2 Hz
1.0 s ±3.0 Hz ±3.6 Hz
2.0 s ±1.5 Hz ±1.8 Hz
4.0 s ±0.8 Hz ±1.0 Hz

Thus the longer length of the filter the better capability it has to reject the disturbing signals close to
the required frequency component and any other noise present in the input signal waveform. For
example if 46 Hz signal wants to be extracted in 50Hz power system, then from Table 519 it can be
concluded that “FilterLength=1,0 s” shall be selected as a minimum value. However if frequency
deviation of the fundamental frequency signal in the power system are taken into account it may be
advisable to select “FilterLength=2,0 s” for such application.

Note that in case when no clear magnitude peak exist in the set pass frequency band the filter will
return zero values for the phasor magnitude and angle while the signal frequency will have value
minus one. Finally the set value for parameter FilterLength also defines the response time of the filter
after a step change of the measured signal. The filter will correctly estimate the new signal
magnitude once 75% of the filter length has been filed with the new signal value (i.e. after the
change).

If for any reason this natural frequency band shall be extended (e.g. to get accurate but wider filter) it
is possible to increase the pass band by entering the value different from zero for parameter
FreqBandWidth. In such case the total filter pass band can be defined as:

± (value given in Table 519 + one-half of the set FreqBandWidth value)

Example if in 60Hz system the selected values are “FilterLength =1.0 s” and “FreqBandWidth = 5.0”
the total filter pass band will be ±(3.6+5.0/2)= ± 6.1 Hz.

It shall be noted that the phasor calculation is relatively computation demanding (required certain
amount of the CPU processing time). In order to control the CPU usage for this filter, the setting
parameter OverLap is used. This setting parameter defines how often the new phasor value is
calculated during time period defined by the set value for the parameter FilterLength (see Table 518).
The following list gives some examples how this parameter influence the calculation rate for the
extracted phasor:

• when OverLap=0% the new phasor value is calculated only once per FilterLength
• when OverLap=50% the new phasor value is calculated two times per FilterLength
• when OverLap=75% the new phasor value is calculated four times per FilterLength
• when OverLap=90% the new phasor value is calculated ten times per FilterLength

826 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 14
System protection and control

Filterlength of SMAIHPAC shall be properly coordinated with the operate times of the
functions that are consuming SMAIHPAC data, in order to prevent inadvertent
operation.

14.1.7 Filter calculation example GUID-F5828B0A-CED3-483E-B5B1-F389C3C2AEFB v3

In the following Figure an example from an installation of this filter on a large, 50 Hz turbo generator
with a rating in excess of 1000 MVA is presented. In this installation filter is used to measure the
stator sub-synchronous resonance currents. For this particular installation the following settings were
used for the filter:

• SetFrequency= 31.0 Hz
• FilterLength= 1.0 s
• OverLap = 75%
• FreqBandWidth= 0.0 Hz

IEC13000178-2-en.vsd
IEC13000178 V3 EN-US

Figure 481: Example of filter calculation

The data shown in the Figure comes from the comtrade file captured by the IED. The following traces
are presented in this Figure.

a) Waveforms of the stator three-phase currents given in primary kA.

b) RMS value of the sub-synchronous resonance current extracted by the filter in primary amperes.

c) Frequency of the extracted sub-synchronous resonance current provided by the filter in Hz.

Note the very narrow scale on the y-axle for b) and c). Such small scale as well indicates with which
precision and consistency the filter calculates the phasor magnitude and frequency of the extracted
stator sub-synchronous current component.

The following can be observed in the Figure:

Transformer protection RET670 827

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 14 1MRK 504 164-UEN Rev. N
System protection and control

• The stator total RMS current value is around 33 kA primary.

• The measured magnitude of the sub-synchronous current is around 173 A primary (that is, 0.5%
of the fundamental 50 Hz component).
• The frequency of this sub-synchronous current component is 31.24 Hz.

With above given settings the sub-synchronous current magnitude and frequency are calculated
approximately four times per second (that is, correct value is four times per 1024 ms).

828 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

Section 15 Secondary system supervision

15.1 Current circuit supervision CCSSPVC IP14555-1 v5

15.1.1 Identification
M14870-1 v5

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Current circuit supervision CCSSPVC - 87

15.1.2 Functionality M12444-3 v10

Open or short circuited current transformer cores can cause unwanted operation of many protection
functions such as differential, earth-fault current and negative-sequence current functions.

Current circuit supervision (CCSSPVC) compares the residual current from a three phase set of
current transformer cores with the neutral point current on a separate input taken from another set of
cores on the current transformer.

A detection of a difference indicates a fault in the circuit and is used as alarm or to block protection
functions expected to give inadvertent tripping.

15.1.3 Function block M12436-3 v9

CCSSPVC
I3P* FAIL
IREF* ALARM
BLOCK
IEC13000304-1-en.vsd
IEC13000304 V1 EN-US

Figure 482: CCSSPVC function block

Signal ISIREF must be connected in the configuration.

15.1.4 Signals
PID-6806-INPUTSIGNALS v2

Table 520: CCSSPVC Input signals

Name Type Default Description

I3P GROUP - Group signal for three phase current input
SIGNAL
IREF GROUP - Residual reference current input
SIGNAL
BLOCK BOOLEAN 0 Block of function

Transformer protection RET670 829

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

PID-6806-OUTPUTSIGNALS v2

Table 521: CCSSPVC Output signals

Name Type Description

FAIL BOOLEAN Detection of current circuit failure
ALARM BOOLEAN Alarm for current circuit failure

15.1.5 Settings
PID-6806-SETTINGS v2

Table 522: CCSSPVC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
IMinOp 10 - 200 %IB 1 20 Minimum operate current differential
level in % of IBase

Table 523: CCSSPVC Group settings (advanced)

Name Values (Range) Unit Step Default Description

Ip>Block 20 - 500 %IB 1 150 Block of the function at high phase
current, in % of IBase

Table 524: CCSSPVC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

15.1.6 Operation principle M12396-5 v10

Current circuit supervision CCSSPVC compares the absolute value of the vectorial sum of the three
phase currents |ΣIphase| and the absolute value of the residual current |Iref| from another current
transformer set, see figure 483.

The FAIL output will be set to high when the following criteria are fulfilled:

• The numerical value of the difference |ΣIphase| – |Iref| is higher than 80% of the numerical value
of the sum |ΣIphase| + |Iref|.
• The numerical value of the current |ΣIphase| – |Iref| is equal to or higher than the set operate
value IMinOp.
• No phase current has exceeded Ip>Block during the last 10 ms.
• CCSSPVC is enabled by setting Operation = On.

The FAIL output remains activated 100 ms after the AND-gate resets when being activated for more
than 20 ms. If the FAIL lasts for more than 150 ms an ALARM will be issued. In this case the FAIL
and ALARM will remain activated 1 s after the AND-gate resets. This prevents unwanted resetting of
the blocking function when phase current supervision element(s) operate, for example, during a fault.

830 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

IL1 IL1 I>1.054 * IMinOp

IL2 IL2 +
IL3 IL3  -
+ +
I ref Iref + x -
0,8
I>IP>Block
10 ms AND
OR FAIL
OR t

40 ms 100 ms

170 ms 3000 ms ALARM

OPERATION
BLOCK

IEC05000463-3-en.vsd
IEC05000463 V3 EN-US

Figure 483: Simplified logic diagram for Current circuit supervision CCSSPVC
The operate characteristic is percentage restrained, which is shown in Figure 484.

| åI phase | - | I ref |

Slope = 1

Operation
Slope = 0.8
area
I MinOp

| åI phase | + | I ref |
99000068.vsd
IEC99000068 V1 EN-US

Figure 484: Operate characteristics

Due to the formulas for the axis compared, |SIphase | - |I ref | and |S I phase | + | I ref
| respectively, the slope can not be above 1.

15.1.7 Technical data

M12358-1 v11

Table 525: CCSSPVC technical data

Function Range or value Accuracy

Operate current (10-200)% of IBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir

Reset ratio, Operate current >90%

Block current (20-500)% of IBase ±5.0% of Ir at I ≤ Ir
±5.0% of I at I > Ir

Reset ratio, Block current >90% at (50-500)% of IBase

Transformer protection RET670 831

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

15.2 Fuse failure supervision FUFSPVC IP14556-1 v3

15.2.1 Identification
M14869-1 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Fuse failure supervision FUFSPVC - -

15.2.2 Functionality SEMOD113820-4 v13

The aim of the fuse failure supervision function (FUFSPVC) is to block voltage measuring functions
at failures in the secondary circuits between the voltage transformer and the IED in order to avoid
inadvertent operations that otherwise might occur.

The fuse failure supervision function basically has three different detection methods, negative
sequence and zero sequence based detection and an additional delta voltage and delta current
detection.

The negative sequence detection algorithm is recommended for IEDs used in isolated or high-
impedance earthed networks. It is based on the negative-sequence quantities.

The zero sequence detection is recommended for IEDs used in directly or low impedance earthed
networks. It is based on the zero sequence measuring quantities.

The selection of different operation modes is possible by a setting parameter in order to take into
account the particular earthing of the network.

A criterion based on delta current and delta voltage measurements can be added to the fuse failure
supervision function in order to detect a three phase fuse failure, which in practice is more associated
with voltage transformer switching during station operations.

15.2.3 Function block M13678-3 v9

FUFSPVC
I3P* BLKZ
U3P* BLKU
BLOCK 3PH
CBCLOSED DLD1PH
MCBOP DLD3PH
DISCPOS STDI
BLKTRIP STDIL1
STDIL2
STDIL3
STDU
STDUL1
STDUL2
STDUL3

IEC14000065-1-en.vsd
IEC14000065 V1 EN-US

Figure 485: FUFSPVC function block

832 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

15.2.4 Signals
PID-3492-INPUTSIGNALS v9

Table 526: FUFSPVC Input signals

Name Type Default Description

I3P GROUP - Current connection
SIGNAL
U3P GROUP - Voltage connection
SIGNAL
BLOCK BOOLEAN 0 Block of function
CBCLOSED BOOLEAN 0 Active when circuit breaker is closed
MCBOP BOOLEAN 0 Active when external MCB opens protected voltage circuit
DISCPOS BOOLEAN 0 Active when line disconnector is open
BLKTRIP BOOLEAN 0 Blocks operation of function when active

PID-3492-OUTPUTSIGNALS v9

Table 527: FUFSPVC Output signals

Name Type Description

BLKZ BOOLEAN Start of current and voltage controlled function
BLKU BOOLEAN General start of function
3PH BOOLEAN Three-phase start of function
DLD1PH BOOLEAN Dead line condition in at least one phase
DLD3PH BOOLEAN Dead line condition in all three phases
STDI BOOLEAN Common start signal of sudden change in current
STDIL1 BOOLEAN Start signal of sudden change in current, phase L1
STDIL2 BOOLEAN Start signal of sudden change in current, phase L2
STDIL3 BOOLEAN Start signal of sudden change in current, phase L3
STDU BOOLEAN Common start signal of sudden change in voltage
STDUL1 BOOLEAN Start signal of sudden change in voltage, phase L1
STDUL2 BOOLEAN Start signal of sudden change in voltage, phase L2
STDUL3 BOOLEAN Start signal of sudden change in voltage, phase L3

15.2.5 Settings
PID-3492-SETTINGS v9

Table 528: FUFSPVC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OpMode Off - - UZsIZs Operating mode selection
UNsINs
UZsIZs
UZsIZs OR
UNsINs
UZsIZs AND
UNsINs
OptimZsNs
3U0> 1 - 100 %UB 1 30 Operate level of residual overvoltage
element in % of UBase
Table continues on next page

Transformer protection RET670 833

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

Name Values (Range) Unit Step Default Description

3I0< 1 - 100 %IB 1 10 Operate level of residual undercurrent
element in % of IBase
3U2> 1 - 100 %UB 1 30 Operate level of neg seq overvoltage
element in % of UBase
3I2< 1 - 100 %IB 1 10 Operate level of neg seq undercurrent
element in % of IBase
OpDUDI Off - - Off Operation of change based function
On Off/On
DU> 1 - 100 %UB 1 60 Operate level of change in phase voltage
in % of UBase
DI< 1 - 100 %IB 1 15 Operate level of change in phase current
in % of IBase
UPh> 1 - 100 %UB 1 70 Operate level of phase voltage in % of
UBase
IPh> 1 - 100 %IB 1 10 Operate level of phase current in % of
IBase
SealIn Off - - On Seal in functionality Off/On
On
USealln< 1 - 100 %UB 1 70 Operate level of seal-in phase voltage in
% of UBase
IDLD< 1 - 100 %IB 1 5 Operate level for open phase current
detection in % of IBase
UDLD< 1 - 100 %UB 1 60 Operate level for open phase voltage
detection in % of UBase

Table 529: FUFSPVC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

15.2.6 Monitored data

PID-3492-MONITOREDDATA v8

Table 530: FUFSPVC Monitored data

Name Type Values (Range) Unit Description

3I0 REAL - A Magnitude of zero sequence current
3I2 REAL - A Magnitude of negative sequence current
3U0 REAL - kV Magnitude of zero sequence voltage
3U2 REAL - kV Magnitude of negative sequence voltage

15.2.7 Operation principle

15.2.7.1 Zero and negative sequence detection M13677-3 v5

The zero and negative sequence function continuously measures the currents and voltages in all
three phases and calculates, see figure 486:

• the zero-sequence voltage 3U0

• the zero-sequence current 3I0
• the negative sequence current 3I2
• the negative sequence voltage 3U2

834 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

The measured signals are compared with their respective set values 3U0> and 3I0<, 3U2> and 3I2<.

The function enable the internal signal FuseFailDetZeroSeq if the measured zero-sequence voltage
is higher than the set value 3U0> and the measured zero-sequence current is below the set value
3I0<.

The function enable the internal signal FuseFailDetNegSeq if the measured negative sequence
voltage is higher than the set value 3U2> and the measured negative sequence current is below the
set value 3I2<.

A drop out delay of 100 ms for the measured zero-sequence and negative sequence current will
prevent a false fuse failure detection at un-equal breaker opening at the two line ends.

Sequence Detection
3I0< CurrZeroSeq
IL1
Zero 3I0
sequence
filter 100 ms CurrNegSeq
a
IL2 a>b t
b
Negative 3I2
sequence
IL3 filter FuseFailDetZeroSeq
AND
100 ms
a
a>b t
3I2< b
FuseFailDetNegSeq
AND
3U0>
VoltZeroSeq
UL1
Zero
sequence a 3U0
a>b
b
filter
UL2 VoltNegSeq

Negative
sequence a 3U2
a>b
UL3 filter b

3U2>

IEC10000036-2-en.vsd
IEC10000036 V2 EN-US

Figure 486: Simplified logic diagram for sequence detection part

The calculated values 3U0, 3I0, 3I2 and 3U2 are available as service values on local HMI and
monitoring tool in PCM600.

Input and output signals M13677-19 v6

The output signals 3PH, BLKU and BLKZ as well as the signals DLD1PH and DLD3PH from dead
line detections are blocked if any of the following conditions occur:

• The input BLOCK is activated

• The input BLKTRIP is activated and the internal signal FuseFailStarted is not present
• The operation mode selector OpMode is set to Off
• The IED is in TEST status (TEST-ACTIVE is high) and the function has been blocked from the
HMI (BlockFUSE=Yes)

The input BLOCK signal is a general purpose blocking signal of the fuse failure supervision function.
It can be connected to a binary input of the IED in order to receive a block command from external
devices or can be software connected to other internal functions of the IED itself in order to receive a
block command from internal functions. Through OR gate it can be connected to both binary inputs
and internal function outputs.

The input BLKTRIP is intended to be connected to the trip output from any of the protection functions
included in the IED. When activated for more than 20 ms, the operation of the fuse failure is blocked;
a fixed drop-out timer prolongs the block for 100 ms. The aim is to increase the security against

Transformer protection RET670 835

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

unwanted operations during the opening of the breaker, which might cause unbalance conditions for
which the fuse failure might operate.

The output signal BLKZ will also be blocked if the internal dead line detection is activated. The dead
line detection signal has a 200 ms drop-out time delay.

The input signal MCBOP is supposed to be connected via a terminal binary input to the N.C. auxiliary
contact of the miniature circuit breaker protecting the VT secondary circuit. The MCBOP signal sets
the output signals BLKU and BLKZ in order to block all the voltage related functions when the MCB is
open independent of the setting of OpMode selector. The additional drop-out timer of 150 ms
prolongs the presence of MCBOP signal to prevent the unwanted operation of voltage dependent
function due to non simultaneous closing of the main contacts of the miniature circuit breaker.

The input signal DISCPOS is supposed to be connected via a terminal binary input to the N.C.
auxiliary contact of the line disconnector. The DISCPOS signal sets the output signal BLKU in order
to block the voltage related functions when the line disconnector is open. The impedance protection
function is not affected by the position of the line disconnector since there will be no line currents that
can cause malfunction of the distance protection. If DISCPOS=0 it signifies that the line is connected
to the system and when the DISCPOS=1 it signifies that the line is disconnected from the system
and the block signal BLKU is generated.

The output BLKU can be used for blocking the voltage related measuring functions (undervoltage
protection, energizing check and so on) except for the impedance protection.

The function output BLKZ shall be used for blocking the impedance protection function.

15.2.7.2 Delta current and delta voltage detection M13685-3 v8

A simplified diagram for the functionality is found in figure 487. The calculation of the changes of
currents and voltages is based on a sample analysis algorithm. The calculated delta quantities are
compared with their respective set values DI< and DU>. The algorithm detects a fuse failure if a
sufficient change in voltage without a sufficient change in current is detected in each phase
separately. The following quantities are calculated in all three phases:

• The change in voltage DU

• The change in current DI

The internal FuseFailDetDUDI signal is activated if the following conditions are fulfilled:

• The magnitude of the phase-ground voltage has been above UPh> for more than 1.5 cycles (i.e.
30 ms in a 50 Hz system)
• The magnitudes of DU in three phases are higher than the corresponding setting DU>
• The magnitudes of DI in three phases are below the setting DI<
• The magnitude of voltages drop in all three phases
• The zero sequence voltage is smaller than 3U0>

In addition to the above conditions, at least one of the following conditions shall be fulfilled in order to
activate the internal FuseFailDetDUDI signal:

• The magnitude of the phase currents in three phases are higher than the setting IPh>
• The circuit breaker is closed (CBCLOSED = True)

The first criterion means that detection of failure in three phases together with high current for the
three phases will set the output. The measured phase current is used to reduce the risk of false fuse
failure detection. If the current on the protected line is low, a voltage drop in the system (not caused
by fuse failure) may be followed by current change lower than the setting DI<, and therefore a false
fuse failure might occur.

The second criterion requires that the delta condition shall be fulfilled at the same time as circuit
breaker is closed. If CBCLOSED input is connected to FALSE , then only the first criterion can enable
the delta function. If the DUDI detections of three phases set the internal signal FuseFailDetDUDI at

836 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

the level high, then the signal FuseFailDetDUDI will remain high as long as the voltages of three
phases are lower then the setting Uph>.

In addition to fuse failure detection, two internal signals DeltaU and DeltaI are also generated by the
delta current and delta voltage DUDI detection algorithm. The internal signals DelatU and DeltaI are
activated when a sudden change of voltage, or respectively current, is detected. The detection of the
sudden change is based on a sample analysis algorithm. In particular DelatU is activated if at least
three consecutive voltage samples are higher then the setting DU>. In a similar way DelatI is
activated if at least three consecutive current samples are higher then the setting DI<. When DeltaU
or DeltaI are active, the output signals STDUL1, STDUL2, STDUL3 and respectively STDIL1,
STDIL2, STDIL3, based on a sudden change of voltage or current detection, are activated with a 20
ms time off delay. The common start output signals STDU or STDI are activated with a 60 ms time off
delay, if any sudden change of voltage or current is detected.

The delta function (except the sudden change of voltage and current detection) is
deactivated by setting the parameter OpDUDI to Off.

Transformer protection RET670 837

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

DUDI Detection
DUDI detection Phase 1
DeltaIL1
IL1
IL2
IL3 DI detection based on sample analysis OR

DI<

UL1

DU detection based on sample analysis

AND
DU>
1.5 cycle 20 ms DeltaUL1
a
a>b t t
UPh> b

IL1 DeltaIL2
IL2 DUDI detection Phase 2
DeltaUL2
IL3
UL2 Same logic as for phase 1

IL1 DeltaIL3
DUDI detection Phase 3
IL2
DeltaUL3
IL3
UL3 Same logic as for phase 1

UL1
a
a<b
b

IL1
a
a>b
IPh> b AND

OR AND
CBCLOSED AND OR

UL2
a
a<b
b

IL2
a
a>b
b AND

OR AND
AND OR

UL3
a
a<b
b

IL3
a
a>b
b AND

OR AND
AND OR FuseFailDetDUDI
AND

IEC12000166-3-en.vsd

IEC12000166 V3 EN-US

Figure 487: Simplified logic diagram for the DU/DI detection part

838 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

intBlock
STDI
AND

20 ms
DeltaIL1 STDIL1
t AND
OR
20 ms
DeltaIL2
t STDIL2
AND
20 ms
DeltaIL3
t
STDIL3
AND

STDU
AND

20 ms
DeltaUL1 STDUL1
t AND
OR
20 ms
DeltaUL2
t STDUL2
AND
20 ms
DeltaUL3
t
STDUL3
AND

IEC12000165-1-en.vsd
IEC12000165 V1 EN-US

Figure 488: Internal signals DeltaU or DeltaI and the corresponding output signals

15.2.7.3 Dead line detection M13679-44 v4

A simplified diagram for the functionality is found in figure 489. A dead phase condition is indicated if
both the voltage and the current in one phase is below their respective setting values UDLD< and
IDLD<. If at least one phase is considered to be dead the output DLD1PH and the internal signal
DeadLineDet1Ph is activated. If all three phases are considered to be dead the output DLD3PH is
activated

Transformer protection RET670 839

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

Dead Line Detection

IL1
a
a<b AllCurrLow
b
AND
IL2
a
a<b
b

IL3
a
a<b
b

IDLD<
DeadLineDet1Ph
UL1
a AND
a<b
b OR DLD1PH
AND
UL2
a AND
a<b
b
AND DLD3PH
UL3 AND
a AND
a<b
b

UDLD<

intBlock

IEC10000035-1-en.vsd
IEC10000035 V2 EN-US

Figure 489: Simplified logic diagram for Dead Line detection part

15.2.7.4 Main logic GUID-D474A49E-D3A8-438C-B7E4-E527FEC2F335 v6

A simplified diagram for the functionality is found in figure 490. The fuse failure supervision function
(FUFSPVC) can be switched on or off by the setting parameter Operation to On or Off.

For increased flexibility and adaptation to system requirements an operation mode selector, OpMode,
has been introduced to make it possible to select different operating modes for the negative and zero
sequence based algorithms. The different operation modes are:

• Off. The negative and zero sequence function is switched off.

• UNsINs. Negative sequence is selected.
• UZsIZs. Zero sequence is selected.
• UZsIZs OR UNsINs. Both negative and zero sequence are activated and work in parallel (OR-
condition for operation).
• UZsIZs AND UNsINs. Both negative and zero sequence are activated and work in series (AND-
condition for operation).
• OptimZsNs. Optimum of negative and zero sequence current (the function that has the highest
magnitude of measured negative and zero sequence current will be activated).

The delta function can be activated by setting the parameter OpDUDI to On. When selected it
operates in parallel with the sequence based algorithms.

As soon as any fuse failure situation is detected, signals FuseFailDetZeroSeq, FuseFailDetNegSeq

or FuseFailDetDUDI, and the specific functionality is released, the function will activate the output
signal BLKU. The output signal BLKZ will be activated as well if the internal dead phase detection,
DeadLineDet1Ph, is not activated at the same time. The output BLKU can be used for blocking
voltage related measuring functions (under voltage protection, energizing check, and so on). The
output BLKZ shall be used to block the impedance protection functions.

If the fuse failure situation is present for more than 5 seconds and the setting parameter SealIn is set
to On it will be sealed in as long as at least one phase voltages is below the set value USealIn<. This
will keep the BLKU and BLKZ signals activated as long as any phase voltage is below the set value
USealIn<. If all three phase voltages drop below the set value USealIn< and the setting parameter

840 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

SealIn is set to On the output signal 3PH will also be activated. The signals 3PH, BLKU and BLKZ
will now be active as long as any phase voltage is below the set value USealIn<.

If SealIn is set to On the fuse failure condition lasting more then 5 seconds is stored in the non-
volatile memory in the IED. At start-up of the IED (due to auxiliary power interruption or re-start due
to configuration change) it uses the stored value in its non-volatile memory and re-establishes the
conditions that were present before the shut down. All phase voltages must be restored above
USealIn< before fuse failure is de-activated and resets the signals BLKU, BLKZ and 3PH.

The output signal BLKU will also be active if all phase voltages have been above the setting
USealIn< for more than 60 seconds, the zero or negative sequence voltage has been above the set
value 3U0> and 3U2> for more than 5 seconds, all phase currents are below the setting IDLD<
(criteria for open phase detection) and the circuit breaker is closed (input CBCLOSED is activated).

If a MCB is used then the input signal MCBOP is to be connected via a binary input to the N.C.
auxiliary contact of the miniature circuit breaker protecting the VT secondary circuit. The MCBOP
signal sets the output signals BLKU and BLKZ in order to block all the voltage related functions when
the MCB is open independent of the setting of OpMode or OpDUDI. An additional drop-out timer of
150 ms prolongs the presence of MCBOP signal to prevent the unwanted operation of voltage
dependent function due to non simultaneous closing of the main contacts of the miniature circuit
breaker.

The input signal DISCPOS is supposed to be connected via a terminal binary input to the N.C.
auxiliary contact of the line disconnector. The DISCPOS signal sets the output signal BLKU in order
to block the voltage related functions when the line disconnector is open. The impedance protection
function does not have to be affected since there will be no line currents that can cause malfunction
of the distance protection.

Transformer protection RET670 841

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

Fuse failure detection

Main logic
TEST

TEST ACTIVE
AND
BlocFuse = Yes

BLOCK intBlock
OR
BLKTRIP 20 ms 100 ms
AND t t
FusefailStarted

All UL < USealIn<

OR
AND
3PH
AND
SealIn = On AND

AND
Any UL < UsealIn<

FuseFailDetDUDI
AND 5s
OpDUDI = On
OR t
FuseFailDetZeroSeq
AND

AND

FuseFailDetNegSeq
AND

UNsINs OR
UZsIZs OR
UZsIZs OR UNsINs
OpMode
UZsIZs AND UNsINs
OptimZsNs
OR
CurrZeroSeq
a AND
CurrNegSeq a>b
b

AND

DeadLineDet1Ph 200 ms
AND BLKZ
t OR AND
150 ms
MCBOP t

AND BLKU
60 s
t OR OR
All UL > UsealIn<
AND

VoltZeroSeq 5s
VoltNegSeq OR t

AllCurrLow
CBCLOSED

DISCPOS IEC10000033-2-en.vsd

IEC10000033 V2 EN-US

Figure 490: Simplified logic diagram for fuse failure supervision function, Main logic

842 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

15.2.8 Technical data

M16069-1 v13

Table 531: FUFSPVC technical data

Function Range or value Accuracy

Operate voltage, zero sequence (1-100)% of UBase ±0.5% of Ur

Operate current, zero sequence (1–100)% of IBase ±0.5% of Ir

Operate voltage, negative sequence (1-100)% of UBase ±0.5% of Ur

Operate current, negative sequence (1–100)% of IBase ±0.5% of Ir

Operate voltage change level (1-100)% of UBase ±10.0% of Ur

Operate current change level (1–100)% of IBase ±10.0% of Ir

Operate phase voltage (1-100)% of UBase ±0.5% of Ur

Operate phase current (1–100)% of IBase ±0.5% of Ir

Operate phase dead line voltage (1-100)% of UBase ±0.5% of Ur

Operate phase dead line current (1–100)% of IBase ±0.5% of Ir

Operate time, start, 1 ph, at 1 x Ur to 0 Min. = 10 ms -

Max. = 25 ms
Reset time, start, 1 ph, at 0 to 1 x Ur Min. = 15 ms -
Max. = 30 ms

15.3 Fuse failure supervision VDSPVC GUID-9C5BA1A7-DF2F-49D4-A13A-C6B483DDFCDC v2

15.3.1 Identification GUID-109434B0-23E5-4053-9E6E-418530A07F9C v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Fuse failure supervision VDSPVC VTS 60

15.3.2 Functionality GUID-6AF2219A-264F-4971-8D03-3B8A9D0CB284 v5

Different protection functions within the protection IED operates on the basis of measured voltage at
the relay point. Some example of protection functions are:

• Distance protection function.

• Undervoltage function.
• Energisation function and voltage check for the weak infeed logic.

These functions can operate unintentionally, if a fault occurs in the secondary circuits between
voltage instrument transformers and the IED. These unintentional operations can be prevented by
fuse failure supervision (VDSPVC).

VDSPVC is designed to detect fuse failures or faults in voltage measurement circuit, based on phase
wise comparison of voltages of main and pilot fused circuits. VDSPVC blocking output can be
configured to block functions that need to be blocked in case of faults in the voltage circuit.

Transformer protection RET670 843

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

15.3.3 Function block GUID-0C4A6C94-E0D7-4E36-AB49-D74A5E330D36 v2

VDSPVC
U3P1* MAINFUF
U3P2* PILOTFUF
BLOCK U1L1FAIL
U1L2FAIL
U1L3FAIL
U2L1FAIL
U2L2FAIL
U2L3FAIL

IEC14000048-1-en.vsd
IEC12000142 V2 EN-US

Figure 491: VDSPVC function block

15.3.4 Signals
PID-3485-INPUTSIGNALS v8

Table 532: VDSPVC Input signals

Name Type Default Description

U3P1 GROUP - Main fuse voltage
SIGNAL
U3P2 GROUP - Pilot fuse voltage
SIGNAL
BLOCK BOOLEAN 0 Block of function

PID-3485-OUTPUTSIGNALS v8

Table 533: VDSPVC Output signals

Name Type Description

MAINFUF BOOLEAN Block of main fuse failure
PILOTFUF BOOLEAN Alarm of pilot fuse failure
U1L1FAIL BOOLEAN Fuse failure of Main fuse group phase L1
U1L2FAIL BOOLEAN Fuse failure of Main fuse group phase L2
U1L3FAIL BOOLEAN Fuse failure of Main fuse group phase L3
U2L1FAIL BOOLEAN Fuse failure of Pilot fuse group phase L1
U2L2FAIL BOOLEAN Fuse failure of Pilot fuse group phase L2
U2L3FAIL BOOLEAN Fuse failure of Pilot fuse group phase L3

15.3.5 Settings
PID-3485-SETTINGS v8

Table 534: VDSPVC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Mode Off / On
On
Ud>MainBlock 10.0 - 80.0 %UB 0.1 20.0 Blocking picked up voltage level in % of
UBase when main fuse fails
Ud>PilotAlarm 10.0 - 80.0 %UB 0.1 30.0 Alarm picked up voltage level in % of
UBase when pilot fuse fails
SealIn Off - - On Seal in functionality Off/On
On
USealIn 0.0 - 100.0 %UB 0.1 70.0 Operate level of seal-in voltage in % of
UBase

844 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

Table 535: VDSPVC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 536: VDSPVC Non group settings (advanced)

Name Values (Range) Unit Step Default Description

ConTypeMain Ph-N - - Ph-N Selection of connection type for main
Ph-Ph fuse group
ConTypePilot Ph-N - - Ph-N Selection of connection type for pilot
Ph-Ph fuse group

15.3.6 Monitored data

PID-3485-MONITOREDDATA v7

Table 537: VDSPVC Monitored data

Name Type Values (Range) Unit Description

UL1DIF_A REAL - kV Differential voltage phase L1 for alarm
functionality
UL2DIF_A REAL - kV Differential voltage phase L2 for alarm
functionality
UL3DIF_A REAL - kV Differential voltage phase L3 for alarm
functionality
UL1DIF_B REAL - kV Differential voltage phase L1 for block
functionality
UL2DIF_B REAL - kV Differential voltage phase L2 for block
functionality
UL3DIF_B REAL - kV Differential voltage phase L3 for block
functionality

15.3.7 Operation principle GUID-06BC0CC0-8A4F-4D84-A0B1-506E433F72F3 v4

VDSPVC requires six voltage inputs, which are the three phase voltages on main and pilot fuse
groups. The initial voltage difference between the two groups is theoretical zero in the healthy
condition. Any subsequent voltage difference will be due to a fuse failure.

If the main fuse voltage becomes smaller than the pilot fuse voltage (vMainL1 < vPilotL1 or vMainL2
< vPilotL2 or vMainL3 < vPilotL3) and the voltage difference exceeds the operation level
(Ud>MainBlock), a blocking signal will be initiated to indicate the main fuse failure and block the
voltage-dependent functions. In addition, the function also indicates the phase in which the voltage
reduction has occurred.

If the pilot fuse voltage becomes smaller than the main fuse voltage (vPilotL1 < vMainL1 or vPilotL2
< vMainL2 or vPilotL3 < vMainL3) and the voltage difference exceeds the operation level
(Ud>PilotAlarm), an alarm signal will be initiated to indicate the pilot fuse failure and also the faulty
phase where the voltage reduction occurred.

When SealIn is set to On and the fuse failure has last for more than 5 seconds, the blocked
protection functions will remain blocked until normal voltage conditions are restored above the
USealIn setting. Fuse failure outputs are deactivated when normal voltage conditions are restored.

Transformer protection RET670 845

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

5s
a
a<b AND OR t
USealIn b

SealIn=0

vPilotL1
+
vMainL1 -
å MAX a U1L1FAIL
OR
a>b AND
Ud>MainBlock b MAINFAIL
OR
0

MIN ABS a
a>b AND U2L1FAIL
Ud> PilotAlarm b
BLOCK
OR PILOTFAIL

vPilotL2 U1L2FAIL
vMainL2 Phase L2, same as Phase L1 U2L2FAIL

vPilotL3 U1L3FAIL
vMainL3 Phase L3, same as Phase L1 U2L3FAIL

IEC12000144-1-en.vsd
IEC12000144 V1 EN-US

Figure 492: Simplified logic diagram VDSPVC

15.3.8 Technical data

GUID-E2EA8017-BB4B-48B0-BEDA-E71FEE353774 v5

Table 538: VDSPVC technical data

Function Range or value Accuracy

Operate value, block of main fuse failure (10.0-80.0)% of UBase ±0.5% of Ur
Reset ratio <110%
Operate time, block of main fuse failure at 1 x Ur to 0 Min. = 5 ms –
Max. = 15 ms
Reset time, block of main fuse failure at 0 to 1 x Ur Min. = 15 ms –
Max. = 30 ms
Operate value, alarm for pilot fuse failure (10.0-80.0)% of UBase ±0.5% of Ur
Reset ratio <110% –
Operate time, alarm for pilot fuse failure at 1 x Ur to 0 Min. = 5 ms –
Max. = 15 ms
Reset time, alarm for pilot fuse failure at 0 to 1 x Ur Min. = 15 ms –
Max. = 30 ms

846 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

15.4 Voltage based delta supervision DELVSPVC GUID-579ED249-B8C9-4755-9E80-28E2BA8E5377 v2

15.4.1 Identification
GUID-C7108931-DECA-4397-BCAF-8BFF3B57B4EF v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Voltage based delta supervision DELVSPVC – 7V_78V

15.4.2 Functionality GUID-6188C4C1-E1D5-421A-B496-96676287EBB2 v2

Delta supervision function is used to quickly detect (sudden) changes in the network. This can, for
example, be used to detect faults in the power system networks and islanding in grid networks.
Voltage based delta supervision (DELVSPVC) is needed at the grid interconnection point.

15.4.3 Function block GUID-06FEC7EF-B37E-4D42-99DA-868453E6FDBF v2

DELVSPVC
U3P* START
BLOCK STARTL1
STARTL2
STARTL3
STRISE
STRISEL1
STRISEL2
STRISEL3
STLOW
STLOWL1
STLOWL2
STLOWL3
DELMAGL1
DELMAGL2
DELMAGL3

IEC18000007‐1‐en.vsdx
IEC18000007 V1 EN-US

Figure 493: DELVSPVC function block

15.4.4 Signals
PID-7097-INPUTSIGNALS v1

Table 539: DELVSPVC Input signals

Name Type Default Description

U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function

PID-7097-OUTPUTSIGNALS v1

Table 540: DELVSPVC Output signals

Name Type Description

START BOOLEAN General start of function
STARTL1 BOOLEAN Start of L1
STARTL2 BOOLEAN Start of L2
STARTL3 BOOLEAN Start of L3
STRISE BOOLEAN Common rise signal when input has increased
Table continues on next page

Transformer protection RET670 847

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

Name Type Description

STRISEL1 BOOLEAN L1/L12 delta value increased
STRISEL2 BOOLEAN L2/L23 delta value increased
STRISEL3 BOOLEAN L3/L31 delta value increased
STLOW BOOLEAN Common low signal when input has decreased
STLOWL1 BOOLEAN L1/L12 delta value decreased
STLOWL2 BOOLEAN L2/L23 delta value decreased
STLOWL3 BOOLEAN L3/L31 delta value decreased
DELMAGL1 REAL Delta magnitude of L1 / L12
DELMAGL2 REAL Delta magnitude of L2 / L23
DELMAGL3 REAL Delta magnitude of L3 / L31

15.4.5 Settings
PID-7097-SETTINGS v1

Table 541: DELVSPVC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups
OpMode Instantaneous 1 - - DFT mag Operation mode
cycle
Instantaneous 2
cycle
RMS
DFT mag
DFT Angle (Vector
shift)
MeasMode Phase to phase - - Phase to ground Measurement type: Phase to ground /
Phase to ground Phase to phase

Table 542: DELVSPVC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
UMin 1.0 - 50.0 %UB 0.1 5.0 Minimum start value of voltage for
release of delta function
DeltaT 1 - 10 cycle 1 2 Number of old power cycles for delta
calculation
DelU> 2.0 - 500.0 %UB 0.1 40.0 Magnitude start level for magnitude,
RMS and sample based delta
comparison
DelUAng> 2.0 - 40.0 Deg 1.0 8.0 Start level for angle based delta
detection
tHold 0.10 - 60.00 s 0.01 0.10 Hold time for start signal

848 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

15.4.6 Monitored data

PID-7097-MONITOREDDATA v1

Table 543: DELVSPVC Monitored data

Name Type Values (Range) Unit Description

UL1 REAL - kV RMS magnitude of L1 /L12
UL2 REAL - kV RMS magnitude of L2 /L23
UL3 REAL - kV RMS magnitude of L3 /L31

15.4.7 Operation principle GUID-7F65AD13-1F0E-402A-8B9C-3B1D6ED0D2BB v3

The delta supervision function DELVSPVC is a phase segregated function with the following
features.

• Check of the minimum signal level

• Five different modes of operation
• Frequency stabilization for angle shift

The general design of DELVSPVC is shown in Figure 494:

opMode = Instantaneous 1 cycle/2 cycle

Sample delta  STARTSAMPLE
U3P calculation
opMode = DFTAngle
Frequency 
estimation and  Frequency stabilization STARTANGLE
angle shift based on 2 cycle old 
calculation frequency
1 START
AND

Signal pre‐processing
 
  fundamental DFT
opMode= RMS/DFTMag
  harmonic extraction
 
Magnitude based  STARTMAG
delta calculation DELMAGLx

MinValueCheck AND

BLOCK   
IEC18000008-1-en.vsdx
IEC18000008 V1 EN-US

Figure 494: Simplified logic diagram for voltage based delta supervision DELVSPVC

15.4.7.1 Minimum signal level check GUID-FE5377C8-E4CF-43D3-B1EC-C886E76377A6 v2

The setting Umin is used to check and release the signals for the delta supervision. The delta
detection is blocked for 2 cycles by Umin comparator for angle shift mode.

15.4.7.2 Mode of operation GUID-B4EDA716-DB28-422A-88E3-F41D5D7BB6A4 v3

DELVSPVC can be selected for phase-to-ground or phase-to-phase measurements using the

MeasMode setting. If the setting is selected as phase-to-phase, then outputs with L1 and L2 will
represent L12, L23, and L31 phase-to-phase quantities, respectively. Following are the modes of
operations for the OpMode setting:

• Instantaneous 1 cycle
• Instantaneous 2 cycle
• True RMS
• DFT mag
• Vector Shift

These modes of operation are explained in following sections.

Transformer protection RET670 849

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

15.4.7.3 Instantaneous 1 cycle / 2 cycle GUID-BAF266E2-A0A0-4848-9DFB-776C197B4A7F v2

This method uses the instantaneous samples for delta detection. The logic of this scheme is shown
in Figure 495. The instantaneous difference between the present sample and the one cycle (or two
cycle) old sample is used for the delta detection. The change (delta) is verified for three continuous
samples in order to release the start signal. Once the start signal is set, any subsequent change in
sample values within 60 ms will not be detected. The DELU> setting will be set in % of UB. The
sample based delta is selectable for one cycle/two cycle operation, based on the OpMode setting.

Old value buffer 
Voltage sample input
  1  cycle / 
   2 cycle

‐ Abs
60ms
>
StartSampleDelta
AND t

DelU>
q‐1

q‐1

IEC17000199-2-en.vsdx

IEC17000199 V2 EN-US

Figure 495: Simplified logic diagram for sample based delta detection

15.4.7.4 RMS/DFT based supervision GUID-B299BE6C-AD89-4DFE-AFFC-E3DD252A260A v2

This mode uses the RMS or DFT magnitude value of the voltage signal for the delta detection. The
logic of this scheme is given in Figure 496. Difference between the present value and the old value is
used for the delta detection. The old value is chosen based on the setting DeltaT, which is defined as
the number of old power cycles.

The function has an execution cycle time of 3 ms. For a DeltaT setting of 3, the old
value is 60 ms. Therefore, accuracy of the old cycle data depends upon the
execution cycle.

The output of the comarator is ascertained for half a cycle before releasing a STARTMAG signal. In
DELVSPVC, the DelU> setting is set in % of UB. RMS based delta will have poor accuracy if the
signal contains harmonics and other frequency components. DFT Mag based delta will operate better
in these conditions.

Additional information for the STARTRISE and STARTLOW outputs of the delta are also available in
this mode. The STARTRISE and STARTLOW outputs will be sealed by the start signal. These
outputs explains the reason for the STARTMAG signal.

Seal‐in  STARTLOW
logic

0.1
>

RMS input / Seal‐in  STARTRISE

> logic
DFT mag Delay defined by  ‐0.1
DeltaT
0. 3 cycle
‐ Abs
> t
DelU>

IEC17000200-2-en.vdsx

IEC17000200 V2 EN-US

Figure 496: Simplified logic diagram for RMS/DFT based delta detection

850 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

15.4.7.5 Angle based supervision or vector shift supervision GUID-26960EA3-233A-4B76-8C11-245334012C76 v3

The Vector shift selection in the OpMode setting is used to set the DELVSPVC function to operate. A
change in magnitude will not have any impact on this supervision. Angle shift is measured based on
the half cycle time (HCTime) as shown in Figure 497. The figure shows a waveform shift of 40
degree in the voltage waveform. There are two half cycle times which are affected by this angle shift
namely, HCTime(k-1) and HCTime(k). A cumulative difference of two HCTime difference is calculated
to get an accurate estimate of the angle shift. This angle shift is compared with DelUang> setting to
release the STARTANGLE signal.

The logic for this mode is given in Figure 498. The DelUAng> setting will be set in absolute degrees.

Voltage

Angle shift= [{Hctime(k) ‐ Hctime(k‐2)} + {Hctime(k‐1) ‐ Hctime(k‐3)}]

Angle shift

HC time (k‐3) HC time (k‐2) HC time (k‐1) HC time (k)

Time

IEC17000210-1-en.vsdx
IEC17000210 V1 EN-US

Figure 497: Angle shift

Angle measurement is affected by system parameters such as frequency, load or generation. Hence,
a stabilization of the angle is also present in this mode of operation. The measured frequency is
compared with the 2 cycles old value. If the change is greater than 0.2 Hz, the STARTANGLE signal
is blocked. The output will release Angle shift mode when the measured frequency difference is
continuously less than 0.2 Hz for 2 cycles. The general logic is presented in Figure 498. In this mode
STLOW, STRISE, STLOWLx and STRISELx outputs will not be used and set as FALSE.

ULx Angle shift 
calculation
0.5 cycle
Abs Delta Angle
> t

DelUang> STARTANGLE
Frequency difference of last 2 cycles AND
> AND
0.2 Hz

IEC18000902-1-en.vsdx

IEC18000902 V1 EN-US

Figure 498: Simplified logic diagram for angle based delta detection

Transformer protection RET670 851

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

15.4.8 Technical data

GUID-DAECF9F5-1D0B-43FC-AD29-8F96E05DD0DA v4

Table 544: DELVSPVC technical data

Function Range or value Accuracy

Minimum Voltage (5.0 - 50.0)% of UBase ±0.5% of Ur at U ≤ Ur
DelU> (2.0 - 500.0)% of UBase Instantaneous 1 cycle &
Instantaneous 2 cycle mode:
±20% of Ur at U ≤ Ur±20% of U
at U > Ur
RMS & DFT Mag mode:±10% of
Ur at U ≤ Ur±10% of U at U > Ur
DelUAng> (2.0 - 40.0) degrees ±2.0 degrees
Operate time for changeat Ur to (Ur + 2 x DelU>)at Instantaneous 1 cycle &
Ur to (Ur + 5 x DelU>) Instantaneous 2 cycle mode -
<20msRMS & DFT Mag mode -
<30ms
Operate time for jump from Zero degrees to Vector shift mode - <60ms
'AngStVal' + 2 degrees

15.5 Current based delta supervision DELISPVC GUID-4F012876-FA0A-4A97-9E23-387974304CED v2

15.5.1 Identification
GUID-0B735A27-6A7D-40E1-B981-91B689608495 v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Current based delta supervision DELISPVC – 7I < >

15.5.2 Functionality GUID-30A00AE0-8D3A-4CE8-9379-8D1A0A6078E3 v2

Delta supervision function is used to quickly detect (sudden) changes in the network. This can, for
example, be used to detect disturbances in the power system network. Current based delta
supervision (DELISPVC) provides selectivity between load change and the fault.

Present power system has many power electronic devices or FACTS devices, which injects a large
number of harmonics into the system. The function has additional features of 2nd harmonic blocking
and 3rd harmonic start level adaption. The 2nd harmonic blocking secures the operation during the
transformer charging, when high inrush currents are supplied into the system.

852 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

15.5.3 Function block GUID-D1467592-DD2D-488F-94CA-66BD0FA57A8D v2

DELISPVC
I3P* START
BLOCK STARTL1
STARTL2
STARTL3
STRISE
STRISEL1
STRISEL2
STRISEL3
STLOW
STLOWL1
STLOWL2
STLOWL3
ADAPTVAL
HARM2BLK
DELMAGL1
DELMAGL2
DELMAGL3
IEC18000005-1-en.vsdx
IEC18000005 V1 EN-US

Figure 499: DELISPVC function block

15.5.4 Signals
PID-7098-INPUTSIGNALS v1

Table 545: DELISPVC Input signals

Name Type Default Description

I3P GROUP - Group signal for current input
SIGNAL
BLOCK BOOLEAN 0 Block of function

PID-7098-OUTPUTSIGNALS v1

Table 546: DELISPVC Output signals

Name Type Description

START BOOLEAN General start of function
STARTL1 BOOLEAN Start of L1
STARTL2 BOOLEAN Start of L2
STARTL3 BOOLEAN Start of L3
STRISE BOOLEAN Common rise signal when input has increased
STRISEL1 BOOLEAN L1/L12 delta value increased
STRISEL2 BOOLEAN L2/L23 delta value increased
STRISEL3 BOOLEAN L3/L31 delta value increased
STLOW BOOLEAN Common low signal when input has decreased
STLOWL1 BOOLEAN L1/L12 delta value decreased
STLOWL2 BOOLEAN L2/L23 delta value decreased
STLOWL3 BOOLEAN L3/L31 delta value decreased
ADAPTVAL BOOLEAN Delta start level changed by 3rd harmonic
HARM2BLK BOOLEAN 2nd harmonic blocking active
DELMAGL1 REAL Delta magnitude of L1 / L12
DELMAGL2 REAL Delta magnitude of L2 / L23
DELMAGL3 REAL Delta magnitude of L3 / L31

Transformer protection RET670 853

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

15.5.5 Settings
PID-7098-SETTINGS v1

Table 547: DELISPVC Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups
OpMode Instantaneous 1 - - DFT mag Operation mode
cycle
Instantaneous 2
cycle
RMS
DFT mag
MeasMode Phase to phase - - Phase to ground Measurement type: Phase to ground /
Phase to ground Phase to phase

Table 548: DELISPVC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
IMin 1.0 - 50.0 %IB 0.1 10.0 Minimum current start value for release
of delta function
DeltaT 1 - 10 cycle 1 2 Number of old power cycles for delta
calculation
DelI> 2.0 - 500.0 %IB 0.1 40.0 Magnitude start level for magnitude,
RMS and sample based delta
comparison
tHold 0.10 - 60.00 s 0.01 0.10 Hold time for start signal
EnaHarm2Blk Off - - Off Enable 2nd harmonic blocking
On
HarmBlkLevel 5.0 - 100.0 % 0.1 15.0 Harmonic blocking level for 2nd
harmonic in % of fundamental
EnStValAdap Off - - Off Enable set level setting adaption based
On on 3rd harmonic
Harm3Level 5.0 - 100.0 % 0.1 15.0 3rd Harmonic level in % of fundamental
for enabling adaptive start value
StValGrad -90.00 - 500.00 % 0.10 -10.00 Gradient for adapting magnitude set
level during 3rd harmonic in % of DelI>

15.5.6 Monitored data

PID-7098-MONITOREDDATA v1

Table 549: DELISPVC Monitored data

Name Type Values (Range) Unit Description

IL1 REAL - A RMS magnitude of L1 /L12
IL2 REAL - A RMS magnitude of L2 /L23
IL3 REAL - A RMS magnitude of L3 /L31

15.5.7 Operation principle GUID-27E7C6C8-83B1-4CA6-9B4E-38FDED3FD360 v2

The delta supervision function is a phase segregated function. Following are the features of
DELISPVC:

854 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

• Check of the minimum signal level

• Four different modes of operation
• 2nd harmonic blocking of delta function
• 3rd harmonic based adaption of starting value

The general design of DELISPVC is shown in Figure 500:

opMode = Instantaneous 1 cycle/2 cycle

I3P Sample delta  STARTSAMPLE
calculation
1 AND START

Signal pre‐processing
 
  fundamental DFT
opMode= RMS/DFTMag
  harmonic extraction
 
Magnitude based  STARTMAG
delta calculation DELMAGLx
DFTMagToComp
rd
3 harmonic based 
  ADAPTVAL
adaption nd HARM2BLK
2  harmonic 
blocking
AND
MinValueCheck

BLOCK   
IEC18000006-1-en.vsdx
IEC18000006 V1 EN-US

Figure 500: Simplified logic diagram for current based delta supervision DELISPVC

15.5.7.1 Minimum signal level check GUID-5E5503ED-1A61-4927-86F0-6ABDC7E2AA2B v3

The setting Imin is used to check and release the signals for the delta supervision. This setting can
be used to obtain selectivity between load current and fault current.

15.5.7.2 Mode of operation GUID-2B87BAB6-A0D4-4A3D-8116-88F1598C1AC6 v2

DELISPVC can be selected for phase-to-ground or phase-to-phase measurements using the

MeasMode setting. If the setting is selected as phase-to-phase, then outputs with L1 will represent
L12 phase-to-phase quantities and so on. Following are the modes of operations for the OpMode
setting:

• Instantaneous 1 cycle
• Instantaneous 2 cycle
• True RMS
• DFT mag

These modes of operation are explained in following sections.

15.5.7.3 Instantaneous 1 cycle / 2 cycle GUID-4FD743D6-DB93-4C76-819D-E81C562B762A v2

This method uses the buffer of instantaneous sample for delta detection. The logic of this scheme is
given in Figure 501. The instantaneous difference between the present sample and the one cycle (or
two cycle) old sample is used for the delta detection. The change (vectorial delta) is verified for three
continuous samples in order to release the start signal. This delta calculation is affected by angle or
magnitude or both changes in the signal in the last one cycle/two cycle. It is also known as vectorial
delta scheme. Once the start signal is set, any subsequent change in sample values within 60 ms will
not be detected. The DelI> setting will be set in % of IB. The sample based delta is selectable for one
cycle/two cycle operation, based on the OpMode setting.

Transformer protection RET670 855

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

Old value buffer 
Current Samples   1  cycle / 
   2 cycle

‐
60ms
Abs
> AND
StartSampleDelta
t

DelI>
q‐1

q‐1

IEC17000191-2-en.vsdx

IEC17000191 V2 EN-US

Figure 501: Simplified logic diagram for sample based delta detection

15.5.7.4 RMS/DFT based supervision GUID-427A82EF-1BB6-45C5-BAEB-2DF50A9D99BD v2

This mode uses the RMS or DFT magnitude value of the current signal for the delta detection. The
logic of this scheme is given in Figure 502. Difference between the present value and the old value is
used for the delta detection. The old value is chosen based on the setting DeltaT, which is defined as
the number of old power cycles.

The function has an execution cycle of 3 ms. For a DeltaT setting of 3, the old value
is 60 ms. Therefore, accuracy of the old cycle data depends upon the execution
cycle.

The output of the comparator is ascertained for half a cycle before releasing a STARTMAG signal. In
DELISPVC, the DelI> setting is set in % of IB.

Additional information for the STARTRISE and STARTLOW outputs of the delta are also available in
this mode. The STARTRISE and STARTLOW outputs will be sealed by the start signal. These
outputs explains the reason for the STARTMAG signal.

Seal‐in  STARTLOW
logic

0.1
>

Seal‐in  STARTRISE
> logic
RMS Input Delay defined by  ‐0.1
DeltaT
0. 5 cycle
‐ Abs STARTMAG
> t
DelI>

IEC17000192-2-en.vsdx

IEC17000192 V2 EN-US

Figure 502: Simplified logic diagram for RMS based delta detection

15.5.7.5 2nd Harmonic blocking GUID-BE749AFA-992C-44A6-8C12-12BA4D1AA674 v2

Presence of the harmonics is another reason for maloperation of the delta based protection. The 2nd
harmonic blocking is an additional security feature in this function. It can be enabled by the
EnaHarm2Blk setting. If the ratio of 2nd harmonic frequency signal magnitude to the fundamental
frequency magnitude is greater than the set level harmBlkLev, then this feature will block the start
signal of the delta protection. The logic for this functionality is shown in Figure 503. The tON of 1.25
cycle is added to ensure a reliable harmonic blocking. The tOFF of 2 cycles is added to block the
operation during any sudden increase in the current load.

856 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

EnaHarm2Blk
2 cycles
t HARM2BLK
DFTInput‐2ndHarm AND
< 1.25 cycle
t
DFTInput ‐ fundamental
X
HarmBlkLev
IEC17000194-2-en.vsdx

IEC17000194 V2 EN-US

Figure 503: Simplified logic diagram for 2nd harmonic blocking logic

15.5.7.6 3rd Harmonic based adaption GUID-02A00917-EAB6-47F9-8375-643F76AA0D2B v2

Present days power system network has high amount of the 3rd harmonics presence due to heavy
power electronic devices. In such case, many networks modify the settings based on the 3rd
harmonic present in the system. Delta supervision can be adapted based on the 3rd harmonic
present in the signal. When OpMode is set to DFTMag and EnStValAdap is set to is Enable, then the
setting DelI> will change based on the StValGrad setting if the third harmonic is greater than the set
level defined by the Harm3Level setting. The logic for this functionality is shown in Figure 504.

 DelI  New  DelI 1  StValGrad 

DeltaMode = DFTMag

EnStValAdap = Enable/Disable
2 cycle
t ADAPTSTLEV
rd
DFTInput ‐ 3  Harmonics AND
< 1.25 cycle
DFTInput ‐ fundamental t
X
Harm3Lev
StValGrad X T DeltaMagToComp
F
DelI>

IEC17000195-2-en.vsdx
IEC17000195 V2 EN-US

Figure 504: Simplified logic diagram for 3rd harmonic restrain of MagStVal setting
Since this mode is adaptably changing the setting, the tOFF time is mandatory to ensure the reliable
operation during any sudden change.

Transformer protection RET670 857

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

15.5.8 Technical data

GUID-ED3FE722-1F29-4340-94E9-6C907C4474F2 v3

Table 550: DELISPVC technical data

Function Range or value Accuracy

Minimum current (5.0 - 50.0)% of IBase ±1.0% of Ir at I ≤ Ir±1.0% of I at I
> Ir
DelI> (10.0 - 500.0)% of IBase Instantaneous 1 cycle &
Instantaneous 2 cycle mode:
±20% of Ir at I ≤ Ir±20% of I at I
> Ir
RMS & DFT Mag mode:
±10% of Ir at I ≤ Ir±10% of I at I
> Ir
Second harmonic blocking (5.0 - 100.0)% of ±2.0% of Ir
fundamental
Third harmonic restraining (5.0 - 100.0)% of ±2.0% of Ir
fundamental
Operate time for changeat Ir to (Ir + 2 x DelI>)at Ir to Instantaneous 1 cycle &
(Ir + 5 x DelI>) Instantaneous 2 cycle mode -
<20ms
RMS & DFT Mag mode - <30ms

15.6 Delta supervision of real input DELSPVC GUID-470F7470-F3D1-46BC-B0EA-CD180FBA0AB2 v1

15.6.1 Identification
GUID-66CFBA71-B3A4-489F-B7F4-F1909B75E1DD v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Delta supervision of real input DELSPVC – –

15.6.2 Functionality GUID-8FAD2CCF-091F-4CDB-8ABF-1BDC874A8403 v2

Delta supervision functions are used to quickly detect (sudden) changes in the power system. Real
input delta supervision (DELSPVC) function is a general delta function. It is used to detect the
change measured qualities over a settable time period, such as:

• Power
• Reactive power
• Temperature
• Frequency
• Power factor

15.6.3 Function block GUID-1472A816-E653-4828-8F03-4B26B93E7EF9 v1

DELSPVC
BLOCK START
INPUT STRISE
STLOW
DELREAL
IEC17000202-1-en.vsdx
IEC17000202 V1 EN-US

Figure 505: DELSPVC function block

858 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 15
Secondary system supervision

15.6.4 Signals
PID-7096-INPUTSIGNALS v1

Table 551: DELSPVC Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
INPUT REAL 0 Real Input

PID-7096-OUTPUTSIGNALS v1

Table 552: DELSPVC Output signals

Name Type Description

START BOOLEAN Start of function
STRISE BOOLEAN Rise signal when input has increased
STLOW BOOLEAN Low signal when input has decreased
DELREAL REAL Delta value of real input

15.6.5 Settings
PID-7096-SETTINGS v1

Table 553: DELSPVC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
MinStVal 0.1 - 99999.9 - 0.1 1.0 Minimum start value for release of delta
function
DeltaT 6 - 100 cycle 1 10 Number of old execution cycle for delta
calculation
DelSt> 0.1 - 9999999.9 - 0.1 10.0 Delta start level for real input
tHold 0.10 - 60.00 s 0.01 0.10 Hold time for start signal

15.6.6 Operation principle GUID-CA9B38EB-26E4-4286-8517-C5ECDA730236 v1

Delta supervision of real input DELSPVC is a general delta function with the following features:

• Check of the minimum signal level

• Detect an increase or decrease of the measured value

The general design of DELSPVC is shown in Figure 506.

Transformer protection RET670 859

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 15 1MRK 504 164-UEN Rev. N
Secondary system supervision

Seal‐in  STARTLOW
Logic

>
0.1
Seal‐in  STARTRISE
Logic
REALIN Delay defined by  >
‐0.1
DeltaT
0. 5 cycle
‐ Abs
> t
DelStLevel
tHold
& t
>
MinStVal

IEC17000203-1-en.vsdx
IEC17000203 V1 EN-US

Figure 506: Simplified logic diagram for DELSPVC

The setting MinStVal is used to check and release the signals for the delta supervision. In its initial
condition, during the first time a real value signal is detected (ascertained by the MinStVal
comparator), the delta detection is blocked for operation for the next 11 cycles. These 11 cycles are
used to block any unwanted operation during the initialization of the function.

The outputs STARTRISE and STARTLOW are released based on the difference (respectively above
and below) from the old value at the instant when the START signal is released.

860 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Section 16 Control
16.1 Synchrocheck, energizing check, and synchronizing
SESRSYN IP14558-1 v4

16.1.1 Identification
M14889-1 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Synchrocheck, energizing check, and SESRSYN 25
synchronizing
sc/vc

SYMBOL-M V1 EN-US

16.1.2 Functionality M12480-3 v16

The Synchronizing function allows closing of asynchronous networks at the correct moment including
the breaker closing time, which improves the network stability.

Synchrocheck, energizing check, and synchronizing (SESRSYN) function checks that the voltages
on both sides of the circuit breaker are in synchronism, or with at least one side dead to ensure that
closing can be done safely.

SESRSYN function includes a built-in voltage selection scheme for double bus and 1½ breaker or
ring busbar arrangements.

Manual closing as well as automatic reclosing can be checked by the function and can have different
settings.

For systems, which can run asynchronously, a synchronizing feature is also provided. The main
purpose of the synchronizing feature is to provide controlled closing of circuit breakers when two
asynchronous systems are in phase and can be connected. The synchronizing feature evaluates
voltage difference, phase angle difference, slip frequency and frequency rate of change before
issuing a controlled closing of the circuit breaker. Breaker closing time is a setting.

Transformer protection RET670 861

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.1.3 Function block M12431-3 v7

SESRSYN
U3PBB1* SYNOK
U3PBB2* AUTOSYOK
U3PLN1* AUTOENOK
U3PLN2* MANSYOK
BLOCK MANENOK
BLKSYNCH TSTSYNOK
BLKSC TSTAUTSY
BLKENERG TSTMANSY
B1QOPEN TSTENOK
B1QCLD USELFAIL
B2QOPEN B1SEL
B2QCLD B2SEL
LN1QOPEN LN1SEL
LN1QCLD LN2SEL
LN2QOPEN SYNPROGR
LN2QCLD SYNFAIL
UB1OK UOKSYN
UB1FF UDIFFSYN
UB2OK FRDIFSYN
UB2FF FRDIFFOK
ULN1OK FRDERIVA
ULN1FF UOKSC
ULN2OK UDIFFSC
ULN2FF FRDIFFA
STARTSYN PHDIFFA
TSTSYNCH FRDIFFM
TSTSC PHDIFFM
TSTENERG INADVCLS
AENMODE UDIFFME
MENMODE FRDIFFME
PHDIFFME
UBUS
ULINE
MODEAEN
MODEMEN

IEC10000046-1-en.vsd
IEC10000046 V1 EN-US

Figure 507: SESRSYN function block

16.1.4 Signals
PID-6724-INPUTSIGNALS v1

Table 554: SESRSYN Input signals

Name Type Default Description

U3PBB1 GROUP - Group signal for phase to earth voltage input L1, busbar 1
SIGNAL
U3PBB2 GROUP - Group signal for phase to earth voltage input L1, busbar 2
SIGNAL
U3PLN1 GROUP - Group signal for phase to earth voltage input L1, line 1
SIGNAL
U3PLN2 GROUP - Group signal for phase to earth voltage input L1, line 2
SIGNAL
BLOCK BOOLEAN 0 General block
BLKSYNCH BOOLEAN 0 Block synchronizing
BLKSC BOOLEAN 0 Block synchro check
BLKENERG BOOLEAN 0 Block energizing check
B1QOPEN BOOLEAN 0 Open status for CB or disconnector connected to bus1
B1QCLD BOOLEAN 0 Close status for CB or disconnector connected to bus1
B2QOPEN BOOLEAN 0 Open status for CB or disconnector connected to bus2
Table continues on next page

862 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Name Type Default Description

B2QCLD BOOLEAN 0 Close status for CB or disconnector connected to bus2
LN1QOPEN BOOLEAN 0 Open status for CB or disconnector connected to line1
LN1QCLD BOOLEAN 0 Close status for CB or disconnector connected to line1
LN2QOPEN BOOLEAN 0 Open status for CB or disconnector connected to line2
LN2QCLD BOOLEAN 0 Close status for CB or disconnector connected to line2
UB1OK BOOLEAN 0 Bus1 voltage transformer OK
UB1FF BOOLEAN 0 Bus1 voltage transformer fuse failure
UB2OK BOOLEAN 0 Bus2 voltage transformer OK
UB2FF BOOLEAN 0 Bus2 voltage transformer fuse failure
ULN1OK BOOLEAN 0 Line1 voltage transformer OK
ULN1FF BOOLEAN 0 Line1 voltage transformer fuse failure
ULN2OK BOOLEAN 0 Line2 voltage transformer OK
ULN2FF BOOLEAN 0 Line2 voltage transformer fuse failure
STARTSYN BOOLEAN 0 Start synchronizing
TSTSYNCH BOOLEAN 0 Set synchronizing in test mode
TSTSC BOOLEAN 0 Set synchro check in test mode
TSTENERG BOOLEAN 0 Set energizing check in test mode
AENMODE INTEGER 0 Input for setting of automatic energizing mode
MENMODE INTEGER 0 Input for setting of manual energizing mode

PID-6724-OUTPUTSIGNALS v1

Table 555: SESRSYN Output signals

Name Type Description

SYNOK BOOLEAN Synchronizing OK output
AUTOSYOK BOOLEAN Auto synchro check OK
AUTOENOK BOOLEAN Automatic energizing check OK
MANSYOK BOOLEAN Manual synchro check OK
MANENOK BOOLEAN Manual energizing check OK
TSTSYNOK BOOLEAN Synchronizing OK test output
TSTAUTSY BOOLEAN Auto synchro check OK test output
TSTMANSY BOOLEAN Manual synchro check OK test output
TSTENOK BOOLEAN Energizing check OK test output
USELFAIL BOOLEAN Selected voltage transformer fuse failed
B1SEL BOOLEAN Bus1 selected
B2SEL BOOLEAN Bus2 selected
LN1SEL BOOLEAN Line1 selected
LN2SEL BOOLEAN Line2 selected
SYNPROGR BOOLEAN Synchronizing in progress
SYNFAIL BOOLEAN Synchronizing failed
UOKSYN BOOLEAN Voltage amplitudes for synchronizing above set limits
UDIFFSYN BOOLEAN Voltage difference out of limit for synchronizing
FRDIFSYN BOOLEAN Frequency difference out of limit for synchronizing
Table continues on next page

Transformer protection RET670 863

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Name Type Description

FRDIFFOK BOOLEAN Frequency difference in band for synchronizing
FRDERIVA BOOLEAN Frequency derivative out of limit for synchronizing
UOKSC BOOLEAN Voltage amplitudes above set limits
UDIFFSC BOOLEAN Voltage difference out of limit
FRDIFFA BOOLEAN Frequency difference out of limit for Auto operation
PHDIFFA BOOLEAN Phase angle difference out of limit for Auto operation
FRDIFFM BOOLEAN Frequency difference out of limit for Manual operation
PHDIFFM BOOLEAN Phase angle difference out of limit for Manual Operation
INADVCLS BOOLEAN Inadvertent circuit breaker closing
UDIFFME REAL Calculated difference of voltage in p.u of set voltage base value
FRDIFFME REAL Calculated difference of frequency
PHDIFFME REAL Calculated difference of phase angle
UBUS REAL Bus voltage
ULINE REAL Line voltage
MODEAEN INTEGER Selected mode for automatic energizing
MODEMEN INTEGER Selected mode for manual energizing

16.1.5 Settings
PID-6724-SETTINGS v2

Table 556: SESRSYN Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
OperationSynch Off - - Off Operation for synchronizing function
On Off/On
UHighBusSynch 50.0 - 120.0 %UBB 1.0 80.0 Voltage high limit bus for synchronizing
in % of UBaseBus
UHighLineSynch 50.0 - 120.0 %UBL 1.0 80.0 Voltage high limit line for synchronizing
in % of UBaseLine
UDiffSynch 0.02 - 0.50 pu 0.01 0.10 Voltage difference limit for synchronizing
in p.u of set voltage base value
FreqDiffMin 0.003 - 0.250 Hz 0.001 0.010 Minimum frequency difference limit for
synchronizing
FreqDiffMax 0.050 - 1.000 Hz 0.001 0.200 Maximum frequency difference limit for
synchronizing
CloseAngleMax 15.0 - 30.0 Deg 1.0 15.0 Maximum closing angle between bus
and line for synchronizing
FreqRateChange 0.000 - 0.500 Hz/s 0.001 0.300 Maximum allowed frequency rate of
change
tBreaker 0.000 - 1.000 s 0.001 0.080 Closing time of the breaker
tClosePulse 0.050 - 60.000 s 0.001 0.200 Breaker closing pulse duration
tMaxSynch 0.00 - 6000.00 s 0.01 600.00 Resets synch if no close has been made
before set time
tMinSynch 0.000 - 60.000 s 0.001 2.000 Minimum time to accept synchronizing
conditions
Table continues on next page

864 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Name Values (Range) Unit Step Default Description

OperationSC Off - - On Operation for synchronism check
On function Off/On
UHighBusSC 50.0 - 120.0 %UBB 1.0 80.0 Voltage high limit bus for synchrocheck
in % of UBaseBus
UHighLineSC 50.0 - 120.0 %UBL 1.0 80.0 Voltage high limit line for synchrocheck
in % of UBaseLine
UDiffSC 0.02 - 0.50 pu 0.01 0.15 Voltage difference limit for synchrocheck
in p.u of set voltage base value
FreqDiffA 0.003 - 1.000 Hz 0.001 0.010 Frequency difference limit between bus
and line Auto
FreqDiffM 0.003 - 1.000 Hz 0.001 0.010 Frequency difference limit between bus
and line Manual
PhaseDiffA 5.0 - 90.0 Deg 1.0 25.0 Phase angle difference limit between bus
and line Auto
PhaseDiffM 5.0 - 90.0 Deg 1.0 25.0 Phase angle difference limit between bus
and line Manual
tSCA 0.000 - 60.000 s 0.001 0.100 Time delay output for synchrocheck Auto
tSCM 0.000 - 60.000 s 0.001 0.100 Time delay output for synchrocheck
Manual
AutoEnerg Off - - DLLB Automatic energizing check mode
DLLB
DBLL
Both
ManEnerg Off - - Both Manual energizing check mode
DLLB
DBLL
Both
ManEnergDBDL Off - - Off Manual dead bus, dead line energizing
On
UHighBusEnerg 50.0 - 120.0 %UBB 1.0 80.0 Voltage high limit bus for energizing
check in % of UBaseBus
UHighLineEnerg 50.0 - 120.0 %UBL 1.0 80.0 Voltage high limit line for energizing
check in % of UBaseLine
ULowBusEnerg 10.0 - 80.0 %UBB 1.0 40.0 Voltage low limit bus for energizing
check in % of UBaseBus
ULowLineEnerg 10.0 - 80.0 %UBL 1.0 40.0 Voltage low limit line for energizing
check in % of UBaseLine
UMaxEnerg 50.0 - 180.0 %UB 1.0 115.0 Maximum voltage for energizing in % of
UBase, Line and/or Bus
tAutoEnerg 0.000 - 60.000 s 0.001 0.100 Time delay for automatic energizing
check
tManEnerg 0.000 - 60.000 s 0.001 0.100 Time delay for manual energizing check

Transformer protection RET670 865

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Table 557: SESRSYN Non group settings (basic)

Name Values (Range) Unit Step Default Description

SelPhaseBus1 Phase L1 - - Phase L1 Select phase for busbar1
Phase L2
Phase L3
Phase L1L2
Phase L2L3
Phase L3L1
Positive sequence
GblBaseSelBus 1 - 12 - 1 1 Selection of one of the Global Base
Value groups, Bus
GblBaseSelLine 1 - 12 - 1 1 Selection of one of the Global Base
Value groups, Line
SelPhaseBus2 Phase L1 - - Phase L1 Select phase for busbar2
Phase L2
Phase L3
Phase L1L2
Phase L2L3
Phase L3L1
Positive sequence
SelPhaseLine1 Phase L1 - - Phase L1 Select phase for line1
Phase L2
Phase L3
Phase L1L2
Phase L2L3
Phase L3L1
Positive sequence
SelPhaseLine2 Phase L1 - - Phase L1 Select phase for line2
Phase L2
Phase L3
Phase L1L2
Phase L2L3
Phase L3L1
Positive sequence
CBConfig No voltage sel. - - No voltage sel. Select CB configuration
Double bus
1 1/2 bus CB
1 1/2 bus alt. CB
Tie CB

Table 558: SESRSYN Non group settings (advanced)

Name Values (Range) Unit Step Default Description

PhaseShift -180 - 180 Deg 1 0 Additional phase angle for selected line
voltage

16.1.6 Monitored data

PID-6724-MONITOREDDATA v1

Table 559: SESRSYN Monitored data

Name Type Values (Range) Unit Description

UDIFFME REAL - - Calculated difference of voltage in p.u of
set voltage base value
FRDIFFME REAL - Hz Calculated difference of frequency
PHDIFFME REAL - deg Calculated difference of phase angle
UBUS REAL - kV Bus voltage
ULINE REAL - kV Line voltage

866 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.1.7 Operation principle

16.1.7.1 Basic functionality M14832-3 v9

The synchrocheck feature measures the conditions across the circuit breaker and compares them to
set limits. The output for closing operation is given when all measured quantities are simultaneously
within their set limits.

The energizing check feature measures the bus and line voltages and compares them to both high
and low threshold detectors. The output is given only when the actual measured quantities match the
set conditions.

The synchronizing feature measures the conditions across the circuit breaker, and also determines
the angle change occurring during the closing delay of the circuit breaker, from the measured slip
frequency. The output is given only when all measured conditions are simultaneously within their set
limits. The closing of the output is timed to give closure at the optimal time including the time needed
for the circuit breaker and the closing circuit operation.

The voltage difference, frequency difference and phase angle difference values are measured in the
IED centrally and are available for the SESRSYN function for evaluation. By setting the phases used
for SESRSYN, with the settings SelPhaseBus1, SelPhaseBus2, SelPhaseLine1 and SelPhaseLine2,
a compensation is made automatically for the voltage amplitude difference and the phase angle
difference caused if different setting values are selected for both sides of the breaker. If needed, an
additional phase angle adjustment can be done for selected line voltage with the PhaseShift setting.

Some restrictions when using CBConfig selections 1½ bus CB, 1½ bus alt.CB and
Tie CB are described in Table 561 Such restriction are applicable only when a power
transformer is connected in the diameter and VT used for synchrocheck function is
located on the other side of the transformer.

For double bus single circuit breaker and 1½ circuit breaker arrangements, the SESRSYN function
blocks have the capability to make the necessary voltage selection. For double bus single circuit
breaker arrangements, selection of the correct voltage is made using auxiliary contacts of the bus
disconnectors. For 1½ circuit breaker arrangements, correct voltage selection is made using auxiliary
contacts of the bus disconnectors as well as the circuit breakers.

The internal logic for each function block as well as, the input and outputs, and the setting
parameters with default setting and setting ranges is described in this document. For application
related information, please refer to the application manual.

16.1.7.2 Logic diagrams IP14739-1 v1

M14833-3 v5
The logic diagrams that follow illustrate the main principles of the SESRSYN function components
such as Synchrocheck, Synchronizing, Energizing check and Voltage selection, and are intended to
simplify the understanding of the function.

Synchrocheck M14834-3 v15

When the function is set to OperationSC = On, the measuring will start.

The function will compare the bus and line voltage values with the set values for UHighBusSC and
UHighLineSC.

If both sides are higher than the set values, the measured values are compared with the set values
for acceptable frequency, phase angle and voltage difference: FreqDiffA, FreqDiffM, PhaseDiffA,
PhaseDiffM and U DiffSC. If additional phase angle adjustment is done with the PhaseShift setting,
the adjustment factor is deducted from the line voltage before the comparison of the phase angle
values.

Transformer protection RET670 867

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

The frequency on both sides of the circuit breaker is also measured. The frequencies must not
deviate from the rated frequency more than ±5Hz. The frequency difference between the bus
frequency and the line frequency is measured and may not exceed the set value FreqDiff.

Two sets of settings for frequency difference and phase angle difference are available and used for
the manual closing and autoreclose functions respectively, as required.

The inputs BLOCK and BLKSC are available for total block of the complete SESRSYN function and
selective block of the Synchrocheck function respectively. Input TSTSC will allow testing of the
function where the fulfilled conditions are connected to a separate test output.

The outputs MANSYOK and AUTOSYOK are activated when the actual measured conditions match
the set conditions for the respective output. The output signal can be delayed independently for
MANSYOK and AUTOSYOK conditions.

A number of outputs are available as information about fulfilled checking conditions. UOKSC shows
that the voltages are high, UDIFFSC, FRDIFFA, FRDIFFM, PHDIFFA, PHDIFFM shows when the
voltage difference, frequency difference and phase angle difference are out of limits.

Output INADVCLS, inadvertent circuit breaker closing, indicates that the circuit breaker has been
closed at wrong phase angle by mistake. The output is activated, if the voltage conditions are fulfilled
at the same time the phase angle difference between bus and line is suddenly changed from being
larger than 60 degrees to smaller than 5 degrees.

Note! Similar logic for Manual Synchrocheck.

OperationSC = On
AND TSTAUTSY
AND

invalidSelection AND
OR AUTOSYOK
AND
0-60 s
AND t
tSCA

UDiffSC 50 ms
AND t
UHighBusSC
UOKSC
AND
UHighLineSC
UDIFFSC
1

1
FRDIFFA
FreqDiffA

1
PHDIFFA
PhaseDiffA

UDIFFME
voltageDifferenceValue
FRDIFFME
frequencyDifferenceValue
PHDIFFME
phaseAngleDifferenceValue

32 ms 100 ms
AND t INADVCLS
PhDiff > 60° AND

PhDiff < 5°

IEC07000114-6-en.vsdx

IEC07000114 V6 EN-US

Figure 508: Simplified logic diagram for the auto synchrocheck function

868 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Synchronizing SEMOD171603-4 v12

When the function is set to OperationSynch = On the measuring will be performed.

The function will compare the values for the bus and line voltage with the set values for
UHighBusSynch and UHighLineSynch, which is a supervision that the voltages are both live. Also the
voltage difference is checked to be smaller than the set value for UDiffSynch, which is a p.u value of
set voltage base values. If both sides are higher than the set values and the voltage difference
between bus and line is acceptable, the measured values are compared with the set values for
acceptable frequency FreqDiffMax and FreqDiffMin, rate of change of frequency FreqRateChange
and phase angle CloseAngleMax.

The measured frequencies between the settings for the maximum and minimum frequency will
initiate the measuring and the evaluation of the angle change to allow operation to be sent at the
right moment including the set tBreaker time. The calculation of the operation pulse sent in advance
is using the measured SlipFrequency and the set tBreaker time. To prevent incorrect closing pulses,
a maximum closing angle between bus and line is set with CloseAngleMax. Table 560 below shows
the maximum settable value for tBreaker when CloseAngleMax is set to 15 or 30 degrees, at different
allowed slip frequencies for synchronizing. To minimize the moment stress when synchronizing near
a power station, a narrower limit for CloseAngleMax needs to be used.

Table 560: Dependencies between tBreaker and SlipFrequency with different CloseAngleMax values

tBreaker [s] (max settable value) with tBreaker [s] (max settable value) with SlipFrequency [Hz]
CloseAngleMax = 15 degrees [default CloseAngleMax = 30 degrees [max (BusFrequency -
value] value] LineFrequency)
0.040 0.080 1.000
0.050 0.100 0.800
0.080 0.160 0.500
0.200 0.400 0.200
0.400 0.810 0.100
1.000 0.080
0.800 0.050
1.000 0.040

At operation the SYNOK output will be activated with a pulse tClosePulse and the function resets.
The function will also reset if the synchronizing conditions are not fulfilled within the set tMaxSynch
time. This prevents that the function is, by mistake, maintained in operation for a long time, waiting
for conditions to be fulfilled.

The inputs BLOCK and BLKSYNCH are available for total block of the complete SESRSYN function
and block of the Synchronizing function respectively. TSTSYNCH will allow testing of the function
where the fulfilled conditions are connected to a separate output.

Transformer protection RET670 869

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

OperationSynch=On

TSTSYNCH

STARTSYN

invalidSelection
SYNPROGR
AND
BLOCK AND
S
BLKSYNCH OR
R

UDiffSynch
50 ms SYNOK
AND
UHighBusSynch AND t

UHighLineSynch OR

FreqDiffMax TSTSYNOK
AND
FreqDiffMin

tClosePulse
FreqRateChange
AND

fBus&fLine ± 5Hz
tMaxSynch
CloseAngleMax AND
SYNFAIL

PhaseDiff=Close pulse in advance

FreqDiff
Close pulse
in advance
tBreaker

=IEC06000636=5=en=Original.vsd
IEC06000636 V5 EN-US

Figure 509: Simplified logic diagram for the synchronizing function

Energizing check M14835-3 v12

Voltage values are measured in the IED and are available for evaluation by the Energizing check
function.

The function measures voltages on the busbar and the line to verify whether they are live or dead.
This is done by comparing with the set values UHighBusEnerg and ULowBusEnerg for bus
energizing and UHighLineEnerg and ULowLineEnerg for line energizing.

The frequency on both sides of the circuit breaker is also measured. The frequencies must not
deviate from the rated frequency more than +/-5Hz.

The Energizing direction can be selected individually for the Manual and the Automatic functions
respectively. When the conditions are met the outputs AUTOENOK and MANENOK respectively will
be activated if the fuse supervision conditions are fulfilled. The output signal can be delayed
independently for MANENOK and AUTOENOK conditions. The Energizing direction can also be
selected by an integer input AENMODE respective MENMODE, which for example, can be
connected to a Binary to Integer function block (B16I). Integers supplied shall be 1=Off, 2=DLLB,
3=DBLL and 4= Both. Not connected input will mean that the setting is done from Parameter Setting
tool. The active position can be read on outputs MODEAEN resp MODEMEN. The modes are
0=OFF, 1=DLLB, 2=DBLL and 3=Both.

The inputs BLOCK and BLKENERG are available for total block of the complete SESRSYN function
respective block of the Energizing check function. TSTENERG will allow testing of the function where
the fulfilled conditions are connected to a separate test output.

870 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

manEnergOpenBays
MANENOK
OR

TSTENERG

BLKENERG
OR
BLOCK

selectedFuseOK

UHighBusEnerg
DLLB 50ms tManEnerg
AND
OR t t
AND
OR
ULowLineEnerg AND

ManEnerg BOTH

ULowBusEnerg
DBLL
AND

UHighLineEnerg

TSTENOK
ManEnergDBDL AND AND

UMaxEnerg
fBus and fLine ±5 Hz

IEC14000031-2-en.vsdx

IEC14000031 V2 EN-US

Figure 510: Manual energizing

TSTENERG

BLKENERG
OR
BLOCK

selectedFuseOK

UHighBusEnerg
DLLB 50ms tAutoEnerg
AND
OR t t
AND OR
AUTOENOK
ULowLineEnerg AND
BOTH
AutoEnerg
ULowBusEnerg
DBLL
AND

UHighLineEnerg

TSTENOK
UMaxEnerg AND

fBus and fLine ±5 Hz

IEC14000030-2-en.vsdx
IEC14000030 V2 EN-US

Figure 511: Automatic energizing

Transformer protection RET670 871

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

BLKENERG
BLOCK OR manEnergOpenBays
AND

ManEnerg

1½ bus CB
CBConfig AND

B1QOPEN
LN1QOPEN AND
OR
B1QCLD
B2QOPEN
AND

LN2QOPEN

1½ bus alt. CB AND OR

AND
OR

B2QCLD
AND

Tie CB
AND
AND
OR

AND

IEC14000032-1-en.vsd
IEC14000032 V1 EN-US

Figure 512: Open bays

Fuse failure supervision M14837-3 v11

External fuse failure signals or signals from a tripped fuse switch/MCB are connected to binary inputs
that are configured to the inputs of SESRSYN function in the IED. Alternatively, the internal signals
from fuse failure supervision can be used when available. There are two alternative connection
possibilities. Inputs labelled OK must be connected if the available contact indicates that the voltage
circuit is healthy. Inputs labelled FF must be connected if the available contact indicates that the
voltage circuit is faulty.

The UB1OK/UB2OK and UB1FF/UB2FF inputs are related to the busbar voltage and the ULN1OK/
ULN2OK and ULN1FF/ULN2FF inputs are related to the line voltage. Configure them to the binary
input or function outputs that indicate the status of the external fuse failure of the busbar and line
voltages. In the event of a fuse failure, the energizing check function is blocked. The synchronizing
and the synchrocheck function requires full voltage on both sides, thus no blocking at fuse failure is
needed.

Voltage selection M14836-3 v9

The voltage selection module including supervision of included voltage transformers for the different
arrangements is a basic part of the SESRSYN function and determines the voltages fed to the
Synchronizing, Synchrocheck and Energizing check functions. This includes the selection of the
appropriate Line and Bus voltages and MCB supervision.

The voltage selection type to be used is set with the parameter CBConfig.

If No voltage sel. is set the voltages used will be U-Line1 and U-Bus1. This setting is also used in the
case when external voltage selection is provided. Fuse failure supervision for the used inputs must
also be connected.

The voltage selection function, selected voltages, and fuse conditions are used for the
Synchronizing, Synchrocheck and Energizing check inputs.

872 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

For the disconnector positions it is advisable to use (NO) a and (NC) b type contacts to supply
Disconnector Open and Closed positions but, it is also possible to use an inverter for one of the
positions.

If breaker or disconnector positions not are available for deciding if energizing is allowed, it is
considered to be allowed to manually energize. This is only allowed for manual energizing in 1½
breaker and Tie breaker arrangements. Manual energization of a completely open diameter in 1 1/2
CB switchgear is allowed by internal logic.

Voltage selection for a single circuit breaker with double busbars M14838-3 v10
The setting CBConfig selected for Double Bus activates the voltage selection for single CB and
double busbars. This function uses the binary input from the disconnectors auxiliary contacts
B1QOPEN-B1QCLD for Bus 1, and B2QOPEN-B2QCLD for Bus 2 to select between bus 1 and bus
2 voltages. If the disconnector connected to bus 1 is closed and the disconnector connected to bus 2
is opened the bus 1 voltage is used. All other combinations use the bus 2 voltage. The outputs
B1SEL and B2SEL respectively indicate the selected Bus voltage.

The function checks the fuse failure signals for bus 1, bus 2 and line voltage transformers. Inputs
UB1OK-UB1FF supervise the MCB for Bus 1 and UB2OK-UB2FF supervises the MCB for Bus 2.
ULN1OK and ULN1FF supervises the MCB for the Line voltage transformer. The inputs fail (FF) or
healthy (OK) can alternatively be used dependent on the available signal. If a VT failure is detected
in the selected voltage source an output signal USELFAIL is set. This output signal is true if the
selected bus or line voltages have a VT failure. This output as well as the function can be blocked
with the input signal BLOCK. The function logic diagram is shown in figure 513.

B1QOPEN
B1SEL
B1QCLD AND

B2QOPEN B2SEL
AND
1
B2QCLD
invalidSelection
AND

bus1Voltage busVoltage

bus2Voltage

UB1OK AND
UB1FF OR
OR selectedFuseOK
AND
UB2OK AND
UB2FF OR USELFAIL
AND

ULN1OK
ULN1FF OR

BLOCK

en05000779-2.vsd
IEC05000779 V2 EN-US

Figure 513: Logic diagram for the voltage selection function of a single circuit breaker with double busbars

Transformer protection RET670 873

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Voltage selection for a 1½ circuit breaker arrangement M14839-3 v9

Note that with 1½ breaker schemes three Synchrocheck functions must be used for the complete
diameter. Below, the scheme for one Bus breaker and the Tie breaker is described.

With the setting parameter CBConfig the selection of actual CB location in the 1½ circuit breaker
switchgear is done. The settings are: 1½ bus CB, 1½ alt. bus CB or Tie CB.

This voltage selection function uses the binary inputs from the disconnectors and circuit breakers
auxiliary contacts to select the right voltage for the SESRSYN function. For the bus circuit breaker
one side of the circuit breaker is connected to the busbar and the other side is connected either to
line 1, line 2 or the other busbar depending on the selection of voltage circuit.

Inputs LN1QOPEN-LN1QCLD, B1QOPEN-B1QCLD, B2QOPEN-B2QCLD, LN2QOPEN-LN2QCLD

are inputs for the position of the Line disconnectors respectively the Bus and Tie breakers. The
outputs LN1SEL, LN2SEL and B2SEL will give indication of the selected Line voltage as a reference
to the fixed Bus 1 voltage, which indicates B1SEL.

The fuse supervision is connected to ULN1OK-ULN1FF, ULN2OK-ULN2FF and with alternative

Healthy or Failing fuse signals depending on what is available from each fuse (MCB).

The tie circuit breaker is connected either to bus 1 or line 1 voltage on one side and the other side is
connected either to bus 2 or line 2 voltage. Four different output combinations are possible, bus to
bus, bus to line, line to bus and line to line.

• The line 1 voltage is selected if the line 1 disconnector is closed.

• The bus 1 voltage is selected if the line 1 disconnector is open and the bus 1 circuit breaker is
closed.
• The line 2 voltage is selected if the line 2 disconnector is closed.
• The bus 2 voltage is selected if the line 2 disconnector is open and the bus 2 circuit breaker is
closed.

Some restrictions when using CBConfig selections 1½ bus CB, 1½ bus alt.CB and
Tie CB are described in Table 561. Such restriction are applicable only when a
power transformer is connected in the diameter and VT used for synchrocheck
function is located on the other side of the transformer.

Table 561: Limitations for VT selection regarding selected value for CBConfig

CBConfig setting Possible closing Used GblBaseSel settings PhaseShift setting Conclusion
between has impact on
1½ bus CB Bus1 - Line1 GblBaseSelBus => Bus1 Line1
GblBaseSelLine => Line1
Bus1 - Line2 GblBaseSelBus => Bus1 Line2
GblBaseSelLine => Line2
Bus1 - Bus2 GblBaseSelBus => Bus1 No impact Bus1 and Bus2 must have
GblBaseSelBus => Bus2 same base voltage.
GblBaseSelLine has no impact PhaseShift setting has no
impact.
1½ bus alt.CB Bus2 - Line2 GblBaseSelBus => Bus2 Line2
GblBaseSelLine => Line2
Bus2 - Line1 GblBaseSelBus => Bus2 Line1
GblBaseSelLine => Line1
Bus2 - Bus1 GblBaseSelBus => Bus2 No impact Bus2 and Bus1 must have
GblBaseSelBus => Bus1 same base voltage.
GblBaseSelLine has no impact PhaseShift setting has no
impact.
Table continues on next page

874 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

CBConfig setting Possible closing Used GblBaseSel settings PhaseShift setting Conclusion
between has impact on
Tie CB Bus1 - Line2 GblBaseSelBus => Bus1 Line2
GblBaseSelLine => Line2
Bus1 - Bus2 GblBaseSelBus => Bus1 No impact Bus1 and Bus2 must have
GblBaseSelBus => Bus2 same base voltage.
GblBaseSelLine has no impact PhaseShift setting has no
impact.
Bus2 - Line1 GblBaseSelBus => Bus2 Line1
GblBaseSelLine => Line1
Line1 - Line2 GblBaseSelLine => Line1 Line2 Line1 and Line2 must
GblBaseSelLine => Line2 have same base voltage.
GblBaseSelBus has no affect

The function also checks the fuse failure signals for bus 1, bus 2, line 1 and line 2. If a VT failure is
detected in the selected voltage an output signal USELFAIL is set. This output signal is true if the
selected bus or line voltages have a MCB trip. This output as well as the function can be blocked with
the input signal BLOCK. The function block diagram for the voltage selection of a bus circuit breaker
is shown in figure 514 and for the tie circuit breaker in figure 515.

Transformer protection RET670 875

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

LN1QOPEN
AND
LN1SEL
LN1QCLD

B1QOPEN
LN2SEL
B1QCLD AND AND
B2SEL
OR
LN2QOPEN
AND invalidSelection
LN2QCLD AND
AND
B2QOPEN
B2QCLD AND

line1Voltage lineVoltage

line2Voltage

bus2Voltage

UB1OK
UB1FF OR

OR selectedFuseOK
UB2OK AND
AND
UB2FF OR

USELFAIL
ULN1OK AND
AND
ULN1FF OR

ULN2OK
AND
ULN2FF OR

BLOCK

en05000780-2.vsd
IEC05000780 V2 EN-US

Figure 514: Simplified logic diagram for the voltage selection function for a bus circuit breaker in a 1 1/2
breaker arrangement

876 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

LN1QOPEN
AND
LN1SEL
LN1QCLD
B1SEL
1

B1QOPEN AND
AND
B1QCLD AND

line1Voltage busVoltage

bus1Voltage
LN2QOPEN
LN2SEL
LN2QCLD AND
B2SEL
1
invalidSelection
OR
B2QOPEN AND
AND
B2QCLD AND

line2Voltage lineVoltage

bus2Voltage

UB1OK AND
UB1FF OR

OR selectedFuseOK
UB2OK AND
AND
UB2FF OR

USELFAIL
ULN1OK AND
AND
ULN1FF OR

ULN2OK
AND
ULN2FF OR

BLOCK

en05000781-2.vsd
IEC05000781 V2 EN-US

Figure 515: Simplified logic diagram for the voltage selection function for the tie circuit breaker in 1 1/2 breaker
arrangement.

16.1.8 Technical data

M12359-1 v16

Table 562: SESRSYN technical data

Function Range or value Accuracy

Phase shift, jline - jbus (-180 to 180) degrees -

Voltage high limit for synchronizing and (50.0-120.0)% of UBase ±0.5% of Ur at U ≤ Ur

synchrocheck ±0.5% of U at U > Ur

Reset ratio, synchrocheck > 95% -

Table continues on next page

Transformer protection RET670 877

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Function Range or value Accuracy

Frequency difference limit between bus and (0.003-1.000) Hz ±2.5 mHz
line for synchrocheck
Phase angle difference limit between bus (5.0-90.0) degrees ±2.0 degrees
and line for synchrocheck
Voltage difference limit between bus and line (0.02-0.5) p.u ±0.5% of Ur
for synchronizing and synchrocheck
Time delay output for synchrocheck when (0.000-60.000) s ±0.2% or ±35 ms whichever is
angle difference between bus and line jumps greater
from “PhaseDiff” + 2 degrees to “PhaseDiff” -
2 degrees
Frequency difference minimum limit for (0.003-0.250) Hz ±2.5 mHz
synchronizing
Frequency difference maximum limit for (0.050-1.000) Hz ±2.5 mHz
synchronizing
Maximum allowed frequency rate of change (0.000-0.500) Hz/s ±10.0 mHz/s
Maximum closing angle between bus and (15-30) degrees ±2.0 degrees
line for synchronizing
Breaker closing pulse duration (0.050-1.000) s ±0.2% or ±15 ms whichever is
greater
tMaxSynch, which resets synchronizing (0.000-6000.00) s ±0.2% or ±35 ms whichever is
function if no close has been made before greater
set time
Minimum time to accept synchronizing (0.000-60.000) s ±0.2% or ±35 ms whichever is
conditions greater
Voltage high limit for energizing check (50.0-120.0)% of UBase ±0.5% of Ur at U ≤ Ur
±0.5% of U at U > Ur

Reset ratio, voltage high limit > 95% -

Voltage low limit for energizing check (10.0-80.0)% of UBase ±0.5% of Ur

Reset ratio, voltage low limit < 105% -

Maximum voltage for energizing (50.0-180.0)% of UBase ±0.5% of Ur at U ≤ Ur
±0.5% of U at U > Ur

Time delay for energizing check when (0.000-60.000) s ±0.2% or ±100 ms whichever is
voltage jumps from 0 to 90% of Urated greater
Operate time for synchrocheck function when Min. = 15 ms –
angle difference between bus and line jumps Max. = 30 ms
from “PhaseDiff” + 2 degrees to “PhaseDiff” -
2 degrees
Operate time for energizing function when Min. = 70 ms –
voltage jumps from 0 to 90% of Urated Max. = 90 ms

16.2 Autorecloser for 1 phase, 2 phase and/or 3 phase

operation SMBRREC IP14559-1 v6

878 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.2.1 Identification
M14890-1 v7

Function Description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Autorecloser for 1 phase, 2 phase and/or 3 SMBRREC 79
phase
5(0 -->1)
IEC15000204 V1 EN-US

16.2.2 Functionality M12390-3 v17

The auto recloser (SMBRREC) function provides:

• high-speed and/or delayed auto reclosing

• single and/or three phase auto reclosing
• support for single or multi-breaker applications.

The auto recloser can be used for delayed busbar restoration.

Up to five reclosing shots can be performed. The first shot can be single-, two-, and /or three-phase
depending on the type of the fault and the selected auto reclosing mode.

Several auto reclosing functions can be provided for multi-breaker arrangements. A priority circuit
allows one circuit breaker to reclose first and the second will only close if the fault proved to be
transient.

Each auto reclosing function can be configured to co-operate with the synchrocheck function.

16.2.3 Function block M12633-3 v6

SMBRREC
ON BLOCKED
OFF SETON
BLKON READY
BLKOFF ACTIVE
RESET SUCCL
INHIBIT UNSUCCL
START INPROGR
STARTHS 1PT1
TRSOTF 2PT1
SKIPHS 3PT1
ZONESTEP 3PT2
TR2P 3PT3
TR3P 3PT4
THOLHOLD 3PT5
CBREADY PERMIT1P
CBCLOSED PREP3P
PLCLOST CLOSECB
SYNC WFMASTER
WAIT COUNT1P
RSTCOUNT COUNT2P
MODEINT COUNT3P1
COUNT3P2
COUNT3P3
COUNT3P4
COUNT3P5
COUNTAR
MODE
ABORTED
SYNCFAIL
INHIBOUT
IEC06000189-3-en.vsd
IEC06000189 V3 EN-US

Figure 516: SMBRREC function block

Transformer protection RET670 879

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.2.4 Signals
PID-6796-INPUTSIGNALS v2

Table 563: SMBRREC Input signals

Name Type Default Description

ON BOOLEAN 0 Switch AR On (at ExternalCtrl = On)
OFF BOOLEAN 0 Switch AR Off (at ExternalCtrl = On)
BLKON BOOLEAN 0 Set AR in blocked state
BLKOFF BOOLEAN 0 Release AR from blocked state
RESET BOOLEAN 0 Reset AR to initial conditions
INHIBIT BOOLEAN 0 Interrupt and inhibit reclosing sequence
START BOOLEAN 0 Start reclosing sequence
STARTHS BOOLEAN 0 Start high-speed reclosing without synchrocheck
TRSOTF BOOLEAN 0 Continue to shots 2-5 at a trip from switch-on-to-fault
SKIPHS BOOLEAN 0 Skip high speed shot and continue with delayed shots
ZONESTEP BOOLEAN 0 Coordinate local AR with down stream devices
TR2P BOOLEAN 0 Two phase trip occurred
TR3P BOOLEAN 0 Three phase trip occurred
THOLHOLD BOOLEAN 0 Hold AR in wait state
CBREADY BOOLEAN 0 Circuit breaker is ready
CBCLOSED BOOLEAN 0 Circuit breaker status
PLCLOST BOOLEAN 0 Power line carrier or other form of permissive signal is lost
SYNC BOOLEAN 0 Synchrocheck conditions are fulfilled
WAIT BOOLEAN 0 Wait for master
RSTCOUNT BOOLEAN 0 Reset counters
MODEINT INTEGER 0 Integer input used to set reclosing mode (alternative to setting)

PID-6796-OUTPUTSIGNALS v2

Table 564: SMBRREC Output signals

Name Type Description

BLOCKED BOOLEAN AR is blocked
SETON BOOLEAN AR is operative
READY BOOLEAN AR is ready for a new sequence
ACTIVE BOOLEAN Reclosing sequence in progress
SUCCL BOOLEAN Reclosing is successful
UNSUCCL BOOLEAN Reclosing is unsuccessful
INPROGR BOOLEAN Reclosing in progress, inactive during reclaim time
1PT1 BOOLEAN Single-phase reclosing is in progress for shot 1
2PT1 BOOLEAN Two-phase reclosing is in progress for shot 1
3PT1 BOOLEAN Three-phase reclosing is in progress for shot 1
3PT2 BOOLEAN Three-phase reclosing is in progress for shot 2
3PT3 BOOLEAN Three-phase reclosing is in progress for shot 3
3PT4 BOOLEAN Three-phase reclosing is in progress for shot 4
3PT5 BOOLEAN Three-phase reclosing is in progress for shot 5
Table continues on next page

880 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Name Type Description

PERMIT1P BOOLEAN Single-phase trip is permitted
PREP3P BOOLEAN Three-phase trip is prepared
CLOSECB BOOLEAN Close command for circuit breaker
WFMASTER BOOLEAN Wait signal to slave issued by master for sequential reclosing
COUNT1P INTEGER Number of single-phase reclosing shots
COUNT2P INTEGER Number of two-phase reclosing shots
COUNT3P1 INTEGER Number of three-phase shot 1 reclosings
COUNT3P2 INTEGER Number of three-phase shot 2 reclosings
COUNT3P3 INTEGER Number of three-phase shot 3 reclosings
COUNT3P4 INTEGER Number of three-phase shot 4 reclosings
COUNT3P5 INTEGER Number of three-phase shot 5 reclosings
COUNTAR INTEGER Number of total reclosing shots
MODE INTEGER Integer output for reclosing mode
ABORTED BOOLEAN General abort
SYNCFAIL BOOLEAN AR sequence is aborted by synchrocheck conditions not fulfilled
INHIBOUT BOOLEAN AR sequence is aborted via INHIBIT input

16.2.5 Settings
PID-6797-SETTINGS v2

Table 565: SMBRREC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
ExternalCtrl Off - - Off To be set On if AR is to be used with
On external control
t1 0.000 - 200.000 s 0.001 6.000 Dead time for shot 1, delayed reclosing
with synchrocheck conditions
t1_HS 0.000 - 20.000 s 0.001 0.400 Dead time for shot 1, high speed
reclosing
tReclaim 0.00 - 6000.00 s 0.01 60.00 Reclaim time
tSync 0.00 - 600.00 s 0.01 2.00 Maximum wait time for fulfilled
synchrocheck conditions
tLongStartInh 0.000 - 60.000 s 0.001 0.200 Maximum allowed start pulse duration
tPulse 0.000 - 60.000 s 0.001 0.200 Circuit breaker closing pulse duration
tCBClosedMin 0.00 - 6000.00 s 0.01 5.00 Minimum time that circuit breaker must
be closed before new sequence is
allowed
tUnsucCl 0.00 - 6000.00 s 0.01 30.00 Maximun wait time for circuit breaker
closing before indicating unsuccessful
LongStartInhib Off - - On To be set ON if AR is to be used with
On maximum allowed start pulse duration
check

Transformer protection RET670 881

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Table 566: SMBRREC Group settings (advanced)

Name Values (Range) Unit Step Default Description

NoOfShots 1 - - 1 Max number of reclosing shots
2
3
4
5
StartByCBOpen Off - - Off To be set ON if AR is to be started by
On circuit breaker open position
CBReadyType CO - - CO Circuit breaker ready signal type
OCO
t2 0.00 - 6000.00 s 0.01 30.00 Dead time for shot 2
t3 0.00 - 6000.00 s 0.01 30.00 Dead time for shot 3
t4 0.00 - 6000.00 s 0.01 30.00 Dead time for shot 4
t5 0.00 - 6000.00 s 0.01 30.00 Dead time for shot 5
tInhibit 0.000 - 60.000 s 0.001 5.000 Reset time for reclosing inhibit
CutPulse Off - - Off Shorten circuit breaker closing pulse at a
On new start
Follow CB Off - - Off Advance to next shot if circuit breaker
On has been closed during dead time
BlockByUnsucCl Off - - Off Block AR at unsuccessful reclosing
On
tSuccessful 0.000 - 60.000 s 0.001 1.000 Delay time before indicating successful
reclosing

16.2.6 Operation principle

16.2.6.1 Terminology explanation GUID-EA0760DF-8F0B-4146-8A42-3F20E75E1053 v1

Before describing the auto reclosing function it is first necessary to define the following terminology:

• a shot is an attempt from the function to close a circuit breaker

• multi-shot is where more than one shot is attempted
• dead time is the time between a start of the function and the attempt to close the circuit breaker
• reclaim time is the time from the circuit breaker closing command till the reset of the function,
should the auto reclosing attempt be successful and no new start is received
• high-speed shot is generally used for an application where the dead time is less than 1 second
and synchrocheck is not required
• delayed auto reclosing is generally regarded as an application where the dead time is greater
than 1 second and where typically synchrocheck is required
• sequence is the auto reclosing cycle beginning with start and ending with successful,
unsuccessful or aborted reclosing as a result
• status is the state which the auto reclosing function have reached in the sequence

16.2.6.2 Status descriptions GUID-AFC069D6-ADA5-4D97-9699-8C9F058458EB v1

The auto reclosing function can be in one of the following five statuses:

“Inactive” GUID-BF80C969-FCBE-4CAB-BF71-9590A2DB433C v1
The auto recloser is in “inactive” status when the following conditions are fulfilled:

• the auto recloser is set to On and

882 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

• either the circuit breaker is not closed

• or the circuit breaker is not ready

The function will not react on any start from protection trips while in “inactive” status and no
automatic reclosing is possible.

“Ready” GUID-04F154EC-E236-40A4-A3E0-7624A2F6B132 v1
The function is in “ready” status when the following conditions are fulfilled:

• the circuit breaker is ready

• the circuit breaker must have been closed for more that the set time in setting: tCBClosedMin
• the function is not in “blocked” status
• the function is not in “in progress” status

Only in “ready” status a start of the auto reclosing sequence is possible.

“In progress” GUID-24F8890F-A8FA-4A6F-B9E8-08BDB17B9A0D v1

The function is in “in progress” status when the following condition is fulfilled:

• the auto reclosing sequence is started

Start can be initiated by either protection trip command or circuit breaker position change. The
second starting alternative is only possible when enabled by a setting.

In “in progress” status the dead time starts and the status ceases when the dead time expires. Then
circuit breaker close command is given and the function changes its state into the "reclaim time"
status.

“Reclaim time” GUID-D838C380-C74B-498C-82D6-3364E2F6BA22 v1

The auto recloser is in “reclaim time” status while the following conditions are fulfilled:

• the reclaim time has not yet expired

• the status is not interrupted by either a new start signal or a block signal

A new start signal during “reclaim time” status forces the function to proceed to next shot and change
state into “in progress” status, as long as the last shot is not reached.

“Blocked” GUID-9C38B1BE-3772-49AE-B4B3-391CE15D5CD2 v1
The function is in “blocked” status when an external blocking signal exists. No auto reclosing is
possible in “blocked” status. Only an external signal for cancellation of the blocking can cancel this
status.

16.2.6.3 Description of the status transition GUID-C12DF571-AC0D-4A04-9B9E-D53E15A24331 v1

From Table 567 below it is possible to see which status transitions are possible. When the auto
recloser is for instance in “inactive” status only two transition are possible:

• transition to “ready” status when the circuit breaker is ready and closed
• transition to “blocked” status by external blocking

The empty cells in the table indicate that no such transition is possible.

Transformer protection RET670 883

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Table 567: Status transition matrix

To → inactive ready in progress reclaim time blocked

From ↓ (dead time)
inactive activate activate BLKON
CBCLOSED and
CBREADY
ready deactivate activate START activate BLKON
CBCLOSED or or activate
CBREADY or STARTHS
activate INHIBIT
or RESET
in progress activate INHIBIT when activate BLKON
(dead time) or RESET CBCLOSED
issued
reclaim time activate RESET activate START activate BLKON
or INHIBIT and the last shot
has not been
reached yet
blocked deactivate activate
CBCLOSED or BLKOFF and
CBREADY and CBCLOSED and
activate BLKOFF CBREADY

16.2.6.4 Functional sequence description GUID-C73A160D-330B-4627-B8F0-A31C9B3F7417 v1

To comprehend this chapter better it is essential to first read chapters “Status descriptions“ and
“Description of the status transition” carefully.

The logic for most of the explained inputs, outputs, settings and internal signals, described in this
chapter, is shown in Figure 522. Other figures mentioned are in some way connected or cooperate
with Figure 522.

Before going into details in the following chapters, the short functional/feature summary is given
below.

The auto reclosing function is multi-shot capable and suitable for both high-speed and delayed auto
reclosing. The function can be set to perform a single-shot, two-shot, three-shot, four-shot or five-
shot reclosing sequence. Dead times for all shots can be set independently.

An auto recloser sequence can be initiated by:

• protection operation
• circuit breaker operation (when enabled by setting StartByCBOpen=On)

At the end of the dead time, provided that other conditions are fulfilled, a circuit breaker close
command signal is given. The other conditions to be fulfilled are:

• input signal SYNC is true, which typically indicates that power systems on the two sides of the
circuit breaker are in synchronism
• and that input signal CBREADY is true, typically indicating that circuit breaker springs are
charged.

If a circuit breaker close command is given successfully at the end of the dead time, a reclaim time
starts. If the circuit breaker does not trip again within reclaim time, the auto recloser indicates a
successful reclosing and resets into "ready" status. If the protection trips again during the reclaim
time, the sequence advances to the next shot. If all reclosing attempts have been made and the
circuit breaker does not remain closed, the auto recloser indicates an unsuccessful reclosing. Each
time a breaker close command is given, a shot counter is incremented by one.

884 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Operation Off and On GUID-D868C9CF-CDB1-48AA-8B31-60C447FBD1D3 v1

The auto recloser can be switched Off or On with a setting or by external control inputs. With the
setting Operation = On, the auto recloser is activated and with the setting Operation = Off it is
deactivated. With the settings Operation = On and ExternalCtrl = On, the activation and deactivation
is made by signal pulses to the ON and OFF inputs, for example, from a control system or by a
control switch.

If the input conditions CBCLOSED and CBREADY, from the circuit breaker, are not fulfilled while
switching the auto recloser on, the auto recloser changes into “inactive” status and the output
SETON is activated (high). The auto recloser is not ready for auto reclosing. If, however, the circuit
breaker is closed and ready when switching the auto recloser on, the output READY is activated and
the function is prepared to start the auto reclosing cycle. The circuit breaker must have been closed
for at least the set value for setting tCBClosedMin before a start is accepted. The logic for Off or On
operation is shown in Figure 517.

Operation
AND OR S SETON
ExternalCtrl

R
ON AND

OR
OFF AND

StartByCBOpen
START AND

STARTHS AND
100ms OR
AND OR initiate
100ms
AND
TRSOTF
startThermal AND
CBReady
120ms
CBREADY OR S
t AND start
AND
AND
tCBClosedMin R
CBCLOSED
t

cbClosed AND
count0 AND READY
inhibit
OR
INHIBIT

IEC16000153-1-en.vsdx
IEC16000153 V1 EN-US

Figure 517: Simplified logic for Operation Off/On and starting

Mode selection GUID-25A24DC8-80C8-4C42-A084-D25712049F06 v1

The auto reclosing mode is selected with the setting ARMode. As an alternative to the setting, the
mode can be selected by connecting an integer, for example from function block B16I, to the
MODEINT input. The six possible modes are described in Table 568 below with their corresponding
MODEINT integer value.

When a valid integer is connected to the input MODEINT the selected setting ARMode will be invalid
and the MODEINT input value will be used instead. The selected mode is reported as an integer on
the MODE output.

Transformer protection RET670 885

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Please note that tripping mode of the IED is defined in Trip Logic function block SMPPTRC. For
example for two-phase faults either 2ph or 3ph tripping and consequent auto reclosing can be
selected

Table 568: Type of reclosing shots at different settings of “ARMode” or integer inputs to "MODEINT"

MODEINT (Integer) ARMode Type of fault 1st shot 2nd - 5th shot
1ph 3ph 3ph
1 3ph 2ph 3ph 3ph
3ph 3ph 3ph
1ph 1ph 3ph
2 1/2/3ph 2ph 2ph 3ph
3ph 3ph 3ph
1ph 1ph 3ph
3 1/2ph 2ph 2ph 3ph
3ph - -
1ph 1ph 3ph
4 1ph+1x2ph 2ph 2ph -
3ph - -
1ph 1ph 3ph
5 1/2ph+1x3ph 2ph 2ph 3ph
3ph 3ph –
1ph 1ph 3ph
6 1ph+1x2/3ph 2ph 2ph -
3ph 3ph -

Auto reclosing shots GUID-817797BE-FAFC-4BC7-B288-F19416459DCE v1

A maximum of five auto reclosing shots can be selected with the setting NoOfShots. Every shot has
its own dead time setting.

The first shot differs from the other shots by the possibility to extend its dead time and to utilize up to
four different time settings for it.

For the first shot, there are separate settings for single-, two- and three-phase dead times, t1 1Ph, t1
2Ph and t1 3Ph. If only the START input signal is applied, and an auto-reclosing program with single-
phase reclosing is selected, the auto reclosing dead time t1 1Ph will be used. If one of the TR2P or
TR3P inputs is activated in in parallel with the START input, the auto reclosing dead time for either
two-phase or three-phase auto reclosing is used.

There is also a separate time setting facility for three-phase high-speed auto reclosing, t1 3PhHS.
This high-speed auto reclosing is activated by the STARTHS input and is used when auto reclosing
is done without the requirement of synchrocheck conditions to be fulfilled. The high-speed dead time
shall be set shorter than normal first shot three-phase dead time. Note that if high-speed three-phase
shot is not successful the auto reclosing sequence will continue with shot two.

A time extension delay, tExtended t1, can be added to the dead time delay for the first shot. It is
intended to come into use if the communication channel for permissive line protection is lost. In a
case like this there can be a significant time difference in fault clearance at the two line ends, where
a longer auto reclosing dead time can be useful. This time extension is controlled by the setting
Extended t1 and the PLCLOST input. The logic for control of extended dead time is shown in
Figure518 and Figure 522. Time extension delay is not possible to add to the three-phase high-
speed auto reclosing dead time, t1 3PhHS.

886 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Extended t1

AND extendTime
PLCLOST
OR
initiate AND
AND
start

IEC16000155-1-en.vsdx
IEC16000155 V1 EN-US

Figure 518: Control of extended dead time

Shots 2 to 5 are all three-phase shots and have only one corresponding time setting each, t2 3Ph, t3
3Ph, t4 3Ph and t5 3Ph.

Starting auto reclosing GUID-7794EA6E-7D73-46BD-A623-65DED8E45D05 v1

When a start is applied to the auto function, it status will change from “ready” status to “in progress”
status. When the dead time has expired, the close command is issued and the reclaim time is started
and the “in progress” status will change to “reclaim time” status.

The usual way to start a reclosing sequence, is to start it when a selective line protection tripping has
occurred, by applying a signal to the START input. If the auto reclosing mode with only three-phase
reclosing is selected, activation of the START input will start the three-phase dead timer. When
alternatively the START input signal is applied, and an auto reclosing mode with single-phase
reclosing is selected, the auto reclosing dead time for single-phase is used. However if one of the
TR2P or TR3P inputs is activated in connection with the START input, the auto reclosing dead time
for two-phase or three-phase auto reclosing is used. The STARTHS input (start high-speed
reclosing) can also be used to start a separate, high-speed three-phase dead time in which case the
synchrocheck condition will be bypassed.

To start a new auto reclosing cycle, a number of conditions of input signals need to be fulfilled. The
inputs are:

• CBREADY: circuit breaker is ready for a reclosing cycle, for example, charged operating gear.
• CBCLOSED: to ensure that the circuit breaker was closed when the line fault occurred and start
was applied. The CBCLOSED condition must be present for more that the settable time
tCBClosedMin.
• no BLKON or INHIBIT signal is present.

When the start has been accepted, the internal signals “start” and “initiate” are set. The internal
signal “start” is latched and the internal signal “initiate” follows the length of the signal on the START
input. The latched signal “start” can be interrupted by a signal to the INHIBIT input.

The simplified logic is shown in Figure 517.

The auto recloser is normally started by selective tripping. It is either a zone 1 or communication
aided trip, or a general trip. If the general trip is used the auto recloser must be blocked, via the
INHIBIT input, from all back-up tripping. The breaker failure function must always be connected to
inhibit the auto recloser. START makes a first shot with synchrocheck conditions to be fulfilled,
STARTHS makes its first shot without any fulfilled synchrocheck conditions. The TRSOTF “trip by
switch onto fault” input starts shots 2 to 5. It may be connected to the “switch onto fault” output of line
protection if multi-shot auto reclosing is used.

In normal circumstances, the auto recloser is started with a protection trip command which resets
quickly due to fault clearing. In case the start signal lasts for a too long time, the user can set a
maximum start pulse duration tLongStartInh. This start pulse duration time is controlled by setting
LongStartInhib. When the start pulse duration signal is longer than the set maximum start pulse
duration, the auto reclosing sequence will be interrupted in the same way as if the INHIBIT input was
set to true. The logic for the control of long start pulse duration is shown in Figure 519.

Transformer protection RET670 887

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

LongStartInhib

start
AND
tLongStartInh
initiate
t
longStartInhibit
OR

Extended t1 AND

t13PhExtTimeout

IEC16000154-1-en.vsdx
IEC16000154 V1 EN-US

Figure 519: Control of long start pulse duration

If the user wants to start the auto recloser from circuit breaker open position instead of the protection
trip signals, this starting mode is selected by enabling a setting StartByCBOpen. Typically, a circuit
breaker auxiliary contact of type normally open (NO) shall be connected to the CBCLOSED and
START inputs. Then the circuit breaker status change from closed to open will generate an auto
reclosing start pulse of limited length (100ms) subject to the usual auto recloser checks. The auto
reclosing sequence continues then as usual. Signals from manual tripping and other functions, which
shall prevent auto reclosing, need to be connected to the INHIBIT input. The logic for start from
circuit breaker open position is shown in Figure 517.

The function can also be set to proceed to the next reclosing shot (if selected) even if the external
start signal is not received but the breaker is still not closed. The user can set a required time delay
for the auto recloser to proceed without a new start with setting tAutoContWait. Also the
synchrocheck conditions not fulfilled will also make the auto recloser to proceed to next shot. This
automatic proceeding of shots is controlled by setting AutoContinue and is shown in figure 520.

tAutoContWait
t
AND
commandCloseCB
AND S
R
OR
AND
OR
cbClosed AND autoInitiate
synchroCheckOK

AutoContinue

IEC16000156-1-en.vsdx
IEC16000156 V1 EN-US

Figure 520: Automatic proceeding of shots

Blocking, resetting and inhibiting auto reclosing GUID-82719FE0-02E4-48FB-9685-2146480F3653 v1

The BLKON input is used to block the auto recloser for example, when certain special service
conditions arise. The auto recloser can also be blocked by an unsuccessful reclosing attempt. This is
controlled by the setting BlockByUnsucCl. When the auto recloser is blocked it immediately resets to
its initial conditions and the ACTIVE output is unactivated. The BLOCKED output indicates that the
auto recloser is blocked. To unblock the auto recloser the BLKOFF input must be activated.

The RESET input is used to reset the auto recloser to its initial conditions. When initial starting
conditions are fulfilled again, after a reset, the auto recloser is ready for a new reclosing sequence.

If the INHIBIT input is activated it is reported on the INHIBOUT output. To ensure reliable interruption
and temporary blocking of the auto recloser a reset time delay tInhibit is used. The auto recloser will

888 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

be blocked the time set in tInhibit after the deactivation of the INHIBIT input. The following internal
inhibit signals are also affected by the setting tInhibit:

• inhibitWaitForMaster: after expiration of the tWaitForMaster time for the WAIT input to reset, the
reclosing cycle of the slave is inhibited.
• longStartInhibit: if start pulse duration is longer than the tLongStartInh time, the reclosing cycle
is inhibited.

The ABORTED output indicates that the auto recloser is inhibited while it was in one of following
internal states:

• inProgress: auto recloser is started and dead time is in progress.

• reclaimTimeStarted: the circuit breaker closing command has started the reclaim timer.
• wait: an auto recloser, acting as slave, is waiting for a release from the master to proceed with
its own reclosing sequence.

The SYNCFAIL output indicates that the auto recloser is inhibited because the synchrocheck or
energizing check condition has not been fulfilled within the set time interval, tSync. The ABORTED
output will also be activated.

The behavior of the functionality described above is described in Table 569 and Table 570 below.

Table 569: BLKON, BLKOFF, RESET, INHIBIT and SYNC behavior when the function is in "ready" status

Output → READY ACTIVE BLOCKED INHIBOUT ABORTED SYNCFAIL

Input ↓
None of below True False False False False False
inputs
activated
BLKON pulse False False True False False False
BLKOFF pulse True False False False False False
RESET pulse False False False False False False
INHIBIT pulse False False False True False False
SYNC True False False False False False

Table 570: BLKON, BLKOFF, RESET, INHIBIT and SYNC behavior when the function is in "in progress" status

Output → READY ACTIVE BLOCKED INHIBOUT ABORTED SYNCFAIL

Input ↓
None of below False True False False False False
inputs
activated
BLKON pulse False False True False False False
BLKOFF pulse True False False False False False
RESET pulse False False False False False False
INHIBIT pulse False False False True True False
No SYNC False False False False True True

Auto reclosing sequence GUID-78AAE7CD-702E-407B-94D2-6A70BAFC8E70 v1

When the function has started and the dead time has elapsed during the auto reclosing sequence,
certain conditions must be fulfilled before the circuit breaker closing command is issued. In three-
phase reclosing, a synchrocheck and/or energizing check can be used. It is possible to use a
synchrocheck function in the same physical device or an external one. The synchrocheck release
signal shall be connected to the auto reclosing SYNC input. If reclosing without synchrocheck is
preferred the SYNC input can be set to TRUE (set high) permanently. The synchrocheck release
signal is not checked for single-phase or two-phase auto reclosing. When a three-phase high-speed

Transformer protection RET670 889

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

reclosing started by STARTHS input, synchronization is not checked either, and the state of the
SYNC input is disregarded. The SYNC input shall be true within a set time interval, tSync. If it is not,
the auto reclosing is interrupted and the SYNCFAIL and ABORTED outputs are activated.

By choosing CBReadyType = CO (circuit breaker ready for a Close-Open sequence) the readiness of
the circuit breaker is also checked before issuing the circuit breaker closing command. If the circuit
breaker has a readiness contact of type CBReadyType = OCO (circuit breaker ready for an Open-
Close-Open sequence) this condition may not be fulfilled during the dead time and at the moment of
auto reclosure. The Open-Close-Open condition was however checked at the start of the auto
reclosing cycle and it is then likely that the circuit breaker is prepared for a Close-Open sequence.

The reclaim timer, tReclaim, is started each time a circuit breaker closing command is given. If no
start occurs within this time, the auto recloser will reset. A new start received in “reclaim time” status
will move the auto recloser to “in progress” status and next shot as long as the final shot is not
reached. The auto recloser will reset and enter “inactive” status if a new start is given during the final
reclaim time. This will also happen if the circuit breaker has not been closed within set time interval
tUnsucCl after each circuit breaker close command. The latter case is controlled by setting
UnsucClByCBChk. The auto reclosing sequence is considered unsuccessful for both above cases
and the UNSUCCL output is activated.

If the circuit breaker closing command is given and the circuit breaker is closed within the set time
interval tUnsucCl, the SUCCL output is activated after the set time interval tSuccessful. The logic for
successful and unsuccessful reclosing indication is shown in Figure 521.

initiate
reclaimTimeStarted AND

OR
AND UNSUCCL
OR tUnsucCl S
AND t unsuccessful
cbClosed
AND
UnsucClByCBChk
count0
OR R

tUnsucCl tSuccessful
AND SUCCL
commandCloseCB t AND S t

R
OR

IEC16000157-1-en.vsdx
IEC16000157 V1 EN-US

Figure 521: Successful/Unsuccessful

Figure 522 shows the logic for most parts of an auto reclosing sequence. Figure 522 should be read
together with the other logic diagrams to get the whole picture.

890 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
 ZoneSeqCoord
ZONESTEP AND
MODEINT MODE
start ARMode
initiate inProgress

IEC16000158 V1 EN-US
TR2P and INPROGR
TR3P NoOfShots 1PT1
startThermal OR 2PT1

Technical manual
selection 3PT1
Dead time
reclaimTimeStarted 3PT2
tExtended t1 tExtended t1 is 3PT3
extendTime added to t1 1Ph inhibitThermalStart
1MRK 504 164-UEN Rev. N

t 3PT4
or t1 2ph or t1 3Ph 3PT5
SKIPHS Skips high-speed shot (t1 3PhHS) and PREP3P
continues with delayed shot (t1 3Ph) AND tReclaim PERMIT1P
AND t 1
t1 1Ph OR

Transformer protection RET670

t1 2Ph OR
Dead t1 3PhHS AND
t13PhExtTimeout
time inhibit

The outputs are:

t1 3PH OR OR
settings t2 3PH synchroCheckOK
t3 3PH OR BlockByUnsucCl
t4 3PH AND
t5 3PH unsuccessful AND ACTIVE
1

Figure 522: Auto reclosing sequence

t OR OR
AND S
tSlaveDeadTime AND
slaveDeadTime sets every dead timer R
t BLOCKED
to tSlaveDeadTime

tSync
SYNC AND t SYNCFAIL
inProgress AND
reclaimTimeStarted OR
CBReadyType wait AND ABORTED
CB OR
AND
readiness
AND inhibitWaitForMaster tInhibit
CBReady check t
OR
longStartInhibit count0
OR Counter COUNT1P
inhibitThermalStart COUNT2P
CutPulse inProgress COUNT3P1
AND Set COUNT3P2
OR COUNT3P3
OR COUNT3P4
AND
AND COUNT3P5
Reset COUNTAR
tPulse
Follow CB CLOSECB
OR
AND AND
cbClosed

© 2017 - 2021 Hitachi Power Grids. All rights reserved

50ms commandCloseCB

RSTCOUNT
RESET

BLKON
BLKOFF
INHIBIT INHIBOUT

IEC16000158-1-en.vsdx

A number of outputs from the function keeps track of the actual state in the auto reclosing sequence.

891
Control
Section 16
Section 16 1MRK 504 164-UEN Rev. N
Control

• INPROGR: any dead time is in progress

• 1PT1, 2PT1, 3PT1, 3PT2, 3PT3, 3PT4 and 3PT5: dead time is in progress for respective shot
and fault type
• ACTIVE: during dead time + reclaim time
• COUNTAR: total number of auto reclosing shots
• COUNT1P, COUNT2P, COUNT3P1, COUNT3P2, COUNT3P3, COUNT3P4 and COUNT3P5:
number of circuit breaker close commands made for respective shot
• STATUS: reports, only through the IEC 61850 protocol, the actual status of the function.

The possible statuses are described in Table 571 below. Their mapping to output signals and their
corresponding IEC 61850 integer value is also given in the table. Mapping from IEC 61850 Ed2
standard is also shown for the AutoRecSt data object.

Table 571: Auto reclosing status reported by IEC 61850 in priority order

Data object AutoRecSt Description for mapped Mapped output signals / Description in IEC61850
value signals Comments Ed2
1 Ready READY Ready
2 In Progress INPROGR In Progress
3 Successful SUCCL Successful
4 Waiting for trip
5 Trip issued by protection
6 Fault disappeared
7 Wait to complete CLOSECB Wait to complete
8 Circuit breaker closed
9 Cycle unsuccessful UNSUCCL
10
-1 Aborted by synchrocheck SYNCFAIL
fail
11 Aborted ABORTED Aborted
-2 Set On, Not Ready SETON = 1, READY = 0,
ACTIVE = 0, SUCCL = 0,
UNSUCC = 0, INPROG =
0
-3 Set Off, Not Ready SETON = 0
-99 Others Means that auto recloser is
in transitional state, that
should not be visible in
steady state situation

There are several counters within the function. One for each shot and type of fault and one overall
counter for total number of circuit breaker closing commands. All counters can be reset to zero using
either the HMI command or the RSTCOUNT input or by an IEC 61850 command.

The circuit breaker closing command, CLOSECB output is a pulse with settable duration by setting
tPulse. For circuit breakers without anti-pumping function, close pulse cutting can be used. This is
controlled by the setting CutPulse. In case of a new auto recloser start pulse, the breaker closing
command pulse is cut (interrupted). The minimum duration of the closing pulse is always 50ms.

The prepare three-phase trip, PREP3P output is usually connected to the trip function SMPPTRC to
force the coming trip to be three-phase. If the auto recloser cannot make a single-phase or two-
phase reclosing, the start from the trip function should be three-phase.

The permit single-phase trip, PERMIT1P output is the inverse of the PREP3P output. It can be
connected to a binary output relay for connection to external protection or trip relays. In case of a
total loss of auxiliary power, the output relay drops and does not allow single-phase trip.

892 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

The setting Follow CB can be used to prevent close command to be issued when dead time has
expired and circuit breaker is already closed (e.g. by manual close command). If a new start is
received after the dead time expiration the auto recloser will advance to next shot.

If input SKIPHS is activated, and simultaneously STARTHS input is initiated then actually normal
three-phase shot one with dead time "t1 3Ph" will be started.

The ZONESTEP input is used when coordination between local auto reclosers and down stream
auto reclosers is needed. If function is in "ready" status and this input is activated the auto recloser
increases its actual shot number by one and enters directly the “reclaim time” status for shot one. If a
start is received during the reclaim time, the function will proceed with the next shot (e.g. starting
dead time for shot two). Every new pulse on the ZONESTEP input will further increase the shot
number. Note that ZONESTEP input will have such effect only if local start signal was not activated,
as shown in Figure 522. The setting NoOfShots limits of course the maximum number of available
shots. This functionality is controlled by the setting ZoneSeqCoord.

By activating the THOLHOLD input the auto recloser is set on hold. It can be connected to a thermal
overload protection trip signal which resets only when the thermal content has fallen to an acceptable
level, for example, 70%. As long as the signal is high, indicating that the line is hot, the auto reclosing
is halted. When the signal resets, a reclosing cycle will continue. This may cause a considerable
delay between start of the auto recloser and the breaker closing command. An external logic limiting
this time and activating the INHIBIT input can be used. The THOLHOLD input can also be used to
set the auto recloser on hold, for longer or shorter time periods, for other purposes if for some reason
the auto recloser needs to be halted. The logic for thermal protection hold is shown in Figure 523.

start inhibitThermalStart
THOLHOLD AND AND S

q-1 20ms
startThermal
AND

inhibit OR

IEC16000159-1-en.vsdx
IEC16000159 V1 EN-US

Figure 523: Thermal protection hold

The auto recloser is set as master or slave in multi-breaker arrangements with sequential reclosing
with the setting Priority. The auto recloser for the first circuit breaker, e.g. near the busbar, is set as
master (when Priority=High) and the auto recloser for the second circuit breaker is set as slave
(when Priority=Low). While the master is in progress, it issues the WFMASTER output. After an
unsuccessful reclosing the WFMASTER output is also maintained by the UNSUCCL output.

When activating the WAIT input, in the auto recloser set as slave, every dead timer is changed to the
value of setting tSlaveDeadTime and holds back the auto reclosing operation. When the WAIT input
is reset at the time of a successful reclosing of the first circuit breaker, the slave is released to
continue the reclosing sequence after the set tSlaveDeadTime. The reason for shortening the time,
for the normal dead timers with the value of tSlaveDeadTime, is to give the slave permission to react
almost immediately when the WAIT input resets. The mimimum settable time for tSlaveDeadTime is
0.1sec because both master and slave should not send the breaker closing command at the same
time. The slave should take the duration of the breaker closing time of the master into consideration
before sending the breaker closing command. A setting tWaitForMaster sets a maximum wait time
for the WAIT input to reset. If the wait time expires, the reclosing cycle of the slave is inhibited. The
maximum wait time, tWaitForMaster for the second circuit breaker is set longer than the auto
reclosing dead time plus a margin for synchrocheck conditions to be fulfilled for the first circuit
breaker. Typical setting is 2sec. In single circuit breaker applications, the setting Priority is set to
None. The logic for master-slave is shown in Figure 524.

Transformer protection RET670 893

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Master:
High (Master)
Priority
WFMASTER
inProgress AND

unsuccessful OR

Slave:
Low (Slave)
Priority
inhibitWaitForMaster
AND
start tWaitForMaster
AND t
WAIT
wait

AND slaveDeadTime
AND S
inhibit
commandCloseCB R
OR
reclaimTimeStarted

IEC16000160-1-en.vsdx
IEC16000160 V1 EN-US

Figure 524: Master-Slave

If reclosing of the first circuit breaker is unsuccessful, the UNSUCCL output connected to the INHIBIT
input of the slave unit interrupts the reclosing sequence of the latter. The signals can be cross-
connected to allow simple changing of the priority by just setting the High and the Low priorities
without changing the configuration. The CBCLOSED inputs from each circuit breaker are important in
multi-breaker arrangements to ensure that the circuit breaker was closed at the beginning of the
sequence. If the High priority breaker was not closed its auto reclosing sequence will not start and
the low priority breaker will just continue its auto reclosing sequence in accordance with its normal
settings.

16.2.6.5 Time sequence diagrams M12458-10 v5

Some examples of the timing of internal and external signals at typical transient and permanent faults
are shown below in Figure 525 to 528.

894 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Fault
CBCLOSED
Closed Open Closed
CBREADY

START
SYNC
tReclaim
READY

INPROGR

1PT1

ACTIVE

CLOSECB t1 1Ph tPulse

PREP3P

SUCCL

Time

IEC04000196-4-en.vsd

IEC04000196 V4 EN-US

Figure 525: Transient single-phase fault, single-phase reclosing

Fault
CBCLOSED Open
Closed Open C C
CBREADY

START

TR3P
SYNC

READY

INPROGR

3PT1 t1 3Ph

3PT2 t2 3Ph

ACTIVE tReclaim

CLOSECB tPulse tPulse

PREP3P

UNSUCCL
Time

IEC04000197-3-en.vsd

IEC04000197 V3 EN-US

Figure 526: Permanent fault, three-phase trip, two-shot reclosing

Transformer protection RET670 895

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Fault
CBCLOSED
CBREADY

START

TR3P

SYNC

READY

INPROGR

1PT1

3PT1

3PT2
CLOSECB t1 1Ph

PREP3P

UNSUCCL tReclaim
IEC04000198-3-en.vsd
IEC04000198 V3 EN-US

Figure 527: Permanent single-phase fault, single-phase trip, single-shot reclosing,

ARMode=1/2/3ph

Fault
CBCLOSED
CBREADY

START

TR3P

SYNC

READY

INPROGR

1PT1

3PT1

3PT2
t2 3Ph
CLOSECB t1 1Ph

PREP3P

UNSUCCL tReclaim

IEC04000199-3-en.vsd
IEC04000199 V3 EN-US

Figure 528: Permanent single-phase fault, single-phase trip, two-shot reclosing, ARMode=1ph
+ 1*2ph

896 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.2.7 Technical data

M12379-1 v14

Table 572: SMBRREC technical data

Function Range or value Accuracy

Dead time:
shot 1 “t1 1Ph” (0.000-120.000) s ±0.2% or ±35 ms
shot 1 “t1 2Ph” whichever is greater
shot 1 “t1 3Ph “
shot 1 “t1 3PhHS”
Dead time: (0.00-6000.00) s ±0.2% or ±35 ms
shot 2 “t2 3Ph” whichever is greater
shot 3 “t3 3Ph”
shot 4 “t4 3Ph”
shot 5 “t5 3Ph”
Extend three-phase dead time duration “tExtended t1” (0.000-60.000) s ±0.2% or ±35 ms
whichever is greater
Minimum time that circuit breaker must be closed before new (0.00-6000.00) s ±0.2% or ±35 ms
sequence is allowed “tCBClosedMin” whichever is greater
Wait time for the slave to close when WAIT input has reset (0.100-60.000) s ±0.2% or ±35 ms
“tSlaveDeadTime” whichever is greater
Maximum allowed start pulse duration “tLongStartInh” (0.000-60.000) s ±0.2% or ±15 ms
whichever is greater
Circuit breaker closing pulse duration “tPulse” (0.000-60.000) s ±0.2% or ±15 ms
whichever is greater
Reclaim time ”tReclaim” (0.00-6000.00) s ±0.2% or ±15 ms
whichever is greater
Maximum wait time for release from master “tWaitForMaster” (0.00-6000.00) s ±0.2% or ±15 ms
whichever is greater
Reset time for reclosing inhibit “tInhibit” (0.000-60.000) s ±0.2% or ±45 ms
whichever is greater
Wait time after close command before proceeding to next (0.000-60.000) s ±0.2% or ±45 ms
shot “tAutoContWait” whichever is greater
Maximum wait time for fulfilled synchrocheck conditions (0.00-6000.00) s ±0.2% or ±45 ms
“tSync” whichever is greater
Delay time before indicating successful reclosing (0.000-60.000) s ±0.2% or ±50 ms
“tSuccessful” whichever is greater
Maximum wait time for circuit breaker closing before (0.00-6000.00) s ±0.2% or ±45 ms
indicating unsuccessful “tUnsucCl” whichever is greater

16.3 Interlocking IP15572-1 v2

16.3.1 Functionality M15106-3 v7

The interlocking functionality blocks the possibility to operate high-voltage switching devices, for
instance when a disconnector is under load, in order to prevent material damage and/or accidental
human injury.

Each control IED has interlocking functions for different switchyard arrangements, each handling the
interlocking of one bay. The interlocking functionality in each IED is not dependent on any central
function. For the station-wide interlocking, the IEDs communicate via the station bus or by using hard
wired binary inputs/outputs.

The interlocking conditions depend on the circuit configuration and status of the system at any given
time.

Transformer protection RET670 897

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.3.2 Operation principle M13528-4 v7

The interlocking function consists of software modules located in each control IED. The function is
distributed and not dependent on any central function. Communication between modules in different
bays is performed via the station bus.

The reservation function (see section "Functionality") is used to ensure that HV apparatuses that
might affect the interlock are blocked during the time gap, which arises between position updates.
This can be done by means of the communication system, reserving all HV apparatuses that might
influence the interlocking condition of the intended operation. The reservation is maintained until the
operation is performed.

After the selection and reservation of an apparatus, the function has complete data on the status of
all apparatuses in the switchyard that are affected by the selection. Other operators cannot interfere
with the reserved apparatus or the status of switching devices that may affect it.

The open or closed positions of the HV apparatuses are inputs to software modules distributed in the
control IEDs. Each module contains the interlocking logic for a bay. The interlocking logic in a module
is different, depending on the bay function and the switchyard arrangements, that is, double-breaker
or 1 1/2 breaker bays have different modules. Specific interlocking conditions and connections
between standard interlocking modules are performed with an engineering tool. Bay-level interlocking
signals can include the following kind of information:

• Positions of HV apparatuses (sometimes per phase)

• Valid positions (if evaluated in the control module)
• External release (to add special conditions for release)
• Line voltage (to block operation of line earthing switch)
• Output signals to release the HV apparatus

The interlocking module is connected to the surrounding functions within a bay as shown in figure
529.

Apparatus control
Interlocking
modules
modules in
SCILO SCSWI
other bays SXSWI

Apparatus control
modules
Interlocking SCILO SCSWI SXCBR
module

Apparatus control
modules
en04000526.vsd SCILO SCSWI SXSWI

IEC04000526 V1 EN-US

Figure 529: Interlocking module on bay level

Bays communicate via the station bus and can convey information regarding the following:

• Unearthed busbars
• Busbars connected together
• Other bays connected to a busbar
• Received data from other bays is valid

Figure 530 illustrates the data exchange principle.

898 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Station bus

Bay 1 Bay n Bus coupler

Disc QB1 and QB2 closed Disc QB1 and QB2 closed WA1 unearthed
WA1 unearthed
WA1 and WA2 interconn

...
WA1 not earthed WA1 not earthed
WA2 not earthed WA2 not earthed WA1 and WA2 interconn
WA1 and WA2 interconn WA1 and WA2 interconn in other bay

..
WA1

WA2
QB1 QB2 QB1 QB2 QB1 QB2 QC1 QC2

QA1 QA1 QA1

QB9 QB9

en05000494.vsd
IEC05000494 V1 EN-US

Figure 530: Data exchange between interlocking modules

When invalid data such as intermediate position, loss of a control IED, or input board error are used
as conditions for the interlocking condition in a bay, a release for execution of the function will not be
given.

On the local HMI an override function exists, which can be used to bypass the interlocking function in
cases where not all the data required for the condition is valid.

For all interlocking modules these general rules apply:

• The interlocking conditions for opening or closing of disconnectors and earthing switches are
always identical.
• Earthing switches on the line feeder end, for example, rapid earthing switches, are normally
interlocked only with reference to the conditions in the bay where they are located, not with
reference to switches on the other side of the line. So a line voltage indication may be included
into line interlocking modules. If there is no line voltage supervision within the bay, then the
appropriate inputs must be set to no voltage, and the operator must consider this when
operating.
• Earthing switches can only be operated on isolated sections for example, without load/voltage.
Circuit breaker contacts cannot be used to isolate a section, that is, the status of the circuit
breaker is irrelevant as far as the earthing switch operation is concerned.
• Disconnectors cannot break power current or connect different voltage systems. Disconnectors
in series with a circuit breaker can only be operated if the circuit breaker is open, or if the
disconnectors operate in parallel with other closed connections. Other disconnectors can be
operated if one side is completely isolated, or if the disconnectors operate in parallel to other
closed connections, or if they are earthed on both sides.
• Circuit breaker closing is only interlocked against running disconnectors in its bay or additionally
in a transformer bay against the disconnectors and earthing switch on the other side of the
transformer, if there is no disconnector between CB and transformer.
• Circuit breaker opening is only interlocked in a bus-coupler bay, if a bus bar transfer is in
progress.

To make the implementation of the interlocking function easier, a number of standardized and tested
software interlocking modules containing logic for the interlocking conditions are available:

• Line for double and transfer busbars, ABC_LINE

• Bus for double and transfer busbars, ABC_BC
• Transformer bay for double busbars, AB_TRAFO
• Bus-section breaker for double busbars, A1A2_BS
• Bus-section disconnector for double busbars, A1A2_DC

Transformer protection RET670 899

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

• Busbar earthing switch, BB_ES

• Double CB Bay, DB_BUS_A, DB_LINE, DB_BUS_B
• 1 1/2-CB diameter, BH_LINE_A, BH_CONN, BH_LINE_B

The interlocking conditions can be altered, to meet the customer specific requirements, by adding
configurable logic by means of the graphical configuration tool PCM600. The inputs Qx_EXy on the
interlocking modules are used to add these specific conditions.

The input signals EXDU_xx shall be set to true if there is no transmission error at the transfer of
information from other bays. Required signals with designations ending in TR are intended for
transfer to other bays.

16.3.3 Logical node for interlocking SCILO IP14138-1 v2

16.3.3.1 Identification
GUID-3EC5D7F1-FDA0-4F0E-9391-08D357689E0C v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Logical node for interlocking SCILO - 3

16.3.3.2 Functionality M15048-3 v7

The Logical node for interlocking SCILO function is used to enable a switching operation if the
interlocking conditions permit. SCILO function itself does not provide any interlocking functionality.
The interlocking conditions are generated in separate function blocks containing the interlocking
logic.

16.3.3.3 Function block M15049-3 v6

SCILO
POSOPEN EN_OPEN
POSCLOSE EN_CLOSE
OPEN_EN
CLOSE_EN

IEC05000359-2-en.vsd
IEC05000359 V2 EN-US

Figure 531: SCILO function block

16.3.3.4 Signals
PID-3487-INPUTSIGNALS v7

Table 573: SCILO Input signals

Name Type Default Description

POSOPEN BOOLEAN 0 Open position of switch device
POSCLOSE BOOLEAN 0 Closed position of switch device
OPEN_EN BOOLEAN 0 Open operation from interlocking logic is enabled
CLOSE_EN BOOLEAN 0 Close operation from interlocking logic is enabled

900 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

PID-3487-OUTPUTSIGNALS v7

Table 574: SCILO Output signals

Name Type Description

EN_OPEN BOOLEAN Open operation at closed or interm. or bad pos. is enabled
EN_CLOSE BOOLEAN Close operation at open or interm. or bad pos. is enabled

16.3.3.5 Logic diagram M15086-3 v6

The function contains logic to enable the open and close commands respectively if the interlocking
conditions are fulfilled. That means also, if the switch has a defined end position for example, open,
then the appropriate enable signal (in this case EN_OPEN) is false. The enable signals EN_OPEN
and EN_CLOSE can be true at the same time only in the intermediate and bad position state and if
they are enabled by the interlocking function. The position inputs come from the logical nodes Circuit
breaker/Circuit switch (SXCBR/SXSWI) and the enable signals come from the interlocking logic. The
outputs are connected to the logical node Switch controller (SCSWI). One instance per switching
device is needed.

POSOPEN SCILO
POSCLOSE =1 1
EN_OPEN
&
>1
&

OPEN_EN
CLOSE_EN & EN_CLOSE
>1
&
en04000525.vsd

IEC04000525 V1 EN-US

Figure 532: SCILO function logic diagram

16.3.4 Interlocking for busbar earthing switch BB_ES IP14164-1 v4

16.3.4.1 Identification
GUID-F3CBAFDC-3723-429F-9183-45229A6F0A12 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Interlocking for busbar earthing switch BB_ES - 3

16.3.4.2 Functionality M15015-3 v7

The interlocking for busbar earthing switch (BB_ES) function is used for one busbar earthing switch
on any busbar parts according to figure 533.

Transformer protection RET670 901

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

QC

en04000504.vsd
IEC04000504 V1 EN-US

Figure 533: Switchyard layout BB_ES

16.3.4.3 Function block M15069-3 v6

BB_ES
QC_OP QCREL
QC_CL QCITL
BB_DC_OP BBESOPTR
VP_BB_DC BBESCLTR
EXDU_BB

IEC05000347-2-en.vsd
IEC05000347 V2 EN-US

Figure 534: BB_ES function block

16.3.4.4 Logic diagram M15103-3 v4

BB_ES
VP_BB_DC QCREL
BB_DC_OP QCITL
EXDU_BB & 1

QC_OP BBESOPTR
QC_CL BBESCLTR
en04000546.vsd

IEC04000546 V1 EN-US

16.3.4.5 Signals
PID-3494-INPUTSIGNALS v10

Table 575: BB_ES Input signals

Name Type Default Description

QC_OP BOOLEAN 0 Busbar earthing switch QC is in open position
QC_CL BOOLEAN 0 Busbar earthing switch QC is in closed position
BB_DC_OP BOOLEAN 0 All disconnectors on this busbar part are open
VP_BB_DC BOOLEAN 0 Status for all disconnectors on this busbar part are valid
EXDU_BB BOOLEAN 0 No transm error from bays with disc on this busbar part

PID-3494-OUTPUTSIGNALS v10

Table 576: BB_ES Output signals

Name Type Description

QCREL BOOLEAN Switching of QC is allowed
QCITL BOOLEAN Switching of QC is forbidden
BBESOPTR BOOLEAN QC on this busbar part is in open position
BBESCLTR BOOLEAN QC on this busbar part is in closed position

902 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.3.5 Interlocking for bus-section breaker A1A2_BS IP14154-1 v2

16.3.5.1 Identification
GUID-29EF1F25-E10A-4C82-A6B7-FA246D9C6CD2 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Interlocking for bus-section breaker A1A2_BS - 3

16.3.5.2 Functionality M15110-3 v7

The interlocking for bus-section breaker (A1A2_BS) function is used for one bus-section circuit
breaker between section 1 and 2 according to figure 535. The function can be used for different
busbars, which includes a bus-section circuit breaker.

WA1 (A1) WA2 (A2)

QC1 QB1 QB2 QC2

QA1

QC3 QC4

en04000516.vsd
A1A2_BS
IEC04000516 V1 EN-US

Figure 535: Switchyard layout A1A2_BS

Transformer protection RET670 903

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.3.5.3 Function block M13535-3 v6

A1A2_BS
QA1_OP QA1OPREL
QA1_CL QA1OPITL
QB1_OP QA1CLREL
QB1_CL QA1CLITL
QB2_OP QB1REL
QB2_CL QB1ITL
QC3_OP QB2REL
QC3_CL QB2ITL
QC4_OP QC3REL
QC4_CL QC3ITL
S1QC1_OP QC4REL
S1QC1_CL QC4ITL
S2QC2_OP S1S2OPTR
S2QC2_CL S1S2CLTR
BBTR_OP QB1OPTR
VP_BBTR QB1CLTR
EXDU_12 QB2OPTR
EXDU_ES QB2CLTR
QA1O_EX1 VPS1S2TR
QA1O_EX2 VPQB1TR
QA1O_EX3 VPQB2TR
QB1_EX1
QB1_EX2
QB2_EX1
QB2_EX2

IEC05000348-2-en.vsd
IEC05000348 V2 EN-US

Figure 536: A1A2_BS function block

16.3.5.4 Logic diagram M15098-3 v4

A1A2_BS
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB2_OP
QB2_CL =1 VPQB2
QC3_OP
QC3_CL =1 VPQC3
QC4_OP
QC4_CL =1 VPQC4
S1QC1_OP
S1QC1_CL =1 VPS1QC1
S2QC2_OP
S2QC2_CL =1 VPS2QC2
VPQB1
QB1_OP QA1OPREL
& >1
QA1O_EX1 QA1OPITL
1
VPQB2
QB2_OP
&
QA1O_EX2
VP_BBTR
BBTR_OP
&
EXDU_12
QA1O_EX3

VPQB1 QA1CLREL
VPQB2 & QA1CLITL
1
VPQA1
VPQC3 QB1REL
& >1
VPQC4 QB1ITL
1
VPS1QC1
QA1_OP
QC3_OP
QC4_OP
S1QC1_OP
EXDU_ES
QB1_EX1

VPQC3
VPS1QC1
&
QC3_CL
S1QC1_CL
EXDU_ES
QB1_EX2

en04000542.vsd

IEC04000542 V1 EN-US

904 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

VPQA1
VPQC3 QB2REL
VPQC4 & >1
QB2ITL
VPS2QC2 1
QA1_OP
QC3_OP
QC4_OP
S2QC2_OP
EXDU_ES
QB2_EX1
VPQC4
VPS2QC2
&
QC4_CL
S2QC2_CL
EXDU_ES
QB2_EX2

VPQB1 QC3REL
VPQB2 QC3ITL
QB1_OP & 1
QC4REL
QB2_OP
QC4ITL
1

QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR

QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB1_OP S1S2OPTR
QB2_OP >1 S1S2CLTR
QA1_OP 1
VPQB1
VPS1S2TR
VPQB2 &
VPQA1
en04000543.vsd

IEC04000543 V1 EN-US

16.3.5.5 Signals
PID-3498-INPUTSIGNALS v9

Table 577: A1A2_BS Input signals

Name Type Default Description

QA1_OP BOOLEAN 0 QA1 is in open position
QA1_CL BOOLEAN 0 QA1 is in closed position
QB1_OP BOOLEAN 0 QB1 is in open position
QB1_CL BOOLEAN 0 QB1 is in closed position
QB2_OP BOOLEAN 0 QB2 is in open position
QB2_CL BOOLEAN 0 QB2 is in closed position
QC3_OP BOOLEAN 0 QC3 is in open position
QC3_CL BOOLEAN 0 QC3 is in closed position
QC4_OP BOOLEAN 0 QC4 is in open position
QC4_CL BOOLEAN 0 QC4 is in closed position
S1QC1_OP BOOLEAN 0 QC1 on bus section 1 is in open position
S1QC1_CL BOOLEAN 0 QC1 on bus section 1 is in closed position
S2QC2_OP BOOLEAN 0 QC2 on bus section 2 is in open position
S2QC2_CL BOOLEAN 0 QC2 on bus section 2 is in closed position
BBTR_OP BOOLEAN 0 No busbar transfer is in progress
VP_BBTR BOOLEAN 0 Status are valid for app. involved in the busbar transfer
EXDU_12 BOOLEAN 0 No transm error from any bay connected to busbar 1 and 2
EXDU_ES BOOLEAN 0 No transm error from bays containing earth. sw. QC1 or QC2
QA1O_EX1 BOOLEAN 0 External open condition for apparatus QA1
Table continues on next page

Transformer protection RET670 905

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Name Type Default Description

QA1O_EX2 BOOLEAN 0 External open condition for apparatus QA1
QA1O_EX3 BOOLEAN 0 External open condition for apparatus QA1
QB1_EX1 BOOLEAN 0 External condition for apparatus QB1
QB1_EX2 BOOLEAN 0 External condition for apparatus QB1
QB2_EX1 BOOLEAN 0 External condition for apparatus QB2
QB2_EX2 BOOLEAN 0 External condition for apparatus QB2

PID-3498-OUTPUTSIGNALS v9

Table 578: A1A2_BS Output signals

Name Type Description

QA1OPREL BOOLEAN Opening of QA1 is allowed
QA1OPITL BOOLEAN Opening of QA1 is forbidden
QA1CLREL BOOLEAN Closing of QA1 is allowed
QA1CLITL BOOLEAN Closing of QA1 is forbidden
QB1REL BOOLEAN Switching of QB1 is allowed
QB1ITL BOOLEAN Switching of QB1 is forbidden
QB2REL BOOLEAN Switching of QB2 is allowed
QB2ITL BOOLEAN Switching of QB2 is forbidden
QC3REL BOOLEAN Switching of QC3 is allowed
QC3ITL BOOLEAN Switching of QC3 is forbidden
QC4REL BOOLEAN Switching of QC4 is allowed
QC4ITL BOOLEAN Switching of QC4 is forbidden
S1S2OPTR BOOLEAN No bus section connection between bus section 1 and 2
S1S2CLTR BOOLEAN Bus coupler connection between bus section 1 and 2 exists
QB1OPTR BOOLEAN QB1 is in open position
QB1CLTR BOOLEAN QB1 is in closed position
QB2OPTR BOOLEAN QB2 is in open position
QB2CLTR BOOLEAN QB2 is in closed position
VPS1S2TR BOOLEAN Status of the app. between bus section 1 and 2 are valid
VPQB1TR BOOLEAN Switch status of QB1 is valid (open or closed)
VPQB2TR BOOLEAN Switch status of QB2 is valid (open or closed)

16.3.6 Interlocking for bus-section disconnector A1A2_DC IP14159-1 v2

16.3.6.1 Identification
GUID-0A0229EB-5ECD-405C-B706-6A54CBBDB49D v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Interlocking for bus-section A1A2_DC - 3
disconnector

906 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.3.6.2 Functionality M13544-3 v7

The interlocking for bus-section disconnector (A1A2_DC) function is used for one bus-section
disconnector between section 1 and 2 according to figure 537. A1A2_DC function can be used for
different busbars, which includes a bus-section disconnector.

QB
WA1 (A1) WA2 (A2)

QC1 QC2

A1A2_DC en04000492.vsd

IEC04000492 V1 EN-US

Figure 537: Switchyard layout A1A2_DC

16.3.6.3 Function block M13541-3 v6

A1A2_DC
QB_OP QBOPREL
QB_CL QBOPITL
S1QC1_OP QBCLREL
S1QC1_CL QBCLITL
S2QC2_OP DCOPTR
S2QC2_CL DCCLTR
S1DC_OP VPDCTR
S2DC_OP
VPS1_DC
VPS2_DC
EXDU_ES
EXDU_BB
QBCL_EX1
QBCL_EX2
QBOP_EX1
QBOP_EX2
QBOP_EX3

IEC05000349-2-en.vsd
IEC05000349 V2 EN-US

Figure 538: A1A2_DC function block

Transformer protection RET670 907

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.3.6.4 Logic diagram M15099-3 v5

A1A2_DC
QB_OP
VPQB VPDCTR
QB_CL =1
DCOPTR
DCCLTR
S1QC1_OP
VPS1QC1
S1QC1_CL =1
S2QC2_OP
VPS2QC2
S2QC2_CL =1
VPS1QC1
VPS2QC2
VPS1_DC & >1 QBOPREL
S1QC1_OP QBOPITL
1
S2QC2_OP
S1DC_OP
EXDU_ES

EXDU_BB
QBOP_EX1

VPS1QC1
VPS2QC2
VPS2_DC &
S1QC1_OP
S2QC2_OP
S2DC_OP
EXDU_ES

EXDU_BB
QBOP_EX2

VPS1QC1
VPS2QC2
S1QC1_CL &
S2QC2_CL
EXDU_ES
QBOP_EX3

en04000544.vsd

IEC04000544 V1 EN-US

IEC04000545 V1 EN-US

16.3.6.5 Signals
PID-3499-INPUTSIGNALS v10

Table 579: A1A2_DC Input signals

Name Type Default Description

QB_OP BOOLEAN 0 QB is in open position
QB_CL BOOLEAN 0 QB is in closed position
S1QC1_OP BOOLEAN 0 QC1 on bus section 1 is in open position
S1QC1_CL BOOLEAN 0 QC1 on bus section 1 is in closed position
S2QC2_OP BOOLEAN 0 QC2 on bus section 2 is in open position
S2QC2_CL BOOLEAN 0 QC2 on bus section 2 is in closed position
Table continues on next page

908 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Name Type Default Description

S1DC_OP BOOLEAN 0 All disconnectors on bus section 1 are in open position
S2DC_OP BOOLEAN 0 All disconnectors on bus section 2 are in open position
VPS1_DC BOOLEAN 0 Switch status of disconnectors on bus section 1 are valid
VPS2_DC BOOLEAN 0 Switch status of disconnectors on bus section 2 are valid
EXDU_ES BOOLEAN 0 No transm error from bays containing earth. sw. QC1 or QC2
EXDU_BB BOOLEAN 0 No transm error from bays with disc conn to section 1 and 2
QBCL_EX1 BOOLEAN 0 External close condition for section disconnector QB
QBCL_EX2 BOOLEAN 0 External close condition for section disconnector QB
QBOP_EX1 BOOLEAN 0 External open condition for section disconnector QB
QBOP_EX2 BOOLEAN 0 External open condition for section disconnector QB
QBOP_EX3 BOOLEAN 0 External open condition for section disconnector QB

PID-3499-OUTPUTSIGNALS v10

Table 580: A1A2_DC Output signals

Name Type Description

QBOPREL BOOLEAN Opening of QB is allowed
QBOPITL BOOLEAN Opening of QB is forbidden
QBCLREL BOOLEAN Closing of QB is allowed
QBCLITL BOOLEAN Closing of QB is forbidden
DCOPTR BOOLEAN The bus section disconnector is in open position
DCCLTR BOOLEAN The bus section disconnector is in closed position
VPDCTR BOOLEAN Switch status of QB is valid (open or closed)

16.3.7 Interlocking for bus-coupler bay ABC_BC IP14144-1 v2

16.3.7.1 Identification
GUID-8149EE0A-E2A4-431C-9D07-D1A0BD296743 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Interlocking for bus-coupler bay ABC_BC - 3

16.3.7.2 Functionality M13555-3 v8

The interlocking for bus-coupler bay (ABC_BC) function is used for a bus-coupler bay connected to a
double busbar arrangement according to figure 539. The function can also be used for a single
busbar arrangement with transfer busbar or double busbar arrangement without transfer busbar.

Transformer protection RET670 909

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

WA1 (A)
WA2 (B)
WA7 (C)
QB1 QB2 QB20 QB7
QC1

QA1

QC2

en04000514.vsd
IEC04000514 V1 EN-US

Figure 539: Switchyard layout ABC_BC

16.3.7.3 Function block M13552-3 v6

ABC_BC
QA1_OP QA1OPREL
QA1_CL QA1OPITL
QB1_OP QA1CLREL
QB1_CL QA1CLITL
QB2_OP QB1REL
QB2_CL QB1ITL
QB7_OP QB2REL
QB7_CL QB2ITL
QB20_OP QB7REL
QB20_CL QB7ITL
QC1_OP QB20REL
QC1_CL QB20ITL
QC2_OP QC1REL
QC2_CL QC1ITL
QC11_OP QC2REL
QC11_CL QC2ITL
QC21_OP QB1OPTR
QC21_CL QB1CLTR
QC71_OP QB220OTR
QC71_CL QB220CTR
BBTR_OP QB7OPTR
BC_12_CL QB7CLTR
VP_BBTR QB12OPTR
VP_BC_12 QB12CLTR
EXDU_ES BC12OPTR
EXDU_12 BC12CLTR
EXDU_BC BC17OPTR
QA1O_EX1 BC17CLTR
QA1O_EX2 BC27OPTR
QA1O_EX3 BC27CLTR
QB1_EX1 VPQB1TR
QB1_EX2 VQB220TR
QB1_EX3 VPQB7TR
QB2_EX1 VPQB12TR
QB2_EX2 VPBC12TR
QB2_EX3 VPBC17TR
QB20_EX1 VPBC27TR
QB20_EX2
QB7_EX1
QB7_EX2

IEC05000350-2-en.vsd
IEC05000350 V2 EN-US

Figure 540: ABC_BC function block

910 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.3.7.4 Logic diagram M15095-3 v4

ABC_BC
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB20_OP
QB20_CL =1 VPQB20
QB7_OP
QB7_CL =1 VPQB7
QB2_OP
QB2_CL =1 VPQB2
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
QC71_OP
QC71_CL =1 VPQC71
VPQB1
QB1_OP QA1OPREL
& >1 QA1OPITL
QA1O_EX1 1
VPQB20
QB20_OP &
QA1O_EX2
VP_BBTR
BBTR_OP &
EXDU_12
QA1O_EX3
VPQB1 QA1CLREL
VPQB2 QA1CLITL
VPQB7 & 1
VPQB20
en04000533.vsd

IEC04000533 V1 EN-US

VPQA1
VPQB2 QB1REL
& >1
VPQC1 QB1ITL
VPQC2 1
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2
VP_BC_12
&
QB2_CL
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX3

en04000534.vsd

IEC04000534 V1 EN-US

Transformer protection RET670 911

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

VPQA1
VPQB1 QB2REL
& >1
VPQC1 QB2ITL
VPQC2 1
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1
VP_BC_12
&
QB1_CL
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1
VPQC21
&
QC1_CL
QC21_CL
EXDU_ES
QB2_EX3

en04000535.vsd

IEC04000535 V1 EN-US

VPQA1
VPQB20 QB7REL
& >1
VPQC1 QB7ITL
VPQC2 1
VPQC71
QA1_OP
QB20_OP
QC1_OP
QC2_OP
QC71_OP
EXDU_ES
QB7_EX1
VPQC2
VPQC71
&
QC2_CL
QC71_CL
EXDU_ES
QB7_EX2
VPQA1
VPQB7 QB20REL
& >1
VPQC1 QB20ITL
VPQC2 1
VPQC21
QA1_OP
QB7_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB20_EX1
VPQC2
VPQC21
&
QC2_CL
QC21_CL
EXDU_ES
QB20_EX2

en04000536.vsd

IEC04000536 V1 EN-US

912 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

VPQB1 QC1REL
VPQB20 QC1ITL
& 1
VPQB7
QC2REL
VPQB2
QB1_OP QC2ITL
1
QB20_OP
QB7_OP
QB2_OP
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB20_OP QB220OTR
QB2_OP & QB220CTR
VPQB20 1
VQB220TR
VPQB2 &
QB7_OP QB7OPTR
QB7_CL QB7CLTR
VPQB7 VPQB7TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
QA1_OP BC12OPTR
QB1_OP >1 BC12CLTR
QB20_OP 1
VPQA1
VPBC12TR
VPQB1 &
VPQB20
QA1_OP BC17OPTR
QB1_OP >1 BC17CLTR
QB7_OP 1
VPQA1
VPBC17TR
VPQB1 &
VPQB7
QA1_OP BC27OPTR
QB2_OP >1 BC27CLTR
QB7_OP 1
VPQA1
VPBC27TR
VPQB2 &
VPQB7
en04000537.vsd

IEC04000537 V1 EN-US

16.3.7.5 Signals
PID-3500-INPUTSIGNALS v9

Table 581: ABC_BC Input signals

Name Type Default Description

QA1_OP BOOLEAN 0 QA1 is in open position
QA1_CL BOOLEAN 0 QA1 is in closed position
QB1_OP BOOLEAN 0 QB1 is in open position
QB1_CL BOOLEAN 0 QB1 is in closed position
QB2_OP BOOLEAN 0 QB2 is in open position
QB2_CL BOOLEAN 0 QB2 is in closed position
QB7_OP BOOLEAN 0 QB7 is in open position
QB7_CL BOOLEAN 0 QB7 is in closed position
QB20_OP BOOLEAN 0 QB20 is in open position
QB20_CL BOOLEAN 0 QB20 is in closed position
QC1_OP BOOLEAN 0 QC1 is in open position
QC1_CL BOOLEAN 0 QC1 is in closed position
QC2_OP BOOLEAN 0 QC2 is in open position
QC2_CL BOOLEAN 0 QC2 is in closed position
QC11_OP BOOLEAN 0 Earthing switch QC11 on busbar WA1 is in open position
QC11_CL BOOLEAN 0 Earthing switch QC11 on busbar WA1 is in closed position
QC21_OP BOOLEAN 0 Earthing switch QC21 on busbar WA2 is in open position
QC21_CL BOOLEAN 0 Earthing switch QC21 on busbar WA2 is in closed position
Table continues on next page

Transformer protection RET670 913

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Name Type Default Description

QC71_OP BOOLEAN 0 Earthing switch QC71 on busbar WA7 is in open position
QC71_CL BOOLEAN 0 Earthing switch QC71 on busbar WA7 is in closed position
BBTR_OP BOOLEAN 0 No busbar transfer is in progress
BC_12_CL BOOLEAN 0 A bus coupler connection exists between busbar WA1 and WA2
VP_BBTR BOOLEAN 0 Status are valid for app. involved in the busbar transfer
VP_BC_12 BOOLEAN 0 Status of the bus coupler app. between WA1 and WA2 are valid
EXDU_ES BOOLEAN 0 No transm error from any bay containing earthing switches
EXDU_12 BOOLEAN 0 No transm error from any bay connected to WA1/WA2 busbars
EXDU_BC BOOLEAN 0 No transmission error from any other bus coupler bay
QA1O_EX1 BOOLEAN 0 External open condition for apparatus QA1
QA1O_EX2 BOOLEAN 0 External open condition for apparatus QA1
QA1O_EX3 BOOLEAN 0 External open condition for apparatus QA1
QB1_EX1 BOOLEAN 0 External condition for apparatus QB1
QB1_EX2 BOOLEAN 0 External condition for apparatus QB1
QB1_EX3 BOOLEAN 0 External condition for apparatus QB1
QB2_EX1 BOOLEAN 0 External condition for apparatus QB2
QB2_EX2 BOOLEAN 0 External condition for apparatus QB2
QB2_EX3 BOOLEAN 0 External condition for apparatus QB2
QB20_EX1 BOOLEAN 0 External condition for apparatus QB20
QB20_EX2 BOOLEAN 0 External condition for apparatus QB20
QB7_EX1 BOOLEAN 0 External condition for apparatus QB7
QB7_EX2 BOOLEAN 0 External condition for apparatus QB7

PID-3500-OUTPUTSIGNALS v9

Table 582: ABC_BC Output signals

Name Type Description

QA1OPREL BOOLEAN Opening of QA1 is allowed
QA1OPITL BOOLEAN Opening of QA1 is forbidden
QA1CLREL BOOLEAN Closing of QA1 is allowed
QA1CLITL BOOLEAN Closing of QA1 is forbidden
QB1REL BOOLEAN Switching of QB1 is allowed
QB1ITL BOOLEAN Switching of QB1 is forbidden
QB2REL BOOLEAN Switching of QB2 is allowed
QB2ITL BOOLEAN Switching of QB2 is forbidden
QB7REL BOOLEAN Switching of QB7 is allowed
QB7ITL BOOLEAN Switching of QB7 is forbidden
QB20REL BOOLEAN Switching of QB20 is allowed
QB20ITL BOOLEAN Switching of QB20 is forbidden
QC1REL BOOLEAN Switching of QC1 is allowed
QC1ITL BOOLEAN Switching of QC1 is forbidden
QC2REL BOOLEAN Switching of QC2 is allowed
QC2ITL BOOLEAN Switching of QC2 is forbidden
Table continues on next page

914 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Name Type Description

QB1OPTR BOOLEAN QB1 is in open position
QB1CLTR BOOLEAN QB1 is in closed position
QB220OTR BOOLEAN QB2 and QB20 are in open position
QB220CTR BOOLEAN QB2 or QB20 or both are not in open position
QB7OPTR BOOLEAN QB7 is in open position
QB7CLTR BOOLEAN QB7 is in closed position
QB12OPTR BOOLEAN QB1 or QB2 or both are in open position
QB12CLTR BOOLEAN QB1 and QB2 are not in open position
BC12OPTR BOOLEAN No connection via the own bus coupler between WA1 and WA2
BC12CLTR BOOLEAN Conn. exists via the own bus coupler between WA1 and WA2
BC17OPTR BOOLEAN No connection via the own bus coupler between WA1 and WA7
BC17CLTR BOOLEAN Conn. exists via the own bus coupler between WA1 and WA7
BC27OPTR BOOLEAN No connection via the own bus coupler between WA2 and WA7
BC27CLTR BOOLEAN Conn. exists via the own bus coupler between WA2 and WA7
VPQB1TR BOOLEAN Switch status of QB1 is valid (open or closed)
VQB220TR BOOLEAN Switch status of QB2 and QB20 are valid (open or closed)
VPQB7TR BOOLEAN Switch status of QB7 is valid (open or closed)
VPQB12TR BOOLEAN Switch status of QB1 and QB2 are valid (open or closed)
VPBC12TR BOOLEAN Status of the bus coupler app. between WA1 and WA2 are valid
VPBC17TR BOOLEAN Status of the bus coupler app. between WA1 and WA7 are valid
VPBC27TR BOOLEAN Status of the bus coupler app. between WA2 and WA7 are valid

16.3.8 Interlocking for 1 1/2 CB BH IP14173-1 v3

16.3.8.1 Identification
GUID-03F1A3BB-4A1E-49E8-88C6-10B3876F64DA v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Interlocking for 1 1/2 breaker diameter BH_CONN - 3
Interlocking for 1 1/2 breaker diameter BH_LINE_A - 3
Interlocking for 1 1/2 breaker diameter BH_LINE_B - 3

16.3.8.2 Functionality M13570-3 v6

The interlocking for 1 1/2 breaker diameter (BH_CONN, BH_LINE_A, BH_LINE_B) functions are
used for lines connected to a 1 1/2 breaker diameter according to figure 541.

Transformer protection RET670 915

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

WA1 (A)
WA2 (B)
QB1 QB2
QC1 QC1

QA1 QA1

QC2 QC2

QB6 QB6

QC3 QC3
BH_LINE_A BH_LINE_B

QB61 QA1 QB62

QB9 QB9
QC1 QC2
QC9 QC9

BH_CONN
en04000513.vsd

IEC04000513 V1 EN-US

Figure 541: Switchyard layout 1 1/2 breaker

M13570-7 v4
Three types of interlocking modules per diameter are defined. BH_LINE_A and BH_LINE_B are the
connections from a line to a busbar. BH_CONN is the connection between the two lines of the
diameter in the 1 1/2 breaker switchyard layout.

916 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.3.8.3 Function blocks IP14412-1 v1

M13574-3 v6

BH_LINE_A
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB6_OP QB6REL
QB6_CL QB6ITL
QB1_OP QB1REL
QB1_CL QB1ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC3_OP QC3REL
QC3_CL QC3ITL
QB9_OP QB9REL
QB9_CL QB9ITL
QC9_OP QC9REL
QC9_CL QC9ITL
CQA1_OP QB1OPTR
CQA1_CL QB1CLTR
CQB61_OP VPQB1TR
CQB61_CL
CQC1_OP
CQC1_CL
CQC2_OP
CQC2_CL
QC11_OP
QC11_CL
VOLT_OFF
VOLT_ON
EXDU_ES
QB6_EX1
QB6_EX2
QB1_EX1
QB1_EX2
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
QB9_EX6
QB9_EX7

IEC05000352-2-en.vsd
IEC05000352 V2 EN-US

Figure 542: BH_LINE_A function block

Transformer protection RET670 917

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

M13578-3 v6

BH_LINE_B
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB6_OP QB6REL
QB6_CL QB6ITL
QB2_OP QB2REL
QB2_CL QB2ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC3_OP QC3REL
QC3_CL QC3ITL
QB9_OP QB9REL
QB9_CL QB9ITL
QC9_OP QC9REL
QC9_CL QC9ITL
CQA1_OP QB2OPTR
CQA1_CL QB2CLTR
CQB62_OP VPQB2TR
CQB62_CL
CQC1_OP
CQC1_CL
CQC2_OP
CQC2_CL
QC21_OP
QC21_CL
VOLT_OFF
VOLT_ON
EXDU_ES
QB6_EX1
QB6_EX2
QB2_EX1
QB2_EX2
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
QB9_EX6
QB9_EX7

IEC05000353-2-en.vsd
IEC05000353 V2 EN-US

Figure 543: BH_LINE_B function block

M13582-3 v6

BH_CONN
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB61_OP QB61REL
QB61_CL QB61ITL
QB62_OP QB62REL
QB62_CL QB62ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
1QC3_OP
1QC3_CL
2QC3_OP
2QC3_CL
QB61_EX1
QB61_EX2
QB62_EX1
QB62_EX2

IEC05000351-2-en.vsd
IEC05000351 V2 EN-US

Figure 544: BH_CONN function block

918 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.3.8.4 Logic diagrams IP14413-1 v1

M13577-1 v5

BH_CONN
QA1_OP
QA1_CL =1 VPQA1
QB61_OP
QB61_CL =1 VPQB61
QB62_OP
QB62_CL =1 VPQB62
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
1QC3_OP
1QC3_CL =1 VP1QC3
2QC3_OP
2QC3_CL =1 VP2QC3
VPQB61 QA1CLREL
VPQB62 & QA1CLITL
1
VPQA1
VPQC1 QB61REL
& >1
VPQC2 QB61ITL
1
VP1QC3
QA1_OP
QC1_OP
QC2_OP
1QC3_OP
QB61_EX1
VPQC1
VP1QC3
&
QC1_CL
1QC3_CL
QB61_EX2
VPQA1
VPQC1 QB62REL
& >1
VPQC2 QB62ITL
1
VP2QC3
QA1_OP
QC1_OP
QC2_OP
2QC3_OP
QB62_EX1
VPQC2
VP2QC3
&
QC2_CL
2QC3_CL
QB62_EX2
VPQB61 QC1REL
VPQB62 QC1ITL
& 1
QB61_OP QC2REL
QB62_OP QC2ITL
1
en04000560.vsd

IEC04000560 V1 EN-US

Transformer protection RET670 919

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

BH_LINE_A
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB6_OP
QB6_CL =1 VPQB6
QC9_OP
QC9_CL =1 VPQC9
QB9_OP
QB9_CL =1 VPQB9
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
CQA1_OP
CQA1_CL =1 VPCQA1
CQC1_OP
CQC1_CL =1 VPCQC1
CQC2_OP
CQC2_CL =1 VPCQC2
CQB61_OP
CQB61_CL =1 VPCQB61
QC11_OP
QC11_CL =1 VPQC11
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQB1 QA1CLREL
VPQB6 QA1CLITL
& 1
VPQB9
VPQA1
VPQC1 QB6REL
VPQC2 & >1
QB6ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB6_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB6_EX2
en04000554.vsd

IEC04000554 V1 EN-US

VPQA1
VPQC1 QB1REL
VPQC2 & >1
QB1ITL
1
VPQC11
QA1_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1

VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX2

VPQB1 QC1REL
VPQB6 QC1ITL
QB1_OP & 1
QC2REL
QB6_OP QC2ITL
VPQB6 1
VPQB9 QC3REL
VPCQB61 &
QC3ITL
1
QB6_OP
QB9_OP
CQB61_OP
VPQA1 QB9REL
VPQB6 QB9ITL
VPQC9 & >1 1

VPQC1
VPQC2
VPQC3
VPCQA1
VPCQB61
VPCQC1
VPCQC2
QB9_EX1
QB6_OP
QB9_EX2
>1
QA1_OP
QC1_OP
QC2_OP &
QB9_EX3

en04000555.vsd

IEC04000555 V1 EN-US

920 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

CQB61_OP
QB9_EX4
>1 & >1
CQA1_OP
CQC1_OP
CQC2_OP &
QB9_EX5
QC9_OP
QC3_OP
QB9_EX6
VPQC9
VPQC3
&
QC9_CL
QC3_CL
QB9_EX7
VPQB9 QC9REL
VPVOLT QC9ITL
QB9_OP & 1

VOLT_OFF
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
en04000556.vsd

IEC04000556 V1 EN-US

BH_LINE_B
QA1_OP
QA1_CL =1 VPQA1
QB2_OP
QB2_CL =1 VPQB2
QB6_OP
QB6_CL =1 VPQB6
QC9_OP
QC9_CL =1 VPQC9
QB9_OP
QB9_CL =1 VPQB9
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
CQA1_OP
CQA1_CL =1 VPCQA1
CQC1_OP
CQC1_CL =1 VPCQC1
CQC2_OP
CQC2_CL =1 VPCQC2
CQB62_OP
CQB62_CL =1 VPCQB62
QC21_OP
QC21_CL =1 VPQC21
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQB2 QA1CLREL
VPQB6 QA1CLITL
& 1
VPQB9
VPQA1
VPQC1 QB6REL
VPQC2 & >1
QB6ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB6_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB6_EX2
en04000557.vsd

IEC04000557 V1 EN-US

Transformer protection RET670 921

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

VPQA1
VPQC1 QB2REL
VPQC2 & >1
QB2ITL
1
VPQC21
QA1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1

VPQC1
VPQC21
&
QC1_CL
QC21_CL
EXDU_ES
QB2_EX2

VPQB2 QC1REL
VPQB6 QC1ITL
QB2_OP & 1
QC2REL
QB6_OP QC2ITL
VPQB6 1
VPQB9 QC3REL
VPCQB62 &
QC3ITL
1
QB6_OP
QB9_OP
CQB62_OP
VPQA1 QB9REL
VPQB6 QB9ITL
VPQC9 & >1 1

VPQC1
VPQC2
VPQC3
VPCQA1
VPCQB62
VPCQC1
VPCQC2
QB9_EX1
QB6_OP
QB9_EX2
>1
QA1_OP
QC1_OP
QC2_OP &
QB9_EX3

en04000558.vsd

IEC04000558 V1 EN-US

CQB62_OP
QB9_EX4
>1 & >1
CQA1_OP
CQC1_OP
CQC2_OP &
QB9_EX5
QC9_OP
QC3_OP
QB9_EX6
VPQC9
VPQC3
&
QC9_CL
QC3_CL
QB9_EX7
VPQB9 QC9REL
VPVOLT QC9ITL
QB9_OP & 1

VOLT_OFF
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
en04000559.vsd

IEC04000559 V1 EN-US

16.3.8.5 Signals
PID-3593-INPUTSIGNALS v9

Table 583: BH_LINE_A Input signals

Name Type Default Description

QA1_OP BOOLEAN 0 QA1 is in open position
QA1_CL BOOLEAN 0 QA1 is in closed position
QB6_OP BOOLEAN 0 QB6 is in open position
QB6_CL BOOLEAN 0 QB6 is in close position
Table continues on next page

922 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Name Type Default Description

QB1_OP BOOLEAN 0 QB1 is in open position
QB1_CL BOOLEAN 0 QB1 is in closed position
QC1_OP BOOLEAN 0 QC1 is in open position
QC1_CL BOOLEAN 0 QC1 is in closed position
QC2_OP BOOLEAN 0 QC2 is in open position
QC2_CL BOOLEAN 0 QC2 is in closed position
QC3_OP BOOLEAN 0 QC3 is in open position
QC3_CL BOOLEAN 0 QC3 is in closed position
QB9_OP BOOLEAN 0 QB9 is in open position
QB9_CL BOOLEAN 0 QB9 is in closed position
QC9_OP BOOLEAN 0 QC9 is in open position
QC9_CL BOOLEAN 0 QC9 is in closed position
CQA1_OP BOOLEAN 0 QA1 in module BH_CONN is in open position
CQA1_CL BOOLEAN 0 QA1 in module BH_CONN is in closed position
CQB61_OP BOOLEAN 0 QB61 in module BH_CONN is in open position
CQB61_CL BOOLEAN 0 QB61 in module BH_CONN is in closed position
CQC1_OP BOOLEAN 0 QC1 in module BH_CONN is in open position
CQC1_CL BOOLEAN 0 QC1 in module BH_CONN is in closed position
CQC2_OP BOOLEAN 0 QC2 in module BH_CONN is in open position
CQC2_CL BOOLEAN 0 QC2 in module BH_CONN is in closed position
QC11_OP BOOLEAN 0 Earthing switch QC11 on busbar WA1 is in open position
QC11_CL BOOLEAN 0 Earthing switch QC11 on busbar WA1 is in closed position
VOLT_OFF BOOLEAN 0 There is no voltage on line and not VT (fuse) failure
VOLT_ON BOOLEAN 0 There is voltage on the line or there is a VT (fuse) failure
EXDU_ES BOOLEAN 0 No transm error from bay containing earthing switch QC11
QB6_EX1 BOOLEAN 0 External condition for apparatus QB6
QB6_EX2 BOOLEAN 0 External condition for apparatus QB6
QB1_EX1 BOOLEAN 0 External condition for apparatus QB1
QB1_EX2 BOOLEAN 0 External condition for apparatus QB1
QB9_EX1 BOOLEAN 0 External condition for apparatus QB9
QB9_EX2 BOOLEAN 0 External condition for apparatus QB9
QB9_EX3 BOOLEAN 0 External condition for apparatus QB9
QB9_EX4 BOOLEAN 0 External condition for apparatus QB9
QB9_EX5 BOOLEAN 0 External condition for apparatus QB9
QB9_EX6 BOOLEAN 0 External condition for apparatus QB9
QB9_EX7 BOOLEAN 0 External condition for apparatus QB9

Transformer protection RET670 923

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

PID-3593-OUTPUTSIGNALS v9

Table 584: BH_LINE_A Output signals

Name Type Description

QA1CLREL BOOLEAN Closing of QA1 is allowed
QA1CLITL BOOLEAN Closing of QA1 is forbidden
QB6REL BOOLEAN Switching of QB6 is allowed
QB6ITL BOOLEAN Switching of QB6 is forbidden
QB1REL BOOLEAN Switching of QB1 is allowed
QB1ITL BOOLEAN Switching of QB1 is forbidden
QC1REL BOOLEAN Switching of QC1 is allowed
QC1ITL BOOLEAN Switching of QC1 is forbidden
QC2REL BOOLEAN Switching of QC2 is allowed
QC2ITL BOOLEAN Switching of QC2 is forbidden
QC3REL BOOLEAN Switching of QC3 is allowed
QC3ITL BOOLEAN Switching of QC3 is forbidden
QB9REL BOOLEAN Switching of QB9 is allowed
QB9ITL BOOLEAN Switching of QB9 is forbidden
QC9REL BOOLEAN Switching of QC9 is allowed
QC9ITL BOOLEAN Switching of QC9 is forbidden
QB1OPTR BOOLEAN QB1 is in open position
QB1CLTR BOOLEAN QB1 is in closed position
VPQB1TR BOOLEAN Switch status of QB1 is valid (open or closed)

PID-3594-INPUTSIGNALS v9

Table 585: BH_LINE_B Input signals

Name Type Default Description

QA1_OP BOOLEAN 0 QA1 is in open position
QA1_CL BOOLEAN 0 QA1 is in closed position
QB6_OP BOOLEAN 0 QB6 is in open position
QB6_CL BOOLEAN 0 QB6 is in close position
QB2_OP BOOLEAN 0 QB2 is in open position
QB2_CL BOOLEAN 0 QB2 is in closed position
QC1_OP BOOLEAN 0 QC1 is in open position
QC1_CL BOOLEAN 0 QC1 is in closed position
QC2_OP BOOLEAN 0 QC2 is in open position
QC2_CL BOOLEAN 0 QC2 is in closed position
QC3_OP BOOLEAN 0 QC3 is in open position
QC3_CL BOOLEAN 0 QC3 is in closed position
QB9_OP BOOLEAN 0 QB9 is in open position
QB9_CL BOOLEAN 0 QB9 is in closed position
QC9_OP BOOLEAN 0 QC9 is in open position
QC9_CL BOOLEAN 0 QC9 is in closed position
CQA1_OP BOOLEAN 0 QA1 in module BH_CONN is in open position
CQA1_CL BOOLEAN 0 QA1 in module BH_CONN is in closed position
Table continues on next page

924 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Name Type Default Description

CQB62_OP BOOLEAN 0 QB62 in module BH_CONN is in open position
CQB62_CL BOOLEAN 0 QB62 in module BH_CONN is in closed position
CQC1_OP BOOLEAN 0 QC1 in module BH_CONN is in open position
CQC1_CL BOOLEAN 0 QC1 in module BH_CONN is in closed position
CQC2_OP BOOLEAN 0 QC2 in module BH_CONN is in open position
CQC2_CL BOOLEAN 0 QC2 in module BH_CONN is in closed position
QC21_OP BOOLEAN 0 Earthing switch QC21 on busbar WA2 is in open position
QC21_CL BOOLEAN 0 Earthing switch QC21 on busbar WA2 is in closed position
VOLT_OFF BOOLEAN 0 There is no voltage on line and not VT (fuse) failure
VOLT_ON BOOLEAN 0 There is voltage on the line or there is a VT (fuse) failure
EXDU_ES BOOLEAN 0 No transm error from bay containing earthing switch QC21
QB6_EX1 BOOLEAN 0 External condition for apparatus QB6
QB6_EX2 BOOLEAN 0 External condition for apparatus QB6
QB2_EX1 BOOLEAN 0 External condition for apparatus QB2
QB2_EX2 BOOLEAN 0 External condition for apparatus QB2
QB9_EX1 BOOLEAN 0 External condition for apparatus QB9
QB9_EX2 BOOLEAN 0 External condition for apparatus QB9
QB9_EX3 BOOLEAN 0 External condition for apparatus QB9
QB9_EX4 BOOLEAN 0 External condition for apparatus QB9
QB9_EX5 BOOLEAN 0 External condition for apparatus QB9
QB9_EX6 BOOLEAN 0 External condition for apparatus QB9
QB9_EX7 BOOLEAN 0 External condition for apparatus QB9

PID-3594-OUTPUTSIGNALS v9

Table 586: BH_LINE_B Output signals

Name Type Description

QA1CLREL BOOLEAN Closing of QA1 is allowed
QA1CLITL BOOLEAN Closing of QA1 is forbidden
QB6REL BOOLEAN Switching of QB6 is allowed
QB6ITL BOOLEAN Switching of QB6 is forbidden
QB2REL BOOLEAN Switching of QB2 is allowed
QB2ITL BOOLEAN Switching of QB2 is forbidden
QC1REL BOOLEAN Switching of QC1 is allowed
QC1ITL BOOLEAN Switching of QC1 is forbidden
QC2REL BOOLEAN Switching of QC2 is allowed
QC2ITL BOOLEAN Switching of QC2 is forbidden
QC3REL BOOLEAN Switching of QC3 is allowed
QC3ITL BOOLEAN Switching of QC3 is forbidden
QB9REL BOOLEAN Switching of QB9 is allowed
QB9ITL BOOLEAN Switching of QB9 is forbidden
QC9REL BOOLEAN Switching of QC9 is allowed
QC9ITL BOOLEAN Switching of QC9 is forbidden
Table continues on next page

Transformer protection RET670 925

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Name Type Description

QB2OPTR BOOLEAN QB2 is in open position
QB2CLTR BOOLEAN QB2 is in closed position
VPQB2TR BOOLEAN Switch status of QB2 is valid (open or closed)

PID-3501-INPUTSIGNALS v9

Table 587: BH_CONN Input signals

Name Type Default Description

QA1_OP BOOLEAN 0 QA1 is in open position
QA1_CL BOOLEAN 0 QA1 is in closed position
QB61_OP BOOLEAN 0 QB61 is in open position
QB61_CL BOOLEAN 0 QB61 is in closed position
QB62_OP BOOLEAN 0 QB62 is in open position
QB62_CL BOOLEAN 0 QB62 is in closed position
QC1_OP BOOLEAN 0 QC1 is in open position
QC1_CL BOOLEAN 0 QC1 is in closed position
QC2_OP BOOLEAN 0 QC2 is in open position
QC2_CL BOOLEAN 0 QC2 is in closed position
1QC3_OP BOOLEAN 0 QC3 on line 1 is in open position
1QC3_CL BOOLEAN 0 QC3 on line 1 is in closed position
2QC3_OP BOOLEAN 0 QC3 on line 2 is in open position
2QC3_CL BOOLEAN 0 QC3 on line 2 is in closed position
QB61_EX1 BOOLEAN 0 External condition for apparatus QB61
QB61_EX2 BOOLEAN 0 External condition for apparatus QB61
QB62_EX1 BOOLEAN 0 External condition for apparatus QB62
QB62_EX2 BOOLEAN 0 External condition for apparatus QB62

PID-3501-OUTPUTSIGNALS v9

Table 588: BH_CONN Output signals

Name Type Description

QA1CLREL BOOLEAN Closing of QA1 is allowed
QA1CLITL BOOLEAN Closing of QA1 is forbidden
QB61REL BOOLEAN Switching of QB61 is allowed
QB61ITL BOOLEAN Switching of QB61 is forbidden
QB62REL BOOLEAN Switching of QB62 is allowed
QB62ITL BOOLEAN Switching of QB62 is forbidden
QC1REL BOOLEAN Switching of QC1 is allowed
QC1ITL BOOLEAN Switching of QC1 is forbidden
QC2REL BOOLEAN Switching of QC2 is allowed
QC2ITL BOOLEAN Switching of QC2 is forbidden

16.3.9 Interlocking for double CB bay DB IP14167-1 v2

926 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.3.9.1 Identification
GUID-D6D10255-2818-44E4-A44E-DF623161C486 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Interlocking for double CB bay DB_BUS_A - 3
Interlocking for double CB bay DB_BUS_B - 3
Interlocking for double CB bay DB_LINE - 3

16.3.9.2 Functionality M13585-3 v10

The interlocking for a double busbar double circuit breaker bay including DB_BUS_A, DB_BUS_B
and DB_LINE functions are used for a line connected to a double busbar arrangement according to
figure 545.

WA1 (A)
WA2 (B)
QB1 QB2
QC1 QC4

QA1 QA2

DB_BUS_A DB_BUS_B
QC2 QC5

QB61 QB62

QC3

QB9
DB_LINE

QC9

en04000518.vsd
IEC04000518 V1 EN-US

Figure 545: Switchyard layout double circuit breaker

Transformer protection RET670 927

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.3.9.3 Logic diagrams IP14633-1 v1

M15105-1 v4

DB_BUS_A
QA1_OP
QA1_CL =1 VPQA1
QB61_OP
QB61_CL =1 VPQB61
QB1_OP
QB1_CL =1 VPQB1
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
QC11_OP
QC11_CL =1 VPQC11
VPQB61 QA1CLREL
VPQB1 & QA1CLITL
1
VPQA1
VPQC1 QB61REL
& >1
VPQC2 QB61ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB61_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB61_EX2
VPQA1
VPQC1 QB1REL
& >1
VPQC2 QB1ITL
1
VPQC11
QA1_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1

VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX2

en04000547.vsd

IEC04000547 V1 EN-US

VPQB61 QC1REL
VPQB1 QC1ITL
& 1
QB61_OP QC2REL
QB1_OP QC2ITL
1
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
en04000548.vsd

IEC04000548 V1 EN-US

928 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

DB_BUS_B
QA2_OP
QA2_CL =1 VPQA2
QB62_OP
QB62_CL =1 VPQB62
QB2_OP
QB2_CL =1 VPQB2
QC4_OP
QC4_CL =1 VPQC4
QC5_OP
QC5_CL =1 VPQC5
QC3_OP
QC3_CL =1 VPQC3
QC21_OP
QC21_CL =1 VPQC21
VPQB62 QA2CLREL
VPQB2 & QA2CLITL
1
VPQA2
VPQC4 QB62REL
& >1
VPQC5 QB62ITL
1
VPQC3
QA2_OP
QC4_OP
QC5_OP
QC3_OP
QB62_EX1
VPQC5
VPQC3
&
QC5_CL
QC3_CL
QB62_EX2
VPQA2
VPQC4 QB2REL
& >1
VPQC5 QB2ITL
1
VPQC21
QA2_OP
QC4_OP
QC5_OP
QC21_OP
EXDU_ES
QB2_EX1

VPQC4
VPQC21
&
QC4_CL
QC21_CL
EXDU_ES
QB2_EX2

en04000552.vsd

IEC04000552 V1 EN-US

VPQB62 QC4REL
VPQB2 QC4ITL
& 1
QB62_OP QC5REL
QB2_OP QC5ITL
1
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
en04000553.vsd

IEC04000553 V1 EN-US

Transformer protection RET670 929

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

DB_LINE
QA1_OP
QA1_CL =1 VPQA1
QA2_OP
QA2_CL =1 VPQA2
QB61_OP
QB61_CL =1 VPQB61
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QB62_OP
QB62_CL =1 VPQB62
QC4_OP
QC4_CL =1 VPQC4
QC5_OP
QC5_CL =1 VPQC5
QB9_OP
QB9_CL =1 VPQB9
QC3_OP
QC3_CL =1 VPQC3
QC9_OP
QC9_CL =1 VPQC9
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQA1
VPQA2 QB9REL
VPQC1 & >1
QB9ITL
1
VPQC2
VPQC3
VPQC4
VPQC5
VPQC9
QA1_OP
QA2_OP
QC1_OP
QC2_OP
QC3_OP
QC4_OP
QC5_OP
QC9_OP
QB9_EX1

& en04000549.vsd

IEC04000549 V1 EN-US

VPQA1
VPQC1
VPQC2 & >1
VPQC3
VPQC9
VPQB62
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QC9_OP
QB62_OP
QB9_EX2
VPQA2
VPQB61
&
VPQC3
VPQC4
VPQC5
VPQC9
QA2_OP
QB61_OP
QC3_OP
QC4_OP
QC5_OP
QC9_OP
QB9_EX3
VPQC3
VPQC9
&
VPQB61
VPQB62
QC3_OP
QC9_OP
QB61_OP
QB62_OP
QB9_EX4
VPQC3
VPQC9
&
QC3_CL
QC9_CL
QB9_EX5
en04000550.vsd

IEC04000550 V1 EN-US

930 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

VPQB61
VPQB62 QC3REL
VPQB9 &
QC3ITL
1
QB61_OP
QB62_OP
QB9_OP
VPQB9
VPVOLT QC9REL
QB9_OP &
QC9ITL
1
VOLT_OFF
en04000551.vsd

IEC04000551 V1 EN-US

16.3.9.4 Function block IP14391-1 v1

M13591-3 v6

DB_BUS_A
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB1_OP QB61REL
QB1_CL QB61ITL
QB61_OP QB1REL
QB61_CL QB1ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC3_OP QB1OPTR
QC3_CL QB1CLTR
QC11_OP VPQB1TR
QC11_CL
EXDU_ES
QB61_EX1
QB61_EX2
QB1_EX1
QB1_EX2

IEC05000354-2-en.vsd
IEC05000354 V2 EN-US

Figure 546: DB_BUS_A function block

M15107-3 v6

DB_LINE
QA1_OP QB9REL
QA1_CL QB9ITL
QA2_OP QC3REL
QA2_CL QC3ITL
QB61_OP QC9REL
QB61_CL QC9ITL
QC1_OP
QC1_CL
QC2_OP
QC2_CL
QB62_OP
QB62_CL
QC4_OP
QC4_CL
QC5_OP
QC5_CL
QB9_OP
QB9_CL
QC3_OP
QC3_CL
QC9_OP
QC9_CL
VOLT_OFF
VOLT_ON
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5

IEC05000356-2-en.vsd
IEC05000356 V2 EN-US

Figure 547: DB_LINE function block

Transformer protection RET670 931

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

M13596-3 v6

DB_BUS_B
QA2_OP QA2CLREL
QA2_CL QA2CLITL
QB2_OP QB62REL
QB2_CL QB62ITL
QB62_OP QB2REL
QB62_CL QB2ITL
QC4_OP QC4REL
QC4_CL QC4ITL
QC5_OP QC5REL
QC5_CL QC5ITL
QC3_OP QB2OPTR
QC3_CL QB2CLTR
QC21_OP VPQB2TR
QC21_CL
EXDU_ES
QB62_EX1
QB62_EX2
QB2_EX1
QB2_EX2

IEC05000355-2-en.vsd
IEC05000355 V2 EN-US

Figure 548: DB_BUS_B function block

16.3.9.5 Signals
PID-3598-INPUTSIGNALS v9

Table 589: DB_BUS_A Input signals

Name Type Default Description

QA1_OP BOOLEAN 0 QA1 is in open position
QA1_CL BOOLEAN 0 QA1 is in closed position
QB1_OP BOOLEAN 0 QB1 is in open position
QB1_CL BOOLEAN 0 QB1 is in closed position
QB61_OP BOOLEAN 0 QB61 is in open position
QB61_CL BOOLEAN 0 QB61 is in closed position
QC1_OP BOOLEAN 0 QC1 is in open position
QC1_CL BOOLEAN 0 QC1 is in closed position
QC2_OP BOOLEAN 0 QC2 is in open position
QC2_CL BOOLEAN 0 QC2 is in closed position
QC3_OP BOOLEAN 0 QC3 is in open position
QC3_CL BOOLEAN 0 QC3 is in closed position
QC11_OP BOOLEAN 0 Earthing switch QC11 on busbar WA1 is in open position
QC11_CL BOOLEAN 0 Earthing switch QC11 on busbar WA1 is in closed position
EXDU_ES BOOLEAN 0 No transm error from bay containing earthing switch QC11
QB61_EX1 BOOLEAN 0 External condition for apparatus QB61
QB61_EX2 BOOLEAN 0 External condition for apparatus QB61
QB1_EX1 BOOLEAN 0 External condition for apparatus QB1
QB1_EX2 BOOLEAN 0 External condition for apparatus QB1

932 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

PID-3598-OUTPUTSIGNALS v9

Table 590: DB_BUS_A Output signals

Name Type Description

QA1CLREL BOOLEAN Closing of QA1 is allowed
QA1CLITL BOOLEAN Closing of QA1 is forbidden
QB61REL BOOLEAN Switching of QB61 is allowed
QB61ITL BOOLEAN Switching of QB61 is forbidden
QB1REL BOOLEAN Switching of QB1 is allowed
QB1ITL BOOLEAN Switching of QB1 is forbidden
QC1REL BOOLEAN Switching of QC1 is allowed
QC1ITL BOOLEAN Switching of QC1 is forbidden
QC2REL BOOLEAN Switching of QC2 is allowed
QC2ITL BOOLEAN Switching of QC2 is forbidden
QB1OPTR BOOLEAN QB1 is in open position
QB1CLTR BOOLEAN QB1 is in closed position
VPQB1TR BOOLEAN Switch status of QB1 is valid (open or closed)

PID-3601-INPUTSIGNALS v9

Table 591: DB_BUS_B Input signals

Name Type Default Description

QA2_OP BOOLEAN 0 QA2 is in open position
QA2_CL BOOLEAN 0 QA2 is in closed position
QB2_OP BOOLEAN 0 QB2 is in open position
QB2_CL BOOLEAN 0 QB2 is in closed position
QB62_OP BOOLEAN 0 QB62 is in open position
QB62_CL BOOLEAN 0 QB62 is in closed position
QC4_OP BOOLEAN 0 QC4 is in open position
QC4_CL BOOLEAN 0 QC4 is in closed position
QC5_OP BOOLEAN 0 QC5 is in open position
QC5_CL BOOLEAN 0 QC5 is in closed position
QC3_OP BOOLEAN 0 QC3 is in open position
QC3_CL BOOLEAN 0 QC3 is in closed position
QC21_OP BOOLEAN 0 Earthing switch QC21 on busbar WA2 is in open position
QC21_CL BOOLEAN 0 Earthing switch QC21 on busbar WA2 is in closed position
EXDU_ES BOOLEAN 0 No transm error from bay containing earthing switch QC21
QB62_EX1 BOOLEAN 0 External condition for apparatus QB62
QB62_EX2 BOOLEAN 0 External condition for apparatus QB62
QB2_EX1 BOOLEAN 0 External condition for apparatus QB2
QB2_EX2 BOOLEAN 0 External condition for apparatus QB2

Transformer protection RET670 933

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

PID-3601-OUTPUTSIGNALS v9

Table 592: DB_BUS_B Output signals

Name Type Description

QA2CLREL BOOLEAN Closing of QA2 is allowed
QA2CLITL BOOLEAN Closing of QA2 is forbidden
QB62REL BOOLEAN Switching of QB62 is allowed
QB62ITL BOOLEAN Switching of QB62 is forbidden
QB2REL BOOLEAN Switching of QB2 is allowed
QB2ITL BOOLEAN Switching of QB2 is forbidden
QC4REL BOOLEAN Switching of QC4 is allowed
QC4ITL BOOLEAN Switching of QC4 is forbidden
QC5REL BOOLEAN Switching of QC5 is allowed
QC5ITL BOOLEAN Switching of QC5 is forbidden
QB2OPTR BOOLEAN QB2 is in open position
QB2CLTR BOOLEAN QB2 is in closed position
VPQB2TR BOOLEAN Switch status of QB2 is valid (open or closed)

PID-3508-INPUTSIGNALS v10

Table 593: DB_LINE Input signals

Name Type Default Description

QA1_OP BOOLEAN 0 QA1 is in open position
QA1_CL BOOLEAN 0 QA1 is in closed position
QA2_OP BOOLEAN 0 QA2 is in open position
QA2_CL BOOLEAN 0 QA2 is in closed position
QB61_OP BOOLEAN 0 QB61 is in open position
QB61_CL BOOLEAN 0 QB61 is in closed position
QC1_OP BOOLEAN 0 QC1 is in open position
QC1_CL BOOLEAN 0 QC1 is in closed position
QC2_OP BOOLEAN 0 QC2 is in open position
QC2_CL BOOLEAN 0 QC2 is in closed position
QB62_OP BOOLEAN 0 QB62 is in open position
QB62_CL BOOLEAN 0 QB62 is in closed position
QC4_OP BOOLEAN 0 QC4 is in open position
QC4_CL BOOLEAN 0 QC4 is in closed position
QC5_OP BOOLEAN 0 QC5 is in open position
QC5_CL BOOLEAN 0 QC5 is in closed position
QB9_OP BOOLEAN 0 QB9 is in open position
QB9_CL BOOLEAN 0 QB9 is in closed position
QC3_OP BOOLEAN 0 QC3 is in open position
QC3_CL BOOLEAN 0 QC3 is in closed position
QC9_OP BOOLEAN 0 QC9 is in open position
QC9_CL BOOLEAN 0 QC9 is in closed position
VOLT_OFF BOOLEAN 0 There is no voltage on the line and not VT (fuse) failure
VOLT_ON BOOLEAN 0 There is voltage on the line or there is a VT (fuse) failure
Table continues on next page

934 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Name Type Default Description

QB9_EX1 BOOLEAN 0 External condition for apparatus QB9
QB9_EX2 BOOLEAN 0 External condition for apparatus QB9
QB9_EX3 BOOLEAN 0 External condition for apparatus QB9
QB9_EX4 BOOLEAN 0 External condition for apparatus QB9
QB9_EX5 BOOLEAN 0 External condition for apparatus QB9

PID-3508-OUTPUTSIGNALS v10

Table 594: DB_LINE Output signals

Name Type Description

QB9REL BOOLEAN Switching of QB9 is allowed
QB9ITL BOOLEAN Switching of QB9 is forbidden
QC3REL BOOLEAN Switching of QC3 is allowed
QC3ITL BOOLEAN Switching of QC3 is forbidden
QC9REL BOOLEAN Switching of QC9 is allowed
QC9ITL BOOLEAN Switching of QC9 is forbidden

16.3.10 Interlocking for line bay ABC_LINE IP14139-1 v2

16.3.10.1 Identification
GUID-BEA26EA4-F402-4385-9238-1361E862D987 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Interlocking for line bay ABC_LINE - 3

16.3.10.2 Functionality M13561-3 v8

The interlocking for line bay (ABC_LINE) function is used for a line connected to a double busbar
arrangement with a transfer busbar according to figure 549. The function can also be used for a
double busbar arrangement without transfer busbar or a single busbar arrangement with/without
transfer busbar.

WA1 (A)
WA2 (B)
WA7 (C)
QB1 QB2 QB7
QC1

QA1

QC2

QB9
QC9

en04000478.vsd
IEC04000478 V1 EN-US

Figure 549: Switchyard layout ABC_LINE

Transformer protection RET670 935

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.3.10.3 Function block M15108-3 v6

ABC_LINE
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB9_OP QB9REL
QB9_CL QB9ITL
QB1_OP QB1REL
QB1_CL QB1ITL
QB2_OP QB2REL
QB2_CL QB2ITL
QB7_OP QB7REL
QB7_CL QB7ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC9_OP QC9REL
QC9_CL QC9ITL
QC11_OP QB1OPTR
QC11_CL QB1CLTR
QC21_OP QB2OPTR
QC21_CL QB2CLTR
QC71_OP QB7OPTR
QC71_CL QB7CLTR
BB7_D_OP QB12OPTR
BC_12_CL QB12CLTR
BC_17_OP VPQB1TR
BC_17_CL VPQB2TR
BC_27_OP VPQB7TR
BC_27_CL VPQB12TR
VOLT_OFF
VOLT_ON
VP_BB7_D
VP_BC_12
VP_BC_17
VP_BC_27
EXDU_ES
EXDU_BPB
EXDU_BC
QB9_EX1
QB9_EX2
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
QB7_EX1
QB7_EX2
QB7_EX3
QB7_EX4

IEC05000357-2-en.vsd
IEC05000357 V2 EN-US

Figure 550: ABC_LINE function block

936 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.3.10.4 Logic diagram M15089-3 v5

ABC_LINE
QA1_OP
QA1_CL =1 VPQA1
QB9_OP
QB9_CL =1 VPQB9
QA1CLREL
QB1_OP
QB1_CL =1 VPQB1 QA1CLITL
& 1
QB2_OP
QB2_CL =1 VPQB2
QB7_OP
QB7_CL =1 VPQB7
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC9_OP
QC9_CL =1 VPQC9
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
QC71_OP
QC71_CL =1 VPQC71
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQA1
VPQC1 QB9REL
VPQC2 & >1
QB9ITL
1
VPQC9
QA1_OP
QC1_OP
QC2_OP
QC9_OP
QB9_EX1
VPQC2
VPQC9
&
QC2_CL
QC9_CL
QB9_EX2

en04000527.vsd
IEC04000527 V1 EN-US

Transformer protection RET670 937

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

VPQA1 QB1REL
& ³1
VPQB2
VPQC1 1 QB1ITL
VPQC2
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES

QB1_EX1

VPQB2 &
VP_BC_12
QB2_CL
BC_12_CL
EXDU_BC

QB1_EX2

VPQC1 &
VPQC11
QC1_CL
QC11_CL
EXDU_ES

QB1EX3

en04000528.vsd

IEC04000528 V1 EN-US

938 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

VPQA1 QB2REL
& ³1
VPQB1
VPQC1 1 QB2ITL
VPQC2
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES

QB2_EX1

VPQB1 &
VP_BC_12
QB1_CL
BC_12_CL
EXDU_BC

QB2_EX2

VPQC1 &
VPQC21
QC1_CL
QC21_CL
EXDU_ES

QB2_EX3

en04000529.vsd

IEC04000529 V1 EN-US

Transformer protection RET670 939

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

VPQC9 QB7REL
& >1
VPQC71
VP_BB7_D 1 QB7ITL
VP_BC_17
VP_BC_27
QC9_OP
QC71_OP
EXDU_ES

BB7_D_OP
EXDU_BPB

BC_17_OP
BC_27_OP
EXDU_BC
QB7_EX1

VPQA1
VPQB1
VPQC9
&
VPQB9
VPQC71
VP_BB7_D
VP_BC_17
QA1_CL
QB1_CL
QC9_OP
QB9_CL
QC71_OP
EXDU_ES

BB7_D_OP
EXDU_BPB
BC_17_CL

EXDU_BC

QB7_EX2

IEC04000530 V1 EN-US

940 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

VPQA1
VPQB2
& >1
VPQC9
VPQB9
VPQC71
VP_BB7_D
VP_BC_27
QA1_CL
QB2_CL
QC9_OP
QB9_CL
QC71_OP
EXDU_ES

BB7_D_OP
EXDU_BPB
BC_27_CL
EXDU_BC
QB7_EX3
VPQC9
VPQC71
&
QC9_CL
QC71_CL
EXDU_ES
QB7_EX4
VPQB1 QC1REL
VPQB2 QC1ITL
VPQB9 & 1
QC2REL
QB1_OP
QB2_OP QC2ITL
1
QB9_OP
VPQB7
VPQB9 QC9REL
VPVOLT &
QC9ITL
QB7_OP 1
QB9_OP
VOLT_OFF
en04000531.vsd
IEC04000531 V1 EN-US

Transformer protection RET670 941

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB7_OP QB7OPTR
QB7_CL QB7CLTR
VPQB7 VPQB7TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
en04000532.vsd
IEC04000532 V1 EN-US

16.3.10.5 Signals
PID-3509-INPUTSIGNALS v10

Table 595: ABC_LINE Input signals

Name Type Default Description

QA1_OP BOOLEAN 0 QA1 is in open position
QA1_CL BOOLEAN 0 QA1 is in closed position
QB9_OP BOOLEAN 0 QB9 is in open position
QB9_CL BOOLEAN 0 QB9 is in closed position
QB1_OP BOOLEAN 0 QB1 is in open position
QB1_CL BOOLEAN 0 QB1 is in closed position
QB2_OP BOOLEAN 0 QB2 is in open position
QB2_CL BOOLEAN 0 QB2 is in closed position
QB7_OP BOOLEAN 0 QB7 is in open position
QB7_CL BOOLEAN 0 QB7 is in closed position
QC1_OP BOOLEAN 0 QC1 is in open position
QC1_CL BOOLEAN 0 QC1 is in closed position
QC2_OP BOOLEAN 0 QC2 is in open position
QC2_CL BOOLEAN 0 QC2 is in closed position
QC9_OP BOOLEAN 0 QC9 is in open position
QC9_CL BOOLEAN 0 QC9 is in closed position
QC11_OP BOOLEAN 0 Earthing switch QC11 on busbar WA1 is in open position
QC11_CL BOOLEAN 0 Earthing switch QC11 on busbar WA1 is in closed position
QC21_OP BOOLEAN 0 Earthing switch QC21 on busbar WA2 is in open position
QC21_CL BOOLEAN 0 Earthing switch QC21 on busbar WA2 is in closed position
QC71_OP BOOLEAN 0 Earthing switch QC71 on busbar WA7 is in open position
QC71_CL BOOLEAN 0 Earthing switch QC71 on busbar WA7 is in closed position
BB7_D_OP BOOLEAN 0 Disconnectors on busbar WA7 except in the own bay are open
BC_12_CL BOOLEAN 0 A bus coupler connection exists between busbar WA1 and WA2
Table continues on next page

942 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Name Type Default Description

BC_17_OP BOOLEAN 0 No bus coupler connection exists between busbar WA1 and WA7
BC_17_CL BOOLEAN 0 A bus coupler connection exists between busbar WA1 and WA7
BC_27_OP BOOLEAN 0 No bus coupler connection exists between busbar WA2 and WA7
BC_27_CL BOOLEAN 0 A bus coupler connection exists between busbar WA2 and WA7
VOLT_OFF BOOLEAN 0 There is no voltage on the line and not VT (fuse) failure
VOLT_ON BOOLEAN 0 There is voltage on the line or there is a VT (fuse) failure
VP_BB7_D BOOLEAN 0 Switch status of the disconnectors on busbar WA7 are valid
VP_BC_12 BOOLEAN 0 Status of the bus coupler app. between WA1 and WA2 are valid
VP_BC_17 BOOLEAN 0 Status of the bus coupler app. between WA1 and WA7 are valid
VP_BC_27 BOOLEAN 0 Status of the bus coupler app. between WA2 and WA7 are valid
EXDU_ES BOOLEAN 0 No transm error from any bay containing earthing switches
EXDU_BPB BOOLEAN 0 No transm error from any bay with disconnectors on WA7
EXDU_BC BOOLEAN 0 No transmission error from any bus coupler bay
QB9_EX1 BOOLEAN 0 External condition for apparatus QB9
QB9_EX2 BOOLEAN 0 External condition for apparatus QB9
QB1_EX1 BOOLEAN 0 External condition for apparatus QB1
QB1_EX2 BOOLEAN 0 External condition for apparatus QB1
QB1_EX3 BOOLEAN 0 External condition for apparatus QB1
QB2_EX1 BOOLEAN 0 External condition for apparatus QB2
QB2_EX2 BOOLEAN 0 External condition for apparatus QB2
QB2_EX3 BOOLEAN 0 External condition for apparatus QB2
QB7_EX1 BOOLEAN 0 External condition for apparatus QB7
QB7_EX2 BOOLEAN 0 External condition for apparatus QB7
QB7_EX3 BOOLEAN 0 External condition for apparatus QB7
QB7_EX4 BOOLEAN 0 External condition for apparatus QB7

PID-3509-OUTPUTSIGNALS v10

Table 596: ABC_LINE Output signals

Name Type Description

QA1CLREL BOOLEAN Closing of QA1 is allowed
QA1CLITL BOOLEAN Closing of QA1 is forbidden
QB9REL BOOLEAN Switching of QB9 is allowed
QB9ITL BOOLEAN Switching of QB9 is forbidden
QB1REL BOOLEAN Switching of QB1 is allowed
QB1ITL BOOLEAN Switching of QB1 is forbidden
QB2REL BOOLEAN Switching of QB2 is allowed
QB2ITL BOOLEAN Switching of QB2 is forbidden
QB7REL BOOLEAN Switching of QB7 is allowed
QB7ITL BOOLEAN Switching of QB7 is forbidden
QC1REL BOOLEAN Switching of QC1 is allowed
QC1ITL BOOLEAN Switching of QC1 is forbidden
QC2REL BOOLEAN Switching of QC2 is allowed
Table continues on next page

Transformer protection RET670 943

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Name Type Description

QC2ITL BOOLEAN Switching of QC2 is forbidden
QC9REL BOOLEAN Switching of QC9 is allowed
QC9ITL BOOLEAN Switching of QC9 is forbidden
QB1OPTR BOOLEAN QB1 is in open position
QB1CLTR BOOLEAN QB1 is in closed position
QB2OPTR BOOLEAN QB2 is in open position
QB2CLTR BOOLEAN QB2 is in closed position
QB7OPTR BOOLEAN QB7 is in open position
QB7CLTR BOOLEAN QB7 is in closed position
QB12OPTR BOOLEAN QB1 or QB2 or both are in open position
QB12CLTR BOOLEAN QB1 and QB2 are not in open position
VPQB1TR BOOLEAN Switch status of QB1 is valid (open or closed)
VPQB2TR BOOLEAN Switch status of QB2 is valid (open or closed)
VPQB7TR BOOLEAN Switch status of QB7 is valid (open or closed)
VPQB12TR BOOLEAN Switch status of QB1 and QB2 are valid (open or closed)

16.3.11 Interlocking for transformer bay AB_TRAFO IP14149-1 v2

16.3.11.1 Identification
GUID-AD839CAA-531B-43BC-B508-39AED3D0A97D v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Interlocking for transformer bay AB_TRAFO - 3

16.3.11.2 Functionality M13567-3 v7

The interlocking for transformer bay (AB_TRAFO) function is used for a transformer bay connected
to a double busbar arrangement according to figure 551. The function is used when there is no
disconnector between circuit breaker and transformer. Otherwise, the interlocking for line bay
(ABC_LINE) function can be used. This function can also be used in single busbar arrangements.

944 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

WA1 (A)
WA2 (B)
QB1 QB2
QC1

QA1
AB_TRAFO
QC2

QC3

QA2
QA2 and QC4 are not
QC4 used in this interlocking

QB3 QB4

en04000515.vsd
IEC04000515 V1 EN-US

Figure 551: Switchyard layout AB_TRAFO

16.3.11.3 Function block M13565-3 v6

AB_TRAFO
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB1_OP QB1REL
QB1_CL QB1ITL
QB2_OP QB2REL
QB2_CL QB2ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QB3_OP QB1OPTR
QB3_CL QB1CLTR
QB4_OP QB2OPTR
QB4_CL QB2CLTR
QC3_OP QB12OPTR
QC3_CL QB12CLTR
QC11_OP VPQB1TR
QC11_CL VPQB2TR
QC21_OP VPQB12TR
QC21_CL
BC_12_CL
VP_BC_12
EXDU_ES
EXDU_BC
QA1_EX1
QA1_EX2
QA1_EX3
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3

IEC05000358-2-en.vsd
IEC05000358 V2 EN-US

Figure 552: AB_TRAFO function block

Transformer protection RET670 945

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.3.11.4 Logic diagram M15097-3 v4

AB_TRAFO
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB2_OP
QB2_CL =1 VPQB2
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QB3_OP
QB3_CL =1 VPQB3
QB4_OP
QB4_CL =1 VPQB4
QC3_OP
QC3_CL =1 VPQC3
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
VPQB1 QA1CLREL
VPQB2 QA1CLITL
VPQC1 & 1

VPQC2
VPQB3
VPQB4
VPQC3
QA1_EX2
QC3_OP
QA1_EX3
QC1_CL >1
QC2_CL
QC3_CL &
QA1_EX1

en04000538.vsd

IEC04000538 V1 EN-US

VPQA1
VPQB2 QB1REL
& >1
VPQC1 QB1ITL
VPQC2 1
VPQC3
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC3_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2
VPQC3
&
VP_BC_12
QB2_CL
QC3_OP
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1
VPQC2
&
VPQC3
VPQC11
QC1_CL
QC2_CL
QC3_CL
QC11_CL
EXDU_ES
QB1_EX3

en04000539.vsd

IEC04000539 V1 EN-US

946 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

VPQA1
VPQB1 QB2REL
& >1
VPQC1 QB2ITL
VPQC2 1
VPQC3
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC3_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1
VPQC3
&
VP_BC_12
QB1_CL
QC3_OP
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1
VPQC2
&
VPQC3
VPQC21
QC1_CL
QC2_CL
QC3_CL
QC21_CL
EXDU_ES
QB2_EX3

en04000540.vsd

IEC04000540 V1 EN-US

VPQB1 QC1REL
VPQB2 QC1ITL
& 1
VPQB3
QC2REL
VPQB4
QB1_OP QC2ITL
1
QB2_OP
QB3_OP
QB4_OP
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
en04000541.vsd
IEC04000541 V1 EN-US

16.3.11.5 Signals
PID-3510-INPUTSIGNALS v10

Table 597: AB_TRAFO Input signals

Name Type Default Description

QA1_OP BOOLEAN 0 QA1 is in open position
QA1_CL BOOLEAN 0 QA1 is in closed position
QB1_OP BOOLEAN 0 QB1 is in open position
QB1_CL BOOLEAN 0 QB1 is in closed position
QB2_OP BOOLEAN 0 QB2 is in open position
QB2_CL BOOLEAN 0 QB2 is in closed position
QC1_OP BOOLEAN 0 QC1 is in open position
QC1_CL BOOLEAN 0 QC1 is in closed position
QC2_OP BOOLEAN 0 QC2 is in open position
QC2_CL BOOLEAN 0 QC2 is in closed position
Table continues on next page

Transformer protection RET670 947

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Name Type Default Description

QB3_OP BOOLEAN 0 QB3 is in open position
QB3_CL BOOLEAN 0 QB3 is in closed position
QB4_OP BOOLEAN 0 QB4 is in open position
QB4_CL BOOLEAN 0 QB4 is in closed position
QC3_OP BOOLEAN 0 QC3 is in open position
QC3_CL BOOLEAN 0 QC3 is in closed position
QC11_OP BOOLEAN 0 QC11 on busbar WA1 is in open position
QC11_CL BOOLEAN 0 QC11 on busbar WA1 is in closed position
QC21_OP BOOLEAN 0 QC21 on busbar WA2 is in open position
QC21_CL BOOLEAN 0 QC21 on busbar WA2 is in closed position
BC_12_CL BOOLEAN 0 A bus coupler connection exists between busbar WA1 and WA2
VP_BC_12 BOOLEAN 0 Status of the bus coupler app. between WA1 and WA2 are valid
EXDU_ES BOOLEAN 0 No transm error from any bay containing earthing switches
EXDU_BC BOOLEAN 0 No transmission error from any bus coupler bay
QA1_EX1 BOOLEAN 0 External condition for apparatus QA1
QA1_EX2 BOOLEAN 0 External condition for apparatus QA1
QA1_EX3 BOOLEAN 0 External condition for apparatus QA1
QB1_EX1 BOOLEAN 0 External condition for apparatus QB1
QB1_EX2 BOOLEAN 0 External condition for apparatus QB1
QB1_EX3 BOOLEAN 0 External condition for apparatus QB1
QB2_EX1 BOOLEAN 0 External condition for apparatus QB2
QB2_EX2 BOOLEAN 0 External condition for apparatus QB2
QB2_EX3 BOOLEAN 0 External condition for apparatus QB2

PID-3510-OUTPUTSIGNALS v10

Table 598: AB_TRAFO Output signals

Name Type Description

QA1CLREL BOOLEAN Closing of QA1 is allowed
QA1CLITL BOOLEAN Closing of QA1 is forbidden
QB1REL BOOLEAN Switching of QB1 is allowed
QB1ITL BOOLEAN Switching of QB1 is forbidden
QB2REL BOOLEAN Switching of QB2 is allowed
QB2ITL BOOLEAN Switching of QB2 is forbidden
QC1REL BOOLEAN Switching of QC1 is allowed
QC1ITL BOOLEAN Switching of QC1 is forbidden
QC2REL BOOLEAN Switching of QC2 is allowed
QC2ITL BOOLEAN Switching of QC2 is forbidden
QB1OPTR BOOLEAN QB1 is in open position
QB1CLTR BOOLEAN QB1 is in closed position
QB2OPTR BOOLEAN QB2 is in open position
QB2CLTR BOOLEAN QB2 is in closed position
QB12OPTR BOOLEAN QB1 or QB2 or both are in open position
Table continues on next page

948 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Name Type Description

QB12CLTR BOOLEAN QB1 and QB2 are not in open position
VPQB1TR BOOLEAN Switch status of QB1 is valid (open or closed)
VPQB2TR BOOLEAN Switch status of QB2 is valid (open or closed)
VPQB12TR BOOLEAN Switch status of QB1 and QB2 are valid (open or closed)

16.3.12 Position evaluation POS_EVAL GUID-F20A8939-E91E-44F6-920C-083E5D3FCDFD v2

16.3.12.1 Identification
GUID-3C4B9379-C861-406C-9295-0309014D548E v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Position evaluation POS_EVAL - -

16.3.12.2 Functionality GUID-C3D07B40-FF01-45C5-A083-EED5643A5FCC v4

Position evaluation (POS_EVAL) function converts the input position data signal POSITION,
consisting of value, time and signal status, to binary signals OPENPOS or CLOSEPOS.

The output signals are used by other functions in the interlocking scheme.

16.3.12.3 Function block GUID-B5EF4A28-9C9F-4558-8CD6-453FB480314B v2

POS_EVAL
POSITION OPENPOS
CLOSEPOS

IEC09000079_1_en.vsd
IEC09000079 V1 EN-US

Figure 553: POS_EVAL function block

16.3.12.4 Logic diagram GUID-F0EF8D38-031B-4A8E-BD7D-60314F5DCD59 v2

POS_EVAL
Position including quality POSITION OPENPOS
Open/close position of
CLOSEPOS switch device

IEC08000469-1-en.vsd
IEC08000469-1-EN V1 EN-US

Only the value, open/close, and status is used in this function. Time information is not used.

Input position (Value) Signal quality Output OPENPOS Output CLOSEPOS

0 (Breaker intermediate) Good 0 0
1 (Breaker open) Good 1 0
2 (Breaker closed) Good 0 1
3 (Breaker faulty) Good 0 0
Any Invalid 0 0
Any Oscillatory 0 0

Transformer protection RET670 949

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.3.12.5 Signals
PID-3555-INPUTSIGNALS v6

Table 599: POS_EVAL Input signals

Name Type Default Description

POSITION INTEGER 0 Position status including quality

PID-3555-OUTPUTSIGNALS v6

Table 600: POS_EVAL Output signals

Name Type Description

OPENPOS BOOLEAN Open position
CLOSEPOS BOOLEAN Close position

16.4 Apparatus control IP14560-1 v3

16.4.1 Function revision history GUID-CC62CA75-201A-4C5D-9FD4-89DBFD56F97C v2

16.4.2 Functionality M13444-3 v16

The apparatus control functions are used for control and supervision of circuit breakers,
disconnectors and earthing switches within a bay. Permission to operate is given after evaluation of
conditions from other functions such as interlocking, synchrocheck, operator place selection and
external or internal blockings.

Apparatus control features:

• Select-Execute principle to give high reliability

• Selection function to prevent simultaneous operation
• Selection and supervision of operator place
• Command supervision
• Block/deblock of operation
• Block/deblock of updating of position indications
• Substitution of position and quality indications
• Overriding of interlocking functions
• Overriding of synchrocheck
• Operation counter
• Suppression of mid position

Two types of command models can be used:

• Direct with normal security

• SBO (Select-Before-Operate) with enhanced security

Normal security means that only the command is evaluated and the resulting position is not
supervised. Enhanced security means that the command is evaluated with an additional supervision
of the status value of the control object. The command sequence with enhanced security is always
terminated by a CommandTermination service primitive and an AddCause telling if the command was
successful or if something went wrong.

Control operation can be performed from the local HMI with authority control if so defined.

950 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.4.3 Operation principle M13423-4 v10

A bay can handle, for example a power line, a transformer, a reactor, or a capacitor bank. The
different primary apparatuses within the bay can be controlled via the apparatus control functions
directly by the operator or indirectly by automatic sequences.

Because a primary apparatus can be allocated to many functions within a Substation Automation
system, the object-oriented approach with a function block that handles the interaction and status of
each process object ensures consistency in the process information used by higher-level control
functions.

Primary apparatuses such as breakers and disconnectors are controlled and supervised by one
function block (SCSWI) each. Because the number and type of signals used for the control of a
breaker or a disconnector are almost the same, the same function block type is used to handle these
two types of apparatuses.

The SCSWI function block is connected either to an SXCBR function block (for circuit breakers) or to
an SXSWI function block (for disconnectors and earthing switches). The physical process in the
switchyard is connected to these two function blocks via binary inputs and outputs.

Four types of function blocks are available to cover most of the control and supervision within the
bay. These function blocks are interconnected to form a control function reflecting the switchyard
configuration. The total number used depends on the switchyard configuration. These types are:

• Bay control QCBAY

• Switch controller SCSWI
• Circuit breaker SXCBR
• Circuit switch SXSWI

The functions Local Remote (LOCREM) and Local Remote Control (LOCREMCTRL), to handle the
local/remote switch. The functions Bay reserve (QCRSV) and Reservation input (RESIN), for the
reservation function, also belong to the apparatus control function.

The principles of operation, function blocks, input and output signals and setting parameters for all
these functions are described below.

16.4.4 Error handling GUID-6C31D291-74E8-46A3-8FC2-D3959C2458A5 v9

Depending on the error that occurs during the command sequence the error signal will be set with a
value. Table 601 describes the cause values given on local HMI. The translation to AddCause
values specified in IEC 61850-8-1 is shown in Table 602. For IEC 61850-8-1 edition 2 only
addcauses defined in the standard are used, for edition 1 also a number of vendor specific causes
are used. The values are available in the command response to commands from IE C61850-8-1
clients. An output L_CAUSE on the function block for Switch controller (SCSWI), Circuit breaker
(SXCBR) and Circuit switch (SXSWI) indicates the value of the cause during the latest command if
the function specific command evaluation has been started. The causes that are not always reflected
on the output L_CAUSE, with description of the typical reason are listed in table 603.

Table 601: Values for "cause" signal

Cause Name Description Supported

number
0 None Control action successfully executed X
1 Not-supported Given for Cancel request with Direct Control in Ready state X
2 Blocked-by-switching- Not successful since one of the downstream Loc switches like X
hierarchy in CSWI has the value TRUE
3 Select-failed Cancelled due to an unsuccessful selection (select service) X
Table continues on next page

Transformer protection RET670 951

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Cause Name Description Supported

number
4 Invalid-position Control action is aborted due to invalid switch position (Pos in X
XCBR or XSWI)
5 Position-reached Switch is already in the intended position (Pos in XCBR or X
XSWI)
6 Parameter-change-in- Control action is blocked due to running parameter change X
execution
7 Step-limit Control action is blocked, because tap changer has reached the X
limit (EndPosR or EndPosL in YLTC)
8 Blocked-by-Mode Control action is blocked, because the LN (CSWI or XCBR/ X
XSWI) is in a mode (Mod) which doesn’t allow any switching
9 Blocked-by-process Control action is blocked due to some external event at process X
level that prevents a successful operation, for example blocking
indication (EEHealth in XCBR or XSWI)
10 Blocked-by-interlocking Control action is blocked due to interlocking of switching X
devices (in CILO attribute EnaOpn.stVal=”FALSE” or
EnaCls.stVal=”FALSE”
11 Blocked-by- Control action with synchrocheck is aborted due to exceed of X
synchrocheck time limit and missing synchronism condition
12 Command-already-in- Control, select or cancel service is rejected, because control X
execution action is already running
13 Blocked-by-health Control action is blocked due to some internal event that X
prevents a successful operation (Health)
14 1-of-n-control Control action is blocked because another control action in a X
domain (for example, substation) is already running (in any
XCBR or XSWI of that domain, the DPC.stSeld=”TRUE”)
15 Abortion-by-cancel Control action is aborted due to cancel service X
16 Time-limit-over Control action is terminated due to exceed of some time limit X
17 Abortion-by-trip Control action is aborted due to a trip (PTRC with X
ACT.general=”TRUE”)
18 Object-not-selected Control action is rejected, because control object was not X
selected
19 Object-already-selected Select action is not executed because the addressed object is X
already selected
20 No-access-authority Control action is blocked due to lack of access authority
21 Ended-with-overshoot Control action executed but the end position has overshoot
22 Abortion-due-to- Control action is aborted due to deviation between the
deviation command value and the measured value
23 Abortion-by- Control action is aborted due to the loss of connection with the
communication-loss client that issued the control
24 Blocked-by-command Control action is blocked due to the data attribute CmdBlk.stVal X
is TRUE
26 Inconsistent- The parameters between successive control services are not X
parameters consistent, for example the ctlNum of Select and Operate
service are different
27 Locked-by-other-client Another client has already reserved the object X
-22 Wrong-Ctl-model Command from client uses wrong control model X
-23 Blocked-by-command Blocked by command X
-24 Blocked-for-open-cmd Blocked for Open command X
-25 Blocked-for-close-cmd Blocked for Close Command X
Table continues on next page

952 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Cause Name Description Supported

number
-30 Long-operation-time Operation time too long X
-31 Switch-not-start-moving Switch did not start moving X
-32 Persistent- Switch stopped in intermediate state X
intermediate-state
-33 Switch-returned-to-init- Switch returned to the initial position X
pos
-34 Switch-in-bad-state Switch is in a bad position state X
-35 Not-expected-final- Switch did not reach the expected final position X
position

Table 602: Translation of cause values for IEC 61850 edition 2 and edition 1

Internal Cause AddCause in IEC 61850-8-1 Name

Number
Ed 2 Ed 1
0 25 0 None
1 1 1 Not-supported
2 2 2 Blocked-by-switching-hierarchy
3 3 3 Select-failed
4 4 4 Invalid-position
5 5 5 Position-reached
6 6 6 Parameter-change-in-execution
7 7 7 Step-limit
8 8 8 Blocked-by-Mode
9 9 9 Blocked-by-process
10 10 10 Blocked-by-interlocking
11 11 11 Blocked-by-synchrocheck
12 12 12 Command-already-in-execution
13 13 13 Blocked-by-health
14 14 14 1-of-n-control
15 15 1 Abortion-by-cancel
16 16 16 Time-limit-over
17 17 17 Abortion-by-trip
18 18 18 Object-not-selected
19 19 3 Object-already-selected
20 20 3 No-access-authority
24 24 -23 Blocked-by-command
26 26 6 Inconsistent-parameters
27 27 12 Locked-by-other-client
-22 0 -22 Wrong-Ctl-model
-23 24 -23 Blocked-by-command
-24 9 -24 Blocked-for-open-cmd
-25 9 -25 Blocked-for-close-cmd
-30 16 -30 Long-operation-time
Table continues on next page

Transformer protection RET670 953

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Internal Cause AddCause in IEC 61850-8-1 Name

Number
Ed 2 Ed 1
-31 16 -31 Switch-not-start-moving
-32 4 -32 Persistent-intermediate-state
-33 22 -33 Switch-returned-to-init-pos
-34 4 -34 Switch-in-bad-state
-35 22 -35 Not-expected-final-position

Table 603: Cause values not reflected on the output L_CAUSE

Cause number Cause description Conditions

3 Select-failed Canceled due to an unsuccessful selection (select
service)
8 Blocked-by-Mode Control action is blocked because the LN (CSWI)
is in a mode (Mod) which doesn’t allow any
switching or does not match the mode of the
command.
12 Command-already-in-execution Control, select or cancel service is rejected
because control action is already running.
13 Blocked-by-health Control action is blocked due to some internal
event that prevents a successful operation
(Health).
16 Time-limit-over Control action is terminated due to exceed of
some time limit.
18 Object-not-selected Control action is rejected because control object
was not selected.
19 Object-already-selected Select action is not executed because the
addressed object is already selected.
20 No-access-authority Control action is blocked due to lack of access
authority.
26 Inconsistent-parameters The parameters between successive control
services are not consistent, for example the
ctlNum of Select and Operate service are
different.
27 Locked-by-other-client Another client has already reserved the object.

16.4.5 Bay control QCBAY IP15597-1 v2

16.4.5.1 Functionality M13447-3 v8

The Bay control (QCBAY) function is used together with Local remote and local remote control
functions to handle the selection of the operator place per bay. QCBAY also provides blocking
functions that can be distributed to different apparatuses within the bay.

954 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.4.5.2 Function block M13469-3 v4

QCBAY
LR_OFF PSTO
LR_LOC UPD_BLKD
LR_REM CMD_BLKD
LR_VALID LOC
BL_UPD STA
BL_CMD REM
IEC10000048-3-en.vsdx
IEC10000048 V3 EN-US

Figure 554: QCBAY function block

16.4.5.3 Signals
PID-4086-INPUTSIGNALS v8

Table 604: QCBAY Input signals

Name Type Default Description

LR_OFF BOOLEAN 0 External Local/Remote switch is in Off position
LR_LOC BOOLEAN 0 External Local/Remote switch is in Local position
LR_REM BOOLEAN 0 External Local/Remote switch is in Remote position
LR_VALID BOOLEAN 0 Data representing the L/R switch position is valid
BL_UPD BOOLEAN 0 Steady signal to block the position updates
BL_CMD BOOLEAN 0 Steady signal to block the command

PID-4086-OUTPUTSIGNALS v8

Table 605: QCBAY Output signals

Name Type Description

PSTO INTEGER Value for the operator place allocation
UPD_BLKD BOOLEAN Update of position is blocked
CMD_BLKD BOOLEAN Function is blocked for commands
LOC BOOLEAN Local operation allowed
STA BOOLEAN Station operation allowed
REM BOOLEAN Remote operation allowed

16.4.5.4 Settings
PID-4086-SETTINGS v8

Table 606: QCBAY Non group settings (basic)

Name Values (Range) Unit Step Default Description

AllPSTOValid Priority - - Priority Override Priority of originators,
No priority commands from both local, station and
remote are allowed
RemoteIncStation No - - No Both Station and Remote control are
Yes allowed but not Local when local remote
switch is in remote

16.4.5.5 Operation principle

M13446-4 v8
The function sends information about the Permitted Source To Operate (PSTO) and blocking
conditions to other functions within the bay for example, switch control functions and voltage control
functions. The functionality of the Bay control (QCBAY) function is mainly described by the LLN0
node in the IEC 61850-8-1 edition 2 standard, applied to one bay. In IEC 61850 edition 1 the

Transformer protection RET670 955

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

functionality is not described by the LLN0 node or any other node, therefore the Bay control function
is represented as a vendor specific node in edition 1.

Local panel switch M13446-7 v8

The local panel switch is a switch that defines the operator place selection. The switch connected to
this function can have three positions (remote/local/off). The positions are here defined so that
remote means that operation is allowed from station and/or remote level and local means that
operation is allowed from the IED level. The local/remote switch is also on the control/protection IED
itself, which means that the position of the switch and its validity information are connected internally,
not via I/O boards. When the switch is mounted separately from the IED the signals are connected to
the function via I/O boards.

When the local panel switch (or LHMI selection, depending on the set source to select this) is in Off
position, all commands from remote and local level will be ignored. If the position for the local/remote
switch is not valid the PSTO output will always be set to faulty state (3), which means no possibility to
operate.

To adapt the signals from the local HMI or from an external local/remote switch, the function blocks
LOCREM and LOCREMCTRL are needed and connected to QCBAY.

Permitted Source To Operate (PSTO) M13446-16 v11

The actual state of the operator place is presented by the value of the Permitted Source To Operate,
PSTO signal. The PSTO value is evaluated from the local/remote switch position according to
Table 607. In addition, there are two settings and one command that affect the value of the PSTO
signal.

When the external switch is in Off position, or invalid position, the output always shows the actual
state of the switch (0 for Off and 3 for Invalid). In these cases, it is not possible to control anything,
and the setting AllPSTOValid has no effect on the PSTO output.

If the setting AllPSTOValid is set to No Priority and the LR-switch position is in Local or Remote
state, the PSTO output is set to 5 (all), that is, it is permitted to operate from local, station and remote
level without any priority.

The LocSta command value is forced to FALSE if AllPSTOValid is set to No priority.

If the setting RemoteIncStation is set to Yes and the LR-switch position is in Remote state, the PSTO
output is set to 2 (Station or Remote), that is, it is permitted to operate from both station and remote
level without any priority.

If the LR-switch position is in Remote state, and AllPSTOValid is set to Priority and RemoteIncStation
is set to No, the switching between station and remote level control is done through the command
LocSta. The command is accessible only through the IEC 61850 Edition 2 protocol.

Table 607: PSTO values for different Local panel switch positions

Local panel AllPSTOVali RemoteInc LocSta.CtlVa PSTO LED Possible

switch d Station l (command) value indications on locations that
positions (setting) (setting) LHMI shall be able
to operate
0 = Off - - - 0 Remote and Not possible
Local Off to operate
1 = Local Priority - - 1 Remote Off, Local Panel
Local On
1 = Local No priority - - 5 Remote and Local, Station
Local On or Remote
level without
any priority
2 = Remote Priority No TRUE 6 Remote On, Station level
Local Off
Table continues on next page

956 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Local panel AllPSTOVali RemoteInc LocSta.CtlVa PSTO LED Possible

switch d Station l (command) value indications on locations that
positions (setting) (setting) LHMI shall be able
to operate
2 = Remote Priority No FALSE 7 Remote On, Remote level
Local Off
2 = Remote Priority Yes - 2 Remote On, Station or
Local Off Remote level
2 = Remote No priority - - 5 Remote and Local, Station
Local On or Remote
level without
any priority
3 = Faulty - - - 3 Remote and Not possible
Local to operate
Flashing

Blockings M13446-50 v6
The blocking states for position indications and commands are intended to provide the possibility for
the user to make common blockings for the functions configured within a complete bay.

The blocking facilities provided by the bay control function are the following:

• Blocking of position indications, BL_UPD. This input will block all inputs related to apparatus
positions for all configured functions within the bay.
• Blocking of commands, BL_CMD. This input will block all commands for all configured functions
within the bay.

The switching of the Local/Remote switch requires at least system operator level. The password will
be requested at an attempt to operate if authority levels have been defined in the IED, otherwise the
default authority level can handle the control without LogOn. The users and passwords are defined
with the IED Users tool in PCM600.

16.4.6 Local/Remote switch LOCREM IP16319-1 v3

M17086-3 v11
The signals from the local HMI or from an external local/remote switch are connected via the function
blocks local remote (LOCREM) and local remote control (LOCREMCTRL) to the Bay control
(QCBAY) function block. The parameter ControlMode in function block LOCREM is set to choose if
the switch signals are coming from the local HMI or from an external hardware switch connected via
binary inputs.

16.4.6.1 Function block M17088-3 v4

LOCREM
CTRLOFF OFF
LOCCTRL LOCAL
REMCTRL REMOTE
LHMICTRL VALID
IEC05000360-3-en.vsdx
IEC05000360 V3 EN-US

Figure 555: LOCREM function block

Transformer protection RET670 957

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

LOCREMCTRL
^PSTO1 HMICTR1
^PSTO2 HMICTR2
^PSTO3 HMICTR3
^PSTO4 HMICTR4
^PSTO5 HMICTR5
^PSTO6 HMICTR6
^PSTO7 HMICTR7
^PSTO8 HMICTR8
^PSTO9 HMICTR9
^PSTO10 HMICTR10
^PSTO11 HMICTR11
^PSTO12 HMICTR12
IEC05000361-3-en.vsdx
IEC05000361 V3 EN-US

Figure 556: LOCREMCTRL function block

16.4.6.2 Signals
PID-3944-INPUTSIGNALS v7

Table 608: LOCREM Input signals

Name Type Default Description

CTRLOFF BOOLEAN 0 Disable control
LOCCTRL BOOLEAN 0 Local in control
REMCTRL BOOLEAN 0 Remote in control
LHMICTRL INTEGER 0 LHMI control

PID-3944-OUTPUTSIGNALS v7

Table 609: LOCREM Output signals

Name Type Description

OFF BOOLEAN Control is disabled
LOCAL BOOLEAN Local control is activated
REMOTE BOOLEAN Remote control is activated
VALID BOOLEAN Outputs are valid

PID-3943-INPUTSIGNALS v6

Table 610: LOCREMCTRL Input signals

Name Type Default Description

PSTO1 INTEGER 0 PSTO input channel 1
PSTO2 INTEGER 0 PSTO input channel 2
PSTO3 INTEGER 0 PSTO input channel 3
PSTO4 INTEGER 0 PSTO input channel 4
PSTO5 INTEGER 0 PSTO input channel 5
PSTO6 INTEGER 0 PSTO input channel 6
PSTO7 INTEGER 0 PSTO input channel 7
PSTO8 INTEGER 0 PSTO input channel 8
PSTO9 INTEGER 0 PSTO input channel 9
PSTO10 INTEGER 0 PSTO input channel 10
PSTO11 INTEGER 0 PSTO input channel 11
PSTO12 INTEGER 0 PSTO input channel 12

958 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

PID-3943-OUTPUTSIGNALS v6

Table 611: LOCREMCTRL Output signals

Name Type Description

HMICTR1 INTEGER Bitmask output 1 to local remote LHMI input
HMICTR2 INTEGER Bitmask output 2 to local remote LHMI input
HMICTR3 INTEGER Bitmask output 3 to local remote LHMI input
HMICTR4 INTEGER Bitmask output 4 to local remote LHMI input
HMICTR5 INTEGER Bitmask output 5 to local remote LHMI input
HMICTR6 INTEGER Bitmask output 6 to local remote LHMI input
HMICTR7 INTEGER Bitmask output 7 to local remote LHMI input
HMICTR8 INTEGER Bitmask output 8 to local remote LHMI input
HMICTR9 INTEGER Bitmask output 9 to local remote LHMI input
HMICTR10 INTEGER Bitmask output 10 to local remote LHMI input
HMICTR11 INTEGER Bitmask output 11 to local remote LHMI input
HMICTR12 INTEGER Bitmask output 12 to local remote LHMI input

16.4.6.3 Settings
PID-3944-SETTINGS v7

Table 612: LOCREM Non group settings (basic)

Name Values (Range) Unit Step Default Description

ControlMode Internal LR-switch - - Internal LR-switch Control mode for internal/external LR-
External LR-switch switch

PID-3943-SETTINGS v2

16.4.6.4 Operation principle M17087-3 v9

The function block Local remote (LOCREM) handles the signals coming from the local/remote switch.
The connections are seen in Figure 557, where the inputs on function block LOCREM are connected
to binary inputs if an external switch is used. When the local HMI is used, the inputs are not used.
The switching between external and local HMI source is done through the parameter ControlMode.
The outputs from the LOCREM function block control the output PSTO (Permitted Source To
Operate) on Bay control (QCBAY).

Transformer protection RET670 959

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

LOCREM QCBAY
CTRLOFF OFF LR_ OFF PSTO
LOCCTRL LOCAL LR_ LOC UPD_ BLKD
REMCTRL REMOTE LR_ REM CMD_ BLKD
LHMICTRL VALID LR_ VALID LOC
BL_ UPD STA
BL_ CMD REM

LOCREM QCBAY
CTRLOFF OFF LR_ OFF PSTO
LOCCTRL LOCAL LR_ LOC UPD_ BLKD
REMCTRL REMOTE LR_ REM CMD_ BLKD
LHMICTRL VALID LR_ VALID LOC
BL_ UPD STA
BL_ CMD REM

LOCREMCTRL
PSTO1 HMICTR1
PSTO2 HMICTR2
PSTO3 HMICTR3
PSTO4 HMICTR4
PSTO5 HMICTR5
PSTO6 HMICTR6
PSTO7 HMICTR7
PSTO8 HMICTR8
PSTO9 HMICTR9
PSTO 10 HMICTR 10
PSTO 11 HMICTR 11
PSTO 12 HMICTR 12

IEC10000052-1-en.vsd
IEC10000052 V2 EN-US

Figure 557: Configuration for the local/remote handling for a local HMI with two bays and two
screen pages
If the IED contains control functions for several bays, the local/remote position can be different for the
included bays. When the local HMI is used the position of the local/remote switch can be different
depending on which single line diagram screen page that is presented on the local HMI. The function
block Local remote control (LOCREMCTRL) controls the presentation of the LEDs for the local/
remote position to applicable bay and screen page.

The switching of the local/remote switch requires at least system operator level. The password will be
requested at an attempt to operate if authority levels have been defined in the IED. Otherwise the
default authority level, SuperUser, can handle the control without LogOn. The users and passwords
are defined with the IED Users tool in PCM600.

16.4.7 Switch controller SCSWI IP15603-1 v2

16.4.7.1 Functionality M13486-3 v10

The Switch controller (SCSWI) initializes and supervises all functions to properly select and operate
switching primary apparatuses. The Switch controller may handle and operate on one multi-phase
device or up to three one-phase devices.

960 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.4.7.2 Function block M13482-3 v5

SCSWI
BLOCK EXE_OP
PSTO EXE_CL
L_SEL SEL_OP
L_OPEN SEL_CL
L_CLOSE SELECTED
AU_OPEN RES_RQ
AU_CLOSE START_SY
BL_CMD CANC_SY
RES_GRT POSITION
RES_EXT OPENP OS
SY_INPRO CLOSEPOS
SYNC_OK POLEDISC
EN_OPEN CMD_BLK
EN_CLOSE L_CAUSE
XPOSL1* POS_INTR
XPOSL2* XEXINF
XPOSL3*
IEC05000337-6-en.vsdx
IEC05000337 V6 EN-US

Figure 558: SCSWI function block

16.4.7.3 Signals
PID-7574-INPUTSIGNALS v2

Table 613: SCSWI Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
PSTO INTEGER 2 Operator place selection
L_SEL BOOLEAN 0 Select signal from local panel
L_OPEN BOOLEAN 0 Open signal from local panel
L_CLOSE BOOLEAN 0 Close signal from local panel
AU_OPEN BOOLEAN 0 Open signal from local automation function
AU_CLOSE BOOLEAN 0 Close signal from local automation function
BL_CMD BOOLEAN 0 Steady signal for block of the command
RES_GRT BOOLEAN 0 Positive acknowledge that all reservations are made
RES_EXT BOOLEAN 0 Reservation is made externally
SY_INPRO BOOLEAN 0 Synchronizing function in progress
SYNC_OK BOOLEAN 0 Closing is permitted at set to true by the synchrocheck
EN_OPEN BOOLEAN 0 Enables open operation
EN_CLOSE BOOLEAN 0 Enables close operation
XPOSL1 GROUP - Group signal from XCBR/XSWI per phase
SIGNAL
XPOSL2 GROUP - Group signal from XCBR/XSWI per phase
SIGNAL
XPOSL3 GROUP - Group signal from XCBR/XSWI per phase
SIGNAL

Transformer protection RET670 961

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

PID-7574-OUTPUTSIGNALS v1

Table 614: SCSWI Output signals

Name Type Description

EXE_OP BOOLEAN Execute command for open direction
EXE_CL BOOLEAN Execute command for close direction
SEL_OP BOOLEAN Selected for open command
SEL_CL BOOLEAN Selected for close command
SELECTED BOOLEAN Select conditions are fulfilled
RES_RQ BOOLEAN Request signal to the reservation function
START_SY BOOLEAN Starts the external synchronizing function
CANC_SY BOOLEAN Cancels the external synchronizing function, started through
START_SY
POSITION INTEGER Position indication
OPENPOS BOOLEAN Open position indication
CLOSEPOS BOOLEAN Closed position indication
POLEDISC BOOLEAN The positions for poles L1-L3 are not equal after a set time
CMD_BLK BOOLEAN Commands are blocked
L_CAUSE INTEGER Latest value of the error indication during command
POS_INTR BOOLEAN Stopped in intermediate position
XEXINF GROUP SIGNAL Execution information to XCBR, XSWI & XLNPROXY

GUID-7DABB496-EABE-48A4-8078-7ED5D6D4FE14 v3

AU_OPEN and AU_CLOSE are used to issue automated commands. They work
without regard to how the operator place selector, PSTO, is set. In order to have
effect on the outputs EXE_OP and EXE_CL, the corresponding enable input,
EN_OPEN respectively EN_CLOSE must be set, and that no interlocking is active.

L_SEL, L_OPEN and L_CLOSE are used for local command sequence connected to
binary inputs. In order to have effect, the operator place selector, PSTO, must be set
to local or to remote with no priority. If the control model used is Select before
operate, Also the corresponding enable input must be set, and no interlocking is
active. The L_SEL input must be set before L_OPEN or L_CLOSE is operated, if the
control model is Select before operate.

If one multi-phase XCBR/XSWI or two single-phase XCBR/XSWI are used for a two-
or three-phase system, two or more of the inputs XPOSL1, XPOSL2 and XPOSL3
are connected to the same source.

962 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.4.7.4 Settings
PID-7574-SETTINGS v1

Table 615: SCSWI Non group settings (basic)

Name Values (Range) Unit Step Default Description

CtlModel Dir Norm - - SBO Enh Specifies control model type
SBO Enh
PosDependent Always permitted - - Always permitted Permission to operate depending on the
Not perm 00/11 position
Not perm cPos
Not perm cPos/
00/11
tSelect 0.00 - 600.00 s 0.01 30.00 Maximum time between select and
execute signals
tResResponse 0.000 - 60.000 s 0.001 5.000 Allowed time from reservation request to
reservation granted
tSynchrocheck 0.00 - 600.00 s 0.01 10.00 Allowed time for synchrocheck to fulfil
close conditions
tSynchronizing 0.00 - 600.00 s 0.01 0.00 Supervision time to get the signal
synchronizing in progress
tExecutionFB 0.00 - 600.00 s 0.01 30.00 Maximum time from command execution
to termination
tPoleDiscord 0.000 - 60.000 s 0.001 2.000 Allowed time to have discrepancy
between the poles
SuppressMidPos Off - - On Mid-position is suppressed during time
On tIntermediate; tIntermediate is set on
each connected XCBR/XSWI function
individually
InterlockChk Sel & Op phase - - Sel & Op phase Selection if interlock check should be
Op phase done in select phase

16.4.7.5 Operation principle

M13484-4 v4
The Switch controller (SCSWI) is provided with verification checks for the select - execute sequence,
that is, checks the conditions prior each step of the operation are fulfilled. The involved functions for
these condition verifications are interlocking, reservation, blockings and synchrocheck.

Control handling M13484-6 v8

.
Two types of control models can be used. The two control models are "direct with normal security"
and "SBO (Select-Before-Operate) with enhanced security". The parameter CtlModel defines which
one of the two control models is used. The control model "direct with normal security" does not
require a select whereas, the "SBO with enhanced security" command model requires a select
before execution. The command sequence for a command with control mode SBO with enhanced
security is shown in figure 559, with control mode direct with normal security is shown in figure 560.

Transformer protection RET670 963

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Reservation SXCBR /
Client SCSWI
logic SXSWI
select

SEL_CL = TRUE

RES_RQ = TRUE
tReservation
Response

tSelect
RES_GRT = TRUE
SELECTED = TRUE
selectAck/AddCause = 0

requestedPosition = 10

opRcvd = TRUE
EXE_CL

opOK = TRUE, tOpOk

operateAck/AddCause = 0
operateAck/AddCause = 0
tExecutionFB

POSITION = 00, timeStamp

POSITION = 00, timeStamp
POSITION = 10, timeStamp
cmdTermination/AddCause = 0

POSITION = 10, timeStamp

cmdTermination/AddCause = 0
SELECTED = FALSE
SEL_CL = FALSE

RES_RQ = FALSE

RES_GRT = FALSE

IEC15000416-2-EN.vsdx

IEC15000416 V2 EN-US

Figure 559: Example of command sequence for a successful close command when the control
model SBO with enhanced security is used

Reservation SwitchCtrl Switch

client
core core core

requestedPosition = 10

opRcvd = TRUE

RES_RQ
tReservation
Response

RES_GRT = TRUE
EXE_CL

opOK = TRUE, tOpOk

operateAck/AddCause = 0 operateAck/AddCause = 0

POSITION = 00, timeStamp POSITION = 00, timeStamp

POSITION = 10, timeStamp

cmdTermination/
POSITION = 10, timeStamp AddCause = 0

RES_RQ = FALSE

RES_GRT = FALSE

IEC15000417-1-en.vsdx

IEC15000417 V1 EN-US

Figure 560: Example of command sequence for a successful close command when the control
model direct with normal security is used
Normal security means that only the command is evaluated and the resulting position is not
supervised. Enhanced security means that the command sequence is supervised in three steps, the
selection, command evaluation and the supervision of position. Each step ends up with a pulsed
signal to indicate that the respective step in the command sequence is finished. If an error occurs in
one of the steps in the command sequence, the sequence is terminated. The last error (L_CAUSE)
can be read from the function block and used for example at commissioning.

Before an execution command, an evaluation of the position is done. If the parameter PosDependent
is set to Not perm 00/11 or Not perm cPos/00/11, and the position is in intermediate state or in bad

964 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

state, the command is rejected with the cause Invalid-position. If the parameter is set to Not perm
cPos or Not perm cPos/00/11 and the command is to move to the current position, the command is
rejected with the cause Position-reached. If the parameter is set to Always permitted the execution
command is sent independent of the position value.

Evaluation of position M13484-14 v5

The position output from the switches (SXCBR or SXSWI) is connected to the switch controller
SCSWI. The XPOSL1, XPOSL2 and XPOSL3 input signals receive the position, time stamps and
quality attributes of the position which is used for further evaluation.

In the case when there are two or more one-phase switches connected to the switch control function,
the switch control will "merge" the position of the switches to the resulting multi-phase position. In the
case when the position differ between the one-phase switches, following principles will be applied:

All switches in open position: switch control position = open

All switches in closed position: switch control position = closed
At least one switch in open position and the switch control position = intermediate
other(s) in closed position:
Any switch in intermediate position: switch control position = intermediate
Any switch in bad state: switch control position = bad state

The time stamp of the output multi-phase position from switch control will have the time stamp of the
last changed phase when it reaches the end position. When it goes to intermediate position or bad
state, it will get the time stamp of the first changed phase.

In addition, there is also the possibility that one of the one-phase switches will change position at any
time due to a trip. Such situation is here called pole discordance and is supervised by this function. In
case of a pole discordance situation, that is, the positions of the one-phase switches are not equal for
a time longer than the setting tPoleDiscord, an error signal POLEDISC will be set.

In the supervision phase, the switch controller function evaluates the "cause" values from the switch
modules circuit breaker (SXCBR)/circuit switch (SXSWI). At error the "cause" value with highest
priority is shown.

Blocking principles M13484-37 v5

The blocking signals are normally coming from the bay control function (QCBAY) and via the IEC
61850 communication from the operator place.

The different blocking possibilities are:

• Block/deblock of command. It is used to block command for operation of position.

• Blocking of function, BLOCK. If the BLOCK signal is set, it means that the function is active, but
no outputs are generated, no reporting, control commands are rejected and functional and
configuration data is visible.

The different block conditions will only affect the operation of this function, that is, no
blocking signals will be "forwarded" to other functions. The above blocking outputs
are stored in a non-volatile memory.

Dependence on operator place GUID-AB327F15-AF44-4ACC-8FA5-2A52AE4AE090 v5

For the commands from a communication protocol, such as IEC 61850-8-1, and through the inputs
L_SEL, L_OPEN and L_CLOSE, the operator place is evaluated, and only the commands from
actual operator place are accepted, see Table 607. Commands through the inputs L_SEL, L_OPEN
and L_CLOSE are always from the local operator place. For commands through the inputs
AU_OPEN and AU_CLOSE, the operator place is only evaluated so that it is not set to Off or is
invalid.

Transformer protection RET670 965

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Interaction with synchrocheck and synchronizing functions M13484-47 v5

The Switch controller (SCSWI) works in conjunction with the synchrocheck and the synchronizing
function (SESRSYN). It is assumed that the synchrocheck function is continuously in operation and
gives the result to SCSWI. The result from the synchrocheck function is evaluated during the close
execution. If the operator performs an override of the synchrocheck, the evaluation of the
synchrocheck state is omitted. When there is a positive confirmation from the synchrocheck function,
SCSWI will send the close signal EXE_CL to the switch function Circuit breaker (SXCBR).

When there is no positive confirmation from the synchrocheck function, SCSWI will send a start
signal START_SY to the synchronizing function, which will send the closing command to SXCBR
when the synchronizing conditions are fulfilled, see Figure 561. If no synchronizing function is
included, the timer for supervision of the "synchronizing in progress signal" is set to 0, which means
no start of the synchronizing function. SCSWI will then set the attribute "blocked-by-synchrocheck" in
the "cause" signal. See also the time diagram in Figure 565.

SCSWI SXCBR
EXE_CL
OR CLOSE

SYNC_OK
START_SY
CANC_SY
SY_INPRO
SESRSYN

CLOSECB
Synchro Synchronizing
check function

IEC09000209-2-en.vsd
IEC09000209 V2 EN-US

Figure 561: Example of interaction between SCSWI, SESRSYN (synchrocheck and

synchronizing function) and SXCBR function

Time diagrams M13484-51 v8

The Switch controller (SCSWI) function has timers for evaluating different time supervision
conditions. These timers are explained here.

The timer tSelect is used for supervising the time between the select and the execute command
signal, that is, the time the operator has to perform the command execution after the selection of the
object to operate.

select
execute command
tSelect
timer t1 t1>tSelect, then long-
operation-time in 'cause'
is set

en05000092.vsd
IEC05000092 V1 EN-US

Figure 562: tSelect

966 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

The Long-operation-time cause (-30) is only given on the output L_CAUSE. It is not
sent on protocols since the selection has already received a positive response, and
no operation has been issued. If an operation is issued after the time out, the
negative response is Object-not-selected.

The parameter tResResponse is used to set the maximum allowed time to make the reservation, that
is, the time between reservation request and the feedback reservation granted from all bays involved
in the reservation function.

select

reservation request RES_RQ

reservation granted RES_GRT

t1>tResResponse, then 1-
tResResponse
of-n-control in 'cause' is
timer t1
set
IEC05000093-2-en.vsd
IEC05000093 V2 EN-US

Figure 563: tResResponse

The timer tExecutionFB supervises the time between the execute command and the command
termination, see Figure 564.

execute command

position L1 open

close

position L2 open

close

position L3 open

close

cmd termination L1

cmd termination L2

cmd termination L3

cmd termination *

position open

close

t1>tExecutionFB, then
tExecutionFB timer long-operation-time in
t1 'cause' is set

* The cmd termination will be delayed one execution sample . APCtExecutionFB=IEC0

5000094=2=en=Original
.vsd
IEC05000094 V2 EN-US

Figure 564: tExecutionFB

The parameter tSynchrocheck is used to define the maximum allowed time between the execute
command and the input SYNC_OK to become true. If SYNC_OK=true at the time the execute
command signal is received, the timer "tSynchrocheck" will not start. The start signal for the
synchronizing is obtained if the synchrocheck conditions are not fulfilled.

Transformer protection RET670 967

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

The parameter tSynchronizing is used to define the maximum allowed time between the start signal
for synchronizing and the confirmation that synchronizing is in progress.

execute command

SYNC_OK

tSynchrocheck
t1
START_SY

SY_INPRO

tSynchronizing t2>tSynchronizing, then

t2 blocked-by-synchrocheck in
'cause' is set

en05000095.vsd
IEC05000095 V1 EN-US

Figure 565: tSynchroCheck and tSynchronizing

16.4.8 Circuit breaker SXCBR IP15614-1 v3

16.4.8.1 Functionality M13489-3 v6

The purpose of Circuit breaker (SXCBR) is to provide the actual status of positions and to perform
the control operations, that is, pass all the commands to primary apparatuses in the form of circuit
breakers via binary output boards and to supervise the switching operation and position.

16.4.8.2 Function block M13500-3 v5

SXCBR
BLOCK XPOS
LR_SWI EXE_OP
OPEN EXE_CL
CLOSE SUBSTED
BL_OPEN OP_BLKD
BL_CLOSE CL_BLKD
BL_UPD UPD_BLKD
POSOP EN POSITION
POSCLOSE OPENP OS
CBOPCAP CLOSEPOS
TR_OPEN TR_POS
TR_CLOSE CNT_VAL
RS_CNT L_CAUSE
EEH_WARN EEHEALTH
EEH_ALM CBOPCAP
XIN
IEC05000338-6-en.vsdx
IEC05000338 V6 EN-US

Figure 566: SXCBR function block

968 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.4.8.3 Signals
PID-6799-INPUTSIGNALS v3

Table 616: SXCBR Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
LR_SWI BOOLEAN 0 Local/Remote switch indication from switchyard
OPEN BOOLEAN 0 Pulsed signal used to immediately open the switch
CLOSE BOOLEAN 0 Pulsed signal used to immediately close the switch
BL_OPEN BOOLEAN 0 Signal to block the open command
BL_CLOSE BOOLEAN 0 Signal to block the close command
BL_UPD BOOLEAN 0 Steady signal for block of the position updating
POSOPEN BOOLEAN 0 Signal for open position of apparatus from I/O
POSCLOSE BOOLEAN 0 Signal for close position of apparatus from I/O
CBOPCAP INTEGER 3 Breaker operating capability 1 = None, 2 = O, 3 = CO, 4 = OCO, 5
= COCO, 6+ = More
TR_OPEN BOOLEAN 0 Signal for open position of truck from I/O
TR_CLOSE BOOLEAN 0 Signal for close position of truck from I/O
RS_CNT BOOLEAN 0 Resets the operation counter
EEH_WARN BOOLEAN 0 Warning from external equipment
EEH_ALM BOOLEAN 0 Alarm from external equipment
XIN GROUP - Execution information from CSWI
SIGNAL

PID-6799-OUTPUTSIGNALS v3

Table 617: SXCBR Output signals

Name Type Description

XPOS GROUP SIGNAL Group connection to CSWI for XCBR and XSWI
EXE_OP BOOLEAN Executes the command for open direction
EXE_CL BOOLEAN Executes the command for close direction
SUBSTED BOOLEAN Indication that the position is substituted
OP_BLKD BOOLEAN Indication that the function is blocked for open commands
CL_BLKD BOOLEAN Indication that the function is blocked for close commands
UPD_BLKD BOOLEAN Update of position indication is blocked
POSITION INTEGER Apparatus position indication
OPENPOS BOOLEAN Apparatus open position
CLOSEPOS BOOLEAN Apparatus closed position
TR_POS INTEGER Truck position indication
CNT_VAL INTEGER Operation counter value
L_CAUSE INTEGER Latest value of the error indication during command
EEHEALTH INTEGER External equipment health. 1=No warning or alarm, 2=Warning,
3=Alarm
CBOPCAP INTEGER Breaker operating capability 1 = None, 2 = O, 3 = CO, 4 = OCO, 5
= COCO, 6+ = More

Transformer protection RET670 969

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.4.8.4 Settings
PID-6799-SETTINGS v3

Table 618: SXCBR Non group settings (basic)

Name Values (Range) Unit Step Default Description

tStartMove 0.000 - 60.000 s 0.001 0.100 Supervision time for the apparatus to
move after a command
tIntermediate 0.000 - 60.000 s 0.001 0.150 Allowed time for intermediate position
AdaptivePulse Not adaptive - - Not adaptive Output resets when a new correct end
Adaptive position is reached
tOpenPulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for open command
tClosePulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for close command
InitialCount 0 - 20000 - 1 0 Initial number of operations (Initial count
value)

16.4.8.5 Operation principle

M13487-4 v9
The circuit breaker function (SXCBR) is used by other functions such as, for example, switch
controller, protection functions, autorecloser function or an IEC 61850 client residing in another IED
or the operator place. The SXCBR function executes commands, evaluates block conditions and
evaluates different time supervision conditions. Only if all conditions indicate a switch operation to be
allowed, the function performs the execution command. In case of erroneous conditions, the function
indicates an appropriate "cause" value, see Table 601.

SXCBR has an operation counter for closing and opening commands. The counter value can be read
remotely from the operator place. The value is reset from local HMI, a binary input or remotely from
the operator place by configuring a signal from the Single Point Generic Control 8 signals
(SPC8GAPC) for example. The health of the external equipment, the switch, can be monitored
according to IEC 61850-8-1. The operation counter functionality and the external equipment health
supervision are independent sub-functions of the circuit breaker function.

Local/Remote switch M13487-7 v4

One binary input signal LR_SWI is included in SXCBR to indicate the local/remote switch position
from switchyard provided via the I/O board. If this signal is set to TRUE it means that change of
position is allowed only from switchyard level. If the signal is set to FALSE it means that command
from IED or higher level is permitted. When the signal is set to TRUE all commands (for change of
position) are rejected, even trip commands from protection functions are rejected. The functionality of
the local/remote switch is described in Figure 567.

Local= Operation at
UE switch yard level
TR

From I/O switchLR

FAL
SE
Remote= Operation at
IED or higher level

en05000096.vsd
IEC05000096 V1 EN-US

Figure 567: Local/Remote switch

Blocking principles M13487-12 v7

SXCBR includes several blocking principles. The basic principle for all blocking signals is that they
will affect commands from all other clients for example, switch controller, protection functions and
autoreclosure.

970 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

The blocking possibilities are:

• Block/deblock for open command. It is used to block operation for the open command.
• Block/deblock for close command. It is used to block operation for the close command.
• Update block/deblock of positions. It is used to block the updating of position values. Other
signals related to the position will be reset.
• Blocking of function, BLOCK. If BLOCK signal is set, it means that the function is active, but no
outputs are generated, no reporting, control commands are rejected and functional and
configuration data is visible.

The above blocking outputs are stored in a non-volatile memory.

Substitution M13487-22 v5
The substitution part in SXCBR is used for manual set of the position and quality of the switch. The
typical use of substitution is that an operator enters a manual value because that the real process
value is erroneous for some reason. SXCBR will then use the manually entered value instead of the
value for positions determined by the process.

It is always possible to make a substitution, independently of the position indication

and the status information of the I/O board. When substitution is enabled, the other
signals related to the position follow the substituted position. The substituted values
are stored in a non-volatile memory. If the function is blocked or blocked for update
when the substitution is released, the position value is kept the same as the last
substitution value, but the quality is changed to "questionable, old data", indicating
that the value is old and not reliable.

When the position of the SXCBR is substituted, its IEC 61850-8-1 data object is
marked as “substituted", in addition to the substituted quality, but the position quality
of the connected SCSWI is not dependent on the substitution indication in the
quality, so it does not show that it is derived from a substituted value.

Time diagrams M13487-28 v6

There are two timers for supervising of the execute phase, tStartMove and tIntermediate. tStartMove
supervises that the primary device starts moving after the execute output pulse is sent. tIntermediate
defines the maximum allowed time for intermediate position. Figure 568 explains these two timers
during the execute phase.

Transformer protection RET670 971

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

EXE_CL AdaptivePulse = TRUE

Close pulse duration

OPENPOS

CLOSEPOS

if t1 > tStartMove then

tStartMove timer "switch-not-start-moving"
t1 attribute in 'cause' is set
tStartMove

if t2 > tIntermediate then

tIntermediate timer "persisting-intermediate-state"
t2 attribute in 'cause' is set
tIntermediate

en05000097.vsd

IEC05000097 V1 EN-US

Figure 568: The timers tStartMove and tIntermediate

The timers tOpenPulse and tClosePulse are the minimum length of the execute output pulses to be
sent to the primary equipment. Note that the output pulses for open and close command can have
different pulse lengths. The pulses can also be set to be adaptive with the configuration parameter
AdaptivePulse. Figure 569 shows the principle of the execute output pulse. The AdaptivePulse
parameter will have effect on both execute output pulses. However, as long as the OPEN or CLOSE
inputs are active, the corresponding execute output will remain active if the operation is allowed, thus
overriding AdaptivePulse parameter.

OPENPOS

CLOSEPOS

AdaptivePulse=FALSE
EXE_CL
tClosePulse

AdaptivePulse=TRUE
EXE_CL
tClosePulse
en05000098.vsd
IEC05000098 V1 EN-US

Figure 569: Execute output pulse

If the pulse is set to be adaptive and the activating input is not still active, it is not possible for the
pulse to exceed tOpenPulse or tClosePulse.

The execute output pulses are reset when the activating input is reset and either of the following
happens:

972 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

• the new expected final position is reached and the configuration parameter AdaptivePulse is set
to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch not start moving, that is tStartMove has elapsed for normal
commands, or tIntermediate has elapsed starting from intermediate position, and the position
indications are valid.

If either of the position inputs are invalid or unconnected, the combined position is considered as
invalid. Then the execute output pulse resets at earliest when time tOpenPulse or tClosePulse has
elapsed.

If the breaker reaches the final position before the execution pulse time has elapsed,
and AdaptivePulse is not true, then the function waits for the end of the execution
pulse before indicating the activating function that the command is complete.

If the activating input remains active when the breaker has reached its final position
and the execution pulse time has elapsed, then the function waits for the reset of the
activating input before indicating that the command is complete.

There is one exception to the first item above: if the primary device is in open position and an open
command is executed or if the primary device is in closed position and a close command is executed.
In these cases, with the additional condition that the configuration parameter AdaptivePulse is true,
the execute output pulse is always activated and resets when tStartMove has elapsed. If the
configuration parameter AdaptivePulse is set to false, the execution output remains active until the
pulse duration timer has elapsed.

If the start position indicates bad state (OPENPOS=1 and CLOSEPOS=1) when a
command is executed, the execute output pulse resets at earliest when timer
tOpenPulse or tClosePulse has elapsed.

An example of when a primary device is open and an open command is executed is shown in
Figure 570 .

OPENPOS

CLOSEPOS

EXE_OP AdaptivePulse=FALSE

tOpenPulse

EXE_OP AdaptivePulse=TRUE

tOpenPulse

tStartMove timer

en05000099.vsd
IEC05000099 V1 EN-US

Figure 570: Open command when valid open position is indicated

16.4.9 Circuit switch SXSWI IP15620-1 v2

Transformer protection RET670 973

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.4.9.1 Functionality M16492-3 v6

The purpose of Circuit switch (SXSWI) function is to provide the actual status of positions and to
perform the control operations, that is, pass all the commands to primary apparatuses in the form of
disconnectors or earthing switches via binary output boards and to supervise the switching operation
and position.

16.4.9.2 Function block M13504-3 v5

SXSWI
BLOCK XPOS
LR_SWI EXE_OP
OPEN EXE_CL
CLOSE SUBSTED
BL_OPEN OP_BLKD
BL_CLOSE CL_BLKD
BL_UPD UPD_BLKD
POSOP EN POSITION
POSCLOSE OPENP OS
SWOPCAP CLOSEPOS
RS_CNT CNT_VAL
EEH_WARN L_CAUSE
EEH_ALM EEHEALTH
XIN SWOPCAP

IEC05000339-5-en.vsdx
IEC05000339 V5 EN-US

Figure 571: SXSWI function block

16.4.9.3 Signals
PID-6800-INPUTSIGNALS v4

Table 619: SXSWI Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
LR_SWI BOOLEAN 0 Local/Remote switch indication from switchyard
OPEN BOOLEAN 0 Pulsed signal used to immediately open the switch
CLOSE BOOLEAN 0 Pulsed signal used to immediately close the switch
BL_OPEN BOOLEAN 0 Signal to block the open command
BL_CLOSE BOOLEAN 0 Signal to block the close command
BL_UPD BOOLEAN 0 Steady signal for block of the position updating
POSOPEN BOOLEAN 0 Signal for open position of apparatus from I/O
POSCLOSE BOOLEAN 0 Signal for close position of apparatus from I/O
SWOPCAP INTEGER 4 Switch operating capability 1 = None, 2 = O, 3 = C, 4 = O and C
RS_CNT BOOLEAN 0 Resets the operation counter
EEH_WARN BOOLEAN 0 Warning from external equipment
EEH_ALM BOOLEAN 0 Alarm from external equipment
XIN GROUP - Execution information from CSWI
SIGNAL

974 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

PID-6800-OUTPUTSIGNALS v4

Table 620: SXSWI Output signals

Name Type Description

XPOS GROUP SIGNAL Group connection to CSWI for XCBR and XSWI
EXE_OP BOOLEAN Executes the command for open direction
EXE_CL BOOLEAN Executes the command for close direction
SUBSTED BOOLEAN Indication that the position is substituted
OP_BLKD BOOLEAN Indication that the function is blocked for open commands
CL_BLKD BOOLEAN Indication that the function is blocked for close commands
UPD_BLKD BOOLEAN Update of position indication is blocked
POSITION INTEGER Apparatus position indication
OPENPOS BOOLEAN Apparatus open position
CLOSEPOS BOOLEAN Apparatus closed position
CNT_VAL INTEGER Operation counter value
L_CAUSE INTEGER Latest value of the error indication during command
EEHEALTH INTEGER External equipment health. 1=No warning or alarm, 2=Warning,
3=Alarm
SWOPCAP INTEGER Switch operating capability 1 = None, 2 = O, 3 = C, 4 = O and C

16.4.9.4 Settings
PID-6800-SETTINGS v4

Table 621: SXSWI Non group settings (basic)

Name Values (Range) Unit Step Default Description

tStartMove 0.000 - 60.000 s 0.001 3.000 Supervision time for the apparatus to
move after a command
tIntermediate 0.000 - 60.000 s 0.001 15.000 Allowed time for intermediate position
AdaptivePulse Not adaptive - - Not adaptive Output resets when a new correct end
Adaptive position is reached
tOpenPulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for open command
tClosePulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for close command
SwitchType Load Break - - Disconnector 1=LoadBreak,2=Disconnector,3=EarthS
Disconnector w,4=HighSpeedEarthSw
Earthing Switch
HS Earthing Switch
InitialCount 0 - 20000 - 1 0 Initial number of operations (Initial count
value)

16.4.9.5 Operation principle

M16494-3 v9
The users of the Circuit switch (SXSWI) are other functions such as for example, switch controller,
protection functions, autorecloser function, or a 61850 client residing in another IED or the operator
place. SXSWI executes commands, evaluates block conditions and evaluates different time
supervision conditions. Only if all conditions indicate that a switch operation is to be allowed, SXSWI
performs the execution command. In case of erroneous conditions, the function indicates an
appropriate "cause" value, see Table 601.

SXSWI has an operation counter for closing and opening commands. The counter value can be read
remotely from the operator place. The value is reset from a binary input or remotely from the operator
place by configuring a signal from the Single Point Generic Control 8 signals (SPC8GAPC), for
example.

Transformer protection RET670 975

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Also, the health of the external equipment, the switch, can be monitored according to IEC 61850-8-1.

Local/Remote switch M16494-6 v5

One binary input signal LR_SWI is included in SXSWI to indicate the local/remote switch position
from switchyard provided via the I/O board. If this signal is set to TRUE it means that change of
position is allowed only from switchyard level. If the signal is set to FALSE it means that command
from IED or higher level is permitted. When the signal is set to TRUE all commands (for change of
position) from internal IED clients are rejected. The functionality of the local/remote switch is
described in Figure 572.

Local= Operation at
UE switch yard level
TR

From I/O switchLR

FAL
SE
Remote= Operation at
IED or higher level

en05000096.vsd
IEC05000096 V1 EN-US

Figure 572: Local/Remote switch

Blocking principles M16494-11 v6

SXSWI includes several blocking principles. The basic principle for all blocking signals is that they
will affect commands from all other clients for example, switch controller, protection functions and
autorecloser.

The blocking possibilities are:

• Block/deblock for open command. It is used to block operation for open command.
• Block/deblock for close command. It is used to block operation for close command.
• Update block/deblock of positions. It is used to block the updating of position values. Other
signals related to the position will be reset.
• Blocking of function, BLOCK. If BLOCK signal is set, it means that the function is active, but no
outputs are generated, no reporting, control commands are rejected and functional and
configuration data is visible.

The above blocking outputs are stored in a non-volatile memory.

Substitution M16494-21 v7
The substitution part in SXSWI is used for manual set of the position and quality of the switch. The
typical use of substitution is that an operator enters a manual value because the real process value is
erroneous of some reason. SXSWI will then use the manually entered value instead of the value for
positions determined by the process.

It is always possible to make a substitution, independently of the position indication

and the status information of the I/O board. When substitution is enabled, the other
signals related to the position follow the substituted position. The substituted values
are stored in a non-volatile memory. If the function is blocked or blocked for update
when the substitution is released, the position value is kept the same as the last
substitution value, but the quality is changed to "questionable, old data", indicating
that the value is old and not reliable.

When the position of the SXSWI is substituted, its IEC 61850-8-1 data object is
marked as “substituted", in addition to the substituted quality, but the position quality
of the connected SCSWI is not dependent on the substitution indication in the
quality, so it does not show that it is derived from a substituted value.

976 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Time diagrams M16494-26 v7

There are two timers for supervising of the execute phase, tStartMove and tIntermediate. tStartMove
supervises that the primary device starts moving after the execute output pulse is sent. tIntermediate
defines the maximum allowed time for intermediate position. Figure 573 explains these two timers
during the execute phase.

EXE_CL AdaptivePulse = TRUE

Close pulse duration

OPENPOS

CLOSEPOS

if t1 > tStartMove then

tStartMove timer "switch-not-start-moving"
t1 attribute in 'cause' is set
tStartMove

if t2 > tIntermediate then

tIntermediate timer "persisting-intermediate-state"
t2 attribute in 'cause' is set
tIntermediate

en05000097.vsd

IEC05000097 V1 EN-US

Figure 573: The timers tStartMove and tIntermediate

The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent to the
primary equipment. Note that the output pulses for open and close command can have different
pulse lengths. The pulses can also be set to be adaptive with the configuration parameter
AdaptivePulse. Figure 574 shows the principle of the execute output pulse. The AdaptivePulse
parameter will have effect on both execute output pulses.

OPENPOS

CLOSEPOS

AdaptivePulse=FALSE
EXE_CL
tClosePulse

AdaptivePulse=TRUE
EXE_CL
tClosePulse
en05000098.vsd
IEC05000098 V1 EN-US

Figure 574: Execute output pulse

If the pulse is set to be adaptive and the activating input is not still active, it is not possible for the
pulse to exceed tOpenPulse or tClosePulse.

For the SXSWI the activating inputs should be pulsed, however, the functionality of following them is
the same as for SXCBR.

Transformer protection RET670 977

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

The execute output pulses are reset when the activating input is reset and either of the following
happens:

• the new expected final position is reached and the configuration parameter AdaptivePulse is set
to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch not start moving, that is tStartMove has elapsed for normal
commands, or tIntermediate has elapsed starting from intermediate position, and the position
indications are valid.

If either of the position inputs are invalid or unconnected, the combined position is considered as
invalid. Then the execute output pulse resets at earliest when time tOpenPulse or tClosePulse has
elapsed.

If the controlled primary device reaches the final position before the execution pulse
time has elapsed, and AdaptivePulse is not true, the function waits for the end of the
execution pulse before indicating the activating function that the command is
completed.

If the activating input remains active when the switch has reached its final position
and the execution pulse time has elapsed, the function waits for the reset of the
activating input before indicating that the command is completed.

There is one exception from the first item above. If the primary device is in open position and an
open command is executed or if the primary device is in close position and a close command is
executed. In these cases, with the additional condition that the configuration parameter
AdaptivePulse is true, the execute output pulse is always activated and resets when tStartMove has
elapsed. If the configuration parameter AdaptivePulse is set to false the execution output remains
active until the pulse duration timer has elapsed.

If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a
command is executed the execute output pulse resets only when timer tOpenPulse
or tClosePulse has elapsed.

An example when a primary device is open and an open command is executed is shown in
Figure 575.

OPENPOS

CLOSEPOS

EXE_OP AdaptivePulse=FALSE

tOpenPulse

EXE_OP AdaptivePulse=TRUE

tOpenPulse

tStartMove timer

en05000099.vsd
IEC05000099 V1 EN-US

Figure 575: Open command with open position indication

978 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.4.10 Proxy for signals from switching device via GOOSE XLNPROXY

16.4.10.1 Functionality GUID-11F9CA1C-8E20-489B-822B-34DACC59553A v1

The proxy for signals from switching device via GOOSE (XLNPROXY) gives an internal
representation of the position status and control response for a switch modelled in a breaker IED.
This representation is identical to that of an SXCBR or SXSWI function.

16.4.10.2 Function block GUID-408513CD-A87E-45E8-8E44-24E153947F02 v1

XLNPROXY
BEH* XPOS
BEH_VALID* SELECTED
LOC* OP_BLKD
LOC_VALID* CL_BLKD
BLKOPN* OPENPOS
BLKOPN_V* CLOSEPOS
BLKCLS* CNT_VAL
BLKCLS_V* L_CAUSE
POSVAL* EEHEALTH
POSVAL_V* OPCAP
OPCNT*
OP_CNT_V*
BLK
BLK_VAL
STSELD
STSELD_V
OPRCVD
OPRCVD_V
OPOK
OPOK_VAL
EEHEALTH
EEH_VAL
OPCAP
OPCAP_V
COMMVALID
XIN

IEC16000043-1-en.vsdx
IEC16000043 V1 EN-US

Figure 576: XLNPROXY function block

16.4.10.3 Signals
PID-6712-INPUTSIGNALS v3

Table 622: XLNPROXY Input signals

Name Type Default Description

BEH INTEGER -1 Behaviour
BEH_VLD BOOLEAN 0 Valid data on BEH input
LOC BOOLEAN 0 Local control behaviour
LOC_VLD BOOLEAN 0 Valid data on LOC input
BLKOPN BOOLEAN 0 Block opening
BLKOPN_VLD BOOLEAN 0 Valid data on BLKOPN input
BLKCLS BOOLEAN 0 Block closing
BLKCLS_VLD BOOLEAN 0 Valid data on BLKCLS input
POSVAL INTEGER 0 Switch position, Pos.stVal
POSVAL_VLD BOOLEAN 0 Valid data on POSVAL input
OPCNT INTEGER -1 Operation counter
OPCNT_VLD BOOLEAN 0 Valid data on OPCNT input
Table continues on next page

Transformer protection RET670 979

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Name Type Default Description

BLK BOOLEAN 0 Dynamic blocking of function described by the LN
BLK_VLD BOOLEAN 0 Valid data on BLK input
STSELD BOOLEAN 0 The controllable data is in the status "selected”
STSELD_VLD BOOLEAN 0 Valid data on STSELD input
OPRCVD BOOLEAN 0 Operate command for a controllable data object received
OPRCVD_VLD BOOLEAN 0 Valid data on OPRCVD input
OPOK BOOLEAN 0 Operate command for a controllable data object accepted
OPOK_VLD BOOLEAN 0 Valid data on OPOK input
EEHEALTH INTEGER -1 External equipment health
EEHEALTH_VLD BOOLEAN 0 Valid data on EEHEALTH input
OPCAP INTEGER -1 Operating capability
OPCAP_VLD BOOLEAN 0 Valid data on OPCAP input
COMMVALID BOOLEAN 0 Communication valid
XIN GROUP - Execution information from CSWI
SIGNAL

PID-6712-OUTPUTSIGNALS v3

Table 623: XLNPROXY Output signals

Name Type Description

XPOS GROUP SIGNAL Group connection to CSWI
SELECTED BOOLEAN Select conditions are fulfilled
OP_BLKD BOOLEAN Indication that the function is blocked for open commands
CL_BLKD BOOLEAN Indication that the function is blocked for close commands
OPENPOS BOOLEAN Apparatus open position
CLOSEPOS BOOLEAN Apparatus closed position
CNT_VAL INTEGER Operation counter value
L_CAUSE INTEGER Latest value of the error indication during command
EEHEALTH INTEGER External equipment health. 1=No warning or alarm, 2=Warning,
3=Alarm
OPCAP INTEGER Switch / breaker operating capability

16.4.10.4 Settings
PID-6712-SETTINGS v3

Table 624: XLNPROXY Non group settings (basic)

Name Values (Range) Unit Step Default Description

SwitchType Circuit Breaker - - Circuit Breaker 0 = CB, 1 = Load Break, 2 =
Load Break Disconnector, 3 = Earthing Switch, 4 =
Disconnector High Speed Earthing Switch
Earthing Switch
HS Earth Switch
tStartMove 0.000 - 60.000 s 0.001 0.100 Supervision time for the apparatus to
move after a command
tIntermediate 0.000 - 60.000 s 0.001 0.150 Allowed time for intermediate position

GUID-A4CCC681-D4D8-4534-905D-1D8AD40E923B v1

The default values of the inputs BEH, OPCNT, EEHEALTH and OPCAP are set to -1
to denote that they are not connected.

980 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.4.10.5 Operation principle GUID-D2679E0E-ABB5-46F0-AD9C-F6E8E8099534 v1

The proxy for signals from switching device via GOOSE (XLNPROXY) is intended to be used when
the switch (XCBR/XSWI) is modelled and controlled in a breaker IED or similar unit on the process
bus. XLNPROXY packages the signals from the GOOSE receive function, normally
GOOSEXLNRCV, into the same format as used from SXCBR and SXSWI to SCSWI. It makes a
similar evaluation of the command response as SXCBR and SXSWI when a command is issued from
the connected SCSWI.

16.4.10.6 Position supervision GUID-95C72346-A577-4F0A-8584-8E1593B9B947 v1

XLNPROXY has two outputs for position indication: OPENPOS and CLOSEPOS. Position is a
double point indication and the OPENPOS and CLOSEPOS are binary outputs intended to be used
for condition logics to protection and control functions

Normally, the position outputs, OPENPOS and CLOSEPOS, follow the value of the input POSVAL.
However, if the POSVAL_V input is FALSE, the communication is lost (COMMVALID = FALSE), or
the quality of the position received is bad, the OPENPOS and CLOSEPOS are both set to FALSE.

16.4.10.7 Command response evaluation GUID-A2CDC1AE-A6F5-478B-B6E5-3442C54212D8 v2

The command evaluation is triggered through the group input XIN that is connected to the SCSWI
function controlling the switch.

If an operation is initiated by the SCSWI, the XLNPROXY function checks if the switch is blocked for
the operation direction and that the position moves to the desired position within the two time limits
tStartMove and tIntermediate. The default values for tStartMove and tIntermediate are for a breaker.
The typical values for a disconnector are:

• tStartMove = 3s
• tIntermediate = 15s

In most cases, tStartMove and tIntermediate can be set to the same values as in the
source XCBR or XSWI function. However, if the time limits are set very close to the
actual movement times of the apparatus, compensation may be needed for the
communication delays and differences in cycle time of the XLNPROXY function and
the source function. The compensation should be in the range of 0 - 5ms.

When the switch has started moving, it issues a response to the SCSWI function that the operation
has started. If it does not start moving within tStartMove, the command is deemed as failed, and a
cause is raised on the L_CAUSE output and sent to the SCSWI. The different causes it can identify
are listed in order of priority in table 1. The detection of the different ways of blocking is done while
waiting for movement of the switch, but the cause is not given until the tStartMove has elapsed.

Table 625: Possible cause values from XLNPROXY

IEC61850 IEC61850 Cause Description Conditions

ED1 ED2
8 8 Blocked-by-Mode The BEH input is 5.
2 2 Blocked-by-switching-hierarchy The LOC input indicates that only local commands are
allowed for the breaker IED function.
-24 9 Blocked-for-open-cmd The BLKOPN is active indicating that the switch is
blocked for open commands.
-25 9 Blocked-for-close-cmd The BLKCLS is active indicating that the switch is
blocked for close commands.
Table continues on next page

Transformer protection RET670 981

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

IEC61850 IEC61850 Cause Description Conditions

ED1 ED2
9 9 Blocked-by-process If the Blk input is connected and active indicating that the
switch is dynamically blocked. Or if the OPCAP input is
connected, it indicates that the operation capability of the
switch is not enough to perform the command.
5 5 Position-reached Switch is already in the intended position.
-33 16 Switch-not-start-moving Switch did not start moving within tStartMove.
-34 4 Persistent-intermediate-state The switch stopped in intermediate state for longer than
tIntermediate.
-35 22 Switch-returned-to-init-pos Switch returned to the initial position.
-32 4 Switch-in-bad-state Switch is in a bad position.
-33 22 Not-expected-final-position Switch did not reach the expected final position.

The L_CAUSE output keeps its output value until a new command sequence has been started.

If the quality of the position or the communication becomes bad, the command evaluation replaces
the uncertain position value with intermediate position. Thus, as long as the quality is bad, all
commands will result in the cause Persistant-intermediate-state, -32.

If the switch in the merging unit has the behaviour set to Test or Test blocked, when the IED has the
behaviour On or Blocked, all data from the switch is regarded as invalid. Thus, any command will fail
with the cause PersistantiIntermediate-state, -32, and if selection is used for the switch, all attempts
to select the connected SCSWI will fail with the cause Select-failed, 3, from the SCSWI.

It is possible to speed up the command response for when the command has been started by the
switch in the breaker IED by connecting the inputs OPOK and OPOK_VAL. Then the blocking check
is only done until OPOK is activated and confirmation of that the command has been started is given
to the SCSWI function.

If the inputs STSELD and STSELD_V are connected, the switch in the breaker IED is assumed to
use selection. Then the SCSWI will wait for a selected indication, STSELD input of XLNPROXY,
before accepting selection, this information is transferred to the SCSWI function from the
XLNPROXY through the group connection XPOS. If STSELD is not activated within tSelect of the
SCSWI function, the selection is deemed failed and it gives a negative selection acknowledgement to
the command issuer with the cause Select-failed. Further, if the communication is lost, or the data
received is deemed invalid, the selection will also fail with cause Select-failed from the SCSWI.

16.4.11 Bay reserve QCRSV IP15629-1 v2

16.4.11.1 Functionality M13506-3 v5

The purpose of the reservation (QCRSV) function is primarily to transfer interlocking information
between IEDs in a safe way and to prevent double operation in a bay, switchyard part, or complete
substation.

982 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.4.11.2 Function block M13509-3 v3

QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_RQ2 RES_GRT3
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6
RES_RQ6 RES_GRT7
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLOCK ACK_TO_B
OVERRIDE RESERVED
RES_DATA EXCH_OUT
IEC05000340-3-en.vsdx
IEC05000340 V3 EN-US

Figure 577: QCRSV function block

16.4.11.3 Signals
PID-3561-INPUTSIGNALS v7

Table 626: QCRSV Input signals

Name Type Default Description

EXCH_IN INTEGER 0 Used for exchange signals between different BayRes blocks
RES_RQ1 BOOLEAN 0 Signal for app. 1 that requests to do a reservation
RES_RQ2 BOOLEAN 0 Signal for app. 2 that requests to do a reservation
RES_RQ3 BOOLEAN 0 Signal for app. 3 that requests to do a reservation
RES_RQ4 BOOLEAN 0 Signal for app. 4 that requests to do a reservation
RES_RQ5 BOOLEAN 0 Signal for app. 5 that requests to do a reservation
RES_RQ6 BOOLEAN 0 Signal for app. 6 that requests to do a reservation
RES_RQ7 BOOLEAN 0 Signal for app. 7 that requests to do a reservation
RES_RQ8 BOOLEAN 0 Signal for app. 8 that requests to do a reservation
BLOCK BOOLEAN 0 Reservation is not possible and the output signals are reset
OVERRIDE BOOLEAN 0 Signal to override the reservation
RES_DATA INTEGER 0 Reservation data coming from function block ResIn

PID-3561-OUTPUTSIGNALS v7

Table 627: QCRSV Output signals

Name Type Description

RES_GRT1 BOOLEAN Reservation is made and the app. 1 is allowed to operate
RES_GRT2 BOOLEAN Reservation is made and the app. 2 is allowed to operate
RES_GRT3 BOOLEAN Reservation is made and the app. 3 is allowed to operate
RES_GRT4 BOOLEAN Reservation is made and the app. 4 is allowed to operate
RES_GRT5 BOOLEAN Reservation is made and the app. 5 is allowed to operate
RES_GRT6 BOOLEAN Reservation is made and the app. 6 is allowed to operate
RES_GRT7 BOOLEAN Reservation is made and the app. 7 is allowed to operate
RES_GRT8 BOOLEAN Reservation is made and the app. 8 is allowed to operate
RES_BAYS BOOLEAN Request for reservation of other bays
ACK_TO_B BOOLEAN Acknowledge to other bays that this bay is reserved
RESERVED BOOLEAN Indicates that the bay is reserved
EXCH_OUT INTEGER Used for exchange signals between different BayRes blocks

Transformer protection RET670 983

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.4.11.4 Settings
PID-3561-SETTINGS v7

Table 628: QCRSV Non group settings (basic)

Name Values (Range) Unit Step Default Description

tCancelRes 0.000 - 60.000 s 0.001 10.000 Supervision time for canceling the
reservation
ParamRequest1 Other bays res. - - Only own bay res. Reservation of the own bay only, at
Only own bay res. selection of apparatus 1
ParamRequest2 Other bays res. - - Only own bay res. Reservation of the own bay only, at
Only own bay res. selection of apparatus 2
ParamRequest3 Other bays res. - - Only own bay res. Reservation of the own bay only, at
Only own bay res. selection of apparatus 3
ParamRequest4 Other bays res. - - Only own bay res. Reservation of the own bay only, at
Only own bay res. selection of apparatus 4
ParamRequest5 Other bays res. - - Only own bay res. Reservation of the own bay only, at
Only own bay res. selection of apparatus 5
ParamRequest6 Other bays res. - - Only own bay res. Reservation of the own bay only, at
Only own bay res. selection of apparatus 6
ParamRequest7 Other bays res. - - Only own bay res. Reservation of the own bay only, at
Only own bay res. selection of apparatus 7
ParamRequest8 Other bays res. - - Only own bay res. Reservation of the own bay only, at
Only own bay res. selection of apparatus 8

16.4.11.5 Operation principle

M13505-4 v3
The Bay reserve (QCRSV) function handles the reservation. QCRSV function starts to operate in two
ways. It starts when there is a request for reservation of the own bay or if there is a request for
reservation from another bay. It is only possible to reserve the function if it is not currently reserved.
The signal that can reserve the own bay is the input signal RES_RQx (x=1-8) coming from switch
controller (SCWI). The signals for request from another bay are the outputs RE_RQ_B and
V_RE_RQ from function block RESIN. These signals are included in signal EXCH_OUT from RESIN
and are connected to RES_DATA in QCRSV.

The parameters ParamRequestx (x=1-8) are chosen at reservation of the own bay only (TRUE) or
other bays (FALSE). To reserve the own bay only means that no reservation request RES_BAYS is
created.

Reservation request of own bay M13505-7 v2

If the reservation request comes from the own bay, the function QCRSV has to know which
apparatus the request comes from. This information is available with the input signal RES_RQx and
parameter ParamRequestx (where x=1-8 is the number of the requesting apparatus). In order to
decide if a reservation request of the current bay can be permitted QCRSV has to know whether the
own bay already is reserved by itself or another bay. This information is available in the output signal
RESERVED.

If the RESERVED output is not set, the selection is made with the output RES_GRTx (where x=1-8 is
the number of the requesting apparatus), which is connected to switch controller SCSWI. If the bay
already is reserved the command sequence will be reset and the SCSWI will set the attribute "1-of-n-
control" in the "cause" signal.

Reservation of other bays M13505-11 v2

When the function QCRSV receives a request from an apparatus in the own bay that requires other
bays to be reserved as well, it checks if it already is reserved. If not, it will send a request to the other
bays that are predefined (to be reserved) and wait for their response (acknowledge). The request of
reserving other bays is done by activating the output RES_BAYS.

984 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

When it receives acknowledge from the bays via the input RES_DATA, it sets the output RES_GRTx
(where x=1-8 is the number of the requesting apparatus). If not acknowledgement from all bays is
received within a certain time defined in SCSWI (tResResponse), the SCSWI will reset the
reservation and set the attribute "1-of-n-control" in the "cause" signal.

Reservation request from another bay M13505-15 v2

When another bay requests for reservation, the input BAY_RES in corresponding function block
RESIN is activated. The signal for reservation request is grouped into the output signal EXCH_OUT
in RESIN, which is connected to input RES_DATA in QCRSV. If the bay is not reserved, the bay will
be reserved and the acknowledgment from output ACK_T_B is sent back to the requested bay. If the
bay already is reserved the reservation is kept and no acknowledgment is sent.

Blocking and overriding of reservation M13505-18 v4

If QCRSV function is blocked (input BLOCK is set to true) the reservation is blocked. That is, no
reservation can be made from the own bay or any other bay. This can be set, for example, via a
binary input from an external device to prevent operations from another operator place at the same
time.

The reservation function can also be overridden in the own bay with the OVERRIDE input signal, that
is, reserving the own bay without waiting for the external acknowledge.

Bay with more than eight apparatuses M13505-22 v6

If only one instance of QCRSV is used for a bay that is, use of up to eight apparatuses, the input
EXCH_IN must be set to zero.

If there are more than eight apparatuses in the bay, there has to be one additional QCRSV. The two
QCRSV functions have to communicate and this is done through the input EXCH_IN and
EXCH_OUT according to Figure 578. If more than one QCRSV are used, the execution order is very
important. The execution order must be in the way that the first QCRSV has a lower number than the
next one.

QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_RQ2 RES_GRT3
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6
RES_RQ6 RES_GRT7
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLOCK ACK_TO_B
OVERRIDE RESERVED
RES_DATA EXCH_OUT

QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_BAYS
RES_RQ2 RES_GRT3 1
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6 ACK_TO_B
RES_RQ6 RES_GRT7 1
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS

1
BLOCK ACK_TO_B RESERVED
OVERRIDE RESERVED
RES_DATA EXCH_OUT

IEC05000088-3-en.vsdx
IEC05000088 V3 EN-US

Figure 578: Connection of two QCRSV function blocks

Transformer protection RET670 985

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.4.12 Reservation input RESIN IP15650-1 v2

16.4.12.1 Functionality M16501-3 v6

The Reservation input (RESIN) function receives the reservation information from other bays. The
number of instances is the same as the number of involved bays (up to 60 instances are available).

16.4.12.2 Function block M13512-3 v4

RESIN1
BAY_ACK ACK_F_B
BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT

IEC05000341-2-en.vsd
IEC05000341 V2 EN-US

Figure 579: RESIN1 function block

RESIN2
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
BAY_VAL VALID_TX
BAY_RES RE_RQ_B
V_RE_RQ
EXCH_OUT
IEC09000807_1_en.vsd
IEC09000807 V1 EN-US

Figure 580: RESIN2 function block

16.4.12.3 Signals
PID-3629-INPUTSIGNALS v7

Table 629: RESIN1 Input signals

Name Type Default Description

BAY_ACK BOOLEAN 0 Another bay has acknow. the reservation req. from this bay
BAY_VAL BOOLEAN 0 The reserv. and acknow. signals from another bay are valid
BAY_RES BOOLEAN 0 Request from other bay to reserve this bay

PID-3629-OUTPUTSIGNALS v7

Table 630: RESIN1 Output signals

Name Type Description

ACK_F_B BOOLEAN All other bays have acknow. the reserv. req. from this bay
ANY_ACK BOOLEAN Any other bay has acknow. the reserv. req. from this bay
VALID_TX BOOLEAN The reserv. and acknow. signals from other bays are valid
RE_RQ_B BOOLEAN Request from other bay to reserve this bay
V_RE_RQ BOOLEAN Check if the request of reserving this bay is valid
EXCH_OUT INTEGER Used for exchange signals between different ResIn blocks

986 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

PID-3630-INPUTSIGNALS v7

Table 631: RESIN2 Input signals

Name Type Default Description

EXCH_IN INTEGER 5 Used for exchange signals between different ResIn blocks
BAY_ACK BOOLEAN 0 Another bay has acknow. the reservation req. from this bay
BAY_VAL BOOLEAN 0 The reserv. and acknow. signals from another bay are valid
BAY_RES BOOLEAN 0 Request from other bay to reserve this bay

PID-3630-OUTPUTSIGNALS v7

Table 632: RESIN2 Output signals

Name Type Description

ACK_F_B BOOLEAN All other bays have acknow. the reserv. req. from this bay
ANY_ACK BOOLEAN Any other bay has acknow. the reserv. req. from this bay
VALID_TX BOOLEAN The reserv. and acknow. signals from other bays are valid
RE_RQ_B BOOLEAN Request from other bay to reserve this bay
V_RE_RQ BOOLEAN Check if the request of reserving this bay is valid
EXCH_OUT INTEGER Used for exchange signals between different ResIn blocks

16.4.12.4 Settings
PID-3629-SETTINGS v7

Table 633: RESIN1 Non group settings (basic)

Name Values (Range) Unit Step Default Description

FutureUse Bay in use - - Bay in use The bay for this ResIn block is for future
Bay future use use

PID-3630-SETTINGS v7

Table 634: RESIN2 Non group settings (basic)

Name Values (Range) Unit Step Default Description

FutureUse Bay in use - - Bay in use The bay for this ResIn block is for future
Bay future use use

16.4.12.5 Operation principle M16503-3 v7

The reservation input (RESIN) function is based purely on Boolean logic conditions. The logic
diagram in Figure 581 shows how the output signals are created. The inputs of the function block are
connected to a receive function block representing signals transferred over the station bus from
another bay.

Transformer protection RET670 987

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

EXCH_IN INT

BIN

ACK_F_B
&
FutureUse
³1

ANY_ACK
BAY_ACK ³1

VALID_TX
&

BAY_VAL ³1

RE_RQ_B
³1

BAY_RES &
V _RE_RQ
³1

BIN
EXCH_OUT
INT

en05000089.vsd
IEC05000089 V1 EN-US

Figure 581: Logic diagram for RESIN

Figure 582 describes the principle of the data exchange between all RESIN modules in the current
bay. There is one RESIN function block per "other bay" used in the reservation mechanism. The
output signal EXCH_OUT in the last RESIN functions are connected to the module bay reserve
(QCRSV) that handles the reservation function in the own bay.

988 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

RESIN
BAY_ACK ACK_F_B
Bay 1 BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT

RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
Bay 2 BAY_VAL VALID_TX
BAY_RES RE_RQ_B
V_RE_RQ
EXCH_OUT

RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
Bay n BAY_VAL VALID_TX
BAY_RES RE_RQ_B QCRSV
V_RE_RQ
EXCH_OUT RES_DATA

en05000090.vsd
IEC05000090 V2 EN-US

Figure 582: Diagram of the chaining principle for RESIN

16.5 Voltage control SEMOD158732-1 v3

16.5.1 Identification
SEMOD173054-2 v6

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Automatic voltage control for tap TR1ATCC 90
changer, single control
U

IEC10000165 V1 EN-US

Automatic voltage control for tap TR8ATCC 90

changer, parallel control
U

IEC10000166 V1 EN-US

Tap changer control and supervision, 6 TCMYLTC 84

binary inputs

IEC10000165000 V1 EN-US

Tap changer control and supervision, TCLYLTC 84

32 binary inputs

IEC10000165000 V1 EN-US

Transformer protection RET670 989

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.5.2 Functionality M5864-3 v12

Automatic voltage control for tap changer, single control (TR1ATCC), Automatic voltage control for
tap changer, parallel control (TR8ATCC), Tap changer control and supervision, 6 binary inputs
(TCMYLTC) and Tap changer control and supervision, 32 binary inputs (TCLYLTC) are used for
control of power transformers with an on-load tap changer. The functions provide automatic
regulation of the voltage on the secondary side of transformers or alternatively on a load point further
out in the network.

Control of a single transformer, as well as control of up to eight transformers in parallel is possible.

For parallel control of power transformers, three alternative methods are available: the master-
follower method, the circulating current method and the reverse reactance method. The first two
methods require exchange of information between the parallel transformers and this is provided for
within IEC 61850-8-1.

Voltage control includes many extra features such as the possibility to avoid simultaneous tapping of
parallel transformers, hot stand by regulation of a transformer in a group which regulates it to a
correct tap position even though the LV CB is open, compensation for a possible capacitor bank on
the LV side bay of a transformer, extensive tap changer monitoring including contact wear and
hunting detection, monitoring of the power flow in the transformer so that, for example, the voltage
control can be blocked if the power reverses, etc.

16.5.3 Automatic voltage control for tap changer, TR1ATCC and

TR8ATCC SEMOD158820-1 v4

SEMOD158823-5 v6
The Automatic voltage control for tap changer TR1ATCC for single control and TR8ATCC for parallel
control function controls the voltage on the LV side of a transformer either automatically or manually.
The automatic control can be either for a single transformer, or for a group of parallel transformers.

16.5.3.1 Operation principle

SEMOD158880-5 v6
The LV-side of the transformer is used as the voltage measuring point. If necessary, the LV side
current is used as load current to calculate the line-voltage drop to the regulation point. This current
is also used when parallel control with the circulating current method is used.

In addition, all three-phase currents from the HV-winding (usually the winding where the tap changer
is situated) are used by the Automatic voltage control for tap changer TR1ATCC for single control
and TR8ATCC for parallel control function for over current blocking.

The setting MeasMode is a selection of single-phase, or phase-phase, or positive sequence quantity.

It is to be used for voltage and current measurement on the LV-side. The involved phases are also
selected. Thus, single-phases as well as phase-phase or three-phase feeding on the LV-side is
possible but it is commonly selected for current and voltage.

The analog input signals are normally common for other functions in the IED for example, protection
functions.

The LV-busbar voltage is designated UB, load current IL and for load point voltage UL
will be used in the text to follow.

Automatic voltage control for tap changer, single control TR1ATCC SEMOD158887-4 v6
Automatic voltage control for tap changer, single control TR1ATCC measures the magnitude of the
busbar voltage UB. If no other additional features are enabled (line voltage drop compensation), this
voltage is further used for voltage regulation.

990 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

TR1ATCC then compares this voltage with the set voltage, USet and decides which action should be
taken. To avoid unnecessary switching around the setpoint, a deadband (degree of insensitivity) is
introduced. The deadband is symmetrical around USet, see figure 583, and it is arranged in such a
way that there is an outer and an inner deadband. Measured voltages outside the outer deadband
start the timer to initiate tap commands, whilst the sequence resets when the measured voltage is
once again back inside the inner deadband. One half of the outer deadband is denoted ΔU. The
setting of ΔU, setting Udeadband should be set to a value near to the power transformer’s tap
changer voltage step (typically 75–125% of the tap changer step).

Security Range

*) *) *)
Raise Cmd DU DU Lower Cmd
DUin DUin

0 Ublock Umin U1 Uset U2 Umax Voltage Magnitude

*) Action in accordance with setting

IEC06000489_2_en.vsd
IEC06000489 V2 EN-US

Figure 583: Control actions on a voltage scale

During normal operating conditions the busbar voltage UB, stays within the outer deadband (interval
between U1 and U2 in figure 583). In that case no actions will be taken by the TR1ATCC. However, if
UB becomes smaller than U1, or greater than U2, an appropriate lower or raise timer will start. The
timer will run as long as the measured voltage stays outside the inner deadband. If this condition
persists longer than the preset time delay, TR1ATCC will initiate that the appropriate ULOWER or
URAISE command will be sent from Tap changer control and supervision, 6 binary inputs TCMYLTC,
or 32 binary inputs TCLYLTC to the transformer load tap changer. If necessary, the procedure will be
repeated until the magnitude of the busbar voltage again falls within the inner deadband. One half of
the inner deadband is denoted ΔUin. The inner deadband ΔUin, setting UDeadbandInner should be
set to a value smaller than ΔU. It is recommended to set the inner deadband to 25-70% of the ΔU
value.

This way of working is used by TR1ATCC while the busbar voltage is within the security range
defined by settings Umin and Umax

A situation where UB falls outside this range will be regarded as an abnormal situation.

Instead of controlling the voltage at the LV busbar in the same substation as the transformer itself, it
is possible to control the voltage at a load point out in the network, downstream from the transformer.
The Line Voltage Drop Compensation (LDC) can be selected by a setting parameter, and it works
such that the voltage drop from the transformer location to the load point is calculated based on the
measured load current and the known line impedance.

In order to prevent unnecessary load tap changer operations caused by temporary voltage
fluctuations and to coordinate load tap changer operations in radial networks, a time delay is used for
the tapping command to the load tap changer. The time delay can be either definite time or inverse
time and two time settings are used, the first (t1) for the initial delay of a tap command, and the
second (t2) for consecutive tap commands.

Automatic control for tap changer, parallel control TR8ATCC SEMOD158887-54 v4

Parallel control of power transformers means control of two or more power transformers connected to
the same busbar on the LV side and in most cases also on the HV side. Special measures must be
taken in order to avoid a runaway situation where the tap changers on the parallel transformers
gradually diverge and end up in opposite end positions.

Three alternative methods can be used for parallel control with Automatic control for tap changer,
parallel control TR8ATCC:

Transformer protection RET670 991

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

• master-follower method
• reverse reactance method
• circulating current method.

Parallel control with the master-follower method SEMOD158887-59 v4

In the master-follower method, one of the transformers is selected to be master, and will regulate the
voltage in accordance with the principles Automatic voltage control for a tap changer. Selection of the
master is made by activating the binary input FORCMAST in the TR8ATCC function block for one of
the transformers in the group.

The followers can act in one of two alternative ways selected by a setting parameter:

1. Raise and lower commands (URAISE and ULOWER) generated by the master, initiates the
corresponding command in all follower TR8ATCCs simultaneously, and consequently they will
blindly follow the master commands irrespective of their individual tap positions.
2. The followers read the tap position of the master and adapt to the same tap position or to a tap
position with an offset relative to the master. In this mode, the followers can also be time
delayed relative to the master.

Parallel control with the reverse reactance method SEMOD158887-64 v5

In the reverse reactance method, the LDC (Line voltage drop compensation) is used. The purpose of
which is normally to control the voltage at a load point further out in the network. The very same
function can also be used here but with a completely different objective. Whereas the LDC, when
used to control the voltage at a load point, gives a voltage drop along a line from the busbar voltage
UB to a load point voltage UL, the LDC, when used in the reverse reactance parallel control of
transformers, gives a voltage increase (actually, by adjusting the ratio XL/RL with respect to the
power factor, the length of the vector UL will be approximately equal to the length of UB) from UB up
towards the transformer itself.

When the voltage at a load point is controlled by using LDC, the line impedance from the transformer
to the load point is defined by the setting Xline. If a negative reactance is entered instead of the
normal positive line reactance, parallel transformers will act in such a way that the transformer with a
higher tap position will be the first to tap down when the busbar voltage increases, and the
transformer with a lower tap position will be the first to tap up when the busbar voltage decreases.
The overall performance will then be that a runaway tap situation will be avoided and that the
circulating current will be minimized.

Parallel control with the circulating current method SEMOD158887-78 v5

This method requires extensive exchange of data between the TR8ATCC function blocks (one
TR8ATCC function for each transformer in the parallel group). The TR8ATCC function block can
either be located in the same IED, where they are configured in PCM600 to co-operate, or in different
IEDs. If the functions are located in different IEDs they must communicate via GOOSE interbay
communication on the IEC 61850 communication protocol.

If the functions are located in different IEDs they must communicate via GOOSE interbay
communication on the IEC 61850 communication protocol. Complete exchange of TR8ATCC data,
analog as well as binary, via GOOSE is made cyclically every 300 ms.

The main objectives of the circulating current method for parallel voltage control are:

1. Regulate the busbar or load voltage to the preset target value.

2. Minimize the circulating current in order to achieve optimal sharing of the reactive load between
parallel transformers.

The busbar voltage UB is measured individually for each transformer in the parallel group by its
associated TR8ATCC function. These measured values will then be exchanged between the
transformers, and in each TR8ATCC block, the mean value of all UB values will be calculated. The
resulting value UBmean will then be used in each IED instead of UB for the voltage regulation, thus
assuring that the same value is used by all TR8ATCC functions, and thereby avoiding that one

992 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

erroneous measurement in one transformer could upset the voltage regulation. At the same time,
supervision of the VT mismatch is also performed.

Figure 584 shows an example with two transformers connected in parallel. If transformer T1 has
higher no load voltage it will drive a circulating current which adds to the load current in T1 and
subtracts from the load current in T2.

UT1 ICC...T2 UT2

ICC...T2
+ +
T1 T2 ZT1 IT1 IT2 ZT2
ICC...T1
ICC...T1

IT1 IT2
UB
IL IL

UL Load UL Load

IEC06000484_3_en.vsd
IEC06000484 V3 EN-US

Figure 584: Circulating current in a parallel group of two transformers

It can be shown that the magnitude of the circulating current in this case can be approximately
calculated with the formula:

UT1 - UT 2
I cc _ T 1 = I cc _ T 2 =
ZT 1 + ZT 2
EQUATION1866 V1 EN-US (Equation 266)

Because the transformer impedance is dominantly inductive, it is possible to use just the transformer
reactances in the above formula. At the same time this means that T1 circulating current lags the
busbar voltage by almost 90°, while T2 circulating current leads the busbar voltage by almost 90°.

See figure 585.

Transformer protection RET670 993

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

UT1 CT1*ICC_T1*ZT1

UB
CT2*ICC_T2*ZT2

UT2

IL

IT2 IT1

2*Udeadband

ICC_T2 ICC_T1
T2 Receives Cir_Curr T1 Produces Cir_Curr

IL = IT1+ IT2
Icc_T1 = Imag {IT1- (ZT2/(ZT1+ZT2)) * IL}
Icc_T2 = Imag {IT2- (ZT1/(ZT1+ZT2)) * IL}
en06000525.vsd
IEC06000525 V1 EN-US

Figure 585: Vector diagram for two power transformers working in parallel
Thus, by minimizing the circulating current flow through transformers, the total reactive power flow is
optimized as well. In the same time, at this optimum state the apparent power flow is distributed
among the transformers in the group in proportion to their rated power.

In order to calculate the circulating current, measured current values for the individual transformers
must be communicated between the participating TR8ATCC functions. It should be noted that the
Fourier filters in different IEDs run asynchronously, which means that current and voltage phasors
cannot be exchanged and used for calculation directly between the IEDs. In order to “synchronize”
measurements within all IEDs in the parallel group, a common reference must be chosen. The most
suitable reference quantity for all transformers, belonging to the same parallel group, is the busbar
voltage. This means that the measured busbar voltage is used as a reference phasor in all IEDs, and
the position of the current phasors in a complex plane is calculated in respect to this reference. This
is a simple and effective solution, which eliminates any additional need for synchronization between
the IEDs regarding TR8ATCC function.

At each transformer bay, the real and imaginary parts of the current on the secondary side of the
transformer are calculated from measured values, and distributed to the TR8ATCC functions
belonging to the same parallel group.

As mentioned before, only the imaginary part (reactive current component) of the individual
transformer current is needed for the circulating current calculations. The real part of the current will,
however, be used to calculate the total through load current and will be used for the line voltage drop
compensation.

The total load current is defined as the sum of all individual transformer currents:

k
I L = å Ii
i =1

EQUATION1867 V1 EN-US (Equation 267)

where the subscript i signifies the transformer bay number and k the number of parallel transformers
in the group (k≤ 8). Next step is to extract the circulating current Icc_i that flows in bay i. It is possible

994 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

to identify a term in the bay current which represents the circulating current. The magnitude of the
circulating current in bay i, Icc_i , can be calculated as:

I cc _ i = - Im( I i - K i ´ I L )
EQUATION1868 V1 EN-US (Equation 268)

where Im signifies the imaginary part of the expression in brackets and Ki is a constant which
depends on the number of transformers in the parallel group and their short-circuit reactances. The
TR8ATCC function automatically calculates this constant based on the transformer reactances which
are setting parameters, and shall be given in primary ohms calculated from each transformer rating
plate. The minus sign is added in the above equation in order to get a positive value of the circulating
current for the transformer that generates it.

In this way each TR8ATCC function calculates the circulating current of its own bay.

A plus sign means that the transformer produces circulating current while, a minus sign means that
the transformer receives circulating current.

As a next step, it is necessary to estimate the value of the no-load voltage in each transformer. To do
that the magnitude of the circulating current in each bay is first converted to a voltage deviation, Udi,
with the following formula:

U di = Ci ´ I cc _ i ´ X i
EQUATION1869 V1 EN-US (Equation 269)

where Xi is the short-circuit reactance for transformer i and Ci, is a setting parameter named Comp
which serves the purpose of alternatively increasing or decreasing the impact of the circulating
current in the TR8ATCC control calculations. It should be noted that Udi will have positive values for
transformers that produce circulating current and negative values for transformers that receive
circulating current.

Now the magnitude of the no-load voltage for each transformer can be approximated with:

U i = U Bmean + U di
EQUATION1870 V1 EN-US (Equation 270)

Generally speaking, this value for the no-load voltage can then be put into the voltage control
function in a similar way as for the single transformer described previously. Ui would then be
regarded similarly to the single transformer measured busbar voltage, and further control actions
taken.

For the transformer producing/receiving the circulating current, the calculated no-load voltage will be
greater/smaller than the measured voltage UBmean. The calculated no-load voltage will thereafter be
compared with the set voltage USet . A steady deviation which is outside the outer deadband will
result in ULOWER or URAISE being initiated alternatively. In this way the overall control action will
always be correct since the position of a tap changer is directly related to the transformer no-load
voltage. The sequence resets when UBmean is inside the inner deadband at the same time as the
calculated no-load voltages for all transformers in the parallel group are inside the outer deadband.
The example in figure 586,is a fabricated case and not very realistic, but it illustrates some details on
how the described regulation works.

Transformer protection RET670 995

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

T1 T2 T3 T4

UBmean
T1 No-load voltage

DB1

DB2
USet

DB2

DB1

IEC06000526_2_en.vsd
IEC06000526 V2 EN-US

Figure 586: Selection of transformer to tap

In the figure 586, voltage is considered as increasing above the line denoted USet, and decreasing
below that line.

In the TR8ATCC function for T1 and T4, the calculated no-load voltage for T1 and T4 respectively, is
above the upper limit of DB1 and thus outside the deadband.

In the TR8ATCC function for T2, the calculated no-load voltage for T2, viewed from the upper DB1, is
not outside (above) the deadband, but as viewed from the lower DB1 it is outside (below) the
deadband. However, there is a restriction in a situation like this, when the measured busbar voltage,
UBmean, is on the opposite side of the USet line (in figure 586), then UBmean must be inside DB1 if the
calculated no-load voltage for that transformer shall qualify as a candidate for tapping. Thus in the
example above, the calculated no-load voltage for T2, although below DB1, would not be considered
for tapping in this case.

In the TR8ATCC function for T3, the calculated no-load voltage for T3, is above the upper limit of
DB1 and thus outside the deadband. However, viewed from the upper limit DB1, transformers with
negative voltage deviation, Udi, are disregarded and similarly, viewed from the lower limit DB1,
transformers with positive voltage deviation, Udi, are disregarded. Thus in the example above, the
calculated no-load voltage for T3, although above DB1, would not be considered in this case. Thus in
the example above, the calculated no-load voltage for T3, although above DB1, would not be
considered for tapping in this case.

It is possible to avoid simultaneous tapping, and to distribute tapping actions evenly among the
parallel transformers in a busbar group. This is a selected by a setting parameter, and the algorithm
in the TR8ATCC function will then select the transformer with the greatest voltage deviation Udi to tap
first that is, after time delay t1. Thereafter, the transformer with the then greatest value of Udi
amongst the remaining transformers in the group will tap after a further time delay t2, and so on. This
is made possible as the calculation of Icc is updated every time the measured values are exchanged
on the horizontal communication (every 300 ms). If two transformers have equal magnitude of Udi,
then there is a predetermined order governing which one is going to tap first.

996 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Logic diagrams SEMOD158887-166 v2

AUTO

UL a
a<b
< &
U1 INNER DB b &

a
a>b
>
U2 INNER DB b &

a
a<b
>1 URAISE
<
U1 DB b

a
a>b
>1
> >1 ULOWER
U2 DB b

UB a
a>b
>
U MAX b &

FSD &

en06000509.vsd
IEC06000509 V1 EN-US

Figure 587: Simplified logic for automatic control in single mode operation

AUTO

PARALLEL START
&
OPERSIMTAP

UL a
a<b
< &
U1 INNER DB b &
&
a
a>b
>
U2 INNER DB b &
U CIRCCOMP
&
MIN a
a<b
>1 URAISE
<
U1 DB b >1
U CIRCCOMP
MAX a
a>b
>1
> >1 ULOWER
U2 DB b >1

UB a
a>b
>
U MAX b &

FSD &

en06000511.vsd
IEC06000511 V1 EN-US

Figure 588: Simplified logic for parallel control in the circulating current mode

Transformer protection RET670 997

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

UCCT4 a
a=b
b &
T4PG &
T4
UCCT3 a 1
a=b & ³1
b & & &
T3PG T3 SIMLOWER
³1
UCCT2 a
a=b
1 &
b & &
T2
T2PG

UCCT1 a &
a=b
1 &
& T1
b

MAX
T1PG

a
a=b
b &
&
T1
a 1
a=b & ³1
b & & &
T2PG T2 SIMRAISE
³1
a
a=b
1 &
b & &
T3
T3PG

a &
a=b
1 &
T4
b &
T4PG

MIN

ADAPT

a
³1
a=b
ActualUser S b

³1 1
³1
Udeadband S a
a=b
b
LoadVoltage

HOMING

OperSimTap
1
en06000521.vsd
IEC06000521 V1 EN-US

Figure 589: Simplified logic for simultaneous tapping prevention

From the Master via

horizontal comm.

relativePosition a
a<b
<
raiseVoltageOut
b &
&
lowerVoltageOut
a
a>b
> =
b & URAISE
& 1
Follow Tap

&
& =
ULOWER
1 1
YLTCOUT ® ATCCIN

tapPosition &
&
tapInHighVoltPos

tapInLowVoltPos

en06000510.vsd
IEC06000510 V1 EN-US

Figure 590: Simplified logic for parallel control in Master-Follower mode

998 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.5.4 Tap changer control and supervision, 6 binary inputs TCMYLTC

and TCLYLTC SEMOD171455-1 v6

SEMOD171466-5 v7
The Tap changer control and supervision, 6 binary inputs TCMYLTC and 32 binary inputs TCLYLTC
gives the tap commands to the tap changer, and supervises that commands are carried through
correctly. It has built-in extensive possibilities for tap changer position measurement, as well as
supervisory and monitoring features. This is used in the voltage control and can also give information
about tap position to the transformer differential protection.

16.5.4.1 Operation principle

Reading of tap changer position SEMOD159170-10 v4
The tap changer position can be received to the tap changer control and supervision, 6 binary inputs
TCMYLTC or 32 binary inputs TCLYLTC function block in the following ways:

1. Via binary input signals, one per tap position (max. 6 or 32 positions).
2. Via coded binary (Binary), binary coded decimal (BCD) signals, or Gray coded binary signals.
3. Via a mA input signal.

Via binary input signals, one per tap position SEMOD159170-21 v6

In this option, each tap position has a separate contact that is hard wired to a binary input in the IED.
Via the Signal Matrix tool in PCM600, the contacts on the binary input card are then directly
connected to the

• inputs B1 – B6 on TCMYLTC function

• or inputs B1 – B32 on TCLYLTC function.

Via coded binary (Binary), binary coded decimal (BCD) signals or Gray coded binary signals SEMOD159170-24 v4
The Tap changer control and supervision, (TCMYLTC or TCLYLTC) decodes binary data from up to
six binary inputs to an integer value. The input pattern may be decoded either as BIN, BCD or GRAY
format depending on the setting of the parameter CodeType.

It is also possible to use even parity check of the input binary signal. Whether the parity check shall
be used or not is set with the setting parameter UseParity.

The input BIERR on (TCMYLTC or TCLYLTC) can be used as supervisory input for indication of any
external error ( Binary Input Module) in the system for reading of tap changer position. Likewise, the
input OUTERR can be used as a supervisory of the Binary Input Module.

The truth table (see table 635) shows the conversion for Binary, Binary Coded Decimal, and Gray
coded signals.

Transformer protection RET670 999

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Table 635: Binary, BCD and Gray conversion

IEC06000522 V1 EN-US

The Gray code conversion above is not complete and therefore the conversion from decimal
numbers to Gray code is given below.

1000 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Table 636: Gray code conversion

IEC06000523 V1 EN-US

Via a mA input signal SEMOD159170-35 v4

Any of the six inputs on the mA card (MIM) can be used for the purpose of tap changer position
reading connected to the Tap changer control and supervision, 6 binary inputs TCMYLTC or 32
binary inputs TCLYLTC.

The measurement of the tap changer position via MIM module is based on the principle that the
specified mA input signal range (usually 4-20 mA) is divided into N intervals corresponding to the
number of positions available on the tap changer. All mA values within one interval are then
associated with one tap changer position value.

The number of available tap changer positions N is defined by the setting parameters LowVoltTap
and HighVoltTap, which define the tap position for lowest voltage and highest voltage respectively.

Transformer protection RET670 1001

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.5.5 Connection between TR1ATCC or TR8ATCC and TCMYLTCor

TCLYLTC SEMOD159211-5 v6

The two function blocks Automatic voltage control for tap changer, single control TR1ATCC and
parallel control TR8ATCC and Tap changer control and supervision, 6 binary inputs TCMYLTC and
32 binary inputs TCLYLTC are connected to each other according to figure 591 below.

(Rmk. In case of
parallel control,
this signal shall
TR8ATCC TCLYLTC also be connected
I3P1 ATCCOUT YLTCIN URAISE to HORIZx input of
I3P2 MAN TCINPROG ULOWER the parallel
U3P2 AUTO INERR HIPOSAL transformer
BLOCK IBLK RESETERR LOPOSAL TR8ATCC function
MANCTRL PGTFWD OUTERR POSERRAL
block)
AUTOCTRL PLTREV RS_CLCNT CMDERRAL
PSTO QGTFWD RS_OPCNT TCERRAL
RAISEV QLTREV PARITY POSOUT
LOWERV REVACBLK BIERR CONVERR
EAUTOBLK UHIGH B1 NEWPOS
DEBLKAUT ULOW B2 HIDIFPOS
LVA1 UBLK B3 INVALPOS
LVA2 HOURHUNT B4 YLTCOUT
LVA3 DAYHUNT B5
LVA4 HUNTING B6
LVARESET SINGLE B7
RSTERR PARALLEL B8
DISC HOMING B9
Q1ON ADAPT B10
Q2ON TOTBLK B11
Q3ON AUTOBLK B12
SNGLMODE MASTER B13
T1INCLD FOLLOWER B14
T2INCLD MFERR B15
T3INCLD OUTOFPOS B16
T4INCLD COMMERR B17
T5INCLD ICIRC B18
T6INCLD TRFDISC B19
T7INCLD VTALARM B20
T8INCLD T1PG B21
FORCMAST T2PG B22
RSTMAST T3PG B23
ATCCIN T4PG B24
HORIZ1 T5PG B25
HORIZ2 T6PG B26
HORIZ3 T7PG B27
HORIZ4 T8PG B28
HORIZ5 B29
HORIZ6 B30
HORIZ7 B31
HORIZ8 B32
MA

IEC06000507_2_en.vsd

IEC06000507 V2 EN-US

Figure 591: Connection between TR8ATCC and TCLYLTC

The TR8ATCC and TR1ATCC function blocks have an output signal ATCCOUT, which is connected
to input YLTCIN on TCMYLTC. The data set sent from ATCCOUT to YLTCIN contains 5 binary
signals, one “word” containing 10 binary signals and 1 analog signal. For TR8ATCC data is also sent
from output ATCCOUT to other TR8ATCC function input HORIZx, when the master-follower or
circulating current mode is used.

1002 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Table 637: Binary signals: ATCCOUT / YLTCIN

Signal Description
raiseVolt Order to TCMYLTC or TCLYLTC to make a raise command
lowerVolt Order to TCMYLTC or TCLYLTC to make a lower command
automaticCtrl The regulation is in automatic control
extRaiseBlock Block raise commands
extLowerBlock Block lower commands

Table 638: Binary signals contained in word “enableBlockSignals”: ATCCOUT / YLTCIN

Signal Description
CircCurrBl Alarm/Block tap changer operation because of high circulating current
CmdErrBl Alarm/Block tap changer operation because of command error
OCBl Alarm/Block tap changer operation because of over current
MFPosDiffBl Alarm/Block tap changer operation because the tap difference between a follower and the
master is greater than the set value
OVPartBl Alarm/Block raise commands because the busbar voltage is above Umax
RevActPartBl Alarm/Block raise commands because reverse action is activated
TapChgBl Alarm/Block tap changer operation because of tap changer error
TapPosBl Alarm/Block commands in one direction because the tap changer has reached an end
position, or Alarm/Block tap changer operation because of tap changer error
UVBl Alarm/Block tap changer operation because the busbar voltage is below Ublock
UVPartBl Alarm/Block lower commands because the busbar voltage is between Umin and Ublock

Table 639: Analog signal: ATCCOUT / YLTCIN

Signal Description
currAver Value of current in the phase with the highest current value

In case of parallel control of transformers, the data set sent from output signal ATCCOUT to other
TR8ATCC blocks input HORIZx contains one "word" containing 10 binary signals and 6 analog
signals:

Table 640: Binary signals contained in word “status”: ATCCOUT / HORIZx

Signal Description
TimerOn This signal is activated by the transformer that has started its timer and is going to tap when
the set time has expired.
automaticCTRL Activated when the transformer is set in automatic control
mutualBlock Activated when the automatic control is blocked
disc Activated when the transformer is disconnected from the busbar
receiveStat Signal used for the horizontal communication
TermIsForcedMaster Activated when the transformer is selected Master in the master-follower parallel control
mode
TermIsMaster Activated for the transformer that is master in the master-follower parallel control mode
termReadyForMSF Activated when the transformer is ready for master-follower parallel control mode
raiseVoltageOut Order from the master to the followers to tap up
lowerVoltageOut Order from the master to the followers to tap down

Transformer protection RET670 1003

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Table 641: Analog signals: ATCCOUT / HORIZx

Signal Description
voltageBusbar Measured busbar voltage for this transformer
ownLoad Currim Measured load current imaginary part for this transformer
ownLoadCurrre Measured load current real part for this transformer
reacSec Transformer reactance in primary ohms referred to the LV side
relativePosition The transformer's actual tap position
voltage Setpoint The transformer's set voltage (USet) for automatic control

The TCMYLTC or TCLYLTC function blocks have an output YLTCOUT. As shown in figure 591, this
output shall be connected to the input ATCCIN and it contains 10 binary signals and 4 integer
signals:

Table 642: Binary signals: YLTCOUT / ATCCIN

Signal Description
tapInOperation Tap changer in operation, changing tap position
direction Direction, raise or lower, for the most recent tap changer operation
tapInHighVoltPos Tap changer in high end position
tapInLowVoltPos Tap changer in low end position
tapPositionError Error in reading of tap position ( tap position out of range, more than one step change, BCD
code error (unaccepted combination), parity fault, mA out of range, hardware fault for
example, BIM etc.)
tapChgError This is set high when the tap changer has not carried through a raise/lower command within
the expected max. time, or if the tap changer starts tapping without a given command.
cmdError This is set high if a given raise/lower command is not followed by a tap position change
within the expected max. time
raiseVoltageFb Feedback to TR1ATCC or TR8ATCC that a raise command shall be executed
lowerVoltageFb Feedback to TR1ATCC or TR8ATCC that a lower command shall be executed
timeOutTC Setting value of tTCTimeout that tTCTimeout has timed out.

Table 643: Integer signals: YLTCOUT / ATCCIN

Signal Description
tapPosition Actual tap position as reported from the load tap changer
numberOfOperations Accumulated number of tap changer operations
tapPositionMaxVolt Tap position for highest voltage
tapPositionMinVolt Tap position for lowest voltage

1004 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.5.6 Function block SEMOD172939-1 v2

SEMOD173000-4 v4

TR1ATCC
I3P1* ATCCOUT
I3P2* MAN
U3P2* AUTO
BLOCK IBLK
MANCTRL PGTFWD
AUTOCTRL PLTREV
PSTO QGTFWD
RAISEV QLTREV
LOWERV REVACBLK
EAUTOBLK UHIGH
DEBLKAUT ULOW
LVA1 UBLK
LVA2 HOURHUNT
LVA3 DAYHUNT
LVA4 HUNTING
LVARESET TIMERON
RSTERR TOTBLK
ATCCIN AUTOBLK
UGTUPPDB
ULTLOWDB

IEC07000041_2_en.vsd
IEC07000041 V2 EN-US

Figure 592: TR1ATCC function block

SEMOD172997-4 v5

TR8ATCC
I3P1* ATCCOUT
I3P2* MAN
U3P2* AUTO
BLOCK IBLK
MANCTRL PGTFWD
AUTOCTRL PLTREV
PSTO QGTFWD
RAISEV QLTREV
LOWERV REVACBLK
EAUTOBLK UHIGH
DEBLKAUT ULOW
LVA1 UBLK
LVA2 HOURHUNT
LVA3 DAYHUNT
LVA4 HUNTING
LVARESET SINGLE
RSTERR PARALLEL
DISC TIMERON
Q1ON HOMING
Q2ON ADAPT
Q3ON TOTBLK
SNGLMODE AUTOBLK
T1INCLD MASTER
T2INCLD FOLLOWER
T3INCLD MFERR
T4INCLD OUTOFPOS
T5INCLD UGTUPPDB
T6INCLD ULTLOWDB
T7INCLD COMMERR
T8INCLD ICIRC
FORCMAST TRFDISC
RSTMAST VTALARM
ATCCIN T1PG
HORIZ1 T2PG
HORIZ2 T3PG
HORIZ3 T4PG
HORIZ4 T5PG
HORIZ5 T6PG
HORIZ6 T7PG
HORIZ7 T8PG
HORIZ8

IEC07000040_2_en.vsd
IEC07000040 V2 EN-US

Figure 593: TR8ATCC function block

Transformer protection RET670 1005

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

SEMOD173008-4 v4

TCMYLTC
YLTCIN* URAISE
TCINPROG ULOWER
INERR HIPOSAL
RESETERR LOPOSAL
OUTERR POSERRAL
RS_CLCNT CMDERRAL
RS_OPCNT TCERRAL
PARITY POSOU T
BIERR CONVERR
B1 NEWPOS
B2 HIDIFPOS
B3 INVALPOS
B4 TCPOS
B5 YLTCOUT
B6
MA

IEC07000038-4-en.vsdx
IEC07000038 V4 EN-US

Figure 594: TCMYLTC function block

SEMOD173023-4 v3

TCLYLTC
YLTCIN* URAISE
TCINPROG ULOWER
INERR HIPOSAL
RESETERR LOPOSAL
OUTERR POSERRAL
RS_CLCNT CMDERRAL
RS_OPCNT TCERRAL
PARITY POSOUT
BIERR CONVERR
B1 NEWPOS
B2 HIDIFPOS
B3 INVALPOS
B4 TCPOS
B5 YLTCOUT
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
MA

IEC07000037_2_en.vsd
IEC07000037 V2 EN-US

Figure 595: TCLYLTC function block

SEMOD173145-4 v3

VCTRRCV
BLOCK VCTR_REC
COMVALID
DATVALID

IEC07000045-2-en.vsd
IEC07000045 V2 EN-US

Figure 596: VCTRRCV function block

1006 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.5.7 Signals
PID-6562-INPUTSIGNALS v3

Table 644: TR1ATCC Input signals

Name Type Default Description

I3P1 GROUP - Input group for current on HV side
SIGNAL
I3P2 GROUP - Input group for current on LV side
SIGNAL
U3P2 GROUP - Input group for voltage on LV side
SIGNAL
BLOCK BOOLEAN 0 Block of function
MANCTRL BOOLEAN 0 Binary "MAN" command
AUTOCTRL BOOLEAN 0 Binary "AUTO" command
PSTO INTEGER 0 Operator place selection
RAISEV BOOLEAN 0 Binary "UP" command
LOWERV BOOLEAN 0 Binary "DOWN" command
EAUTOBLK BOOLEAN 0 Block the voltage control in automatic control mode
DEBLKAUT BOOLEAN 0 Binary "Deblock Auto" command
LVA1 BOOLEAN 0 Activation of load voltage adjust. factor 1
LVA2 BOOLEAN 0 Activation of load voltage adjust. factor 2
LVA3 BOOLEAN 0 Activation of load voltage adjust. factor 3
LVA4 BOOLEAN 0 Activation of load voltage adjust. factor 4
LVARESET BOOLEAN 0 Reset LVA adjustment to 0
RSTERR BOOLEAN 0 Resets the automatic control commands raise and lower
ATCCIN GROUP - Group connection from YLTCOUT
SIGNAL

PID-6562-OUTPUTSIGNALS v3

Table 645: TR1ATCC Output signals

Name Type Description

ATCCOUT GROUP SIGNAL Group connection to horizontal communication and YLTCIN
MAN BOOLEAN The control is in manual mode
AUTO BOOLEAN Automatic control mode is active
IBLK BOOLEAN One phase current is above the settable limit
PGTFWD BOOLEAN Active power above the settable limit powerActiveForw
PLTREV BOOLEAN Active power below the settable limit powerActiveRev
QGTFWD BOOLEAN Reactive power above the settable limit powerReactiveForw
QLTREV BOOLEAN Reactive power below the settable limit powerReactiveRev
REVACBLK BOOLEAN Block caused by reversed action
UHIGH BOOLEAN Busbar voltage above the settable limit voltBusbMaxLimit
ULOW BOOLEAN Busbar voltage below the settable limit voltBusbMinLimit
UBLK BOOLEAN Busbar voltage below the settable limit voltBusbBlockLimit
HOURHUNT BOOLEAN Alarm for too many tap changer operations during the last hour
DAYHUNT BOOLEAN Alarm for too many tap changer operations during the last 24
hours
Table continues on next page

Transformer protection RET670 1007

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Name Type Description

HUNTING BOOLEAN Alarm for too many contradictory tap changer operations within
the time sliding window
TIMERON BOOLEAN Raise or lower command to the tap activated
TOTBLK BOOLEAN Block of auto and manual commands
AUTOBLK BOOLEAN Block of auto commands
UGTUPPDB BOOLEAN Voltage greater than deadband-high, ULOWER command to
come
ULTLOWDB BOOLEAN Voltage lower than deadband-low, URAISE command to come

PID-6559-INPUTSIGNALS v3

Table 646: TR8ATCC Input signals

Name Type Default Description

I3P1 GROUP - Input group for current on HV side
SIGNAL
I3P2 GROUP - Input group for current on LV side
SIGNAL
U3P2 GROUP - Input group for voltage on LV side
SIGNAL
BLOCK BOOLEAN 0 Block of function
MANCTRL BOOLEAN 0 Binary "MAN" command
AUTOCTRL BOOLEAN 0 Binary "AUTO" command
PSTO INTEGER 0 Operator place selection
RAISEV BOOLEAN 0 Binary "UP" command
LOWERV BOOLEAN 0 Binary "DOWN" command
EAUTOBLK BOOLEAN 0 Block the voltage control in automatic control mode
DEBLKAUT BOOLEAN 0 Binary "Deblock Auto" command
LVA1 BOOLEAN 0 Activation of load voltage adjust. factor 1
LVA2 BOOLEAN 0 Activation of load voltage adjust. factor 2
LVA3 BOOLEAN 0 Activation of load voltage adjust. factor 3
LVA4 BOOLEAN 0 Activation of load voltage adjust. factor 4
LVARESET BOOLEAN 0 Reset LVA adjustment to 0
RSTERR BOOLEAN 0 Resets the automatic control commands raise and lower
DISC BOOLEAN 0 Disconnected transformer
Q1ON BOOLEAN 0 Capacitor or reactor bank 1 connected
Q2ON BOOLEAN 0 Capacitor or reactor bank 2 connected
Q3ON BOOLEAN 0 Capacitor or reactor bank 3 connected
SNGLMODE BOOLEAN 0 The voltage control in single control
T1INCLD BOOLEAN 0 Transformer1 included in parallel group
T2INCLD BOOLEAN 0 Transformer2 included in parallel group
T3INCLD BOOLEAN 0 Transformer3 included in parallel group
T4INCLD BOOLEAN 0 Transformer4 included in parallel group
T5INCLD BOOLEAN 0 Transformer5 included in parallel group
T6INCLD BOOLEAN 0 Transformer6 included in parallel group
T7INCLD BOOLEAN 0 Transformer7 included in parallel group
Table continues on next page

1008 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Name Type Default Description

T8INCLD BOOLEAN 0 Transformer8 included in parallel group
FORCMAST BOOLEAN 0 Force transformer to master
RSTMAST BOOLEAN 0 Reset forced master transformer to default
ATCCIN GROUP - Group connection from YLTCOUT
SIGNAL
HORIZ1 GROUP - Group connection for horizontal communication from T1
SIGNAL
HORIZ2 GROUP - Group connection for horizontal communication from T2
SIGNAL
HORIZ3 GROUP - Group connection for horizontal communication from T3
SIGNAL
HORIZ4 GROUP - Group connection for horizontal communication from T4
SIGNAL
HORIZ5 GROUP - Group connection for horizontal communication from T5
SIGNAL
HORIZ6 GROUP - Group connection for horizontal communication from T6
SIGNAL
HORIZ7 GROUP - Group connection for horizontal communication from T7
SIGNAL
HORIZ8 GROUP - Group connection for horizontal communication from T8
SIGNAL

PID-6559-OUTPUTSIGNALS v3

Table 647: TR8ATCC Output signals

Name Type Description

ATCCOUT GROUP SIGNAL Group connection to horizontal communication and YLTCIN
MAN BOOLEAN The control is in manual mode
AUTO BOOLEAN Automatic control mode is active
IBLK BOOLEAN One phase current is above the settable limit
PGTFWD BOOLEAN Active power above the settable limit powerActiveForw
PLTREV BOOLEAN Active power below the settable limit powerActiveRev
QGTFWD BOOLEAN Reactive power above the settable limit powerReactiveForw
QLTREV BOOLEAN Reactive power below the settable limit powerReactiveRev
REVACBLK BOOLEAN Block caused by reversed action
UHIGH BOOLEAN Busbar voltage above the settable limit voltBusbMaxLimit
ULOW BOOLEAN Busbar voltage below the settable limit voltBusbMinLimit
UBLK BOOLEAN Busbar voltage below the settable limit voltBusbBlockLimit
HOURHUNT BOOLEAN Alarm for too many tap changer operations during the last hour
DAYHUNT BOOLEAN Alarm for too many tap changer operations during the last 24
hours
HUNTING BOOLEAN Alarm for too many contradictory tap changer operations within
the time sliding window
SINGLE BOOLEAN The transformer operates in single mode
PARALLEL BOOLEAN The transformer operates in parallel mode
TIMERON BOOLEAN Raise or lower command to the tap activated
HOMING BOOLEAN Transformer is in homing conditions
ADAPT BOOLEAN The transformer is adapting
Table continues on next page

Transformer protection RET670 1009

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Name Type Description

TOTBLK BOOLEAN Block of auto and manual commands
AUTOBLK BOOLEAN Block of auto commands
MASTER BOOLEAN The transformer is master
FOLLOWER BOOLEAN This transformer is a follower
MFERR BOOLEAN The number of masters is different from one
OUTOFPOS BOOLEAN To high difference in tap positions
UGTUPPDB BOOLEAN Voltage greater than deadband-high, ULOWER command to
come
ULTLOWDB BOOLEAN Voltage lower than deadband-low, URAISE command to come
COMMERR BOOLEAN Communication error
ICIRC BOOLEAN Block from high circulating current
TRFDISC BOOLEAN The transformer is disconnected
VTALARM BOOLEAN VT supervision alarm
T1PG BOOLEAN Transformer1 included in parallel group
T2PG BOOLEAN Transformer2 included in parallel group
T3PG BOOLEAN Transformer3 included in parallel group
T4PG BOOLEAN Transformer4 included in parallel group
T5PG BOOLEAN Transformer5 included in parallel group
T6PG BOOLEAN Transformer6 included in parallel group
T7PG BOOLEAN Transformer7 included in parallel group
T8PG BOOLEAN Transformer8 included in parallel group

PID-6506-INPUTSIGNALS v6

Table 648: TCMYLTC Input signals

Name Type Default Description

YLTCIN GROUP - Input group connection for YLTC
SIGNAL
TCINPROG BOOLEAN 0 Indication that tap is moving
INERR BOOLEAN 0 Supervision signal of the input board
RESETERR BOOLEAN 0 Reset of command and tap error
OUTERR BOOLEAN 0 Supervision off the digital output board
RS_CLCNT BOOLEAN 0 Reset of the contact life counter
RS_OPCNT BOOLEAN 0 Resets the operation counter
PARITY BOOLEAN 0 Parity bit from tap changer for the tap position
BIERR BOOLEAN 0 Error bit from tap changer for the tap position
B1 BOOLEAN 0 Bit 1 from tap changer for the tap position
B2 BOOLEAN 0 Bit 2 from tap changer for the tap position
B3 BOOLEAN 0 Bit 3 from tap changer for the tap position
B4 BOOLEAN 0 Bit 4 from tap changer for the tap position
B5 BOOLEAN 0 Bit 5 from tap changer for the tap position
B6 BOOLEAN 0 Bit 6 from tap changer for the tap position
MA REAL 0 mA from tap changer for the tap position

1010 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

PID-6506-OUTPUTSIGNALS v6

Table 649: TCMYLTC Output signals

Name Type Description

URAISE BOOLEAN Raise voltage command to tap changer
ULOWER BOOLEAN Lower voltage command to tap changer
HIPOSAL BOOLEAN Alarm for tap in highest volt position
LOPOSAL BOOLEAN Alarm for tap in lowest volt position
POSERRAL BOOLEAN Alarm that indicates a problem with the position indication
CMDERRAL BOOLEAN Alarm for a command without an expected position change
TCERRAL BOOLEAN Alarm for none or illegal tap position change
POSOUT BOOLEAN Tap position outside min and max position
CONVERR BOOLEAN General tap position conversion error
NEWPOS BOOLEAN A new tap position is reported, 1 sec pulse
HIDIFPOS BOOLEAN Tap position has changed more than one position
INVALPOS BOOLEAN Last position change was an invalid change
TCPOS INTEGER Integer value corresponding to actual tap position
YLTCOUT GROUP SIGNAL Group connection to ATCCIN

PID-3668-INPUTSIGNALS v6

Table 650: TCLYLTC Input signals

Name Type Default Description

YLTCIN GROUP - Input group connection for YLTC
SIGNAL
TCINPROG BOOLEAN 0 Indication that tap is moving
INERR BOOLEAN 0 Supervision signal of the input board
RESETERR BOOLEAN 0 Reset of command and tap error
OUTERR BOOLEAN 0 Supervision off the digital output board
RS_CLCNT BOOLEAN 0 Reset of the contact life counter
RS_OPCNT BOOLEAN 0 Resets the operation counter
PARITY BOOLEAN 0 Parity bit from tap changer for the tap position
BIERR BOOLEAN 0 Error bit from tap changer for the tap position
B1 BOOLEAN 0 Bit 1 from tap changer for the tap position
B2 BOOLEAN 0 Bit 2 from tap changer for the tap position
B3 BOOLEAN 0 Bit 3 from tap changer for the tap position
B4 BOOLEAN 0 Bit 4 from tap changer for the tap position
B5 BOOLEAN 0 Bit 5 from tap changer for the tap position
B6 BOOLEAN 0 Bit 6 from tap changer for the tap position
B7 BOOLEAN 0 Bit 7 from tap changer for the tap position
B8 BOOLEAN 0 Bit 8 from tap changer for the tap position
B9 BOOLEAN 0 Bit 9 from tap changer for the tap position
B10 BOOLEAN 0 Bit 10 from tap changer for the tap position
B11 BOOLEAN 0 Bit 11 from tap changer for the tap position
B12 BOOLEAN 0 Bit 12 from tap changer for the tap position
B13 BOOLEAN 0 Bit 13 from tap changer for the tap position
Table continues on next page

Transformer protection RET670 1011

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Name Type Default Description

B14 BOOLEAN 0 Bit 14 from tap changer for the tap position
B15 BOOLEAN 0 Bit 15 from tap changer for the tap position
B16 BOOLEAN 0 Bit 16 from tap changer for the tap position
B17 BOOLEAN 0 Bit 17 from tap changer for the tap position
B18 BOOLEAN 0 Bit 18 from tap changer for the tap position
B19 BOOLEAN 0 Bit 19 from tap changer for the tap position
B20 BOOLEAN 0 Bit 20 from tap changer for the tap position
B21 BOOLEAN 0 Bit 21 from tap changer for the tap position
B22 BOOLEAN 0 Bit 22 from tap changer for the tap position
B23 BOOLEAN 0 Bit 23 from tap changer for the tap position
B24 BOOLEAN 0 Bit 24 from tap changer for the tap position
B25 BOOLEAN 0 Bit 25 from tap changer for the tap position
B26 BOOLEAN 0 Bit 26 from tap changer for the tap position
B27 BOOLEAN 0 Bit 27 from tap changer for the tap position
B28 BOOLEAN 0 Bit 28 from tap changer for the tap position
B29 BOOLEAN 0 Bit 29 from tap changer for the tap position
B30 BOOLEAN 0 Bit 30 from tap changer for the tap position
B31 BOOLEAN 0 Bit 31 from tap changer for the tap position
B32 BOOLEAN 0 Bit 32 from tap changer for the tap position
MA REAL 0 mA from tap changer for the tap position

PID-3668-OUTPUTSIGNALS v7

Table 651: TCLYLTC Output signals

Name Type Description

URAISE BOOLEAN Raise voltage command to tap changer
ULOWER BOOLEAN Lower voltage command to tap changer
HIPOSAL BOOLEAN Alarm for tap in highest volt position
LOPOSAL BOOLEAN Alarm for tap in lowest volt position
POSERRAL BOOLEAN Alarm that indicates a problem with the position indication
CMDERRAL BOOLEAN Alarm for a command without an expected position change
TCERRAL BOOLEAN Alarm for none or illegal tap position change
POSOUT BOOLEAN Tap position outside min and max position
CONVERR BOOLEAN General tap position conversion error
NEWPOS BOOLEAN A new tap position is reported, 1 sec pulse
HIDIFPOS BOOLEAN Tap position has changed more than one position
INVALPOS BOOLEAN Last position change was an invalid change
CNT_VAL INTEGER Number of operations on tap changer
TCPOS INTEGER Integer value corresponding to actual tap position
YLTCOUT GROUP SIGNAL Group connection to ATCCIN

PID-923-INPUTSIGNALS v6

Table 652: VCTRRCV Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function

1012 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

PID-923-OUTPUTSIGNALS v6

Table 653: VCTRRCV Output signals

Name Type Description

VCTR_REC GROUP SIGNAL Received data from horizontal communication
COMVALID BOOLEAN Communication is valid
DATVALID BOOLEAN Data valid

16.5.8 Settings
PID-6562-SETTINGS v3

Table 654: TR1ATCC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
MeasMode L1 - - PosSeq Selection of measured voltage and
L2 current
L3
L1L2
L2L3
L3L1
PosSeq
TotalBlock Off - - Off Total block of the voltage control function
On
AutoBlock Off - - Off Block of the automatic mode in voltage
On control function
FSDMode Off - - Off Fast step down function activation mode
Auto
AutoMan
tFSD 1.0 - 100.0 s 0.1 15.0 Time delay for lower command when fast
step down mode is activated
USet 85.0 - 120.0 %UB 0.1 100.0 Voltage control set voltage, % of rated
voltage
UDeadband 0.2 - 9.0 %UB 0.1 1.2 Outer voltage deadband, % of rated
voltage
UDeadbandInner 0.1 - 9.0 %UB 0.1 0.9 Inner voltage deadband, % of rated
voltage
Umax 80 - 180 %UB 1 105 Upper lim of busbar voltage, % of rated
voltage
Umin 70 - 120 %UB 1 80 Lower lim of busbar voltage, % of rated
voltage
Ublock 50 - 120 %UB 1 80 Undervoltage block level, % of rated
voltage
t1Use Constant - - Constant Activation of long inverse time delay
Inverse
t1 3 - 1000 s 1 60 Time delay (long) for automatic control
commands
t2Use Constant - - Constant Activation of short inverse time delay
Inverse
t2 1 - 1000 s 1 15 Time delay (short) for automatic control
commands
tMin 3 - 120 s 1 5 Minimum operating time in inverse mode
Table continues on next page

Transformer protection RET670 1013

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Name Values (Range) Unit Step Default Description

OperationLDC Off - - Off Operation line voltage drop
On compensation
OperCapaLDC Off - - Off LDC compensation for capacitive load
On
Rline 0.00 - 150.00 ohm 0.01 0.0 Line resistance, primary values, in ohm
Xline -150.00 - 150.00 ohm 0.01 0.0 Line reactance, primary values, in ohm
LVAConst1 -20.0 - 20.0 %UB 0.1 0.0 Constant 1 for LVA, % of regulated
voltage
LVAConst2 -20.0 - 20.0 %UB 0.1 0.0 Constant 2 for LVA, % of regulated
voltage
LVAConst3 -20.0 - 20.0 %UB 0.1 0.0 Constant 3 for LVA, % of regulated
voltage
LVAConst4 -20.0 - 20.0 %UB 0.1 0.0 Constant 4 for LVA, % of regulated
voltage
VRAuto -20.0 - 20.0 %UB 0.1 0.0 Load voltage auto correction, % of rated
voltage
OperationRA Off - - Off Enable block from reverse action
On supervision
tRevAct 30 - 6000 s 1 60 Duration time for the reverse action
block signal
RevActLim 0 - 100 %IB1 1 95 Current limit for reverse action block in
% of I1Base
Iblock 5 - 250 %IB1 1 150 Overcurrent block level, % of rated
current
HourHuntDetect 0 - 30 Op/H 1 30 Level for number of counted raise/lower
within one hour
DayHuntDetect 0 - 100 Op/D 1 100 Level for number of counted raise/lower
within 24 hour
tWindowHunt 1 - 120 Min 1 60 Time window for hunting alarm, minutes
NoOpWindow 3 - 30 Op/W 1 30 Hunting detection alarm, max
operations/window
P> -9999.99 - 9999.99 MW 0.01 1000 Alarm level of active power in forward
direction
P< -9999.99 - 9999.99 MW 0.01 -1000 Alarm level of active power in reverse
direction
Q> -9999.99 - 9999.99 MVAr 0.01 1000 Alarm level of reactive power in forward
direction
Q< -9999.99 - 9999.99 MVAr 0.01 -1000 Alarm level of reactive power in reverse
direction
tPower 1 - 6000 s 1 10 Time delay for alarms from power
supervision

Table 655: TR1ATCC Group settings (advanced)

Name Values (Range) Unit Step Default Description

UseCmdUSet Off - - Off Enable command input for voltage
On control set voltage

1014 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Table 656: TR1ATCC Non group settings (basic)

Name Values (Range) Unit Step Default Description

Xr2 0.1 - 200.0 Ohm 0.1 0.5 Transformer reactance in primary ohms
on ATCC side
CmdErrBk Alarm - - Auto Block Alarm, auto block or auto&man block for
Auto Block command error
Auto&Man Block
OCBk Alarm - - Auto&Man Block Alarm, auto block or auto&man block for
Auto Block overcurrent
Auto&Man Block
OVPartBk Alarm - - Auto&Man Block Alarm or auto&man partial block for
Auto&Man Block overvoltage
RevActPartBk Alarm - - Alarm Alarm or auto partial block for reverse
Auto Block action
TapChgBk Alarm - - Auto Block Alarm, auto block or auto&man block for
Auto Block tap changer error
Auto&Man Block
TapPosBk Alarm - - Auto Block Alarm, auto or auto&man block for pos
Auto Block sup
Auto&Man Block
UVBk Alarm - - Auto Block Alarm, auto block or auto&man block for
Auto Block undervoltage
Auto&Man Block
UVPartBk Alarm - - Alarm Alarm or auto&man partial block for
Auto&Man Block undervoltage
GlobalBaseSel1 1 - 12 - 1 1 Selection of one of the Global Base
Value groups, winding 1
GlobalBaseSel2 1 - 12 - 1 1 Selection of one of the Global Base
Value groups, winding 2

PID-6559-SETTINGS v3

Table 657: TR8ATCC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
MeasMode L1 - - PosSeq Selection of measured voltage and
L2 current
L3
L1L2
L2L3
L3L1
PosSeq
Q1 -9999.99 - 9999.99 MVAr 0.01 0 Size of cap/reactor bank 1 in MVAr, >0
for C and <0 for L
Q2 -9999.99 - 9999.99 MVAr 0.01 0 Size of cap/reactor bank 2 in MVAr, >0
for C and <0 for L
Q3 -9999.99 - 9999.99 MVAr 0.01 0 Size of cap/reactor bank 3 in MVAr, >0
for C and <0 for L
TotalBlock Off - - Off Total block of the voltage control function
On
AutoBlock Off - - Off Block of the automatic mode in voltage
On control function
FSDMode Off - - Off Fast step down function activation mode
Auto
AutoMan
Table continues on next page

Transformer protection RET670 1015

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Name Values (Range) Unit Step Default Description

tFSD 1.0 - 100.0 s 0.1 15.0 Time delay for lower command when fast
step down mode is activated
USet 85.0 - 120.0 %UB 0.1 100.0 Voltage control set voltage, % of rated
voltage
UDeadband 0.2 - 9.0 %UB 0.1 1.2 Outer voltage deadband, % of rated
voltage
UDeadbandInner 0.1 - 9.0 %UB 0.1 0.9 Inner voltage deadband, % of rated
voltage
Umax 80 - 180 %UB 1 105 Upper lim of busbar voltage, % of rated
voltage
Umin 70 - 120 %UB 1 80 Lower lim of busbar voltage, % of rated
voltage
Ublock 50 - 120 %UB 1 80 Undervoltage block level, % of rated
voltage
t1Use Constant - - Constant Activation of long inverse time delay
Inverse
t1 3 - 1000 s 1 60 Time delay (long) for automatic control
commands
t2Use Constant - - Constant Activation of short inverse time delay
Inverse
t2 1 - 1000 s 1 15 Time delay (short) for automatic control
commands
tMin 3 - 120 s 1 5 Minimum operating time in inverse mode
OperationLDC Off - - Off Operation line voltage drop
On compensation
OperCapaLDC Off - - Off LDC compensation for capacitive load
On
Rline 0.00 - 150.00 ohm 0.01 0.0 Line resistance, primary values, in ohm
Xline -150.00 - 150.00 ohm 0.01 0.0 Line reactance, primary values, in ohm
LVAConst1 -20.0 - 20.0 %UB 0.1 0.0 Constant 1 for LVA, % of regulated
voltage
LVAConst2 -20.0 - 20.0 %UB 0.1 0.0 Constant 2 for LVA, % of regulated
voltage
LVAConst3 -20.0 - 20.0 %UB 0.1 0.0 Constant 3 for LVA, % of regulated
voltage
LVAConst4 -20.0 - 20.0 %UB 0.1 0.0 Constant 4 for LVA, % of regulated
voltage
VRAuto -20.0 - 20.0 %UB 0.1 0.0 Load voltage auto correction, % of rated
voltage
OperationRA Off - - Off Enable block from reverse action
On supervision
tRevAct 30 - 6000 s 1 60 Duration time for the reverse action
block signal
RevActLim 0 - 100 %IB1 1 95 Current limit for reverse action block in
% of I1Base
Iblock 5 - 250 %IB1 1 150 Overcurrent block level, % of rated
current
HourHuntDetect 0 - 30 Op/H 1 30 Level for number of counted raise/lower
within one hour
DayHuntDetect 0 - 100 Op/D 1 100 Level for number of counted raise/lower
within 24 hour
Table continues on next page

1016 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Name Values (Range) Unit Step Default Description

tWindowHunt 1 - 120 Min 1 60 Time window for hunting alarm, minutes
NoOpWindow 3 - 30 Op/W 1 30 Hunting detection alarm, max
operations/window
P> -9999.99 - 9999.99 MW 0.01 1000 Alarm level of active power in forward
direction
P< -9999.99 - 9999.99 MW 0.01 -1000 Alarm level of active power in reverse
direction
Q> -9999.99 - 9999.99 MVAr 0.01 1000 Alarm level of reactive power in forward
direction
Q< -9999.99 - 9999.99 MVAr 0.01 -1000 Alarm level of reactive power in reverse
direction
tPower 1 - 6000 s 1 10 Time delay for alarms from power
supervision
OperationPAR Off - - Off Parallel operation, Off/
CC CirculatingCurrent/MasterFollower
MF
OperCCBlock Off - - On Enable block from circulating current
On supervision
CircCurrLimit 0.0 - 20000.0 %IB2 0.1 100.0 Block level for circulating current
tCircCurr 0 - 1000 s 1 30 Time delay for block from circulating
current
Comp 0 - 2000 % 1 100 Compensation parameter in % for
Circulating Current
OperSimTap Off - - Off Simultaneous tapping prohibited
On
OperUsetPar Off - - Off Use common voltage set point for
On parallel operation
OperHoming Off - - Off Activate homing function
On
VTmismatch 0.5 - 10.0 %UB 0.1 10.0 Alarm level for VT supervision, % of
rated voltage
tVTmismatch 1 - 600 s 1 10 Time delay for VT supervision alarm
T1RXOP Off - - Off Receive block operation from parallel
On transformer1
T2RXOP Off - - Off Receive block operation from parallel
On transformer2
T3RXOP Off - - Off Receive block operation from parallel
On transformer3
T4RXOP Off - - Off Receive block operation from parallel
On transformer4
T5RXOP Off - - Off Receive block operation from parallel
On transformer5
T6RXOP Off - - Off Receive block operation from parallel
On transformer6
T7RXOP Off - - Off Receive block operation from parallel
On transformer7
T8RXOP Off - - Off Receive block operation from parallel
On transformer8
TapPosOffs -5 - 5 - 1 0 Tap position offset in relation to the
master
MFPosDiffLim 1 - 20 - 1 1 Limit for tap pos difference from master
tMFPosDiff 0 - 6000 s 1 60 Time for tap pos difference from master

Transformer protection RET670 1017

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Table 658: TR8ATCC Group settings (advanced)

Name Values (Range) Unit Step Default Description

UseCmdUSet Off - - Off Enable command input for voltage
On control set voltage

Table 659: TR8ATCC Non group settings (basic)

Name Values (Range) Unit Step Default Description

TrfId T1 - - T1 Identity of transformer
T2
T3
T4
T5
T6
T7
T8
Xr2 0.1 - 200.0 Ohm 0.1 0.5 Transformer reactance in primary ohms
on ATCC side
tAutoMSF 0 - 60 s 1 10 Time delay for command for auto
follower
OperationAdapt Off - - Off Enable adapt mode
On
MFMode Follow Cmd - - Follow Cmd Select follow tap or follow command
Follow Tap
CircCurrBk Alarm - - Alarm Alarm, auto block or auto&man block for
Auto Block high circ current
Auto&Man Block
CmdErrBk Alarm - - Auto Block Alarm, auto block or auto&man block for
Auto Block command error
Auto&Man Block
OCBk Alarm - - Auto&Man Block Alarm, auto block or auto&man block for
Auto Block overcurrent
Auto&Man Block
MFPosDiffBk Alarm - - Auto Block Alarm or auto block for tap position
Auto Block difference in MF
OVPartBk Alarm - - Auto&Man Block Alarm or auto&man partial block for
Auto&Man Block overvoltage
RevActPartBk Alarm - - Alarm Alarm or auto partial block for reverse
Auto Block action
TapChgBk Alarm - - Auto Block Alarm, auto block or auto&man block for
Auto Block tap changer error
Auto&Man Block
TapPosBk Alarm - - Auto Block Alarm, auto or auto&man block for pos
Auto Block sup
Auto&Man Block
UVBk Alarm - - Auto Block Alarm, auto block or auto&man block for
Auto Block undervoltage
Auto&Man Block
UVPartBk Alarm - - Alarm Alarm or auto&man partial block for
Auto&Man Block undervoltage
GlobalBaseSel1 1 - 12 - 1 1 Selection of one of the Global Base
Value groups, winding 1
GlobalBaseSel2 1 - 12 - 1 1 Selection of one of the Global Base
Value groups, winding 2

1018 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

PID-6506-SETTINGS v5

Table 660: TCMYLTC Non group settings (basic)

Name Values (Range) Unit Step Default Description

LowVoltTap 1 - 63 - 1 1 Tap position for lowest voltage
HighVoltTap 1 - 63 - 1 33 Tap position for highest voltage
mALow 0.000 - 25.000 mA 0.001 4.000 mA for lowest voltage tap position
mAHigh 0.000 - 25.000 mA 0.001 20.000 mA for highest voltage tap position
CodeType BIN - - BIN Type of code conversion
BCD
Gray
SINGLE
mA
UseParity Off - - Off Enable parity check
On
tStable 1 - 60 s 1 2 Time after position change before the
value is accepted
CLFactor 1.0 - 3.0 - 0.1 2.0 Adjustable factor for contact life function
InitCLCounter 0 - 9999999 - 1 250000 CL counter start value
EnabTapCmd Off - - On Enable commands to tap changer
On
GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 661: TCMYLTC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
tTCTimeout 1 - 120 s 1 5 Tap changer constant time-out
tPulseDur 0.5 - 10.0 s 0.1 1.5 Raise/lower command output pulse
duration

PID-3668-SETTINGS v6

Table 662: TCLYLTC Non group settings (basic)

Name Values (Range) Unit Step Default Description

LowVoltTap 1 - 63 - 1 1 Tap position for lowest voltage
HighVoltTap 1 - 63 - 1 33 Tap position for highest voltage
mALow 0.000 - 25.000 mA 0.001 4.000 mA for lowest voltage tap position
mAHigh 0.000 - 25.000 mA 0.001 20.000 mA for highest voltage tap position
CodeType BIN - - BIN Type of code conversion
BCD
Gray
SINGLE
mA
UseParity Off - - Off Enable parity check
On
tStable 1 - 60 s 1 2 Time after position change before the
value is accepted
CLFactor 1.0 - 3.0 - 0.1 2.0 Adjustable factor for contact life function
Table continues on next page

Transformer protection RET670 1019

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

Name Values (Range) Unit Step Default Description

InitCLCounter 0 - 9999999 s 1 250000 CL counter start value
EnabTapCmd Off - - On Enable commands to tap changer
On
GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 663: TCLYLTC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
tTCTimeout 1 - 120 s 1 5 Tap changer constant time-out
tPulseDur 0.5 - 10.0 s 0.1 1.5 Raise/lower command output pulse
duration

16.5.9 Monitored data

PID-6562-MONITOREDDATA v3

Table 664: TR1ATCC Monitored data

Name Type Values (Range) Unit Description

BUSVOLT REAL - kV The average of the measured busbar
voltage (service value)
VOLTDEV REAL - % Voltage deviation compared to dead
band (%)
TRLDCURR REAL - A Amplitude of own load current
USETOUT REAL - kV Voltage setpoint used in single mode
(service value)
ULOAD REAL - kV Calculated compensated voltage
(service value)
P REAL - MW Calculated active power (service value)
Q REAL - MVAr Calculated reactive power (service
value)
IPRIM REAL - A Max of 3 phase currents (service value)

PID-6559-MONITOREDDATA v3

Table 665: TR8ATCC Monitored data

Name Type Values (Range) Unit Description

BUSVOLT REAL - kV The average of the measured busbar
voltage (service value)
VOLTDEV REAL - % Voltage deviation compared to dead
band (%)
TRLDCURR REAL - A Amplitude of own load current
USETOUT REAL - kV Voltage setpoint used in single mode
(service value)
ULOAD REAL - kV Calculated compensated voltage
(service value)
P REAL - MW Calculated active power (service value)
Q REAL - MVAr Calculated reactive power (service
value)
IPRIM REAL - A Max of 3 phase currents (service value)
Table continues on next page

1020 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Name Type Values (Range) Unit Description

CCAVolt REAL - kV Circulating Current Adjusted Voltage
USETPAR REAL - kV Average voltage setpoint used in parallel
mode
ICIRCUL REAL - A Circulating current

PID-6506-MONITOREDDATA v5

Table 666: TCMYLTC Monitored data

Name Type Values (Range) Unit Description

TCPOS INTEGER - - Integer value corresponding to actual tap
position

PID-3669-MONITOREDDATA v2

Table 667: TCMYLTC Monitored data

Name Type Values (Range) Unit Description

CNT_VAL INTEGER - - Number of operations on tap changer
CLCNT_VAL REAL - - Remaining number of operations at rated
load
TCPOS INTEGER - - Integer value corresponding to actual tap
position

PID-3668-MONITOREDDATA v6

Table 668: TCLYLTC Monitored data

Name Type Values (Range) Unit Description

TCPOS INTEGER - - Integer value corresponding to actual tap
position

16.5.10 Operation principle M6500-430 v11

The voltage control function is built up by two function blocks. Both are logical nodes in IEC
61850-8-1.

• Automatic voltage control for tap changer

• TR1ATCC for single control
• TR8ATCC for parallel control
• Tap changer control and supervision
• TCMYLTC, 6 binary inputs
• TCLYLTC, 32 binary inputs

TR1ATCC and TR8ATCC are designed to automatically maintain the voltage at the LV-side side of a
power transformer within given limits around a set target voltage. A raise or lower command is
generated whenever the measured voltage, for a given period of time, deviates from the set target
value by more than the preset deadband value that is, degree of insensitivity. A time-delay (inverse
or definite time) is set to avoid unnecessary operation during shorter voltage deviations from the
target value, and in order to coordinate with other automatic voltage controllers in the system.

TCMYLTC and TCLYLTC are an interface between TR1ATCC and TR8ATCC and the transformer
load tap changer. More specifically this means that it receives information from TR1ATCC or
TR8ATCC and based on this it gives command-pulses to a power transformer motor driven on-load
tap changer and also receives information from the load tap changer regarding tap position, progress
of given commands, and so on.

TCMYLTC and TCLYLTC also serve the purpose of giving information about tap position to the
transformer differential protection T2WPDIF and T3WPDIF.

Transformer protection RET670 1021

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.5.11 Technical data

SEMOD175215-2 v15

Table 669: TR1ATCC/TR8ATCC, TCMYLTC/TCLYLTC technical data

Function Range or value Accuracy

Transformer reactance (0.1–200.0) Ω, primary -
Time delay for lower command when fast (1.0–100.0) s -
step down mode is activated
Voltage control set voltage (85.0–120.0)% of UBase ±0.25% of Ur

Outer voltage deadband (0.2–9.0)% of UBase -

Inner voltage deadband (0.1–9.0)% of UBase -
Upper limit of busbar voltage (80–180)% of UBase ±0.5% of Ur

Lower limit of busbar voltage (70–120)% of UBase ±0.5% of Ur

Undervoltage block level (50–120)% of UBase ±0.5% of Ur

Time delay (long) for automatic control (3–1000) s ±0.2% or ±600 ms

commands whichever is greater
Time delay (short) for automatic control (1–1000) s ±0.2% or ±600 ms
commands whichever is greater
Minimum operating time in inverse mode (3–120) s ±0.2% or ±600 ms
whichever is greater
Line resistance (0.00–150.00) Ω, primary -
Line reactance (-150.00–150.00) Ω, primary -
Load voltage adjustment constants (-20.0–20.0)% of UBase -
Load voltage auto correction (-20.0–20.0)% of UBase -
Duration time for the reverse action block (30–6000) s ±0.2% or ±600 ms
signal whichever is greater
Current limit for reverse action block (0–100)% of I1Base -
Overcurrent block level (5–250)% of I1Base ±1.0% of Ir at I≤Ir
±1.0% of I at I>Ir

Level for number of counted raise/lower (0–30) operations/hour -

within one hour
Level for number of counted raise/lower (0–100) operations/day -
within 24 hours
Time window for hunting alarm (1–120) minutes -
Hunting detection alarm, max. operations/ (3–30) operations/window -
window
Alarm level of active power in forward and (-9999.99–9999.99) MW ±1.0% of Sr
reverse direction at (10-200)% of Sr and
(85-120)% of UBase
Alarm level of reactive power in forward and (-9999.99–9999.99) MVAr ±1.0% of Sr
reverse direction at (10-200)% of Sr and
(85-120)% of UBase
Time delay for alarms from power (1–6000) s ±0.2% or ±600 ms
supervision whichever is greater
Tap position for lowest and highest voltage (1–63) -
mA for lowest and highest voltage tap (0.000–25.000) mA -
position
Type of code conversion BIN, BCD, GRAY, SINGLE, mA -
Table continues on next page

1022 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Function Range or value Accuracy

Time after position change before the value (1–60) s ±0.2% or ±200 ms
is accepted whichever is greater
Tap changer constant time-out (1–120) s ±0.2% or ±200 ms
whichever is greater
Raise/lower command output pulse duration (0.5–10.0) s ±0.2% or ±200 ms
whichever is greater

16.6 Logic rotating switch for function selection and LHMI

presentation SLGAPC SEMOD114936-1 v5

16.6.1 Identification
SEMOD167845-2 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Logic rotating switch for function SLGAPC - -
selection and LHMI presentation

16.6.2 Functionality SEMOD114908-4 v11

The logic rotating switch for function selection and LHMI presentation (SLGAPC) (or the selector
switch function block) is used to get an enhanced selector switch functionality compared to the one
provided by a hardware selector switch. Hardware selector switches are used extensively by utilities,
in order to have different functions operating on pre-set values. Hardware switches are however
sources for maintenance issues, lower system reliability and an extended purchase portfolio. The
selector switch function eliminates all these problems.

Transformer protection RET670 1023

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.6.3 Function block SEMOD114954-4 v6

SLGAPC
BLOCK ^P01
PSTO ^P02
UP ^P03
DOWN ^P04
^P05
^P06
^P07
^P08
^P09
^P10
^P11
^P12
^P13
^P14
^P15
^P16
^P17
^P18
^P19
^P20
^P21
^P22
^P23
^P24
^P25
^P26
^P27
^P28
^P29
^P30
^P31
^P32
SWPOSN

IEC14000005-1-en.vsd
IEC14000005 V1 EN-US

Figure 597: SLGAPC function block

16.6.4 Signals
PID-6641-INPUTSIGNALS v3

Table 670: SLGAPC Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
PSTO INTEGER 0 Operator place selection
UP BOOLEAN 0 Binary "UP" command
DOWN BOOLEAN 0 Binary "DOWN" command

PID-6641-OUTPUTSIGNALS v3

Table 671: SLGAPC Output signals

Name Type Description

P01 BOOLEAN Selector switch position 1
P02 BOOLEAN Selector switch position 2
P03 BOOLEAN Selector switch position 3
P04 BOOLEAN Selector switch position 4
P05 BOOLEAN Selector switch position 5
P06 BOOLEAN Selector switch position 6
P07 BOOLEAN Selector switch position 7
P08 BOOLEAN Selector switch position 8
Table continues on next page

1024 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Name Type Description

P09 BOOLEAN Selector switch position 9
P10 BOOLEAN Selector switch position 10
P11 BOOLEAN Selector switch position 11
P12 BOOLEAN Selector switch position 12
P13 BOOLEAN Selector switch position 13
P14 BOOLEAN Selector switch position 14
P15 BOOLEAN Selector switch position 15
P16 BOOLEAN Selector switch position 16
P17 BOOLEAN Selector switch position 17
P18 BOOLEAN Selector switch position 18
P19 BOOLEAN Selector switch position 19
P20 BOOLEAN Selector switch position 20
P21 BOOLEAN Selector switch position 21
P22 BOOLEAN Selector switch position 22
P23 BOOLEAN Selector switch position 23
P24 BOOLEAN Selector switch position 24
P25 BOOLEAN Selector switch position 25
P26 BOOLEAN Selector switch position 26
P27 BOOLEAN Selector switch position 27
P28 BOOLEAN Selector switch position 28
P29 BOOLEAN Selector switch position 29
P30 BOOLEAN Selector switch position 30
P31 BOOLEAN Selector switch position 31
P32 BOOLEAN Selector switch position 32
SWPOSN INTEGER Switch position (integer)

16.6.5 Settings
PID-6641-SETTINGS v3

Table 672: SLGAPC Non group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off/On
On
NrPos 2 - 32 - 1 32 Number of positions in the switch
OutType Pulsed - - Steady Output type, steady or pulse
Steady
tPulse 0.000 - 60.000 s 0.001 0.200 Operate pulse duration, in [s]
tDelay 0.000 - 60000.000 s 0.010 0.000 Time delay on the output, in [s]
StopAtExtremes Disabled - - Disabled Stop when min or max position is
Enabled reached

Transformer protection RET670 1025

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.6.6 Monitored data

PID-6641-MONITOREDDATA v3

Table 673: SLGAPC Monitored data

Name Type Values (Range) Unit Description

SWPOSN INTEGER - - Switch position (integer)

16.6.7 Operation principle

SEMOD114931-4 v8
The logic rotating switch for function selection and LHMI presentation (SLGAPC) function has two
operating inputs – UP and DOWN. When a signal is received on the UP input, the function will
activate the output next to the present activated output, in ascending order (for example if the present
activated output is P03 and one activates the UP input then the output P04 will be activated). When a
signal is received on the DOWN input, the function will activate the output next to the present
activated output, in descending order (for example if the present activated output is P03 and one
activates the DOWN input then the output P02 will be activated). Depending on the output settings
the output signals can be steady or pulsed. In case of steady signals, the output will be active till the
time it receives next operation of UP/DOWN inputs. Also, depending on the settings one can have a
time delay between activation of the UP or DOWN input signals and the output activation.

Besides the inputs visible in the application configuration in the Application Configuration Tool, there
are other possibilities that will allow an user to set the desired position directly (without activating the
intermediate positions), either locally or remotely, using a “select before execute” dialog. One can
block the function operation, by activating the BLOCK input. In this case, the present position will be
kept and further operation will be blocked. The operator place (local or remote) is specified through
the PSTO input. If any operation is allowed the signal INTONE from the Fixed signal function block
can be connected. SLGAPC function block has also an integer value output, that generates the
actual position number. The positions and the block names are fully settable by the user. These
names will appear in the menu, so the user can see the position names instead of a number.

16.6.7.1 Graphical display SEMOD114931-35 v4

There are two possibilities for SLGAPC

• if it is used just for the monitoring, the switches will be listed with their actual position names, as
defined by the user (max. 13 characters).
• if it is used for control, the switches will be listed with their actual positions, but only the first
three letters of the name will be used.

In both cases, the switch full name will be shown, but the user has to redefine it when building the
Graphical Display Editor, under the "Caption". If used for the control, the following sequence of
commands will ensure:

1026 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

From the graphical display:

Control
Control Sing le Line Diagram
Measurements Comma nds
Events
Disturb ance r eco rds
Settings
Diagno stics
Test
Chang e to the "Switche s" pag e Reset
of the SLD by left-righ t arrows. Authori zation
Sele ct switch by up-down Lan guage
arro ws

../Control/SLD/Switch
O I ../Control/SLD/Switch

SMBRREC control SMBRREC control

WFM Sele ct switch. Pre ss the
WFM
I or O key. A dialo g b ox
Pilo t se tup app ears.
Pilo t se tup
OFF OFF

Damage control
P: Disc N: Disc Fe
DAL
The pos will not b e mod ified
(outputs will not b e activa ted) unt il OK Cancel
you press the Enter button for O.K.

../Control/SLD/Switch

SMBRREC control
WFM

Pilo t se tup
OFF

Damage control
DFW

IEC06000421-3-en.vsdx
IEC06000421 V3 EN-US

Figure 598: Example 2 on handling the switch from the local HMI.
From the single line diagram on local HMI.

16.7 Selector mini switch VSGAPC SEMOD158754-1 v3

16.7.1 Identification
SEMOD167850-2 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Selector mini switch VSGAPC - 43

16.7.2 Functionality SEMOD158756-5 v10

The Selector mini switch (VSGAPC) function block is a multipurpose function used for a variety of
applications, as a general purpose switch.

Transformer protection RET670 1027

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

VSGAPC can be controlled from the menu, from a symbol on the single line diagram (SLD) on the
local HMI or from Binary inputs.

16.7.3 Function block SEMOD158768-4 v3

VSGAPC
BLOCK BLOCKED
PSTO POSITION
IPOS1 POS1
IPOS2 POS2
CMDPOS12
CMDPOS21

IEC14000066-1-en.vsd
IEC14000066 V1 EN-US

Figure 599: VSGAPC function block

16.7.4 Signals
PID-7478-INPUTSIGNALS v1

Table 674: VSGAPC Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
PSTO INTEGER 0 Operator place selection
IPOS1 BOOLEAN 0 Position 1 indicating input
IPOS2 BOOLEAN 0 Position 2 indicating input

PID-7478-OUTPUTSIGNALS v1

Table 675: VSGAPC Output signals

Name Type Description

BLOCKED BOOLEAN The function is active but the functionality is blocked
POSITION INTEGER Position indication, integer
POS1 BOOLEAN Position 1 indication, logical signal
POS2 BOOLEAN Position 2 indication, logical signal
CMDPOS12 BOOLEAN Execute command from position 1 to position 2
CMDPOS21 BOOLEAN Execute command from position 2 to position 1

16.7.5 Settings
PID-7478-SETTINGS v1

Table 676: VSGAPC Non group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
CtlModel Dir Norm - - Dir Norm Specifies the type for control model
SBO Enh according to IEC 61850
Mode Steady - - Pulsed Operation mode
Pulsed
tSelect 0.000 - 600.000 s 0.001 30.000 Max time between select and execute
signals
tPulse 0.000 - 60.000 s 0.001 0.200 Command pulse lenght

1028 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.7.6 Operation principle SEMOD158762-4 v7

Selector mini switch (VSGAPC) function can be used for double purpose, in the same way as switch
controller (SCSWI) functions are used:

• for indication on the single line diagram (SLD). Position is received through the IPOS1 and
IPOS2 inputs and distributed in the configuration through the POS1 and POS2 outputs, or to
IEC 61850 through reporting, or GOOSE.
• for commands that are received via the local HMI or IEC 61850 and distributed in the
configuration through outputs CMDPOS12 and CMDPOS21.
The output CMDPOS12 is set when the function receives a CLOSE command from the local
HMI when the SLD is displayed and the object is chosen.
The output CMDPOS21 is set when the function receives an OPEN command from the local
HMI when the SLD is displayed and the object is chosen.

It is important for indication in the SLD that a symbol is associated with a controllable
object, otherwise the symbol won't be displayed on the screen. A symbol is created
and configured in GDE tool in PCM600.

The PSTO input is connected to the Local remote switch to have a selection of operators place,
operation from local HMI (Local) or through IEC 61850 (Remote). An INTONE connection from Fixed
signal function block (FXDSIGN) will allow operation from local HMI.

As it can be seen, both indications and commands are done in double-bit representation, where a
combination of signals on both inputs/outputs generate the desired result.

The following table shows the relationship between IPOS1/IPOS2 inputs and the name of the string
that is shown on the SLD. The value of the strings are set in PST.

IPOS1 IPOS2 Name of displayed string Default string value

0 0 PosUndefined P00
1 0 Position1 P01
0 1 Position2 P10
1 1 PosBadState P11

16.8 Generic communication function for Double Point

indication DPGAPC SEMOD55384-1 v4

16.8.1 Identification
GUID-E16EA78F-6DF9-4B37-A92D-5C09827E2297 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Generic communication function for DPGAPC - -
Double Point indication

16.8.2 Functionality SEMOD55850-5 v7

Generic communication function for Double Point indication (DPGAPC) function block is used to
send double point position indications to other systems, equipment or functions in the substation
through IEC 61850-8-1 or other communication protocols. It is especially intended to be used in the
interlocking station-wide logics.

Transformer protection RET670 1029

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.8.3 Function block SEMOD54710-4 v5

IEC13000081 V1 EN-US

Figure 600: DPGAPC function block

16.8.4 Signals SEMOD55883-1 v2

PID-4139-INPUTSIGNALS v12

Table 677: DPGAPC Input signals

Name Type Default Description

OPEN BOOLEAN 0 Open indication
CLOSE BOOLEAN 0 Close indication
VALID BOOLEAN 0 Valid indication

PID-4139-OUTPUTSIGNALS v11

Table 678: DPGAPC Output signals

Name Type Description

POSITION INTEGER Double point indication

16.8.5 Settings ABBD8E283863 v4

The function does not have any parameters available in the local HMI or PCM600.

16.8.6 Operation principle SEMOD55861-5 v7

When receiving the input signals, DPGAPC sends the signals over IEC 61850-8-1 to the systems,
equipment or functions that requests and thus subscribes on these signals. To be able to get the
signals into other systems, equipment or functions, one must use other tools, described in the
Engineering manual, and define which function block in which systems, equipment or functions
should receive this information.

More specifically, DPGAPC function reports a combined double point position indication output
POSITION, by evaluating the value and the timestamp attributes of the inputs OPEN and CLOSE,
together with the logical input signal VALID.

When the input signal VALID is active, the values of the OPEN and CLOSE inputs determine the two-
bit integer value of the output POSITION. The timestamp of the output POSITION will have the latest
updated timestamp of the inputs OPEN and CLOSE.

When the input signal VALID is inactive, DPGAPC function forces the position to intermediated state.

When the value of the input signal VALID changes, the timestamp of the output POSITION will be
updated as the time when DPGAPC function detects the change.

Refer to Table 679 for the description of the input-output relationship in terms of the value and the
quality attributes.

1030 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

Table 679: Description of the input-output relationship

POSITION
VALID OPEN CLOSE
Value Description
0 - - 0 Intermediate
1 0 0 0 Intermediate
1 1 0 1 Open
1 0 1 2 Closed
1 1 1 3 Bad State

16.9 Single point generic control 8 signals SPC8GAPC SEMOD176448-1 v3

16.9.1 Identification
SEMOD176456-2 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Single point generic control 8 signals SPC8GAPC - -

16.9.2 Functionality SEMOD176462-4 v11

The Single point generic control 8 signals (SPC8GAPC) function block is a collection of 8 single point
commands that can be used for direct commands for example reset of LEDs or putting IED in
"ChangeLock" state from remote. In this way, simple commands can be sent directly to the IED
outputs, without confirmation. Confirmation (status) of the result of the commands is supposed to be
achieved by other means, such as binary inputs and SPGAPC function blocks. The commands can
be pulsed or steady with a settable pulse time.

16.9.3 Function block SEMOD176479-4 v5

SPC8GAPC
BLOCK ^OUT1
PSTO ^OUT2
^OUT3
^OUT4
^OUT5
^OUT6
^OUT7
^OUT8

IEC07000143-3-en.vsd
IEC07000143 V3 EN-US

Figure 601: SPC8GAPC function block

16.9.4 Signals
PID-3575-INPUTSIGNALS v8

Table 680: SPC8GAPC Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Blocks the function operation
PSTO INTEGER 1 Operator place selection

Transformer protection RET670 1031

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

PID-3575-OUTPUTSIGNALS v8

Table 681: SPC8GAPC Output signals

Name Type Description

OUT1 BOOLEAN Command output 1
OUT2 BOOLEAN Command output 2
OUT3 BOOLEAN Command output 3
OUT4 BOOLEAN Command output 4
OUT5 BOOLEAN Command output 5
OUT6 BOOLEAN Command output 6
OUT7 BOOLEAN Command output 7
OUT8 BOOLEAN Command output 8

16.9.5 Settings
PID-3575-SETTINGS v8

Table 682: SPC8GAPC Non group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off/On
On
PulseMode1 Pulsed - - Pulsed Setting for pulsed/latched mode for
Latched output 1
tPulse1 0.01 - 6000.00 s 0.01 0.10 Pulse time output 1
PulseMode2 Pulsed - - Pulsed Setting for pulsed/latched mode for
Latched output 2
tPulse2 0.01 - 6000.00 s 0.01 0.10 Pulse time output 2
PulseMode3 Pulsed - - Pulsed Setting for pulsed/latched mode for
Latched output 3
tPulse3 0.01 - 6000.00 s 0.01 0.10 Pulse time output 3
PulseMode4 Pulsed - - Pulsed Setting for pulsed/latched mode for
Latched output 4
tPulse4 0.01 - 6000.00 s 0.01 0.10 Pulse time output 4
PulseMode5 Pulsed - - Pulsed Setting for pulsed/latched mode for
Latched output 5
tPulse5 0.01 - 6000.00 s 0.01 0.10 Pulse time output 5
PulseMode6 Pulsed - - Pulsed Setting for pulsed/latched mode for
Latched output 6
tPulse6 0.01 - 6000.00 s 0.01 0.10 Pulse time output 6
PulseMode7 Pulsed - - Pulsed Setting for pulsed/latched mode for
Latched output 7
tPulse7 0.01 - 6000.00 s 0.01 0.10 Pulse time output 7
PulseMode8 Pulsed - - Pulsed Setting for pulsed/latched mode for
Latched output 8
tPulse8 0.01 - 6000.00 s 0.01 0.10 Pulse time output 8

16.9.6 Operation principle SEMOD176471-4 v7

The PSTO input selects the operator place (LOCAL, REMOTE or ALL). One of the eight outputs is
activated based on the command sent from the operator place selected. The settings Latchedx and
tPulsex (where x is the respective output) will determine if the signal will be pulsed (and how long the

1032 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

pulse is) or latched (steady). BLOCK will block the operation of the function – in case a command is
sent, no output will be activated.

PSTO is the universal operator place selector for all control functions. Although,
PSTO can be configured to use LOCAL or ALL operator places, only REMOTE
operator place is used in SPC8GAPC function.

16.10 AutomationBits, command function for DNP3.0

AUTOBITS SEMOD158589-1 v3

16.10.1 Identification
GUID-C3BB63F5-F0E7-4B00-AF0F-917ECF87B016 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
AutomationBits, command function for
AUTOBITS - -
DNP3

16.10.2 Functionality SEMOD158591-5 v9

Automation bits function for DNP3 (AUTOBITS) is used within PCM600 to get into the configuration
of the commands coming through the DNP3 protocol. The AUTOBITS function plays the same role
as functions GOOSEBINRCV (for IEC 61850) and MULTICMDRCV (for LON).

16.10.3 Function block SEMOD158603-4 v3

AUTOBITS
BLOCK ^CMDBIT1
PSTO ^CMDBIT2
^CMDBIT3
^CMDBIT4
^CMDBIT5
^CMDBIT6
^CMDBIT7
^CMDBIT8
^CMDBIT9
^CMDBIT10
^CMDBIT11
^CMDBIT12
^CMDBIT13
^CMDBIT14
^CMDBIT15
^CMDBIT16
^CMDBIT17
^CMDBIT18
^CMDBIT19
^CMDBIT20
^CMDBIT21
^CMDBIT22
^CMDBIT23
^CMDBIT24
^CMDBIT25
^CMDBIT26
^CMDBIT27
^CMDBIT28
^CMDBIT29
^CMDBIT30
^CMDBIT31
^CMDBIT32

IEC09000925-1-en.vsd
IEC09000925 V1 EN-US

Figure 602: AUTOBITS function block

Transformer protection RET670 1033

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.10.4 Signals
PID-3776-INPUTSIGNALS v6

Table 683: AUTOBITS Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
PSTO INTEGER 0 Operator place selection

PID-3776-OUTPUTSIGNALS v6

Table 684: AUTOBITS Output signals

Name Type Description

CMDBIT1 BOOLEAN Command out bit 1
CMDBIT2 BOOLEAN Command out bit 2
CMDBIT3 BOOLEAN Command out bit 3
CMDBIT4 BOOLEAN Command out bit 4
CMDBIT5 BOOLEAN Command out bit 5
CMDBIT6 BOOLEAN Command out bit 6
CMDBIT7 BOOLEAN Command out bit 7
CMDBIT8 BOOLEAN Command out bit 8
CMDBIT9 BOOLEAN Command out bit 9
CMDBIT10 BOOLEAN Command out bit 10
CMDBIT11 BOOLEAN Command out bit 11
CMDBIT12 BOOLEAN Command out bit 12
CMDBIT13 BOOLEAN Command out bit 13
CMDBIT14 BOOLEAN Command out bit 14
CMDBIT15 BOOLEAN Command out bit 15
CMDBIT16 BOOLEAN Command out bit 16
CMDBIT17 BOOLEAN Command out bit 17
CMDBIT18 BOOLEAN Command out bit 18
CMDBIT19 BOOLEAN Command out bit 19
CMDBIT20 BOOLEAN Command out bit 20
CMDBIT21 BOOLEAN Command out bit 21
CMDBIT22 BOOLEAN Command out bit 22
CMDBIT23 BOOLEAN Command out bit 23
CMDBIT24 BOOLEAN Command out bit 24
CMDBIT25 BOOLEAN Command out bit 25
CMDBIT26 BOOLEAN Command out bit 26
CMDBIT27 BOOLEAN Command out bit 27
CMDBIT28 BOOLEAN Command out bit 28
CMDBIT29 BOOLEAN Command out bit 29
CMDBIT30 BOOLEAN Command out bit 30
CMDBIT31 BOOLEAN Command out bit 31
CMDBIT32 BOOLEAN Command out bit 32

1034 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.10.5 Settings
PID-3776-SETTINGS v6

Table 685: AUTOBITS Non group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On

16.10.6 Operation principle SEMOD158597-4 v5

AutomationBits function (AUTOBITS) has 32 individual outputs which each can be mapped as a
Binary Output point in DNP3. The output is operated by a "Object 12" in DNP3. This object contains
parameters for control-code, count, on-time and off-time. To operate an AUTOBITS output point,
send a control-code of latch-On, latch-Off, pulse-On, pulse-Off, Trip or Close. The remaining
parameters will be regarded were appropriate. ex: pulse-On, on-time=100, off-time=300, count=5
would give 5 positive 100 ms pulses, 300 ms apart.

There is a BLOCK input signal, which will disable the operation of the function, in the same way the
setting Operation: On/Off does. That means that, upon activation of the BLOCK input, all 32
CMDBITxx outputs will be set to 0. The BLOCK acts like an overriding, the function still receives data
from the DNP3 master. Upon deactivation of BLOCK, all the 32 CMDBITxx outputs will be set by the
DNP3 master again, momentarily. For AUTOBITS , the PSTO input determines the operator place.
The command can be written to the block while in “Remote”. If PSTO is in “Local” then no change is
applied to the outputs.

16.11 Single command, 16 signals SINGLECMD SEMOD119849-1 v2

16.11.1 Identification
GUID-2217CCC2-5581-407F-A4BC-266CD6808984 v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Single command, 16 signals SINGLECMD - -

16.11.2 Functionality M12446-6 v6

The IEDs can receive commands either from a substation automation system or from the local HMI.
The command function block has outputs that can be used, for example, to control high voltage
apparatuses or for other user defined functionality.

Transformer protection RET670 1035

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 16 1MRK 504 164-UEN Rev. N
Control

16.11.3 Function block SEMOD116040-4 v2

SINGLECMD
BLOCK ^OUT1
^OUT2
^OUT3
^OUT4
^OUT5
^OUT6
^OUT7
^OUT8
^OUT9
^OUT10
^OUT11
^OUT12
^OUT13
^OUT14
^OUT15
^OUT16

IEC05000698-2-en.vsd
IEC05000698 V3 EN-US

Figure 603: SINGLECMD function block

16.11.4 Signals
PID-6189-INPUTSIGNALS v7

Table 686: SINGLECMD Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block single command function

PID-6189-OUTPUTSIGNALS v7

Table 687: SINGLECMD Output signals

Name Type Description

OUT1 BOOLEAN Single command output 1
OUT2 BOOLEAN Single command output 2
OUT3 BOOLEAN Single command output 3
OUT4 BOOLEAN Single command output 4
OUT5 BOOLEAN Single command output 5
OUT6 BOOLEAN Single command output 6
OUT7 BOOLEAN Single command output 7
OUT8 BOOLEAN Single command output 8
OUT9 BOOLEAN Single command output 9
OUT10 BOOLEAN Single command output 10
OUT11 BOOLEAN Single command output 11
OUT12 BOOLEAN Single command output 12
OUT13 BOOLEAN Single command output 13
OUT14 BOOLEAN Single command output 14
OUT15 BOOLEAN Single command output 15
OUT16 BOOLEAN Single command output 16

1036 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 16
Control

16.11.5 Settings
PID-6189-SETTINGS v7

Table 688: SINGLECMD Non group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
Steady
Pulsed

16.11.6 Operation principle M12447-3 v3

Single command, 16 signals (SINGLECMD) function has 16 binary output signals. The outputs can
be individually controlled from a substation automation system or from the local HMI. Each output
signal can be given a name with a maximum of 13 characters in PCM600.

The output signals can be of the types Off, Steady, or Pulse. This configuration setting is done via the
local HMI or PCM600 and is common for the whole function block. The length of the output pulses
are 100 ms. In steady mode, SINGLECMD function has a memory to remember the output values at
power interruption of the IED. Also a BLOCK input is available used to block the updating of the
outputs.

The output signals, OUT1 to OUT16, are available for configuration to built-in functions or via the
configuration logic circuits to the binary outputs of the IED.

Transformer protection RET670 1037

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1038
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

Section 17 Scheme communication

17.1 Scheme communication logic for distance or
overcurrent protection ZCPSCH IP15749-1 v3

17.1.1 Function revision history GUID-E8271DE5-A605-432C-8608-F8DEEF97D4F0 v1

Document Product History

revision revision
B 2.2.1 -
C 2.2.2 -
D 2.2.2
E 2.2.2 -
F 2.2.3 -
G 2.2.3 -
H 2.2.3 -
J 2.2.4 -
K 2.2.4 -
L 2.2.4
M 2.2.5 Added separate DOs for teleprotection permissive (TxPrm & RxPrm1), blocking (TxBlk &
RxBlk1) and direct trip (TxTr & RxTr1) transmit and receive signals in accordance with
61850 Ed 2.0.

17.1.2 Identification
M14854-1 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Scheme communication logic for ZCPSCH - 85
distance or overcurrent protection

17.1.3 Functionality M13860-3 v12

To achieve instantaneous fault clearance for all line faults, scheme communication logic is provided.
All types of communication schemes for permissive underreaching, permissive overreaching,
blocking, delta based blocking, unblocking and intertrip are available.

The built-in communication module (LDCM) can be used for scheme communication signaling when
included.

Transformer protection RET670 1039

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

17.1.4 Function block M13866-3 v7

ZCPSCH
I3P* TRIP
U3P* CS
BLOCK CHSTOP
BLKTR CRL
BLKCS LCG
CSBLK
CACC
CSOR
CSUR
CR
CRG
CBOPEN

IEC09000004

IEC09000004 V4 EN-US

Figure 604: ZCPSCH function block

17.1.5 Signals
PID-3766-INPUTSIGNALS v7

Table 689: ZCPSCH Input signals

Name Type Default Description

I3P GROUP - Current group connection
SIGNAL
U3P GROUP - Voltage group connection
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Signal for block of trip output from communication logic
BLKCS BOOLEAN 0 Block of carrier send in permissive OR and blocking schemes
CSBLK BOOLEAN 0 Reverse directed distance protection zone signal
CACC BOOLEAN 0 Permissive distance protection zone signal
CSOR BOOLEAN 0 Overreaching distance protection zone signal
CSUR BOOLEAN 0 Underreaching distance protection zone signal
CR BOOLEAN 0 Carrier Signal Received
CRG BOOLEAN 0 Carrier guard signal received
CBOPEN BOOLEAN 0 Indicates that the breaker is open

PID-3766-OUTPUTSIGNALS v5

Table 690: ZCPSCH Output signals

Name Type Description

TRIP BOOLEAN Trip output
CS BOOLEAN Carrier Send signal
CHSTOP BOOLEAN Stops the blocking signal to remote end
CRL BOOLEAN Carrier signal received or missing carrier guard signal
LCG BOOLEAN Loss of carrier guard signal

1040 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

17.1.6 Settings
PID-3766-SETTINGS v7

Table 691: ZCPSCH Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
SchemeType Intertrip - - Permissive UR Scheme type
Permissive UR
Permissive OR
Blocking
DeltaBlocking
tCoord 0.000 - 60.000 s 0.001 0.035 Co-ordination time for blocking
communication scheme
tSendMin 0.000 - 60.000 s 0.001 0.100 Minimum duration of a carrier send
signal

Table 692: ZCPSCH Group settings (advanced)

Name Values (Range) Unit Step Default Description

Unblock Off - - Off Operation mode of unblocking logic
NoRestart
Restart
DeltaI 0 - 200 %IB 1 10 Current change level in % of IBase for
fault inception detection
DeltaU 0 - 100 %UB 1 5 Voltage change level in % of UB for fault
inception detection
Delta3I0 0 - 200 %IB 1 10 Zero seq current change level in % of
IBase
Delta3U0 0 - 100 %UB 1 5 Zero seq voltage change level in % of
UBase
tSecurity 0.000 - 60.000 s 0.001 0.035 Security timer for loss of carrier guard
detection

Table 693: ZCPSCH Non group settings (advanced)

Name Values (Range) Unit Step Default Description

GlobalBaseSelector 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

17.1.7 Operation principle

M13893-3 v5
Depending on whether a reverse or forward directed impedance zone is used to issue the send
signal, the communication schemes are divided into blocking and permissive schemes, respectively.

A permissive scheme is inherently faster and has better security against false tripping than a blocking
scheme. On the other hand, a permissive scheme depends on a received signal for a fast trip, so its
dependability is lower than that of a blocking scheme.

17.1.7.1 Blocking scheme M13893-6 v7

The principle of operation for a blocking scheme is that an overreaching zone is allowed to trip
instantaneously after the settable co-ordination time tCoord has elapsed, when no signal is received
from the remote IED.

Transformer protection RET670 1041

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

The received signal, which shall be connected to CR, is used to block the zone to be accelerated to
clear the fault instantaneously (after time tCoord). The forward overreaching zone to be accelerated
is connected to the input CACC, see figure 605.

In case of external faults, the blocking signal (CR) must be received before the settable timer tCoord
elapses to prevent a false trip, see figure 605.

The function can be totally blocked by activating the input BLOCK. Tripping can be blocked by
activating the input BLKTR. Signal send can be blocked by activating the input BLKCS.

tCoord
CACC
t TRIP
CR AND

en05000512.vsd
IEC05000512 V1 EN-US

Figure 605: Basic logic for trip signal in blocking scheme

Channels for communication in each direction must be available.

17.1.7.2 Delta blocking scheme GUID-22E3BFAC-82E9-4434-B761-AD63BCFC68D5 v2

In order to avoid delays due to carrier coordination times, the initiation of sending of blocking signal
to remote end is done by a fault inception detection element based on delta quantities of currents
and voltages. The delta based fault detection is very fast and if the channel is fast there is no need
for delaying the operation of the remote distance element. The received blocking signal arrives well
before the distance element has started. If the fault is in forward direction the sending is immediately
stopped by a forward directed distance, directional current or directional earth fault element.

The fault inception detection element detects instantaneous changes in any phase currents or zero
sequence current in combination with a change in the corresponding phase voltage or zero sequence
voltage. The criterion for the fault inception detection is if the change of any phase voltage and
current exceeds the settings DeltaU and DeltaI respectively, or if the change of zero sequence
voltage and zero sequence current exceeds the settings Delta3U0,Delta3I0 respectively. The
schemeType is selected as DeltaBlocking.

If the fault inception function has detected a system fault, a block signal CS will be issued and sent to
remote end in order to block the overreaching zones. Different criteria has to be fulfilled for sending
the CS signal:

1. The breaker has to be in closed condition, that is, the input signal CBOPEN is deactivated.
2. A fault inception should have been detected while the carrier send signal is not blocked, that is,
the input signal BLKCS is not activated.

If it is later detected that it was an internal fault that made the function issue the CS signal, the
function will issue a CHSTOP signal to unblock the remote end.

The received signal, which is connected to the CR input, is not used to accelerate the release of the
overreaching zone to clear the fault instantaneously. The overreaching zone to be accelerated is
connected to the input CACC, see Figure 606.

In case of external faults, the blocking signal (CR) must be received before the settable timer tCoord
elapses, to prevent a false trip, see Figure 606.

The function can be totally blocked by activating the input BLOCK, block of trip by activating the input
BLKTR, block of carrier send by activating the input BLKCS.

1042 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

tCoord
CACC
t TRIP
CR AND

en05000512.vsd
IEC05000512 V1 EN-US

Figure 606: Basic logic for trip signal in delta blocking scheme
Channels for communication in each direction must be available.

17.1.7.3 Permissive underreaching scheme M13893-13 v6

In a permissive underreaching scheme, a forward directed underreaching measuring element

(normally zone1) sends a permissive signal CS to the remote end if a fault is detected.in forward
direction. The received signal CR is used to allow an overreaching zone to trip after the tCoord timer
has elapsed. The tCoord in permissive underreaching schemes is normally set to zero.

The logic for trip signal in permissive scheme is shown in figure 607.

tCoord
CACC
t TRIP
CR AND

en05000513.vsd
IEC05000513 V1 EN-US

Figure 607: Logic for trip signal in permissive scheme

The function can be totally blocked by activating the input BLOCK. Tripping can be blocked by
activating the input BLKTR. Signal send can be blocked by activating the input BLKCS.

17.1.7.4 Permissive overreaching scheme M13893-22 v6

In a permissive overreaching scheme, a forward directed overreaching measuring element (normally

zone2) sends a permissive signal CS to the remote end if a fault is detected in forward direction. The
received signal CR is used to allow an overreaching zone to trip after the settable tCoord timer has
elapsed. The tCoord in permissive overreaching schemes is normally set to zero.

The logic for trip signal in permissive scheme is shown in figure 607.

tCoord
CACC
t TRIP
CR AND

en05000513.vsd
IEC05000513 V1 EN-US

Figure 608: Logic for trip signal in permissive scheme

The function can be totally blocked by activating the input BLOCK. Tripping can be blocked by
activating the input BLKTR. Signal send can be blocked by activating the input BLKCS.e.

17.1.7.5 Unblocking scheme M13893-31 v8

In unblocking scheme, the lower dependability of a permissive scheme is overcome by using the loss
of guard signal from the communication equipment to locally create a receive signal. It is common or
suitable to use the function when older, less reliable power-line carrier (PLC) communication is used.

The unblocking function uses a guard signal CRG, which must always be present, even when no CR
signal is received. The absence of the CRG signal for a time longer than the setting tSecurity time is
used as a CR signal, see figure 609. This enables a permissive scheme to operate when the line
fault blocks the signal transmission. The CRG signal is only used in unblocking schemes.

Transformer protection RET670 1043

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

The received signal created by the unblocking function is reset 150 ms after the security timer has
elapsed. When that occurs an output signal LCG is activated for signalling purpose. The unblocking
function is reset 200 ms after that the guard signal is present again.

CR
tSecurity CRL
t OR

CRG
200 ms 150 ms
t OR t AND
AND
LCG

IEC05000746-2-en.vsd
IEC05000746 V2 EN-US

Figure 609: Guard signal logic with unblocking scheme and with setting Unblock = Restart

CR
CRL
tSecurity OR
CRG t

IEC11000253-2-en.vsd
IEC11000253 V2 EN-US

Figure 610: Guard signal logic with unblocking scheme and with setting Unblock = NoRestart
The unblocking function can be set in three operation modes (setting Unblock):

Off The unblocking function is out of operation

No restart Communication failure shorter than tSecurity will be ignored
If CRG disappears a CRL signal will be transferred to the trip logic
There will not be any information in case of communication failure (LCG)
Restart Communication failure shorter than tSecurity will be ignored
It sends a defined (150 ms) CRL after the disappearance of the CRG signal
The function will activate LCG output in case of communication failure
If the communication failure comes and goes (<200 ms) there will not be recurrent
signalling

17.1.7.6 Intertrip scheme M13893-36 v5

In the direct intertrip scheme, the send signal CS is sent from an underreaching zone that is tripping
the line.

The received signal CR is directly transferred to a trip for tripping without local criteria. The signal is
further processed in the tripping logic.

In case of single-pole tripping in multi-phase systems, a phase selection is performed.

17.1.7.7 Simplified logic diagram M13893-40 v4

The simplified logic diagram for the complete logic is shown in figure 611.

1044 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

Unblock =Off

CR

Unblock =
OR CRL
NoRestart AND
CRL
Unblock =
tSecurit
Restart
y
CRG 1 t AND

200 ms 150 ms LCG

AND
t AND OR t

SchemeType =
Intertrip

CSUR
tSendMi
n AND
OR

BLOCK AND
CSBLK OR
CRL

Schemetype =
Permissive UR AND CS
OR

tCoord
AND 25 ms
OR
t TRIP
CACC t

Schemetype =
Permissive OR

CSOR OR AND

AND
tSendMin
OR
AND
SchemeType =
Blocking

BLKCS

AND

IEC05000515-3-en.vsdx

IEC05000515 V3 EN-US

Figure 611: Scheme communication logic for distance or overcurrent protection, simplified logic
diagram

17.1.8 Technical data

M16038-1 v15

Table 694: ZCPSCH technical data

Function Range or value Accuracy

Scheme type Off -
Intertrip
Permissive UR
Permissive OR
Blocking
DeltaBlocking
Operate voltage, Delta U (0–100)% of UBase ±5.0% of ΔU
Operate current, Delta I (0–200)% of IBase ±5.0% of ΔI
Table continues on next page

Transformer protection RET670 1045

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

Function Range or value Accuracy

Operate zero sequence voltage, (0–100)% of UBase ±10.0% of Δ3U0
Delta 3U0
Operate zero sequence current, (0–200)% of IBase ±10.0% of Δ3I0
Delta 3I0
Co-ordination time for blocking (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
communication scheme
Minimum duration of a carrier send (0.000-60.000) s ±0.2% or ±45 ms whichever is greater
signal
Security timer for loss of guard (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
signal detection
Operation mode of unblocking logic Off -
NoRestart
Restart

17.2 Phase segregated scheme communication logic for

distance protection ZPCPSCH SEMOD141690-1 v3

17.2.1 Function revision history GUID-BC7055A7-D5DF-470E-BB17-8A0ED3E40F4F v1

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 -
M 2.2.4 -
N 2.2.5 Added separate DOs for teleprotection permissive (TxPrm & RxPrm1), blocking (TxBlk &
RxBlk1) and direct trip (TxTr & RxTr1) transmit and receive signals in accordance with
61850 Ed 2.0.

17.2.2 Identification
SEMOD141699-2 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Phase segregated Scheme ZPCPSCH - 85
communication logic for distance
protection

1046 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

17.2.3 Functionality SEMOD141686-4 v4

Communication between line ends is used to achieve fault clearance for all faults on a power line. All
possible types of communication schemes for example, permissive underreach, permissive
overreach and blocking schemes are available. To manage problems with simultaneous faults on
parallel power lines phase segregated communication is needed. This will then replace the standard
Scheme communication logic for distance or Overcurrent protection (ZCPSCH) on important lines
where three communication channels (in each subsystem) are available for the distance protection
communication.

The main purpose of the Phase segregated scheme communication logic for distance protection
(ZPCPSCH) function is to supplement the distance protection function such that:

• fast clearance of faults is also achieved at the line end for which the faults are on the part of the
line not covered by its underreaching zone.
• correct phase selection can be maintained to support single-pole tripping for faults occurring
anywhere on the entire length of a double circuit line.

To accomplish this, three separate communication channels, that is, one per phase, each capable of
transmitting a signal in each direction is required.

ZPCPSCH can be completed with the current reversal and WEI logic for phase segregated
communication, when found necessary in Blocking and Permissive overreaching schemes.

17.2.4 Function block SEMOD155566-4 v3

ZPCPSCH
BLOCK TRIP
BLKTR TRL1
BLKTRL1 TRL2
BLKTRL2 TRL3
BLKTRL3 CSL1
CACCL1 CSL2
CACCL2 CSL3
CACCL3 CSMPH
CSURL1 CRLL1
CSURL2 CRLL2
CSURL3 CRLL3
CSORL1
CSORL2
CSORL3
CSBLKL1
CSBLKL2
CSBLKL3
BLKCSL1
BLKCSL2
BLKCSL3
CRL1
CRL2
CRL3
CRMPH
IEC06000427 V3 EN-US

Figure 612: ZPCPSCH function block

Transformer protection RET670 1047

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

17.2.5 Signals
PID-7669-INPUTSIGNALS v1

Table 695: ZPCPSCH Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Common signal for block of trip output from communication logic
in all phases
BLKTRL1 BOOLEAN 0 Signal for block of trip output from communication logic in Phase
L1
BLKTRL2 BOOLEAN 0 Signal for block of trip output from communication logic in Phase
L2
BLKTRL3 BOOLEAN 0 Signal for block of trip output from communication logic in Phase
L3
CACCL1 BOOLEAN 0 Accelerated Distance protection zone start in Phase L1
CACCL2 BOOLEAN 0 Accelerated Distance protection zone signal in Phase L2
CACCL3 BOOLEAN 0 Accelerated Distance protection zone signal in Phase L3
CSURL1 BOOLEAN 0 Underreaching distance protection zone signal in Phase L1
CSURL2 BOOLEAN 0 Underreaching distance protection zone signal in Phase L2
CSURL3 BOOLEAN 0 Underreaching distance protection zone signal in Phase L3
CSORL1 BOOLEAN 0 Overreaching distance protection zone signal in Phase L1
CSORL2 BOOLEAN 0 Overreaching distance protection zone signal in Phase L2
CSORL3 BOOLEAN 0 Overreaching distance protection zone signal in Phase L3
CSBLKL1 BOOLEAN 0 Reverse directed distance protection zone signal in Phase L1
CSBLKL2 BOOLEAN 0 Reverse directed distance protection zone signal in Phase L2
CSBLKL3 BOOLEAN 0 Reverse directed distance protection zone signal in Phase L3
BLKCSL1 BOOLEAN 0 Block of carrier send in POR and Blocking schemes in Phase L1
BLKCSL2 BOOLEAN 0 Block of carrier send in POR and Blocking schemes in Phase L2
BLKCSL3 BOOLEAN 0 Block of carrier send in POR and Blocking schemes in Phase L3
CRL1 BOOLEAN 0 Carrier signal received in Phase L1
CRL2 BOOLEAN 0 Carrier signal received in Phase L2
CRL3 BOOLEAN 0 Carrier signal received in Phase L3
CRMPH BOOLEAN 0 Carrier Signal received for multiphase fault

PID-7669-OUTPUTSIGNALS v1

Table 696: ZPCPSCH Output signals

Name Type Description

TRIP BOOLEAN Common trip output in any of the phase
TRL1 BOOLEAN Trip output in Phase L1
TRL2 BOOLEAN Trip output in Phase L2
TRL3 BOOLEAN Trip output in Phase L3
CSL1 BOOLEAN Carrier Send in phase L1
CSL2 BOOLEAN Carrier Send in phase L2
CSL3 BOOLEAN Carrier Send in phase L3
CSMPH BOOLEAN carrier Send for multi phase fault
Table continues on next page

1048 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

Name Type Description

CRLL1 BOOLEAN Carrier signal received in Phase L1
CRLL2 BOOLEAN Carrier signal received in Phase L2
CRLL3 BOOLEAN Carrier signal received in Phase L3

17.2.6 Settings
PID-7669-SETTINGS v1

Table 697: ZPCPSCH Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation On / Off
On
Scheme Type Off - - Permissive UR Scheme type
Intertrip
Permissive UR
Permissive OR
Blocking
tCoord 0.000 - 60.000 s 0.001 0.000 Trip coordinate time
tSendMin 0.000 - 60.000 s 0.001 0.100 Minimum duration of Carrier Send signal

17.2.7 Operation principle

SEMOD141705-4 v3
Depending on whether a reverse or forward directed impedance zone is used to issue the send
signal, the communication schemes are divided into Blocking and Permissive schemes, respectively.

A permissive scheme is inherently faster and has better security against false tripping than a blocking
scheme. On the other hand, a permissive scheme depends on a received signal for a fast trip, so its
dependability is lower than that of a blocking scheme.

The Phase segregated scheme communication logic for distance protection (ZPCPSCH) function is a
logical function built-up from logical elements. It is a supplementary function to the distance
protection, requiring for its operation inputs from the distance protection and the communication
equipment.

The type of communication-aided scheme to be used can be selected by way of the settings.

The ability to select which distance protection zone is assigned to which input of ZPCPSCH makes
this logic able to support practically any scheme communication requirements regardless of their
basic operating principle. The outputs to initiate tripping and sending of the teleprotection signal are
given in accordance with the type of communication-aided scheme selected and the zone(s) and
phase(s) of the distance protection which have operated.

When power line carrier communication channels are used for permissive schemes communication,
unblocking logic which uses the loss of guard signal as a receive criteria is provided. This logic
compensates for the lack of dependability due to the transmission of the command signal over the
faulted line.

17.2.7.1 Blocking scheme SEMOD141705-12 v3

The principle of operation for a blocking scheme is that an overreaching zone is allowed to trip
instantaneously after the settable co-ordination time tCoord has elapsed, when no signal is received
from the remote IED. The received signal (sent by a reverse looking element in the remote IED),
which shall be connected to CRLx, is used to not release the zone to be accelerated to clear the fault
instantaneously (after time tCoord). The overreaching zone to be accelerated is connected to the
input CACCLx, see figure 613. In case of external faults, the blocking signal (CRLx) must be received
before the settable timer tCoord elapses, to prevent an unneccesary trip, see figure 613.

Transformer protection RET670 1049

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

ZPCPSCH can be totally blocked by activating the input BLOCK, block of trip is achieved by
activating the input BLKTRLx, Block of carrier send is done by activating the input BLKCSLx.

tCoord 25 ms
CACCLx
t t TRLx
CRLx AND

IEC06000310_2_en.vsd
IEC06000310 V2 EN-US

Figure 613: Basic logic for trip carrier in one phase of a blocking scheme

17.2.7.2 Permissive underreach scheme SEMOD141705-18 v1

In a permissive underreach scheme, a forward directed underreach measuring element (normally

zone1) sends a permissive signal CSLx to the remote end if a fault is detected in forward direction.
The received signal CRLx is used to allow an overreaching zone (connected to CACCLx) to trip after
the tCoord timer has elapsed. The tCoord is in permissive underreach schemes normally set to zero.
The logic for trip carrier in permissive scheme is shown in figure 614. Three channels for
communication in each direction must be available.

tCoord 25 ms
CACCLx t t TRLx
CRLx AND

IEC07000088_2_en.vsd
IEC07000088 V2 EN-US

Figure 614: Basic logic for trip carrier in one phase of a permissive underreach scheme

17.2.7.3 Permissive overreach scheme SEMOD141705-26 v1

In a permissive overreach scheme, a forward directed overreach measuring element (normally

zone2) sends a permissive signal CSLx to the remote end if a fault is detected in forward direction.
The received signal CRLx is used to allow an overreaching zone to trip after the settable tCoord timer
has elapsed. The tCoord is in permissive overreach schemes normally set to zero. The logic for trip
carrier is the same as for permissive underreach, see figure 613.

The permissive overreach scheme has the same blocking possibilities as mentioned for blocking
scheme above. The blocking inputs are activated from the current reversal logic when this function is
included.

Three channels for communication in each direction must be available.

17.2.7.4 Unblocking scheme SEMOD141705-31 v2

In an unblocking scheme, the lower dependability in permissive scheme is overcome by using the
loss of guard signal from the communication equipment to locally create a carrier receive signal. It is
common or suitable to use the function when older, less reliable, power-line carrier (PLC)
communication is used. As phase segregated communication schemes uses phases individually and
the PLC is typically connected single-phase or phase-to-phase it is not possible to evaluate which of
the phases to release and the unblocking scheme has thus not been supported.

17.2.7.5 Intertrip scheme SEMOD141705-34 v1

In the direct intertrip scheme, the carrier send signal CS is sent from an underreaching zone that is
tripping the line.

1050 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

The received signal per phase is directly transferred to the trip function block for tripping without local
criteria. The signal is not further processed in the phase segregated communication logic. In case of
single-pole tripping the phase selection and logic for tripping the three phases is performed in the trip
function block.

17.2.7.6 Simplified logic diagram SEMOD141705-38 v2

The simplified logic diagram for one phase is shown in figure 615.

SchemeType =
Intertrip

CSURLx

tSendMin AND
OR

BLOCK
AND
CSBLKLx OR
CRLx

Scheme Type =
Permissive UR AND CSLx
OR

tCoord
25 ms
AND t TRLx
OR t
CACCLx

Scheme Type =
Permissive OR

CSORLx OR AND

AND

tSendMin
OR

AND
Scheme Type =
Blocking
BLKCSx

AND

CSL1
CSL2 AND

CSL2
OR CSMPH
CSL3 AND

CSL3
CSL1 AND

CSL1
CSL2 GENERAL
OR
CSL3

IEC06000311_2_en.vsd
IEC06000311 V2 EN-US

Figure 615: Simplified logic diagram for one phase

Transformer protection RET670 1051

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

17.2.8 Technical data

SEMOD166936-2 v8

Table 698: ZPCPSCH technical data

Function Range or value Accuracy

Scheme type Intertrip -
Permissive UR
Permissive OR
Blocking
Co-ordination time for blocking (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
communication scheme
Minimum duration of a carrier send (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
signal

17.3 Current reversal and Weak-end infeed logic for distance

protection 3-phase ZCRWPSCH IP15751-1 v4

17.3.1 Function revision history GUID-23BE6A6F-8D87-4CD9-952B-40EE65D7F04C v1

Document Product History

revision revision
B 2.2.1 -
C 2.2.2 -
D 2.2.2
E 2.2.2 -
F 2.2.3 -
G 2.2.3 -
H 2.2.3 -
J 2.2.4 -
K 2.2.4 -
L 2.2.4
M 2.2.5 Added DOs for teleprotection permissive (TxPrm & RxPrm1) transmit and receive signals
in accordance with 61850 Ed 2.0

17.3.2 Identification
M15073-1 v5

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Current reversal and weak-end infeed ZCRWPSCH - 85
logic for distance protection 3-phase

17.3.3 Functionality M13896-3 v15

The ZCRWPSCH function provides the current reversal and weak end infeed logic functions that
supplement the standard scheme communication logic. It is not suitable for standalone use as it
requires inputs from the distance protection functions and the scheme communications function
included within the terminal.

1052 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

On detection of a current reversal, the current reversal logic provides an output to block the sending
of the teleprotection signal to the remote end, and to block the permissive tripping at the local end.
This blocking condition is maintained long enough to ensure that no unwanted operation will occur as
a result of the current reversal.

On verification of a weak end infeed condition, the weak end infeed logic provides an output for
sending the received teleprotection signal back to the remote sending end and other output(s) for
local tripping. For terminals equipped for single- and two-pole tripping, outputs for the faulted
phase(s) are provided. Undervoltage detectors are used to detect the faulted phase(s).

17.3.4 Function block SEMOD53507-9 v6

ZCRWPSCH
U3P* IRVL
BLOCK TRWEI
IRVBLK TRWEIL1
IRV TRWEIL2
WEIBLK1 TRWEIL3
WEIBLK2 ECHO
VTSZ
CBOPEN
CRL

IEC06000287-2-en.vsd
IEC06000287 V2 EN-US

Figure 616: ZCRWPSCH function block

17.3.5 Signals
PID-3521-INPUTSIGNALS v8

Table 699: ZCRWPSCH Input signals

Name Type Default Description

U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
IRVBLK BOOLEAN 0 Block of current reversal function
IRV BOOLEAN 0 Activation of current reversal logic
WEIBLK1 BOOLEAN 0 Block of WEI logic
WEIBLK2 BOOLEAN 0 Block of WEI logic due to operation of other protections
VTSZ BOOLEAN 0 Block of trip from WEI logic through fuse-failure function
CBOPEN BOOLEAN 0 Block of trip from WEI logic by an open breaker
CRL BOOLEAN 0 POR Carrier receive for WEI logic

PID-3521-OUTPUTSIGNALS v8

Table 700: ZCRWPSCH Output signals

Name Type Description

IRVL BOOLEAN Operation of current reversal logic
TRWEI BOOLEAN Trip signal from weak end infeed logic
TRWEIL1 BOOLEAN Trip signal from weak end infeed logic in phase L1
TRWEIL2 BOOLEAN Trip signal from weak end infeed logic in phase L2
TRWEIL3 BOOLEAN Trip signal from weak end infeed logic in phase L3
ECHO BOOLEAN Carrier send by WEI logic

Transformer protection RET670 1053

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

17.3.6 Settings
PID-3521-SETTINGS v8

Table 701: ZCRWPSCH Group settings (basic)

Name Values (Range) Unit Step Default Description

CurrRev Off - - Off Operating mode of Current Reversal
On Logic
tPickUpRev 0.000 - 60.000 s 0.001 0.020 Pickup time for current reversal logic
tDelayRev 0.000 - 60.000 s 0.001 0.060 Time Delay to prevent Carrier send and
local trip
WEI Off - - Off Operating mode of WEI logic
Echo
Echo & Trip
tPickUpWEI 0.000 - 60.000 s 0.001 0.010 Coordination time for the WEI logic
UPP< 10 - 90 %UB 1 70 Phase to Phase voltage for detection of
fault condition
UPN< 10 - 90 %UB 1 70 Phase to Neutral voltage for detection of
fault condition

Table 702: ZCRWPSCH Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

17.3.7 Operation principle

17.3.7.1 Current reversal logic M16679-3 v9

The current reversal logic can be enabled by setting the parameter CurrRev = On. The current
reversal logic uses a reverse zone connected to the input IRV to recognize the fault on the parallel
line in any of the phases.When the reverse zone has been activated (even if only for a short time), it
prevents sending of a communication signal and tripping through the scheme communication logic
after a settable time tPickUpRev. The prevention will last for tPickUpRev + 10 ms + tDelayRev after
the IREV reset. This makes it possible for the receive signal to reset before the carrier-aided trip
signal is activated due to the current reversal by the forward directed zone. The logic diagram for
current reversal is shown in Figure 617.

BLOCK

IRVBLK
tDelayRev
tPickUpRev 10 ms tPickUpRev IRVL
IRV AND t
t t t

CurrRev = On

IEC05000122-4-en.vsd
IEC05000122 V4 EN-US

Figure 617: Simplified logic diagram for current reversal

By connecting the output signal IRVL to input BLKCS in the ZCPSCH function, the sending of the
signal CS from the overreaching zone connected to CSOR in ZCPSCH will be blocked. By
connecting IRVL to input BLKTR in the ZCPSCH function, the TRIP output from the ZCPSCH
function will be blocked.

1054 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

The function has an internal 10 ms drop-off timer which will secure that the current reversal logic will
be activated for short input signals even if the pick-up timer is set to zero.

17.3.7.2 Weak-end infeed logic M16679-8 v12

The weak-end infeed logic (WEI) function sends back (echoes) the received signal under the
condition that no fault has been detected on the weak-end by different fault detection elements
(distance protection in forward or reverse direction).

The WEI function returns the received signal, shown in Figure 618, when:

• The setting parameter WEI is set to either Echo or Echo & Trip.
• No active signal is present on the input BLOCK.
• The functional input CRL is active for a time longer than the tPickUpWei setting. This input is
usually connected to the CRL output on the scheme communication logic ZCPSCH.
• The WEI function is not blocked by the active signal connected to the WEIBLK1 functional input
or to the VTSZ functional input. The later is usually configured to the VTSZ functional output of
the fuse-failure function.
• No active signal has been present for at least 200 ms on the WEIBLK2 functional input. An OR
combination of all fault detection functions (not undervoltage) as present within the IED is
usually used for this purpose.
• The weak-end infeed logic also echoes the received permissive signal when local breaker
opens.

BLOCK
VTSZ
WEIBLK1 OR

tPickUpWEI
CRL AND 50 ms 200 ms
t AND
OR t t
ECHO
200 ms AND
WEIBLK2
t

AND

OR
1500 ms
CBOPEN
t

WEI = Echo

IEC05000123-3-en.vsd
IEC05000123 V3 EN-US

Figure 618: Simplified logic diagram for weak-end infeed logic — Echo
When an echo function is used in both IEDs (should generally be avoided), a spurious signal can be
looped round by the echo logics. To avoid a continuous lock-up of the system, the duration of the
echoed signal is limited to 200 ms.

An undervoltage criteria is used as an additional tripping criteria, when the tripping of the local
breaker is selected, setting WEI = Echo&Trip. With this setting the Echo and Trip are working in
parallel as in logic shown in Figure 619.

Transformer protection RET670 1055

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

BLOCK
VTSZ
WEIBLK1 OR
tPickUpWEI
CRL AND 50 ms 200 ms
t AND ECHO
OR t t AND
200 ms
WEIBLK2
t

AND

1500 ms
OR
CBOPEN
t
AND

U3P*
UL1<UPN<
UL2 < UPN<
UL3 < UPN<
UPN< 100 ms
OR
AND t
TRWEI
OR

15 ms
TRWEIL1
U3P*
AND t
UL1L2 <UPP< OR
UL2L3 < UPP<
UL3L1 < UPP<
15 ms
UPP< TRWEIL2
AND t
OR

15 ms
OR TRWEIL3
AND t

WEI = Echo & Trip

IEC00000551-TIFF V4 EN-US IEC00000551-TIFF.vsd

Figure 619: Simplified logic diagram for weak-end infeed logic — Echo&Trip

17.3.8 Technical data

M16039-1 v16

Table 703: ZCRWPSCH technical data

Function Range or value Accuracy

Detection level phase-to-neutral (10-90)% of UBase ±0.5% of Ur
voltage
Detection level phase-to-phase (10-90)% of UBase ±0.5% of Ur
voltage
Operate time for current reversal (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
logic
Delay time for current reversal (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
Coordination time for weak-end (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
infeed logic

1056 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

17.4 Current reversal and weak-end infeed logic for phase

segregated communication ZPCWPSCH SEMOD155635-1 v3

17.4.1 Function revision history GUID-6981F8AD-800A-4B02-8D56-884E0213EA23 v1

Document Product History

revision revision
A 2.2.1 -
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 -
M 2.2.4 -
N 2.2.5 Added DOs for teleprotection permissive (TxPrm & RxPrm1) transmit and receive signals
in accordance with 61850 Ed 2.0

17.4.2 Identification
SEMOD156467-2 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Current reversal and weak-end infeed ZPCWPSCH - 85
logic for phase segregated
communication

17.4.3 Functionality SEMOD156473-5 v4

Current reversal and weak-end infeed logic for phase segregated communication (ZPCWPSCH)
function is used to prevent unwanted operations due to current reversal when using permissive
overreach protection schemes in application with parallel lines where the overreach from the two
ends overlaps on the parallel line.

The weak-end infeed logic is used in cases where the apparent power behind the protection can be
too low to activate the distance protection function. When activated, received carrier signal together
with local undervoltage criteria and no reverse zone operation gives an instantaneous trip. The
received signal is also echoed back to accelerate the sending end.

Transformer protection RET670 1057

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

17.4.4 Function block SEMOD157994-5 v3

ZPCWPSCH
U3P* TRPWEI
BLOCK TRPWEIL1
BLKZ TRPWEIL2
CBOPEN TRPWEIL3
CR IRVOP
CRL1 IRVOPL1
CRL2 IRVOPL2
CRL3 IRVOPL3
IRVL1 ECHO
IRVL2 ECHOL1
IRVL3 ECHOL2
IRVBLKL1 ECHOL3
IRVBLKL2
IRVBLKL3
WEIBLK
WEIBLKL1
WEIBLKL2
WEIBLKL3
WEIBLKOP
WEIBLKO1
WEIBLKO2
WEIBLKO3
IEC06000477 V3 EN-US

Figure 620: ZPCWPSCH function block

17.4.5 Signals
PID-7876-INPUTSIGNALS v1

Table 704: ZPCWPSCH Input signals

Name Type Default Description

U3P GROUP - Voltage
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKZ BOOLEAN 0 Block of trip from WEI logic by the fuse-failure function
CBOPEN BOOLEAN 0 Block of trip from WEI logic by an open breaker
CR BOOLEAN 0 Carrier receive for WEI logic
CRL1 BOOLEAN 0 Carrier receive for WEI logic in Phase L1
CRL2 BOOLEAN 0 Carrier receive for WEI logic in Phase L2
CRL3 BOOLEAN 0 Carrier receive for WEI logic in Phase L3
IRVL1 BOOLEAN 0 Activation of current reversal logic in Phase L1
IRVL2 BOOLEAN 0 Activation of current reversal logic in Phase L2
IRVL3 BOOLEAN 0 Activation of current reversal logic in phase L3
IRVBLKL1 BOOLEAN 0 Block of current reversal function in Phase L1
IRVBLKL2 BOOLEAN 0 Block of current reversal function in Phase L2
IRVBLKL3 BOOLEAN 0 Block of current reversal function in Phase L3
WEIBLK BOOLEAN 0 Block of WEI logic
WEIBLKL1 BOOLEAN 0 Block of WEI logic in Phase L1
WEIBLKL2 BOOLEAN 0 Block of WEI logic in Phase L2
WEIBLKL3 BOOLEAN 0 Block of WEI logic in Phase L3
WEIBLKOP BOOLEAN 0 Block of WEI logic due to operation of other protection
Table continues on next page

1058 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

Name Type Default Description

WEIBLKO1 BOOLEAN 0 Block of WEI logic in Phase L1 due to operation of other
protection
WEIBLKO2 BOOLEAN 0 Block of WEI logic in Phase L2 due to operation of other
protections
WEIBLKO3 BOOLEAN 0 Block of WEI logic in Phase L3 due to operation of other
protections

PID-7876-OUTPUTSIGNALS v1

Table 705: ZPCWPSCH Output signals

Name Type Description

TRPWEI BOOLEAN Trip of WEI logic
TRPWEIL1 BOOLEAN Trip of WEI logic in Phase L1
TRPWEIL2 BOOLEAN Trip of WEI logic in Phase L2
TRPWEIL3 BOOLEAN Trip of WEI logic in Phase L3
IRVOP BOOLEAN Operation of current reversal logic
IRVOPL1 BOOLEAN Operation of current reversal logic in Phase L1
IRVOPL2 BOOLEAN Operation of current reversal logic in Phase L2
IRVOPL3 BOOLEAN Operation of current reversal logic in Phase L3
ECHO BOOLEAN Carrier Send by WEI logic
ECHOL1 BOOLEAN Carrier Send by WEI logic in Phase L1
ECHOL2 BOOLEAN Carrier Send by WEI logic in Phase L2
ECHOL3 BOOLEAN Carrier Send by WEI logic in Phase L3

17.4.6 Settings
PID-7876-SETTINGS v1

Table 706: ZPCWPSCH Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Table 707: ZPCWPSCH Group settings (basic)

Name Values (Range) Unit Step Default Description

OperCurrRev Off - - Off Operating mode of Current Reversal
On Logic
tPickUpRev 0.000 - 60.000 s 0.001 0.020 Pickup time for current reversal logic
tDelayRev 0.000 - 60.000 s 0.001 0.060 Time Delay to prevent Carrier send and
local trip
OperationWEI Off - - Off Operating mode of WEI logic
Echo
Echo & Trip
UPE< 10 - 90 %UB 1 70 Phase to Earth voltage for detection of
fault condition
UPP< 10 - 90 %UB 1 70 Phase to Phase voltage for detection of
fault condition
tPickUpWEI 0.000 - 60.000 s 0.001 0.010 Coordination time for the WEI logic

Transformer protection RET670 1059

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

17.4.7 Operation principle

17.4.7.1 Current reversal logic SEMOD156478-5 v5

The current reversal logic can be enabled by setting the parameter OperCurrRev = On. The current
reversal logic uses a reverse zone connected to the input IRVLx to recognize the fault on the parallel
line in any of the phases. When the reverse zone has been activated (even if only for a short time), it
prevents sending of a communication signal and tripping through the scheme communication logic
after a settable time tPickUpRev. The prevention will last for tPickUpRev + 10 ms + tDelayRev after
the IRVLx reset. This makes it possible for the receive signal to reset before the trip signal is
activated due to the current reversal by the forward directed zone. The logic diagram for current
reversal is shown in Figure 621.

BLOCK

IRVBLKLx
tDelayRev
tPickUpRev 10 ms tPickUpRev IRVOPLx
IRVLx & t
t t t

operCurrRev=On

IEC06000474-3-en.vsd
IEC06000474 V3 EN-US

Figure 621: Simplified logic diagram for current reversal

By connecting the IRVOPLx signal to input BLKCSLx in the ZPCPSCH function, the sending carrier
send signal CSLx in ZPCPSCH is blocked. By connecting the IRVOPLx signal to input BLKTRLx in
ZPCPSCH, the TRIPLx output in ZPCPSCH is blocked.

The Current reversal and weak-end infeed logic for phase segregated communication (ZPCWPSCH)
function has an internal 10 ms drop-off timer which secure that the current reversal logic will be
activated for short input signals even if the pickup timer is set to zero.

17.4.7.2 Weak-end infeed logic GUID-CBFC8E60-748A-49F6-AF73-563E7CFC0653 v5

The WEI function sends back (echoes) the received carrier signal under the condition that no fault
has been detected at the weak end by different fault detection elements (distance protection in
forward and reverse direction).

BLOCK
BLKZ
WEIBLKLx 1 ECHOLx-contd
&
tPickUpWEI
CRLx & 50 ms 200 ms
t &
1 t t
ECHOLx
200 ms &
WEIBLKOx
t

&

1
1500 ms
CBOPEN
t

OperationWEI=Echo

IEC07000085-3-en.vsd
IEC07000085 V3 EN-US

Figure 622: Simplified logic for weak-end infeed logic — Echo

The WEI function returns the received carrier signal, shown in Figure 622, when:

1060 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

• No active signal present on the input BLOCK.

• The input CRLx is active. This input is usually connected to the CRLx output on the scheme
communication logic for distance or Overcurrent protection (ZCPSCH).
• The WEI function is not blocked by the active signal connected to the WEIBLKLx input or to the
BLKZ input. The latter is usually configured to the STGEN output of the fuse-failure function.
• No active signal has been present for at least 200 ms on the WEIBLKOx input. An OR
combination of all fault detection functions (not undervoltage) as present within the IED is
usually used for this purpose.
• The weak-end infeed logic also echoes the received permissive signal when local breaker
opens, CBOPEN prior to faults appeared at the end of line.

When an echo function is used in both the IEDs on the protected line (should generally be avoided),
a spurious signal can be looped round by the echo logics. To avoid a continuous lock-up of the
system, the duration of the echoed signal is limited to 200 ms.

An undervoltage criteria is used as an additional tripping criteria when the tripping of the local
breaker is selected. Setting OperationWEI = Echo &Trip together with the WEI function and ECHOLx,
trip signal TRPWEIx has been issued by the echo and trip logic which is described in Figure 623.

ECHOLx- contd

CBOPEN

U3P*
100 ms
=1
& t
Undervoltage TRPWEI
detection =1
UPE<

15 ms
UPP< TRPWEI1
& t

OperationWEI= Echo & Trip

15 ms
TRPWEI2
& t

15 ms
TRPWEI3
& t

IEC13000278-1-en.vsd
IEC13000278 V1 EN-US

Figure 623: Simplified logic diagram for weak-end infeed logic – Echo & Trip

It is strongly recommended to not connect any start signals from impedance

protection or directional overcurrent protection functions to WEIBLK and WEIBLKOP
inputs in ZPCWPSCH function to block the echo signal, if local protection functions
operate for faults at the weak end.

Start signals can be connected to WEIBLKLx and WEIBLKOx via OR gate to achieve the blocking of
echo signal in case if the faults are detected by local protection functions and thereby, avoiding the
operation from the remote end. By this, 3-pole operation can be accomplished in addition to 1-pole
and 2-pole operations by ZPCWPSCH function. Also, if a 3-pole operation needs to be achieved by a
separate protection function, current reversal and weak-end infeed logic for distance protection 3-
phase ZCRWPSCH function can be used. Figure 624 and Figure 625 shows the connection of start
signals from ZMFCPDIS function to WEIBLKLx and WEIBLKOx in ACT configuration to block echo
signal.

Transformer protection RET670 1061

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

ZMFCPDIS(21;Z<)
I3P I3P TRIP
U3P U3P TRZ1
INP TRL1Z1
BLOCK TRL2Z1
VTSZ TRL3Z1
BLKZ1 TRZ2
BLKZ2 TRL1Z2
BLKZ3 TRL2Z2
BLKZ4 TRL3Z2
BLKZ5 TRZ3
BLKZRV TRZ4
BLKZBU TRZ5 ZPCWPSCH(85)
BLKTRZ1 TRZRV
BLKTRZ2 TRZBU U3P U3P TRPWEI
BLKTRZ3 START ZMFCPDIS_START BLOCK TRPWEIL1
BLKTRZ4 STZ1 OR BLKZ TRPWEIL2
BLKTRZ5 STNDZ1 CBOPEN TRPWEIL3
BLKTRZRV STZ2 ZMFCPDIS_START INPUT1 OUT CR IRVOP
BLKTRZBU STL1Z2 ZMFCPDIS_STFWL1 INPUT2 NOUT CRL1 IRVOPL1
BLKTD STL2Z2 O:2403|T:3|I:26 CRL2 IRVOPL2
EXTNST STL3Z2 CRL3 IRVOPL3
ORCND STNDZ2 IRVL1 ECHO ZPCWPSCH_ECHO
RELCNDZ1 STZ3 IRVL2 ECHOL1 ZPCWPSCH_ECHOL1
RELCNDZ2 STNDZ3 IRVL3 ECHOL2 ZPCWPSCH_ECHOL2
RELCNDZ3 STZ4 IRVBLKL1 ECHOL3 ZPCWPSCH_ECHOL3
RELCNDZ4 STNDZ4 IRVBLKL2
RELCNDZ5 STZ5 IRVBLKL3
RELCNDZRV STNDZ5 OR WEIBLK
RELCNDZBU STZRV WEIBLKL1
STL1ZRV ZMFCPDIS_START INPUT1 OUT WEIBLKL2
STL2ZRV ZMFCPDIS_STFWL2 INPUT2 NOUT WEIBLKL3
STL3ZRV O:2400|T:3|I:25 WEIBLKOP
STNDZRV WEIBLKO1
STZBU WEIBLKO2
STNDZBU WEIBLKO3
STND O:3815|T:3|I:1
STNDL1
STNDL2
STNDL3 OR
STNDPE
STFWL1 ZMFCPDIS_STFWL1 ZMFCPDIS_START INPUT1 OUT
STFWL2 ZMFCPDIS_STFWL2 ZMFCPDIS_STFWL3 INPUT2 NOUT
STFWL3 ZMFCPDIS_STFWL3 O:2406|T:3|I:27
STFWPE
STRVL1
STRVL2
STRVL3
STRVPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
STTDFWL1
STTDFWL2
STTDFWL3
STTDRVL1
STTDRVL2
STTDRVL3
O:2095|T:3|I:1

IEC18000012 V2 EN-US

Figure 624: Blocking of echo signal using WEIBLKLx input of ZPCWPSCH

ZMFCPDIS(21;Z<)
I3P I3P TRIP
U3P U3P TRZ1
INP TRL1Z1
BLOCK TRL2Z1
VTSZ TRL3Z1
BLKZ1 TRZ2
BLKZ2 TRL1Z2
BLKZ3 TRL2Z2
BLKZ4 TRL3Z2
BLKZ5 TRZ3
BLKZRV TRZ4 ZPCWPSCH(85)
BLKZBU TRZ5
BLKTRZ1 TRZRV U3P U3P TRPWEI
BLKTRZ2 TRZBU BLOCK TRPWEIL1
BLKTRZ3 START ZMFCPDIS_START BLKZ TRPWEIL2
BLKTRZ4 STZ1 CBOPEN TRPWEIL3
BLKTRZ5 STNDZ1 CR IRVOP
BLKTRZRV STZ2 CRL1 IRVOPL1
BLKTRZBU STL1Z2 CRL2 IRVOPL2
BLKTD STL2Z2 OR CRL3 IRVOPL3
EXTNST STL3Z2 IRVL1 ECHO ZPCWPSCH_ECHO
ORCND STNDZ2 ZMFCPDIS_START INPUT1 OUT IRVL2 ECHOL1 ZPCWPSCH_ECHOL1
RELCNDZ1 STZ3 ZMFCPDIS_STFWL1 INPUT2 NOUT IRVL3 ECHOL2 ZPCWPSCH_ECHOL2
RELCNDZ2 STNDZ3 O:3000|T:3|I:29 IRVBLKL1 ECHOL3 ZPCWPSCH_ECHOL3
RELCNDZ3 STZ4 IRVBLKL2
RELCNDZ4 STNDZ4 IRVBLKL3
RELCNDZ5 STZ5 WEIBLK
RELCNDZRV STNDZ5 WEIBLKL1
RELCNDZBU STZRV WEIBLKL2
STL1ZRV WEIBLKL3
STL2ZRV OR WEIBLKOP
STL3ZRV WEIBLKO1
STNDZRV ZMFCPDIS_START INPUT1 OUT WEIBLKO2
STZBU ZMFCPDIS_STFWL2 INPUT2 NOUT WEIBLKO3
STNDZBU O:3003|T:3|I:30 O:3816|T:3|I:2
STND
STNDL1
STNDL2
STNDL3
STNDPE
STFWL1 ZMFCPDIS_STFWL1
STFWL2 ZMFCPDIS_STFWL2 OR
STFWL3 ZMFCPDIS_STFWL3
STFWPE ZMFCPDIS_START INPUT1 OUT
STRVL1 ZMFCPDIS_STFWL3 INPUT2 NOUT
STRVL2 O:3006|T:3|I:31
STRVL3
STRVPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
STTDFWL1
STTDFWL2
STTDFWL3
STTDRVL1
STTDRVL2
STTDRVL3
O:2095|T:3|I:1

IEC18000013 V2 EN-US

Figure 625: Blocking of echo signal using WEIBLKOx input of ZPCWPSCH

17.4.8 Technical data

SEMOD166938-2 v7

Table 708: ZPCWPSCH technical data

Function Range or value Accuracy

Detection level phase to neutral (10-90)% of UBase ±0.5% of Ur
voltage
Detection level phase to phase (10-90)% of UBase ±0.5% of Ur
voltage
Reset ratio <105% at (20-90)% of UBase -
Table continues on next page

1062 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

Function Range or value Accuracy

Operate time for current (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
reversal
Delay time for current reversal (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
Coordination time for weak-end (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
infeed logic

17.5 Scheme communication logic for residual overcurrent

protection ECPSCH IP14711-1 v2

17.5.1 Function revision history GUID-F53CEDFF-DD1E-4FC2-A8AF-85DD40DBF71B v1

Document Product History

revision revision
B 2.2.1 -
C 2.2.2 -
D 2.2.2
E 2.2.2 -
F 2.2.3 -
G 2.2.3 -
H 2.2.3 -
J 2.2.4 -
K 2.2.4 -
L 2.2.4
M 2.2.5 Added separate DOs for teleprotection permissive (TxPrm & RxPrm1), blocking (TxBlk &
RxBlk1) and direct trip (TxTr & RxTr1) transmit and receive signals in accordance with
61850 Ed 2.0.

17.5.2 Identification
M14882-1 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Scheme communication logic for ECPSCH - 85
residual overcurrent protection

17.5.3 Functionality M13918-4 v11

To achieve fast fault clearance of earth faults on the part of the line not covered by the instantaneous
step of the residual overcurrent protection, the directional residual overcurrent protection can be
supported with a logic that uses communication channels.

In the directional scheme, information of the fault current direction must be transmitted to the other
line end. With directional comparison, a short operate time of the protection including a channel
transmission time, can be achieved. This short operate time enables rapid autoreclosing function
after the fault clearance.

The communication logic module for directional residual current protection enables blocking as well
as permissive under/overreaching, and unblocking schemes. The logic can also be supported by
additional logic for weak-end infeed and current reversal, included in Current reversal and weak-end
infeed logic for residual overcurrent protection (ECRWPSCH) function.

Transformer protection RET670 1063

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

17.5.4 Function block M13924-3 v5

ECPSCH
BLOCK TRIP
BLKTR CS
BLKCS CRL
CSBLK LCG
CACC
CSOR
CSUR
CR
CRG

IEC06000288-2-en.vsd
IEC06000288 V2 EN-US

Figure 626: ECPSCH function block

17.5.5 Signals
PID-3581-INPUTSIGNALS v7

Table 709: ECPSCH Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Signal for blocking trip due to communication logic
BLKCS BOOLEAN 0 Signal for blocking CS in Overreach and Blocking schemes
CSBLK BOOLEAN 0 Reverse residual overcurrent signal for Carrier Send
CACC BOOLEAN 0 Signal to be used for tripping by Communication Scheme
CSOR BOOLEAN 0 Overreaching residual overcurrent signal for Carrier Send
CSUR BOOLEAN 0 Underreaching residual overcurrent signal for Carrier Send
CR BOOLEAN 0 Carrier Receive for Communication Scheme Logic
CRG BOOLEAN 0 Carrier guard signal received

PID-3581-OUTPUTSIGNALS v6

Table 710: ECPSCH Output signals

Name Type Description

TRIP BOOLEAN Trip signal by communication scheme logic
CS BOOLEAN Carrier Send by Communication Scheme Logic
CRL BOOLEAN Carrier Receive from Communication Scheme Logic
LCG BOOLEAN loss of carrier guard signal

1064 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

17.5.6 Settings
PID-3581-SETTINGS v6

Table 711: ECPSCH Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
SchemeType Off - - Permissive UR Scheme type, Mode of Operation
Intertrip
Permissive UR
Permissive OR
Blocking
tCoord 0.000 - 60.000 s 0.001 0.035 Communication scheme coordination
time
tSendMin 0.000 - 60.000 s 0.001 0.100 Minimum duration of a carrier send
signal

Table 712: ECPSCH Group settings (advanced)

Name Values (Range) Unit Step Default Description

Unblock Off - - Off Operation mode of unblocking logic
NoRestart
Restart
tSecurity 0.000 - 60.000 s 0.001 0.035 Security timer for loss of carrier guard
detection

17.5.7 Operation principle

M13922-4 v5
The four step directional residual overcurrent protection EF4PTOC is configured to give input
information, that is directional fault detection signals, to the ECPSCH logic:

• Input signal CACC is used for tripping of the communication scheme, normally the start signal of
a forward overreaching step of STFW.
• Input signal CSBLK is used for sending block signal in the blocking communication scheme,
normally the start signal of a reverse overreaching step of STRV.
• Input signal CSUR is used for sending permissive signal in the underreaching permissive
communication scheme, normally the start signal of a forward underreaching step of STINn,
where n corresponds to the underreaching step.
• Input signal CSOR is used for sending permissive signal in the overreaching permissive
communication scheme, normally the start signal of a forward overreaching step of STINn,
where n corresponds to the overreaching step.

In addition to this a signal from the autoreclosing function should be configured to the BLKCS input
for blocking of the function at a single phase reclosing cycle.

17.5.7.1 Blocking scheme M13922-9 v5

In the blocking scheme a signal is sent to the other line end if the directional element detects an
earth fault in the reverse direction. When the forward directional element operates, it trips after a
short time delay if no blocking signal is received from the opposite line end. The time delay, normally
30 – 40 ms, depends on the communication transmission time and a chosen safety margin.

One advantage of the blocking scheme is that only one channel (carrier frequency) is needed if the
ratio of source impedances at both end is approximately equal for zero and positive sequence source
impedances, the channel can be shared with the impedance measuring system, if that system also
works in the blocking mode. The communication signal is transmitted on a healthy line and no signal
attenuation will occur due to the fault.

Transformer protection RET670 1065

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

Blocking schemes are particular favorable for three-terminal applications if there is no zero-sequence
outfeed from the tapping. The blocking scheme is immune to current reversals because the received
signal is maintained long enough to avoid unwanted operation due to current reversal. There is never
any need for weak-end infeed logic, because the strong end trips for an internal fault when no
blocking signal is received from the weak end. The fault clearing time is however generally longer for
a blocking scheme than for a permissive scheme.

If the fault is on the line, the forward direction measuring element operates. If no blocking signal
comes from the other line end via the CR binary input (received signal) the TRIP output is activated
after the tCoord set time delay.

IEC05000448 V1 EN-US

Figure 627: Simplified logic diagram for blocking scheme

17.5.7.2 Permissive under/overreaching scheme M13922-17 v6

In the permissive scheme the forward directed earth-fault measuring element sends a permissive
signal to the other end, if an earth fault is detected in the forward direction. The directional element at
the other line end must wait for a permissive signal before activating a trip signal. Independent
channels must be available for the communication in each direction.

An impedance measuring IED, which works in the same type of permissive mode, with one channel
in each direction, can share the channels with the communication scheme for residual overcurrent
protection. If the impedance measuring IED works in the permissive overreaching mode, common
channels can be used in single line applications. In case of double lines connected to a common bus
at both ends, use common channels only if the ratio Z1S/Z0S (positive through zero-sequence source
impedance) is about equal at both ends. If the ratio is different, the impedance measuring and the
directional earth-fault current system of the healthy line may detect a fault in different directions,
which could result in unwanted tripping.

Common channels cannot be used when the weak-end infeed function is used in the distance or
earth-fault protection.

In case of an internal earth-fault, the forward directed measuring element operates and sends a
permissive signal to the remote end via the CS output (sent signal). Local tripping is permitted when
the forward direction measuring element operates and a permissive signal is received via the CR
binary input (received signal).

The permissive scheme can be of either underreaching or overreaching type. In the underreaching
alternative, an underreaching directional residual overcurrent measurement element will be used as
sending criterion of the permissive input signal CSUR.

1066 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

In the overreaching alternative, an overreaching directional residual overcurrent measurement

element will be used as sending criterion of the permissive input signal CSOR. Also the
underreaching input signal CSUR can initiate sending.

BLOCK
CRL
CR AND
25 ms

t TRIP
0 - 60 s

CACC AND AND t

50 ms
tCoord
t

AND

BLKCS OR CS
AND
Overreach
CSOR AND 25 ms

CSUR OR t

IEC05000280.vsd

IEC05000280 V4 EN-US

17.5.7.3 Unblocking scheme M13922-45 v6

In unblocking scheme, the lower dependability in permissive scheme is overcome by using the loss
of guard signal from the communication equipment to locally create a receive signal. It is common or
suitable to use the function when older, less reliable, power line carrier (PLC) communication is used.

The unblocking function uses a guard signal CRG, which must always be present, even when no CR
signal is received. The absence of the CRG signal for a time longer than the setting tSecurity time is
used as a CR signal, see figure 628. This also enables a permissive scheme to operate when the
line fault blocks the signal transmission.

The received signal created by the unblocking function is reset 150 ms after the security timer has
elapsed. When that occurs an output signal LCG is activated for signaling purpose. The unblocking
function is reset 200 ms after that the guard signal is present again.

CR
tSecurity CRL
t OR

CRG
200 ms 150 ms
t OR t AND
AND
LCG

IEC05000746-2-en.vsd
IEC05000746 V2 EN-US

Figure 628: Guard signal logic with unblocking scheme

The unblocking function can be set in three operation modes (setting Unblock):

Transformer protection RET670 1067

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

Off: The unblocking function is out of operation

No restart: Communication failure shorter than tSecurity will be ignored
If CRG disappears, a CRL signal will be transferred to the trip logic
There will not be any information in case of communication failure (LCG)
Restart Communication failure shorter than tSecurity will be ignored
It sends a defined (150 ms) CRL after the disappearance of the CRG signal
The function will activate LCG output in case of communication failure
If the communication failure comes and goes (<200 ms) there will not be recurrent
signaling

17.5.8 Technical data

M16049-1 v10

Table 713: ECPSCH technical data

Function Range or value Accuracy

Scheme type Permissive Underreaching -
Permissive Overreaching
Blocking
Communication scheme (0.000-60.000) s ±0.2% or ±20 ms whichever is greater
coordination time

17.6 Current reversal and weak-end infeed logic for residual

overcurrent protection ECRWPSCH IP14365-1 v4

17.6.1 Identification
M14883-1 v2

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Current reversal and weak-end infeed ECRWPSCH - 85
logic for residual overcurrent protection

17.6.2 Functionality
M13928-3 v8
The Current reversal and weak-end infeed logic for residual overcurrent protection (ECRWPSCH) is
a supplement to Scheme communication logic for residual overcurrent protection ECPSCH.

To achieve fast fault clearing for all earth faults on the line, the directional earth fault protection
function can be supported with logic that uses tele-protection channels.

This is why the IEDs have available additions to the scheme communication logic.
M13928-6 v2
If parallel lines are connected to common busbars at both terminals, overreaching permissive
communication schemes can trip unselectively due to fault current reversal. This unwanted tripping
affects the healthy line when a fault is cleared on the other line. This lack of security can result in a
total loss of interconnection between the two buses. To avoid this type of disturbance, a fault current
reversal logic (transient blocking logic) can be used.
M13928-8 v5
Permissive communication schemes for residual overcurrent protection can basically operate only
when the protection in the remote IED can detect the fault. The detection requires a sufficient
minimum residual fault current, out from this IED. The fault current can be too low due to an opened
breaker or high-positive and/or zero-sequence source impedance behind this IED. To overcome

1068 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

these conditions, weak-end infeed (WEI) echo logic is used. The weak-end infeed echo is limited to
200 ms to avoid channel lockup.

17.6.3 Function block M13930-3 v6

ECRWPSCH
U3P* IRVL
BLOCK TRWEI
IRVBLK ECHO
IRV
WEIBLK1
WEIBLK2
VTSZ
CBOPEN
CRL

IEC06000289-3-en.vsd
IEC06000289 V3 EN-US

Figure 629: ECRWPSCH function block

17.6.4 Signals
PID-3522-INPUTSIGNALS v9

Table 714: ECRWPSCH Input signals

Name Type Default Description

U3P GROUP - Group signal for voltage input
SIGNAL
BLOCK BOOLEAN 0 Block of function
IRVBLK BOOLEAN 0 Block of current reversal function
IRV BOOLEAN 0 Activation of current reversal logic
WEIBLK1 BOOLEAN 0 Block of WEI Logic
WEIBLK2 BOOLEAN 0 Block of WEI logic due to operation of other protections
VTSZ BOOLEAN 0 Block of trip from WEI logic through fuse-failure function
CBOPEN BOOLEAN 0 Block of trip from WEI logic by an open breaker
CRL BOOLEAN 0 POR Carrier receive for WEI logic

PID-3522-OUTPUTSIGNALS v8

Table 715: ECRWPSCH Output signals

Name Type Description

IRVL BOOLEAN Operation of current reversal logic
TRWEI BOOLEAN Trip signal from weak end infeed logic
ECHO BOOLEAN Permissive signal transmitted as echo signal or in case of weak
end infeed

Transformer protection RET670 1069

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

17.6.5 Settings
PID-3522-SETTINGS v9

Table 716: ECRWPSCH Group settings (basic)

Name Values (Range) Unit Step Default Description

CurrRev Off - - Off Operating mode of Current Reversal
On Logic
tPickUpRev 0.000 - 60.000 s 0.001 0.020 Pickup time for current reversal logic
tDelayRev 0.000 - 60.000 s 0.001 0.060 Time Delay to prevent Carrier send and
local trip
WEI Off - - Off Operating mode of WEI logic
Echo
Echo & Trip
tPickUpWEI 0.000 - 60.000 s 0.001 0.000 Coordination time for the WEI logic
3U0> 5 - 70 %UB 1 25 Neutral voltage setting for fault
conditions measurement

Table 717: ECRWPSCH Non group settings (basic)

Name Values (Range) Unit Step Default Description

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

17.6.6 Operation principle

17.6.6.1 Directional comparison logic function M13929-4 v6

The directional comparison function contains logic for blocking overreaching and permissive
overreaching schemes.

The circuits for the permissive overreaching scheme contain logic for current reversal and weak-end
infeed functions. These functions are not required for the blocking overreaching scheme.

Use the independent or inverse time functions in the directional earth fault protection module to get
backup tripping in case the communication equipment malfunctions and prevents operation of the
directional comparison logic.

Connect the necessary signal from the autorecloser for blocking of the directional comparison
scheme, during a single-phase autoreclosing cycle, to the BLOCK input of the directional comparison
module.

17.6.6.2 Fault current reversal logic M13929-11 v8

The fault current reversal logic uses a reverse directed element, connected to the input signal IRV,
which recognizes that the fault is in reverse direction. When the reverse direction element is
activated the output signal IRVL is activated which is shown in Figure 630. The logic is now ready to
handle a current reversal without tripping. The output signal IRVL will be connected to the block input
on the permissive overreaching scheme.

When the fault current is reversed on the healthy line, IRV is deactivated and IRVBLK is activated.
The tDelayRev timer delays the reset of the output signal. The signal blocks operation of the
overreach permissive scheme for residual current and thus prevents unwanted operation caused by
fault current reversal.

1070 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 17
Scheme communication

BLOCK

IRVBLK
tDelayRev
tPickUpRev 10 ms tPickUpRev AND t
IRVL
IRV
t t t

CurrRev = On

IEC09000031-4-en.vsd
IEC09000031 V4 EN-US

Figure 630: Simplified logic diagram for current reversal

17.6.6.3 Weak-end infeed logic M13929-24 v10

The weak-end infeed function can be set to send only an echo signal (WEI=Echo) or an echo signal
and a trip signal (WEI=Echo & Trip). The corresponding logic diagrams are depicted in Figure 631
and Figure 632.

The weak-end infeed logic uses normally a reverse and a forward direction element, connected to
WEIBLK2 via an OR-gate. If neither the forward nor the reverse directional measuring element is
activated during the last 200 ms, the weak-end infeed logic echoes back the received permissive
signal as shown in Figure 631 and Figure 632. The weak-end infeed logic also echoes the received
permissive signal when CBOPEN is high (local breaker opens) prior to faults appeared at the end of
line.

If the forward or the reverse directional measuring element is activated during the last 200 ms, the
fault current is sufficient for the IED to detect the fault with the earth fault function that is in operation.

CR
BLOCK AND

VTSZ
OR

tPickUpWEI
WEIBLK1
t AND 50 ms 200 ms
AND
OR t t ECHO
200 ms AND
CRL t

WEIBLK2

AND
1500 ms
CBOPEN OR
t

WEI = Echo

IEC09000032-6-en.vsd

IEC09000032 V6 EN-US

Figure 631: Simplified logic diagram for weak-end infeed logic - Echo
With the WEI= Echo & Trip setting, the logic sends an echo according to the diagram above. Further,
it activates the TRWEI signal to trip the breaker if the echo conditions are fulfilled and the neutral
point voltage is above the set operate value for 3U0> .

The voltage signal that is used to calculate the zero sequence voltage is set in the earth fault function
which is in operation.

Transformer protection RET670 1071

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 17 1MRK 504 164-UEN Rev. N
Scheme communication

BLOCK

VTSZ
OR

tPickUpWEI
WEIBLK1 t AND 50 ms 200 ms
AND
OR t t ECHO
200 ms AND
t
CRL

AND
WEIBLK2 1500 ms
OR
t

CBOPEN

AND
ST3U0
15 ms TRWEI
a>b AND
3U0> t

WEI = Echo&Trip

IEC09000020-6-en.vsd

IEC09000020 V6 EN-US

Figure 632: Simplified logic diagram for weak-end infeed logic - Echo & Trip
The weak-end infeed echo sent to the strong line end has a maximum duration of 200 ms. When this
time period has elapsed, the conditions that enable the echo signal to be sent are set to zero for a
time period of 50 ms. This avoids ringing action if the weak-end echo is selected for both line ends.

17.6.7 Technical data

M16051-2 v11

Table 718: ECRWPSCH technical data

Function Range or value Accuracy

Operate mode of WEI logic Off -
Echo
Echo & Trip
Operate voltage 3U0 for WEI trip (5-70)% of UBase ±0.5% of Ur

Operate time for current reversal (0.000-60.000) s ±0.2% or ±30 ms whichever is greater
logic
Delay time for current reversal (0.000-60.000) s ±0.2% or ±30 ms whichever is greater
Coordination time for weak-end (0.000–60.000) s ±0.2% or ±30 ms whichever is greater
infeed logic

1072 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 18
Logic

Section 18 Logic
18.1 Tripping logic SMPPTRC IP14576-1 v4

18.1.1 Function revision history GUID-ADA72CE6-B6ED-48B3-A897-A7B42ECDEBB4 v2

Document Product History

revision revision
A 2.2.1 STN (Start neutral) output added. IEC 61850 mapping is made for the added output.
B 2.2.1 -
C 2.2.1 -
D 2.2.2 -
E 2.2.2 -
F 2.2.2 -
G 2.2.3 -
H 2.2.3 -
J 2.2.3 -
K 2.2.4 -
L 2.2.4 Added TRINN (Trip neutral) input and TRN (trip neutral) outputs. TRINALL (Trip all
phases) input is changed from TRIN. IEC 61850 mapping is made for the added output.
The block logic is corrected for the lockout functionality.
M 2.2.5 -

18.1.2 Identification
SEMOD56226-2 v7

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Tripping logic SMPPTRC 94
1 -> 0
IEC15000314 V1 EN-US

18.1.3 Functionality M12275-3 v15

A function block for protection tripping and general start indication is always provided as a basic
function for each circuit breaker. It provides a settable pulse prolongation time to ensure a trip pulse
of sufficient length, as well as all functionality necessary for correct co-operation with autoreclosing
functions.

The trip function block includes a settable latch function for the trip signal and circuit breaker lockout.

The trip function can collect start and directional signals from different application functions. The
aggregated start and directional signals are mapped to the IEC 61850 logical node data model.

Transformer protection RET670 1073

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 18 1MRK 504 164-UEN Rev. N
Logic

18.1.4 Function block M12638-3 v8

SMPPTRC
BLOCK TRIP
BLKLKOUT TRL1
TRINALL TRL2
TRINL1 TRL3
TRINL2 TRN
TRINL3 TR1P
TRINN TR2P
PSL1 TR3P
PSL2 CLLKOUT
PSL3 START
1PTRZ STL1
1PTREF STL2
P3PTR STL3
SETLKOUT STN
RSTLKOUT FW
STDIR REV

IEC05000707-5-en.vsdx
IEC05000707 V5 EN-US

Figure 633: SMPPTRC function block

18.1.5 Signals
PID-7434-INPUTSIGNALS v1

Table 719: SMPPTRC Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
BLKLKOUT BOOLEAN 0 Blocks circuit breaker lockout output (CLLKOUT)
TRINALL BOOLEAN 0 Trip all phases
TRINL1 BOOLEAN 0 Trip phase L1
TRINL2 BOOLEAN 0 Trip phase L2
TRINL3 BOOLEAN 0 Trip phase L3
TRINN BOOLEAN 0 Trip neutral, trips all phases
PSL1 BOOLEAN 0 Functional input for phase selection in phase L1
PSL2 BOOLEAN 0 Functional input for phase selection in phase L2
PSL3 BOOLEAN 0 Functional input for phase selection in phase L3
1PTRZ BOOLEAN 0 Input for phase selective carrier aided trip
1PTREF BOOLEAN 0 Input for phase selective earth fault trip
P3PTR BOOLEAN 0 Prepare all tripping to be three-phase
SETLKOUT BOOLEAN 0 Input for setting the circuit breaker lockout function
RSTLKOUT BOOLEAN 0 Input for resetting the circuit breaker lockout function
STDIR INTEGER 0 General start direction input

PID-7434-OUTPUTSIGNALS v1

Table 720: SMPPTRC Output signals

Name Type Description

TRIP BOOLEAN General trip signal
TRL1 BOOLEAN Trip signal from phase L1
TRL2 BOOLEAN Trip signal from phase L2
Table continues on next page

1074 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 18
Logic

Name Type Description

TRL3 BOOLEAN Trip signal from phase L3
TRN BOOLEAN Trip signal from neutral
TR1P BOOLEAN Trip single-pole
TR2P BOOLEAN Trip two-pole
TR3P BOOLEAN Trip three-pole
CLLKOUT BOOLEAN Circuit breaker lockout output (set until reset)
START BOOLEAN General start signal
STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3
STN BOOLEAN Start signal from neutral
FW BOOLEAN General forward signal
REV BOOLEAN General reverse signal

18.1.6 Settings
PID-7434-SETTINGS v1

Table 721: SMPPTRC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
Program 3 phase - - 1ph/3ph Three ph; single or three ph; single, two
1ph/3ph or three ph trip
1ph/2ph/3ph
tTripMin 0.000 - 60.000 s 0.001 0.150 Minimum duration of trip output signal
tWaitForPHS 0.020 - 0.500 s 0.001 0.050 Secure 3-pole trip when phase selection
failed

Table 722: SMPPTRC Group settings (advanced)

Name Values (Range) Unit Step Default Description

TripLockout Off - - Off Latch TRIP output when SETLKOUT
On input is activated
AutoLock Off - - Off Activate CLLKOUT output when TRIP
On output is activated
tEvolvingFault 0.000 - 60.000 s 0.001 2.000 Secure 3-pole tripping at evolving faults

18.1.7 Operation principle M12255-3 v14

There is a single input (TRINALL) through which all trip output signals from the protection functions
within the IED or from external protection functions via one or more of the IEDs' binary inputs are
routed. It has a three-phase trip output (TRIP) to connect to one or more of the IEDs' binary outputs,
as well as to other functions within the IED requiring this signal.

Transformer protection RET670 1075

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 18 1MRK 504 164-UEN Rev. N
Logic

Simplified logic where setting

Program = 3 phase
BLOCK
BLKLKOUT Final Tripping Circuits
BLOCK
3 phase
BLKLKOUT TRIP TRIP
BLOCK TRIPALL TRIPALL TRL1 TRL1
TRINALL TRINALL TRIPL1 TRL2 TRL2
TRINL1 TRINL1 TRIPL2 TRL3 TRL3
TRINL2 TRINL2 TRIPL3 TRN TRN
TRINL3 TRINL3 TRIPN TR1P
1PTRZ 1PTRZ SETLKOUT TR2P
1PTREF 1PTREF RSTLKOUT TR3P TR3P
CLLKOUT CLLKOUT
TRINN
SETLKOUT
RSTLKOUT

Simplified logic where setting

BLOCK Program = 1ph/3ph
BLKLKOUT Final Tripping Circuits
BLOCK
TRIP
BLKLKOUT TRIP
1ph/3ph TRIPALL TRL1
TRL1
Phase Segregated TRIPL1 TRL2
TRL2
BLOCK TRIPL1
TRINALL TRL3
TRINALL L1TRIP L1TRIP TRIPL2 TRIPL2 TRL3
TRINL1 TRN
TRINL1 L2TRIP L2TRIP TRIPL3 TRIPL3 TRN
TRINL2 TR1P
TRINL2 L3TRIP L3TRIP TRIPN TR1P
TRINL3 SETLKOUT TR2P
TRINL3 P3PTR
PSL1 TR3P
PSL1 RSTLKOUT TR3P
PSL2 CLLKOUT
PSL2 CLLKOUT
PSL3
PSL3
1PTRZ
1PTRZ
1PTREF
1PTREF

P3PTR
TRINN
SETLKOUT
RSTLKOUT

Simplified logic where setting

BLOCK Program = 1ph/2ph/3ph

BLKLKOUT Final Tripping Circuits

BLOCK
TRIP
BLKLKOUT TRIP
1ph/2ph/3ph TRIPALL TRL1 TRL1
Phase Segregated TRIPL1 TRL2 TRL2
BLOCK TRIPL1
TRINALL L1TRIP TRL3
TRINALL L1TRIP TRIPL2 TRIPL2 TRL3
TRINL1 L2TRIP TRN
TRINL1 L2TRIP TRIPL3 TRIPL3 TRN
TRINL2 L3TRIP TR1P
TRINL2 L3TRIP TRIPN TR1P
TRINL3 SETLKOUT TR2P TR2P
TRINL3 P3PTR
PSL1 TR3P
PSL1 RSTLKOUT TR3P
PSL2 CLLKOUT
PSL2 CLLKOUT
PSL3
PSL3
1PTRZ
1PTRZ
1PTREF
1PTREF

P3PTR
TRINN
SETLKOUT
RSTLKOUT

IEC10000266-3-en.vsdx

IEC10000266 V3 EN-US

Figure 634: Simplified logic diagrams with different program modes

SMPPTRC function has separate inputs (TRINL1, TRINL2, TRINL3) which are used for single-phase
and two-phase tripping from the functions which offer phase segregated trip outputs.

The input TRINN can be activated from functions which provide data for trip in the neutral.

The inputs 1PTRZ and 1PTREF enable single- phase and two-phase tripping for those functions
which do not have their own phase selection capability (that is, which have just a single trip output).
An example of such a protection function is the residual overcurrent protection. The SMPPTRC
function has two inputs for these functions, one for impedance tripping (1PTRZ used for carrier-aided
tripping commands from the scheme communication logic), and one for earth fault tripping (1PTREF
used for tripping from a residual overcurrent protection). External phase selection for these two trip
signals shall be provided via inputs PSL1, PSL2, and PSL3.

1076 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 18
Logic

A timer tWaitForPHS, secures a three-phase trip command for these two trip signals in the absence
of the external phase selection signals.

The SMPPTRC function has three trip outputs TRL1, TRL2, TRL3 (besides the three-phase trip
output TRIP), one per phase, to connect to one or more of the IEDs’ binary outputs, as well as to
other functions within the IED requiring these signals. These three output signals shall be used as
trip signals for individual circuit breaker poles. These signals are important for cooperation with the
autorecloser SMBRREC function.

The outputs TRN and TRIP are activated when the input TRINN is activated.

The SMPPTRC function is equipped with logic which secures correct operation for evolving faults as
well as for reclosing on to persistent faults. A binary input P3PTR is provided which will force all
tripping to be three-phase. This input is required in order to cooperate with the SMBRREC function.

In multi-breaker arrangements, one SMPPTRC function block is used for each circuit breaker.

The lockout function

The SMPPTRC function block is provided with possibilities to initiate lockout. The lockout can be set
to only activate the circuit breaker lockout output CLLKOUT or to both initiate the circuit breaker
lockout output and to maintain the trip signal outputs TRIP, TRL1, TRL2, TRL3, and TR3P (latched).

If external conditions are required to initiate a circuit breaker lockout, it can be achieved by activating
input SETLKOUT. The settingAutoLock = Off means that the internal three-phase trip will not activate
lockout so only initiation of the input SETLKOUT will result in lockout. This is normally the case for
overhead line protection where most faults are transient. Unsuccessful autoreclosing and back-up
zone tripping can in such cases be connected to initiate lockout by activating the input SETLKOUT.

If CLLKOUT is set by an external trip signal from another protection function, that is by activating
SETLKOUT input, or internally by a three-phase trip, that is with the setting AutoLock = On and the
setting TripLockout = On, then also all trip outputs are set latched.

The lockout can manually be reset after checking the primary fault by activating the reset lockout
input RSTLKOUT.

The BLKLKOUT input blocks the circuit breaker lockout output CLLKOUT.

The following three sequences in the following table shows the interaction between the inputs
BLOCK, BLKLKOUT, SETLKOUT, RSTLKOUT and the output CLLKOUT.

Table 723: Lockout related signal interactions

Inputs Output
BLOCK BLKLKOUT SETLKOUT RSTLKOUT CLLKOUT
Active - - - False
Active - Active - False
- - - - False

- - Active - True
Active - - - True
Active - - Activated True
- - - - True

- Active - - False
Table continues on next page

Transformer protection RET670 1077

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 18 1MRK 504 164-UEN Rev. N
Logic

Inputs Output
BLOCK BLKLKOUT SETLKOUT RSTLKOUT CLLKOUT
- Active Active - False
- - - - True
- - - Activated False

Directional data
Merged directional data from application functions can be provided to the trip function (SMPPTRC)
via the start matrix function (SMAGAPC) connected to the STDIR input.

The directional input signal STDIR is a coded integer signal which contains 15 individual Boolean
signals, see Figure 639:

STDIRX=[b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, b12, b13, b14]
b0= START (start)
b1= FW (forward)
b2= REV (reverse)
b3= STL1 (start L1)
b4= FWL1 (forward L1)
b5= REVL1 (reverse L1)
b6= STL2 (start L2)
b7= FWL2 (forward L2)
b8= REVL2 (reverse L2)
b9= STL3 (start L3)
b10= FWL3 (forward L3)
b11= REVL3 (reverse L3)
b12= STN (start N)
b13= FWN (forward N)
b14= REVN (reverse N)

The indications for general start START and phase-wise starts STL1, STL2 and STL3, and neutral
STN and general directional forward FW and reverse REV are all available as outputs on the trip
function.

All start and directional outputs are mapped to the IEC 61850 logical node data model of the trip
function. The time stamping is updated each time an operate or start signal is changed:

• The common DIR output (general) is mapped as:

dirGeneral
0 unknown
1 forward
2 backward (reverse)
3 both

• The phase wise directional outputs (DIRL1, DIRL2, DIRL3, and DIRN) are mapped as:

1078 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 18
Logic

dirPhsA, dirPhsB, dirPhsC, dirNeut

0 unknown
1 forward
2 backward (reverse)

18.1.7.1 Logic diagram M12258-7 v7

tTripMin
BLOCK TRIPALL
OR
AND t

TRINL1
TRINL2
TRINL3
TRINALL OR
1PTREF
1PTRZ

IEC05000517-5-en.vsdx
IEC05000517 V5 EN-US

Figure 635: Three-phase front logic — simplified logic diagram

Transformer protection RET670 1079

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 18 1MRK 504 164-UEN Rev. N
Logic

TRINALL
TRINL1 L1TRIP
OR
PSL1
AND

TRINL2
L2TRIP
OR
PSL2
AND

TRINL3
L3TRIP
OR
PSL3
AND

-LOOP

OR OR
OR

AND AND

OR
tWaitForPHS
-LOOP
t

OR

1PTREF AND
AND

1PTRZ OR

IEC10000056-5-en.vsdx
IEC10000056 V5 EN-US

Figure 636: Phase segregated front logic

tTripMin
BLOCK
OR TR
L1TRIP AND t OR

tEvolvingFault

t AND

L2TRIP
L3TRIP
OR
P3PTR

IEC170
IEC17000065 V2 EN-US

Figure 637: Simplified additional logic per phase, Program = 1ph/3ph or 1ph/2ph/3ph

1080 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 18
Logic

TRIPL1
OR TRL1
OR

TRIPL2
OR TRL2
OR

TRIPL3
OR TRL3
OR
TRIPN TRN

OR OR TRIP
OR
TRIPALL
OR -LOOP

OR
-LOOP AND
AND TR3P
OR
AND OR
AND
10 ms To ensure that the
fault is single phase TR1P
AND t

OR To ensure that the

5 ms
fault is two phase TR2P
t
OR

AND

AND OR AND
OR

-LOOP
AND

TripLockout
AND AND
AutoLock -LOOP

SETLKOUT OR
OR AND CLLKOUT
AND AND

RSTLKOUT
AND
AND
BLOCK

BLKLKOUT

IEC17000066-3-en.vsdx

IEC17000066 V3 EN-US

Figure 638: Final tripping circuits

Transformer protection RET670 1081

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 18 1MRK 504 164-UEN Rev. N
Logic

Directional logic
IntToBits
STDIR START START
in b0
FW STL1
b1
REV STL2
b2
STL1 STL3
b3
FWL1 STN
b4
REVL1
b5
STL2
b6
FWL2 FW
b7
REVL2 BitsToInt
b8 dirGeneral (61850 Standard)
STL3
b9 0 = unknown
FWL3 b0 out
b10 DIR 1 = forward
REVL3 b1 2 = backward (reverse)
b11
STN 3 = both
b12
FWN REV
b13
REVN
b14
b15

BitsToInt dirPhsA (61850 Standard)

0 = unknown
AND b0 out DIRL1
b0 = START 1 = forward
b1 2 = backward (reverse)
b1 = FW
b2 = REV
b3 = STL1 XOR
b4 = FWL1
b5 = REVL1
b6 = STL2 AND
b7 = FWL2
b8 = REVL2
b9 = STL3 BitsToInt dirPhsB (61850 Standard)
b10 = FWL3
0 = unknown
b11 = REVL3 AND b0 out DIRL2
1 = forward
b12 = STN b1 2 = backward (reverse)
b13 = FWN
b14 = REVN
b15 = N/A XOR

AND

BitsToInt dirPhsC (61850 Standard)

0 = unknown
AND b0 out DIRL3
1 = forward
b1 2 = backward (reverse)

XOR

AND

BitsToInt dirNeut (61850 Standard)

0 = unknown
AND b0 out DIRN
1 = forward
b1 2 = backward (reverse)

XOR

AND

IEC16000179-2-en.vsdx
IEC16000179 V2 EN-US

Figure 639: The directional logic

18.1.8 Technical data

M12380-1 v15

Table 724: SMPPTRC technical data

Function Range or value Accuracy

Trip action, Program 3 phase, 1ph/2ph, 1ph/2ph/3ph -
Minimum trip pulse (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
length ,tTripMin
3-pole trip delay, tWaitForPHS (0.020-0.500) s ±0.2% or ±15 ms whichever is greater
Evolving fault delay (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
, tEvolvingFault

1082 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 18
Logic

18.2 General start matrix block SMAGAPC

18.2.1 Identification GUID-C6D3DE50-03D2-4F27-82FF-623E81D019F4 v1

Function Description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Generat start matrix block SMAGAPC - -

18.2.2 Functionality GUID-BA516165-96DE-4CD9-979B-29457C7653C0 v3

The Start Matrix (SMAGAPC) merges start and directional output signals from different application
functions and creates a common start and directional output signal (STDIR) to be connected to the
Trip function, see Figure 640.

The purpose of this functionality is to provide general start and directional information for the IEC
61850 trip logic data model SMPPTRC.

18.2.3 Function block GUID-99B1DF71-F7C4-4954-8688-BC709C3C2A16 v1

SMAGAPC
BLOCK STDIR
STDIR1
STDIR2
STDIR3
STDIR4
STDIR5
STDIR6
STDIR7
STDIR8
STDIR9
STDIR10
STDIR11
STDIR12
STDIR13
STDIR14
STDIR15
STDIR16

IEC16000165-1-en.vsdx
IEC16000165 V1 EN-US

Figure 640: SMAGAPC function block

18.2.4 Signals
PID-6906-INPUTSIGNALS v2

Table 725: SMAGAPC Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
STDIR1 INTEGER 0 Start direction input 1
STDIR2 INTEGER 0 Start direction input 2
STDIR3 INTEGER 0 Start direction input 3
STDIR4 INTEGER 0 Start direction input 4
STDIR5 INTEGER 0 Start direction input 5
STDIR6 INTEGER 0 Start direction input 6
STDIR7 INTEGER 0 Start direction input 7
Table continues on next page

Transformer protection RET670 1083

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 18 1MRK 504 164-UEN Rev. N
Logic

Name Type Default Description

STDIR8 INTEGER 0 Start direction input 8
STDIR9 INTEGER 0 Start direction input 9
STDIR10 INTEGER 0 Start direction input 10
STDIR11 INTEGER 0 Start direction input 11
STDIR12 INTEGER 0 Start direction input 12
STDIR13 INTEGER 0 Start direction input 13
STDIR14 INTEGER 0 Start direction input 14
STDIR15 INTEGER 0 Start direction input 15
STDIR16 INTEGER 0 Start direction input 16

PID-6906-OUTPUTSIGNALS v2

Table 726: SMAGAPC Output signals

Name Type Description

STDIR INTEGER Common start direction output

18.2.5 Settings
PID-6906-SETTINGS v2

Table 727: SMAGAPC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On

18.2.6 Operation principle GUID-02403756-5715-4D6B-9308-540D72979BD0 v3

Start matrix
The Start Matrix function requires that a protection function delivers the directional output signals in a
fixed order to Start Matrix.

A directional input signal STDIRX of the Start Matrix is of type word. Each input contains 14
individual Boolean signals, which are positioned as, see Figure 642.

STDIRX=[b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, b12, b13, b14]
b0= START (start)
b1= FW (forward)
b2= REV (reverse)
b3= STL1 (startL1)
b4= FWL1 (forwardL1)
b5= REVL1 (reverseL1)
b6= STL2 (startL2)
b7= FWL2 (forwardL2)
b8= REVL2 (reverseL2)
b9= STL3 (startL3)
b10= FWL3 (forwardL3)
b11= REVL3 (reverseL3)
Table continues on next page

1084 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 18
Logic

b12= STN (startN)

b13= FWN (forwardN)
b14= REVN (reverseN)

The StartMatrix function contains two function: the START criteria and the DIRECTION criteria, see
Figure 641.

The START criteria is to ensure that a forward and reverse signal shall come together with a start
signal to pass through the block. This is done individually for each protection function connected to
the StartMatrix via the STDIRX inputs, see Figure 642.

All STDIROUT signals are then connected via an OR gate, see Figure 641.

The DIRECTION criteria allow either forward or reverse (phase-wise forward FWLx or forward
neutral FWN or phase-wise reverse REVLx or reverse neutral REVN) to pass through to the general
STDIR output. If both forward and reverse are active phase-wise (e.g. REVLx=FWLx = True) or at
neutral (e.g. FWN = REVN = True) at the same time, none will be shown, see Figure 643.

SMAGAPC
(StartMatrix)

START Criteria
STDIR1
STDIRX STDIROUT

START Criteria
STDIR2
STDIRX STDIROUT

START Criteria
STDIR3
STDIRX STDIROUT
DIRECTION Criteria
STDIR
≥1 STDIRIN STDIR
START Criteria
STDIR4
STDIRX STDIROUT

START Criteria
STDIR5
STDIRX STDIROUT

START Criteria
STDIR6
STDIRX STDIROUT

START Criteria
STDIR7
STDIRX STDIROUT

START Criteria
STDIR8
STDIRX STDIROUT

START Criteria
STDIR9
STDIRX STDIROUT

START Criteria
STDIR10
STDIRX STDIROUT

START Criteria
STDIR11
STDIRX STDIROUT

START Criteria
STDIR12
STDIRX STDIROUT

START Criteria
STDIR13
STDIRX STDIROUT

START Criteria
STDIR14
STDIRX STDIROUT

START Criteria
STDIR15
STDIRX STDIROUT

START Criteria
STDIR16
STDIRX STDIROUT

IEC16000161-2-en.vsdx
IEC16000161 V2 EN-US

Figure 641: The StartMatrix function

Transformer protection RET670 1085

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 18 1MRK 504 164-UEN Rev. N
Logic

START Criteria

START (in)
STL1 (in)
STL2 (in) ≥1 START (out)
STL3 (in)
IntToBits STN (in) BitsToint
STDIRX STDIROUT
in b0 START (in) STL1 (out) START (out) b0 out
b1 FW (in) STL2 (out) FW (out) b1
b2 REV (in) STL3 (out) REV (out) b2
b3 STL1 (in) STN (out) STL1 (out) b3
b4 FWL1 (in) FWL1 (out) b4
b5 REVL1 (in) REVL1 (out) b5
&
b6 STL2 (in) FW (in) STL2 (out) b6
b7 FWL2 (in) FWL2 (out) b7
≥1 FW (out)
b8 REVL2 (in) REVL2 (out) b8
b9 STL3 (in) STL3 (out) b9
b10 FWL3 (in) FWL3 (out) b10
b11 REVL3 (in) & REVL3 (out) b11
REV (in)
b12 STN (in) STN (out) b12
b13 FWN (in) ≥1 REV (out) FWN (out) b13
b14 REVN (in) REVN (out) b14
b15 N/A FALSE b15

& FWL1 (out)

FWL1 (in)

& REVL1 (out)

REVL1 (in)

& FWL2 (out)

FWL2 (in)

& REVL2 (out)

REVL2 (in)

& FWL3 (out)

FWL3 (in)

& REVL3 (out)

REVL3 (in)

& FWN (out)

FWN (in)

& REVN (out)

REVN (in)

IEC16000162-2-en.vsdx

IEC16000162 V2 EN-US

Figure 642: The START Criteria function

DIRECTION Criteria

START (in) START (out)

IntToBits STL1 (in) STL1 (out) BitsToint
STDIRIN STL2 (in) STL2 (out) STDIR
in b0 START (in) START (out) b0 out
STL3 (in) STL3 (out)
b1 FW (in) FW (out) b1
STN (in) STN (out)
b2 REV (in) REV (out) b2
b3 STL1 (in) STL1 (out) b3
FW (in)
b4 FWL1 (in) FWL1 (out) b4
b5 REVL1 (in) REVL1 (out) b5
≥1 FW (out)
b6 STL2 (in) STL2 (out) b6
b7 FWL2 (in) FWL2 (out) b7
b8 REVL2 (in) REVL2 (out) b8
b9 STL3 (in) STL3 (out) b9
REV (in)
b10 FWL3 (in) FWL3 (out) b10
b11 REVL3 (in) REVL3 (out) b11
≥1 REV (out)
b12 STN (in) STN (out) b12
b13 FWN (in) FWN (out) b13
b14 REVN (in) REVN (out) b14
b15 N/A FALSE b15
& FWL1 (out)

FWL1 (in)
=1
REVL1 (in)

& REVL1 (out)

& FWL2 (out)

FWL2 (in)
=1
REVL2 (in)

& REVL2 (out)

& FWL3 (out)

FWL3 (in)
=1
REVL3 (in)

& REVL3 (out)

& FWN (out)

FWN (in)
=1
REVN (in)

& REVN (out)

IEC16000163-2-en.vsdx

IEC16000163 V2 EN-US

Figure 643: The DIRECTION Criteria function

STARTCOMB
To make it possible to provide the directional information from a protection function, a STARTCOMB
block is used in between the application function and the Start Matrix function.

The STARTCOMB function has one block input and 14 Boolean inputs that convert the 14 Boolean
inputs into a WORD output STDIR, see Figure 644.

1086 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 18
Logic

STDIRX=[b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, b12, b13, b14]
b0= START (start)
b1= FW (forward)
b2= REV (reverse)
b3= STL1 (startL1)
b4= FWL1 (forwardL1)
b5= REVL1 (reverseL1)
b6= STL2 (startL2)
b7= FWL2 (forwardL2)
b8= REVL2 (reverseL2)
b9= STL3 (startL3)
b10= FWL3 (forwardL3)
b11= REVL3 (reverseL3)
b12= STN (startN)
b13= FWN (forwardN)
b14= REVN (reverseN)

STARTCOMB
BLOCK STDI R
START
FW
REV
STL1
FWL1
REVL1
STL2
FWL2
REVL2
STL3
FWL3
REVL3
STN
FWN
REVN
IEC16000166-2-en.vsdx
IEC16000166 V2 EN-US

Figure 644: STARTCOMB

Protection functions
Some protection functions are provided with start and directional outputs, for example:

• Protection 1: General START, FW and REV

• Protection 2: Phase-wise STLx, FWLx and REVLx (where x = 1, 2 and 3)
• Protection 3: STN, FWN and REVN
• Protection 4: STDIR

Connection example
In Figure 645 below is an example how to connect start and directional signals from protection
functions via STARTCOMB and SMAGAPC to SMPPTRC.

Transformer protection RET670 1087

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 18 1MRK 504 164-UEN Rev. N
Logic

SMAGAPC
STARTCOMB BLOCK STDIR
PROTECTION 1 BLOCK STDIR STDIR1
START START STDIR2
FW FW STDIR3
REV REV STDIR4
STL1 STDIR5
FWL1 STDIR6 SMPPTRC
REVL1 STDIR7 BLOCK TRIP
STL2 STDIR8 BLKLKOUT TRL1
FWL2 STDIR9 TRIN TRL2
REVL2 STDIR10 TRINL1 TRL3
STL3 STDIR11 TRINL2 TR1P
FWL3 STDIR12 TRINL3 TR2P
REVL3 STDIR13 PSL1 TR3P
STN STDIR14 PSL2 CLLKOUT
FWN STDIR15 PSL3 START
REVN STDIR16 1PTRZ STL1
1PTREF STL2
P3PTR STL3
STARTCOMB SETLKOUT STN
BLOCK STDIR RSTLKOUT FW
START STDIR REV
FW
PROTECTION 2 REV
STL1 STL1
FWL1 FWL1
REVL1 REVL1
STL2 STL2
FWL2 FWL2
REVL2 REVL2
STL3 STL3
FWL3 FWL3
REVL3 REVL3
STN
FWN
REVN

STARTCOMB
BLOCK STDIR
START
FW
REV
STL1
FWL1
REVL1
STL2
FWL2
REVL2
STL3
PROTECTION 4
FWL3
-
PROTECTION 3 REVL3
STDIR
STN STN
-
FWN FWN
-
REVN REVN
IEC16000164-2-en.vsdx
IEC16000164 V2 EN-US

Figure 645: Connection example of protection functions using STARTCOMB, SMAGAPC to

SMPPTRC

18.3 Trip matrix logic TMAGAPC IP15121-1 v4

18.3.1 Identification
SEMOD167882-2 v3

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Trip matrix logic TMAGAPC - -

18.3.2 Functionality M15321-3 v14

The trip matrix logic (TMAGAPC) function is used to route trip signals and other logical output signals
to different output contacts on the IED.

1088 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 18
Logic

The trip matrix logic function has 3 output signals and these outputs can be connected to physical
tripping outputs according to the specific application needs for settable pulse or steady output.

18.3.3 Function block SEMOD54400-4 v6

TMAGAPC
BLOCK OUTPUT1
BLK1 OUTPUT2
BLK2 OUTPUT3
BLK3
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
INPUT17
INPUT18
INPUT19
INPUT20
INPUT21
INPUT22
INPUT23
INPUT24
INPUT25
INPUT26
INPUT27
INPUT28
INPUT29
INPUT30
INPUT31
INPUT32

IEC13000197-1-en.vsd
IEC13000197 V1 EN-US

Figure 646: TMAGAPC function block

18.3.4 Signals
PID-6513-INPUTSIGNALS v4

Table 728: TMAGAPC Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
BLK1 BOOLEAN 0 Block of output 1
BLK2 BOOLEAN 0 Block of output 2
BLK3 BOOLEAN 0 Block of output 3
INPUT1 BOOLEAN 0 Binary input 1
INPUT2 BOOLEAN 0 Binary input 2
INPUT3 BOOLEAN 0 Binary input 3
INPUT4 BOOLEAN 0 Binary input 4
INPUT5 BOOLEAN 0 Binary input 5
INPUT6 BOOLEAN 0 Binary input 6
INPUT7 BOOLEAN 0 Binary input 7
Table continues on next page

Transformer protection RET670 1089

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 18 1MRK 504 164-UEN Rev. N
Logic

Name Type Default Description

INPUT8 BOOLEAN 0 Binary input 8
INPUT9 BOOLEAN 0 Binary input 9
INPUT10 BOOLEAN 0 Binary input 10
INPUT11 BOOLEAN 0 Binary input 11
INPUT12 BOOLEAN 0 Binary input 12
INPUT13 BOOLEAN 0 Binary input 13
INPUT14 BOOLEAN 0 Binary input 14
INPUT15 BOOLEAN 0 Binary input 15
INPUT16 BOOLEAN 0 Binary input 16
INPUT17 BOOLEAN 0 Binary input 17
INPUT18 BOOLEAN 0 Binary input 18
INPUT19 BOOLEAN 0 Binary input 19
INPUT20 BOOLEAN 0 Binary input 20
INPUT21 BOOLEAN 0 Binary input 21
INPUT22 BOOLEAN 0 Binary input 22
INPUT23 BOOLEAN 0 Binary input 23
INPUT24 BOOLEAN 0 Binary input 24
INPUT25 BOOLEAN 0 Binary input 25
INPUT26 BOOLEAN 0 Binary input 26
INPUT27 BOOLEAN 0 Binary input 27
INPUT28 BOOLEAN 0 Binary input 28
INPUT29 BOOLEAN 0 Binary input 29
INPUT30 BOOLEAN 0 Binary input 30
INPUT31 BOOLEAN 0 Binary input 31
INPUT32 BOOLEAN 0 Binary input 32

PID-6513-OUTPUTSIGNALS v4

Table 729: TMAGAPC Output signals

Name Type Description

OUTPUT1 BOOLEAN OR function betweeen inputs 1 to 16
OUTPUT2 BOOLEAN OR function between inputs 17 to 32
OUTPUT3 BOOLEAN OR function between inputs 1 to 32

18.3.5 Settings
PID-6513-SETTINGS v4

Table 730: TMAGAPC Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On
PulseTime 0.050 - 60.000 s 0.001 0.150 Output pulse time
OnDelay 0.000 - 60.000 s 0.001 0.000 Output on delay time
OffDelay 0.000 - 60.000 s 0.001 0.000 Output off delay time
Table continues on next page

1090 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 18
Logic

Name Values (Range) Unit Step Default Description

ModeOutput1 Steady - - Steady Mode for output ,1 steady or pulsed
Pulsed
ModeOutput2 Steady - - Steady Mode for output 2, steady or pulsed
Pulsed
ModeOutput3 Steady - - Steady Mode for output 3, steady or pulsed
Pulsed

18.3.6 Operation principle SEMOD52537-5 v8

The trip matrix logic (TMAGAPC) block is provided with 32 input signals and 3 output signals. The
function block incorporates internal logic OR gates in order to provide grouping of connected input
signals to the three output signals from the function block.

Internal built-in OR logic is made in accordance with the following three rules:

1. when any one of first 16 inputs signals (INPUT1 to INPUT16) has logical value 1 the first output
signal (OUTPUT1) will get logical value 1.
2. when any one of second 16 inputs signals (INPUT17 to INPUT32) has logical value 1 the
second output signal (OUTPUT2) will get logical value 1.
3. when any one of all 32 input signals (INPUT1 to INPUT32) has logical value 1 the third output
signal (OUTPUT3) will get logical value 1.

By use of the settings ModeOutput1, ModeOutput2, ModeOutput3, PulseTime, OnDelay and

OffDelay the behavior of each output can be customized. The OnDelay is always active and will
delay the input to output transition by the set time. The ModeOutput for respective output decides
whether the output shall be steady with an drop-off delay as set by OffDelay or if it shall give a pulse
with duration set by PulseTime. Note that for pulsed operation and that the inputs are connected in
an OR-function, a new pulse will only be given on the output if all related inputs are reset and then
one is activated again. For steady operation the OffDelay will start when all related inputs have reset.
Detailed logical diagram is shown in figure 647

Transformer protection RET670 1091

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 18 1MRK 504 164-UEN Rev. N
Logic

PulseTime

t
&
ModeOutput1=Pulsed
INPUT 1
OUTPUT 1
Ondelay Offdelay
&
³1
³1 t t
INPUT 16

PulseTime

t
&
ModeOutput2=Pulsed

INPUT 17
OUTPUT 2
Ondelay Offdelay
&
³1
³1 t t
INPUT 32

PulseTime
t
&

ModeOutput3=Pulsed

OUTPUT 3
Ondelay Offdelay
&
³1
³1 t t

IEC09000612-3-en.vsd
IEC09000612 V3 EN-US

Figure 647: Trip matrix internal logic

Output signals from TMAGAPC are typically connected to other logic blocks or directly to output
contacts in the IED. When used for direct tripping of the circuit breaker(s) the pulse time shall be set
to at least 0.150 seconds in order to obtain satisfactory minimum duration of the trip pulse to the
circuit breaker trip coils.

18.3.7 Technical data

GUID-3AB1EE95-51BF-4CC4-99BD-F4ECDAACB75A v3

Table 731: Number of TMAGAPC instances

Function Quantity with cycle time

3 ms 8 ms 100 ms
TMAGAPC 6 6 -

18.4 Logic for group alarm ALMCALH GUID-64EA392C-950F-486C-8D96-6E7736B592BF v1

18.4.1 Identification GUID-64EA392C-950F-486C-8D96-6E7736B592BF v1

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Logic for group alarm ALMCALH - -

18.4.2 Functionality GUID-16E60E27-F7A8-416D-8648-8174AAC49BB5 v4

The group alarm logic function (ALMCALH) is used to route several alarm signals to a common
indication, LED and/or contact, in the IED.

1092 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 18
Logic

18.4.3 Function block GUID-EA192656-71DD-4D44-A1D5-96B1B4937971 v1

ALMCALH
BLOCK ALARM
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16

IEC13000181-1-en.vsd
IEC13000181 V1 EN-US

18.4.4 Signals
PID-6510-INPUTSIGNALS v5

Table 732: ALMCALH Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
INPUT1 BOOLEAN 0 Binary input 1
INPUT2 BOOLEAN 0 Binary input 2
INPUT3 BOOLEAN 0 Binary input 3
INPUT4 BOOLEAN 0 Binary input 4
INPUT5 BOOLEAN 0 Binary input 5
INPUT6 BOOLEAN 0 Binary input 6
INPUT7 BOOLEAN 0 Binary input 7
INPUT8 BOOLEAN 0 Binary input 8
INPUT9 BOOLEAN 0 Binary input 9
INPUT10 BOOLEAN 0 Binary input 10
INPUT11 BOOLEAN 0 Binary input 11
INPUT12 BOOLEAN 0 Binary input 12
INPUT13 BOOLEAN 0 Binary input 13
INPUT14 BOOLEAN 0 Binary input 14
INPUT15 BOOLEAN 0 Binary input 15
INPUT16 BOOLEAN 0 Binary input 16

PID-6510-OUTPUTSIGNALS v5

Table 733: ALMCALH Output signals

Name Type Description

ALARM BOOLEAN OR function betweeen inputs 1 to 16

Transformer protection RET670 1093

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 18 1MRK 504 164-UEN Rev. N
Logic

18.4.5 Settings
PID-6510-SETTINGS v5

Table 734: ALMCALH Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On

18.4.6 Operation principle GUID-0405BB7B-7EF7-4546-92CD-F703AA0DD9F4 v2

The logic for group alarm ALMCALH block is provided with 16 input signals and one ALARM output
signal. The function block incorporates internal logic OR gate in order to provide grouping of
connected input signals to the output ALARM signal from the function block.

When any one of 16 input signals (INPUT1 to INPUT16) has logical value 1, the ALARM output
signal will get logical value 1.

The function has a drop-off delay of 200 ms when all inputs are reset to provide a steady signal.

Input 1
200 ms
ALARM
³1 t
Input 16

IEC13000191-1-en.vsd
IEC13000191 V1 EN-US

Figure 648: Group alarm logic

18.4.7 Technical data

GUID-A05AF26F-DC98-4E62-B96B-E75D19F20767 v2

Table 735: Number of ALMCALH instances

Function Quantity with cycle time

3 ms 8 ms 100 ms
ALMCALH - - 5

18.5 Logic for group warning WRNCALH

18.5.1 Identification GUID-3EBD3D5B-F506-4557-88D7-DFC0BD21C690 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Logic for group warning WRNCALH - -

18.5.2 Functionality GUID-F7D9A012-3AD4-4D86-BE97-DF2A99BE5383 v4

The group warning logic function (WRNCALH) is used to route several warning signals to a common
indication, LED and/or contact, in the IED.

1094 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 18
Logic

18.5.3 Function block GUID-C909E4FB-3F7A-47F7-8988-36B159E2C7B2 v1

WRNCALH
BLOCK WARNING
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16

IEC13000182-1-en.vsd
IEC13000182 V1 EN-US

18.5.4 Signals
PID-4127-INPUTSIGNALS v3

Table 736: WRNCALH Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
INPUT1 BOOLEAN 0 Binary input 1
INPUT2 BOOLEAN 0 Binary input 2
INPUT3 BOOLEAN 0 Binary input 3
INPUT4 BOOLEAN 0 Binary input 4
INPUT5 BOOLEAN 0 Binary input 5
INPUT6 BOOLEAN 0 Binary input 6
INPUT7 BOOLEAN 0 Binary input 7
INPUT8 BOOLEAN 0 Binary input 8
INPUT9 BOOLEAN 0 Binary input 9
INPUT10 BOOLEAN 0 Binary input 10
INPUT11 BOOLEAN 0 Binary input 11
INPUT12 BOOLEAN 0 Binary input 12
INPUT13 BOOLEAN 0 Binary input 13
INPUT14 BOOLEAN 0 Binary input 14
INPUT15 BOOLEAN 0 Binary input 15
INPUT16 BOOLEAN 0 Binary input 16

PID-4127-OUTPUTSIGNALS v3

Table 737: WRNCALH Output signals

Name Type Description

WARNING BOOLEAN OR function betweeen inputs 1 to 16

Transformer protection RET670 1095

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 18 1MRK 504 164-UEN Rev. N
Logic

18.5.5 Settings
PID-4127-SETTINGS v3

Table 738: WRNCALH Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On

18.5.6 Operation principle GUID-71C65C20-7B6C-499F-BFCD-E418AA55F7EC v2

The logic for group warning WRNCALH block is provided with 16 input signals and 1 WARNING
output signal. The function block incorporates internal logic OR gate in order to provide grouping of
connected input signals to the output WARNING signal from the function block.

When any one of 16 input signals (INPUT1 to INPUT16) has logical value 1, the WARNING output
signal will get logical value 1.

The function has a drop-off delay of 200 ms when all inputs are reset to provide a steady signal.

INPUT1
200 ms
WARNING
³1 t
INPUT16

IEC13000192-1-en.vsd
IEC13000192 V1 EN-US

18.5.7 Technical data

GUID-70B7357D-F467-4CF5-9F73-641A82D334F5 v2

Table 739: Number of WRNCALH instances

Function Quantity with cycle time

3 ms 8 ms 100 ms
WRNCALH - - 5

18.6 Logic for group indication INDCALH

18.6.1 Identification GUID-3B5D4371-420D-4249-B6A4-5A168920D635 v4

Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Logic for group indication INDCALH - -

18.6.2 Functionality GUID-D8D1A4EE-A87F-46C6-8529-277FC1ADA9B0 v4

The group indication logic function (INDCALH) is used to route several indication signals to a
common indication, LED and/or contact, in the IED.

1096 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 18
Logic

18.6.3 Function block GUID-9D89E183-449A-4016-AB83-E57C8DDBA843 v1

INDCALH
BLOCK IND
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16

IEC13000183-1-en.vsd
IEC13000183 V1 EN-US

18.6.4 Signals
PID-4128-INPUTSIGNALS v4

Table 740: INDCALH Input signals

Name Type Default Description

BLOCK BOOLEAN 0 Block of function
INPUT1 BOOLEAN 0 Binary input 1
INPUT2 BOOLEAN 0 Binary input 2
INPUT3 BOOLEAN 0 Binary input 3
INPUT4 BOOLEAN 0 Binary input 4
INPUT5 BOOLEAN 0 Binary input 5
INPUT6 BOOLEAN 0 Binary input 6
INPUT7 BOOLEAN 0 Binary input 7
INPUT8 BOOLEAN 0 Binary input 8
INPUT9 BOOLEAN 0 Binary input 9
INPUT10 BOOLEAN 0 Binary input 10
INPUT11 BOOLEAN 0 Binary input 11
INPUT12 BOOLEAN 0 Binary input 12
INPUT13 BOOLEAN 0 Binary input 13
INPUT14 BOOLEAN 0 Binary input 14
INPUT15 BOOLEAN 0 Binary input 15
INPUT16 BOOLEAN 0 Binary input 16

PID-4128-OUTPUTSIGNALS v4

Table 741: INDCALH Output signals

Name Type Description

IND BOOLEAN OR function betweeen inputs 1 to 16

Transformer protection RET670 1097

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
Section 18 1MRK 504 164-UEN Rev. N
Logic

18.6.5 Settings
PID-4128-SETTINGS v4

Table 742: INDCALH Group settings (basic)

Name Values (Range) Unit Step Default Description

Operation Off - - Off Operation Off / On
On

18.6.6 Operation principle GUID-72B1B4E8-BC6C-4AF7-8B41-058241B944F8 v2

The logic for group indication INDCALH block is provided with 16 input signals and 1 IND output
signal. The function block incorporates internal logic OR gate in order to provide grouping of
connected input signals to the output IND signal from the function block.

When any one of 16 input signals (INPUT1 to INPUT16) has logical value 1, the IND output signal
will get logical value 1.

The function has a drop-off delay of 200 ms when all inputs are reset to provide a steady signal.

INPUT1
200 ms
IND
³1 t
INPUT16

IEC13000193-1-en.vsd
IEC13000193 V1 EN-US

18.6.7 Technical data

GUID-EAA43288-01A5-49CF-BF5B-9ABF6DC27D85 v2

Table 743: Number of INDCALH instances

Function Quantity with cycle time

3 ms 8 ms 100 ms
INDCALH - 5 -

18.7 Basic configurable logic blocks M11396-4 v20

The basic configurable logic blocks do not propagate the time stamp and quality of signals (have no
suffix QT at the end of their function name). A number of logic blocks and timers are always available
as basic for the user to adapt the configuration to the specific application needs. The list below
shows a summary of the function blocks and their features.

The logic blocks are available as a part of an extension logic package. The list below is a summary of
the function blocks and their features.

• AND function block. The AND function is used to form general combinatory expressions with
boolean variables. The AND function block has up to four inputs and two outputs. One of the
outputs is inverted.

• GATE function block is used for whether or not a signal should be able to pass from the input to
the output.

• INVERTER function block that inverts the input signal to the output.

1098 Transformer protection RET670

Technical manual
© 2017 - 2021 Hitachi Power Grids. All rights reserved
1MRK 504 164-UEN Rev. N Section 18
Logic

• LLD function block. Loop delay used to delay the output signal one execution cycle.

• OR function block. The OR function is used to form general combinatory expressions with
boolean variables. The OR function block has up to six inputs and two outputs. One of the
outputs is inverted.

• PULSETIMER function block can be used, for example, for pulse extensions or limiting of
operation of o