1

Cover Sheet
02 FM2 DDR3 I/F
MS-7721 Ver:2.3
CPU: On Board Chipset: Expansion Slots:
03 FM2 PCIE I/F
AMD FM2 LPC Super I/O --F71868AD PCI Express X16 Slot * 1
04 FM2 DISPLAY/MSIC LAN-Realtek 8111E
System Chipset: PCI Express X1 Slot * 1
05 FM2 POWER/GND Azalia CODEC - Realtek ALC887 PCI Slot * 1
AMD - Hudson D2 A55
06,07 DDR3 DIMM CH-A CH-B Main Memory:
VRM
HUDSON 08,09,10,11,12 Controller - ISL6277 3+2 DDR III * 2 MAX:16 GB
13 PCIE X16 SLOT & X1 SLOT
14 PCI SLOTs FUSION BLOCK DIAGRAM
DP 1
15 SUPER I/O F71868
100MHZ DDRIII 1333~1866 CHA UNBUFFERED
16 LAN RTL8111E/81105E FM2 DDRIII DIMM1
HDMI CON DP0

17 AUDIO ALC887/VT1708S 33MHZ

PCIE x16 GEN2 PCIE x16 DDRIII 1333~1866 CHB UNBUFFERED
18 USB2.0 CONN DDRIII DIMM2

PCIE INTERFACE
19 HDMI CONNECTOR
100MHZ 33MHZ
20 VGA CONNECTOR & FAN 10/100/Giga bit
ETHERNET PCIE x1 SLOT1,2
8105EL/8111EL
A A

21 LPT/COM/PS2 UMI GEN2

22 ACPI UPI & SYS POWER

USB
REAR USB 2.0
23,24 CPU power-1 AZALIA ALC887/892

25 CPU_VDD1_2/NB 1.1V/VDDA2.5V HUDSON 2

USB
FRONT USB 2.0 A55
SERIAL ATA 3.0 SATA [6:1]
26 DDR POWER
100MHZ
VGA CONNECTOR

27 ATX & Front Panel

33MHZ
PCI SLOT AD[31..0]
28 BOM OPTION
29 History
SPI ROM 32M SPI Bus

CPU CORE POWER

ACPI CONTROLLER NB CORE POWER
ISL6277
ATX CON

SUPER I/O F71868

CPU_VDDR1_2
DDR3 DRAM POWER CPU VDDA Power
FCH CORE POWER DUAL POWER

MICRO-START INT'L CO.,LTD.

Title
KBD SERIAL COVER SHEET
SHEETci203
MOUSE PORT Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 1 of 33
1
 5 4 3 2 1

FM1DDR3 I/F
6 MEM_MA_DQS_L[7..0]

6 MEM_MA_DQS_H[7..0]
MEM_MA_DATA[63..0] 6
CPU1B
6 MEM_MA_DM[7..0] MEM_MB_DATA[63..0] 7
CPU1C
MEM_MA_ADD0 V27 F16 MEM_MA_DATA0 MEMORY CHANNEL B
MEM_MA_ADD1 MA_ADD0 MA_DATA0 MEM_MA_DATA1 MEM_MB_ADD0 MEM_MB_DATA0
P27 MA_ADD1 MA_DATA1 G16 V31 MB_ADD0 MB_DATA0 A16
D MEM_MA_ADD2 R25 H18 MEM_MA_DATA2 MEM_MB_ADD1 N28 C16 MEM_MB_DATA1 D
MEM_MA_ADD3 MA_ADD2 MA_DATA2 MEM_MA_DATA3 MEM_MB_ADD2 MB_ADD1 MB_DATA1 MEM_MB_DATA2
P26 MA_ADD3 MA_DATA3 F19 7 MEM_MB_DQS_L[7..0] P29 MB_ADD2 MB_DATA2 B18
MEM_MA_ADD4 R24 F15 MEM_MA_DATA4 MEM_MB_ADD3 N29 A19 MEM_MB_DATA3
MEM_MA_ADD5 MA_ADD4 MA_DATA4 MEM_MA_DATA5 MEM_MB_ADD4 MB_ADD3 MB_DATA3 MEM_MB_DATA4
P24 MA_ADD5 MA_DATA5 H15 7 MEM_MB_DQS_H[7..0] N31 MB_ADD4 MB_DATA4 C15
MEM_MA_ADD6 P23 E18 MEM_MA_DATA6 MEM_MB_ADD5 M30 B15 MEM_MB_DATA5
MEM_MA_ADD7 MA_ADD6 MA_DATA6 MEM_MA_DATA7 MEM_MB_ADD6 MB_ADD5 MB_DATA5 MEM_MB_DATA6
N26 MA_ADD7 MA_DATA7 F18 7 MEM_MB_DM[7..0] M31 MB_ADD6 MB_DATA6 D17
MEM_MA_ADD8 N23 MEM_MB_ADD7 M28 C18 MEM_MB_DATA7
MEM_MA_ADD9 MA_ADD8 MEM_MA_DATA8 MEM_MB_ADD8 MB_ADD7 MB_DATA7
M25 MA_ADD9 MA_DATA8 G20 M27 MB_ADD8
MEM_MA_ADD10 V24 H20 MEM_MA_DATA9 MEM_MB_ADD9 L30 D20 MEM_MB_DATA8
MEM_MA_ADD11 MA_ADD10 MA_DATA9 MEM_MA_DATA10 MEM_MB_ADD10 MB_ADD9 MB_DATA8 MEM_MB_DATA9
N25 MA_ADD11 MA_DATA10 E23 W31 MB_ADD10 MB_DATA9 A20
MEM_MA_ADD12 M24 G23 MEM_MA_DATA11 MEM_MB_ADD11 L29 D22 MEM_MB_DATA10
MEM_MA_ADD13 MA_ADD12 MA_DATA11 MEM_MA_DATA12 MEM_MB_ADD12 MB_ADD11 MB_DATA10 MEM_MB_DATA11
Y23 MA_ADD13 MA_DATA12 G19 K28 MB_ADD12 MB_DATA11 D23
MEM_MA_ADD14 L27 E20 MEM_MA_DATA13 MEM_MB_ADD13 AB28 C19 MEM_MB_DATA12
6 MEM_MA_ADD[15..0] MA_ADD14 MA_DATA13 MB_ADD13 MB_DATA12
MEM_MA_ADD15 L24 F22 MEM_MA_DATA14 MEM_MB_ADD14 K31 D19 MEM_MB_DATA13
MA_ADD15 MA_DATA14 7 MEM_MB_ADD[15..0] MB_ADD14 MB_DATA13
G22 MEM_MA_DATA15 MEM_MB_ADD15 J31 A22 MEM_MB_DATA14
MEM_MA_BANK0 MA_DATA15 MB_ADD15 MB_DATA14 MEM_MB_DATA15
6 MEM_MA_BANK0 W26 MA_BANK0 MB_DATA15 C22
MEM_MA_BANK1 V25 F24 MEM_MA_DATA16 MEM_MB_BANK0 W29
6 MEM_MA_BANK1 MA_BANK1 MA_DATA16 7 MEM_MB_BANK0 MB_BANK0
MEM_MA_BANK2 L26 H24 MEM_MA_DATA17 MEM_MB_BANK1 V30 C24 MEM_MB_DATA16
6 MEM_MA_BANK2 MA_BANK2 MA_DATA17 7 MEM_MB_BANK1 MB_BANK1 MB_DATA16
E27 MEM_MA_DATA18 MEM_MB_BANK2 K29 B24 MEM_MB_DATA17
MA_DATA18 7 MEM_MB_BANK2 MB_BANK2 MB_DATA17
MEM_MA_DM0 E17 F27 MEM_MA_DATA19 B26 MEM_MB_DATA18
MEM_MA_DM1 MA_DM0 MA_DATA19 MEM_MA_DATA20 MEM_MB_DM0 MB_DATA18 MEM_MB_DATA19
H21 MA_DM1 MA_DATA20 H23 D16 MB_DM0 MB_DATA19 C27
MEM_MA_DM2 F25 E24 MEM_MA_DATA21 MEM_MB_DM1 B20 A23 MEM_MB_DATA20
MEM_MA_DM3 MA_DM2 MA_DATA21 MEM_MA_DATA22 MEM_MB_DM2 MB_DM1 MB_DATA20 MEM_MB_DATA21
G29 MA_DM3 MA_DATA22 E26 A25 MB_DM2 MB_DATA21 B23
MEM_MA_DM4 AF29 H26 MEM_MA_DATA23 MEM_MB_DM3 D29 D26 MEM_MB_DATA22
MEM_MA_DM5 MA_DM4 MA_DATA23 MEM_MB_DM4 MB_DM3 MB_DATA22 MEM_MB_DATA23
AE25 MA_DM5 AL29 MB_DM4 MB_DATA23 A26
MEM_MA_DM6 AG21 G28 MEM_MA_DATA24 MEM_MB_DM5 AH25
MEM_MA_DM7 MA_DM6 MA_DATA24 MEM_MA_DATA25 MEM_MB_DM6 MB_DM5 MEM_MB_DATA24
AF17 MA_DM7 MA_DATA25 E29 AK21 MB_DM6 MB_DATA24 C28
H29 MEM_MA_DATA26 MEM_MB_DM7 AJ17 D28 MEM_MB_DATA25
MA_DATA26 MEM_MA_DATA27 MB_DM7 MB_DATA25 MEM_MB_DATA26
MA_DATA27 H30 MB_DATA26 C31
MEM_MA_DQS_H0 H17 H27 MEM_MA_DATA28 D31 MEM_MB_DATA27
MEM_MA_DQS_L0 MA_DQS_H0 MA_DATA28 MEM_MA_DATA29 MEM_MB_DQS_H0 MB_DATA27 MEM_MB_DATA28
G17 MA_DQS_L0 MA_DATA29 F28 A17 MB_DQS_H0 MB_DATA28 B27
C MEM_MA_DQS_H1 F21 F31 MEM_MA_DATA30 MEM_MB_DQS_L0 B17 A28 MEM_MB_DATA29 C
MEM_MA_DQS_L1 MA_DQS_H1 MA_DATA30 MEM_MA_DATA31 MEM_MB_DQS_H1 MB_DQS_L0 MB_DATA29 MEM_MB_DATA30
E21 MA_DQS_L1 MA_DATA31 G31 B21 MB_DQS_H1 MB_DATA30 B30
MEM_MA_DQS_H2 G26 MEM_MB_DQS_L1 C21 C30 MEM_MB_DATA31
MEM_MA_DQS_L2 MA_DQS_H2 MB_DQS_L1 MB_DATA31
G25 MA_DQS_L2 MA_DATA32 AD30 MEM_MA_DATA32 MEM_MB_DQS_H2 D25 MB_DQS_H2
MEM_MA_DQS_H3 F30 AF30 MEM_MA_DATA33 MEM_MB_DQS_L2 C25 AJ30 MEM_MB_DATA32
MEM_MA_DQS_L3 MA_DQS_H3 MA_DATA33 MB_DQS_L2 MB_DATA32
E30 MA_DQS_L3 MA_DATA34 AG27 MEM_MA_DATA34 MEM_MB_DQS_H3 B29 MB_DQS_H3 MB_DATA33 AK30 MEM_MB_DATA33
MEM_MA_DQS_H4 AE28 AF27 MEM_MA_DATA35 MEM_MB_DQS_L3 A29 AH28 MEM_MB_DATA34
MEM_MA_DQS_L4 MA_DQS_H4 MA_DATA35 MB_DQS_L3 MB_DATA34
AE29 MA_DQS_L4 MA_DATA36 AD31 MEM_MA_DATA36 MEM_MB_DQS_H4 AJ29 MB_DQS_H4 MB_DATA35 AJ27 MEM_MB_DATA35
MEM_MA_DQS_H5 AG24 AE31 MEM_MA_DATA37 MEM_MB_DQS_L4 AH29 AG30 MEM_MB_DATA36
MEM_MA_DQS_L5 MA_DQS_H5 MA_DATA37 MB_DQS_L4 MB_DATA36
AG25 MA_DQS_L5 MA_DATA38 AG28 MEM_MA_DATA38 MEM_MB_DQS_H5 AK25 MB_DQS_H5 MB_DATA37 AH31 MEM_MB_DATA37
MEM_MA_DQS_H6 AF20 AD28 MEM_MA_DATA39 MEM_MB_DQS_L5 AL25 AK28 MEM_MB_DATA38
MEM_MA_DQS_L6 MA_DQS_H6 MA_DATA39 MEM_MB_DQS_H6 MB_DQS_L5 MB_DATA38
AF21 MA_DQS_L6 AJ20 MB_DQS_H6 MB_DATA39 AL28 MEM_MB_DATA39
MEM_MA_DQS_H7 AE16 AF26 MEM_MA_DATA40 MEM_MB_DQS_L6 AJ21
MEM_MA_DQS_L7 MA_DQS_H7 MA_DATA40 MB_DQS_L6
AD16 MA_DQS_L7 MA_DATA41 AD25 MEM_MA_DATA41 MEM_MB_DQS_H7 AL16 MB_DQS_H7 MB_DATA40 AJ26 MEM_MB_DATA40
MA_DATA42 AF23 MEM_MA_DATA42 MEM_MB_DQS_L7 AL17 MB_DQS_L7 MB_DATA41 AH26 MEM_MB_DATA41
CLOCK assignment can be changed AE23 MEM_MA_DATA43 AH23 MEM_MB_DATA42
MA_DATA43 MB_DATA42
MA_DATA44 AD27 MEM_MA_DATA44 MB_DATA43 AJ23 MEM_MB_DATA43
MEM_MA_CLK_H0 U27 AE26 MEM_MA_DATA45 AK27 MEM_MB_DATA44
6 MEM_MA_CLK_H0 MA_CLK_H0 MA_DATA45 MB_DATA44
MEM_MA_CLK_L0 U26 AF24 MEM_MA_DATA46 MEM_MB_CLK_H0 U30 AL26 MEM_MB_DATA45
6 MEM_MA_CLK_L0 MA_CLK_L0 MA_DATA46 7 MEM_MB_CLK_H0 MB_CLK_H0 MB_DATA45
T23 MA_CLK_H1 MA_DATA47 AD24 MEM_MA_DATA47 7 MEM_MB_CLK_L0
MEM_MB_CLK_L0 U29 MB_CLK_L0 MB_DATA46 AJ24 MEM_MB_DATA46
U23 MA_CLK_L1 T29 MB_CLK_H1 MB_DATA47 AK24 MEM_MB_DATA47
T25 MA_CLK_H2 MA_DATA48 AG22 MEM_MA_DATA48 T28 MB_CLK_L1
T26 MA_CLK_L2 MA_DATA49 AD21 MEM_MA_DATA49 R31 MB_CLK_H2 MB_DATA48 AK22 MEM_MB_DATA48
MEM_MA_CLK_H3 R27 AE19 MEM_MA_DATA50 T31 AH22 MEM_MB_DATA49
6 MEM_MA_CLK_H3 MA_CLK_H3 MA_DATA50 MB_CLK_L2 MB_DATA49
MEM_MA_CLK_L3 R28 AG19 MEM_MA_DATA51 MEM_MB_CLK_H3 P30 AL19 MEM_MB_DATA50
6 MEM_MA_CLK_L3 MA_CLK_L3 MA_DATA51 7 MEM_MB_CLK_H3 MB_CLK_H3 MB_DATA50
MA_DATA52 AD22 MEM_MA_DATA52 7 MEM_MB_CLK_L3
MEM_MB_CLK_L3 R30 MB_CLK_L3 MB_DATA51 AK19 MEM_MB_DATA51
MEM_MA_CKE0 L23 AE22 MEM_MA_DATA53 AL23 MEM_MB_DATA52
6 MEM_MA_CKE0 MA_CKE0 MA_DATA53 MB_DATA52
MEM_MA_CKE1 K26 AE20 MEM_MA_DATA54 MEM_MB_CKE0 J30 AL22 MEM_MB_DATA53
6 MEM_MA_CKE1 MA_CKE1 MA_DATA54 7 MEM_MB_CKE0 MB_CKE0 MB_DATA53
MA_DATA55 AD19 MEM_MA_DATA55 7 MEM_MB_CKE1
MEM_MB_CKE1 J28 MB_CKE1 MB_DATA54 AH20 MEM_MB_DATA54
AA24 MA0_ODT0 MB_DATA55 AL20 MEM_MB_DATA55
AC27 MA0_ODT1 MA_DATA56 AG18 MEM_MA_DATA56 AA30 MB0_ODT0
B MEM_MA1_ODT0 B
6 MEM_MA1_ODT0 AA25 MA1_ODT0 MA_DATA57 AE17 MEM_MA_DATA57 AC30 MB0_ODT1 MB_DATA56 AJ18 MEM_MB_DATA56
MEM_MA1_ODT1 AC26 AF15 MEM_MA_DATA58 MEM_MB1_ODT0 AA31 AH17 MEM_MB_DATA57
6 MEM_MA1_ODT1 MA1_ODT1 MA_DATA58 7 MEM_MB1_ODT0 MB1_ODT0 MB_DATA57
MA_DATA59 AG15 MEM_MA_DATA59 7 MEM_MB1_ODT1
MEM_MB1_ODT1 AC29 MB1_ODT1 MB_DATA58 AJ15 MEM_MB_DATA58
Y27 MA0_CS_L0 MA_DATA60 AD18 MEM_MA_DATA60 MB_DATA59 AK15 MEM_MB_DATA59
AB26 MA0_CS_L1 MA_DATA61 AF18 MEM_MA_DATA61 Y29 MB0_CS_L0 MB_DATA60 AH19 MEM_MB_DATA60
MEM_MA1_CS_L0 W23 AG16 MEM_MA_DATA62 AB29 AK18 MEM_MB_DATA61
6 MEM_MA1_CS_L0 MA1_CS_L0 MA_DATA62 MB0_CS_L1 MB_DATA61
MEM_MA1_CS_L1 AB25 AD15 MEM_MA_DATA63 MEM_MB1_CS_L0 Y30 AK16 MEM_MB_DATA62
6 MEM_MA1_CS_L1 MA1_CS_L1 MA_DATA63 7 MEM_MB1_CS_L0 MB1_CS_L0 MB_DATA62
MEM_MB1_CS_L1 AB31 AH16 MEM_MB_DATA63
7 MEM_MB1_CS_L1 MB1_CS_L1 MB_DATA63
MEM_MA_RAS_L W25
6 MEM_MA_RAS_L MA_RAS_L
MEM_MA_CAS_L Y24 MEM_MB_RAS_L W28
6 MEM_MA_CAS_L MA_CAS_L 7 MEM_MB_RAS_L MB_RAS_L
MEM_MA_WE_L Y26 MEM_MB_CAS_L AA27
6 MEM_MA_WE_L MA_WE_L 7 MEM_MB_CAS_L MB_CAS_L
MEM_MB_WE_L AA28
7 MEM_MB_WE_L MB_WE_L
MEM_MA_RESET# J25
6 MEM_MA_RESET# MA_RESET_L
MEM_MA_HOT# U24 MEM_MB_RESET# J27
6 MEM_MA_HOT# MA_EVENT_L 7 MEM_MB_RESET# MB_RESET_L
MEM_MB_HOT# V28
7 MEM_MB_HOT# MB_EVENT_L
APU_M_VREF K22 M_VREF

VCC_DDR R564 39.2R1% APU_M_ZVDIO J24 M_ZVDDIO

Layout: N12-9040020-F02
Place within 1.0'' of APU
UDIMM A1 UDIMM B1
N12-9040020-F02
MA_CLK_H/L[3] CK1/CK1# MB_CLK_H/L[3] CK1/CK1#
VCC_DDR
MA_CLK_H/L[0] CK0/CK0# MB_CLK_H/L[0] CK0/CK0#

APU_M_VREF VCC_DDR MA1_CS_L[1:0] S1#:S0# MB1_CS_L[1:0] S1#:S0#

R294 R303 1K MEM_MA_HOT# MA1_ODT[1:0] ODT[1:0] MB1_ODT[1:0] ODT[1:0]

A
C153 R304 1K MEM_MB_HOT# A
1K1% C0.1u10X

R293
C537
1K1% C151
C0.1u10X
C1000P16X
MICRO-START INT'L CO.,LTD.
Layout: Title
Place within 1.5'' of APU
FM2 DDR3 I/F
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 2 of 33
5 4 3 2 1
 5 4 3 2 1

D D

FM2 PCIE I/F

CPU1A
PCI EXPRESS
AD8 AC2 GFX_TX0P
13 GFX_RX0P P_GFX_RXP0 P_GFX_TXP0 GFX_TX0P 13
AD9 AC1 GFX_TX0N
13 GFX_RX0N P_GFX_RXN0 P_GFX_TXN0 GFX_TX0N 13
AC7 AC4 GFX_TX1P
13 GFX_RX1P P_GFX_RXP1 P_GFX_TXP1 GFX_TX1P 13
AC8 AC5 GFX_TX1N
13 GFX_RX1N P_GFX_RXN1 P_GFX_TXN1 GFX_TX1N 13
AB5 AB2 GFX_TX2P
13 GFX_RX2P P_GFX_RXP2 P_GFX_TXP2 GFX_TX2P 13
AB6 AB3 GFX_TX2N
13 GFX_RX2N P_GFX_RXN2 P_GFX_TXN2 GFX_TX2N 13
AB8 AA2 GFX_TX3P
13 GFX_RX3P P_GFX_RXP3 P_GFX_TXP3 GFX_TX3P 13
AB9 AA1 GFX_TX3N
13 GFX_RX3N P_GFX_RXN3 P_GFX_TXN3 GFX_TX3N 13
AA7 AA4 GFX_TX4P
13 GFX_RX4P P_GFX_RXP4 P_GFX_TXP4 GFX_TX4P 13
AA8 AA5 GFX_TX4N
13 GFX_RX4N P_GFX_RXN4 P_GFX_TXN4 GFX_TX4N 13
Y5 Y2 GFX_TX5P
13 GFX_RX5P P_GFX_RXP5 P_GFX_TXP5 GFX_TX5P 13
Y6 Y3 GFX_TX5N
13 GFX_RX5N P_GFX_RXN5 P_GFX_TXN5 GFX_TX5N 13
Y8 W2 GFX_TX6P
13 GFX_RX6P P_GFX_RXP6 P_GFX_TXP6 GFX_TX6P 13
GFX_TX6N

GRAPHICS
13 GFX_RX6N Y9 P_GFX_RXN6 P_GFX_TXN6 W1 GFX_TX6N 13
W7 W4 GFX_TX7P
13 GFX_RX7P P_GFX_RXP7 P_GFX_TXP7 GFX_TX7P 13
W8 W5 GFX_TX7N
13 GFX_RX7N P_GFX_RXN7 P_GFX_TXN7 GFX_TX7N 13
C V5 V2 GFX_TX8P C
13 GFX_RX8P P_GFX_RXP8 P_GFX_TXP8 GFX_TX8P 13
V6 V3 GFX_TX8N
13 GFX_RX8N P_GFX_RXN8 P_GFX_TXN8 GFX_TX8N 13
V8 U2 GFX_TX9P
13 GFX_RX9P P_GFX_RXP9 P_GFX_TXP9 GFX_TX9P 13
V9 U1 GFX_TX9N
13 GFX_RX9N P_GFX_RXN9 P_GFX_TXN9 GFX_TX9N 13
U7 U4 GFX_TX10P
13 GFX_RX10P P_GFX_RXP10 P_GFX_TXP10 GFX_TX10P 13
U8 U5 GFX_TX10N
13 GFX_RX10N P_GFX_RXN10 P_GFX_TXN10 GFX_TX10N 13
T5 T2 GFX_TX11P
13 GFX_RX11P P_GFX_RXP11 P_GFX_TXP11 GFX_TX11P 13
T6 T3 GFX_TX11N
13 GFX_RX11N P_GFX_RXN11 P_GFX_TXN11 GFX_TX11N 13
T8 R2 GFX_TX12P
13 GFX_RX12P P_GFX_RXP12 P_GFX_TXP12 GFX_TX12P 13
T9 R1 GFX_TX12N
13 GFX_RX12N P_GFX_RXN12 P_GFX_TXN12 GFX_TX12N 13
R7 R4 GFX_TX13P
13 GFX_RX13P P_GFX_RXP13 P_GFX_TXP13 GFX_TX13P 13
R8 R5 GFX_TX13N
13 GFX_RX13N P_GFX_RXN13 P_GFX_TXN13 GFX_TX13N 13
P5 P2 GFX_TX14P
13 GFX_RX14P P_GFX_RXP14 P_GFX_TXP14 GFX_TX14P 13
P6 P3 GFX_TX14N
13 GFX_RX14N P_GFX_RXN14 P_GFX_TXN14 GFX_TX14N 13
P8 N2 GFX_TX15P
13 GFX_RX15P P_GFX_RXP15 P_GFX_TXP15 GFX_TX15P 13
P9 N1 GFX_TX15N
13 GFX_RX15N P_GFX_RXN15 P_GFX_TXN15 GFX_TX15N 13
PE_LAN_RXP AF5 AF2 LAN_TXP C239 C0.1u10X
16 PE_LAN_RXP P_GPP_RXP0 P_GPP_TXP0 PE_LAN_TXP 16
PE_LAN_RXN AF6 AF3 LAN_TXN C238 C0.1u10X
16 PE_LAN_RXN P_GPP_RXN0 P_GPP_TXN0 PE_LAN_TXN 16
AF8 AE2 APU_GPP_TX0P_C C219 C0.1u10X APU_GPP_TX0P 13
13 APU_GPP_RX0P P_GPP_RXP1 P_GPP_TXP1
AF9 AE1 APU_GPP_TX0N_C C220 C0.1u10X APU_GPP_TX0N 13
13 APU_GPP_RX0N P_GPP_RXN1 P_GPP_TXN1
AE7 P_GPP_RXP2 P_GPP_TXP2 AE4

GPP
AE8 P_GPP_RXN2 P_GPP_TXN2 AE5
AD5 P_GPP_RXP3 P_GPP_TXP3 AD2
AD6 P_GPP_RXN3 P_GPP_TXN3 AD3
connect to FCH
AJ8 AJ5 UMI_TX0P_APU C248 C0.1u10X
8 UMI_RX0P P_UMI_RXP0 P_UMI_TXP0 UMI_TX0P 8
AJ7 AJ4 UMI_TX0N_APU C247 C0.1u10X
8 UMI_RX0N P_UMI_RXN0 P_UMI_TXN0 UMI_TX0N 8
AH6 AH3 UMI_TX1P_APU C234 C0.1u10X
8 UMI_RX1P P_UMI_RXP1 P_UMI_TXP1 UMI_TX1P 8
AH5 AH2 UMI_TX1N_APU C233 C0.1u10X
8 UMI_RX1N P_UMI_RXN1 P_UMI_TXN1 UMI_TX1N 8
AH9 AG1 UMI_TX2P_APU C221 C0.1u10X
8 UMI_RX2P UMI_TX2P 8
UMI
B P_UMI_RXP2 P_UMI_TXP2 UMI_TX2N_APU C222 C0.1u10X B
8 UMI_RX2N AH8 P_UMI_RXN2 P_UMI_TXN2 AG2 UMI_TX2N 8
AG8 AG5 UMI_TX3P_APU C244 C0.1u10X
8 UMI_RX3P P_UMI_RXP3 P_UMI_TXP3 UMI_TX3P 8
AG7 AG4 UMI_TX3N_APU C243 C0.1u10X
8 UMI_RX3N P_UMI_RXN3 P_UMI_TXN3 UMI_TX3N 8
R324 196R1% APU_P_ZVDDP AJ2 AJ1 APU_P_ZVSS R323 196R1% connect to FCH
CPU_VDD1_2 P_ZVDDP P_ZVSS
0603 change footprint 0402 0603 change footprint 0402
N12-9040020-F02
85ohm +/-10%
the CAP need over 500mil from the cpu PIN

A A

MICRO-START INT'L CO.,LTD.

Title
FM2 PCIE I/F
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 3 of 33
5 4 3 2 1
 5 4 3 2 1

CPU1D
ANALOG/DISPLAY/MISC Layout: Place within 1.5'' of APU
DP0_TX0P_APU N4 G9 DP_AUX_ZVSS R265 150R1%
For HDMI 19 DP0_TX0P_APU DP0_TX0N_APU N5
DP0_TXP0 DP_AUX_ZVSS
19 DP0_TX0N_APU DP0_TXN0
DP_BLON F8
DP0_TX1P_APU M2 G8
19 DP0_TX1P_APU DP0_TX1N_APU DP0_TXP1 DP_DIGON
19 DP0_TX1N_APU M3 DP0_TXN1 DP_VARY_BL E8

DP0_TX2P_APU L2 E1 DP0_AUXP clock For HDMI

DP0_AUXP 19

DISPLAY PORT 0
19 DP0_TX2P_APU DP0_TX2N_APU DP0_TXP2 DP0_AUXP DP0_AUXN data
19 DP0_TX2N_APU L1 DP0_TXN2 DP0_AUXN E2 DP0_AUXN 19
DP0_TX3P_APU L4 F1 DP1_AUXP C154 C0.1u16X AUX_VGA_CH_P_C 10 For VGA
19 DP0_TX3P_APU DP0_TX3N_APU DP0_TXP3 DP1_AUXP DP1_AUXN C150 C0.1u16X
D
19 DP0_TX3N_APU L5 DP0_TXN3 DP1_AUXN F2 AUX_VGA_CH_N_C 10 D

DISPLAY PORT MISC.

C175 C0.1u10X DP1_TX0P_APU DP1_AUXP R296 1.8K
For VGA 10 DP1_TX0P
C177 C0.1u10X DP1_TX0N_APU
K2
K3
DP1_TXP0 DP2_AUXP G1
G2 DP1_AUXN R292 1.8K
10 DP1_TX0N DP1_TXN0 DP2_AUXN
C164 C0.1u10X DP1_TX1P_APU J2 E5
10 DP1_TX1P DP1_TXP1 DP3_AUXP
C166 C0.1u10X DP1_TX1N_APU J1 E6
10 DP1_TX1N DP1_TXN1 DP3_AUXN
C174 C0.1u10X DP1_TX2P_APU J4 F5
10 DP1_TX2P

DISPLAY PORT 1
C176 C0.1u10X DP1_TX2N_APU DP1_TXP2 DP4_AUXP
10 DP1_TX2N J5 DP1_TXN2 DP4_AUXN F6

C165 C0.1u10X DP1_TX3P_APU H2 G5

10 DP1_TX3P DP1_TXP3 DP5_AUXP
C163 C0.1u10X DP1_TX3N_APU H3 G6
10 DP1_TX3N DP1_TXN3 DP5_AUXN
L7 E3 DP0_HPD DP0_HPD 19 For HDMI
DP2_TXP0 DP0_HPD DP1_VGA_HPD
L8 DP2_TXN0 DP1_HPD F3 DP1_VGA_HPD 10 For VGA
G3 DP2_HPD 1 2
DP2_HPD DP3_HPD 3
K5 DP2_TXP1 DP3_HPD E7 4
K6 F7 DP4_HPD 5 6
DP2_TXN1 DP4_HPD DP5_HPD 7
DP5_HPD G7 8
K8 DP2_TXP2
K9 T21 RN43
DP2_TXN2 TEST4 8P4R-100K
TEST5 U21
J7 DP2_TXP3 TEST6 AD14
J8 DP2_TXN3 TEST9 P21
TEST10 R21

DISPLAY PORT 2
N7 DP2_TXP4 TEST14 F12
N8 DP2_TXN4 TEST15 E12
F13 RN44
TEST16 8P4R-1K
M5 DP2_TXP5 TEST17 E13
M6 G13 APU_TEST18 1 2

TEST
C DP2_TXN5 TEST18 APU_TEST19 C
TEST19 G14 3 4
M8 F14 APU_TEST20 5 6
DP2_TXP6 TEST20 APU_TEST24
M9 DP2_TXN6 TEST24 E14 7 8 Komodo FM2 CPU
AJ11 APU_TEST25_H R319 511R1%
TEST25_H APU_TEST25_L R337 511R1%
TEST25_L AH11 CPU_VDD1_2
8 APU_CLK AL12 CLKIN_H TEST28_H H10
AK12 J10 VCC_DDR

CLK
8 APU_CLK# CLKIN_L TEST28_L
T22 APU_TEST30_H TP54 IB=(Vcc_DDR-Vbe)/10k
TEST30_H
8 DISP_CLK AG12 DISP_CLKIN_H TEST30_L U22 APU_TEST30_L TP55 For HDMI (1.5-0.95)/10K=0.055mA
AF12 AG31 APU_TEST31 R311 39.2R1%
8 DISP_CLK# DISP_CLKIN_L TEST31
V22 APU_TEST32_H TP36 Test35 use HDMI need pull high vccddr 300R R241
APU_SVC TEST32_H APU_TEST32L TP32
23 APU_SVC C1 SVC TEST32_L R22 X_10K
APU_SVD C2 AE14 APU_TEST35 R320 X_300R
23 APU_SVD SVD TEST35
APU_SVT D1 R322 300R VCC_DDR
23 APU_SVT

B
SVT

SER.
AC10 APU_FM2R1
FM2R1 APU_FM2R1 23,25,26
APU_SIC AK14 AG14 FCH_DMA_ACTIVE# FCH_DMA_ACTIVE# 8
15 APU_SIC SIC DMAACTIVE_L

MISC
APU_SID AL14 AD10 LDTSTOP_L LDTSTOP_L 8 IDLEEXIT_L E C
15 APU_SID SID LDTSTOP_L FCH_IDLEEXIT_L 9
G12 IDLEEXIT_L Q29 X_N-SST3904
APU_RST# BP5/IDLEEXIT_L VCC_DDR
8 APU_RST# AF10 RESET_L CORETYPE F9
8,23 APU_PWRGD
APU_PWRGD AF14 IC=(Vcc3-Vce)/10k
PWROK
RSVD1 AJ13 (3.3-0.2)/10K=0.31mA
AE10 AH13 LDTSTOP_L R327 1K

CTRL
8,15 PROCHOT# PROCHOT_L RSVD2
APU_THERMTRIP# AH14 AD12 IDLEEXIT_L R262 1K
APU_ALERT# THERMTRIP_L RSVD3
AJ14 ALERT_L RSVD4 K23

RSVD
RSVD5 K25
VCC_DDR CPU_TDI G11 AB23
TP3 CPU_TDO TDI RSVD6
E10 TDO RSVD7 AC24
IB=(Vcc_DDR-Vbe)/10k CPU_TCK E11 AG10
TCK RSVD8
(1.5-0.95)/10k=0.055mA CPU_TMS F11 TMS

JTAG
R334 CPU_TRST# F10 C3 VDDP_SENSE TP16
IC=(3vsb-vce)/10k TP4 CPU_DBRDY TRST_L VDDP_SENSE NB_SENSE+
10K G10 DBRDY VDDNB_SENSE A3 NB_SENSE+ 23
B B
(3.3-0.2)/10k=0.31mA CPU_DBREQ# E9 DBREQ_L VDDIO_SENSE A4 VDDIOFB+ 26

SENSE
B3 VCCP_SENSE+ VCCP_SENSE+ 23
B

Q48 VDD_SENSE VDDR_SENSE TP20

VDDR_SENSE C4
B4 R20 VCCP_SENSE- VCCP_SENSE- 23
APU_THERMTRIP# VSS_SENSE R26 NB_SENSE-
E C FCH_THERMTRIP# 9 NB_SENSE- 23
N-SST3904 N12-9040020-F02 change to short pad

VCC_DDR

IB=(Vcc_DDR-Vbe)/10k
(1.5-0.95)/10k=0.055mA
R340
10K IC=(3vsb-vce)/10k
(3.3-0.2)/10k=0.31mA
PULL UP VCC_DDR

RN42 8P4R-1K
B

Q50 1 2 CPU_TDI
3 4 CPU_TCK
APU_ALERT# E C VCC3_SB 5 6 CPU_TMS
FCH_TALERT# 10
7 8 CPU_TRST#
N-SST3904
R229 10K APU_FM2R1 R106 1K CPU_DBREQ#

RN41 8P4R-1K
1 2 APU_SIC
VCC_DDR VCC_DDR 3 4 APU_SID
IB=(VCC_DDR-Vbe)/1k 5 6 APU_ALERT#
(1.5-0.95)/1k=0.55mA R286 X_1K APU_SVT 7 8 APU_THERMTRIP#
R287 X_220R
A A
R341 IC=(Vcc_DDR-Vce)/1k R280 X_1K APU_SVC R326 1K PROCHOT#
1K (1.5-0.2)/1k=1.3mA R281 X_220R R321 1K FCH_DMA_ACTIVE#
R275 X_1K APU_SVD
R271 X_220R R553 330R APU_PWRGD
B

Q51 R554 330R APU_RST#

BiB>ic
23 VR_HOT E C PROCHOT#
B=30 MICRO-START INT'L CO.,LTD.
N-SST3904 Title
FM2 DISPLAY/MSIC
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 4 of 33
5 4 3 2 1
 5 4 3 2 1

VCC_DDR 5A VCCP VCCP CPU1H CPU1G

CPU1E AK29 AF16 A18 P13
VDDA 0.9A VCC_DDR CPU1F VDDA25
VDD
R10
VSS_115
VSS_116
VSS VSS_174
VSS_175 AF13 A21
VSS_1
VSS_2
VSS
VSS_58
VSS_59 P19
AA11 L17 R12 AF11 A24 R3
VCCP_NB 41A K27 VDDIO_1 VDDA_1 AE13 AB7
VDD_1
VDD_2
VDD_51
VDD_52 L21 R20
VSS_117
VSS_118
VSS_176
VSS_177 AF22 A27
VSS_3
VSS_4
VSS_60
VSS_61 M4
J29 VDDIO_2 VDDA_2 AD13 Y20 VDD_3 VDD_53 M12 T4 VSS_119 VSS_178 AF25 B16 VSS_5 VSS_62 R9
CPU_VDD1_2 = VDDR 4A +VDDP 6A U25
T30
VDDIO_3
A7
M10
P10
VDD_4 VDD_54 M16
M18
T7
T11
VSS_120 VSS_179 AF28
AF31
B19
B22
VSS_6 VSS_63 G27
G30
VDDIO_4 VDDNB_1 VDD_5 VDD_55 VSS_121 VSS_180 VSS_7 VSS_64
VCCP 60A,90A,110A V29
L28
VDDIO_5 VDDNB_2 A6
A5 VCCP_NB
T20
W11
VDD_6 VDD_56 M20
N6
T13
T19
VSS_122 VSS_181 AG3
AG9
N22
B25
VSS_8 VSS_65 H4
H5
VDDIO_6 VDDNB_3 VDD_7 VDD_57 VSS_123 VSS_182 VSS_9 VSS_66
L31 VDDIO_7 VDDNB_4 A9 AA13 VDD_8 VDD_58 N11 U9 VSS_124 VSS_183 AG11 B28 VSS_10 VSS_67 H6
M22 VDDIO_8 VDDNB_5 C6 AA21 VDD_9 VDD_59 N19 U10 VSS_125 VSS_184 AG13 C17 VSS_11 VSS_68 H7
D M23 VDDIO_9 VDDNB_6 A10 AA3 VDD_10 VDD_60 N3 U12 VSS_126 VSS_185 AG17 C20 VSS_12 VSS_69 H9 D
M26 VDDIO_10 VDDNB_7 A11 AA6 VDD_11 VDD_61 P1 U20 VSS_127 VSS_186 AG20 C23 VSS_13 VSS_70 H11
N24 VDDIO_11 VDDNB_8 A12 AB1 VDD_12 VDD_62 P12 V11 VSS_128 VSS_187 AG23 C26 VSS_14 VSS_71 H13
N27 VDDIO_12 VDDNB_9 A13 AB10 VDD_13 VDD_63 P20 V13 VSS_129 VSS_188 AG26 C29 VSS_15 VSS_72 H16
N30 VDDIO_13 VDDNB_10 A14 AB14 VDD_14 VDD_64 T1 V19 VSS_130 VSS_189 AG29 D2 VSS_16 VSS_73 H19
P22 VDDIO_14 VDDNB_11 B5 AB16 VDD_15 VDD_65 P4 V21 VSS_131 VSS_190 AH4 D3 VSS_17 VSS_74 H22
U31 VDDIO_15 VDDNB_12 B6 AB18 VDD_16 VDD_66 P7 W3 VSS_132 VSS_191 AH10 D4 VSS_18 VSS_75 H25
W24 VDDIO_16 VDDNB_13 B7 AB4 VDD_17 VDD_67 R11 W6 VSS_133 VSS_192 AH12 D5 VSS_19 VSS_76 H28
V23 VDDIO_17 VDDNB_14 B8 AC11 VDD_18 VDD_68 R13 W9 VSS_134 VSS_193 AH15 D6 VSS_20 VSS_77 H31
VDDA25 VDDA_25 V26 B9 AC13 R19 W10 AH18 D7 M7
CP13 VDDIO_18 VDDNB_15 VDD_19 VDD_69 VSS_135 VSS_194 VSS_21 VSS_78
U28 VDDIO_19 VDDNB_16 B10 AC19 VDD_20 VDD_70 T10 W12 VSS_136 VSS_195 AH21 D8 VSS_22 VSS_79 M11
P25 VDDIO_20 VDDNB_17 B11 AC21 VDD_21 VDD_71 T12 W20 VSS_137 VSS_196 AH24 D9 VSS_23 VSS_80 M15
P28 VDDIO_21 VDDNB_18 B12 AD1 VDD_22 VDD_72 U11 W22 VSS_138 VSS_197 AH27 D10 VSS_24 VSS_81 M17
P31 VDDIO_22 VDDNB_19 B13 AE3 VDD_23 VDD_73 V20 Y4 VSS_139 VSS_198 AH30 D11 VSS_25 VSS_82 M21
C251 C287 R23 B14 AF4 U3 Y7 AJ3 D12 N9
C582 VDDIO_23 VDDNB_20 VDD_24 VDD_74 VSS_140 VSS_199 VSS_26 VSS_83
R26 VDDIO_24 VDDNB_21 C5 AF7 VDD_25 VDD_75 U6 Y11 VSS_141 VSS_200 AJ6 D13 VSS_27 VSS_84 N10
C0.22u16X6 C4.7u6.3X6 C3300p50X R29 C14 AG6 V1 Y13 AJ9 D14 N12
VDDIO_25 VDDNB_22 VDD_26 VDD_76 VSS_142 VSS_201 VSS_28 VSS_85
T24 VDDIO_26 VDDNB_23 C13 AH7 VDD_27 VDD_77 V10 Y15 VSS_143 VSS_202 AJ10 D15 VSS_29 VSS_86 N20
W27 VDDIO_27 VDDNB_24 C12 H12 VDD_28 VDD_78 V12 Y17 VSS_144 VSS_203 AJ12 D18 VSS_30 VSS_87 J12
L25 VDDIO_28 VDDNB_25 C11 H14 VDD_29 VDD_79 V4 Y19 VSS_145 VSS_204 AJ16 D21 VSS_31 VSS_88 J14
W30 VDDIO_29 VDDNB_26 C10 H8 VDD_30 VDD_80 V7 Y21 VSS_146 VSS_205 AJ19 D24 VSS_32 VSS_89 J16
Y22 VDDIO_30 VDDNB_27 C9 J11 VDD_31 VDD_81 W13 AA9 VSS_147 VSS_206 AD17 D27 VSS_33 VSS_90 J18
Y25 VDDIO_31 VDDNB_28 C8 BOTTOM SIDE J13 VDD_32 VDD_82 W19 AA10 VSS_148 VSS_207 AD20 D30 VSS_34 VSS_91 J20
Y28 VDDIO_32 VDDNB_29 C7 J15 VDD_33 VDD_83 J6 AA14 VSS_149 VSS_208 AD23 E4 VSS_35 VSS_92 J23
K24 VDDIO_33 VDDNB_30 A8 J17 VDD_34 VDD_84 N21 AA16 VSS_150 VSS_209 AD26 E15 VSS_36 VSS_93 K11
AB22 M14 C551 C22u6.3X8 J19 U19 AA18 AD29 E16 K13
VDDIO_34 VDDNB_CAP_1 C555 C22u6.3X8 VDD_35 VDD_85 VSS_151 VSS_210 VSS_37 VSS_94
AB24 VDDIO_35 VDDNB_CAP_2 N13 J21 VDD_36 VDD_86 AE6 AA20 VSS_152 VSS_211 AK7 E19 VSS_38 VSS_95 K15
AB27 C554 X_C10u6.3X8 J9 AC15 AA22 AJ31 E22 K17
VDDIO_36 C550 X_C10u6.3X8 VDD_37 VDD_87 VSS_153 VSS_212 VSS_39 VSS_96
AB30 VDDIO_37 K10 VDD_38 VDD_88 W21 AB13 VSS_154 VSS_213 AJ28 E25 VSS_40 VSS_97 K21
AC23 VDDIO_38 VDDR_1 AL10 K12 VDD_39 VDD_89 Y1 AB15 VSS_155 VSS_214 AJ25 E28 VSS_41 VSS_98 J3
AC25 VDDIO_39 VDDR_2 AK8 K14 VDD_40 VDD_90 Y10 AB17 VSS_156 VSS_215 AJ22 E31 VSS_42 VSS_99 L6
C AC28 AK9 U13 Y12 AB19 AE9 F4 L9 C
BOTTOM SIDE AC31
VDDIO_40
VDDIO_41
VDDR_3
VDDR_4 AL8 CPU_VDD1_2 K16
VDD_41
VDD_42
VDD_91
VDD_92 Y14 AB21
VSS_157
VSS_158
VSS_216
VSS_217 AE11 F17
VSS_43
VSS_44
VSS_100
VSS_101 L10
K30 VDDIO_42 VDDR_5 AL9 AC17 VDD_43 VDD_93 AA15 AC3 VSS_159 VSS_218 AE12 F20 VSS_45 VSS_102 L12
Y31 VDDIO_43 VDDR_6 AK10 Y18 VDD_44 VDD_94 AA17 AC6 VSS_160 VSS_219 AE15 F23 VSS_46 VSS_103 L14
AA26 VDDIO_44 K18 VDD_45 VDD_95 AA19 AC9 VSS_161 VSS_220 AE18 F26 VSS_47 VSS_104 L16
J26 VDDIO_45 K20 VDD_46 VDD_96 Y16 AC12 VSS_162 VSS_221 AE21 F29 VSS_48 VSS_105 L18
M29 VDDIO_46 VDDP_1 AK4 K4 VDD_47 VDD_97 AH1 AC14 VSS_163 VSS_222 AE24 G15 VSS_49 VSS_106 L20
T27 VDDIO_47 VDDP_2 AK5 L3 VDD_48 VDD_98 AF1 AC16 VSS_164 VSS_223 AE27 G18 VSS_50 VSS_107 L22
VCC_DDR VCCP AA23 AL5 L11 K7 AC18 AE30 G21 AL7
VDDIO_48 VDDP_3 VDD_49 VDD_99 VSS_165 VSS_224 VSS_51 VSS_108
AA29 VDDIO_49 VDDP_4 AL3 L15 VDD_50 AC22 VSS_166 VSS_225 AK11 G24 VSS_52 VSS_109 AL27
MEC1 MEC1 VDDP_5 AL4 AD4 VSS_167 VSS_226 AK13 R6 VSS_53 VSS_110 A15
C572 X_C22u6.3X8 MEC2 AL6 AD7 K1 AL21 AK17
C544 C22u6.3X8 MEC2 VDDP_6 CPU_VDD1_2 N12-9040020-F02 VSS_168 VSS_227 VSS_54 VSS_111
MEC3 MEC3 VDDP_7 AK3 AD11 VSS_169 VSS_228 G4 AL24 VSS_55 VSS_112 AL11
C547 X_C22u6.3X8 MEC4 AK6 AK20 M1 AL18 AL15
C539 C22u6.3X8 MEC4 VDDP_8 VSS_170 VSS_229 VSS_56 VSS_113
VDDP_9 AK2 AK23 VSS_171 VSS_230 H1 P11 VSS_57 VSS_114 AL13
C542 X_C22u6.3X8 AF19 J22
C549 X_C22u6.3X8 VSS_172 VSS_231
AK26 VSS_173 VSS_232 AB11
C560 X_C22u6.3X8 N12-9040020-F02
C567 X_C22u6.3X8 N12-9040020-F02 N12-9040020-F02
C564 C22u6.3X8
C577 C0.22u16X6
C571 C22u6.3X8
C570 C10u6.3X8
C574 X_C22u6.3X8 CPU_VDD1_2
C556 C4.7u6.3X8 VCCP VCCP_NB
C568 X_C22u6.3X8
C559 C4.7u6.3X8 VCC_DDR
C552 X_C22u6.3X8 C227 C0.22u16X6 C117 C22u6.3X8
C563 C4.7u6.3X8 C169 X_C0.22u16X6 C146 C0.01u16X C230 C0.22u16X6 C122 C22u6.3X8
C557 C22u6.3X8 C202 C0.22u16X6 C226 C0.22u16X6 C113 C22u6.3X8
C578 C4.7u6.3X8 C182 C0.22u16X6 C143 C180P50N C223 C0.22u16X6 C102 C22u6.3X8
B C553 X_C22u6.3X8 C116 C22u6.3X8 B
C538 C180P50N C149 X_C22u6.3X8 C235 C22u6.3X8 C101 C22u6.3X8
C561 X_C22u6.3X8 C171 C180P50N C228 X_C22u6.3X8 C225 C22u6.3X8 C123 C22u6.3X8
C565 C180P50N C167 C180P50N C168 X_C22u6.3X8 C112 C22u6.3X8
C191 C22u6.3X8 C229 C10u6.3X8
C576 C0.22u16X6 C195 C10u6.3X8 C240 C10u6.3X8 C108 X_C22u6.3X8
C199 X_C4.7u6.3X8 C241 C10u6.3X8 C109 X_C22u6.3X8
C280 C10u6.3X8 C110 X_C22u6.3X8
VCCP C288 C4.7u6.3X8 C107 X_C22u6.3X8

C216 C180P50N C130 C180P50N

C562 C22u6.3X8 VCCP C224 C180P50N C129 C180P50N
C281 C180P50N C125 C0.22u16X6
C566 C22u6.3X8 C217 C180P50N C126 C0.22u16X6
C215 C180P50N
C569 C22u6.3X8 C533 C0.01u16X C214 C180P50N C128 X_C0.01u16X
C142 X_C0.01u16X
C545 C22u6.3X8 C534 C0.01u16X C252 C0.01u16X C132 X_C0.01u16X
C253 C0.01u16X
C558 C22u6.3X8 C536 C180P50N

C546 C22u6.3X8 C575 C180P50N

C541 C22u6.3X8 C579 X_C180p50N

C543 C22u6.3X8 C535 X_C180P50N

C540 C22u6.3X8 C532 C0.22u16X6

C548 C22u6.3X8 C573 C0.22u16X6

A A

MICRO-START INT'L CO.,LTD.

Title
FM2 POWER&DECOUPLING
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 5 of 33
5 4 3 2 1
 5 4 3 2 1

VCC_DDR VCC3 VTT_DDR

MEM_MA_HOT#
MEM_MA_HOT# 2

170
173
176
179
182
183
186
189
191
194
197

236

120
240

167

187
198
51
54
57
60
62
65
66
69
72
75
78

68
53

79
48
49
DIMM1

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDSPD

NC/PAR_IN

RSVD
VTT
VTT

NC/ERR_OUT
NC/TEST4

FREE1
FREE2
FREE3
FREE4
2 MEM_MA_DATA[63..0]
MEM_MA_DATA0 3 188 MEM_MA_ADD0
DQ0 A0 MEM_MA_ADD[15..0] 2
MEM_MA_DATA1 4 181 MEM_MA_ADD1
MEM_MA_DATA2 DQ1 A1 MEM_MA_ADD2
9 DQ2 A2 61
MEM_MA_DATA3 10 180 MEM_MA_ADD3
MEM_MA_DATA4 DQ3 A3 MEM_MA_ADD4
D 122 DQ4 A4 59 D
MEM_MA_DATA5 123 58 MEM_MA_ADD5
MEM_MA_DATA6 DQ5 A5 MEM_MA_ADD6
128 DQ6 A6 178
MEM_MA_DATA7 129 56 MEM_MA_ADD7
MEM_MA_DATA8 DQ7 A7 MEM_MA_ADD8
12 DQ8 A8 177
MEM_MA_DATA9 13 175 MEM_MA_ADD9
MEM_MA_DATA10 DQ9 A9 MEM_MA_ADD10
18 DQ10 A10/AP 70
MEM_MA_DATA11 19 55 MEM_MA_ADD11
MEM_MA_DATA12 DQ11 A11 MEM_MA_ADD12
131 DQ12 A12 174
MEM_MA_DATA13 132 196 MEM_MA_ADD13
MEM_MA_DATA14 DQ13 A13 MEM_MA_ADD14
137 DQ14 A14 172
MEM_MA_DATA15 138 171 MEM_MA_ADD15
MEM_MA_DATA16 DQ15 A15
21 DQ16
MEM_MA_DATA17 22 39
MEM_MA_DATA18 DQ17 CB0
27 DQ18 CB1 40
MEM_MA_DATA19 28 45
MEM_MA_DATA20 DQ19 CB2
140 DQ20 CB3 46
MEM_MA_DATA21 141 158
MEM_MA_DATA22 DQ21 CB4
146 DQ22 CB5 159
MEM_MA_DATA23 147 164
MEM_MA_DATA24 DQ23 CB6
30 DQ24 CB7 165
MEM_MA_DATA25 31
MEM_MA_DATA26 DQ25 MEM_MA_DQS_H0
36 DQ26 DQS0 7
MEM_MA_DATA27 37 6 MEM_MA_DQS_L0
MEM_MA_DATA28 DQ27 DQS0# MEM_MA_DQS_H1 VCC_DDR VTT_DDR
149 DQ28 DQS1 16
MEM_MA_DATA29 150 15 MEM_MA_DQS_L1
MEM_MA_DATA30 DQ29 DQS1# MEM_MA_DQS_H2
155 DQ30 DQS2 25
MEM_MA_DATA31 156 24 MEM_MA_DQS_L2
MEM_MA_DATA32 DQ31 DQS2# MEM_MA_DQS_H3 C292 C303 C296 C260 C304
81 DQ32 DQS3 34
MEM_MA_DATA33 82 33 MEM_MA_DQS_L3
DQ33 DQS3#

C1u16X6

C1u16X6

C0.1u10X

C0.1u10X

C0.1u10X
MEM_MA_DATA34 87 85 MEM_MA_DQS_H4 C12 C41
C MEM_MA_DATA35 DQ34 DQS4 MEM_MA_DQS_L4 C
88 DQ35 DQS4# 84
MEM_MA_DATA36 200 94 MEM_MA_DQS_H5 C10u6.3X8 C10u6.3X8
MEM_MA_DATA37 DQ36 DQS5 MEM_MA_DQS_L5
201 DQ37 DQS5# 93
MEM_MA_DATA38 206 103 MEM_MA_DQS_H6
MEM_MA_DATA39 DQ38 DQS6 MEM_MA_DQS_L6
207 DQ39 DQS6# 102
MEM_MA_DATA40 90 112 MEM_MA_DQS_H7
MEM_MA_DATA41 DQ40 DQS7 MEM_MA_DQS_L7
91 DQ41 DQS7# 111
MEM_MA_DATA42 96 43
MEM_MA_DATA43 DQ42 DQS8
97 42
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
209
210
215
DQ43
DQ44
DQ45
DQ46
DDR3 DQS8#

DM0/DQS9
NC/DQS9#
125
126
MEM_MA_DM0
MEM_MA_DM[7..0] 2 VCC_DDR VCC_DDR MEM_VREF_DQ
MEM_MA_DATA47 216 134 MEM_MA_DM1 MEM_VREF_CA
MEM_MA_DATA48 DQ47 DM1/DQS10
99 DQ48 NC/DQS10# 135
MEM_MA_DATA49 100 143 MEM_MA_DM2
MEM_MA_DATA50 DQ49 DM2/DQS11
105 DQ50 NC/DQS11# 144
MEM_MA_DATA51 106 152 MEM_MA_DM3 R302 C193 R130 C47
MEM_MA_DATA52 DQ51 DM3/DQS12
218 DQ52 NC/DQS12# 153 1K C0.1u10X 1K C0.1u10X
MEM_MA_DATA53 219 203 MEM_MA_DM4
MEM_MA_DATA54 DQ53 DM4/DQS13
224 DQ54 NC/DQS13# 204
MEM_MA_DATA55 225 212 MEM_MA_DM5
MEM_MA_DATA56 DQ55 DM5/DQS14 C48
108 DQ56 NC/DQS14# 213
MEM_MA_DATA57 109 221 MEM_MA_DM6 R305 C196 R131 C52 X_C1000P16X
MEM_MA_DATA58 DQ57 DM6/DQS15 C192 X_C1000P16X
114 DQ58 NC/DQS15# 222 1K 1K C0.1u10X
MEM_MA_DATA59 115 230 MEM_MA_DM7 C0.1u10X
MEM_MA_DATA60 DQ59 DM7/DQS16
227 DQ60 NC/DQS16# 231
MEM_MA_DATA61 228 161
MEM_MA_DATA62 DQ61 DM8/DQS17
233 DQ62 NC/DQS17# 162
MEM_MA_DATA63 234 DQ63 MEM_MA1_ODT0
ODT0 195 MEM_MA1_ODT0 2
B
2
5
VSS ODT1 77
50
MEM_MA1_ODT1
MEM_MA_CKE0
MEM_MA1_ODT1 2 follow circuit checklist suggest value B
VSS CKE0 MEM_MA_CKE0 2
8 169 MEM_MA_CKE1
VSS CKE1 MEM_MA_CKE1 2
11 193 MEM_MA1_CS_L0
VSS CS0# MEM_MA1_CS_L0 2
14 76 MEM_MA1_CS_L1
VSS CS1# MEM_MA1_CS_L1 2
17 71 MEM_MA_BANK0
VSS BA0 MEM_MA_BANK0 2
20 190 MEM_MA_BANK1
VSS BA1 MEM_MA_BANK1 2
23 52 MEM_MA_BANK2
VSS BA2 MEM_MA_BANK2 2
26 VSS
29 73 MEM_MA_WE_L
VSS WE# MEM_MA_WE_L 2
32 192 MEM_MA_RAS_L
VSS RAS# MEM_MA_RAS_L 2
35 74 MEM_MA_CAS_L
VSS CAS# MEM_MA_CAS_L 2
38 168 MEM_MA_RESET#
VSS RESET# MEM_MA_RESET# 2
41 VSS
44 184 MEM_MA_CLK_H0
VSS CK0 MEM_MA_CLK_H0 2
47 185 MEM_MA_CLK_L0
VSS CK0# MEM_MA_CLK_L0 2
80 63 MEM_MA_CLK_H3
VSS CK1(NU) MEM_MA_CLK_H3 2
83 64 MEM_MA_CLK_L3
VSS CK1#(NU) MEM_MA_CLK_L3 2
86 VSS
89 1 MEM_VREF_DQ SA1 SA0
VSS VREFDQ MEM_VREF_DQ
92 67 MEM_VREF_CA
95
98
VSS
VSS
VSS
VREFCA
SCL
SDA
118
238
MEM_SCLK
MEM_SDATA
MEM_VREF_CA
DDR-III DIMM Config.
101 VSS SA1 237 VCC3 DEVICE ADDRESS CLOCK
MEC1
MEC2
MEC3

104 117
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS SA0
DIMM 1 10 P/N_DDR1_A
DDRIII-240P_BLACK-RH-24
DIMM 2 11 P/N_DDR1_B
107
110
113
116
119
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
199
202
205
208
211
214
217
220
223
226
229
232
235
239
MEC1
MEC2
MEC3

7 MEM_SCLK
MEM_SCLK R356
SCLK0 9
DIMM 3 N/A
A 7 MEM_SDATA
MEM_SDATA R351
SDATA0 9 DIMM 4 N/A A

2 MEM_MA_DQS_H[7..0]

2 MEM_MA_DQS_L[7..0]
MICRO-START INT'L CO.,LTD.
Title
DDR CH-A
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 6 of 33
5 4 3 2 1
 5 4 3 2 1

VCC_DDR VDD:4.7A 1.8V VCC3 VTT_DDR

MEM_MB_HOT# VCC_DDR
MEM_MB_HOT# 2
2 MEM_MB_DQS_H[7..0]

2 MEM_MB_DQS_L[7..0]

170
173
176
179
182
183
186
189
191
194
197

236

120
240

167

187
198
51
54
57
60
62
65
66
69
72
75
78

68
53

79
48
49
DIMM2 C152 C209 C157 C162 C156 C213 C211 C207

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDSPD

NC/PAR_IN

RSVD
VTT
VTT

NC/ERR_OUT
NC/TEST4

FREE1
FREE2
FREE3
FREE4

C1u16X6

C1u16X6

C0.1u10X

C0.1u10X

C0.1u10X

C0.1u10X

C0.1u10X

C0.1u10X
MEM_MB_DATA0 3 188 MEM_MB_ADD0
2 MEM_MB_DATA[63..0] DQ0 A0 MEM_MB_ADD[15..0] 2
MEM_MB_DATA1 4 181 MEM_MB_ADD1
MEM_MB_DATA2 DQ1 A1 MEM_MB_ADD2
9 DQ2 A2 61
D MEM_MB_DATA3 10 180 MEM_MB_ADD3 D
MEM_MB_DATA4 DQ3 A3 MEM_MB_ADD4
122 DQ4 A4 59
MEM_MB_DATA5 123 58 MEM_MB_ADD5
MEM_MB_DATA6 DQ5 A5 MEM_MB_ADD6
128 DQ6 A6 178
MEM_MB_DATA7 129 56 MEM_MB_ADD7
MEM_MB_DATA8 DQ7 A7 MEM_MB_ADD8
12 DQ8 A8 177
MEM_MB_DATA9 13 175 MEM_MB_ADD9
MEM_MB_DATA10 DQ9 A9 MEM_MB_ADD10
18 DQ10 A10/AP 70
MEM_MB_DATA11 19 55 MEM_MB_ADD11
MEM_MB_DATA12 DQ11 A11 MEM_MB_ADD12
131 DQ12 A12 174
MEM_MB_DATA13 132 196 MEM_MB_ADD13
MEM_MB_DATA14 DQ13 A13 MEM_MB_ADD14
137 DQ14 A14 172
MEM_MB_DATA15 138 171 MEM_MB_ADD15
MEM_MB_DATA16 DQ15 A15
21 DQ16
MEM_MB_DATA17 22 39
MEM_MB_DATA18 DQ17 CB0
27 DQ18 CB1 40
MEM_MB_DATA19 28 45
MEM_MB_DATA20 DQ19 CB2
140 DQ20 CB3 46
MEM_MB_DATA21 141 158
MEM_MB_DATA22 DQ21 CB4
146 DQ22 CB5 159
MEM_MB_DATA23 147 164
MEM_MB_DATA24 DQ23 CB6
30 DQ24 CB7 165
MEM_MB_DATA25 31
MEM_MB_DATA26 DQ25 MEM_MB_DQS_H0
36 DQ26 DQS0 7
MEM_MB_DATA27 37 6 MEM_MB_DQS_L0
MEM_MB_DATA28 DQ27 DQS0# MEM_MB_DQS_H1
149 DQ28 DQS1 16
MEM_MB_DATA29 150 15 MEM_MB_DQS_L1
MEM_MB_DATA30 DQ29 DQS1# MEM_MB_DQS_H2
155 DQ30 DQS2 25
MEM_MB_DATA31 156 24 MEM_MB_DQS_L2
MEM_MB_DATA32 DQ31 DQS2# MEM_MB_DQS_H3
81 DQ32 DQS3 34
MEM_MB_DATA33 82 33 MEM_MB_DQS_L3
C MEM_MB_DATA34 DQ33 DQS3# MEM_MB_DQS_H4 C
87 DQ34 DQS4 85
MEM_MB_DATA35 88 84 MEM_MB_DQS_L4
MEM_MB_DATA36 DQ35 DQS4# MEM_MB_DQS_H5
200 DQ36 DQS5 94
MEM_MB_DATA37 201 93 MEM_MB_DQS_L5
MEM_MB_DATA38 DQ37 DQS5# MEM_MB_DQS_H6
206 DQ38 DQS6 103
MEM_MB_DATA39 207 102 MEM_MB_DQS_L6
MEM_MB_DATA40 DQ39 DQS6# MEM_MB_DQS_H7
90 DQ40 DQS7 112
MEM_MB_DATA41 91 111 MEM_MB_DQS_L7
MEM_MB_DATA42 DQ41 DQS7#
96 DQ42 DQS8 43
MEM_MB_DATA43 97 42
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
209
210
215
DQ43
DQ44
DQ45
DQ46
DDR3 DQS8#

DM0/DQS9
NC/DQS9#
125
126
MEM_MB_DM0
MEM_MB_DM[7..0] 2
MEM_MB_DATA47 216 134 MEM_MB_DM1
MEM_MB_DATA48 DQ47 DM1/DQS10
99 DQ48 NC/DQS10# 135
MEM_MB_DATA49 100 143 MEM_MB_DM2
MEM_MB_DATA50 DQ49 DM2/DQS11
105 DQ50 NC/DQS11# 144
MEM_MB_DATA51 106 152 MEM_MB_DM3
MEM_MB_DATA52 DQ51 DM3/DQS12
218 DQ52 NC/DQS12# 153
MEM_MB_DATA53 219 203 MEM_MB_DM4
MEM_MB_DATA54 DQ53 DM4/DQS13
224 DQ54 NC/DQS13# 204
MEM_MB_DATA55 225 212 MEM_MB_DM5
MEM_MB_DATA56 DQ55 DM5/DQS14
108 DQ56 NC/DQS14# 213
MEM_MB_DATA57 109 221 MEM_MB_DM6
MEM_MB_DATA58 DQ57 DM6/DQS15
114 DQ58 NC/DQS15# 222
MEM_MB_DATA59 115 230 MEM_MB_DM7
MEM_MB_DATA60 DQ59 DM7/DQS16
227 DQ60 NC/DQS16# 231
MEM_MB_DATA61 228 161
MEM_MB_DATA62 DQ61 DM8/DQS17
233 DQ62 NC/DQS17# 162
MEM_MB_DATA63 234 DQ63 MEM_MB1_ODT0
ODT0 195 MEM_MB1_ODT0 2
B MEM_MB1_ODT1 B
2 VSS ODT1 77 MEM_MB1_ODT1 2
5 50 MEM_MB_CKE0
VSS CKE0 MEM_MB_CKE0 2
8 169 MEM_MB_CKE1
VSS CKE1 MEM_MB_CKE1 2
11 193 MEM_MB1_CS_L0
VSS CS0# MEM_MB1_CS_L0 2
14 76 MEM_MB1_CS_L1
VSS CS1# MEM_MB1_CS_L1 2
17 71 MEM_MB_BANK0
VSS BA0 MEM_MB_BANK0 2
20 190 MEM_MB_BANK1
VSS BA1 MEM_MB_BANK1 2
23 52 MEM_MB_BANK2
VSS BA2 MEM_MB_BANK2 2
26 VSS
29 73 MEM_MB_WE_L
VSS WE# MEM_MB_WE_L 2
32 192 MEM_MB_RAS_L
VSS RAS# MEM_MB_RAS_L 2
35 74 MEM_MB_CAS_L
VSS CAS# MEM_MB_CAS_L 2
38 168 MEM_MB_RESET#
VSS RESET# MEM_MB_RESET# 2
41 VSS
44 184 MEM_MB_CLK_H0
VSS CK0 MEM_MB_CLK_H0 2
47 185 MEM_MB_CLK_L0
VSS CK0# MEM_MB_CLK_L0 2
80 63 MEM_MB_CLK_H3
VSS CK1(NU) MEM_MB_CLK_H3 2
83 64 MEM_MB_CLK_L3
VSS CK1#(NU) MEM_MB_CLK_L3 2
86 VSS
89 1 MEM_VREF_DQ MEM_VREF_DQ
VSS VREFDQ MEM_VREF_CA
92 VSS VREFCA 67 MEM_VREF_CA
95 118 MEM_SCLK
VSS SCL MEM_SCLK 6
98 238 MEM_SDATA
VSS SDA MEM_SDATA 6
101 VSS SA1 237
MEC1
MEC2
MEC3

104 117 VCC3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS SA0

DDRIII-240P_BLACK-RH-24
107
110
113
116
119
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
199
202
205
208
211
214
217
220
223
226
229
232
235
239
MEC1
MEC2
MEC3

A A

MICRO-START INT'L CO.,LTD.

Title
DDR CH-B
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 7 of 33
5 4 3 2 1
 5 4 3 2 1

U33E

HUDSON-2 PCICLK0_SLOT 14
Part 1 of 5
To PCIEX16,X1,LAN 13,16 PCIE_RST#
R485 33R PCIE_RST#_R AE2 PCIE_RST# PCICLK0 AF3 PCI_CLK0_R R486 22R PCICLK0_SLOT C465 X_C10p50N
To SIO 15 A_RST#
R483 33R A_RST#_R AD5 A_RST# PCICLK1/GPO36 AF1 PCI_CLK1_R R469 22R
PCI_CLK1 11
C464 X_C150p25N PCIE_RST# PCICLK2/GPO37 AF5
C359 C0.1u10X UMI_RX0P_FCH AE30

PCI CLKS
UMI_TX0P PCICLK3/GPO38 AG2 PCI_CLK3_R R465 22R
3 UMI_RX0P PCI_CLK3 11
C463 X_C150p25N A_RST# C361 C0.1u10X UMI_RX0N_FCH AE32 UMI_TX0N PCICLK4/14M_OSC/GPO39 AF6 PCI_CLK4_R R468 22R
3 UMI_RX0N PCI_CLK4 11
AC capacitor need 3 UMI_RX1P
C350 C0.1u10X UMI_RX1P_FCH AD33 UMI_TX1P
C355 C0.1u10X UMI_RX1N_FCHAD31 PCIRST# R479 33R PCIRST_SLOT# C461 X_C150p25N
A_RST# for LPC device; over 500mil 3 UMI_RX1N
C347 C0.1u10X UMI_RX2P_FCH AD28
UMI_TX1N
UMI_TX2P
PCIRST# AB5
3 UMI_RX2P
PCIE_RST# for APU PCIE device; form the hudson 3 UMI_RX2N
C351 C0.1u10X UMI_RX2N_FCHAD29 UMI_TX2N
AD[31..0] 14 PCIRST_SLOT# 14
C353 C0.1u10X UMI_RX3P_FCH AC30 UMI_TX3P AD0/GPIO0 AJ3 AD0
3 UMI_RX3P
D C352 C0.1u10X UMI_RX3N_FCHAC32 UMI_TX3N AD1/GPIO1 AL5 AD1 D
3 UMI_RX3N
AD2/GPIO2 AG4 AD2
3 UMI_TX0P AB33 UMI_RX0P AD3/GPIO3 AL6 AD3
3 UMI_TX0N AB31 UMI_RX0N AD4/GPIO4 AH3 AD4
3 UMI_TX1P AB28 UMI_RX1P AD5/GPIO5 AJ5 AD5
3 UMI_TX1N AB29 UMI_RX1N AD6/GPIO6 AL1 AD6
3 UMI_TX2P Y33 UMI_RX2P AD7/GPIO7 AN5 AD7
AN6 AD8

PCI EXPRESS INTERFACES

3 UMI_TX2N Y31 UMI_RX2N AD8/GPIO8

3 UMI_TX3P Y28 UMI_RX3P AD9/GPIO9 AJ1 AD9

3 UMI_TX3N Y29 UMI_RX3N AD10/GPIO10 AL8 AD10
AD11/GPIO11 AL3 AD11
R406 590R1% PCIE_CALRP AF29 PCIE_CALRP AD12/GPIO12 AM7 AD12
VCC1P1 R391 2K1% PCIE_CALRN AF31 PCIE_CALRN AD13/GPIO13 AJ6 AD13
AD14/GPIO14 AK7 AD14
V33 GPP_TX0P AD15/GPIO15 AN8 AD15
V31 GPP_TX0N AD16/GPIO16 AG9 AD16
W30 GPP_TX1P AD17/GPIO17 AM11 AD17
W32 GPP_TX1N AD18/GPIO18 AJ10 AD18
AB26 GPP_TX2P AD19/GPIO19 AL12 AD19
AB27 GPP_TX2N AD20/GPIO20 AK11 AD20

PCI INTERFACE
AA24 GPP_TX3P AD21/GPIO21 AN12 AD21
AA23 GPP_TX3N AD22/GPIO22 AG12 AD22
AD23/GPIO23 AE12 AD23
AA27 GPP_RX0P AD24/GPIO24 AC12 AD24
AA26 GPP_RX0N AD25/GPIO25 AE13 AD25
W27 GPP_RX1P AD26/GPIO26 AF13 AD26
V27 GPP_RX1N AD27/GPIO27 AH13 AD27
V26 GPP_RX2P AD28/GPIO28 AH14 AD28
W26 GPP_RX2N AD29/GPIO29 AD15 AD29
W24 GPP_RX3P AD30/GPIO30 AC15 AD30
W23 GPP_RX3N AD31/GPIO31 AE16 AD31 C_BE#[3..0] 14
C CBE0# AN3 C_BE#0 C
CBE1# AJ8 C_BE#1
CBE2# AN10 C_BE#2
VCC1P1 R567 2K1% CLK_CALRN F27 CLK_CALRN CBE3# AD12 C_BE#3
FRAME# AG10 FRAME# FRAME# 14
DEVSEL# AK9 DEVSEL# DEVSEL# 14
G30 PCIE_RCLKP IRDY# AL10 IRDY# IRDY# 14
G28 PCIE_RCLKN TRDY# AF10 TRDY# TRDY# 14
PAR AE10 PAR PAR 14
4 DISP_CLK R26 DISP_CLKP STOP# AH1 STOP# STOP# 14
impedance 85ohm+/-15% 4 DISP_CLK# T26 DISP_CLKN PERR#
SERR#
AM9 PERR#
AH8 SERR#
PERR# 14
length need 1.0 to 12 inch H33 DISP2_CLKP REQ0# AG15 PREQ0#
SERR#
PREQ0#
14
14
H31 DISP2_CLKN REQ1#/GPIO40 AG13
REQ2#/CLK_REQ8#/GPIO41 AF15
100MHz 4 APU_CLK T24 APU_CLKP REQ3#/CLK_REQ5#/GPIO42 AM17
4 APU_CLK# T23 APU_CLKN GNT0# AD16 PGNT0# PGNT0# 14
GNT1#/GPO44 AD13
13 PE16_GXF_CLK0 J30 SLT_GFX_CLKP GNT2#/SD_LED/GPO45 AD21
13 PE16_GXF_CLK0# K29 SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 AK17
CLKRUN# AD19
H27 GPP_CLK0P LOCK# AH9 LOCK# LOCK# 14
H28 GPP_CLK0N
INTE#/GPIO32 AF18 PCI_INTE# PCI_INTE# 14
13 PE0_GPP_CLK J27 GPP_CLK1P INTF#/GPIO33 AE18 PCI_INTF# PCI_INTF# 14
13 PE0_GPP_CLK# K26 GPP_CLK1N INTG#/GPIO34 AC16 PCI_INTG# PCI_INTG# 14
INTH#/GPIO35 AD18 PCI_INTH# PCI_INTH# 14
F33 GPP_CLK2P
F31 GPP_CLK2N
LPCCLK0_TPM 11,15
LPC_CLK1 C462 X_C150p25N

CLOCK GENERATOR
LPC_CLK1 11,15
B
E33 GPP_CLK3P 33MHz B
E31 GPP_CLK3N LPCCLK0 B25 LPCCLK0_TPM_R R430 22R
LPCCLK1 D25 LPC_CLK1_R R427 22R LPC_AD[3..0]
LPC_AD[3..0] 15
16 PE_LAN_CLK M23 GPP_CLK4P LAD0 D27 LPC_AD0
16 PE_LAN_CLK# M24 GPP_CLK4N LAD1 C28 LPC_AD1

LPC
LAD2 A26 LPC_AD2
M27 GPP_CLK5P LAD3 A29 LPC_AD3 VCC3_SB
M26 GPP_CLK5N LFRAME# A31 LPC_FRAME# LPC_FRAME# 15
LDRQ0# B27 LPC_DRQ#0 LPC_DRQ#0 15
LDTSTOP_L R444 X_20K1%
N25 GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 AE27
N26 GPP_CLK6N SERIRQ/GPIO48 AE19 SERIRQ SERIRQ 15
FOR CHIPSET AUTOMATION

R23 GPP_CLK7P
R24 GPP_CLK7N
DMA_ACTIVE# G25 FCH_DMA_ACTIVE# 4
N27 GPP_CLK8P PROCHOT# E28 PROCHOT# 4,15
R27 GPP_CLK8N APU_PG E26

APU
APU_PWRGD 4,23
48MHz LDT_STP# G26 LDTSTOP_L 4
Layout:Place x'tal within 1.5 inch of FCH APU_RST# F26 APU_RST# APU_RST# 4
R417 22R FCH_48M J26 14M_25M_48M_OSC
15 SIO_48M_CLK
FCH_32K_X1 32K_X1 G2 FCH_32K_X1

C382 C22P50N FCH_25M_X1 C31 25M_X1 32K_X2 G4 FCH_32K_X2 BAT1

Y3 S5+ Mode Not Implemented: R571 1K/6 1 2
32.768KHZ12.5P Leave unconnected. VBAT
S5 PLUS

S5_CORE_EN H7

Y
2

FCH_32K_X2 2 1 Y2 R411 RTCCLK F1 RTC_CLK D44 BAT-2P-RH-1

RTC_CLK 11
25MHZ18P 1MR C33 25M_X2 INTRUDER_ALERT# F3
VDDBT_RTC_G E6 VBAT_FCH R492 510R/6 Z
4
3

C381 C22P50N FCH_25M_X2

C458
Layout:Place x'tal within 1.5 inch of FCH <DEVICE_NAME> C613 C531 S-BAT54C

X
A A
R474 20MR C0.1u10X C1u6.3X6 C1u6.3X6 VCC3_SB
JBAT1
C434 C450 1
C18P50N6 C18P50N6 2

H1X2M_BLACK-RH
MICRO-START INT'L CO.,LTD.
PLACE THESE COMPONENTS CLOSE TO Title
U600, AND USE GROUND GUARD FOR HUDSON PCIE/PCI/APU/LPC/CLK
32K_X1 AND 32K_X2
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 8 of 33
5 4 3 2 1
 5 4 3 2 1

HUDSON ACPI/USB/AZ/GPIO

U33A
D30 S-RB751V-40_SOD323-RH AB6 PCIE_RST2#/GEVENT4# USBCLK/14M_25M_48M_OSC G8
15,27 FP_RST# FCH_PWRGD 15,22
R2 RI#/GEVENT22#
USB_RCOMP R460 11.8K1%

USB MISC
W7 SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP B9
15,22,23 SLP_S3# T3 SLP_S3#
SLP_S5# W2 SLP_S5# USB_FSD1P/GPIO186 H1
D 15,22,26 SLP_S5#
D G Q18 PWRBTN# J4 PWR_BTN# USB_FSD1N H3 D
23,25 VRM_PWRGD 15 PWRBTN# HUDSON-2
S N-2N7002 FCH_PWRGD N7 PWR_GOOD
15,22 FCH_PWRGD

USB 1.1
USB_FSD0P/GPIO185 H6
Make provision for a 2.2-KΩ 5% pull-up resistor T9 TEST0
Part 4 of 5
USB_FSD0N H5
to +3.3V_S5, do not install by default, or provide

ACPI / WAKE UP EVENTS

T10 TEST1/TMS
test-point access for lab use V9 TEST2 USB_HSD13P H10
15 A20GATE AE22 GA20IN/GEVENT0# USB_HSD13N G10
15 KBRST# AG19 KBRST#/GEVENT1#
PCI_PME# R9 PME#/GEVENT3# USB_HSD12P K10
14,15 PCI_PME#
VCC3_SB C26 LPC_SMI#/GEVENT23# USB_HSD12N J12
Not Implemented: Used as GEVENT23# or left unconnected. T5 LPC_PD#/GEVENT5#

15,27 FP_RST# U4 SYS_RESET#/GEVENT19# USB_HSD11P G12

R456 X_10K FCH_THERMTRIP# PE_WAKE# K1 WAKE#/GEVENT8# USB_HSD11N F12
13,16 PE_WAKE#
R508 X_10K PE_WAKE# V7 IR_RX1/GEVENT20#
R514 X_10K PCI_PME# R10 THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD10P K12
4 FCH_THERMTRIP#
WD_PWRGD AF19 WD_PWRGD USB_HSD10N K13
R512 2.2K SCLK1
R511 2.2K SDATA1 U2 RSMRST# USB_HSD9P B11
15 SIO_RSMRST#
USB_HSD9N D11
S5 POWER DOMAIN C442 AG24 CLK_REQ4#/SATA_IS0#/GPIO64
ROUTE TO LAN,PCIE,PCI AE24 CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD8P E10
X_C2.2u10Y6 AE26 SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD8N F10
AF22 CLK_REQ0#/SATA_IS3#/GPIO60
AH17 SATA_IS4#/FANOUT3/GPIO55 USB_HSD7P C10 USB7+ 18
AG18 SATA_IS5#/FANIN3/GPIO59 USB_HSD7N A10 USB7- 18
VCC3 SPKR

USB 2.0
27 SPKR AF24 SPKR/GPIO66
SCLK0 AD26 SCL0/GPIO43 USB_HSD6P H9
6 SCLK0 USB6+ 18
R393 10K FCH_IDLEEXIT_L SDATA0 AD25 SDA0/GPIO47 USB_HSD6N G9
6 SDATA0 USB6- 18
R451 10K WD_PWRGD SCLK1 T7 SCL1/GPIO227
13 SCLK1
SDATA1 R7 SDA1/GPIO228 USB_HSD5P A8
13 SDATA1 USB5+ 18
R394 2.2K SCLK0 AG25 CLK_REQ2#/FANIN4/GPIO62 USB_HSD5N C8 USB5- 18
C R410 2.2K SDATA0 AG22 CLK_REQ1#/FANOUT4/GPIO61 C

GPIO
J2 IR_LED#/LLB#/GPIO184 USB_HSD4P F8 USB4+ 18
S0 POWER DOMAIN AG26 SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD4N E8 USB4- 18
ROUTE TO DIMMs,CLK Gen,SIO V8 DDR3_RST#/GEVENT7#/VGA_PD
W8 GBE_LED0/GPIO183 USB_HSD3P C6 USB3+ 18
SPI_HOLD#_R Y6 SPI_HOLD#/GBE_LED1/GEVENT9# USB_HSD3N A6
10 SPI_HOLD#_R USB3- 18
V10 GBE_LED2/GEVENT10#
AA8 GBE_STAT0/GEVENT11# USB_HSD2P C5 USB2+ 18
FCH_IDLEEXIT_L AF25 CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# USB_HSD2N A5
4 FCH_IDLEEXIT_L USB2- 18
USB_HSD1P C1 USB1+ 18
C13 X_C10p50N AZ_SDIN0 M7 BLINK/USB_OC7#/GEVENT18# USB_HSD1N C3 USB1- 18
R8 USB_OC6#/IR_TX1/GEVENT6#
C15 X_C10p50N AZ_BITCLK T1 USB_OC5#/IR_TX0/GEVENT17# USB_HSD0P E1 USB0+ 18
P6 USB_OC4#/IR_RX0/GEVENT16# USB_HSD0N E3 USB0- 18

USB OC
VCC3_SB F5 USB_OC3#/AC_PRES/TDO/GEVENT15#
FOR EMI P5 USB_OC2#/TCK/GEVENT14# USBSS_CALRP C16
J7 USB_OC1#/TDI/GEVENT13# USBSS_CALRN A16
R452 10K USB_OC T8 USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
USB_SS_TX3P A14
USB_SS_TX3N C14

R517 22R AZ_BITCLK_R AB3 AZ_BITCLK USB_SS_RX3P C12

17 AZ_BITCLK
R480 22R AZ_SDOUT_R AB1 AZ_SDOUT USB_SS_RX3N A12
17 AZ_SDOUT
AZ_SDIN0 AA2 AZ_SDIN0/GPIO167
17 AZ_SDIN0
Y5 AZ_SDIN1/GPIO168 USB_SS_TX2P D15

HD AUDIO
Y3 AZ_SDIN2/GPIO169 USB_SS_TX2N B15
Y1 AZ_SDIN3/GPIO170
R482 22R AZ_SYNC_R AD6 AZ_SYNC USB_SS_RX2P E14
17 AZ_SYNC

USB 3.0
R484 22R AZ_RST_R AE4 AZ_RST# USB_SS_RX2N F14
17 AZ_RST#
B B
USB_SS_TX1P F15
K19 PS2_DAT/SDA4/GPIO187 USB_SS_TX1N G15
J19 PS2_CLK/CEC/SCL4/GPIO188
J21 SPI_CS2#/GBE_STAT2/GPIO166 USB_SS_RX1P H13
USB_SS_RX1N G13

D21 PS2KB_DAT/GPIO189 USB_SS_TX0P J16

C20 PS2KB_CLK/GPIO190 USB_SS_TX0N H16
D23 PS2M_DAT/GPIO191
C22 PS2M_CLK/GPIO192 USB_SS_RX0P J15
USB_SS_RX0N K15

F21 KSO_0/GPIO209
E20 KSO_1/GPIO210 SCL2/GPIO193 H19 SCLK2 R442 10K
F20 KSO_2/GPIO211 SDA2/GPIO194 G19 SDATA2 R441 10K
A22 KSO_3/GPIO212 SCL3_LV/GPIO195 G22 SCLK3 R450 10K
E18 KSO_4/GPIO213 SDA3_LV/GPIO196 G21 SDATA3 R448 10K
A20 KSO_5/GPIO214 EC_PWM0/EC_TIMER0/GPIO197 E22
J18 KSO_6/GPIO215 EC_PWM1/EC_TIMER1/GPIO198 H22
H18 KSO_7/GPIO216 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199 J22 FCH_GPIO199 11
G18 KSO_8/GPIO217 EC_PWM3/EC_TIMER3/GPIO200 H21
B21 KSO_9/GPIO218
K18 KSO_10/GPIO219 KSI_0/GPIO201 K21
EMBEDDED CTRL
D19 KSO_11/GPIO220 KSI_1/GPIO202 K22
A18 KSO_12/GPIO221 KSI_2/GPIO203 F22
C18 KSO_13/GPIO222 KSI_3/GPIO204 F24
B19 KSO_14/XDB0/GPIO223 KSI_4/GPIO205 E24
B17 KSO_15/XDB1/GPIO224 KSI_5/GPIO206 B23
A24 KSO_16/XDB2/GPIO225 KSI_6/GPIO207 C24
D17 KSO_17/XDB3/GPIO226 KSI_7/GPIO208 F18
A A

MICRO-START INT'L CO.,LTD.

Title
HUDSON ACPI/USB/AZ/GPIO
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 9 of 33
5 4 3 2 1
 5 4 3 2 1

U33B
SATA1

HUDSON-2 Part 2 of 5

GND
9
SATA_TX0+_C C439 C0.01u16X SATA_TX0+ AK19

GND
1 SATA_TX0P SD_CLK/SCLK_2/GPIO73 AL14

TX+
2 SATA_TX0+_C SATA_TX0-_C C444 C0.01u16X SATA_TX0- AM19 SATA_TX0N SD_CMD/SLOAD_2/GPIO74 AN14
SATA_TX0-_C
RX- TX-
3 SD_CD#/GPIO75 AJ12
SATA_RX0-_C C457 C0.01u16X SATA_RX0- AL20
GND
4 SATA_RX0N SD_WP/GPIO76 AH12
SATA_RX0-_C SATA_RX0+_C C467 C0.01u16X SATA_RX0+ AN20

SD CARD
5 SATA_RX0P SD_DATA0/SDATI_2/GPIO77 AK13
6 SATA_RX0+_C AM13
RX+

SD_DATA1/SDATO_2/GPIO78
SATA_TX1+_C C435 C0.01u16X SATA_TX1+ AN22
GND

7 SATA_TX1P SD_DATA2/GPIO79 AH15

8 SATA_TX1-_C C436 C0.01u16X SATA_TX1- AL22 AJ14
GND

SATA_TX1N SD_DATA3/GPIO80

SATA_RX1-_C C470 C0.01u16X SATA_RX1- AH20 SATA_RX1N GBE_COL AC4

D SATA_RX1+_C C474 C0.01u16X SATA_RX1+ AJ20 SATA_RX1P GBE_CRS AD3 D
SATA7PM_BLACK-P-RH
SATA2 GBE_MDCK AD9
SATA_TX2+_C C441 C0.01u16X SATA_TX2+ AJ22 SATA_TX2P GBE_MDIO W10
SATA_TX2-_C C449 C0.01u16X SATA_TX2- AH22 SATA_TX2N GBE_RXCLK AB8
GND

9 GBE_RXD3 AH7
SATA_RX2-_C C469 C0.01u16X SATA_RX2- AM23
GND

1 SATA_RX2N GBE_RXD2 AF7

TX+

2 SATA_TX1+_C SATA_RX2+_C C471 C0.01u16X SATA_RX2+ AK23 SATA_RX2P GBE_RXD1 AE7

SATA_TX1-_C
RX- TX-

3 GBE_RXD0 AD7
SATA_TX3+_C C406 C0.01u16X SATA_TX3+ AH24

GBE LAN
GND

4 SATA_TX3P GBE_RXCTL/RXDV AG8

5 SATA_RX1-_C SATA_TX3-_C C415 C0.01u16X SATA_TX3- AJ24 SATA_TX3N GBE_RXERR AD1
6 SATA_RX1+_C AB7
RX+

GBE_TXCLK
SATA_RX3-_C C425 C0.01u16X SATA_RX3- AN24
GND

7 SATA_RX3N GBE_TXD3 AF9

8 SATA_RX3+_C C428 C0.01u16X SATA_RX3+ AL24 AG6
GND

SATA_RX3P GBE_TXD2
GBE_TXD1 AE8
AL26 SATA_TX4P GBE_TXD0 AD8 GbE MAC Interface not supported
SATA7PM_BLACK-P-RH AN26 SATA_TX4N GBE_TXCTL/TXEN AB9
SATA3 GBE_PHY_PD AC2
AJ26 SATA_RX4N GBE_PHY_RST# AA7
AH26 SATA_RX4P GBE_PHY_INTR W9 GBE_PHY_INTR R510 10K
GND

9
GND

1 AN29 SATA_TX5P
TX+

2 SATA_TX2+_C AL28 SATA_TX5N SPI_DI/GPIO164 V6 SPI_DATAIN

SATA_TX2-_C SPI_DATAOUT
RX- TX-

3 SPI_DO/GPIO163 V5

SERIAL ATA
SPI_CLK
GND

4 AK27 SATA_RX5N SPI_CLK/GPIO162 V3

SPI ROM
5 SATA_RX2-_C AM27 SATA_RX5P SPI_CS1#/GPIO165 T6 SPI_CS#
6 SATA_RX2+_C V1 SPI_WP#_R R515 X_0R SPI_WP#
RX+

ROM_RST#/SPI_WP#/GPIO161
GND

7 AL29 NC6
8 AN31
GND

NC7
VGA_RED L30 VGA_R 20
AL31 NC8 R403 150R1%
SATA7PM_BLACK-P-RH AL33 NC9 VGA_GREEN L32 VGA_G 20
C R404 150R1% C
SATA4
AH33 NC10 VGA_BLUE M29 VGA_B 20
AH31 NC11 R405 150R1%
GND

VGA DAC
GND

1 AJ33 NC12 VGA_HSYNC/GPO68 M28 VGA_HSYNC 20

TX+

2 SATA_TX3+_C AJ31 NC13 VGA_VSYNC/GPO69 N30 VGA_VSYNC 20

SATA_TX3-_C
RX- TX-

3
GND

4 VGA_DDC_SDA/GPO70 M33 VGA_SDAT 20

5 SATA_RX3-_C VGA_DDC_SCL/GPO71 N32 VGA_SCLK 20
6 SATA_RX3+_C R407 1K1% SATA_CALRP AF28
RX+

SATA_CALRP
R392 931R1% SATA_CALRN AF27 K31 DAC_RSET R402 715R1%
GND

7 VCC1P1 SATA_CALRN VGA_DAC_RSET

8
GND

AUX_VGA_CH_P V28 AUX_VGA_CH_P_C AUX_VGA_CH_P_C 4

SATA_LED# AD22 SATA_ACT#/GPIO67 AUX_VGA_CH_N V29 AUX_VGA_CH_N_C
27 SATA_LED# AUX_VGA_CH_N_C 4
SATA7PM_BLACK-P-RH
AUXCAL U28 AUXCAL R566 100R1% VCC1P1
AF21 SATA_X1
ML_VGA_L0P T31 DP1_TX0P 4
ML_VGA_L0N T33 DP1_TX0N 4

VGA MAINLINK
ML_VGA_L1P T29 DP1_TX1P 4
ML_VGA_L1N T28 DP1_TX1N 4
ML_VGA_L2P R32 DP1_TX2P 4
AG21 SATA_X2 ML_VGA_L2N R30 DP1_TX2N 4
ML_VGA_L3P P29 DP1_TX3P 4
ML_VGA_L3N P28 DP1_TX3N 4
ML_VGA_HPD/GPIO229 C29 ML_VGA_HPD

AH16 FANOUT0/GPIO52 VIN0/GPIO175 N2 GPIO175

AM15 FANOUT1/GPIO53 VIN1/GPIO176 M3 GPIO176
AJ16 FANOUT2/GPIO54 VIN2/SDATI_1/GPIO177 L2 GPIO177
B HW MONITOR GPIO178 B
VIN3/SDATO_1/GPIO178 N4
AK15 FANIN0/GPIO56 VIN4/SLOAD_1/GPIO179 P1 GPIO179
GPIO180
VGA HPD AN16
AL16
FANIN1/GPIO57
FANIN2/GPIO58
VIN5/SCLK_1/GPIO180
VIN6/GBE_STAT3/GPIO181
P3
M1 GPIO181 Use GPIO 10-KΩ 5% pull-down resistor
VIN7/GBE_LED3/GPIO182 M5 GPIO182 Use the other function
GPIO171 K6 TEMPIN0/GPIO171
10-KΩ 5% pull-up resistor to +3.3V_S5
GPIO172 K5 TEMPIN1/GPIO172 NC1 AG16
VCC3_SB VCC3_SB R509 10K GPIO173 K3 TEMPIN2/GPIO173 NC2 AH10 GPIO173 1 2
VCC_DDR M6 TEMPIN3/TALERT#/GPIO174 NC3 A28 GPIO172 3 4
4 FCH_TALERT#
NC4 G27 GPIO171 5 6
R438 NC5 L4 7 8
X_10K
RN12 X_10K/8P4R
C

GPIO176 1 2
ML_VGA_HPD R434 X_0R B Q65 GPIO181 3 4
X_N-SST3904_SOT23 GPIO182 5 6
GPIO177 7 8
E

R31 0R
RN13 X_10K/8P4R
R414 110R GPIO179 1 2
4 DP1_VGA_HPD
GPIO180 3 4
GPIO175 5 6
R418 GPIO178 7 8
100K
RN14 X_10K/8P4R
SPI ROM & DEBUG HEADER
VCC3_SB R488 10K SPI_HOLD#
R501 10K SPI_WP#
R500 10K SPI_CS#
A A
VCC3_SB

VCC3_SB

C494 C10u6.3X8 JSPI1

C496 C0.1u10X 1 2

SPI_CS# 1
SPI1
8
SPI_DATAIN
SPI_CS#
3
5
4
6
SPI_DATAOUT
SPI_CLK MICRO-START INT'L CO.,LTD.
SPI_DATAIN CS VCC SPI_HOLD# R491 X_0R Title
2 DO(IO1) HOLD(IO3) 7 SPI_HOLD#_R 9 7 8
SPI_WP# 3 6 SPI_CLK SPI_HOLD# 9 HUDSON SATA/VGA/SPI/HWM
WP(IO2) CLK SPI_DATAOUT
4 GND DI(IO0) 5
H2X5[1]M-2mm_Black Size Document Number Rev
W25Q64FVSSIG-HF Custom MS-7721 2.3
04/12SPI1 M31-25Q3203-W03 4M CHANGE ->8M M31-25Q6433-W03
Date: Thursday, July 26, 2012 Sheet 10 of 33
5 4 3 2 1
 5 4 3 2 1

FCH REQUIRED STRAPS

D RTCCLK PCI_CLK1 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 D

U33D

HUDSON-2 VCC3_SB VCC3 VCC3 VCC3 VCC3_SB VCC3_SB

A3 VSS VSS T25
Part 5 of 5
A33 VSS VSS T27
B7 VSS VSS U6
B13 VSS VSS U14 R507 R473 R467 R471 R423 R426
D9 VSS VSS U17 10K 10K X_10K X_10K X_10K 10K GPIO199
D13 VSS VSS U20
E5 VSS VSS U21 (ROMTYPE)
E12 VSS VSS U30
E16 VSS VSS U32
E29 VSS VSS V11 8 RTC_CLK 8 PCI_CLK1 8 PCI_CLK3 8 PCI_CLK4 8,15 LPCCLK0_TPM 8,15 LPC_CLK1 9 FCH_GPIO199
F7 VSS VSS V16
F9 VSS VSS V18
F11 VSS VSS W4
F13 VSS VSS W6
F16 VSS VSS W25 R466 R470 R424 R429
F17 VSS VSS W28 R472 10K 10K 10K 2.2K
F19 VSS VSS Y14 X_10K
F23 VSS VSS Y16
F25 VSS VSS Y18
F29 VSS VSS AA6
G6 VSS VSS AA12
G16 VSS VSS AA13
G32 VSS VSS AA14
H12 VSS VSS AA16
H15 VSS VSS AA17
H29 VSS VSS AA25
C J6 VSS VSS AA28 C
J9 VSS VSS AA30 S5+ Mode PCIeR GEN Debug Strap CLK GEN IMC Enable CLKGEN Enable GPIO199
J10 AA32 RTCCLK PCI_CLK1 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 (ROMTYPE)

GROUND
VSS VSS
J13 VSS VSS AB25
J28 VSS VSS AC6 PULL
J32 VSS VSS AC18
HIGH S5 Plus MODE PCIe interface Enable Reserved EC ENABLED CLKGEN LPC ROM
K7 VSS VSS AC28 DISABLED at Gen2 Debug Straps ENABLED
K16 VSS VSS AD27
K27 VSS VSS AE6 DEFAULT DEFAULT DEFAULT
K28 VSS VSS AE15 PULL CLKGEN
L6 VSS VSS AE21
LOW S5 Plus MODE FORCE PCIe at Disable APU_CLK/DISP_CLK EC DISABLED DISABLED SPI ROM
L12 VSS VSS AE28 ENABLED Gen1 Debug Straps Required setting
L13 VSS VSS AF8
L15 VSS VSS AF12 DEFAULT DEFAULT DEFAULT DEFAULT
L16 VSS VSS AF16
L21 VSS VSS AF33
M13 VSS VSS AG30 this pin is not used in external clock mode
M16 VSS VSS AG32 (needed only for integrated clock)
M21 VSS VSS AH5
M25 VSS VSS AH11
N6 VSS VSS AH18
N11 VSS VSS AH19
N13 VSS VSS AH21
N23 VSS VSS AH23
N24 VSS VSS AH25
P12 VSS VSS AH27
P18 VSS VSS AJ18
P20 VSS VSS AJ28
P21 VSS VSS AJ29
P31 VSS VSS AK21
B
P33
R4
VSS
VSS
VSS
VSS
AK25
AL18
FCH DEBUG STRAPS B

R11 VSS VSS AM21

R25 VSS VSS AM25
R28 VSS VSS AN1
T11 VSS VSS AN18 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
T16 VSS VSS AN28
T18 VSS VSS AN33 PULL Use internal normal REFCLK
HIGH PLL clock termination Disable I2C ROM Use ROMTYPE straps
N8 VSSAN_HWM VSSPL_DAC T21
VSSAN_DAC L28 DEFAULT DEFAULT DEFAULT DEFAULT
K25 VSSXL VSSANQ_DAC K33
VSSIO_DAC N28 PULL Bypass Internal Enable loading
H25 VSSPL_SYS
DOWN PLL clock inverted REFCLK settings for Boot from PCI bus
EFUSE R6 termination UMI/PLL/misc
from I2C ROM

Layout:
VSSPL_SYS;VSSAN_HWM CONNECT TO GND
WITH A SEPREATED VIA

A A

MICRO-START INT'L CO.,LTD.

Title
HUDSON STRAPS
Size Document Number Rev
Custom MS-7721 2.3
? Date: Thursday, July 26, 2012 Sheet 11 of 33
5 4 3 2 1
 5 4 3 2 1

VCC3 264mA

VCC1P1 4482mA Connected directly to the power plane with

width ≡ 100 mils with area fill under the FCH.

VCC3_SB 546mA
VCC3 +3.3V_FCH_R U33C D2:1414 mA VCC1P1
CP10 HUDSON-2 Part 3 of 5
PLANE 102 mA AB17 VDDIO_33_PCIGP_1 VDDCR_11_1 T14
D AB18 VDDIO_33_PCIGP_2 VDDCR_11_2 T17 D

+1.1VDUAL 454mA
C433 C612 C432 C604 C601 AE9 VDDIO_33_PCIGP_3 VDDCR_11_3 T20 C360 C363 C348 C356

C22u6.3X8
AD10 VDDIO_33_PCIGP_4 VDDCR_11_4 U16

C1u10X

C1u10X

C1u10X

C1u10X

C22u6.3X8

C22u6.3X8
C2.2u10Y6

C2.2u10Y6
AG7 VDDIO_33_PCIGP_5 VDDCR_11_5 U18

CORE S0
PCI/GPIO I/O
AC13 VDDIO_33_PCIGP_6 VDDCR_11_6 V14
AB12 VDDIO_33_PCIGP_7 VDDCR_11_7 V17
AB13 VDDIO_33_PCIGP_8 VDDCR_11_8 V20
AB14 VDDIO_33_PCIGP_9 VDDCR_11_9 Y17
AB16 VDDIO_33_PCIGP_10 VCC1P1

VDDPL_3.3V 47 mA H24 VDDPL_33_SYS VDDAN_11_CLK_1 H26 340 mA

VDDPL_33_MLDAC 20 mA V22 VDDPL_33_DAC VDDAN_11_CLK_2 J25
12 mA U22 VDDPL_33_ML VDDAN_11_CLK_3 K24 C418 C587 C584 C420
Hudson-3 Only VDDAN_33_DAC_R 30 mA T22 VDDAN_33_DAC VDDAN_11_CLK_4 L22

CLKGEN I/O
Hudson-2 to VSS 0 mA L18 VDDPL_33_SSUSB_S VDDAN_11_CLK_5 M22 C1u10X C1u10X C1u10X C1u10X
FCH_VDDPL_33_SSUSB_S 14 mA D7 VDDPL_33_USB_S VDDAN_11_CLK_6 N21
AVDD33_USB
15mils 11 mA AH29 VDDPL_33_PCIE VDDAN_11_CLK_7 N22
VDDPL_3.3V_PCIE
15mils 12 mA AG28 VDDPL_33_SATA VDDAN_11_CLK_8 P22
VDDPL_3.3V_SATA
VCC1P1

VCC1P1 C370 X_C2.2u10Y LDO_CAP M31 LDO_CAP VDDAN_11_PCIE_1 AB24 1088 mA

L12 VDDAN_11_PCIE_2 Y21
AVDD33_USB VDDPL_11_DAC 7 mA V21 VDDPL_11_DAC VDDAN_11_PCIE_3 AE25 C600 C593 C585 C588
VDDAN_11_PCIE_4 AD24

PCI EXPRESS
C440 C2.2u10Y 220L100mA-400-RH C365 C2.2u10Y 226 mA Y22 VDDAN_11_ML_1 VDDAN_11_PCIE_5 AB23 C1u10X C1u10X C1u10X C1u10X
C611 C0.1u16X V23 VDDAN_11_ML_2 VDDAN_11_PCIE_6 AA22

MAIN LINK
change to L02-2218012-T19 V24 VDDAN_11_ML_3 VDDAN_11_PCIE_7 AF26
V25 VDDAN_11_ML_4 VDDAN_11_PCIE_8 AG27
VCC1P1

AB10 VDDIO_33_GBE_S VDDAN_11_SATA_1 AA21 1337 mA

C VCC3 VDDAN_11_SATA_4 Y20 C
VDDPL_3.3V VDDAN_11_SATA_2 AB21 C598 C590 C591 C595 C594
L5 VDDAN_11_SATA_3 AB22
220L100mA-400-RH AB11 AC22 C1u10X C1u10X C1u10X C1u10X C1u10X

SERIAL ATA
VDDCR_11_GBE_S_1 VDDAN_11_SATA_5

GBE LAN
AA11 VDDCR_11_GBE_S_2 VDDAN_11_SATA_6 AC21
VDDAN_11_SATA_7 AA20
C394 C2.2u10Y VDDAN_11_SATA_8 AA18
AA9 VDDIO_GBE_S_1 VDDAN_11_SATA_9 AB20
AA10 VDDIO_GBE_S_2 VDDAN_11_SATA_10 AC19
VDDPL_33_MLDAC
L6
220L100mA-400-RH

C403 C2.2u10Y VCC3_SB AVDD33_USB

C589 C0.1u16X CP11 470 mA
50mils G7 VDDAN_33_USB_S_1 VDDIO_33_S_1 N18 59 mA 20mils
VCC3_SB
H8 VDDAN_33_USB_S_2 VDDIO_33_S_2 L19
VDDAN_33_DAC_R C443 C608 C610 J8 VDDAN_33_USB_S_3 VDDIO_33_S_3 M18
C22u6.3X8

L7 K8 VDDAN_33_USB_S_4 VDDIO_33_S_4 V12 C596 C446 C607 C605

3.3V_S5 I/O
C1u10X

220L100mA-400-RH C1u10X K9 VDDAN_33_USB_S_5 VDDIO_33_S_5 V13

M9 VDDAN_33_USB_S_6 VDDIO_33_S_6 Y12 C1u10X C1u10X C1u10X C1u10X VDDXL_3.3V VCC3
C395 C2.2u10Y M10 VDDAN_33_USB_S_7 VDDIO_33_S_7 Y13 L11
C586 C0.1u16X N9 VDDAN_33_USB_S_8 VDDIO_33_S_8 W11 220L100mA-400-RH
N10 VDDAN_33_USB_S_9

USB
M12 VDDAN_33_USB_S_10
VDDXL_3.3V C583 C2.2u10Y
VDDPL_3.3V_PCIE N12 VDDAN_33_USB_S_11 VDDXL_33_S G24 5 mA 15mils
L8 +1.1VDUAL AVDD11_USB M11 VDDAN_33_USB_S_12
220L100mA-400-RH CP12 140+42 mA +1.1VDUAL
20mils U12 VDDAN_11_USB_S_1 VDDCR_11_S_1 N20 272 mA 20mils VDDPL_1.1V VCC1P1
U13 VDDAN_11_USB_S_2 VDDCR_11_S_2 M20 C405 C2.2u10Y L13
C366 C2.2u10Y C423 C408 C609 C606 C592 C1u10X VDDPL_1.1V 220L100mA-400-RH
B B
C0.1u10X

C0.1u10X
C10u6.3X8

70 mA
C2.2u10Y6

T12 VDDCR_11_USB_S_1 VDDPL_11_SYS_S J24

T13 VDDCR_11_USB_S_2 C417 C2.2u10Y
VDDPL_3.3V_SATA VCC3_SB
L9 VDDAN_33_HWM_S M8 12 mA
220L100mA-400-RH P16 VDDAN_11_SSUSB_S_1 C614 C2.2u10Y
M14 VDDAN_11_SSUSB_S_2 VCC3
N14 VDDAN_11_SSUSB_S_3 VDDIO_AZ_S AA4
C364 C2.2u10Y P13 VDDAN_11_SSUSB_S_4 C46 C2.2u10Y
P14 VDDAN_11_SSUSB_S_5 not support connect vcc3 C49 C0.1u10X

USB SS
Hudson-3 Only N16 VDDCR_11_SSUSB_S_1
Hudson-2 to VSS N17 VDDCR_11_SSUSB_S_2
P17 VDDCR_11_SSUSB_S_3
M17 VDDCR_11_SSUSB_S_4

POWER

A A

MICRO-START INT'L CO.,LTD.

Title
HUDSON POWER&DECOUPLING
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 12 of 33
5 4 3 2 1
 8 7 6 5 4 3 2 1

3.3V 3.0A PCI EXPRESS x16 Slot

12V 5.5A +12V PCIEX1 12V 0.5A
+12V PCI_E1
X2 X2
3.3V weak 375mA
B1 12V PRSNT1# A1
B2 12V 12V A2
B3 RSVD5 12V A3 3.3V 3.0A
B4 GND GND A4
SCLK1 B5 A5 12V 0.5A
9 SCLK1 SMCLK JTAG2
SDATA1 B6 A6
9 SDATA1 SMDAT JTAG3
D B7 GND JTAG4 A7 D
VCC3 B8 3.3V JTAG5 A8
B9 JTAG1 3.3V A9 VCC3
VCC3_SB B10 3.3VAUX 3.3V A10
PE_WAKE# B11 A11
9,16 PE_WAKE# WAKE# PWRGD PCIE_RST# 8,16

B12 A12 PCI_E2 +12V

RSVD6 GND PE16_GXF_CLK0 +12V
B13 GND REFCLK+ A13 PE16_GXF_CLK0 8
C257 C0.1u10X GFX_TX15P_C B14 A14 PE16_GXF_CLK0#
3 GFX_TX15P HSOP0 REFCLK- PE16_GXF_CLK0# 8
C259 C0.1u10X GFX_TX15N_C B15 A15 B1 A1
3 GFX_TX15N HSON0 GND 12V PRSNT1_#
B16 A16 GFX_RX15P B2 A2
GND HSIP0 GFX_RX15P 3 12V#B2 12V#A2
B17 A17 GFX_RX15N B3 A3
PRSNT2#1 HSIN0 GFX_RX15N 3 RSVD 12V#A3
B18 GND GND A18 B4 GND GND#A4 A4
SCLK1 B5 A5
9 SCLK1 SMCLK JTAG2
SDATA1 B6 A6
9 SDATA1 SMDATA JTAG3
C265 C0.1u10X GFX_TX14P_C B19 A19 B7 A7
3 GFX_TX14P HSOP1 RSVD1 GND#B7 JTAG4
C264 C0.1u10X GFX_TX14N_C B20 A20 VCC3 B8 A8
3 GFX_TX14N HSON1 GND 3.3V JTAG5
B21 A21 GFX_RX14P B9 A9
GND HSIP1 GFX_RX14P 3 JTAG1 3.3V#A9 VCC3
B22 A22 GFX_RX14N VCC3_SB B10 A10
GND HSIN1 GFX_RX14N 3 3.3VAUX 3.3V#A10
C315 C0.1u10X GFX_TX13P_C B23 A23 PE_WAKE# B11 A11
3 GFX_TX13P HSOP2 GND 9,16 PE_WAKE# WAKE_# PWRGD PCIE_RST# 8,16
C314 C0.1u10X GFX_TX13N_C B24 A24 X1
3 GFX_TX13N HSON2 GND X1
B25 A25 GFX_RX13P C369 X_C0.1u16X
GND HSIP2 GFX_RX13P 3
B26 A26 GFX_RX13N B12 A12
GND HSIN2 GFX_RX13N 3 RSVD#B12 GND#A12
C266 C0.1u10X GFX_TX12P_C B27 A27 B13 A13 PE0_GPP_CLK
3 GFX_TX12P HSOP3 GND GND#B13 REFCLK+ PE0_GPP_CLK 8
C267 C0.1u10X GFX_TX12N_C B28 A28 APU_GPP_TX0P B14 A14 PE0_GPP_CLK#
3 GFX_TX12N HSON3 GND 3 APU_GPP_TX0P HSOP0+ REFCLK- PE0_GPP_CLK# 8
B29 A29 GFX_RX12P APU_GPP_TX0N B15 A15
GND HSIP3 GFX_RX12P 3 3 APU_GPP_TX0N HSOP0- GND#A15
B30 A30 GFX_RX12N B16 A16 APU_GPP_RX0P
RSVD7 HSIN3 GFX_RX12N 3 GND#B16 HSIP0+ APU_GPP_RX0P 3
R388 X_0R B31 A31 B17 A17 APU_GPP_RX0N
15 PCIE_PRSNT PRSNT2#2 GND PRSNT2_# HSIP0- APU_GPP_RX0N 3
B32 GND RSVD2 A32 B18 GND#B18 GND#A18 A18
X2 X2
C C
C317 C0.1u10X GFX_TX11P_C B33 A33
3 GFX_TX11P HSOP4 RSVD3
C316 C0.1u10X GFX_TX11N_C B34 A34
3 GFX_TX11N HSON4 GND
B35 A35 GFX_RX11P
GND HSIP4 GFX_RX11P 3
B36 A36 GFX_RX11N SLOT-PCI36_BLACK-2PITCH-RH-4
GND HSIN4 GFX_RX11N 3
C307 C0.1u10X GFX_TX10P_C B37 A37
3 GFX_TX10P HSOP5 GND
C306 C0.1u10X GFX_TX10N_C B38 A38
3 GFX_TX10N HSON5 GND
B39 A39 GFX_RX10P
GND HSIP5 GFX_RX10P 3
B40 A40 GFX_RX10N
GND HSIN5 GFX_RX10N 3
C268 C0.1u10X GFX_TX9P_C B41 A41
3 GFX_TX9P HSOP6 GND
C269 C0.1u10X GFX_TX9N_C B42 A42
3 GFX_TX9N HSON6 GND
B43 A43 GFX_RX9P
GND HSIP6 GFX_RX9P 3
B44 A44 GFX_RX9N
GND HSIN6 GFX_RX9N 3
C313 C0.1u10X GFX_TX8P_C B45 A45
3 GFX_TX8P HSOP7 GND
C312 C0.1u10X GFX_TX8N_C B46 A46
3 GFX_TX8N HSON7 GND +12V +12V VCC3 VCC3_SB
B47 A47 GFX_RX8P
GND HSIP7 GFX_RX8P 3
B48 A48 GFX_RX8N
PRSNT2#3 HSIN7 GFX_RX8N 3
B49 GND GND A49

+1
C328 C345 C327 C342 C368 C429 C343 C402
C310 C0.1u10X GFX_TX7P_C B50 A50 EC37
3 GFX_TX7P HSOP8 RSVD4

C0.1u16X

C0.1u16X

C0.1u10X

C0.1u10X

C0.1u10X

C0.1u10X

C0.1u10X

C0.1u10X
C311 C0.1u10X GFX_TX7N_C B51 A51 270u16SO
3 GFX_TX7N

2
HSON8 GND GFX_RX7P
B52 GND HSIP8 A52 GFX_RX7P 3
B53 A53 GFX_RX7N
GND HSIN8 GFX_RX7N 3
C270 C0.1u10X GFX_TX6P_C B54 A54
3 GFX_TX6P HSOP9 GND
C271 C0.1u10X GFX_TX6N_C B55 A55
3 GFX_TX6N HSON9 GND
B56 A56 GFX_RX6P
GND HSIP9 GFX_RX6P 3
B57 A57 GFX_RX6N
GND HSIN9 GFX_RX6N 3
C308 C0.1u10X GFX_TX5P_C B58 A58
3 GFX_TX5P HSOP10 GND
C309 C0.1u10X GFX_TX5N_C B59 A59
3 GFX_TX5N HSON10 GND
B60 A60 GFX_RX5P
B GND HSIP10 GFX_RX5P 3 B
B61 A61 GFX_RX5N
GND HSIN10 GFX_RX5N 3
C321 C0.1u10X GFX_TX4P_C B62 A62
3 GFX_TX4P HSOP11 GND
C322 C0.1u10X GFX_TX4N_C B63 A63
3 GFX_TX4N HSON11 GND
B64 A64 GFX_RX4P
GND HSIP11 GFX_RX4P 3
B65 A65 GFX_RX4N
GND HSIN11 GFX_RX4N 3
C272 C0.1u10X GFX_TX3P_C B66 A66
3 GFX_TX3P HSOP12 GND
C273 C0.1u10X GFX_TX3N_C B67 A67
3 GFX_TX3N HSON12 GND
B68 A68 GFX_RX3P
GND HSIP12 GFX_RX3P 3
B69 A69 GFX_RX3N
GND HSIN12 GFX_RX3N 3
C275 C0.1u10X GFX_TX2P_C B70 A70
3 GFX_TX2P HSOP13 GND
C274 C0.1u10X GFX_TX2N_C B71 A71
3 GFX_TX2N HSON13 GND
B72 A72 GFX_RX2P
GND HSIP13 GFX_RX2P 3
B73 A73 GFX_RX2N
GND HSIN13 GFX_RX2N 3
C323 C0.1u10X GFX_TX1P_C B74 A74
3 GFX_TX1P HSOP14 GND
C324 C0.1u10X GFX_TX1N_C B75 A75
3 GFX_TX1N HSON14 GND
B76 A76 GFX_RX1P
GND HSIP14 GFX_RX1P 3
B77 A77 GFX_RX1N
GND HSIN14 GFX_RX1N 3
C325 C0.1u10X GFX_TX0P_C B78 A78
3 GFX_TX0P HSOP15 GND
C326 C0.1u10X GFX_TX0N_C B79 A79
3 GFX_TX0N HSON15 GND
B80 A80 GFX_RX0P
GND HSIP15 GFX_RX0P 3
B81 A81 GFX_RX0N
PRSNT2#4 HSIN15 GFX_RX0N 3
B82 RSVD8 GND A82
X1 X1
SLOT-PCI164P_BLUE-2PITCH-RH-8

A A

MICRO-START INT'L CO.,LTD.

Title
PCI EXPRESS X16
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 13 of 33
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

3.3V 7.6A
5V 5.0A
12V 0.5A AD[31..0] 8

C_BE#[3..0] 8

+12V
PCI SLOT 1 (PCI VER: 2.2 COMPLY)
D D
-12V +12V C437 C478
PCI1

C0.1u16X

C0.1u16X
B1 -12V TRST# A1
B2 TCK +12V A2
B3 GND TMS A3
B4 TDO TDI A4
VCC5 B5 +5V +5V A5
B6 +5V INTA# A6 PCI_INTE# 8
8 PCI_INTF# B7 INTB# INTC# A7 PCI_INTG# 8
8 PCI_INTH# B8 INTD# +5V A8 VCC5
B9 PRSNT#1 RESERVED A9
B10 A10 VCC5 VCC5
RESERVED#B10 +5V(I/O)
B11 PRSNT#2 RESERVED#A11 A11
VCC3 B12 A12 VCC3 VCC3_SB
GND GND
B13 GND GND A13
B14 RESERVED#B14 3.3VAUX A14
B15 GND RST# A15 PCIRST_SLOT# 8

1
C510 C509 C507

+
8 PCICLK0_SLOT B16 CLK +5V(I/O)#A16 A16
B17 A17 EC48
GND GNT# PGNT0# 8

X_C0.1u10X

C0.1u10X

C0.1u10X
8 PREQ0# B18 A18 470u6.3SO

2
REQ# GND PCI_PME#
B19 +5V(I/O)#B19 PME# A19 PCI_PME# 9,15
AD31 B20 A20 AD30
AD29 AD31 AD30
B21 AD29 +3.3V A21
B22 A22 AD28
AD27 GND AD28 AD26
B23 AD27 AD26 A23
AD25 B24 A24
AD25 GND AD24
B25 +3.3V AD24 A25
C_BE#3 B26 A26 ID1 R506 100R AD21
AD23 C/BE#3 IDSEL
B27 AD23 +3.3 A27
B28 A28 AD22
C AD21 GND AD22 AD20 C
B29 AD21 AD20 A29
AD19 B30 A30 VCC3 VCC3
AD19 GND AD18
B31 +3.3V AD18 A31
AD17 B32 A32 AD16
C_BE#2 AD17 AD16
B33 C/BE#2 +3.3V A33
B34 A34 FRAME# C480 C483 C505 C476
GND FRAME# FRAME# 8

1
IRDY#

+
8 IRDY# B35 IRDY# GND A35

C0.1u10X

C0.1u10X

C0.1u10X

C0.1u10X
B36 A36 TRDY# EC47
+3.3V TRDY# TRDY# 8
DEVSEL# B37 A37 470u6.3SO
8 DEVSEL#

2
DEVSEL# GND STOP#
B38 GND STOP# A38 STOP# 8
LOCK# B39 A39
8 LOCK# LOCK# +3.3V
PERR# B40 A40
8 PERR# PERR# SMBCLK
B41 +3.3V SMBDAT A41
SERR# B42 A42
8 SERR# SERR# GND
B43 A43 PAR
+3.3V PAR PAR 8
C_BE#1 B44 A44 AD15
AD14 C/BE#1 AD15
B45 AD14 +3.3V A45
B46 A46 AD13 VCC3_SB
AD12 GND AD13 AD11
B47 AD12 AD11 A47
AD10 B48 A48
AD10 GND AD9
B49 GND AD9 A49
X1 X2 C438 C485 C482
X1 X2

X_C0.1u10X

X_C0.1u10X

C0.1u10X
AD8 B52 A52 C_BE#0
AD7 AD8 C/BE#0
B53 AD7 +3.3V A53
B54 A54 AD6
AD5 +3.3V AD6 AD4
B55 AD5 AD4 A55
AD3 B56 A56 VCC3
AD3 GND AD2
B57 GND AD2 A57
AD1 B58 A58 AD0
AD1 AD0 PCI1_ACK64# R539 8.2K
B59 +5V(I/O)#B59 +5V(I/O)#A59 A59
B PCI1_ACK64# PCI1_REQ64# PCI1_REQ64# R521 8.2K B
B60 ACK64# REQ64# A60
B61 +5V +5V A61
B62 +5V +5V A62

SLOT-120pin,DIP,2.54mm,WHITE

IDSEL = AD21
MASTER = PCI_REQ#0
PCI_GNT#0

PCI Express X1 slot PCI Config.

DEVICE MCP1 INT Pin REQ#/GNT# IDSEL CLOCK
+12V - 1 A PIRQ#E
PCI Slot 1 PREQ#0 AD21 CLK_33M_PCH_PCI
PIRQ#F
PGNT#0 (ICS113)
+3.3Vaux (wake) - 750mA PIRQ#G
+3.3Vaux (no wake) - 40mA PIRQ#H

A +3.3V - 6.0A A

MICRO-START INT'L CO.,LTD.

Title
PCI/PCIE X1 SLOTs
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 14 of 33
8 7 6 5 4 3 2 1
 5 4 3 2 1

VCC3_SB VCC3
U7
8 A_RST# A_RST# 29 7 OPT BOM
LPC_DRQ#0 LRESET# GPIO30 JTPM1
8 LPC_DRQ#0 30 LDRQ# GPIO31 8

LPC Interface
8 SERIRQ 31 9 GPIO32 1 2
SERIRQ GPIO32 8,11 LPCCLK0_TPM
8 LPC_FRAME# 32 10 GPIO33 TPMRST# 3 4
LPC_CLK1 LFRAM# GPIO33 GPIO34 LPC_AD0 SERIRQ
8,11 LPC_CLK1 38 PCICLK GPIO34 11 5 6
8 SIO_48M_CLK SIO_48M_CLK 39 12 VCC3 LPC_AD1 7 8 VCC5
LPC_AD0 CLKIN GPIO35 LPC_AD2
8 LPC_AD[3..0] 33 LAD0 GPIO36 13 9
LPC_AD1 34 14 LPC_AD3 11 12
LAD1 GPIO37
LPC_AD2 35 LAD2 GPIO50 15 remove R230 X_4.7K GPIO32 R161 4.7K LPC_FRAME# 13 14
LPC_AD3 36 16 R231 X_4.7K GPIO33 R162 4.7K
LAD3 GPIO51 R232 X_4.7K GPIO34 R163 4.7K H2X7[10]M-2PITCH_BLACK-RH
GPIO52 17
D
GPIO53 18 D
4 APU_SIC 57 SCL GPIO54 19
4 APU_SID 58 PECI/SDA
9,27 FP_RST# 63 WDTRST#/GPIO14 SLCT/GPIO60 100
4,8 PROCHOT#
9,14 PCI_PME#
67
79
OVT# PE/GPIO61 101
102
Chasiss Intrusion
PME# BUSY/GPIO62
ACK#/GPIO63 103
93 104 VBAT
VIN6 SLIN#

Hardware Monitor

Parallel Port
VCC1P1_SIO 94 105
+12VIN_SIO VIN5 INIT#/GPIO64
95 VIN4(VDIMM) ERR#/GPIO65 106
+5VIN_SIO 96 107
VDDR_SIO VIN3(VDDA) AFD#/GPIO66 R180
97 VIN2(VLDT) STB#/GPIO67 108
VCCP_SIO 98 109 2M
VIN1(Vcore) PD0/GPIO70 JCI1
PD1/GPIO71 110
20 CPU_FAN 21 111 CHASSIS 1
FANIN1 PD2/GPIO72 N31-1020011-C09
20 CPU_FAN_CTL 22 FANCTL1 PD3/GPIO73 112 2
20 SYS_FAN1 23 FANIN2 PD4/GPIO74 113
20 SYS_FAN1_CTL 24 114 H1X2M_BLACK-RH
FANCTL2 PD5/GPIO75
25 FANIN3/GPIO40 PD6/GPIO76 115
26 116

UART, SIR and 80-Port

SYS_TMP2 FANCTL3/GPIO41 PD7/GPIO77
89 D3+
MOS_TMP1 90 D2+
new add CPU_TMP0
VREF_THM
91
92
D1+(CPU)
VREF
DCD1#
RI1#
118
119
DCDA#
RIA#
DCDA#
RIA#
21
21
VCC3
+12V
CTSA#

Power Saving
CTS1# 120 CTSA# 21
121 DTRA# DTRA# 21
SIO_WAKE# DTR1#/FAN40_100 RTSA# DCDB# R208 4.7K +12VIN_SIO R199 200K1%
42 EVENT_IN0# RTS1#/STRAP_PROTECT 122 RTSA# 21
22 SYS5VSB_OFF SYS5VSB_OFF 43 123 DSRA# DSRA# 21 DSRB# 8 7
ERP_CTRL0# DSR1# SOUTA SINB R192 20K1%
44 ERP_CTRL1# SOUT1/STRAP4E_2E 124 SOUTA 21 6 5 1.090V
125 SINA SINA 21 CTSB# 4 3
SIN1 DCDB# RIB# C78 C0.1u16X
54 SUS_WARN#/TIMING_1 DCD2#/SEGG/GPIO20 126 2 1
C 53 127 RIB# C
SUS_ACK#/TIMING_2 RI2#/SEGF/GPIO21 CTSB# RN5 8P4R-4.7K VCC5
46 DPWROK/TIMING_3 CTS2#/SEGA/GPIO22 128
47 6 SINB
DDR_OV1 SLP_SUS#/TIMING_4 SIN2/SEGE/GPIO27 SOUTB +5VIN_SIO R209 200K1%
26 DDR_OV1 49 GPIO01 SOUT2/SEGB/GPIO26/STRAP_DPORT 5
26 DDR_OV2 DDR_OV2 50 3 DSRB#
STRAP_TIMING GPIO02 DSR2#/L#/GPIO25
51 GPIO03 RTS2#/SEGC/GPIO24 2 0.951V
Internal pull high with STRAP_TIMING 52 1 R198 47K1%
AMD timing (Default). TP7 S3P5_GATE# STRAP_TIMING DTR2#/SEGD/GPIO23
55 S(3P5)_Gate#/SLOTOCC#/GPIO04 IRTX/GPIO42 27
TP5 S3_GATE# 56 28 PCIE_PRSNT PCIE_PRSNT 13 C86 C0.1u10X
TP6 S0P5_GATE# S(3)_Gate#/GPIO05/WDTRST# IRRX/GPIO43
62 S(0P5)_Gate#/GPIO13/BEEP VCCP
KBRST# KBRST# Internal pull high 3.3V with 10k ohms

KBC Function
KBRST# 40 KBRST# 9
LED_VSB 64 41 A20GATE A20GATE Internal pull high 3.3V with 10k ohms VCCP_SIO R202 10K1%
27 LED_VSB GPIO15/LED_VSB/ALERT# GA20 A20GATE 9
27 LED_VCC LED_VCC R23 0R LED_VCC_R 65 69 KBDATA KBDATA 21
I_VSB3V R25 X_0R GPIO16/LED_VCC KDATA KBCLK C83 C10u6.3X8
66 GPIO17/CPU_PWGD KCLK 70 KBCLK 21
74 71 MSDATA MSDATA 21
TPMRST# R126 33R PCIRST1# MDATA MSCLK
75 PCIRST2# MCLK 72 MSCLK 21 VCC_DDR
ACPI Function

76 PCIRST3#
59 R37 10R ATX_5VSB D7
PCI_RST4#/SCL/GPIO10 VSB_5V C27 C0.1u10X X_S-BAT54A VDDR_SIO R210 10K1%
60 PCI_RST5#/SDA/GPIO11 5VSB(5VA) 45
61 68 VSB3V R29 0R I_VSB3V Y
ATX_PWROK RSTCON#/GPIO12 I_VSB3V VBAT_SIO R170 1K R28 X_0R LED_VCC C183 C0.1u10X
22,27 ATX_PWROK 78 ATXPG_IN/GPIO44 VBAT 86 VBAT Z VCC3_SB
9,22 FCH_PWRGD FCH_PWRGD 84 99 VCC3_SB X
PWOK 3VSB
27 PSIN# 80 PSIN#/GPIO45 3VCC 4 VCC3
Power Pin

9 PWRBTN# 81 37 C35 C37

PSOUT#/GPIO46 3VCC C0.1u10X VCC1P1
9,22,23 SLP_S3# 82 S3# GND 20 C1u10X

C0.1u10X
C30

C0.1u10X
C76

C0.1u10X
C85

C0.1u10X
C65
9,22,26 SLP_S5# 77 48 R91 X_0R
S5# GND VCC1P1_SIO R211 10K1%
27 ATX_PSON# 83 PS_ON#/GPIO47 GND 73
9 SIO_RSMRST# SIO_RSMRST# 85 117
CHASSIS RSMRST# GND C189 C0.1u10X
87 COPEN# AGND(D-) 88
HMGND

F71868AD-RH
F71868A B

F71868 STRAPPING RESISTOR

CP1
ATX_5VSB
R135 4.7K CPU_FAN_CTL PWM mode TYPE A
VCC3
SOUTA SYS5VSB_OFF R165 10K TEMP SENSOR
R205 X_1K DTRA# 1(Default): Configuration register4E SIO_WAKE# R173 10K
RTSA#
R207
R206
X_1K SOUTA
X_1K RTSA# 1: Default is alarm mode (disabled).
STRAP_TIMING 0:GPIO MODE VCC3_SB
new add
R216 1K SOUTB
R220 1K STRAP_TIMING SOUTB 0:GPIO MODE VREF_THM VREF_THM
PWRBTN# R155 10K MMBT3906
SIO_RSMRST# R158 4.7K
R195 R194 Q15 SYS_TMP2
1 0 10K1% 10K1%

E
VCC3 C69
CPU_TMP0 MOS_TMP1 B C2200p50X
STRAP_TIMING TIMING AMD GPIO Intel Cougar PROCHOT# R74 X_4.7K
FCH_PWRGD R154 4.7K

C
DTRA# FAN start duty FAN start duty RT8 C75 RT3 C73 HMGND
is 40% is 100% 10KRT C2200p50X 10KRT C2200p50X

SOUTA 4E (default) 2E HMGND HMGND

Near SIO Near SIO

FANCTL1 PWM mode DAC mode(default) It defaults to be a voltage output by pulling down 100k internally (DAC)
A A

FANCTL2 PWM mode DAC mode(default)

FANCTL3 PWM mode DAC mode(default)

80Port decode output COM2 Strap for 80 Port. Default internal Pull High for 80 Port
SOUTB Enable. MICRO-START INT'L CO.,LTD.
Title
Disable UVP Enable UVP SUPER I/O F71869
RTSA# protection protection
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 15 of 33
5 4 3 2 1
 5 4 3 2 1

RTL8111E/8105E
UL1
VCC3 RL1 1K
PE_LAN_TXP 17 PCIE interface 22 LAN_RXP CL1 C0.1u10X
3 PE_LAN_TXP HSIP HSOP PE_LAN_RXP 3
RL2 15K1% LAN_ISO 3 PE_LAN_TXN PE_LAN_TXN 18 23 LAN_RXN CL4 C0.1u10X PE_LAN_RXN 3
HSIN HSON

8 PE_LAN_CLK PE_LAN_CLK 19 25 LAN_RST# RL13 X_Short

REFCLK_P PERSTB PCIE_RST# 8,13
8 PE_LAN_CLK# PE_LAN_CLK# 20 16
REFCLK_N CLKREQB

D D
ENSWREG: LAN_ISO 26 ISOLATEB 1 TR_D0+
PE_WAKE# PM Transceiver MDIP0 TR_D0-
1: Enable switching regulator 9,13 PE_WAKE# 28 LANWACKEB Interface MDIN0
2
0: Disable switching requlator 4 TR_D1+
MDIP1 TR_D1-
MDIN1 5
RL3 2.49K1% RSET 46 RSET TR_D2+
VDD33 33 ENSWREG MDIP2(NC) 7
width>40mil 8 TR_D2-
Regulator MDIN2(NC)
VDD33 34 VDDREG
35 10 TR_D3+
VDDREG MDIP3(NC)
MDIN3(NC) 11 TR_D3- GPO:
CL5 CL6 REGOUT
C0.1u10X
36 REGOUT 1: Link up
C4.7u6.3X8
27 0: Link down
DVDD33 POWER EEPROM LED0_LINK100#
width>60mil CHOKEL1 39 DVDD33 LED0 40
37 LAN_EESK
LED1/EESK LAN_EECS RL4 10K
near pin <200mil VDD33 42 AVDD33 EECS/SCL 30
VDD10 VDD10 1 2 REGOUT 47 32 LAN_EEDI RL5 10K
AVDD33 EEDI/SDA LAN_EEDO
48 AVDD33 LED3/EEDO 31
12 AVDD33(NC)
CL7 CL8
C0.1u10X C10u6.3X8 CH-4.7u0.85A170mS-HF RL6 1K
VDD10 13 DVDD10 GPO 38 VDD33
X5R L04-47A7340-T04 29 DVDD10
OL4-7672004 41 DVDD10(NC) SMBCLK(NC) 14 8111E: stuff
RL7 3 AVDD10 SMBDATA(NC) 15 LAN_SMB_DA RL8 10K 8105E: unstuff
0R/6
near pin36 <200mil 45 AVDD10
6 43 CLK_LANI CL9 C27p50N4

GND Pad
AVDD10(NC) CKXTAL1
9 AVCC10(NC)

2
CLOCK

GND
C EVDD10 21 44 YL1 C
EVDD10 CKXTAL2
25MHZ18P

1
CL11 RTL8111E-VB-GR CLK_LANO

24
49
CL10 CL12 C27p50N4
C1u10X C0.1u16X

Pin49: 9 via from top layer to GND layer

and make the via at the center of IC.

3.3v Power on rise time : 1~100ms. LAN Connector

VDD33
Place near pin
70mA VDD33 For EMI
27 39 42 47 48 12
VCC3_SB CPL1 X_COPPER CL13 C0.1u10X
8111E: 200R
CPL2 X_COPPER CL15 CL16 CL19 CL20 CL21 CL22 8111E: unstuff 8105E: 510R LAN_USB1B Giga-Lan 10/100-Lan
B
CL30 8105E: stuff 19 19 B
C0.1u10X

C0.1u10X

C0.1u10X

C0.1u10X

C0.1u10X

C0.1u10X

C10u6.3X8 LAN_EEDO RL9 200R LED3_ACT 20

TCT TCT 20
13 PWR N58-22F0731 N58-22F0771
TR_D0+ 18 TD1+
TR_D0- 12 Link Yellow
TD1-
CL31 TR_D1+ 17 Active Blinking Link Yellow
TD2+
X_C0.01u16X 8111E: unstuff TR_D1- 11 TD2-
1000 Orange Active Blinking
8111E: stuff 8105E: 510R TR_D2+ 16 100 Green 100 Green
TD3+
8105E: unstuff TR_D2- 10 TD3-
10 None 10 None
300mA Place near pin VDD33 RL12 X_510R TR_D3+ 15
TR_D3- TD4+
9 TD4- 19 19
3 13 19 45 41 6 9 GND/RCT GND/RCT 14
LAN_EESK RL10 200R LED1_LINK1000# GND
VDD10 21 21
LED0_LINK100# 22 20 250R
8111E: 200R 22
Yellow 20 Yellow
CL23 CL24 CL25 CL26 CL27 CL28 CL29 RL11 8105E: unstuff RJ45_USBX2_LEDX2_TX-GIGA-RH-5
C0.1u10X C0.1u10X C0.1u10X C0.1u10X C0.1u10X C0.1u10X C0.1u10X 0R

Orange
8111E: 0R only support LED0+LED1/LED1+LED3 dual color LED 21 21
8105E: 0.01uF combinations when using EEPROM
22 250R
Green 22 Green

LED3_ACT
8105E POWER Consumption 8111E POWER Consumption LED0_LINK100#
LED1_LINK1000#
A 3.3V mW 3.3V mW A
CL17 CL18 CL14
10 M Idle/TxRx 14/75 46/248 10 M Idle/TxRx 12/66 40/218
C1000P50X

C1000P50X

C1000P50X

100 M Idle/TxRx 43/66 142/218 100 M Idle/TxRx 31/44 102/145

S0 ALDPS 3.2 11 Giga Idle/TxRx 135/163 452/538
ALDPS 4 13 MICRO-START INT'L CO.,LTD.
Title
LAN-RTL8111E/8105E.
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 16 of 33
5 4 3 2 1
 5 4 3 2 1

Closed Codec LIN_OUT

ALC887-VD 11mA VCC3 CA3 closed PIN25 AUDIO1B
Closed Codec CA4 closed PIN38 LOUT_R RA1 75R LOUT_RA 6
VT1708S CE VOUT LOUT_L RA2 75R LOUT_LA 9
用SMD CAP 手動量測會FAIL在THD+N FRONT_JD 7
用EL-CAP or SOLID cap,才會pass 8
CA1 CA2 CA3 CA4 100pF Cap can change to
C10u6.3X8 C0.1u10X C0.1u10X C22u6.3X8 TVS by PM request. LOUT_LA CA5 ESD-SFI0402
LOUT_RA CA6 ESD-SFI0402 JACK-AUDIOX3F_PK/GR/BU-RH-6

25
38
1
9
UA1 LOUT_LA RA3 22K
LOUT_RA RA4 22K

LDO-OUT1
LDO-OUT2
DVDD
DVDD-IO
47 36 A_LOUT_R ECA2 1+ 2 100u16SO LOUT_R
EPAD/SPDIF-IN FRONT-R ECA1 1+
D
FRONT-L 35 A_LOUT_L 2 100u16SO LOUT_L LIN_IN D
48 SPDIF-OUT AUDIO1A
9 AZ_SDOUT 5 41 LINE_IN_R RA5 75R LINE_IN_RA 10 15
RA6 22R SDIN0 SDATA-OUT SURR-R LINE_IN_L RA7 75R LINE_IN_LA
9 AZ_SDIN0 8 SDATA-IN SURR-L 39 13
9 AZ_SYNC 10 LINE1_JD 11 14
SYNC 16
9 AZ_RST# 11 RESET# 12
CENTER 43 3
9 AZ_BITCLK 6 BCLK LFE 44
LINE_IN_LA CA32 C100p50N JACK-AUDIOX3F_PK/GR/BU-RH-6
LINE_IN_RA CA33 C100p50N
SIDE-R 46
SIDE-L 45
need use X5R REGREF
2
3
GPIO0/DMIC-CLK/SPDIF-OUT2
REGREF A_LINE_IN_R CA7 C4.7u6.3X8 LINE_IN_R
LINE1-R 24
SENSE_A 13 23 A_LINE_IN_L CA8 C4.7u6.3X8 LINE_IN_L MIC1_V_L RA9 2.2K MIC1_LA
Sense A LINE1-L
CA9 SENSE_B 34 Sense B MIC1
C10u6.3X8 MIC1_V_R RA10 2.2K MIC1_RA
LINE2-R 15 A_LINE2_R ECA3 1+ 2 100u16SO LINE2_R EL 100u ( C94-1012511-N07 ) AUDIO1C
MIC1_V_R 32 14 A_LINE2_L ECA4 1+ 2 100u16SO LINE2_L MIC1_R RA11 75R MIC1_RA 1
MIC2_VREFO MIC1-VREFO-R LINE2-L MIC1_L RA12 75R MIC1_LA
30 MIC2-VREFO 5 17
MIC1_V_L 28 MIC1_JD 2 18
MIC1-VREFO-L A_MIC1_R CA10 C4.7u6.3X8 MIC1_R
37 PIN37-VREFO MIC1-R 22 4
45.8mA LDOVDD 29 LDO-IN MIC1-L 21 A_MIC1_L CA11 C4.7u6.3X8 MIC1_L
LINE2_VREFO 31 MIC1_RA CA12 C100p50N
VREF_AUDIO LINE2-VREFO MIC1_LA CA13 C100p50N JACK-AUDIOX3F_PK/GR/BU-RH-6
GPIO1/DMIC-DATA

27 VREF
VCAP 33 17 A_MIC2_R CA14 C4.7u6.3X8 MIC2_R
JDREF Sense C MIC2-R A_MIC2_L CA15 C4.7u6.3X8 MIC2_L
40 JDREF MIC2-L 16

CD-R 20
C CA16 CA18 CA17 RA13 19 C
AVSS1
AVSS2

CD-GND
DVSS

X_C0.1u16XC10u6.3X8 20K1% 12 18
X_C100p50N BEEP CD-L

ALC887-VD2-CG-HF
4
7

26
42

Reserve for 1708 need use X5R 4.7k change to 2.2k,Microphone recording the effect better
Closed Codec
C647.C649 close to Pin27

LIN_IN
D
VCAP
EMI
CA19 CA20
X_C0.1u16X X_C10u6.3X8 CPA1 X_COPPER LIN_OUT
E
CA21 X_C0.1u16X CPA2 X_COPPER
887:Remove CA22 X_C1000p16X
1708:Stuff When connected in series capacitor polarity,
Closed Codec the required resistance to ground MIC1
F

DA1
F_LINE2_L RA14 22K
F_LINE2_R RA15 22K Y N54-13F0271-K06
LINE2_VREFO Z
B B
X
S-BAT54A_SOT23

Y
MIC2_VREFO Z
X
S-BAT54A_SOT23

2
4
6
8
DA2
RNA1
RNA2 8P4R-4.7K
8P4R-75R N31-2051411-H06

1
3
5
7
MIC2_R 1 2 F_MIC2_R JAUD1
MIC2_L 3 4 F_MIC2_L F_MIC2_L 1 2
LINE2_L F_LINE2_L MIC GND
5 6
LINE2_R 7 8 F_LINE2_R F_MIC2_R 3 4
MICPWR PRESENCE#
SENSE_A RA16 5.1K1% FRONT_JD F_LINE2_R 5 6 MIC2_JD
FLINE OUTR LINE NEXT R
RA17 10K1% LINE1_JD LA1 0R/8 SENSE_B RA19 47R 7 HPON 8
ATX_5VSB LDOVDD
CA23 RA18 20K1% MIC1_JD F_LINE2_L 9 10 LINE2_JD
X_C100p50N FLINE OUTL LINE NEXT L
Close to Jack

CA27 ESD-SFI0402

CA28 ESD-SFI0402

CA29 ESD-SFI0402

CA31 ESD-SFI0402
CA24 CA25 H2X5[8]M_BLACK-RH
CA30 RA20 RA21
C0.1u10X

C10u10X8

DA3 C1000P16X 39.2K1% 20K1%

Closed Codec X_TVS
SENSE_B

A
CA26 A
X_C100p50N Varister --> cap for cost down Close to Front panel
C659,C669 close to L35 For HDA/AC97 front cable.
0402 300pF varistor
D0G-2950500-SI0
D0G-3010510-I05
MICRO-START INT'L CO.,LTD.
Title
HUDSON SATA/VGA/SPI/HWM
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 17 of 33
5 4 3 2 1
 5 4 3 2 1

5V_RUSB

LAN_USB1A
5 23 5V_RUSB
PWR GND
USB6- 6 USB- GND 24
USB6+ 7 USB+ GND 25
8 26
GND UP GND
D D

1 PWR GND 27

1
5V_RUSB USB7-

+
2 USB- GND 28
USB7+ 3 GND 29 EC50
USB+DOWN
4 GND GND 30 470u6.3SO

2
RJ45_USBX2_LEDX2_TX-GIGA-RH-5

5
D21
L24 USB6+ 6 4 USB7+
9 USB6- USB6- 5 1 USB6-
9 USB6+ USB6+ 6 2 USB6+ USB6- 1 3 USB7- 5V_RUSB

9 USB7+ USB7+ 7 3 USB7+

2
9 USB7- USB7- 8 4 USB7- ESD-AOZ8902CIL-HF USB1
9 11
X_CMC-L12-181D017-LF
5
1 5
USB4- 2 UP 6 USB5-
USB4+ 3 7 USB5+
4 8
5V_RUSB 1
L23 10 12
9 USB4- USB4- 5 1 USB4- DOWN
9 USB4+ USB4+ 6 2 USB4+ USBAX2M_BLACK-RH-21

5
9 USB5+ USB5+ 7 3 USB5+ D18
9 USB5- USB5- 8 4 USB5- USB4+ 6 4 USB5+

X_CMC-L12-181D017-LF USB4- 1 3 USB5-

C C

2
ESD-AOZ8902CIL-HF
5V_FUSB
near ESD device
JUSB_PW2 5V_RUSB JUSB2
1 VCC5 F2 USB7- R586 X_300R C519 X_C15p50N
Near Rear G
2
3 ATX_5VSB
USB_RPW 1 2
USB6- R585 X_300R C520 X_C15p50N
1
USB2- 3
VCC
D0-
VCC
D1-
2
4 USB3-
F-MINISMDM260 USB2+ 5 D0+ D1+ 6 USB3+
USB5- R584 X_300R C522 X_C15p50N 7 GND GND 8
N31-1030171+N33-1020301-RH 5V_FUSB
10
USB4- R583 X_300R C523 X_C15p50N
H2X5[9]M_BLACK-RH-3
JUSB_PW1 5V_FUSB USB3- R580 X_300R C597 X_C15p50N
Near Front 1
2
VCC5
USB_FPW 1
F3
2 USB2- R579 X_300R C599 X_C15p50N
G

1 +
3 ATX_5VSB
F-MINISMDM260 USB1- R582 X_300R C602 X_C15p50N 5V_FUSB EC52
470u6.3SO

2
N31-1030171+N33-1020301-RH 5V_FUSB USB0- R581 X_300R C603 X_C15p50N

for use usb device issue JUSB1

(ex:web cam) 1 VCC VCC 2
5

D36 USB0- 3 D0- D1- 4 USB1-

L28 USB2+ 6 4 USB3+ USB0+ 5 D0+ D1+ 6 USB1+
USB2- 5 1 USB2- 7 GND GND 8
9 USB2-
9 USB2+ USB2+ 6 2 USB2+ USB2- 1 3 USB3- 10

9 USB3+ USB3+ 7 3 USB3+ H2X5[9]M_BLACK-RH-3

2

B USB3- USB3- ESD-AOZ8902CIL-HF B

9 USB3- 8 4

X_CMC-L12-181D017-LF

04/12JUSB1,JUSB2 N31-2051AO1-H06 change-> N31-2051BG1-H06

L29 5V_FUSB
9 USB0- USB0- 5 1 USB0-
9 USB0+ USB0+ 6 2 USB0+

9 USB1+ USB1+ 7 3 USB1+

5

9 USB1- USB1- 8 4 USB1- D45

USB0+ 6 4 USB1+
X_CMC-L12-181D017-LF
USB0- 1 3 USB1-
2

ESD-AOZ8902CIL-HF

A A

MICRO-START INT'L CO.,LTD.

Title
USB2.0 POWER/CONNECTORS
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 18 of 33
5 4 3 2 1
 5 4 3 2 1

LEVEL SHIFT using I2C Repeater

HDMI CONNECTOR VCC3 VCC3 5V_HDMI

TRINITY R107
0R/6
R89 R77 R98 R117
2.2K 2.2K 4.7K 4.7K
4 DP0_TX0P_APU C121 C0.1u10X HDMI_TXD2+
4 DP0_TX0N_APU C124 C0.1u10X HDMI_TXD2-

G
D HDMI 4 DP0_AUXP DP0_AUXP HDMI_SCL D

D
C115 C0.1u10X HDMI_TXD1+
4 DP0_TX1P_APU
C118 C0.1u10X HDMI_TXD1- DP0_TXP/N0 Data2
4 DP0_TX1N_APU
DP0_TXP/N1 Data1 4 DP0_AUXN DP0_AUXN Q12
N-2N7002
4 DP0_TX2P_APU C111 C0.1u10X
C103 C0.1u10X
HDMI_TXD0+
HDMI_TXD0-
DP0_TXP/N2 Data0
4 DP0_TX2N_APU DP0_TXP/N3 Clock

G
HDMI_SDA

D
4 DP0_TX3P_APU C134 C0.1u10X HDMI_TXC+
4 DP0_TX3N_APU C135 C0.1u10X HDMI_TXC-
Q14
N-2N7002 C36 C40

X_C0.1u10X X_C0.1u10X

VCC3

HDMI_TXC+ HDMI_TXD1+

R87 R270 R227

0R/6 X_110R X_110R
HDMI_TXC- HDMI_TXD1-
C

Q13
HDMI_HPD R143 1K B HDMI_TXD2+ HDMI_TXD0+

N-SST3904
E

C R142 C38 R250 R245 C

100K R101 110R DP0_HPD DP0_HPD 4 X_110R X_110R
X_C0.1u10X 5V_HDMI
R100 HDMI_TXD2- HDMI_TXD0-
100K

5
D9 R137 4.7K 5V_HDMI
+12V
HDMI_SDA 6 4
Q118 F4

G
HDMI_SCL 1 3 HDMI_HPD VCC5 1 2

D
N-NDS351AN_SOT23 F-MICROSMD110 C59 C57

C0.1u10X
C10u6.3X8
X_ESD-AOZ8902CIL-HF

03/20 Change HDMI(TMDS) terminations from 715ohm to 604ohm

B HDMI1 B

SHELL1 21
HDMI_TXD2+ 1 D2+
2 D2 Shield R249 604R1% HDMI_TXD2+ U2 U4
HDMI_TXD2- 3 D2- R251 604R1% HDMI_TXD2- HDMI_TXC- 1 NC 10 HDMI_TXC- HDMI_TXD2+ 1 NC 10 HDMI_TXD2+
HDMI_TXD1+ 4 D1+ HDMI_TXC+ 2 NC 9 HDMI_TXC+ HDMI_TXD2- 2 NC 9 HDMI_TXD2-
5 D1 Shield R243 604R1% HDMI_TXD1+
HDMI_TXD1- 6 R247 604R1% HDMI_TXD1- HDMI_TXD1- 4 HDMI_TXD1- HDMI_TXD0+ HDMI_TXD0+
D1- NC 7 4 NC 7
HDMI_TXD0+ 7 D0+ HDMI_TXD1+ 5 NC 6 HDMI_TXD1+ HDMI_TXD0- 5 NC 6 HDMI_TXD0-
8 D0 Shield
HDMI_TXD0- 9 D0- MEC1 R239 604R1% HDMI_TXD0+ X_ESD-PDY050003-2510-RH X_ESD-PDY050003-2510-RH

8
HDMI_TXC+ 10 R225 604R1% HDMI_TXD0-
CK+
11 CK Shield
HDMI_TXC- 12 R272 604R1% HDMI_TXC+
CK-
13 R269 604R1% HDMI_TXC-
CE Remote VCC3
14 NC
HDMI_SCL 15 DDC CLK
HDMI_SDA 16 DDC DATA D
17 GND G Q21
5V_HDMI 18 +5V S N-2N7002
HDMI_HPD 19 HP DET C93
SHELL2 20
C0.1u10X

CONN-HDMI19P_BLACK-RH-11

A A

MICRO-START INT'L CO.,LTD.

Title
DVI/HDMI SWITCH
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 19 of 33
5 4 3 2 1
 8 7 6 5 4 3 2 1

5V_VGA
FAN VGA CONNECTOR C95 C0.1u10X
+12V +12V
+12V D15
BAV99LT1_SOT23
Y X

Q8

Z
8
U1A L3

S
3 + R15 D2
10 VGA_R
1 G R14 4.7K 1N4148 68n300mA

A
15 CPU_FAN_CTL 2 - 0R/8

X_P-P06P03LCGA
D R215 C96 C98 D

D
AS358MTR-G1_SOIC8-HF 150R1% X_5p50N C5p50N

4
R22 27K 5V_VGA
CPU_FAN 15
C88 C0.1u10X

R9 D14
CPUFAN 10K BAV99LT1_SOT23
4 Y X
3 MEC1
R70 X_10K1% VCC_CPUFAN 2

Z
1 L2
10 VGA_G
R90 BH1X4B_WHITE-3.3MM-RH 68n300mA
X_3.6K1% C77
C10u16X12 R212 C89 C91
150R1% X_5p50N C5p50N
5V_VGA
PWM mode TYPE A
VCC5 VCC5 C80 C0.1u10X
D11
BAV99LT1_SOT23
Y X
R8 R6
2.2K 2.2K

Z
L1
10 VGA_B
68n300mA
Q3
C R201 C81 C
G2 D2 R7 0R 150R1% X_5p50N C82
S2 C5p50N
G1 D1
S1

NN-2N7002DW

5V_VGA
+12V +12V 5V_VGA

+12V

R375
U1B R152 R190
AS358MTR-G1_SOIC8-HF 4.7K/6 2.2K

17
2.2K
C
8

VGA1
S

5 Q58 R366 D25

+ 4.7K R177 33R DDCCLK
7 G 1N4148 10 VGA_SCLK 15 5
A
P-P06P03LCGA

15 SYS_FAN1_CTL 6 - 10
VSYNC_5V R179 47R VSYNC 14 4
D

9
4

R367 27K SYS_FAN1 15 HSYNC_5V R139 47R HSYNC 13 3 BLUE

8
R151 33R DDCDATA 12 2 GREEN
10 VGA_SDAT
7
11 1 RED
SYSFAN1 C60 C61 C63 C68 6
B B

X_C18p50N6

X_C18p50N6
X_C22P50N

X_C22P50N
4
3 MEC1

16
R373 10K1% VCC_SYSFAN2 2 R368
1 10K
VGA1A
R374 BH1X4B_WHITE-3.3MM-RH
3.6K1% C53
C10u16X12
DC mode

5V_VGA 5V_VGA

C43 C0.1u10X C62 C0.1u10X

5
1 D10
4 VSYNC_5V DDCCLK 6 4 DDCDATA
VGA_VSYNC 2
10 VGA_VSYNC
U8 VSYNC 1 3 HSYNC
R136 4.7K 5V_VGA SN74LVC1G08DBVR
+12V

3
ESD-AOZ8902CIL-HF

2
Q117 F1
G

VCC5 1 2
S

N-NDS351AN_SOT23 F-MICROSMD110 C58 C56

C0.1u10X
C10u6.3X8

5V_VGA

A
C74 C0.1u10X A

5
1
4 HSYNC_5V
VGA_HSYNC 2
10 VGA_HSYNC
U5
SN74LVC1G08DBVR
MICRO-START INT'L CO.,LTD.

3
Title
DVI & VGA CONN.
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 20 of 33
8 7 6 5 4 3 2 1
 5 4 3 2 1

PS2 Connect
SERIAL PORT 1
5V_RUSB

U10 stuff RN6 unstuff

VCC3
U10 C114 C0.1u16X
R5

2
4
6
8
C4 X_1K 20 1 +12COM_1 C A +12V DCDA# R204 X_4.7K
RN1 C0.1u10X VCC5 NRIA# VCC VDD RIA# D17 1N4148 SINA
D 2 RA1 RY1 19 8 7 D
8P4R-4.7K KB_MS1 C479 NCTSA# 3 18 CTSA# DSRA# 6 5
MINIDIN12P-RH NDSRA# RA2 RY2 DSRA# CTSA#

16
17
4 17 4 3

1
3
5
7
C0.1u10X NSINA RA3 RY3 SINA RIA#
7 RA4 RY4 14 2 1
MSD 7 10 NDCDA# 9 12 DCDA#
RN2 RA5 RY5 RN6 X_8P4R-4.7K
8
15 MSCLK 1 2 MSC MSC 11 RTSA# 16 5 NRTSA
MSD DTRA# DA1 DY1 NDTRA
15 MSDATA 3 4 12 9 15 DA2 DY2 6
15 KBCLK 5 6 KBC MS SOUTA 13 8 NSOUTA D12 1N4148
KBD KBD DA3 DY3 -12COM_1
15 KBDATA 7 8 1 4 11 GND VSS 10 A C -12V
2
8P4R-33R KBC 5 GD75232_SSOP20 C90 C0.1u16X
CN7 6 3
1 2 KBD KB
3 4 KBC

13
14
15
5 6 MSD
7 8 MSC 15 DCDA# DCDA# NRTSA 1 2
5V_RUSB RIA# NDSRA# 3 4 JCOM1
15 RIA#
8P4C-180p50N 15 CTSA# CTSA# NCTSA# 5 6 CN2 NDCDA# 1 2 NSINA
15 DTRA# DTRA# NRIA# 7 8 X_8P4C-330P50N6 NSOUTA 3 4 NDTRA
C21 C0.1u10X 15 RTSA# RTSA# 5 6 NDSRA#
15 DSRA# DSRA# NDCDA# 1 2 NRTSA 7 8 NCTSA#
15 SOUTA SOUTA NSOUTA 3 4 NRIA# 9
15 SINA SINA NSINA 5 6 CN1
5

D6 NDTRA 7 8 X_8P4C-330P50N6 H2X5[10]M_BLACK-RH

KBD 6 4 MSD

KBC 1 3 MSC MSD D48 1 2 X_ESD-MLVS

MSC D49 1 2 X_ESD-MLVS
ESD-AOZ8902CIL-HF KBD D50 1 2 X_ESD-MLVS
2

KBC D47 1 2 X_ESD-MLVS

C C

TVS P/N:
D0G-0200529-A68
D0G-0422013-N47 Varistor:
D0G-15A0509-N47 D0G-3010510-I05
D0G-0422003-P03 D0G-2950500-SI0
D0G-0422003-N47

layout note:
C21 must close to TVS pin5
TVS must near KB_MS1 connector and route without branch
Varistor must close to TVS and route without branch

B B

A A

MICRO-START INT'L CO.,LTD.

Title
COM/LPT
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 21 of 33
5 4 3 2 1
 5 4 3 2 1

[email protected] output W > 2W Q68 must stuff

(5-3.3)*1.2=2.04W
VCC3_SB POWER VCC3

5VDIMM FOR DDR

ATX_5VSB Q68
S N-APM2054NDC-TRG_SOT89
R542 10R C512 C1u10X G 5VDRV1
D

VCC3_SB
D
ATX_5VSB D
ATX_5VSB C198

4
U39
R314 510R 5VDIMM_5V R316 10R Trace Width 80mils. 3 6

CNTL
VCC5 VIN VOUT
C18000P16X

1
R315 10K C205 C0.1u10X ATX_5VSB ATX_5VSB C524

+
15,27 ATX_PWROK NC 5

1
EC49 C525 R561 C10u6.3X8

+
2 EN
S2 470u6.3SO C521 C0.015u16X 10K1% EC46

2
5VDIMM C10u6.3X8 470u6.3SO

GND
GND

2
1
2
U19 G2 R559 1 7 R563 200K 5VDRV1
5VSBDRV1 POK FB
5 7 47K

5VCC
5VSB
9,15,23 SLP_S3# S3# 5VSB_DRV
6 UP0104S
9,15,26 SLP_S5#

8
9
S5#
D
NP-P2003ND5G_TO252-5-RH VCC3_SB_EN R562 (13.3/3.3)*0.8=3.224V
3.3K1%
GND
4 8 5VDRV1 G1
MODE 5VCC_DRV C186 If uP0104/0105 output current more then 0.7A
UP7501M8 C0.1u10X G
D
Q70 R562 stuff 3.3K1%
Q40 15 SYS5VSB_OFF
3

R308 S1 C527
S N-2N7002
1K/6 C200 X_C0.1u10X
C0.022u50X6 active low

+12V VCC5

D03-020030B-N03 add avl D03-P19030B-N03

C VCC1P1 C

D03-2054N39-ST8
1.1V@454mA
Q71
1.1VDUAL POWER (3.3-1.1)*0.454=1W S X_N-APM2054NDC-TRG_SOT89
G 1P1_DUAL_DRV
ATX_5VSB D

VCC3_SB R439 10R C400 C1u10X

+1.1VDUAL

4
U31
3 6

CNTL
VIN VOUT
5 R408
NC 1K1%
2 EN C371 R2

1+
C0.015u16X

GND
GND
1 7 R399 200K 1P1_DUAL_DRV EC41
POK FB
100u16SO

2
UP0104S

8
9
C404 R1 R412
(3.61/2.61)*0.8=1.1V
For special PSU sequence C10u6.3X8 2.61K1%

B B
ATX_5VSB
+12V

R317
47K
R425
Q43 X_1K/6
C208 C0.1u10X
NN-2N7002DW
G2 D2 5VDIMM_5V 1P1_DUAL_DRV

D1
S2 ATX_5VSB
VCC3 R310 1K G1 D
R395 X_4.7K G Q62
S X_N-2N7002
S1

R309
X_4.7K

D
9,15 FCH_PWRGD R421 X_1K G Q60
S X_N-2N7002
C357
X_C1u10X

A A

MICRO-START INT'L CO.,LTD.

Title
ACPI UPI & SYS POWER
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 22 of 33
5 4 3 2 1
 5 4 3 2 1

Note: VCC5
VCC_DDR CHOKE2
BOOT VOLTAGE VID Override Circuit JPWR2 +12VIN 12VIN
CH-1.1u15A3.2m-HF
Pre_PWROK

GND

12V
2 4 1 2
R749
SVC SVD Metal VID

1
0R/8 U61

+
R99 1K

R80 1K

R92 1K
EC8 EC11 EC1 EC22 EC25

12V
GND
0 0 1.1 1 3
270u16SO 270u16SO 270u16SO 270u16SO 270u16SO 6 1 VCORE_R_HG3 24
0 1 1.0

2
design check VCC UGATE
1 0 0.9 7 FCCM LGATE 5 VCORE_R_LG3 24
PWR-2X2M_natural-RH C913
1 1 0.8

5
R97 0R SVC PWM_Y 3 2 R758 0R/8 C918 C0.22u16X6 VCORE_R3 24
4 APU_SVC PWM BOOT
R49 0R SVD C1u16X6 8
4 APU_SVD PHASE
R76 33R SVT 4
4 APU_SVT GND
D 4,8 APU_PWRGD SP1 APU_PG 9 D
THERMAL PAD

R102 X_1K

R81

R93

R149 X_220R
VCC5 ISL6208BCRZ
APU_PG: VCC5 VCC5 12VIN

X_1K

X_1K
from FCH to APU & UP1640
PU 330R to VCC_DDR Add TWO GND VIA in 9PIN
R750
R2 R3 R12 0R/8
0R/8 0R/8 0R/8 U62

6 VCC UGATE 1 VCORE_NB_R_HG2 24

VCC5 7 5
FCCM LGATE VCORE_NB_R_LG2 24
1.1-0.95/1=0.15mA C914
VCC_DDR 5-0.2/4.7=1.02mA Bib>ic 30*0.15>1.02mA C5 C8 C14 PWM2_NB 3 2 R759 0R/8 C919 C0.22u16X6
PWM BOOT VCORE_NB_R2 24
C1u6.3X C1u6.3X C0.22u16X6 C1u16X6 8
PHASE
4 GND
R19 VCCP

29

30

35
9 THERMAL PAD
R21 0R VDD_IO 4.7K U3

VDD

VDDP

VIN
ISL6208BCRZ
R13
9,25 VRM_PWRGD
C44 C45 1K VCORE_EN 9 41 U60_P41 R24 182K1%

C
C0.1u10X ENABLE FCCM_NB
C1u16X
Q4 B 23 PGOOD
N-SST3904 42 PGOOD_NB
24 U60_BT U60_BT_R C870 C0.22u16X6

E
APU_PG BOOT1 R727 0R/8
10 PWROK
SVC 4
SVD SVC
6 SVD UGATE1 25 VCORE_R_HG1 24
VCC3 R259 4.7K SVT 8
C VR_HOT SVT C
4 VR_HOT 5 VR_HOT_L
VDD_IO 7 26 VCORE_R1 24
VDDIO PHASE1

C868 C100p50N 27 VCORE_R_LG1 24

LGATE1
C865 C1000P16X R701 301R1% R707 137K1% C850 C330p50X COMP 22
VCCP COMP
34 U60_BT2 U60_BT3_R C871 C0.22u16X6
R703 56KR1% C11 C10p50N BOOT2 R728 0R/8
20 FB2
R699 R705 3.3K1% 21 33 VCORE_R_HG2 24
FB UGATE2
10R R709 3.3K1%C704 C1500p50X6
PHASE2 32 VCORE_R2 24
C860 C330p16N
R104 0R VCCP_SENSE+_R 18
4 VCCP_SENSE+ VSEN
C861 C300P50X 31 VCORE_R_LG2 24
LGATE2
R108 0R VCCP_SENSE-_R 19
4 VCCP_SENSE- RTN
R698 10R C852 C1000P16X
28 PWM_Y
PWM_Y
C867 C100p50N COMPNB IMON IMON_NB

C866 C470p50XNBFB_RR R547 499R1% R708 143K1%

COMPNB_C C851 C470p50X 43 36 U60_BTX U60_BTX_R C872 C0.22u16X6
COMP_NB BOOTX R729 0R/8
VCCP_NB R704 56KR1% R737 C873 R736 C874
UGATEX 37 VCORE_NB_R_HG1 24
R697 100K1% C1000P16X 100K1% C1000P16X
R546 6.8K1% NBFB 44
B 10R FB_NB B
PHASEX 38 VCORE_NB_R1 24
R555 5.62K1%NBFB_R C854 C2200p50X

C862 C300p50X 39 VCORE_NB_R_LG1 24

R111 0R NB_SENSE+_R LGATEX
4 NB_SENSE+ 45 VSEN_NB
C863 C300P50X
R523 549 ohm (Vcore OCP = 100 A) 40 PWM2_NB
R110 0R NB_SENSE-_R PWM2_NB NTCR735 18.2K1% NTC_R NTC_NB R733 18.2K1%NTC_NB_R
4 NB_SENSE- 24 VSUM+
R700 10R C853 C1000P16X 24 VSUM- RT4 10KRT R706 2.61K1%
C693 C0.22u16X6 16 15 ISEN1
ISUMP ISEN1 ISEN1 24
C859 C0.33u6.3X R734
C848 C0.1u16X R532 11K1% 14 ISEN2 RT6 R730 RT7
ISEN2 ISEN2 24
R523 549R1% ISUMN 17 100KRT1% 100KRT1%
R524 X_100R1% C692 X_C0.33u6.3X ISUMN ISEN3 X_27.4K1% X_27.4K1%
ISEN3 13 ISEN3 24
24 NB_VSUM+
24 NB_VSUM- RT5 10KRT R710 2.61K1% CLOSE Q107
R522 11K1% 47 48 NB_ISEN1 CLOSE Q97
ISUMP_NB ISEN1_NB NB_ISEN1 24
C858 C0.33u6.3X
C849 C0.1u16X C697 C0.1u16X6 1 NB_ISEN2
ISEN2_NB NB_ISEN2 24
R527 604R1% ISUMN_NB 46
R526 X_100R1% C695 X_C0.33u6.3X ISUMN_NB
12 NTC
R527 300 ohm (NB OCP = 50 A) NTC NTC_NB
NTC_NB 2
ATX_5VSB +12VIN
D1 S-RB751V-40_SOD323-RH
9,15,22 SLP_S3#
11 IMON
D4 S-RB751V-40_SOD323-RH IMON IMON_NB
3
GND

4,25,26 APU_FM2R1 IMON_NB

R10 R16 12*(3/12.1)=2.975V
Ic=(VDDA_25-Vce)/R694=0.489mA VCC3 47K 9.1K1%
Ib=(ATX_5VSB-Vbe)/R693=0.86mA >1V ISL62773HRZ_QFN48-HF
49

ATX_5VSB VCORE_EN
A A
Ic=(VCC_DDR-Vce)/R702=0.277mA R695 BOTTOM PAD
VDDA_25 Ib=(ATX_5VSB-Vbe)/R693=0.102mA 10K
R11 CONNECT TO GND
R694 4.7K C393 X_C1u10X R693 R4 100R G
D
Q1 G
D
Q2 3K1% C7 Through 8 VIAs
Q94
47K
Q73
S
N-2N7002
S X_C0.1u16X
Power soulation
VCC_DDR 2 6 G
D
N-2N7002 N-2N7002 R703 -> 56K ohm (OFS) MICRO-START INT'L CO.,LTD.
1 C9 C1
R702 4.7K 5 3
S

C0.1u16X C100p50N R527-> 604 ohm (OCP_NB) Title

4 R704 -> 56K ohm (OFS_NB) UPI1640 3+2 Phase
C397
X_C1u10X
NN-CMKT3904_SOT363-6-RH R546 -> 6.8K ohm (loadline) Size
Custom
Document Number Rev
MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 23 of 33
5 4 3 2 1
 5 4 3 2 1

12VIN

12VIN
VCORE 60A
VCCP_NB 41A

5
Q107
4 C158 C155
3 C1u16X6 C10u16X8

5
Q97 2
4 C120 C133 R796 10K 1
3 C1u16X6 C10u16X8
2 23 VCORE_NB_R_HG1 R794 0R/8 CHOKE9
R770 10K 1 N-NTMFS4921NT1G_SO8-RH CH-0.47u45A0.86m-RH
23 VCORE_NB_R1 1 2 VCCP_NB
D 23 VCORE_R_HG1 R771 0R/8 CHOKE4 D

CP27

CP28
N-NTMFS4921NT1G_SO8-RH CH-0.47u45A0.86m-RH Q108 R795
23 VCORE_R1 1 2 VCCP 23 VCORE_NB_R_LG1 4
3 2.2R/8

CP21

CP20
Q96 R769 2
23 VCORE_R_LG1 4 1

X_COPPER

X_COPPER
3 2.2R/8 C929
2
1 N-NTMFS4935NT1G_SO8-RH C1000P16X

X_COPPER

X_COPPER
C926

N-NTMFS4935NT1G_SO8-RH C1000P16X close PWM

NB_VSUM+ R793 3.65K1%
23 NB_VSUM+
23 NB_ISEN1 R114 10K
R792 X_10K NB_ISEN2
23 VSUM+ VSUM+ R781 3.65K1% close PWM C933
23 ISEN1 R103 10K R33 C0.22u16X6
R777 X_10K ISEN2 X_1R
C930
add 9.1Kohm R18
9.1K1%
C0.22u16X6
R778 X_10K ISEN3 NB_VSUM- R790 1R
23 NB_VSUM-

23 VSUM- VSUM- R779 1R

12VIN
12VIN
5

Q99

5
C 4 C140 C137 Q110 C
3 C1u16X6 C10u16X8 4 C160 C159
2 3 C1u16X6 C10u16X8
R774 10K 1 2
R801 10K 1
23 VCORE_R_HG2 R772 0R/8 CHOKE7
N-NTMFS4921NT1G_SO8-RH CH-0.47u45A0.86m-RH 23 VCORE_NB_R_HG2 R799 0R/8 CHOKE10
23 VCORE_R2 1 2 VCCP N-NTMFS4921NT1G_SO8-RH CH-0.47u45A0.86m-RH
23 VCORE_NB_R2 1 2 VCCP_NB
5

CP22

CP24
Q101 R773

CP29

CP30
23 VCORE_R_LG2 4 Q111 R800
3 2.2R/8 23 VCORE_NB_R_LG2 4
2 3 2.2R/8
1 2
X_COPPER

X_COPPER

C927 1

X_COPPER

X_COPPER
C935
N-NTMFS4935NT1G_SO8-RH C1000P16X
N-NTMFS4935NT1G_SO8-RH C1000P16X

23 VSUM+ VSUM+ R784 3.65K1% close PWM close PWM

23 ISEN2 R112 10K NB_VSUM+R798 3.65K1%
23 NB_VSUM+
R783 X_10K ISEN1 23 NB_ISEN2 R115 10K
C931 R797 X_10K NB_ISEN1
R30 C0.22u16X6
X_1R R782 X_10K ISEN3 R34 C934
X_1R C0.22u16X6

23 VSUM- VSUM- R780 1R

NB_VSUM- R791 1R
23 NB_VSUM-
B 12VIN B
5

Q103
4 C145 C144
3 C1u16X6 C10u16X8
2
R789 10K 1

23 VCORE_R_HG3 R775 0R/8 CHOKE8

N-NTMFS4921NT1G_SO8-RH CH-0.47u45A0.86m-RH
23 VCORE_R3 1 2 VCCP
5

CP25

CP26

Q104 R776
23 VCORE_R_LG3 4
3 2.2R/8
2
1
X_COPPER

X_COPPER

C928
VCCP
N-NTMFS4935NT1G_SO8-RH C1000P16X VCCP_NB

EC12 1+ 2 820u2.5SO
close PWM EC4 1+ 2 820u2.5SO
23 VSUM+ VSUM+ R788 3.65K1% EC31 1+ 2 820u2.5SO
23 ISEN3 R113 10K EC2 1+ 2 820u2.5SO
R787 X_10K ISEN1 EC13 1+ 2 820u2.5SO
C932 EC10 1+ 2 820u2.5SO
R32 C0.22u16X6 EC18 1+ 2 820u2.5SO
A X_1R R786 X_10K ISEN2 EC9 1+ 2 820u2.5SO A
EC27 1+ 2 820u2.5SO
EC5 1+ 2 X_470u2.5SO
23 VSUM- VSUM- R785 1R EC28 1+ 2 820u2.5SO

MICRO-START INT'L CO.,LTD.

EC54 1+ 2 X_470u2.5SO Title
APU Power
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 24 of 33
5 4 3 2 1
 5 4 3 2 1

VCC1_2REF
CPU_VDD1_2 POWER
CPU_VDD1_2 10A
D D

1.2 V@6A+4A VCC1_2REF

U57
UP0111AMA5-00_SOT23-5-HF
VCC3 1 VIN VOUT 5

VCC1_2REF C763 C694

GND
C84 R644 C4.7u6.3X8

FB
C1u10X 3 EN
+12V X_C0.1u10X 1.65K1%
C338 VCC_DDR VCC_DDR

4
R389 0.8 V
1K1%
C0.1u16X

8
U27A
VCC1_2EN 3 + Q53 Q54
D D
1 VDDP_GATE G G R635
2 - S S 3.3K1%
C620 AS358MTR-G1_SOIC8-HF N-P45N02LDG
D
VRM_PWRGD G Q19 C0.1u10X R370 N-P45N02LDG
9,23 VRM_PWRGD

4
S N-2N7002 20K Vout=0.8 x (4.95/3.3)

CP3 CPU_VDD1_2

To enable CPU_VDD1_2

1
+

+
C EC34 EC33 C
470u6.3SO 470u6.3SO

2
VCC1P1 POWER
VCC1P1 4.4A
[email protected]

VCC1_2REF +12V
C334

R379 VCC_DDR VCC_DDR

1K1% C0.1u16X
R383

8
U27B 20K

VDDA_25 0.9A
5 + Q56 Q55
B D D B
7
CPU VDDA_25 POWER R377 6 -
G

S
G

S
C341 AS358MTR-G1_SOIC8-HF N-P45N02LDG N-P45N02LDG
11K1% C0.1u10X

4
VCC5
R380 C79
R361 10R C293 C1u10X X_3.6K1% X_C0.1u16X VCC1P1

VCC3 VDDA_25 CP2

[email protected]
4

U26
3 6
CNTL

VIN VOUT

1
+
C301 C305 5 EC40
R17 NC
C1u10X C10u6.3X8 2 820u2.5SO

2
EN C299 R364 C298 C291
4.7K R2
C0.015u16X 1K1% C22u6.3X8 C22u6.3X8
GND
GND

1 POK FB 7
D5
4,23,26 APU_FM2R1
UP0104S
8
9

S-RB751V-40_SOD323-RH
0.8 V R365
Vo=0.8*(R1+R2)/R1
R1
464R1%
(1464/464)*0.8=2.524V

A A

MICRO-START INT'L CO.,LTD.

Title
FCH CORE Power
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 25 of 33
5 4 3 2 1
 5 4 3 2 1

Irms= Iout/N ND-(ND)^2 DDR III 1.5V POWER

VCC_DDR 13A+14.9A 5VDIMM

= 28/1 D16
0.3-(0.3)^2 S-BAT54C Input ripple current 12.83A CHOKE6
5VDIMM Y X +12V
5VDIMM_IN 1 2
= 12.83A

C147

C148

EC16 +

EC20 +

EC17 +
D CH-1.2u15A1.7m-RH D

C188 X_C0.1u10X
1

1
R228
2.2R/8

X_C0.1u10X
6138_VCC

2
C10u6.3X8

470u6.3SO

470u6.3SO

470u6.3SO
5

5
Q114 Q113
DDR_HG_R 4 4
C106 C1u16X8 3 3
2 2
R248 1 1
pin3 GND 2via 1R1%

5
U11 N-NTMFS4921NT1G_SO8-RH N-NTMFS4921NT1G_SO8-RH VCC_DDR
CHOKE5
DDR_BOOTR214 2.2R/8 C92 C0.1u16X
3 1 1.5V/1.35V

VCC
REFIN BOOT CH-1.1u32A1.4m-RH
8 DDR_PHASE 1 2
DDR_EN PH
7 OCP/EN
2 DDR_UG
UG

5
Q115 Q116

1
DDR_LG R254

+
6 4 4 4

GND
OCP point is 68.9A FB LG C173 EC19 EC26 EC23
3 3 2.2R/8
2 2 C1u16X6 820u2.5SO 820u2.5SO 820u2.5SO

2
D
ATX_5VSB R218 10K G Q20 UP1504 R226 1 1 CP23

9
S N-2N7002 X_41.2K1%
R654 I32-1504T02-U33 C119
1.58K1% C3300p50X
C94

C0.1u10X N-NTMFS4935NT1G_SO8-RH N-NTMFS4935NT1G_SO8-RH

C C
C97 X_C0.01u16X R219 X_0R
C

Q23
D
R240 4.7K B G R237 4.7K
9,15,22 SLP_S5# APU_FM2R1 4,23,25 R217
S DDR_FB 2K1% R222 10R
N-2N7002
E

Q22
C104 N-SST3904
X_C0.1u16X 4 VDDIOFB+ R27

ib=(3.3-0.95)/4.7=0.5
ic=(5-0.2)/10=0.48
30ib>ic

VTT_DDR 0.5A
B B
0.75V@2A VTT_DDR POWER

VCC5

place near the pin6

C263
C0.1u10X
VCC_DDR
ATX_5VSB

6
5
7
8
U25 VTT_DDR
ATX_5VSB 1

VCNTL
NC1
NC2
NC3
DDR_FB VIN

R329 X_47K R436 10K (1) LL [(1.58k+2k)/1.58k]*0.6=1.359V R347

VOUT 4
1K1%
R65 (2) HL{[(1.58k//7.87k)+2k]/(1.58k//7.87k)}*0.6=1.5V

GND
GND
R330 Q92 4.02K1% (3) LH{[(1.58k//4.08k)+2k]/(1.58k//4.08k)}*0.6=1.65V 3 REFIN
C10
NN-2N7002DW
47K (4) HH{[(1.58k//4.08k//7.87k)+2k]/(1.58k//4.08k//7.87k)}*0.6=1.81V UP0109PSW8
C22u6.3X8
15 DDR_OV2 G2 D2

2
9
DDR_FB R64 7.87K1% D1 R348
S2 1K1%
15 DDR_OV1 G1
A MODE 第一階 Default 第二階 第三階 A
S1

C99
X_C0.1u10X DDR_OV1 LOW HIGH LOW HIGH
DDR_OV2 LOW LOW HIGH HIGH
MICRO-START INT'L CO.,LTD.
VALUE 1.35V 1.5V 1.65V 1.8V Title
DDR Power
because default setup OV1:H OV2:L Size
Custom
Document Number
MS-7721
Rev
2.3
Date: Thursday, July 26, 2012 Sheet 26 of 33
5 4 3 2 1
 8 7 6 5 4 3 2 1

ATX CONNECTOR

C289 C0.1u10X JPWR1

25
ATX_5VSB
13 1 VCC5

25
VCC3 3.3V 3.3V VCC3

-12V 14 -12V 3.3V 2

R350 C285
10K C295 15 3 X_C0.1u10X R549 ATX_5VSB
GND GND
X_C0.1u10X 330R
16 4 JFP1
15 ATX_PSON# P_ON 5V VCC5 VCC5
D 17 5 R533 X_4.7K HDD+ 1 2 PWR_LED R551 D
GND GND VCC3 HDD+ PLED
C258 C250 10K
X_C1000P16X 18 6 X_C0.1u10X SATA_LED# HDD- 3 4 SUS_LED
GND 5V 10 SATA_LED# HDD- SLED
R335
19 7 4.7K 5 6 PWSW+ R550 100R
GND GND RESET- PWSW+ PSIN# 15
VCC3_SB R540 X_4.7K
20 8 R552 33R RESET+ 7 8
-5V POK ATX_PWROK 15,22 9,15 FP_RST# RESET+ PWSW-

VCC5 21 9 C232 9 C516 C511

5V 5VSB ATX_5VSB NC
C1000P16X C517 X_C0.1u10X X_C0.1u10X
22 5V +12V 10 +12V C0.1u10X
H2X5[10]M_COLORS-RH
C256 23 11 C218 R35
5V +12V C210
X_C0.1u10X X_C0.1u10X 1K
24 12 X_C0.1u16X
GND 3.3V
PWRCONN24P_BLACK-RH-2
for power issue SUS_LED
VCC3
VCC3 VCC3 C515
C277 X_C0.1u10X
X_C0.1u16X

C3 C6 PWR_LED
X_C0.1u10X X_C0.1u10X

C514
X_C0.1u10X
C FOR EMI C

For EMI

LED ( for Fintek 71868) BUZZER

VCC5
5VDIMM ATX_5VSB VCC3_SB
Ib=(VCC3_SB-Vbe)/(R535) D46 A C 1N4148 JFP2
(3.3-0.95)/1K=2.35mA SPEAKER 1
Ic=(5VDIMM-Vce)/R541 2
(5-0.2)/330=14.5mA R535 3
R538 R541 BIb>Ic 1K 4
330R/6 X_330R/6 RN21 8P4R-150R
2 1 H1X4M_BLACK-RH-1
Q69 4 3
SUS_LED 6 2 R534 4.7K 6 5
LED_VSB 15
1 8 7
PWR_LED 3 5 R528 4.7K
LED_VCC 15
4

C
NN-CMKT3904_SOT363-6-RH C671 B R754 10K1% SPKR 9
R529 X_C0.1u10X
R531 1K Q86

E
R530 Ib=(VCC3_SB-Vbe)/R529 N-SST3904
B 330R/6 X_330R/6 (3.3-0.95)/1K=2.35mA B
Ic=(5VDIMM-Vce)/R530
(5-0.2)/330=14.5mA VCC3_SB
BIb>Ic
5VDIMM ATX_5VSB

A A

MICRO-START INT'L CO.,LTD.

Title
ATX & FRONT PANEL
Size Document Number Rev
Custom MS-7721 2.3
Date: Thursday, July 26, 2012 Sheet 27 of 33
8 7 6 5 4 3 2 1
 5 4 3 2 1

HEAT SINK
Simulation
VCCP CPU_VCCP
D D
VCCP_NB CPU_VCCP_NB
FCH_HS1 X_JS3 CPU_VDDR
CPU_VDD1_2
MEC1 SIM1 VDDA_25 CPU_VDDA
MEC1
CPU3 X_PIN1*2 VCC_DDR DDR_1V5

VTT_DDR DDR_VTT
X_JS4
VCC1P1 FCH_1V1
SIM2
+1.1VDUAL FCH_1V1_S
E95-0000017-H06 X_PIN1*2
VCC3_SB FCH_3V3_S

VDD10 LAN_1V05
MEC2 MEC2

HS-0406120-RH

C C

Optics Orientation Holes

7
9 6 9 6

2 5 2 5

MH1 MH2 FM1 FM2

MANUAL PART

4
X_FM120 X_FM120
FM4 FM3

7
AVL:
D06-0100161-F52
D06-0100101-K26 9 6 9 6
B B
X_FM120 X_FM120
2 5 2 5
BAT1_X1 FM5 FM6
BAT-CR2032-RH MK1 G51-M1SPC81-F32
G51-M1SPC81-Q13 MH3 MH4

4
G51-M1SPC81-Q13
X_FM120 X_FM120
PCB1
FM8 FM7
UEFI1

7
G51-M1SPXXA-A09
X_FM120 X_FM120
9 6 9 6

PK0-0772123-G37 HDMI_LAB
2 5 2 5
PK0-0772123-G37,精成,23,寶安恩斯邁廠(MSIS) Y01-RHDMI03-000
PK0-0772123-E48,競華,23,寶安恩斯邁廠(MSIS) MH5 MH6
3

A 4 A

MICRO-START INT'L CO.,LTD.

Title
BOM OPTION
Size Document Number Rev
Custom MS-7721 2.3
Date: Friday, July 27, 2012 Sheet 28 of 33
5 4 3 2 1