OPERATIONAL AMPLIFIERS
1. OpAmps are very useful electronic components
2. We have already the tools to analyze practical circuits
using OpAmps
3. The linear models for OpAmps include dependent sources
TYPICAL DEVICE USING OP-AMPS
What is an Operational Amplifier?
• A single device which includes several Electronics
components inside (diode, transistors, etc)
• An OP-AMP consists of individual transistors and resistors
interconnected on a printed circuit board.
• Can be used for various functions by adding resistors
externally: Summing, subtracting, sign changing, scaling
• If inductors and capacitors are used, then integrator and
differentiator can be built.
• Will be investigated as a building block in this course.
• Nodal analysis and Ohm’s law will be used for the analysis
of OP-AMP
LM324 DIP
LMC6294
MAX4240
OP-AMP ASSEMBLED ON PRINTED CIRCUIT BOARD APEX PA03
DIMENSIONAL DIAGRAM LM 324
PIN OUT FOR LM324
CIRCUIT SYMBOL FOR AN OP-AMP SHOWING POWER SUPPLIES
V0 A0 (IN IN )
LINEAR MODEL OUTPUT RESISTANCE
INPUT RESISTANCE
TYPICAL VALUES
Ri : 105 1012
RO : 1 50
A0 : 105 107
GAIN
CIRCUIT WITH OPERATIONAL AMPLIFIER
LOAD
OP-AMP
DRIVING CIRCUIT
TRANSFER PLOTS FOR SOME COMERCIAL OP-AMPS
SATURATION
LINEAR REGION
REGION
OP-AMP IN SATURATION
IDENTIFY SATURATION REGIONS
CIRCUIT AND MODEL FOR UNITY GAIN
BUFFER
WHY UNIT GAIN BUFFER?
KVL : Vs Ri I RO I AOVin 0
KVL : - Vout RO I AOVin 0
CONTROLLING VARIABLE : Vin Ri I
SOLVING
Vout 1
BUFFER
GAIN Vs 1 Ri
RO AO Ri
V
AO out 1
VS
THE IDEAL OP-AMP
IDEAL RO 0, Ri , A
RO 0 vO A(v v )
Ri
i
i A
THE UNITY GAIN BUFFER – IDEAL OP-AMP ASSUMPTION
v v s vOUT vS
v v vOUT
vOUT 1
vOUT v vS
USING LINEAR (NON-IDEAL) OP-AMP MODEL WE OBTAINED
Vout 1 PERFORMANCE OF REAL OP-AMPS
Vs Ri Op-Amp BUFFER GAIN
1 LM324 0.99999
RO AO Ri LMC6492 0.9998
MAX4240 0.99995
IDEAL OP-AMP ASSUMPTION YIELDS EXCELLENT APPROXIMATION!
WHY USE THE VOLTAGE FOLLOWER OR UNITY GAIN BUFFER?
THE VOLTAGE FOLLOWER ACTS AS
v v s vO v S BUFFER AMPLIFIER
v v THE VOLTAGE FOLLOWER ISOLATES ONE
CIRCUIT FROM ANOTHER
vO v ESPECIALLY USEFUL IF THE SOURCE HAS
VERY LITTLE POWER
CONNECTION WITHOUT BUFFER CONNECTION WITH BUFFER
vO v S
THE SOURCE SUPPLIES NO POWER
THE SOURCE SUPPLIES POWER
EXAMPLE 1: Inverting op-amp configuration
Vout
APPLY KCL @ v - DETERMINE THE GAIN G
Vs
Vs 0 Vout 0
0
R1 R2
v 0
Vout R i 0
G 2
Vs R1
v 0
Ao v v v 0 FOR COMPARISON, NEXT WE EXAMINE THE SAME
CIRCUIT WITHOUT THE ASSUMPTION OF IDEAL
Ri i i 0 OP-AMP
REPLACING OP-AMPS BY THEIR LINEAR MODEL
WE USE THIS EXAMPLE TO DEVELOP
A PROCEDURE TO DETERMINE OP-AMP
CIRCUITS USING THE LINEAR MODELS
1. Identify Op Amp nodes 3. Draw components of linear OpAmp
(on circuit of step 2)
v
vo v
vo
Ri
v
v RO
A(v v )
2. Redraw the circuit cutting out
the Op Amp 4. Redraw as needed
v
R2
v
vo
v
v
INVERTING AMPLIFIER: ANALYSIS OF NON IDEAL CASE USE LINEAR ALGEBRA
NODE ANALYSIS
CONTROLLING VARIABLE IN TERMS OF NODE
VOLTAGES
vO v
R1 1k, R2 5k 4.9996994 A O 5.000
TYPICAL OP - AMP : A 105 , vS vS
Ri 108 , RO 10
SUMMARY COMPARISON: IDEAL OP-AMP AND NON-IDEAL CASE
v 0
i 0
v 0
NON-IDEAL CASE
Ri i i 0 REPLACE OP-AMP BY LINEAR MODEL
SOLVE THE RESULTING CIRCUIT WITH
A v v DEPENDENT SOURCES
KCL @ INVERTING TERMINAL GAIN FOR NON-IDEAL CASE
0 v S 0 vO v R
0 O 2
R1 R2 vs R1
THE IDEAL OP-AMP ASSUMPTION PROVIDES EXCELLENT APPROXIMATION.
(UNLESS FORCED OTHERWISE WE WILL ALWAYS USE IT!)
EXAMPLE 3: DIFFERENTIAL AMPLIFIER
THINK NODES!
OUTPUT CURRENT IS NOT KNOWN
THE OP-AMP IS DEFINED BY ITS 3 NODES. HENCE IT NEEDS 3 EQUATIONS
KCL AT V_ AND V+ YIELD TWO EQUATIONS
(INFINITE INPUT RESISTANCE IMPLIES THAT i-, i+ ARE KNOWN)
DON’T USE KCL AT OUTPUT NODE. GET THIRD EQUATION FROM INFINITE
GAIN ASSUMPTION (v+ = v-)
EXAMPLE 3: DIFFERENTIAL AMPLIFIER
IDEAL OP-AMP CONDITIONS
NODES @ INVERTING TERMINAL
R4 R4
i 0 v v2 v v2
NODES @ NON INVERTING TERMINAL
R3 R4 R3 R4
R R R R
vO 1 2 v 2 v1 2 1 1 v v1
R1 R1 R1 R2
R2
R4 R2 , R3 R1 vO (v2 v1 )
R1
EXAMPLE 4: USE IDEAL OP-AMP
v 1 FIND vO
vo1 v 1 v m 1
v 1 v 2 v m 2
FINISH WITH INPUT NODE EQUATIONS…
vm1 USE INFINTE GAIN ASSUMPTION
v 1 v 1 v 2 v 2
v 2
vm 1 v1 vm 2 v2
vo 2
v 2 USE REMAINING NODE EQUATIONS
v1 v01 v1 v 2 v1 vo 2
@ vm1 : 00
R2 RG R1
vm 2
v 2 v o 2 v 2 v1 v 2
@ vm 2 : 00
R1 RG R2
ONLY UNKWONS ARE OUTPUT NODE VOLTAGES
6 NODE EQUATIONS + 2 IDEAL OP-AMP
SOLVE FOR REQUIREDVARIABLE vo vo1
v 1 v 1
v 2 v 2
EXAMPLE 5 FIND IO . ASSUME IDEAL OP - AMP
v 12V
AO v 12V
v 12V
Ri i 0
12 Vo 12
KCL@ v : 0 Vo 84V
12 k 2k
V
IO o 8.4mA
10k
EXAMPLE 6
NONINVERTING AMPLIFIER - IDEAL OP-AMP v0
v
vo R2
v_
v vi
i 0 R1
“inverse voltage divider”
v v1
SET VOLTAGE
R1 R1 R2
vi v0 v0
v v1 v v1
vi
R1 R2 R1
INFINITE GAIN ASSUMPTION
INFINITE INPUT RESISTANCE
EXAMPLE 7: FIND GAIN AND INPUT RESISTANCE - NON IDEAL OP-AMP
v COMPLETE EQUIVALENT
vO FOR MESH ANALYSIS
vi v v
Ri
RO
v
vO
A(v v )
DETERMINE EQUIVALENT CIRCUIT
USING LINEAR MODEL FOR OP-AMP
MESH 1
NOW RE-DRAW CIRCUIT TO ENHANCE
CLARITY. THERE ARE ONLY TWO LOOPS MESH 2
CONTROLLNG VARIABLE IN TERMS OF LOOP
CURRENTS
vO R2 i2 R1 (i1 i2 )
MATHEMATICAL MODEL THE SOLUTIONS
MESH 1 i1 1 ( R1 R2 RO ) R1 v1
i ( AR R ) ( R R ) 0
2 i 1 1 2
MESH 2
R1 R2 RO ( ARi R1 )
i1 v1 i2
CONTROLLNG VARIABLE IN TERMS OF LOOP
CURRENTS
vO R2 i2 R1 (i1 i2 )
INPUT RESISTANCE v1 GAIN vO vO R1i1 ( R1 R2 )i2
Rin G
i1 vi R1 ( R1 R2 RO ) ( R R2 )( ARi R1 )
v1 1 v1
REPLACE AND PUT IN MATRIX FORM
( R1 R2 ) R1 i1 v1
AR R ( R R R ) i 0
i 1 1 2 O 2 A ???
THE FORMAL SOLUTION A AR1Ri Rin
1
i1 ( R1 R2 ) R1 v1 vO R R2
i AR R ( R R R ) 0 G 1
2 i 1 1 2 O v1 R1
( R1 R2 RO )( R1 R2 ) R1 ( ARi R1 )
( R R2 RO ) R1
Adj 1
( ARi R1 ) ( R1 R2 )
A SEMI-IDEAL OP-AMP MODEL
This is an intermediate model, more accurate than the ideal op-amp
model but simpler than the linear model used so far
Ri , RO 0, A AO i i 0 v v !!
v
ve vin Replacement Equation
v vO AO ve AO (v v )
Non-inverting amplifier and semi-ideal model
v v S vO AO R1
;
R2 R1 v S 1 AO R! R2
vO v (as before)
R1 actual gain-ideal gain 1
GE 1 A
AO (v S v ) vO (replaces v v ) ideal gain O
EXAMPLE 8
R Set voltages? v vS
v i 0 Use infinite gain assumption v vS
Use infinite input resistance assumption
v and apply KCL to inverting input
vo v
vO iS 0
R
+
iS -
vS vo vS RiS
Find the expression for Vo. Indicate
where and how you are using the Ideal
OpAmp assumptions
EXAMPLE 9 DRAW THE LINEAR EQUIVALENT CIRCUIT AND WRITE THE LOOP EQUATIONS
R
4. Redraw if necessary
v R vo
Ri RO
i2
i1 RO
vO iS
Ri
iS A(v v )
+
- A(v + - v -)
1. Locate nodes
2. Erase Op-Amp v
TWO LOOPS. ONE CURRENT SOURCE. USE MESHES
3. Place linear model
MESH 1 i1 is
MESH 2 Ri (i2 i S ) ( R RO ) i2 A(v v _ )
CONTROLLING VARIABLE v v _ Ri ( i2 i1 )
EXAMPLE 10
FIND GAIN AND VO
v VS
v _ VS
i 0
VS
“INVERSE VOLTAGE DIVIDER” VO
R2
VS
100 k 1k
VO VS
1k
V R1
G O 101
VS
VS 1mV VO 0.101V
EXAMPLE 11 UNDER IDEAL CONDITIONS BOTH CIRCUITS SATISFY
VO 8V1 4V2
If 1V V1 2V , 2V V2 3V DETERMINE IF BOTH IMPLEMENTATIONS PRODUCE THE
dc supplis are 10V FULL RANGE FOR THE OUTPUT
VX 2V1 V2
1V V1 2V , 2V V2 3V 1V VX 2V VX OK!
VO 4VX
1V VX 2V 4V VO 8V VO OK !
VY 8V1
1V V1 2V 16V VY 8V
EXCEEDS SUPPLY VALUE.
THIS OP-AMP SATURATES!
POOR IMPLEMENTATION
EXAMPLE 12
COMPARATOR CIRCUITS
Some REAL OpAmps require
a “pull up resistor.”
ZERO-CROSSING DETECTOR
LEARNING BY APPLICATION OP-AMP BASED AMMETER
NON-INVERTING AMPLIFIER
R2
G 1
R1
VI RI I
R
VO GVI 1 2 RI I
R1
LEARNING EXAMPLE DC MOTOR CONTROL - REVISITED
CHOOSE NON-INVERTING
AMPLIFIER (WITH POWER
OP-AMP PA03)
RB
1 4 (design eq.)
RA
Constraints: VM 20V
Power dissipation
in amplifier 100mW
Significant power losses
Simplifying assumptions: Ri , RO 0 Occur only in Ra, Rb
(20V )2
Worst case occurs when Vm=20 PMX 100mW RA RB 4000
RA RB
RB
3
RA
One solution: RB 3k, RA 1k
Standard values at 5%!
V1
DESIGN EXAMPLE: INSTRUMENTATION AMPLIFIER
V2
G VO
DESIGN SPECIFICATIONS
VO
G 10
V1 V2
• “HIGH INPUT RESISTENCE”
• “LOW POWER DISSIPATION”
• OPERATE FROM 2 AA BATTERIES
MAX4240
VO VX VY
ANALISIS OF PROPOSED CONFIGURATION
VA V1 ; VB V2 Infinite gain
V1 V2 V1 VX
@ A: 0 R R R R
R R1 VO V1 1 1 V2 1 2 V1 2 V2 1
V V1 V2 VY R R R R
@B: 2 0 SIMPLIFY DESIGN BY MAKING R1 R2 V 1 2 R1 (V V )
R R2
R 1
O 2
DESIGN EQUATION: 2 R1 9 R
USE LARGE RESISTORS FOR LOW POWER e. g ., R 100k , R1 R2 450k
DESIGN EXAMPLE VO
DESIGN SPECIFICATION 10
Vin
Power loss in resistors should not exceed
100mW when 2V Vin 2V
VO R2 R2 9 R1
Design equationS: 1 10
Vin R1
Max Vo is 20V
(20V )2
PR R 100mW R R 4k
R1 R2
1 2
1 2
Solve design equations (by trial and error if necessary)
R1 400
DESIGN EXAMPLE IMPLEMENT THE OPERATION VO 0.9V1 0.1V2
DESIGN CONSTRAINTS
• AS FEW COMPONENTS AS POSSIBLE
• MINIMIZE POWER DISSIPATED
• USE RESISTORS NO LARGER THAN 10K
Given the function (weighted sum
with sign change) a basic weighted
adder may work
ANALYSIS OF POSSIBLE SOLUTION
R2 9 R1 DESIGN
V 0 EQUATIONS
R R R
V V V VO V1 V2 0.1
@V :
O
0 1 2
R1 R2
R R1 1 R2 R2
R2 R1 R
SOLVE DESIGN EQUATIONS USING TRIAL AND ERROR IF NECESSARY
R2 10k ,5.6k ,...
ANALYZE EACH SOLUTION FOR OTHER CONSTRAINTS AND FACTORS; e.g.
DO WE USE ONLY STANDARD COMPONENTS?
DESIGN EXAMPLE DESIGN 4-20mA TO 0 – 5V CONVERTER
1. CONVERT CURRENT TO VOLTAGE USING A RESISTOR
I
VI RI
CANNOT GIVE DESIRED RANGE!
2. CHOOSE RESISTOR TO PROVIDE THE 5V CHANGE
… AND SHIFT LEVELS DOWN!
VMAX VMIN 50
R 312.5
I MAX I MIN 0.020 0.004
1.25 VI 6.25 MUST SHIFT DOWN BY 1.25V
(SUBSTRACT 1.25 V)
R2
V VI
R1 R2
R1
V (VO VSHIFT ) VSHIFT
R1 R2
V V VO R2 VI VSHIFT
R1
Exercise Problems
Exercise Problems
Exercise Problems
