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A B C D E

1 1

LCFC Confidential
2

CE575 NM-A871 Rev1.0 Schematic 2

AMD Bristol Ridge Processor with DDR4

R16M-M1-30 with DDR3 4GB
3 3

2016-07-20 Rev1.0

4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 COVER PAGE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 1 of 80
A B C D E
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A B C D E

AMD Bristol Ridge FP4

Memory BUS (DDR4)

R16M-M1-30 PCI-Express 4X Gen3 1DPC DDR4-SO-DIMM X2
1 Exo Pro 2G DDR3 S3 BANK 0, 1, 2, 3 1

1.2V DDR4 2400 MT/s

VRAM 256M*16 *4
USB 2.0 , port 2
AMD UP TO 16G Page 7
Page 21
int. Camera Bristol Ridge
USB 2.0 5V 480MHz
DP0
Processor USB Right 1
eDP Conn. USB 3.0 5V 5GT/s USB 3.0 Port 0
Page 25 FP4 BGA 968P USB 2.0 Port 4 Page 37
29mm * 37mm USB 3.0 5V 5GT/s
USB Right2
DP to VGA DP2 USB 2.0 5V 480MHz USB 3.0 Port 1
VGA USB 2.0 Port 5 Page 39
Page 30 Page 29
PCIe, Port 2
NGFF Card WLAN
USB 2.0 , Port 0 USB 2.0 Port 0
PCIe Port 3
Page 45

Realtek 8111GUS PCIe, Port0 USB charger

2
RJ45 Conn. USB 2.0 Port1 (AOU) 2
S/B PCIe , port 0 SB
S/B TPS2546RTER
Page 40

USB 2.0 Port3 Finger printer

Page 56
BAYHUB
OZ621FJ1LN PCIe, Port 1
JCARD Conn. SD/MMC DP1 DP MUX
PCIe port 6
HDMI Conn.
Page 46 Parade Page 28
PS8339
Page 26

SATA HDD SATA , Port 0 USB TYPE-C PD

Cypress
Page 32 CYPD2122 Page 33

ODD SATA , Port 1 I2C

Page 5-12
3 Page 42 USB 3.0 , Port 2 3
TYPEC MUX
Parade Type-C CONN
PS8743
SPI ROM USB 2.0 Port 6 USB 2.0 Port 6
8M SPI BUS Page 34 USB 3.0 Port 2
W25Q64FWSSIQ 1.8V
USB 2.0 Port6 Page 34
Page 9

TPM LPC BUS HD Audio

3.3V 33MHz
SLB9670VQ1P2
Page 53

Codec SP_OUTR/L
EC CX11852-11Z SPK Conn.
EC ROM ITE IT8586E/FX Page 48
Page 49

1M Page 52
HP_R/L_JACK
Page 52 MIC_CLK/MIC_DATA

4
G-Sensor Touch Pad Thermal Sensor Int. MIC Conn. Ext. MIC Conn. 4

Track Point Int.KBD (JLCD Conn.) HP Conn.

LIS3DSH F75303M
Page 25 S/B
Page 58 Page 54 Page 55 Page 57

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 BLOCK DIAGRAM

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 2 of 80
A B C D E
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1 1
SIGNAL
Voltage Rails ( O --> Means ON , X --> Means OFF ) STATE SLP_A# SLP_S3# SLP_S4# SLP_S5# EC_ON EC_ON2 SUSP#
+5VS
S0 HIGH HIGH HIGH HIGH ON ON ON
+3VS
Power Plane +1.5VS S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF
+3VALW +1.05VS
S4 (Suspend to Disk) LOW LOW LOW HIGH ON ON OFF
+0.6VS
OFF
+5VALW +VCC_CORE S5 (Soft OFF) LOW LOW LOW LOW ON ON
+VGA_CORE

B+ +1.8VALW +1.2V +3.3VS_VGA

+1.8VS_VGA
+2.5V +1.05VS_VGA
+1.05VALW
State USB2 Port USB3 Port PCIE Port SATA Port

Port Device Port Device Port Device Port Device

1 On Board 1 On Board 1 0 HDD

2 On Board 2 On Board 2 X 1 ODD
S0 O O O O 3 On Board 3 X 3 WLAN
2 2

4 On Board 4 On Board 4 LAN

5 On Board 5 X
S3 O O O X 6 SB 6 CardReader
7 On Board 7 X
8 On Board 8 X
S5 S4/AC Only O O X X 9 GPU
10 GPU
S5 S4 11 GPU
Battery only O X X X 12 GPU

S5 S4
AC & Battery X X X X SMBUS Control Table
don't exist
Main WLAN Thermal CP Seccurity
SOURCE VGA BATT SODIMM WiMAX Sensor PCH Module ROM LAN PHY G-Sensor TYPEC

EC_SMB_CK1 IT8580F
EC_SMB_DA1 +3VL
X V
+3VALW
X X X X X X X X X
3 3

EC_SMB_CK3 IT8580F
EC_SMB_DA3 +3VS
V X X X V V X X X V
+3VALW X
+3VS_VGA +3VS +3VALW_PCH
ZZZ1 PCB@

EC_SMB_CK2 CYPD2122
EC_SMB_DA2
IT8580F X X X X X X X X X X
NM-A871 +3VPD_VDD
DA80000ZQ00

4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 NOTE LIST

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 3 of 80
A B C D E
 WWW.AliFixit.COM
5 4 3 2 1

VGA and DDR3 Voltage Rails (JET TOPAZ R16M-M1-30 GPIO) 20151117
BOM Structure Table
GPIO I/O ACTIVE Function Description
BOM Structure NOTE
GPIO0 OUT N/A
D D
TYPEC@ For TYPEC
GPIO5 IN - GPIO5_AC_BATT
EMC_TC@ For TYPEC EMC
GPIO6 IN - GPIO6
DIS@ For GPU function
GPIO7 OUT N/A
X76@ GPU VRAM Setting
GPIO8 OUT - GPIO8_ROMSO
TPM@ Trusted Platform Module(TPM)
GPIO9 OUT - GPIO9_ROMSI
SA@ SATA redriver function
GPIO10 OUT - GPIO10_ROMSCK
RESA@ Disable SATA re-driver
GPIO11 OUT N/A
UMA@ UMA SKU ID
GPIO12 OUT N/A
DPRE@ DP re-driver function
GPIO13 OUT N/A
RE@ Disable HDMI re-driver
GPIO15 IN N/A SVI2_SVD
HD@ HDMI repeater function
GPIO16 OUT N/A
ME@ ME Connector
GPIO17 OUT N/A
ESD@ For ESD function
C GPIO19 OUT N/A GPIO19_CTF C

EMI@ For EMI function

GPIO20 IN IN SVI2_SVC
NVPRO@ For Non-VPRO function
GPIO21 OUT N/A
VPRO@ For VPRO function
GPIO22 OUT N/A GPIO22_ROMCSB
U31@ For U3 port1 redriver function
GPIO29 OUT N/A
U32@ For U3 port2 redriver function
GPIO30 OUT N/A
U33@ For U3 port3 redriver function

+3VS_VGA

+1.05VS_VGA

B
+1.8VS_VGA B

+VGA_CORE RV104 RV105

Memory (GDDR3)
+1.5VS_VGA 10us

1G SA22225SH30*4 PU 8.45K PD 2K
Samsung
RESET
2G SA000063F00*4 PU 3.4K PD 10K

1G SA00005VS10*4 PU 4.53K PD 2K
1. all power rail ramp up time should be within 20ms
Hynix
2G SA00005YL10*4 PU 4.75K NC

1G SA00005M100*4 NC PD 4.75K
Micron
Device ID 2G SA000060I00*4 PU 3.24K PD 5.62K

JET-XT 0x6664

TOPAZ XT 0x6900

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 VGA NOTE

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 4 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

UC1B

PCIE

PCIE1_CRX_DTX_P U10 R1 PCIE1_CTX_DRX_P CC1 1 2 0.1U_0402_10V7-K PCIE1_CTX_C_DRX_P

40 PCIE1_CRX_DTX_P P_GPP_RXP0 P_GPP_TXP0 PCIE1_CTX_C_DRX_P 40
LAN PCIE1_CRX_DTX_N U9 R2 PCIE1_CTX_DRX_N CC2 1 2 0.1U_0402_10V7-K PCIE1_CTX_C_DRX_N
40 PCIE1_CRX_DTX_N P_GPP_RXN0 P_GPP_TXN0 PCIE1_CTX_C_DRX_N 40LAN
PCIE2_CRX_DTX_P T6 R4 PCIE2_CTX_DRX_P CC3 1 2 0.1U_0402_10V7-K PCIE2_CTX_C_DRX_P
46 PCIE2_CRX_DTX_P P_GPP_RXP1 P_GPP_TXP1 PCIE2_CTX_C_DRX_P 46
CardReader PCIE2_CRX_DTX_N T5 R3 PCIE2_CTX_DRX_N CC4 1 2 0.1U_0402_10V7-K PCIE2_CTX_C_DRX_N
46 PCIE2_CRX_DTX_N P_GPP_RXN1 P_GPP_TXN1 PCIE2_CTX_C_DRX_N 46CardReader
PCIE3_CRX_DTX_P T9 N1 PCIE3_CTX_DRX_P CC5 1 2 0.1U_0402_10V7-K PCIE3_CTX_C_DRX_P
45 PCIE3_CRX_DTX_P PCIE3_CRX_DTX_N T8 P_GPP_RXP2 P_GPP_TXP2 N2 PCIE3_CTX_DRX_N 1 2 0.1U_0402_10V7-K PCIE3_CTX_C_DRX_N PCIE3_CTX_C_DRX_P 45
WLAN CC6
45 PCIE3_CRX_DTX_N P_GPP_RXN2 P_GPP_TXN2 PCIE3_CTX_C_DRX_N 45WLAN
P7 N4
P6 P_GPP_RXP3 P_GPP_TXP3 N3
P_GPP_RXN3 P_GPP_TXN3
C C
RC1 1 2 196_0402_0.5% P_ZVDDP U7 U6 P_ZVSS RC2 1 2 196_0402_0.5%
+1.05VS_VDDP P_ZVDDP P_ZVSS/P_RX_ZVDDP

PCIE_CRX_GTX_P0 P10 M2 PCIE_CTX_GRX_P0

PCIE_CRX_GTX_N0 P9 P_GFX_RXP0 P_GFX_TXP0 M1 PCIE_CTX_GRX_N0
P_GFX_RXN0 P_GFX_TXN0
PCIE_CRX_GTX_P1 N6 L1 PCIE_CTX_GRX_P1
PCIE_CRX_GTX_N1 N5 P_GFX_RXP1 P_GFX_TXP1 L2 PCIE_CTX_GRX_N1
P_GFX_RXN1 P_GFX_TXN1
PCIE_CRX_GTX_P2 N9 L4 PCIE_CTX_GRX_P2
PCIE_CRX_GTX_N2 N8 P_GFX_RXP2 P_GFX_TXP2 L3 PCIE_CTX_GRX_N2
P_GFX_RXN2 P_GFX_TXN2
PCIE_CRX_GTX_P3 L7 J1 PCIE_CTX_GRX_P3
PCIE_CRX_GTX_N3 L6 P_GFX_RXP3 P_GFX_TXP3 J2 PCIE_CTX_GRX_N3
P_GFX_RXN3 P_GFX_TXN3
L10 J4
L9 P_GFX_RXP4 P_GFX_TXP4 J3
P_GFX_RXN4 P_GFX_TXN4
K6 H2 PCIE_CTX_GRX_N[0..3]
K5 P_GFX_RXP5 P_GFX_TXP5 H1 PCIE_CTX_GRX_N[0..3] 16
P_GFX_RXN5 P_GFX_TXN5
PCIE_CTX_GRX_P[0..3]
K9 G1 PCIE_CTX_GRX_P[0..3] 16
K8 P_GFX_RXP6 P_GFX_TXP6 G2 PCIE_CRX_GTX_N[0..3]
B B
P_GFX_RXN6 P_GFX_TXN6 PCIE_CRX_GTX_N[0..3] 16
J7 G4 PCIE_CRX_GTX_P[0..3]
J6 P_GFX_RXP7 P_GFX_TXP7 G3 PCIE_CRX_GTX_P[0..3] 16
P_GFX_RXN7 P_GFX_TXN7

FP4 REV 0.93

BRISTOL FM980PADY44AB-BGA968

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 APU PEG/PCIe
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 5 of 80
5 4 3 2 1

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DDRA_MA_DM[0..7] 14

DDR_A_DQS#[0..7] 14

DDR_A_DQS[0..7] 14

DDR_A_D[0..63] 14
UC1A
DDR_A_MA[0..13] 14
MEMORY A
DDR_A_MA0 AE28 H17 DDR_A_D0
DDR_A_MA1 Y27 MA_ADD0 MA_DATA0 J17 DDR_A_D1
DDR_A_MA2 Y29 MA_ADD1 MA_DATA1 F20 DDR_A_D2
DDR_A_MA3 Y26 MA_ADD2 MA_DATA2 H20 DDR_A_D3
A DDR_A_MA4 W28 MA_ADD3 MA_DATA3 E17 DDR_A_D4 A
DDR_A_MA5 W29 MA_ADD4 MA_DATA4 F17 DDR_A_D5
DDR_A_MA6 W26 MA_ADD5 MA_DATA5 K18 DDR_A_D6
DDR_A_MA7 U29 MA_ADD6 MA_DATA6 E20 DDR_A_D7
DDR_A_MA8 W25 MA_ADD7 MA_DATA7
DDR_A_MA9 U26 MA_ADD8 A21 DDR_A_D8
DDR_A_MA10 AG29 MA_ADD9 MA_DATA8 C21 DDR_A_D9
DDR_A_MA11 U27 MA_ADD10 MA_DATA9 C23 DDR_A_D10
DDR_A_MA12 T28 MA_ADD11 MA_DATA10 D23 DDR_A_D11
DDR_A_MA13 AK26 MA_ADD12 MA_DATA11 B20 DDR_A_D12
DDR_A_BG1 T26 MA_ADD13 MA_DATA12 B21 DDR_A_D13
14 DDR_A_BG1 DDR_A_ACT_N T25 MA_ADD14/MA_BG1 MA_DATA13 B23 DDR_A_D14
14 DDR_A_ACT_N MA_ADD15/MA_ACT_L MA_DATA14 A23 DDR_A_D15
MA_DATA15
G22 DDR_A_D16
DDR_A_BA0 AG26 MA_DATA16 H22 DDR_A_D17
14 DDR_A_BA0 DDR_A_BA1 AG27 MA_BANK0 MA_DATA17 E25 DDR_A_D18
14 DDR_A_BA1 DDR_A_BG0 T29 MA_BANK1 MA_DATA18 G25 DDR_A_D19
14 DDR_A_BG0 MA_BANK2/MA_BG0 MA_DATA19 J20 DDR_A_D20
DDRA_MA_DM0 E19 MA_DATA20 E22 DDR_A_D21
DDRA_MA_DM1 D21 MA_DM0 MA_DATA21 H23 DDR_A_D22
DDRA_MA_DM2 K21 MA_DM1 MA_DATA22 J23 DDR_A_D23
DDRA_MA_DM3 F29 MA_DM2 MA_DATA23
DDRA_MA_DM4 AP28 MA_DM3 F26 DDR_A_D24
DDRA_MA_DM5 AV26 MA_DM4 MA_DATA24 E27 DDR_A_D25
DDRA_MA_DM6 AR22 MA_DM5 MA_DATA25 J26 DDR_A_D26
DDRA_MA_DM7 BC22 MA_DM6 MA_DATA26 J27 DDR_A_D27
K29 MA_DM7 MA_DATA27 H25 DDR_A_D28
MA_DM8 MA_DATA28 E26 DDR_A_D29
DDR_A_DQS0 H19 MA_DATA29 G28 DDR_A_D30
DDR_A_DQS#0 G19 MA_DQS_H0 MA_DATA30 G29 DDR_A_D31
DDR_A_DQS1 B22 MA_DQS_L0 MA_DATA31
B DDR_A_DQS#1 A22 MA_DQS_H1 AN26 DDR_A_D32 B
DDR_A_DQS2 F23 MA_DQS_L1 MA_DATA32 AP29 DDR_A_D33
DDR_A_DQS#2 E23 MA_DQS_H2 MA_DATA33 AR26 DDR_A_D34
DDR_A_DQS3 G27 MA_DQS_L2 MA_DATA34 AP24 DDR_A_D35
DDR_A_DQS#3 F27 MA_DQS_H3 MA_DATA35 AN29 DDR_A_D36
DDR_A_DQS4 AP25 MA_DQS_L3 MA_DATA36 AN27 DDR_A_D37
DDR_A_DQS#4 AP26 MA_DQS_H4 MA_DATA37 AR29 DDR_A_D38
DDR_A_DQS5 AW27 MA_DQS_L4 MA_DATA38 AR27 DDR_A_D39
DDR_A_DQS#5 AV27 MA_DQS_H5 MA_DATA39
DDR_A_DQS6 AV22 MA_DQS_L5 AU26 DDR_A_D40
DDR_A_DQS#6 AU22 MA_DQS_H6 MA_DATA40 AV29 DDR_A_D41
DDR_A_DQS7 BA21 MA_DQS_L6 MA_DATA41 AU25 DDR_A_D42
DDR_A_DQS#7 AY21 MA_DQS_H7 MA_DATA42 AW25 DDR_A_D43
L27 MA_DQS_L7 MA_DATA43 AU29 DDR_A_D44
L26 MA_DQS_H8 MA_DATA44 AU28 DDR_A_D45
MA_DQS_L8 MA_DATA45 AW26 DDR_A_D46
SA_CLK_DDR0 AE25 MA_DATA46 AT25 DDR_A_D47
14 SA_CLK_DDR0 SA_CLK_DDR#0 AE26 MA_CLK_H0 MA_DATA47
14 SA_CLK_DDR#0 SA_CLK_DDR1 AD26 MA_CLK_L0 AV23 DDR_A_D48
14 SA_CLK_DDR1 SA_CLK_DDR#1 AD27 MA_CLK_H1 MA_DATA48 AW23 DDR_A_D49
14 SA_CLK_DDR#1 AB28 MA_CLK_L1 MA_DATA49 AV20 DDR_A_D50
AB29 MA_CLK_H2 MA_DATA50 AW20 DDR_A_D51
AB25 MA_CLK_L2 MA_DATA51 AR23 DDR_A_D52
AB26 MA_CLK_H3 MA_DATA52 AT23 DDR_A_D53
MA_CLK_L3 MA_DATA53 AR20 DDR_A_D54
DDR4_A_DRAMRST# N29 MA_DATA54 AT20 DDR_A_D55
14 DDR4_A_DRAMRST# DDR_A_EVENT# MA_RESET_L MA_DATA55
AE29
14 DDR_A_EVENT# MA_EVENT_L DDR_A_D56
BB23
DDR_A_CKE0 P27 MA_DATA56 BB22 DDR_A_D57
14 DDR_A_CKE0 DDR_A_CKE1 P29 MA_CKE0 MA_DATA57 BB20 DDR_A_D58
14 DDR_A_CKE1 MA_CKE1 MA_DATA58 AY19 DDR_A_D59
MA_DATA59 BA23 DDR_A_D60
C MA_DATA60 BC23 DDR_A_D61 C
DDR_A_ODT0 AK27 MA_DATA61 BC21 DDR_A_D62
14 DDR_A_ODT0 DDR_A_ODT1 AL26 MA0_ODT0 MA_DATA62 BB21 DDR_A_D63
14 DDR_A_ODT1 AH25 MA0_ODT1 MA_DATA63
AL25 MA1_ODT0 K26
MA1_ODT1 MA_CHECK0 K28
DDR_A_CS0# AH26 MA_CHECK1 N26
14 DDR_A_CS0# DDR_A_CS1# MA0_CS_L0 MA_CHECK2
AL29 N28
14 DDR_A_CS1# AH29 MA0_CS_L1 MA_CHECK3 J29
AL28 MA1_CS_L0 MA_CHECK4 K25
+1.2V MA1_CS_L1 MA_CHECK5 L29
MA_CHECK6 N25
DDR_A_RAS# AG24 MA_CHECK7
14 DDR_A_RAS# MA_RAS_L/MA_RAS_L_ADD16
1

DDR_A_CAS# AK29
14 DDR_A_CAS# DDR_A_WE# AH28 MA_CAS_L/MA_CAS_L_ADD15
@ RC3
14 DDR_A_WE# MA_WE_L/MA_WE_L_ADD14
1K_0402_1%
RC4
TP956 1 +VREF_DQA B19 AD29 MA_ZVDDIO 2 1
+1.2V
2

CC9 CC10 M_VREF T32 MA_VREFDQ MA_ZVDDIO_MEM_S

M_VREF 39.2_0402_1%
Test_Point_20MIL FP4 REV 0.93
0.1U_0402_10V7-K

1000P_0402_50V7-K
1

@ 1 1 BRISTOL FM980PADY44AB-BGA968
RC5 @
@ 1K_0402_1%
2 2
2

D D

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 APU DDRA/1

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 6 of 80
1 2 3 4 5
 WWW.AliFixit.COM
1 2 3 4 5

DDRA_MB_DM[0..7] 15

DDR_B_DQS#[0..7] 15

DDR_B_DQS[0..7] 15

DDR_B_D[0..63] 15
UC1I
DDR_B_MA[0..13] 15
MEMORY B
A DDR_B_MA0 AG31 A25 DDR_B_D0 A
DDR_B_MA1 AC30 MB_ADD0 MB_DATA0 C25 DDR_B_D1
DDR_B_MA2 AC31 MB_ADD1 MB_DATA1 C27 DDR_B_D2
DDR_B_MA3 AB32 MB_ADD2 MB_DATA2 D27 DDR_B_D3
DDR_B_MA4 AA32 MB_ADD3 MB_DATA3 B24 DDR_B_D4
DDR_B_MA5 AA33 MB_ADD4 MB_DATA4 B25 DDR_B_D5
DDR_B_MA6 AA31 MB_ADD5 MB_DATA5 B27 DDR_B_D6
DDR_B_MA7 Y33 MB_ADD6 MB_DATA6 A27 DDR_B_D7
DDR_B_MA8 AA30 MB_ADD7 MB_DATA7
DDR_B_MA9 W32 MB_ADD8 A29 DDR_B_D8
DDR_B_MA10 AG32 MB_ADD9 MB_DATA8 C29 DDR_B_D9
DDR_B_MA11 Y32 MB_ADD10 MB_DATA9 B32 DDR_B_D10
DDR_B_MA12 W33 MB_ADD11 MB_DATA10 D32 DDR_B_D11
DDR_B_MA13 AL31 MB_ADD12 MB_DATA11 B28 DDR_B_D12
DDR_B_BG1 W30 MB_ADD13 MB_DATA12 B29 DDR_B_D13
15 DDR_B_BG1 DDR_B_ACT_N V32 MB_ADD14/MB_BG1 MB_DATA13 A31 DDR_B_D14
15 DDR_B_ACT_N MB_ADD15/MB_ACT_L MB_DATA14 C31 DDR_B_D15
MB_DATA15
E30 DDR_B_D16
DDR_B_BA0 AH32 MB_DATA16 E31 DDR_B_D17
15 DDR_B_BA0 DDR_B_BA1 AG33 MB_BANK0 MB_DATA17 G33 DDR_B_D18
15 DDR_B_BA1 DDR_B_BG0 W31 MB_BANK1 MB_DATA18 G32 DDR_B_D19
15 DDR_B_BG0 MB_BANK2/MB_BG0 MB_DATA19 C33 DDR_B_D20
DDRA_MB_DM0 D25 MB_DATA20 D33 DDR_B_D21
DDRA_MB_DM1 D29 MB_DM0 MB_DATA21 G30 DDR_B_D22
DDRA_MB_DM2 E33 MB_DM1 MB_DATA22 G31 DDR_B_D23
DDRA_MB_DM3 J33 MB_DM2 MB_DATA23
DDRA_MB_DM4 AR30 MB_DM3 J30 DDR_B_D24
DDRA_MB_DM5 AW30 MB_DM4 MB_DATA24 J31 DDR_B_D25
DDRA_MB_DM6 BC30 MB_DM5 MB_DATA25 L33 DDR_B_D26
DDRA_MB_DM7 BC26 MB_DM6 MB_DATA26 L32 DDR_B_D27
N33 MB_DM7 MB_DATA27 H32 DDR_B_D28
B MB_DM8 MB_DATA28 H33 DDR_B_D29 B
DDR_B_DQS0 B26 MB_DATA29 L30 DDR_B_D30
DDR_B_DQS#0 A26 MB_DQS_H0 MB_DATA30 L31 DDR_B_D31
DDR_B_DQS1 B30 MB_DQS_L0 MB_DATA31
DDR_B_DQS#1 A30 MB_DQS_H1 AN31 DDR_B_D32
DDR_B_DQS2 F32 MB_DQS_L1 MB_DATA32 AP32 DDR_B_D33
DDR_B_DQS#2 E32 MB_DQS_H2 MB_DATA33 AT32 DDR_B_D34
DDR_B_DQS3 K32 MB_DQS_L2 MB_DATA34 AU32 DDR_B_D35
DDR_B_DQS#3 J32 MB_DQS_H3 MB_DATA35 AN33 DDR_B_D36
DDR_B_DQS4 AR32 MB_DQS_L3 MB_DATA36 AN32 DDR_B_D37
DDR_B_DQS#4 AR33 MB_DQS_H4 MB_DATA37 AR31 DDR_B_D38
DDR_B_DQS5 AW32 MB_DQS_L4 MB_DATA38 AT33 DDR_B_D39
DDR_B_DQS#5 AW33 MB_DQS_H5 MB_DATA39
DDR_B_DQS6 BA29 MB_DQS_L5 AU30 DDR_B_D40
DDR_B_DQS#6 AY29 MB_DQS_H6 MB_DATA40 AV32 DDR_B_D41
DDR_B_DQS7 BA25 MB_DQS_L6 MB_DATA41 BA33 DDR_B_D42
DDR_B_DQS#7 AY25 MB_DQS_H7 MB_DATA42 AY32 DDR_B_D43
P32 MB_DQS_L7 MB_DATA43 AU33 DDR_B_D44
N32 MB_DQS_H8 MB_DATA44 AU31 DDR_B_D45
MB_DQS_L8 MB_DATA45 AW31 DDR_B_D46
SB_CLK_DDR0 AE33 MB_DATA46 AY33 DDR_B_D47
15 SB_CLK_DDR0 SB_CLK_DDR#0 AE32 MB_CLK_H0 MB_DATA47
15 SB_CLK_DDR#0 SB_CLK_DDR1 AE30 MB_CLK_L0 BC31 DDR_B_D48
15 SB_CLK_DDR1 SB_CLK_DDR#1 AE31 MB_CLK_H1 MB_DATA48 BB30 DDR_B_D49
15 SB_CLK_DDR#1 AD32 MB_CLK_L1 MB_DATA49 BB28 DDR_B_D50
AD33 MB_CLK_H2 MB_DATA50 AY27 DDR_B_D51
AC33 MB_CLK_L2 MB_DATA51 BB32 DDR_B_D52
AC32 MB_CLK_H3 MB_DATA52 BA31 DDR_B_D53
MB_CLK_L3 MB_DATA53 BC29 DDR_B_D54
DDR4_B_DRAMRST# T33 MB_DATA54 BB29 DDR_B_D55
15 DDR4_B_DRAMRST# DDR_B_EVENT# AG30 MB_RESET_L MB_DATA55
15 DDR_B_EVENT# MB_EVENT_L BB27 DDR_B_D56
C DDR_B_CKE0 U32 MB_DATA56 BB26 DDR_B_D57 C
15 DDR_B_CKE0 DDR_B_CKE1 U33 MB_CKE0 MB_DATA57 BB24 DDR_B_D58
15 DDR_B_CKE1 MB_CKE1 MB_DATA58 AY23 DDR_B_D59
MB_DATA59 BA27 DDR_B_D60
MB_DATA60 BC27 DDR_B_D61
DDR_B_ODT0 AL30 MB_DATA61 BC25 DDR_B_D62
15 DDR_B_ODT0 DDR_B_ODT1 AM32 MB0_ODT0 MB_DATA62 BB25 DDR_B_D63
15 DDR_B_ODT1 AJ32 MB0_ODT1 MB_DATA63
AM33 MB1_ODT0 N30
MB1_ODT1 MB_CHECK0 N31
DDR_B_CS0# AJ33 MB_CHECK1 R33
15 DDR_B_CS0# DDR_B_CS1# AL32 MB0_CS_L0 MB_CHECK2 R32
15 DDR_B_CS1# AJ30 MB0_CS_L1 MB_CHECK3 M32
AL33 MB1_CS_L0 MB_CHECK4 M33
MB1_CS_L1 MB_CHECK5 R30
MB_CHECK6 R31
DDR_B_RAS# AH33 MB_CHECK7
15 DDR_B_RAS# DDR_B_CAS# AK32 MB_RAS_L/MB_RAS_L_ADD16
15 DDR_B_CAS# DDR_B_WE# AJ31 MB_CAS_L/MB_CAS_L_ADD15
15 DDR_B_WE# MB_WE_L/MB_WE_L_ADD14
TP955
RC6
1 +VREF_DQB A19 AF32 MB_ZVDDIO 2 1
MB_VREFDQ MB_ZVDDIO_MEM_S +1.2V
39.2_0402_1%
Test_Point_20MIL FP4 REV 0.93

BRISTOL FM980PADY44AB-BGA968

D D

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 APU DDRB/2

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 7 of 80
1 2 3 4 5
 WWW.AliFixit.COM
1 2 3 4 5

+3VS

UC1C

2
DP2 USED FOR VGA ON 15" DISPLAY/SVI2/JTAG/TEST
RC7
2.2K_0402_5%
DDI2_VGA_TX0+ B6 A9 DP_ZVSS RC8 1 2 2K_0402_1%
29 DDI2_VGA_TX0+

1
DP2_TXP0 DP_ZVSS RC11

2
DDI2_VGA_TX0- A6 B9 DP_AUX_ZVSS RC9 1 2 150_0402_1%
29 DDI2_VGA_TX0- DP2_TXN0 DP_AUX_ZVSS APU_ENBKL_R
G5 RC10
VGA DDI2_VGA_TX1+ D7 DP_BLON G6 APU_ENVDD 100K_0402_5% 1
@
2
29 DDI2_VGA_TX1+ DDI2_VGA_TX1- DP2_TXP1 DP_DIGON APU_EDP_PWM_R APU_ENVDD 25 ENBKL 52
C7 F11
29 DDI2_VGA_TX1- DP2_TXN1 DP_VARY_BL 0_0402_5%
A A
DP2 USED FOR VGA ON 15"

1
A7
DP2_TXP2

1
B7 H9 PCH_VGA_AUX QCC1 D
DP2_TXN2 DP2_AUXP PCH_VGA_AUX# PCH_VGA_AUX 29
G9 2
DP2_AUXN PCH_VGA_HPD PCH_VGA_AUX# 29
D9 E9 G
DP2_TXP3 DP2_HPD PCH_VGA_HPD 29
DP1 USED FOR TYPE C/ HDMI ON 15" C9
DP2_TXN3

1
F7 APU_MUX_AUX RC12 C S 2N7002WT1G_SC-70-3
APU_MUX_AUX 26

3
APU_MUX_TX0+ A2 DP1_AUXP E7 APU_MUX_AUX# APU_ENBKL_R 1 2 2
26 APU_MUX_TX0+ APU_MUX_TX0- DP1_TXP0 DP1_AUXN APU_MUX_HPD APU_MUX_AUX# 26
A3 F5 B
26 APU_MUX_TX0- DP1_TXN0 DP1_HPD APU_MUX_HPD 26 E
2.2K_0402_5%

3
2
APU_MUX_TX1+ B4 F8 CPU_EDP_AUX QC1
26 APU_MUX_TX1+ APU_MUX_TX1- DP1_TXP1 DP0_AUXP CPU_EDP_AUX# CPU_EDP_AUX 25
A4 E8 RC13
26 APU_MUX_TX1- DP1_TXN1 DP0_AUXN CPU_EDP_HPD CPU_EDP_AUX# 25
G8 100K_0402_5% SB000010U00
TYPE C/ HDMI APU_MUX_TX2+ D5 DP0_HPD CPU_EDP_HPD 25 MLMBT3904WT1G NPN SOT323-3
26 APU_MUX_TX2+ APU_MUX_TX2- DP1_TXP2
C5 K24
26 APU_MUX_TX2-

1
DP1_TXN2 RSVD_1 E15
APU_MUX_TX3+ A5 TEMPIN0 E14 Remove main source LRC to SB000010U00 4/19 +3VS
26 APU_MUX_TX3+ APU_MUX_TX3- DP1_TXP3 TEMPIN1
B5 E12
26 APU_MUX_TX3- DP1_TXN3 TEMPIN2 F14
CPU_EDP_TX0+ E2 TEMPINRETURN AK24 APU_TEST410 TPC1 1 Test_Point_20MIL
25 CPU_EDP_TX0+ DP0_TXP0 TEST410

2
CPU_EDP_TX0- E1 AL24 APU_TEST411 TPC2 1 Test_Point_20MIL
25 CPU_EDP_TX0- DP0_TXN0 TEST411 APU_TEST4
P24 TPC3 1 Test_Point_20MIL RC14
eDP CPU_EDP_TX1+ E3 TEST4 N24 APU_TEST5 TPC4 1 Test_Point_20MIL 4.7K_0402_5%
25 CPU_EDP_TX1+ DP0_TXP1 TEST5

2
CPU_EDP_TX1- E4 AN24 APU_TEST6 TPC5 1 Test_Point_20MIL
25 CPU_EDP_TX1- DP0_TXN1 TEST6 APU_TEST9
AB8 TPC6 1 Test_Point_20MIL RC15

1
D1 TEST9 Y9 APU_TEST10 TPC7 1 Test_Point_20MIL
DP0_TXP2 TEST10 47K_0402_5%
D2 B10 APU_TEST14 RC16 1 @ 2 1K_0402_1%
DP0_TXN2 TEST14 APU_TEST15 APU_EDP_PWM 25
D11 TPC8 1 Test_Point_20MIL

1
C1 TEST15 A10 APU_TEST16 RC17 1 @ 2 1K_0402_1%
DP0_TXP3 TEST16

1
For AMD check list,15/03/02 B1 C11 APU_TEST17 RC18 1 @ 2 1K_0402_1% D
DP0_TXN3 TEST17 B11 APU_TEST11 RC19 1 2 1K_0402_1% 2 2N7002WT1G_1N_SC-70-3
@ 0_0402_5% @
Check PWR net and APU_SVT RC392 1 2 APU_SVT_R C15 TEST11 A14 APU_TEST18 RC20 1 2 1K_0402_1% G QC2 SB00000YY00
70 APU_SVT APU_SVC SVT0 TEST18
connect to Core PWR IC. reserve boot voltage RC21 1 2 33_0402_5% APU_SVC_R D17 B14 APU_TEST19 RC22 1 2 1K_0402_1% S
70 APU_SVC

3
SVC0 TEST19

1
on power side APU_SVD RC23 1 2 33_0402_5% APU_SVD_R D19 For Debug~ RC24 C
70 APU_SVD SVD0 Change from SB00000YM00 to SB00000YY00 4/25
APU_EDP_PWM_R 1 2 2
B @ B
Check PWR net and APU_GFX_SVT RC393 1 2 0_0402_5% APU_GFX_SVT_R B15 A13 APU_TEST28_H TPC9 1 Test_Point_20MIL B
71 APU_GFX_SVT SVT1 TEST28_H
connect to VGA_CORE PWR IC. reserve boot voltage RC25 1 2 33_0402_5%APU_GFX_SVC_R B16 B13 APU_TEST28_L TPC10 1 Test_Point_20MIL 2.2K_0402_5% E
71 APU_GFX_SVC

3
SVC1 TEST28_L

2
on power side RC26 1 2 33_0402_5%APU_GFX_SVD_R A18 P26 APU_TEST31 TPC11 1 Test_Point_20MIL QC3
71 APU_GFX_SVD SVD1 TEST31 DP_STEREOSYNC
E11 TPC31 RC27
APU_SIC B18 DP_STEREOSYNC/TEST36 A17 APU_TEST37 SB000010U00
SIC TEST37 Test_Point_20MIL 4.7K_0402_5% MLMBT3904WT1G NPN SOT323-3
+1.8VS APU_SID C17 TPC29
SID TPC30 Test_Point_20MIL

1
APU_RESET# D15 Test_Point_20MIL
RESET_L

1
RC28 1 2 300_0402_5% APU_RESET# APU_PWROK C19 Remove main source LRC to SB000010U00 4/19
70 APU_PWROK PWROK

1
APU_PWROK APU_PROCHOT#

1
RC29 1 2 300_0402_5% A15
APU_ALERT# B17 PROCHOT_L
ALERT_L H11 VDDCR_GFX_SENSE
APU_TDI VDDCR_GFX_SENSE VDDNB_SENSE VDDCR_GFX_SENSE 71
H15 J12
APU_TDO TDI VDDCR_NB_SENSE VDD_SENSE VDDNB_SENSE 70
H14 G12
APU_RESET# APU_TCK TDO VDDCR_CPU_SENSE VDDP_SENSE VDD_SENSE 70
D13 AY18 TPC15 1 Test_Point_20MIL
APU_TMS G15 TCK VDDP_SENSE Connect to PWR IC sense pin.
APU_PWROK APU_TRST# J14 TMS H12 VSS_SENSE +1.8VS
APU_DBRDY TRST_L VSS_SENSE VSS_SENSE 70
C13
APU_DBREQ# A11 DBRDY
DBREQ_L
1 1
@ @ @
CC11 CC12 RC3941 2
GFX_VSS_SENSE 71

1
0.1U_0402_10V7-K 0.1U_0402_10V7-K FP4 REV 0.93
0_0402_5%
2 2 20150304 @
BRISTOL FM980PADY44AB-BGA968 RC31 @ RC32 RC33
1K_0402_1% 1K_0402_1% 39.2_0402_1%

2
+1.8VS DP_STEREOSYNC
APU_TEST37
RPC7 APU_TEST31

1 8 APU_TRST#
2 7 APU_TCK

1
C 3 6 APU_TMS C
4 5 APU_TDI @ @ @
+1.8VS RC34 RC35 RC36
1K_0804_8P4R_5% JHDT1 1K_0402_1% 1K_0402_1% 39.2_0402_1%
1 2 APU_TCK

2
1 2
3 4 APU_TMS
3 4
+1.8VS RC37 1 @ +1.8VS
5 6 2 APU_TDI
5 6 +1.8VS
0_0402_5%
RPC8 7 8 APU_TDO
7 8
@

2
1 8 APU_SIC APU_TRST# RC38 1 2 33_0402_5% 9 10 APU_PWROK
9 10

2
2 7 APU_ALERT# RC39
APU_SID
.01U_0402_16V7-K

3 6 11 12 APU_RESET# 1K_0402_1%
1 11 12
4 5 APU_PROCHOT# RC388
CC14 13 14 APU_DBRDY 1K_0402_1%

1
1K_0804_8P4R_5% 13 14
@ @

1
2 15 16 RC41 1 2 33_0402_5% APU_DBREQ#
15 16
17 18 APU_TEST19 1 Cap close to JHDT.16
RP3 17 18
Cap close to JHDT.9 19 20 APU_TEST18 @ CC15
1 8 19 20 .01U_0402_16V7-K
2 7 2
3 6

2
4 5 SAMTE_ASP-136446-07-B

G
ME@
1K_0804_8P4R_5% EC_SMB_CK3 1 3 APU_SIC
17,52,57,58 EC_SMB_CK3

S
@

2
+1.8VS LBSS138LT1G_SOT-23-3

G
QC4
EC_SMB_DA3 1 3 APU_SID
+3VS 17,52,57,58 EC_SMB_DA3
1

S
D Connect to EC pin 94 & 95, GPU, D
Thermal sensor, pull up +3VS. LBSS138LT1G_SOT-23-3
RC171
10K_0402_5% QC5 20150520
1

RC43
10K_0402_5%
RC385
2
B

Security Classification LC Future Center Secret Data Title

2

52,67,70,71 VR_HOT# @
VR_HOT# 2 H_PROCHOT#
E

1 3 1 APU_PROCHOT#
Issued Date 2015/10/5 Deciphered Date 2016/10/31 APU DISPLAY/CLK/MISC
C

0_0402_5% QC6
MLMBT3904WT1G NPN SOT323-3 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

WWW.ALISALER.COM
Remove main source LRC to SB000010U00 4/19 SB000010U00 DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 8 of 80

1 2 3 4 5
 WWW.AliFixit.COM
5 4 3 2 1

UC1E

CLK/SATA/USB/SPI/LPC
SATA_CTX_DRX_P0 AU3 AP8
32 SATA_CTX_DRX_P0 SATA_CTX_DRX_N0 AU4 SATA_TX0P USBCLK/25M_48M_OSC 20151118 change USB charge port
32 SATA_CTX_DRX_N0 SATA_TX0N AP5 USB_ZVSS RC47 1 2 11.8K_0402_1%
HDD SATA_CRX_DTX_N0 AV1 USB_ZVSS
D 32 SATA_CRX_DTX_N0 SATA_CRX_DTX_P0 SATA_RX0N USB20_P0 D
AV2 AR2
32 SATA_CRX_DTX_P0 SATA_RX0P USB_HSD0P USB20_N0 USB20_P0 45
AR1
SATA_FTX_DRX_P1 AY2 USB_HSD0N USB20_N0 45 NGFF Card WLAN
42 SATA_FTX_DRX_P1 SATA_FTX_DRX_N1 SATA_TX1P USB20_P1
AY1 AR3
42 SATA_FTX_DRX_N1 SATA_TX1N USB_HSD1P AR4 USB20_N1 USB20_P1 40 Port 1 Left (AOU)
ODD SATA_FRX_DTX_N1 AW4 USB_HSD1N USB20_N1 40
42 SATA_FRX_DTX_N1 SATA_FRX_DTX_P1 AW3 SATA_RX1N AN2 USB20_P2
42 SATA_FRX_DTX_P1 SATA_RX1P USB_HSD2P AN1 USB20_N2 USB20_P2 25 Int. Camera
USB_HSD2N USB20_N2 25
1K_0402_1% 2 1 RC44 SATA_ZVSS AW1
+3VS SATA_ZVSS
+1.05VS_VDDP 1K_0402_1% 2 1 RC45 SATA_ZVDDP AW2 AN3 USB20_P3
HDD_DEVSLP0 AT17 SATA_ZVDDP USB_HSD3P AN4 USB20_N3 USB20_P3 56 Finger printer
1 @ 2 HDD_DEVSLP0 32 HDD_DEVSLP0 2 1 RC416 AT12 DEVSLP0/EGPIO67 USB_HSD3N USB20_N3 56
RC128 10K_0402_5% 10K_0402_5%
10K_0402_5% 2 1 RC415 BB15 DEVSLP1/EGPIO70 AM1 USB20_P4
SATA_ACT_L/AGPIO130 USB_HSD4P USB20_P4 37
AU2 USB_HSD4N
AM2 USB20_N4
USB20_N4 37 Port1 Right 1
SATA_X1 AL2 USB20_P5
USB_HSD5P USB20_N5 USB20_P5 39
AMD Request @1203 USB_HSD5N
AL1
USB20_N5 39 Port2 Right 2
AU1 AL3 USB20_P6
SATA_X2 USB_HSD6P USB20_P6 34
USB_HSD6N
AL4 USB20_N6
USB20_N6 34 TYPE C
GFX_CLKP RC387 @ GFX_CLKP_R
1 2 0_0402_5% U4 AK2
16 GFX_CLKP GFX_CLKN RC386 @ GFX_CLKN_R GFX_CLKP USB_HSD7P
1 2 0_0402_5% U3 AJ2
16 GFX_CLKN GFX_CLKN USB_HSD7N
CLK_PCIE_LAN RC49 @ CLK_PCIE_LAN_R
1 2 0_0402_5% U1
40 CLK_PCIE_LAN CLK_PCIE_LAN# RC50 @ CLK_PCIE_LAN#_R U2 GPP_CLK0P
1 2 0_0402_5%
40 CLK_PCIE_LAN# GPP_CLK0N
CLK_PCIE_CR RC51 @ CLK_PCIE_CR_R
1 2 0_0402_5% W4
46 CLK_PCIE_CR CLK_PCIE_CR# RC52 @ CLK_PCIE_CR_R# GPP_CLK1P
1 2 0_0402_5% W3
46 CLK_PCIE_CR# GPP_CLK1N
CLK_PCIE_WLAN RC53 @ CLK_PCIE_WLAN_R
1 2 0_0402_5% W1
45 CLK_PCIE_WLAN CLK_PCIE_WLAN# RC54 @ CLK_PCIE_WLAN#_R GPP_CLK2P
1 2 0_0402_5% W2
C 45 CLK_PCIE_WLAN# GPP_CLK2N C
1 CLK_PCIE_P3 Y2
TPC28 GPP_CLK3P
Y1
GPP_CLK3N
BC10
X25M_48M_OSC AD2 USB_SS_ZVSS RC58 1 2 1K_0402_1% USB wake implemented. Connect to S5 power rail.
+3VS USB_SS_ZVSS AD1 USB_SS_ZVDDP RC59 1 2 1K_0402_1%
X48M_X1 USB_SS_ZVDDP +1.05VALW_VDDP
T2
RC57 1 2 10K_0402_5% LPC_FRAME# X48M_X1 AA3 USB3P1_TXP
1 @ 2 PM_CLKRUN# USB_SS_0TXP AA4 USB3P1_TXN USB3P1_TXP 37
RC64 10K_0402_5%
RC62 2 1 LPC_CLK1 USB_SS_0TXN USB3P1_TXN 37
10K_0402_5% Port1 Right 1
X48M_X2 T1 W9 USB3P1_RXP
X48M_X2 USB_SS_0RXP W8 USB3P1_RXN USB3P1_RXP 37
USB_SS_0RXN USB3P1_RXN 37
22_0402_5% 1 2 RC61 LPC_CLK0 AW14 AA2 USB3P2_TXP
2 1 CLK_PCI_EC 52 CLK_PCI_EC LPC_CLK1 AY13 LPCCLK0/EGPIO74 USB_SS_1TXP AA1 USB3P2_TXN USB3P2_TXP 39
2K_0402_1% RC361
LPCCLK1/EGPIO75 USB_SS_1TXN USB3P2_TXN 39
10P_0402_50V8-J 2 1 CC211 LPC_AD0 USB3P2_RXP
Port2 Right 2
BB11 W5
EMC_NS@ 52 LPC_AD0 LPC_AD1 BA11 LAD0 USB_SS_1RXP W6 USB3P2_RXN USB3P2_RXP 39
For EMC request,close to APU 52 LPC_AD1 LAD1 USB_SS_1RXN USB3P2_RXN 39
20151208 LPC_AD2 AY11
52 LPC_AD2 LPC_AD3 BA13 LAD2 AC1 USB3P3_TXP
52 LPC_AD3 LPC_FRAME# AV14 LAD3 USB_SS_2TXP AC2 USB3P3_TXN USB3P3_TXP 34
52 LPC_FRAME# BA1 LFRAME_L USB_SS_2TXN USB3P3_TXN 34
8MB(64Mb) SERIRQ BC14 ESPI_ALERT_L/LDRQ0_L Y6 USB3P3_RXP TYPE C
52 SERIRQ PM_CLKRUN# BC11 SERIRQ/AGPIO87 USB_SS_2RXP Y7 USB3P3_RXN USB3P3_RXP 34
+1.8V_SPI 2 1 RC417 AE9 LPC_CLKRUN_L/AGPIO88 USB_SS_2RXN USB3P3_RXN 34
10K_0402_5%
RPC1 LPC_PD_L/AGPIO21 AC4
@
AMD Request @1204 USB_SS_3TXP AC3 20151118 change USB TYPEC port
1 8 SPI_IO3 SPI_CLK BC6 USB_SS_3TXN
2 7 SPI_IO2 53 SPI_CLK SPI_CS1# BB8 SPI_CLK/ESPI_CLK/EGPIO117 AB5
3 6 SPI_CS1# SPI_CS2# AW7 SPI_CS1_L/EGPIO118 USB_SS_3RXP AB6
SPI_SO SPI_CS2_L/ESPI_CS_L/EGPIO119 USB_SS_3RXN
B
4 5
53 SPI_SO SPI_SI
BA9
AY7 SPI_DI/ESPI_DATA/EGPIO120 Port2 Right (AOU) move to small board , USB2.0 B
AMD Request @1203
10K_0804_8P4R_5% 53 SPI_SI SPI_IO2 AW11 SPI_DO/EGPIO121
SPI_WP_L/EGPIO122
20151113
SPI_IO3 BA7
SPI_CS2#_TPM AW12 SPI_HOLD_L/EGPIO133
53 SPI_CS2#_TPM SPI_TPM_CS_L/AGPIO76
change to mount 1210
FP4 REV 0.93
RC364 1 2 10K_0402_5% SPI_CS2#

BRISTOL FM980PADY44AB-BGA968

Change to 1.8V SPI ROM.

X48M_X1

RC67 1 2 1M_0402_5% X48M_X2

+1.8V_SPI +1.8VS
UC8M2
YC1 SPI_CS1# 1 8 +1.8V_SPI RC356 2 1
SPI_SO /CS VCC SPI_IO3
0.085 A
2 7 0_0402_5%
SPI_IO2 DO(IO1) /HOLDor/RESET(IO3) SPI_CLK @
1 4 3 6 1
OSC1 NC2 4 /WP(IO2) CLK 5 SPI_SI 20160421 delete burn BIOS fixture
2 3 GND DI(IO0) CC117
NC1 OSC2 0.1U_0402_10V7-K
W25Q64FWSSIQ_SO8 2
1

CC17 48MHZ_10PF_7V48000017 CC18

10P_0402_50V8-J 10P_0402_50V8-J
2

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 APU SATA/USB/LPC/SPI

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 9 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

+3VS
+1.8VALW
TPC23 1 PM_SLP_S3# Table
1 PM_SLP_S5#
TPC24 Function SKU_ID_1 SKU_ID_2

1
1
TPC25 1 RSMRST#
RC365 RC70 RC71
Change D261 to SCS00008K00 4/19
10K_0402_5% TPC26 1 PBTN_OUT# 10K_0402_5% 10K_0402_5% * UMA 0
DIS@ 15@
D261
* DIS 1

2
2
RB751V-40_SOD323-2 SKU_ID_1
1 2 RSMRST#
52 EC_RSMRST# SKU_ID_2
D
SCS00008K00 * 14" 0 D

1
RC72 RC73
10K_0402_5% 10K_0402_5% * 15" 1
+3VS UMA@ 14@
RPC2

2
1 8 CLKREQ_PCIE1_LAN# CC19 1 2 150P_0402_50V8-J
2 7 CLKREQ_PCIE2_CR#
3 6 CLKREQ_PCIE3_WLAN# CC20 1 2 150P_0402_50V8-J UC1D
4 5 20150611 +3VS

10K_0804_8P4R_5% Close to APU RC76 1 2 33_0402_5% LPC_RST#_R BB12

ACPI/SD/AZ/GPIO/RTC/I2C/UART/MISC
BB2
DGPU_PWREN
PSP_EN
2.2K_0402_5% 2
2
1
1
RC372
52 LPC_RST# RC77 1 2 22_0402_5% PLT_RST#_R AN7 LPC_RST_L SD0_W P/EGPIO101 BB5 2.2K_0402_5% RC172
16,40,45,46,53 PLT_RST# PCIE_RST_L/EGPIO26 SD0_PW R_CTRL/AGPIO102 BT_ON 10K_0402_5% 2 @ 1 RC82
BC2 RF_OFF#
SD0_CD/AGPIO25 GS_ON# 10K_0402_5% 2 @ 1 RC92
RSMRST# AE4 BB4 DEVSLP_GATE#
RSMRST_L SD0_CLK/EGPIO95 GS_ON# 58 2.2K_0402_5% 2 @ 1 RC88
AY5
PBTN_OUT# AE1 SD0_CMD/EGPIO96
52 PBTN_OUT# PWR_GOOD PW R_BTN_L/AGPIO0
BC9
52 PWR_GOOD SYS_RESET# AF2 PW R_GOOD F1_LED#&F4_LED# From EC to APU 1130
+3VALW EC_WAKE# AG2 SYS_RESET_L/AGPIO1 BC3
17,52 EC_WAKE# W AKE_L/AGPIO2 SD0_DATA0/EGPIO97 F1_LED#
BA3
PM_SLP_S3# AK7 SD0_DATA1/EGPIO98 BC5 F4_LED# F1_LED# 55
52 PM_SLP_S3# PM_SLP_S5# SLP_S3_L SD0_DATA2/EGPIO99 F4_LED# 55
AH5 BA5
RC96 1 @ 2 10K_0402_5% 52
EC_WAKE# PM_SLP_S5# SLP_S5_L SD0_DATA3/EGPIO100 BB6 MUX_SW 20150602 +3VALW
RC97 1 @ 2 10K_0402_5% AC_PRESENT 1 S0A3_GPIO AE8 SD0_LED/EGPIO93 MUX_SW 26
Test_Point_20MIL TPC27
RC98 1 2 100K_0402_5% APU_S5_MUX_CTRL APU_S5_MUX_CTRL AH8 S0A3_GPIO/AGPIO10 BA15 APU_SMB0CLK Change EGPIO93 to MUX_SW 4/19
RC100 1 @ 2 10K_0402_5% BATLOW# 61 APU_S5_MUX_CTRL S5_MUX_CTRL/EGPIO42 SCL0/I2C2_SCL/EGPIO113 AY17 APU_SMB0DATA
TEST0 AH6 SDA0/I2C2_SDA/EGPIO114
RC420 1 2 10K_0402_5% TEST0 FCH_ODD_DA
C TEST1 AK8 AG5 APU_SMB1CLK 10K_0402_5% 2 @ 1 RC369 C
@ TEST2 AE3 TEST1/TMS SCL1/I2C3_SCL/AGPIO19 AG4 APU_SMB1DATA APU_SMB1CLK 54
TEST2 SDA1/I2C3_SDA/AGPIO20 APU_SMB1DATA 54
+3VS
KBRST# AY15 AMD Request @1203 AGPIO69 2 1 RC414
52 KBRST# ESPI_RESET_L/KBRST_L/AGPIO129 10K_0402_5%
1 2 10K_0402_5% KBRST# GATEA20 BC19
RC105 @ 52 GATEA20 EC_SCI# GA20IN/AGPIO126
AD7 AL5 AGPIO3 TP943
RC366 1 @ 2 10K_0402_5% GATEA20 52 EC_SCI# LPC_PME_L/AGPIO22 AGPIO3 @
1 CLKREQ_PCIE4_VGA# BB13 AL6 AGPIO4 1 Test_Point_20MIL AGPIO3 2K_0402_1% 2 1 RC103
RC389 UMA@2 10K_0402_5% LPC_SMI_L/AGPIO86 AGPIO4 FCH_ODD_DA
RC399 1 2 ODD_EN AJ1
AC_PRESENT AGPIO5 DEVSLP_GATE# FCH_ODD_DA 42 VDDGFX_PD @
1K_0402_1% AG3 AJ3 100K_0402_5% 2 1 RC104
52 AC_PRESENT AD5 AC_PRES/USB_OC4_L/IR_RX0/AGPIO23 AGPIO6/LDT_RST_L AH1 ZERO_ODD_DP# DEVSLP_GATE# 32
AL8 IR_TX0/USB_OC5_L/AGPIO13 AGPIO7/LDT_PW ROK AJ4 AGPIO8
ZERO_ODD_DP# 42 Follow AMD spec
RC419 @2 1 10K_0402_5% S0A3_GPIO IR_TX1/USB_OC6_L/AGPIO14 AGPIO8 15/02/16
AN8 AK5
BATLOW# AE2 IR_RX1/AGPIO15 AGPIO9 AD8 VDDGFX_PD
RC418 @ 2 CLKREQ_PCIE1_LAN# IR_LED_L/LLB_L/AGPIO12 VDDGFX_PD/AGPIO39 VDDGFX_PD 71
1 10K_0402_5% APU_AZ_SDIN0 40 CLKREQ_PCIE1_LAN#
BC15
CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92 AGPIO40
AG8 AGPIO40
CLKREQ_PCIE2_CR#BB17 AW 15 SKU_ID_1 TP953
RPC10 AMD Request @1204 46 CLKREQ_PCIE2_CR# CLKREQ_PCIE3_WLAN#
BC17 CLK_REQ1_L/AGPIO115 AGPIO64 AU15 1
AGPIO65 Test_Point_20MIL APU_SMB0CLK RC109 @
45 CLKREQ_PCIE3_WLAN# ODD_EN BB18 CLK_REQ2_L/AGPIO116 AGPIO65 1 2 0_0402_5% APU_SMB_CK0
I2C0_SDA 42 ODD_EN CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131 APU_SMB_CK0 14,15
8 1 CLKREQ_PCIE4_VGA#
BB16 AT15 SKU_ID_2 @
7 2 I2C0_CLK 17 CLKREQ_PCIE4_VGA# USB_OC0# AH9 CLK_REQG_L/OSCIN/EGPIO132 AGPIO66/SHUTDOW N_L AU12 APU_SMB0DATARC110 1 2 0_0402_5% APU_SMB_DA0
37 USB_OC0# TP944 APU_SMB_DA0 14,15
6 3 I2C1_SDA USB_OC1# AG1 USB_OC0_L/TRST_L/AGPIO16 AGPIO68/SGPIO_CLK AT14 AGPIO69 1
5 4 I2C1_CLK 40 USB_OC1# USB_OC1_L/TDI/AGPIO17 AGPIO69/SGPIO_LOAD DGPU_HOLD_RST# Test_Point_20MIL
1 Test_Point_20MIL AH2 AR14
TPC32 1 Test_Point_20MIL AL9 USB_OC2_L/TCK/AGPIO18 AGPIO71/SGPIO_DATAOUT BC13 DGPU_PWREN DGPU_HOLD_RST# 16 DIMM1, DIMM2
10K_0804_8P4R_5% TPC33 USB_OC3_L/TDO/AGPIO24 AGPIO72/SGPIO_DATAIN DGPU_PWREN 23,74
1203 CSJTAG is FCH AZ_BITCLK
debug bus. APU_SPKR
AU6 BA17
APU_AZ_SDIN0 AR8 AZ_BITCLK/I2S_BCLK_MIC SPKR/AGPIO91 APU_SPKR 49
48 APU_AZ_SDIN0 AZ_SDIN0/I2S_DATA_MIC0 20150611
APU_AZ_SDIN1 AP6 AN5 AGPIO11
APU_AZ_SDIN2 AR5 AZ_SDIN1/I2S_LR_PLAYBACK BLINK/USB_OC7_L/AGPIO11 RPC6 +3VS
+3VALW RPC3 AZ_RST# AU9 AZ_SDIN2/I2S_DATA_MIC1 BB14 PSP_EN
AZ_SYNC AT9 AZ_RST_L/I2S_LR_MIC GENINT1_L/AGPIO89 BA19 DGPU_PWROK APU_SMB1CLK 1 8
1 8 USB_OC1# AZ_SDOUT AR7 AZ_SYNC/I2S_BCLK_PLAYBACK GENINT2_L/AGPIO90 DGPU_PWROK 74 APU_SMB1DATA 2 7
B 2 7 SYS_RESET# Change SYS_RESET# from RPC2 to RPC3. 10/25 AZ_SDOUT/I2S_DATA_PLAYBACK BC18 RF_OFF# APU_SMB0CLK 3 6 B
3 6 USB_OC0# I2C0_CLK BB10 FANIN0/AGPIO84 BB19 BT_ON RF_OFF# 45 APU_SMB0DATA 4 5
4 5 AGPIO40 I2C0_SDA BB9 I2C0_SCL/EGPIO145 FANOUT0/AGPIO85 BT_ON 45
20150226 I2C0_SDA/EGPIO146
I2C1_CLK BB7 AY9 2.2K_0804_8P4R_5%
10K_0804_8P4R_5% I2C1_SDA BC7 I2C1_SCL/EGPIO147 UART0_CTS_L/EGPIO135 AW 8
I2C1_SDA/EGPIO148 UART0_RXD/EGPIO136 UART0_RXD 45
AV5
RPC4 RC114 1 2 0_0402_5% RTCCLK AG7 UART0_RTS_L/EGPIO137 AV8
45 RTCCLK_R RTCCLK UART0_TXD/EGPIO138 UART0_TXD 45 +3VALW
@ AW 9 RPC11
1 8 AZ_BITCLK UART0_INTR/AGPIO139
48
48
APU_AZ_BITCLK
APU_AZ_SDOUT
2 7 AZ_SDOUT X32K_X1 AT1 AV11
SW request. AGPIO11 1 8
3 6 AZ_SYNC X32K_X1 UART1_CTS_L/BT_I2S_BCLK/EGPIO140
48 APU_AZ_SYNC 4 5 AZ_RST# UART1_RXD/BT_I2S_SDI/EGPIO141
AU7 Reserved for debug. AGPIO8 2 7
48 APU_AZ_RST# AT11 AGPIO3 3 6
RC116 UART1_RTS_L/EGPIO142 AR11 4 5
33_0804_8P4R_5% 1 2 X32K_X2 AT2 UART1_TXD/BT_I2S_SDO/EGPIO143 AP9
EMC@ X32K_X2 UART1_INTR/BT_I2S_LRCLK/AGPIO144 10K_0804_8P4R_5%
For EMC request
FP4 REV 0.93
15/04/20 20M_0402_5%

YC2 BRISTOL FM980PADY44AB-BGA968

1 2

+3VALW
20150609 32.768KHZ 12.5PF 9H03200053
RPC5 SJ10000MB00
1 Y_9H03200031_2P 1 TEST1 R9460 1 2 15K_0402_5%
1 8 RTCCLK TEST0 R9461 1 2 15K_0402_5%
2 7 APU_AZ_SDIN1 CC21 CC22 TEST2 R9462 1 2 15K_0402_5%
3 6 APU_AZ_SDIN2 18P_0402_50V8-J 22P_0402_50V8-J
2 2
4 5

10K_0804_8P4R_5% 1203 AMD request

A A

+3VALW

@RC159 1 2 10K_0402_5% RTCCLK Security Classification LC Future Center Secret Data Title
@ RC162 1 2 2K_0402_1% RTCCLK Issued Date 2015/10/5 Deciphered Date 2016/10/31 APU GPIO/AZ/I2C/SD/UARTS/ACPI
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
RTC Coin battery implemented: Pull-up resistor AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
RTC Coin battery not implemented: Pull-down resistor DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 10 of 80
5 4 3 2 1

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 WWW.AliFixit.COM
5 4 3 2 1

+VDD_GFX
22U x 9
0.22U x 9
180P x 1

D D

20151126 20151126
3A 39A
+1.2V +VDD_CORE
+1.5VS

change from 0.22U_0402_10V6-K to 0201 change from 0.22U_0402_10V6-K to 0201 UC1F

POWER
P25 U8
P28 VDDIO_MEM_S3_1 VDDCR_CPU_1 W7
+VDD_CORE +VDD_GFX T24 VDDIO_MEM_S3_2 VDDCR_CPU_2 W12
T27 VDDIO_MEM_S3_3 VDDCR_CPU_3 W15
U25 VDDIO_MEM_S3_4 VDDCR_CPU_4 W18
CC40 CC43 CC44 CC45 CC46 CC47 CC41 CC48 CC49 CC42 CC50 CC51 CC52 CC53 CC54 CC55 CC56 CC57 CC58 U28 VDDIO_MEM_S3_5 VDDCR_CPU_5 W21
@ RC155
1 2 +VDDIO_AZ CC59 CC60 CC61 V30 VDDIO_MEM_S3_6 VDDCR_CPU_6 Y8
VDDIO_MEM_S3_7 VDDCR_CPU_7

180P_0402_50V8-J

180P_0402_50V8-J
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 V33 Y10
0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M
0_0603_5% VDDIO_MEM_S3_8 VDDCR_CPU_8

1U_0402_6.3V7-K

1U_0402_6.3V7-K

1U_0402_6.3V7-K
W24 Y13
W27 VDDIO_MEM_S3_9 VDDCR_CPU_9 Y16
1 1 1 VDDIO_MEM_S3_10 VDDCR_CPU_10
Y25 Y19
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 Y28 VDDIO_MEM_S3_11 VDDCR_CPU_11 Y22
Y30 VDDIO_MEM_S3_12 VDDCR_CPU_12 AB7
2 2 2 AB24 VDDIO_MEM_S3_13 VDDCR_CPU_13 AB9
AB27 VDDIO_MEM_S3_14 VDDCR_CPU_14 AB12
AB30 VDDIO_MEM_S3_15 VDDCR_CPU_15 AB15
COST@ COST@ COST@ COST@ COST@ AB33 VDDIO_MEM_S3_16 VDDCR_CPU_16 AB18
AD25 VDDIO_MEM_S3_17 VDDCR_CPU_17 AB21
AD28 VDDIO_MEM_S3_18 VDDCR_CPU_18 AD6
AD30 VDDIO_MEM_S3_19 VDDCR_CPU_19 AD10
+VDDNB_CORE AE24 VDDIO_MEM_S3_20 VDDCR_CPU_20 AD13
22U x 4 change from 0.22U_0402_10V6-K to 0201 AE27 VDDIO_MEM_S3_21
VDDIO_MEM_S3_22
VDDCR_CPU_21
VDDCR_CPU_22
AD16
+VDDNB_CORE 0.22U x 8 +3VALW_APU +1.8VALW +1.8VS +3VS_APU +1.05VS_VDDP +1.05VALW_VDDP AF30 AD19
180P x 1 AF33 VDDIO_MEM_S3_23 VDDCR_CPU_23 AD22
AG25 VDDIO_MEM_S3_24 VDDCR_CPU_24 AE7
CC62 CC63 CC64 CC65 CC66 CC67 CC68 CC69 CC70 CC71 CC72 CC73 CC74 CC75 CC76 CC77 CC78 CC79 CC115 CC116 AG28 VDDIO_MEM_S3_25 VDDCR_CPU_25 AE12
AH24 VDDIO_MEM_S3_26 VDDCR_CPU_26 AK9
VDDIO_MEM_S3_27 VDDCR_CPU_42

180P_0402_50V8-J

10U_0603_6.3V6-M

0.22U_0402_10V6-K

10U_0603_6.3V6-M

0.22U_0402_10V6-K

0.22U_0402_10V6-K

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

0.22U_0402_10V6-K

10U_0603_6.3V6-M

0.22U_0402_10V6-K
AH27 AG10
C
20151126 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 C
0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M

0.22U_0201_10V6-M
AH30 VDDIO_MEM_S3_28 VDDCR_CPU_31 AK10
AK25 VDDIO_MEM_S3_29 VDDCR_CPU_43 AG13
AK28 VDDIO_MEM_S3_30 VDDCR_CPU_32 AK13
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 AK30 VDDIO_MEM_S3_31 VDDCR_CPU_44 AG16
AK33 VDDIO_MEM_S3_32 VDDCR_CPU_33 AK16
+VDDIO_AZ AL27 VDDIO_MEM_S3_33 VDDCR_CPU_45 AG19
AM30 VDDIO_MEM_S3_34 VDDCR_CPU_34 AK19
VDDIO_MEM_S3_35 VDDCR_CPU_46 AG22
0.2A VDDCR_CPU_35
AR19 AK22
VDDIO_AUDIO VDDCR_CPU_47 AH7
AE6 VDDCR_CPU_36 AE18
1.5A +1.05VS_VDDP VDDP_GFX_2 VDDCR_CPU_28
AE5 AE21
VDDP_GFX_1 VDDCR_CPU_29 AH21
+1.35V_APU_VDDIO AP19 VDDCR_CPU_40 AG6
+1.2V 22U x 8 + 3 (@)
0.2A +3VS_APU VDD_33_1 VDDCR_CPU_30
AP21 AH12
0.22U x 6 +1.05VS_VDDP VDD_33_2 VDDCR_CPU_37 AN6
180P x 1 AP16 VDDCR_CPU_49 AH15
1.5A +1.8VS VDD_18_1 VDDCR_CPU_38
@ @ @ CC91 CC92 CC93 CC94 CC95 CC96 AP18 AH18
CC80 CC81 CC82 CC83 CC84 CC85 CC86 CC87 CC88 CC89 CC90 VDD_18_2 VDDCR_CPU_39 AL7
VDDCR_CPU_48

0.22U_0402_10V6-K

180P_0402_50V8-J

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M
1 1 1 1 1 1 0.5A +1.8VALW AP10 AK6
VDD_18_S5_1 VDDCR_CPU_41
22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

1 1 1 1 1 1 1 1 1 1 1 AR9 AE15
VDD_18_S5_2 VDDCR_CPU_27
0.2A AP15 30A
2 2 2 2 2 2 +3VALW_APU VDD_33_S5_1
AR15 L8
2 2 2 2 2 2 2 2 2 2 2 VDD_33_S5_2 VDDCR_GFX_14 +VDD_GFX
L13
AN12 VDDCR_GFX_15 L16
0.8A +1.05VALW_VDDP VDDP_S5_1 VDDCR_GFX_16
AP12 L19
VDDP_S5_2 VDDCR_GFX_17 L22
AP13 VDDCR_GFX_18 N7
0.2A VDDCR_FCH_S5_1 VDDCR_GFX_19
+VDDCR_FCH_ALW CC97 CC98 CC99 AR12 N12
VDDCR_FCH_S5_2 VDDCR_GFX_20 N15
VDDCR_GFX_21

0.22U_0402_10V6-K

10U_0603_6.3V6-M

10U_0603_6.3V6-M
1 1 1 AW19 N18
AU17 VDDP_6 VDDCR_GFX_22 N21
+1.05VS_VDDP AU19 VDDP_1 VDDCR_GFX_23 P8
+1.2V AV17 VDDP_2 VDDCR_GFX_24 P13
2 2 2 AV19 VDDP_3 VDDCR_GFX_25 P16
7A VDDP_4 VDDCR_GFX_26
AW17 P19
B VDDP_5 VDDCR_GFX_27 P22 B

CC100 CC101 CC102 CC103 CC104 CC105 CC106 AL12 VDDCR_GFX_28 T7

AL13 VDDCR_NB_1 VDDCR_GFX_29 F12
VDDCR_NB_2 VDDCR_GFX_1
0.22U_0402_10V6-K

0.22U_0402_10V6-K

0.22U_0402_10V6-K

0.22U_0402_10V6-K

0.22U_0402_10V6-K

0.22U_0402_10V6-K

180P_0402_50V8-J

1 1 1 1 1 1 1 AL15 F15
AL18 VDDCR_NB_3 VDDCR_GFX_2 G11
AL21 VDDCR_NB_4 VDDCR_GFX_3 G14
AN13 VDDCR_NB_5 VDDCR_GFX_4 J8
2 2 2 2 2 2 2 AN16 VDDCR_NB_6 VDDCR_GFX_5 J9
AN19 VDDCR_NB_7 VDDCR_GFX_6 J11
12A VDDCR_NB_8 VDDCR_GFX_7
+VDDNB_CORE AN22 K7
VDDCR_NB_9 VDDCR_GFX_8 K12
VDDCR_GFX_9 K13
AR17 VDDCR_GFX_10 K15
VDDBT_RTC_G VDDCR_GFX_11 K16
VDDCR_GFX_12 T12
+RTC_LDO VDDCR_GFX_30 T15
+1.2V VDDCR_GFX_31 T18
Decoupling between Processor & DIMMs VDDCR_GFX_32
across VDDIO & VSS split. RC156 T21
1 2 +VDDBT_RTC VDDCR_GFX_33 U13
VDDCR_GFX_34 U16
CC107 CC108 CC109 CC110 CC111 CC112 VDDCR_GFX_35 U19
1K_0402_1%

1U_0402_6.3V7-K

0.22U_0402_10V6-K
+1.2V VDDCR_GFX_36 U22
1 1 VDDCR_GFX_37

2
0.22U_0402_10V6-K

0.22U_0402_10V6-K

0.22U_0402_10V6-K

0.22U_0402_10V6-K

180P_0402_50V8-J

180P_0402_50V8-J

0.22U x 4 JCLR K19

CC113
1 1 1 1 1 1 180P x 2 VDDCR_GFX_13

CC114
SHORT PADS
FP4 REV 0.93
@

1
2 2 BRISTOL FM980PADY44AB-BGA968
2 2 2 2 2 2

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 APU Power

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 11 of 80
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5 4 3 2 1

UC1G UC1H
D D
GND GND
A8 L28 AE10 AV30 UC1J
A12 VSS_1 VSS_63 M4 AE13 VSS_125 VSS_187 AV33
A16 VSS_2 VSS_64 M30 AE16 VSS_126 VSS_188 AW22
A20 VSS_3 VSS_65 N10 AE19 VSS_127 VSS_189 AY4 U30
A24 VSS_4 VSS_66 N13 AE22 VSS_128 VSS_190 AY6 U31 RSVD_2
A28 VSS_5 VSS_67 N16 AF1 VSS_129 VSS_191 AY8 AN30 RSVD_3
A32 VSS_6 VSS_68 N19 AF4 VSS_130 VSS_192 AY10 RSVD_4
B2 VSS_7 VSS_69 N22 AG9 VSS_131 VSS_193 AY12
B8 VSS_8 VSS_70 N27 AG12 VSS_132 VSS_194 AY14
B12 VSS_9 VSS_71 P1 AG15 VSS_133 VSS_195 AY16
B33 VSS_10 VSS_72 P2 AG18 VSS_134 VSS_196 AY20
C3 VSS_11 VSS_73 P4 AG21 VSS_135 VSS_197 AY22
D4 VSS_12 VSS_74 P5 AH4 VSS_136 VSS_198 AY24
D6 VSS_13 VSS_75 P12 AH10 VSS_137 VSS_199 AY26 FP4 REV 0.93
D8 VSS_14 VSS_76 P15 AH13 VSS_138 VSS_200 AY28
D10 VSS_15 VSS_77 P18 AH16 VSS_139 VSS_201 AY30
D12 VSS_16 VSS_78 P21 AH19 VSS_140 VSS_202 BB1
D14 VSS_17 VSS_79 P30 AH22 VSS_141 VSS_203 BB33
D16 VSS_18 VSS_80 P33 AK1 VSS_142 VSS_204 BC4
D18 VSS_19 VSS_81 T4 AK4 VSS_143 VSS_205 BC8
D20 VSS_20 VSS_82 T10 AK12 VSS_144 VSS_206 BC12
D22 VSS_21 VSS_83 T13 AK15 VSS_145 VSS_207 BC16
D24 VSS_22 VSS_84 T16 AK18 VSS_146 VSS_208 BC20
C VSS_23 VSS_85 VSS_147 VSS_209 C
D26 T19 AL16 BC24
D28 VSS_24 VSS_86 T22 AL19 VSS_148 VSS_210 BC28
D30 VSS_25 VSS_87 T30 AL22 VSS_149 VSS_211 BC32
F1 VSS_26 VSS_88 U5 AM4 VSS_150 VSS_212
F2 VSS_27 VSS_89 U12 AN9 VSS_151
F4 VSS_28 VSS_90 U15 AN10 VSS_152
F9 VSS_29 VSS_91 U18 AN15 VSS_153
F19 VSS_30 VSS_92 U21 AN18 VSS_154
F22 VSS_31 VSS_93 U24 AN21 VSS_155
F25 VSS_32 VSS_94 V1 AN25 VSS_156
F30 VSS_33 VSS_95 V2 AN28 VSS_157
F33 VSS_34 VSS_96 V4 AP1 VSS_158
G7 VSS_35 VSS_97 W10 AP2 VSS_159
G17 VSS_36 VSS_98 W13 AP4 VSS_160
G20 VSS_37 VSS_99 W16 AP7 VSS_161
G23 VSS_38 VSS_100 W19 AP22 VSS_162
G26 VSS_39 VSS_101 W22 AP27 VSS_163
H4 VSS_40 VSS_102 Y4 AP30 VSS_164
H30 VSS_41 VSS_103 Y5 AP33 VSS_165
J5 VSS_42 VSS_104 Y12 AR6 VSS_166
J15 VSS_43 VSS_105 Y15 AR25 VSS_167
J19 VSS_44 VSS_106 Y18 AR28 VSS_168
J22 VSS_45 VSS_107 Y21 AT4 VSS_169
J25 VSS_46 VSS_108 Y24 AT19 VSS_170
B B
J28 VSS_47 VSS_109 AB1 AT22 VSS_171
K1 VSS_48 VSS_110 AB2 AT30 VSS_172
K2 VSS_49 VSS_111 AB4 AU5 VSS_173
K4 VSS_50 VSS_112 AB10 AU8 VSS_174
K10 VSS_51 VSS_113 AB13 AU11 VSS_175
K22 VSS_52 VSS_114 AB16 AU14 VSS_176
K27 VSS_53 VSS_115 AB19 AU20 VSS_177
K30 VSS_54 VSS_116 AB22 AU23 VSS_178
K33 VSS_55 VSS_117 AD4 AU27 VSS_179
L5 VSS_56 VSS_118 AD9 AV4 VSS_180
L12 VSS_57 VSS_119 AD12 AV7 VSS_181
L15 VSS_58 VSS_120 AD15 AV9 VSS_182
L18 VSS_59 VSS_121 AD18 AV12 VSS_183 L24
L21 VSS_60 VSS_122 AD21 AV15 VSS_184 VSS_213 AL10
L25 VSS_61 VSS_123 AD24 AV25 VSS_185 VSS_215 AK21
VSS_62 VSS_124 VSS_186 VSS_214
FP4 REV 0.93 FP4 REV 0.93
BRISTOL FM980PADY44AB-BGA968 BRISTOL FM980PADY44AB-BGA968

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 APU GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 12 of 80
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5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 XXXX
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 13 of 80
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 WWW.AliFixit.COM
5 4 3 2 1

+1.2V +1.2V +2.5VALW

1 1 1 1 1 1 1 1 1 1

1
RD1 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 CD9 CD10 CD11 CD12
1K_0402_1% 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 1U_0402_6.3V6-K 1U_0402_6.3V6-K
2 2 2 2 2 2 2 2 2 2

2
D D
M_VREF_CA_DIMMA

+1.2V +0.6VS

1
1

1
RD3 1 1
1K_0402_1% CD25 +
0.1U_0402_16V7-K CD14 CD15 CD16 CD17 CD18 CD19 CD20 CD21 CD26 CD22 CD23 CD24

2
1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 330U_D2_2VM_R9M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 1U_0402_6.3V6-K

2
2 2 2

DDRA_MA_DM[0..7] 6 DDR_A_PARITY
DDR_A_D[0..63] 6

1
DDR_A_MA[0..13] 6
RD29
DDR_A_DQS#[0..7] 6 @ 0_0402_5%
+0.6VS
DDR_A_DQS[0..7] 6

2
+1.2V
+2.5VALW +1.2V +1.2V

+1.2V +1.2V

2
JDIMM1B ME@ 1K_0402_1%
RD5
JDIMM1A ME@

1
DDR_A_MA3 131 132 DDR_A_MA2
DDR_A_MA1 133 A3 A2 134
A1 EVENT_n/NF DDR_A_EVENT# 6
1 2 135 136
DDR_A_D5 3 VSS_1 VSS_2 4 DDR_A_D4 SA_CLK_DDR0 137 VDD_9 VDD_10 138 SA_CLK_DDR1
DQ5 DQ4 6 SA_CLK_DDR0 SA_CLK_DDR#0 CK0_t CK1_t/NF SA_CLK_DDR#1 SA_CLK_DDR1 6
5 6 139 140
DDR_A_D1 VSS_3 VSS_4 DDR_A_D0 6 SA_CLK_DDR#0 CK0_c CK1_c/NF SA_CLK_DDR#1 6
7 8 141 142
C
9 DQ1 DQ0 10 DDR_A_PARITY 143 VDD_11 VDD_12 144 DDR_A_MA0 C
DDR_A_DQS#0 11 VSS_5 VSS_6 12 DDRA_MA_DM0 Parity A0
DDR_A_DQS0 13 DQS0_C DM0_n/DBl0_n 14
15 DQS0_t VSS_7 16 DDR_A_D6 DDR_A_BA1 145 146 DDR_A_MA10
DDR_A_D7 VSS_8 DQ6 6 DDR_A_BA1 BA1 A10/AP
17 18 147 148
19 DQ7 VSS_9 20 DDR_A_D2 DDR_A_CS0# 149 VDD_13 VDD_14 150 DDR_A_BA0
DDR_A_D3 VSS_10 DQ2 6 DDR_A_CS0# DDR_A_WE# CS0_n BA0 DDR_A_RAS# DDR_A_BA0 6
21 22 6 DDR_A_WE# 151 152
DQ3 VSS_11 DDR_A_D12 A14/WE_n A16/RAS_n DDR_A_RAS# 6
23 24 153 154
DDR_A_D13 25 VSS_12 DQ12 26 DDR_A_ODT0 155 VDD_15 VDD_16 156 DDR_A_CAS#
DQ13 VSS_13 DDR_A_D8 6 DDR_A_ODT0 DDR_A_CS1# ODT0 A15/CAS_n DDR_A_MA13 DDR_A_CAS# 6
27 28 157 158
DDR_A_D9 VSS_14 DQ8 6 DDR_A_CS1# CS1_n A13
29 30 159 160
31 DQ9 VSS_15 32 DDR_A_DQS#1 DDR_A_ODT1 161 VDD_17 VDD_18 162
DDRA_MA_DM1 VSS_16 DQS1_c DDR_A_DQS1 6 DDR_A_ODT1 ODT1 C0/CS2_n/NC M_VREF_CA_DIMMA
33 34 163 164
35 DM1_n/DBl1_n DQS1_t 36 165 VDD_19 VREFCA 166 SA2_CHA_P
VSS_17 VSS_18 C1/CS3_n/NC SA2

1000P_0402_25V7-K
DDR_A_D15 37 38 DDR_A_D14 167 168

0.1U_0402_10V7-K
39 DQ15 DQ14 40 DDR_A_D37 169 VSS_53 VSS_54 170 DDR_A_D36
DDR_A_D10 41 VSS_19 VSS_20 42 DDR_A_D11 171 DQ37 DQ36 172
43 DQ10 DQ11 44 +3VS +3VS +3VS DDR_A_D33 173 VSS_55 VSS_56 174 DDR_A_D32
DDR_A_D21 45 VSS_21 VSS_22 46 DDR_A_D20 175 DQ33 DQ32 176
47 DQ21 DQ20 48 DDR_A_DQS#4 177 VSS_57 VSS_58 178 DDRA_MA_DM4
VSS_23 VSS_24 DQS4_c DM4_n/DBl4_n
1

1
DDR_A_D17 49 50 DDR_A_D16 DDR_A_DQS4 179 180
51 DQ17 DQ16 52 RD6 RD7 RD8 181 DQS4_t VSS_59 182 DDR_A_D39
DDR_A_DQS#2 53 VSS_25 VSS_26 54 DDRA_MA_DM2 10K_0402_5% DDR_A_D38 183 VSS_60 DQ39 184
DQS2_c DM2_n/DBl2_n 10K_0402_5% 10K_0402_5% DQ38 VSS_61 1 1
DDR_A_DQS2 55 56 @ @ @ 185 186 DDR_A_D35
57 DQS2_t VSS_27 58 DDR_A_D22 DDR_A_D34 187 VSS_62 DQ35 188 CD28
CD27
2

2
DDR_A_D23 59 VSS_28 DQ22 60 189 DQ34 VSS_63 190 DDR_A_D45
61 DQ23 VSS_29 62 DDR_A_D18 SA0_CHA_P SA1_CHA_P SA2_CHA_P DDR_A_D44 191 VSS_64 DQ45 192 2 2
DDR_A_D19 63 VSS_30 DQ18 64 193 DQ44 VSS_65 194 DDR_A_D41
65 DQ19 VSS_31 66 DDR_A_D28 DDR_A_D40 195 VSS_66 DQ41 196
VSS_32 DQ28 DQ40 VSS_67
1

1
DDR_A_D29 67 68 197 198 DDR_A_DQS#5
69 DQ29 VSS_33 70 DDR_A_D24 RD9 RD10 RD11 DDRA_MA_DM5 199 VSS_68 DQS5_c 200 DDR_A_DQS5
DDR_A_D25 71 VSS_34 DQ24 72 @ @ @ 201 DM5_n/DBl5_n DQS5_t 202
DQ25 VSS_35 0_0402_5% 0_0402_5% 0_0402_5% VSS_69 VSS_70
73 74 DDR_A_DQS#3 DDR_A_D46 203 204 DDR_A_D47
DDRA_MA_DM3 75 VSS_36 DQS3_c 76 DDR_A_DQS3 205 DQ46 DQ47 206
2

2
77 DM3_n/DBl3_n DQS3_t 78 DDR_A_D42 207 VSS_71 VSS_72 208 DDR_A_D43
DDR_A_D30 79 VSS_37 VSS_38 80 DDR_A_D31 209 DQ42 DQ43 210
81 DQ30 DQ31 82 DDR_A_D52 211 VSS_73 VSS_74 212 DDR_A_D53
DDR_A_D26 83 VSS_39 VSS_40 84 DDR_A_D27 213 DQ52 DQ53 214
85 DQ26 DQ27 86 DDR_A_D49 215 VSS_75 VSS_76 216 DDR_A_D48
87 VSS_41 VSS_42 88 +1.2V 217 DQ49 DQ48 218
89 CB5/NC CB4/NC 90 DDR_A_DQS#6 219 VSS_77 VSS_78 220 DDRA_MA_DM6
91 VSS_43 VSS_44 92 DDR_A_DQS6 221 DQS6_c DM6_n/DBl6_n 222
93 CB1/NC
VSS_45
CB0/NC
VSS_46
94 SPD Address = 0H 223 DQS6_t
VSS_80
VSS_79
DQ54
224 DDR_A_D54
1

95 96 DDR_A_D55 225 226

97 DQS8_c DM8_n/DBl8_n/NC 98 227 DQS5 VSS_81 228 DDR_A_D50
B B
99 DQS8_t VSS_47 100 RD31 DDR_A_D51 229 VSS_82 DQ50 230
101 VSS_48 CB6/NC 102 1K_0402_1% 231 DQ51 VSS_83 232 DDR_A_D60
103 CB2/NC VSS_49 104 DDR_A_D61 233 VSS_84 DQ60 234
2

105 VSS_50 CB7/NC 106 235 DQ61 VSS_85 236 DDR_A_D57

107 CB3/NC VSS_51 108 +3VS DDR_A_D56 237 VSS_86 DQ57 238
DDR_A_CKE0 VSS_52 RESET_n DDR_A_CKE1 DDR4_A_DRAMRST# 6 DQ56 VSS_87 DDR_A_DQS#7
109 110 239 240
6 DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE1 6 DDRA_MA_DM7 VSS_88 DQS7_c DDR_A_DQS7
111 112 241 242
VDD_1 VDD_2 DM7_n/DBl7_n DQS7_t
1

DDR_A_BG1 113 114 DDR_A_ACT_N 243 244

6 DDR_A_BG1 DDR_A_BG0 BG1 ACT_n DDR_A_ALERT_N DDR_A_ACT_N 6 DDR_A_D62 VSS_89 VSS_90 DDR_A_D63
115 116 RD12 245 246
6 DDR_A_BG0 BG0 ALERT_n DQ62 DQ63
117 118 @ 0_0402_5% 247 248
DDR_A_MA12 119 VDD_3 VDD_4 120 DDR_A_MA11 DDR_A_D58 249 VSS_91 VSS_92 250 DDR_A_D59
DDR_A_MA9 121 A12 A11 122 DDR_A_MA7 251 DQ58 DQ59 252
2

123 A9 A7 124 APU_SMB_CK0 253 VSS_93 VSS_94 254 APU_SMB_DA0

DDR_A_MA8 VDD_5 VDD_6 DDR_A_MA5 10,15 APU_SMB_CK0 SCL SDA SA0_CHA_P APU_SMB_DA0 10,15
125 126 255 256
DDR_A_MA6 127 A8 A5 128 DDR_A_MA4 257 VDDSPD SA0 258
129 A6 A4 130 259 VPP_1 VTT 260 SA1_CHA_P
VDD_7 VDD_8 1 VPP_2 SA1
1 1
EMC@ CD31 261 262
0.1U_0402_10V7-K CD29 CD30 GND_1 GND_2
FOX_AS0A826-H4RB-7H 2 0.1U_0402_10V7-K 2.2U_0402_6.3V6-M FOX_AS0A826-H4RB-7H
2 2
SP071407021 SP071407021

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 DDR4 CH-A PRIMARY

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 14 of 80
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5 4 3 2 1

+1.2V
+0.6VS +1.2V

1
1 1
1 1 1 1 1 1 1 1
RD15 CD32 CD33 CD42
1K_0402_1% 10U_0402_6.3V6-M 10U_0402_6.3V6-M 1U_0402_6.3V6-K CD34 CD35 CD36 CD37 CD38 CD39 CD40 CD41
2 2 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M

2
2 2 2 2 2 2 10U_0402_6.3V6-M 2 2

M_VREF_CA_DIMMB
D D

+2.5VALW +1.2V

1
1
RD17 CD44 1 1
1K_0402_1% 0.1U_0402_16V7-K +

2
CD45 CD46 CD47 CD48 CD49 CD50 CD51 CD52 CD53 CD54 CD55 CD56 CD57

2
10U_0402_6.3V6-M 10U_0402_6.3V6-M 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K @ 330U_D2_2VM_R9M
2 2 2

DDRA_MB_DM[0..7] 7

DDR_B_D[0..63] 7

DDR_B_MA[0..13] 7 DDR_B_PARITY
DDR_B_DQS#[0..7] 7

1
DDR_B_DQS[0..7] 7
RD30
@ 0_0402_5%

Layout Node:

2
+1.2V +0.6VS +1.2V
Place Close DIMMs +2.5VALW

+1.2V +1.2V +1.2V

2
JDIMM2B ME@ 1K_0402_1%
RD19
JDIMM2A ME@

1
DDR_B_MA3 131 132 DDR_B_MA2
DDR_B_MA1 133 A3 A2 134
A1 EVENT_n DDR_B_EVENT# 7
1 2 135 136
DDR_B_D5 3 VSS_1 VSS_2 4 DDR_B_D4 SB_CLK_DDR0 137 VDD_9 VDD_10 138 SB_CLK_DDR1
DQ5 DQ4 7 SB_CLK_DDR0 SB_CLK_DDR#0 CK0_t CK1_t SB_CLK_DDR#1 SB_CLK_DDR1 7
5 6 139 140
DDR_B_D1 VSS_3 VSS_4 DDR_B_D0 7 SB_CLK_DDR#0 CK0_c CK1_c SB_CLK_DDR#1 7
7 8 141 142
9 DQ1 DQ0 10 DDR_B_PARITY 143 VDD_11 VDD_12 144 DDR_B_MA0
C DDR_B_DQS#0 11 VSS_5 VSS_6 12 DDRA_MB_DM0 Parity A0 C
DDR_B_DQS0 13 DQS0_C DM0_n/DBIO_n 14
15 DQS0_t VSS_7 16 DDR_B_D6 DDR_B_BA1 145 146 DDR_B_MA10
DDR_B_D7 VSS_8 DQ6 7 DDR_B_BA1 BA1 A10/AP
17 18 147 148
19 DQ7 VSS_9 20 DDR_B_D2 DDR_B_CS0# 149 VDD_13 VDD_14 150 DDR_B_BA0
DDR_B_D3 VSS_10 DQ2 7 DDR_B_CS0# DDR_B_WE# CS0_n BA0 DDR_B_RAS# DDR_B_BA0 7
21 22 7 DDR_B_WE# 151 152
DQ3 VSS_11 DDR_B_D12 WE_n/A14 RAS_n/A16 DDR_B_RAS# 7
23 24 153 154
DDR_B_D13 25 VSS_12 DQ12 26 DDR_B_ODT0 155 VDD_15 VDD_16 156 DDR_B_CAS#
DQ13 VSS_13 DDR_B_D8 7 DDR_B_ODT0 DDR_B_CS1# ODT0 CAS_n/A15 DDR_B_MA13 DDR_B_CAS# 7
27 28 157 158
DDR_B_D9 VSS_14 DQ8 7 DDR_B_CS1# CS1_n A13
29 30 159 160
31 DQ9 VSS_15 32 DDR_B_DQS#1 DDR_B_ODT1 161 VDD_17 VDD_18 162
DDRA_MB_DM1 VSS_16 DQS1_c DDR_B_DQS1 7 DDR_B_ODT1 ODT1 C0/CS2_n/NC M_VREF_CA_DIMMB
33 34 163 164
35 DM1_n/DBl1_n DQS1_t 36 165 VDD_19 VREFCA 166 SA2_CHB_P
DDR_B_D15 37 VSS_17 VSS_18 38 DDR_B_D14 167 C1/CS3_n/NC RFU 168

0.1U_0402_10V7-K
2.2U_0402_6.3V6-M
39 DQ15 DQ14 40 DDR_B_D37 169 VSS_53 VSS_54 170 DDR_B_D36
DDR_B_D10 41 VSS_19 VSS_20 42 DDR_B_D11 171 DQ37 DQ36 172
43 DQ10 DQ11 44 DDR_B_D33 173 VSS_55 VSS_56 174 DDR_B_D32
DDR_B_D21 45 VSS_21 VSS_22 46 DDR_B_D20 +3VS +3VS +3VS 175 DQ33 DQ32 176
47 DQ21 DQ20 48 DDR_B_DQS#4 177 VSS_57 VSS_58 178 DDRA_MB_DM4

1000P_0402_25V7-K
DDR_B_D17 49 VSS_23 VSS_24 50 DDR_B_D16 DDR_B_DQS4 179 DQS4_c DM4_n/DBl4_n 180
DQ17 DQ16 DQS4_t VSS_59
1

1
51 52 181 182 DDR_B_D39
DDR_B_DQS#2 53 VSS_25 VSS_26 54 DDRA_MB_DM2 RD20 RD21 RD22 DDR_B_D38 183 VSS_60 DQ39 184
DQS2_c DM2_n/DBl2_n DQ38 VSS_61 1 1 1
DDR_B_DQS2 55 56 10K_0402_5% 10K_0402_5% 10K_0402_5% 185 186 DDR_B_D35
57 DQS2_t VSS_27 58 DDR_B_D22 @ @ DDR_B_D34 187 VSS_62 DQ35 188 CD58 CD59
VSS_28 DQ22 DQ34 VSS_63 CD63
DDR_B_D23 59 60 189 190 DDR_B_D45
2

2
61 DQ23 VSS_29 62 DDR_B_D18 DDR_B_D44 191 VSS_64 DQ45 192 2 @ 2 2
DDR_B_D19 63 VSS_30 DQ18 64 SA0_CHB_P SA1_CHB_P SA2_CHB_P 193 DQ44 VSS_65 194 DDR_B_D41
65 DQ19 VSS_31 66 DDR_B_D28 DDR_B_D40 195 VSS_66 DQ41 196
DDR_B_D29 67 VSS_32 DQ28 68 197 DQ40 VSS_67 198 DDR_B_DQS#5
DQ29 VSS_33 VSS_68 DQS5_c
1

1
69 70 DDR_B_D24 DDRA_MB_DM5 199 200 DDR_B_DQS5
DDR_B_D25 71 VSS_34 DQ24 72 RD23 RD24 RD25 201 DM5_n/DBl5_n DQS5_t 202
73 DQ25 VSS_35 74 DDR_B_DQS#3 @ @ DDR_B_D46 203 VSS_69 VSS_70 204 DDR_B_D47
VSS_36 DQS3_c 0_0402_5% 0_0402_5% 0_0402_5% DQ46 DQ47
DDRA_MB_DM3 75 76 DDR_B_DQS3 205 206
77 DM3_n/DBl3_n DQS3_t 78 @ DDR_B_D42 207 VSS_71 VSS_72 208 DDR_B_D43
2

2
DDR_B_D30 79 VSS_37 VSS_38 80 DDR_B_D31 209 DQ42 DQ43 210
81 DQ30 DQ31 82 DDR_B_D52 211 VSS_73 VSS_74 212 DDR_B_D53
DDR_B_D26 83 VSS_39 VSS_40 84 DDR_B_D27 213 DQ52 DQ53 214
85 DQ26 DQ27 86 DDR_B_D49 215 VSS_75 VSS_76 216 DDR_B_D48
87 VSS_41 VSS_42 88 +1.2V 217 DQ49 DQ48 218
89 CB5/NC CB4/NC 90 DDR_B_DQS#6 219 VSS_77 VSS_78 220 DDRA_MB_DM6
91 VSS_43 VSS_44 92 SPD Address = 2H DDR_B_DQS6 221 DQS6_c DM6_n/DBl6_n 222
93 CB1/NC CB0/NC 94 223 DQS6_t VSS_79 224 DDR_B_D54
VSS_45 VSS_46 VSS_80 DQ54
1

95 96 DDR_B_D55 225 226

97 DQS8_c DBI8_n 98 RD32 227 DQ55 VSS_81 228 DDR_B_D50
99 DQS8_t VSS_47 100 1K_0402_1% DDR_B_D51 229 VSS_82 DQ50 230
B B
101 VSS_48 CB6/NC 102 231 DQ51 VSS_83 232 DDR_B_D60
103 CB2/NC VSS_49 104 +3VS DDR_B_D61 233 VSS_84 DQ60 234
2

105 VSS_50 CB7/NC 106 235 DQ61 VSS_85 236 DDR_B_D57

107 CB3/NC VSS_51 108 DDR4_B_DRAMRST# DDR_B_D56 237 VSS_86 DQ57 238
DDR_B_CKE0 VSS_52 RESET_n DDR_B_CKE1 DDR4_B_DRAMRST# 7 DQ56 VSS_87 DDR_B_DQS#7
109 110 239 240
7 DDR_B_CKE0 CKE0 CKE1 DDR_B_CKE1 7 VSS_88 DQS7_c
1

111 112 DDRA_MB_DM7 241 242 DDR_B_DQS7

DDR_B_BG1 113 VDD_1 VDD_2 114 DDR_B_ACT_N RD26 243 DM7_n/DBl7_n DQS7_t 244
7 DDR_B_BG1 DDR_B_BG0 BG1 ACT_n DDR_B_ALERT_N DDR_B_ACT_N 7 DDR_B_D62 VSS_89 VSS_90 DDR_B_D63
115 116 @ 0_0402_5% 245 246
7 DDR_B_BG0 BG0 ALERT_n DQ62 DQ63
117 118 247 248
DDR_B_MA12 119 VDD_3 VDD_4 120 DDR_B_MA11 DDR_B_D58 249 VSS_91 VSS_92 250 DDR_B_D59
2

DDR_B_MA9 121 A12 A11 122 DDR_B_MA7 251 DQ58 DQ59 252
A9 A7 1 VSS_93 VSS_94
123 124 APU_SMB_CK0 253 254 APU_SMB_DA0
DDR_B_MA8 VDD_5 VDD_6 DDR_B_MA5 EMC@ 10,14 APU_SMB_CK0 SCL SDA SA0_CHB_P APU_SMB_DA0 10,14
125 126 CD62 255 256
DDR_B_MA6 127 A8 A5 128 DDR_B_MA4 0.1U_0402_10V7-K 257 VDDSPD SA0 258
129 A6 A4 130 2 259 VPP_1 Vtt 260 SA1_CHB_P
VDD_7 VDD_8 VPP_2 SA1
1 1
261 262
CD60 CD61 GND_1 GND_2
FOX_AS0A826-H4SB-7H 0.1U_0402_10V7-K 2.2U_0402_6.3V6-M FOX_AS0A826-H4SB-7H
2 2
SP071407011 SP071407011

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 DDR4 CH-B PRIMARY

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 15 of 80
5 4 3 2 1
 WWW.AliFixit.COM
1 2 3 4 5

UV3G DIS@

PCIE_CTX_GRX_N[0..3]
5 PCIE_CTX_GRX_N[0..3]
PCIE_CTX_GRX_P[0..3]
5 PCIE_CTX_GRX_P[0..3]
PCIE_CRX_GTX_N[0..3]
5 PCIE_CRX_GTX_N[0..3]
PCIE_CRX_GTX_P[0..3] PCIE_CTX_C_GRX_P0 AF30 AH30 PCIE_CRX_C_GTX_P0
5 PCIE_CRX_GTX_P[0..3] PCIE_CTX_C_GRX_N0 PCIE_RX0P PCIE_TX0P PCIE_CRX_C_GTX_N0
AE31 AG31
PCIE_RX0N PCIE_TX0N
A A

PCIE_CTX_C_GRX_P1 AE29 AG29 PCIE_CRX_C_GTX_P1

PCIE_CTX_C_GRX_N1 PCIE_RX1P PCIE_TX1P PCIE_CRX_C_GTX_N1
DIS@ support GEN3; 20151120 AD28
PCIE_RX1N PCIE_TX1N
AF28 DIS@
PCIE_CTX_GRX_P0 CV132 DIS@ 1 2 0.22U_0402_10V6-K PCIE_CTX_C_GRX_P0 support GEN3;20151920
PCIE_CTX_C_GRX_P2 AD30 AF27 PCIE_CRX_C_GTX_P2
PCIE_CTX_GRX_N0 CV133 DIS@ 1 2 0.22U_0402_10V6-K PCIE_CTX_C_GRX_N0 PCIE_CTX_C_GRX_N2 PCIE_RX2P PCIE_TX2P PCIE_CRX_C_GTX_N2 PCIE_CRX_GTX_P0 CV191 DIS@ 1 2 0.22U_0402_10V6-K PCIE_CRX_C_GTX_P0
AC31 AF26
PCIE_RX2N PCIE_TX2N PCIE_CRX_GTX_N0 CV192 DIS@ 1 2 0.22U_0402_10V6-K PCIE_CRX_C_GTX_N0
PCIE_CTX_GRX_P1 CV134 DIS@ 1 2 0.22U_0402_10V6-K PCIE_CTX_C_GRX_P1 PCIE_CRX_GTX_P1 CV193 DIS@ 1 2 0.22U_0402_10V6-K PCIE_CRX_C_GTX_P1
PCIE_CTX_GRX_N1 CV135 DIS@ 1 2 0.22U_0402_10V6-K PCIE_CTX_C_GRX_N1 PCIE_CTX_C_GRX_P3 PCIE_CRX_C_GTX_P3 PCIE_CRX_GTX_N1 CV194 DIS@ 1 2 0.22U_0402_10V6-K PCIE_CRX_C_GTX_N1
AC29 AD27
PCIE_CTX_C_GRX_N3 PCIE_RX3P PCIE_TX3P PCIE_CRX_C_GTX_N3 PCIE_CRX_GTX_P2 CV195 DIS@ 1 2 0.22U_0402_10V6-K PCIE_CRX_C_GTX_P2
AB28 AD26
PCIE_CTX_GRX_P2 CV136 DIS@ 1 2 0.22U_0402_10V6-K PCIE_CTX_C_GRX_P2 PCIE_RX3N PCIE_TX3N PCIE_CRX_GTX_N2 CV196 DIS@ 1 2 0.22U_0402_10V6-K PCIE_CRX_C_GTX_N2
PCIE_CRX_GTX_P3 CV197 DIS@ 1 2 0.22U_0402_10V6-K PCIE_CRX_C_GTX_P3
PCIE_CTX_GRX_N2 CV137 DIS@ 1 2 0.22U_0402_10V6-K PCIE_CTX_C_GRX_N2 PCIE_CRX_GTX_N3 CV198 DIS@ 0.22U_0402_10V6-K PCIE_CRX_C_GTX_N3
AB30 AC25 1 2
CV138 AA31 PCIE_RX4P PCIE_TX4P AB25
PCIE_CTX_GRX_P3 DIS@ 1 2 0.22U_0402_10V6-K PCIE_CTX_C_GRX_P3 PCIE_RX4N PCIE_TX4N
PCIE_CTX_GRX_N3 CV139 DIS@ 1 2 0.22U_0402_10V6-K PCIE_CTX_C_GRX_N3
AA29 Y23
Y28 PCIE_RX5P PCIE_TX5P Y24
PCIE_RX5N PCIE_TX5N

Y30 AB27
W31 PCIE_RX6P PCIE_TX6P AB26
PCIE_RX6N PCIE_TX6N

W29 Y27
V28 PCIE_RX7P PCIE_TX7P Y26
PCIE_RX7N PCIE_TX7N

V30 W24
U31 NC_121 NC_137 W23
NC_122 NC_138

+3VS U29 V27

B +3VS_VGA T28 NC_123 NC_139 U26 B
NC_124 NC_140

PCI EXPRESS INTERFACE

T30 U24
R31 NC_125 NC_141 U23
NC_126 NC_142
1

RV43
10K_0402_5% R29 T26
NC_127 NC_143
5

UV4 @ P28 T27

NC_128 NC_144
VCC

PLT_RST# 1
10,40,45,46,53 PLT_RST# IN1 PLT_RST_VGA#
4 P30 T24
DGPU_HOLD_RST# OUT PLT_RST_VGA# 74 NC_129 NC_145
2 N31 T23
GND

10 DGPU_HOLD_RST# IN2 NC_130 NC_146

1

MC74VHC1G08DFT2G_SC70-5 RV44 N29 P27

3

DIS@ 100K_0402_5% M28 NC_131 NC_147 P26

DIS@ NC_132 NC_148
2

M30 P24
L31 NC_133 NC_149 P23
NC_134 NC_150

L29 M27
K30 NC_135 NC_151 N26
NC_136 NC_152

CLOCK
GFX_CLKP AK30
9 GFX_CLKP GFX_CLKN PCIE_REFCLKP
AK32 +1.05VS_VGA
9 GFX_CLKN PCIE_REFCLKN

CALIBRATION

C Y22 RV47 1 DIS@ 2 1.69K_0402_1% C

PCIE_CALR_TX
RV40 1 DIS@ 2 1K_0402_5% N10 AA22 RV48 1 2 1K_0402_1%
TEST_PG PCIE_CALR_RX DIS@

PLT_RST_VGA# AL27
PERSTB

216-0858020-A0_FCBGA631

D D

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 R16M-M1-30 PCIE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 16 of 80
1 2 3 4 5
 WWW.AliFixit.COM
5 4 3 2 1

UV3A @

N9 AF2
L9 NC_DBG_DATA16 NC_13 AF4
AE9 NC_DBG_DATA15 NC_14
+3VS_VGA Y11 NC_DBG_DATA14 AG3
AE8 NC_DBG_DATA13 NC_15 AG5
AD9 NC_DBG_DATA12 NC_16
DBG_DATA11 NC_DPA
AC10 AH3
+1.8VS_VGA AD7 DBG_DATA10 NC_17 AH1
AC8 DBG_DATA9 NC_18
D AC7 DBG_DATA8 AK3 D
AB9 DBG_DATA7 NC_19 AK1
AB8 DBG_DATA6 NC_20
AB7 DBG_DATA5 DBG AK5
DBG_DATA4 NC_21

1
AB4 AM3
RV54 RV55 AB2 DBG_DATA3 NC_22
4.7K_0402_5% 4.7K_0402_5% Y8 DBG_DATA2 AK6
@ @ Y7 DBG_DATA1 NC_23 AM5
Test_Point_20MIL 1 TPV17 GPU_CNTL0 AL9 DBG_DATA0 NC_24
NC_DPB

2
NC_DBG_CNTL0 AJ7
BP_0 U1 NC_25 AH6
QV2A BP_1 U3 BP_0 NC_26
BP_1

2
AK8
AM26 NC_27 AL7

G1
DIECRACKMON NC_28
SMBCLK 1 6
S1 D1 EC_SMB_CK3 8,52,57,58 W6
V6 NC_2 +1.8VS_VGA
NTJD5121NT1G_SC88-6 SB00000YS00 NC_3 V4
AC6 NC_29 U5 +3VS_VGA
AC5 NC_4 NC_30
DIS@ NC_5
PU AT EC SIDE, +3VS AND 4.7K +3VS_VGA

CV150

0.1U_0402_10V7-K
AA5 V2
AA6 NC_6 NC_31
NC_7 NC_DPC 1
5

Y4
+3VS_VGA NC_32

CV149

0.1U_0402_10V7-K
QV2B +3VS_VGA +3VS_VGA W5
G2

NC_33

@
1 2
SMBDAT 4 3
EC_SMB_DA3 8,52,57,58

1
S2 D2 Y2
NC_34

@
SB00000YS00 RV91 RV92
Y6 J8 10K_0402_5% 10K_0402_5% 2
NC_8 NC_35 @ @ UV9 @

1
NTJD5121NT1G_SC88-6

2
DIS@ RV70 RV71 1 8
VCC(A) VCC(B)

2
4.7K_0402_5% @ @ 4.7K_0402_5%
RV111 GPIO15 RV89 1 @ 2 33_0402_5% 2 7 RV96 1 @ 2 33_0402_5% SVI2_SVD
1A 1B
Change QV2 from SB00000EO1J to SB00000YS00 2.2K_0402_5% I2C

2
GPIO20 RV90 1 @ 2 33_0402_5% 3 6 RV97 1 @ 2 33_0402_5% SVI2_SVC
DIS@ GPU_SCL R1 2A 2B

1
GPU_SDA R3 SCL AL25 5 4
2016/1/29 SDA NC_G DIR GND

1
RV72 1 DIS@ 2 45.3K_0402_1% RV93 RV94
C AK26 10K_0402_5% 10K_0402_5% 74AVCH2T45GD_XSON8_3X2 C
RV73 1 DIS@ 2 45.3K_0402_1% U6
GENERAL PURPOSE I/O NC_AVSSN_1 @ @
SMBCLK/SMBDATA PULL UP to 45.3Kohm from 4.7kohm GPIO_0 AJ25 +3VS_VGA
RV95

2
NC_AVSSN_2
by Sonic 150212 Change to SCS00008K00 4/19
SMBDAT U8 NC_B
AH24
1 2
DV2 SMBCLK U7 SMBDATA
VGA_AC_DC# GPIO5_AC_BATT SMBCLK

CV151

0.1U_0402_10V7-K

10U_0603_6.3V6-M
1 2 T9 AG25 10K_0402_5%
52 VGA_AC_DC# GPIO_5_AC_BATT NC_AVSSN_3

CV152
Test_Point_20MIL 1 TPV18 GPIO6 T8 1 1 @
DIS@ RB751V-40_SOD323-2 T7 GPIO_6_TACH NC_DAC1 AH26
SCS00008K00 P10 NC_GPIO_7 NC_HSYNC
GPIO5_AC_BATT GPIO_8_ROMSO

@
P4
67 GPIO5_AC_BATT GPIO_9_ROMSI 2 2 +1.8VS_VGA

@
@ P2
SVI2_SVD RV117 1 2 0_0402_5% GPIO15 GPIO_10_ROMSCK
N6 AD22
N5 NC_GPIO_11 NC_RSET
N3 NC_GPIO_12 AG24
Test_Point_20MIL 1 TPV19 GPU_GPIO17 NC_GPIO_13 NC_AVDD AE22
NC_AVSSQ
GPIO_19_CTF please add PD 10Kohm DIS@
N1
M4 GPIO_15_PWRCNTL_0 AE23
by sonic 150212 GPIO_16 NC_VDD1DI

2
RV74 1 2 10K_0402_5% GPIO19_CTF R6 AD23
GPIO_17_THERMAL_INT NC_VSS1DI RV121 RV123 RV125
+3VS_VGA @ M2 10K_0402_5% 10K_0402_5% 10K_0402_5%
SVI2_SVC RV116 1 2 0_0402_5% GPIO20 P8 GPIO_19_CTF AM12 +3VS_VGA @ @ @
P7 GPIO_20_PWRCNTL_1 NC_CEC_1

1
GPIO_21
1

N8
RV67 DIS@ RV75 1 210K_0402_5% AK10 GPIO_22_ROMCSB AK12 RV107 1 @ 2 0_0402_5% SVI2_SVD SVI2_SVD
AM10 GPIO_29 GPIO_SVD AL11 1 @ 2 SVI2_SVT SVI2_SVD 74
10K_0402_5% RV108 0_0402_5%
GPIO_30 GPIO_SVT SVI2_SVT
1

@ @ RV112 1 2 0_0402_5% N7 AJ11 RV109 1 @ 2 0_0402_5% SVI2_SVC SVI2_SVT

10 CLKREQ_PCIE4_VGA# CLKREQB GPIO_SVC SVI2_SVC 74
RV63 RV64 RV65 RV66
2

2
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% JTAG_TRSTB L6 SVI2_SVC
@ @ @ @ JTAG_TDI L5 JTAG_TRSTB RV118 RV119 RV120
JTAG_TCK L3 JTAG_TDI 10K_0402_5% 10K_0402_5% 10K_0402_5%
2

JTAG_TCK

2
JTAG_TMS L1 AL13 @ @ DIS@

MLPS&SVI2
JTAG_TRSTB JTAG_TDO K4 JTAG_TMS NC_GENLK_CLK AJ13 RV122 RV124 RV126

1
JTAG_TDI K7 JTAG_TDO NC_GENLK_VSYNC 10K_0402_5% 10K_0402_5% 10K_0402_5%
JTAG_TCK +3VS_VGA AF24 TESTEN SVI2_SVD DIS@ @ @
JTAG_TMS NC_9 AG13

1
JTAG_TDO RV76 1 @ 2 5.11K_0402_1% TESTEN NC_SWAPLOCKA SVI2_SVT
AC19 PS_0
RV77 1 DIS@ 2 1K_0402_1% W8 PS_0 SVI2_SVC
NC_GENERICB
W7 AH12
AD10 NC_GENERICD NC_SWAPLOCKB
B NC_GENERICE_HPD4 PS_1
VID CODES B
AJ9 AD19
NC_10 PS_1
+3VS_VGA AE17 PS_2
1 2 0_0402_5% GPU_PXEN AB16 PS_2 SVC SVD Boot Voltage
RV79 @
@ PX_EN AE20 PS_3
RV115 1 2 +3VS_VGA AJ27 PS_3 +1.8VS_VGA +1.8VS_VGA 0 0 1.1V
@ WAKEB
0 1 1.0V
2

4.7K_0402_5% QV4 RV80 1 2 4.7K_0402_5%

G

1
@ AC16
RV140 1 2 0_0402_5% 1 3 GPU_WAKEB NC_DBG_VREFG RV98 DIS@ @ 1 0 0.9V(Default)
10,52 EC_WAKE#
@ DIS@ 8.45K_0402_1% RV100
1 1 0.8V
D

RV106 1 2 4.7K_0402_5% 10K_0402_1%

2N7002KW_SOT323-3 NC_DDC/AUX

2
SB00000YY00 PLL/CLOCK AE6 CV153 PS_0 CV154 PS_2
NC_DDC1CLK AE5
GPU_ANAIN NC_DDC1DATA

0.1U_0402_10V7-K

0.1U_0402_10V7-K
RV68 DIS@ Test_Point_20MIL 1 TPV13 AA1 RV104 RV105
PLL_ANALOG_IN

1
AD2 1 DIS@ 1
XTALOUT 1 2 XTALIN DIS@ NC_AUX1P AD4 RV99 RV101
1 2 16.2K_0402_1% GPU_ANAOUT AA3 NC_AUX1N
RV81
PLL_ANALOG_OUT 2K_0402_1% DIS@ 4.75K_0402_1% Memory (GDDR3)

@
1M_0402_5%
2 2

2
YV1 DIS@ 1G SA22225SH30*4 PU 8.45K PD 2K
4 3 XTALIN AM28 AD13 Samsung
NC2 OSC2 XTALOUT AK28 XTALIN NC_AUX2P AD11
1 2 XTALOUT NC_AUX2N
OSC1 NC1 GPU_XOIN
2G SA000063F00*4 PU 3.4K PD 10K
RV82 1 DIS@ 2 10K_0402_5% AC22
27MHZ_16PF_7V27000011 RV83 1 DIS@ 2 10K_0402_5% GPU_XOOUT AB22 XO_IN
1 1 XO_IN2
CV143 CV144
+1.8VS_VGA +1.8VS_VGA
1G SA00005VS10*4 PU 4.53K PD 2K
DIS@ DIS@ AE16 Hynix
22P_0402_50V8-J 22P_0402_50V8-J NC_36 AD16
2 2 NC_37
+1.8VS_VGA 2G SA00005YL10*4 PU 4.75K NC

1
THERMAL AC1
DIS@ T4 NC_DDCVGACLK AC3 RV102 DIS@ RV104
1 2 FDO T2 DPLUS NC_DDCVGADATA
RV84
DMINUS
8.45K_0402_1% 3.24K_0402_1% 1G SA00005M100*4 NC PD 4.75K
X76@ Micron
10K_0402_5%

2
R5 CV155 PS_1 CV156 PS_3 2G SA000060I00*4 PU 3.24K PD 5.62K
AD17 GPIO28_FDO
TSVDD

0.1U_0402_10V7-K

0.1U_0402_10V7-K
AC17
TSVSS

1
1
1U_0402_10V6-K

CV145 1 1 1
AE19 DIS@ RV103 RV105
TS_A 5.62K_0402_1%
2K_0402_5%
DIS@

@
A X76@ A
2 216-0858020-A0_FCBGA631 2 2

2
2
Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 R16M-M1-30 GPIO

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 17 of 80
5 4 3 2 1

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 WWW.AliFixit.COM
1 2 3 4 5

+1.8VS_VGA

CV26 CV27 CV28

UV3B DIS@

10U_0603_6.3V6-M

1U_0402_10V6-K

1U_0402_10V6-K
+1.5VS_VGA 1 1 1
AM30
MEM I/O PCIE_PVDD

PCIE

DIS@

DIS@

DIS@
A CV1 CV2 CV8 CV3 CV4 CV5 CV6 CV7 H13 AB23 A
H16 VMEMIO_1 NC_38 AC23 2 2 2
VMEMIO_2 NC_39
.01U_0402_16V7-K

0.1U_0402_10V7-K

10U_0603_6.3V6-M

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K
H19 AD24
J10 VMEMIO_3 NC_40 AE24
1 1 1 1 1 1 1 1 VMEMIO_4 NC_41
J23 AE25
J24 VMEMIO_5 NC_42 AE26
VMEMIO_6 NC_43
DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

@
J9 AF25 +1.05VS_VGA
2 2 2 2 2 2 2 2 K10 VMEMIO_7 NC_44 AG26
K23 VMEMIO_8 NC_45
K24 VMEMIO_9
K9 VMEMIO_10 L23 CV29 CV30 CV31 CV32 CV33 CV34 CV35 CV36
L11 VMEMIO_11 PCIE_VDDC_1 L24
VMEMIO_12 PCIE_VDDC_2

10U_0603_6.3V6-M

10U_0603_6.3V6-M
L12 L25
VMEMIO_13 PCIE_VDDC_3

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K
L13 L26 1 1 1 1 1 1 1 1
L20 VMEMIO_14 PCIE_VDDC_4 M22
L21 VMEMIO_15 PCIE_VDDC_5 N22
VMEMIO_16 PCIE_VDDC_6

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

@
L22 N23
VMEMIO_17 PCIE_VDDC_7 N24 2 2 2 2 2 2 2 2
PCIE_VDDC_8 R22 10U_0603_6.3V6-M to 0402
+1.8VS_VGA PCIE_VDDC_9 T22
PCIE_VDDC_10
LEVEL
TRANSLATION PCIE_VDDC_11
U22
V22
20151126 +VGA_CORE
CV9 AA20 PCIE_VDDC_12
AA21 VDD_GPIO18_1
VDD_GPIO18_2 CV45 CV46 CV47 CV48 CV49 CV50
AB20 AA15 CV37 CV38 CV39 CV40 CV41 CV42 CV43 CV44
VDD_GPIO18_3 CORE VDDC_1
1U_0402_10V6-K

1 AB21 N15
VDD_GPIO18_4 VDDC_2

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K
N17

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M
10U_0402_6.3V6-M
VDDC_3 R13
I/O VDDC_4 1 1 1 1 1 1 1 1 1 1 1 1 1 1
DIS@

R16
2 AA17 VDDC_5 R18
VDD_GPIO33_1 VDDC_6

DIS@

DIS@

DIS@

CDIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@
AA18 Y21

CDIS@
VDD_GPIO33_2 VDDC_7 2 2 2 2 2 2 2 2 2 2 2 2 @2
AB17 T12 2
AB18 VDD_GPIO33_3 VDDC_8 T15
VDD_GPIO33_4 VDDC_9 T17
V12 VDDC_10 T20
B
Y12 NC_VDDR4_1 VDDC_11 U13 B
+3VS_VGA U12 NC_VDDR4_2 VDDC_12 U16
NC_VDDR4_3 VDDC_13 U18 CV51 CV52 CV53 CV54 CV55 CV56 CV57 CV58
VDDC_14 V21
VDDC_15

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K

2.2U_0402_6.3V6-K
CV10 V15
VDDC_16 V17
VDDC_17 1 1 1 1 1 1 1 1
V20
VDDC_18
1U_0402_10V6-K

Y13

POWER
1 VDDC_19

DIS@

DIS@

DIS@

DIS@

@
Y16
VDDC_20 Y18 2 2 2 2 2 2 2 2
VDDC_21
DIS@

AA12
2 VDDC_22 M11
VDDC_23 N12
VDDC_24 U11
VDDC_25 AB13
VDDC_26 U10
VDDC_27 W9
PLL
VDDC_28 Y9
VDDC_29 W10
VDDC_30 T10 +1.05VS_VGA
+1.8VS_VGA MPLL_PVDD VDDC_31 AC14
VDDC_32 AB12
LV3 VDDC_33
DIS@ AB11 CV22
1 2 CV17 CV18 CV19
90mA L8 VDDC_34 AC11
MPLL_PVDD VDDC_35

1U_0402_10V6-K
AC13
VDDC_36
10U_0603_6.3V6-M

10U_0603_6.3V6-M

1U_0402_10V6-K

BLM18PG221SN1D_2P SPLL_PVDD 1
1 1 1
AC20 TOPAZ_VDDC_SEN RV157 1 @ 2 0_0402_5% VDDC_SEN
75mA FB_VDDC TOPAZ_VDDC_RTN RV158 VDDC_RTN

DIS@
H7 AD20 1 @ 2 0_0402_5%
SPLL_PVDD FB_GND_1 2
DIS@

DIS@

DIS@

2 2 2 SPLL_VDDC
R21
BIF_VDDC_1 U21
100mA H8 BIF_VDDC_2
SPLL_VDDC +VGA_CORE
C C
J7 ISOLATED
+1.8VS_VGA SPLL_PVSS
CORE I/O
M13 CV59 CV60 CV61 CV62 CV63 CV64 CV65
LV4 VDDCI_1 M15
VDDCI_2

10U_0603_6.3V6-M

10U_0603_6.3V6-M

0.1U_0402_10V7-K

0.1U_0402_10V7-K
1 2 CV20 CV21 M16
VDDCI_3

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K
M17 1 1 1 1 1 1 1
VDDCI_4
10U_0603_6.3V6-M

BLM18PG121SN1D_2P M18
VDDCI_5
1U_0402_10V6-K

1 1 M20
VDDCI_6
DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@
DIS@ M21
VDDCI_7 N20 2 2 2 2 2 2 2
VDDCI_8
DIS@

DIS@

2 2 W1
FB_VDDCI W3
FB_GND_2

216-0858020-A0_FCBGA631
+1.05VS_VGA

LV5
1 2 CV24 CV25
FOR JET,PUT VIAS UNDER ASIC +VGA_CORE
0.1U_0402_10V7-K

BLM18PG121SN1D_2P
1U_0402_10V6-K

DIS@ 1 1
VDDC_SEN RV1 1 @ 2 0_0402_5%
74 VDDC_SEN
DIS@

DIS@

2 2 VDDC_RTN RV2 1 @ 2 0_0402_5%

74 VDDC_RTN

D D

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 R16M-M1-30 Core Power
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 18 of 80
1 2 3 4 5
 WWW.AliFixit.COM
5 4 3 2 1

UV3C DIS@ UV3D DIS@ UV3E DIS@

DP POWER NC/DP POWER

AG15 AE11 AL15 AA27 A3

AG16 NC_DP_VDDR_1 NC_50 AF11 NC_UPHYAB_TMDPA_TX0N AB24 GND_1 GND_65 A30
AK14
AF16 NC_DP_VDDR_2 NC_51 AE13 NC_UPHYAB_TMDPA_TX0P AB32 GND_2 GND_66 AA13
AG17 NC_DP_VDDR_3 NC_52 AF13 AC24 GND_3 GND_67 AA16
D AH16 D
+1.8VS_VGA AG18 NC_DP_VDDR_4 NC_53 AG8 NC_UPHYAB_TMDPA_TX1N AC26 GND_4 GND_68 AB10
AJ15
AG19 NC_DP_VDDR_5 NC_54 AG10 NC_UPHYAB_TMDPA_TX1P AC27 GND_5 GND_69 AB15
CV66 CV67 AF14 NC_DP_VDDR_6 NC_55 AD25 GND_6 GND_70 AB6
AL17
DP_VDDR NC_UPHYAB_TMDPA_TX2N AD32 GND_7 GND_71 AC9
AK16
NC_UPHYAB_TMDPA_TX2P GND_8 GND_72
10U_0603_6.3V6-M
AE27 AD6
GND_9 GND_73

1U_0402_10V6-K
1 1 AH18 AF32 AD8
NC_UPHYAB_TMDPA_TX3N AG27 GND_10 GND_74 AE7
AJ17
AG20 AF6 NC_UPHYAB_TMDPA_TX3P AH32 GND_11 GND_75 AG12
NC_DP_VDDC_1 NC_56 GND_12 GND_76
DIS@

DIS@

AG21 AF7 AL19 K28 AH10

2 2 AF22 NC_DP_VDDC_2 NC_57 AF8 NC_TXOUT_L3P K32 GND_13 GND_77 AH28
AK18
AG22 NC_DP_VDDC_3 NC_58 AF9 NC_TXOUT_L3N L27 GND_14 GND_78 B10
AD14 NC_DP_VDDC_4 NC_59 M32 GND_15 GND_79 B12
DP_VDDC NC_TMDP N25 GND_16 GND_80 B14
N27 GND_17 GND_81 B16
P25 GND_18 GND_82 B18
AH20
AG14 AE1 NC_UPHYAB_TMDPB_TX0N P32 GND_19 GND_83 B20
AJ19
+1.05VS_VGA AH14 NC_DP_VSSR_1 NC_60 AE3 NC_UPHYAB_TMDPB_TX0P R27 GND_20 GND_84 B22
AM14 NC_DP_VSSR_2 NC_61 AG1 T25 GND_21 GND_85 B24
AL21
CV70 CV71 AM16 NC_DP_VSSR_3 NC_62 AG6 NC_UPHYAB_TMDPB_TX1N T32 GND_22 GND_86 B26
AK20
AM18 NC_DP_VSSR_4 NC_63 AH5 NC_UPHYAB_TMDPB_TX1P U25 GND_23 GND_87 B6
NC_DP_VSSR_5 NC_64 GND_24 GND_88
0.1U_0402_10V7-K

AF23 AF10 AH22 U27 B8

NC_DP_VSSR_6 NC_65 NC_UPHYAB_TMDPB_TX2N GND_25 GND_89
1U_0402_10V6-K

1 1 AG23 AG9 AJ21 V32 C1

AM20 NC_DP_VSSR_7 NC_66 AH8 NC_UPHYAB_TMDPB_TX2P W25 GND_26 GND_90 C32
AM22 NC_DP_VSSR_8 NC_67 AM6 W26 GND_27 GND_91 E28
AL23
NC_DP_VSSR_9 NC_68 NC_UPHYAB_TMDPB_TX3N GND_28 GND_92
DIS@

DIS@

AM24 AM8 AK22 W27 F10

2 2 AF19 NC_DP_VSSR_10 NC_69 AG7 NC_UPHYAB_TMDPB_TX3P Y25 GND_29 GND_93 F12
AF20 NC_DP_VSSR_11 NC_70 AG11 Y32 GND_30 GND_94 F14
AK24
AE14 NC_DP_VSSR_12 NC_71 NC_TXOUT_U3P GND_31 GND_95 F16
AJ23
DP_VSSR NC_TXOUT_U3N GND_96 F18
GND_97 F2
GND_98 F20
AF17 AE10 M6 GND_99 F22
NC_UPHYAB_DP_CALR NC_72 N13 GND_32 GND_100 F24
216-0858020-A0_FCBGA631 N16 GND_33 GND_101 F26
C
N18 GND_34 GND_102 F6 C
N21 GND_35 GND_103 F8
GND_36 GND GND_104
216-0858020-A0_FCBGA631 P6 G10
P9 GND_37 GND_105 G27
R12 GND_38 GND_106 G31
R15 GND_39 GND_107 G8
R17 GND_40 GND_108 H14
R20 GND_41 GND_109 H17
T13 GND_42 GND_110 H2
T16 GND_43 GND_111 H20
T18 GND_44 GND_112 H6
T21 GND_45 GND_113 J27
T6 GND_46 GND_114 J31
U15 GND_47 GND_115 K11
U17 GND_48 GND_116 K2
U20 GND_49 GND_117 K22
U9 GND_50 GND_118 K6
V13 GND_51 GND_119
V16 GND_52
V18 GND_53
ASIC Ball Topaz Jet ASIC Ball Topaz Jet Y10 GND_54
Y15 GND_55
Y17 GND_56
U10,T10 VDDC NC U1 BP_0 NC GND_57
Y20
AB13,W9 R11 GND_58 A32
AB11,AB12 U3 BP_1 NC T11 GND_59 VSS_MECH_1 AM1
GND_60 VSS_MECH_2
AC11,AC13 AA11
GND_61 VSS_MECH_3
AM32
AC14,Y9,W10 M12
N11 GND_62
AM26 DIECRACKMON NC GND_63
V11
GND_64
Y11 NC DBG_DATA13
AC20 FB_VDDC NC
216-0858020-A0_FCBGA631
B AE9 NC DBG_DATA14 B
AD20 FB_VSS NC
L9 NC DBG_DATA15
W1 FB_VDDCI NC
N9 NC DBG_DATA16
W3 FB_VSS NC
AE8 NC DBG_DATA12
AJ11 GPIO_SVC NC_SVI2
AL9 NC DBG_CNTL0
AK12 GPIO_SVD NC_SVI2
H13,H16,H19,J10 VMEMIO VDDR1
AL11 GPIO_SVT NC_SVI2 J23,J24,J9,K10
K23,K24,K9,L11
N6 GPIO_11 NC_GPIO11 L12,L13,L20,L21
L22 Bits5 Bits4 Bits3 Bits2 Bits1
N5 GPIO_12 NC_GPIO12
PS0 1 1 0 0 1
AA17,AA18 VDD_GPIO33 VDDR3
N3 GPIO_13 NC_GPIO13 AB17,AB18
PS1 0 0 1 1 1
AJ27 WAKEB NC_VSYNC
AA20,AA21 VDD_GPIO18 VDD_CT PS2 0 0 0 0 0
AB20,AB21
T8 PCC/GPIO_6 GPIO_6
PS3 1 1 ? ? ?
A
AA3 PLL_ANALOG_OUT NC A

AA1 PLL_ANALOG_IN NC

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 R16M-M1-30 DP Power/GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

WWW.ALISALER.COM
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 19 of 80
5 4 3 2 1
 WWW.AliFixit.COM
1 2 3 4 5

UV3F DIS@
FBA_MA[15..0] 21,22
A A
FBA_BA[2..0] 21,22 GDDR5/DDR3 GDDR5/DDR3
FBA_D0 K27 K17 FBA_MA0
21,22 FBA_DQS[7..0] FBA_D1 DQA0_0 MAA0_0 FBA_MA1
J29 J20
FBA_D2 H30 DQA0_1 MAA0_1 H23 FBA_MA2
21,22 FBA_DQM[7..0] FBA_D3 DQA0_2 MAA0_2 FBA_MA3
H32 G23
FBA_D4 G29 DQA0_3 MAA0_3 G24 FBA_MA4
21,22 FBA_DQS#[7..0] FBA_D5 DQA0_4 MAA0_4 FBA_MA5
F28 H24
FBA_D[0..63] FBA_D6 F32 DQA0_5 MAA0_5 J19 FBA_MA6
21,22 FBA_D[0..63] FBA_D7 DQA0_6 MAA0_6 FBA_MA7
F30 K19
FBA_D8 C30 DQA0_7 MAA0_7 G20 FBA_MA13
FBA_D9 F27 DQA0_8 MAA0_8 L17 FBA_MA15
FBA_D10 A28 DQA0_9 MAA0_9
FBA_D11 C28 DQA0_10 J14 FBA_MA8
FBA_D12 E27 DQA0_11 MAA1_0 K14 FBA_MA9
FBA_D13 G26 DQA0_12 MAA1_1 J11 FBA_MA10
FBA_D14 D26 DQA0_13 MAA1_2 J13 FBA_MA11
FBA_D15 F25 DQA0_14 MAA1_3 H11 FBA_MA12
FBA_D16 A25 DQA0_15 MAA1_4 G11 FBA_BA2
FBA_D17 C25 DQA0_16 MAA1_5 J16 FBA_BA0
FBA_D18 DQA0_17 MAA1_6

MEMORY INTERFACE
E25 L15 FBA_BA1
FBA_D19 D24 DQA0_18 MAA1_7 G14 FBA_MA14
FBA_D20 E23 DQA0_19 MAA1_8 L16
FBA_D21 F23 DQA0_20 MAA1_9
FBA_D22 D22 DQA0_21 E32 FBA_DQM0
FBA_D23 F21 DQA0_22 WCKA0_0 E30 FBA_DQM1
FBA_D24 E21 DQA0_23 WCKA0B_0 A21 FBA_DQM2
FBA_D25 D20 DQA0_24 WCKA0_1 C21 FBA_DQM3
FBA_D26 F19 DQA0_25 WCKA0B_1 E13 FBA_DQM4
FBA_D27 A19 DQA0_26 WCKA1_0 D12 FBA_DQM5
FBA_D28 D18 DQA0_27 WCKA1B_0 E3 FBA_DQM6
FBA_D29 F17 DQA0_28 WCKA1_1 F4 FBA_DQM7
+1.5VS_VGA FBA_D30 A17 DQA0_29 WCKA1B_1
FBA_D31 C17 DQA0_30 H28 FBA_DQS0
FBA_D32 E17 DQA0_31 EDCA0_0 C27 FBA_DQS1
B FBA_D33 D16 DQA1_0 EDCA0_1 A23 FBA_DQS2 B
FBA_D34 F15 DQA1_1 EDCA0_2 E19 FBA_DQS3
DQA1_2 EDCA0_3
1
FBA_D35 A15 E15 FBA_DQS4
RV5 FBA_D36 D14 DQA1_3 EDCA1_0 D10 FBA_DQS5
40.2_0402_1% FBA_D37 F13 DQA1_4 EDCA1_1 D6 FBA_DQS6
DIS@ FBA_D38 A13 DQA1_5 EDCA1_2 G5 FBA_DQS7
FBA_D39 C13 DQA1_6 EDCA1_3
2

FBA_D40 E11 DQA1_7 H27 FBA_DQS#0

CV72 FBA_D41 A11 DQA1_8 DDBIA0_0 A27 FBA_DQS#1
FBA_D42 C11 DQA1_9 DDBIA0_1 C23 FBA_DQS#2
FBA_D43 F11 DQA1_10 DDBIA0_2 C19 FBA_DQS#3
DQA1_11 DDBIA0_3
1

1U_0402_10V6-K
FBA_D44 A9 C15 FBA_DQS#4
1 DQA1_12 DDBIA1_0
RV6 FBA_D45 C9 E9 FBA_DQS#5
100_0402_5% FBA_D46 F9 DQA1_13 DDBIA1_1 C5 FBA_DQS#6
+1.5VS_VGA DQA1_14 DDBIA1_2
DIS@
DIS@ FBA_D47 D8 H4 FBA_DQS#7
2 FBA_D48 E7 DQA1_15 DDBIA1_3
2

FBA_D49 A7 DQA1_16 L18 FBA_ODTA0

FBA_D50 DQA1_17 ADBIA0 FBA_ODTA1 FBA_ODTA0 21
C7 K16
FBA_D51 DQA1_18 ADBIA1 FBA_ODTA1 22
F7
DQA1_19
1

FBA_D52 A5 H26 FBA_CLKA0

FBA_D53 DQA1_20 CLKA0 FBA_CLKA0# FBA_CLKA0 21
RV7 DIS@ E5 H25
FBA_D54 DQA1_21 CLKA0B FBA_CLKA0# 21
40.2_0402_1% C3
FBA_D55 E1 DQA1_22 G9 FBA_CLKA1
FBA_D56 DQA1_23 CLKA1 FBA_CLKA1# FBA_CLKA1 22
G7 H9
FBA_CLKA1# 22
2

FBA_D57 G6 DQA1_24 CLKA1B

CV73 FBA_D58 G1 DQA1_25 G22 FBA_RASA0#
FBA_D59 DQA1_26 RASA0B FBA_RASA1# FBA_RASA0# 21
G3 G17
FBA_D60 DQA1_27 RASA1B FBA_RASA1# 22
J6
DQA1_28
1

1U_0402_10V6-K

FBA_D61 J1 G19 FBA_CASA0#

1 DQA1_29 CASA0B FBA_CASA0# 21
RV8 DIS@ FBA_D62 J3 G16 FBA_CASA1#
FBA_D63 DQA1_30 CASA1B FBA_CASA1# 22
100_0402_5% J5
DQA1_31
DIS@

H22 FBA_CSA0#
2 CSA0B_0 FBA_CSA0# 21
K26 J22
2

J26 MVREFDA_1 CSA0B_1

MVREFSA_2 G13 FBA_CSA1#
C C
CSA1B_0 FBA_CSA1# 22
J25 K13
RV14 1 DIS@ 2 120_0402_1% K25 NC_120 CSA1B_1
MEM_CALRP0 K20 FBA_CKEA0
CKEA0 FBA_CKEA1 FBA_CKEA0 21
J17
CKEA1 FBA_CKEA1 22
RV9 DIS@ RV10 DIS@ G25 FBA_WEA0#
FBA_RST# WEA0B FBA_WEA1# FBA_WEA0# 21
1 2 1 2 L10 H10
21,22 FBA_RST# DRAM_RST WEA1B FBA_WEA1# 22
49.9_0402_1% 10_0402_5% K8
L7 CLKTESTA
CLKTESTB
1

1 1
CV74 DIS@ RV11 DIS@ CV75
120P_0402_50V8-J 5.1K_0402_5% 68P_0402_50V8-J
@ 216-0858020-A0_FCBGA631
2 2
2

0.1U_0402_10V7-K

0.1U_0402_10V7-K

CV76 1 CV77 1
@

2 2
1

RV12 RV13
51.1_0402_1% 51.1_0402_1%
@ @
2

D D

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 R16M-M1-30 MEM Interface
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 20 of 80
1 2 3 4 5
 WWW.AliFixit.COM
1 2 3 4 5

Memory Partition A - Lower 32 bits

FBA_MA[15..0] 20,22
UV6 X76@
UV5 X76@
+FBA_VREFD0_L FBA_D17 FBA_BA[2..0] 20,22
M8 E3
+FBA_VREFC0_U M8 E3 FBA_D2 H1 VREFCA DQL0 F7 FBA_D20
VREFCA DQL0 FBA_D5 VREFDQ DQL1 FBA_D23 FBA_DQS[7..0] 20,22
H1 F7 F2
VREFDQ DQL1 F2 FBA_D0 FBA_MA0 N3 DQL2 F8 FBA_D21
A
FBA_MA0 DQL2 FBA_D4 FBA_MA1 A0 DQL3 FBA_D16
Group2 (IN1) FBA_DQM[7..0] 20,22 A
N3 F8 P7 H3
FBA_MA1 P7 A0 DQL3 H3 FBA_D1 FBA_MA2 P3 A1 DQL4 H8 FBA_D18
FBA_MA2 A1 DQL4 FBA_D6
Group0 (IN3) FBA_MA3 A2 DQL5 FBA_D19 FBA_DQS#[7..0] 20,22
P3 H8 N2 G2
FBA_MA3 N2 A2 DQL5 G2 FBA_D3 FBA_MA4 P8 A3 DQL6 H7 FBA_D22
FBA_MA4 A3 DQL6 FBA_D7 FBA_MA5 A4 DQL7 FBA_D[0..63] 20,22
P8 H7 P2
FBA_MA5 P2 A4 DQL7 FBA_MA6 R8 A5
FBA_MA6 R8 A5 FBA_MA7 R2 A6 D7 FBA_D9
FBA_MA7 R2 A6 D7 FBA_D31 FBA_MA8 T8 A7 DQU0 C3 FBA_D10
FBA_MA8 T8 A7 DQU0 C3 FBA_D27 FBA_MA9 R3 A8 DQU1 C8 FBA_D13
FBA_MA9 R3 A8 DQU1 C8 FBA_D30 FBA_MA10 L7 A9 DQU2 C2 FBA_D12
FBA_MA10 A9 DQU2 FBA_D25 FBA_MA11 A10/AP DQU3 FBA_D8
Group1 (TOP)
L7 C2 R7 A7
FBA_MA11 R7 A10/AP DQU3 A7 FBA_D28 FBA_MA12 N7 A11 DQU4 A2 FBA_D14
FBA_MA12 A11 DQU4 FBA_D24
Group3 (BOT) FBA_MA13 A12/BC DQU5 FBA_D15
N7 A2 T3 B8
FBA_MA13 T3 A12/BC DQU5 B8 FBA_D29 FBA_MA14 T7 A13 DQU6 A3 FBA_D11
FBA_MA14 T7 A13 DQU6 A3 FBA_D26 A14 DQU7
A14 DQU7 +1.5VS_VGA
+1.5VS_VGA
FBA_BA0 M2 B2
FBA_BA0 M2 B2 FBA_BA1 N8 BA0 VDD_1 D9
FBA_BA1 N8 BA0 VDD_1 D9 FBA_BA2 M3 BA1 VDD_2 G7
FBA_BA2 M3 BA1 VDD_2 G7 BA2 VDD_3 K2 +1.5VS_VGA
BA2 VDD_3 K2 VDD_4 K8
VDD_4 K8 VDD_5 N1
VDD_5 VDD_6

1
N1 FBA_CLKA0 J7 N9
FBA_CLKA0 J7 VDD_6 N9 FBA_CLKA0# K7 CK VDD_7 R1 RV18
20 FBA_CLKA0 FBA_CLKA0# CK VDD_7 FBA_CKEA0 CK VDD_8
K7 R1 K9 R9 4.99K_0402_1%
20 FBA_CLKA0# FBA_CKEA0 CK VDD_8 CKE VDD_9
K9 R9 DIS@
20 FBA_CKEA0 CKE VDD_9

2
FBA_ODTA0 K1 A1 CV100 +FBA_VREFC0_U
FBA_ODTA0 K1 A1 FBA_CSA0# L2 ODT VDDQ_1 A8
20 FBA_ODTA0 FBA_CSA0# ODT VDDQ_1 FBA_RASA0# CS VDDQ_2

0.1U_0402_10V7-K
L2 A8 J3 C1
20 FBA_CSA0# CS VDDQ_2 RAS VDDQ_3

1
FBA_RASA0# J3 C1 FBA_CASA0# K3 C9
20 FBA_RASA0# RAS VDDQ_3 CAS VDDQ_4 1
FBA_CASA0# K3 C9 FBA_WEA0# L3 D2 RV19
20 FBA_CASA0# FBA_WEA0# CAS VDDQ_4 WE VDDQ_5
L3 D2 E9 4.99K_0402_1%
B 20 FBA_WEA0# WE VDDQ_5 VDDQ_6 B

DIS@
E9 F1 DIS@
VDDQ_6 F1 FBA_DQS2 F3 VDDQ_7 H2 2

2
FBA_DQS0 F3 VDDQ_7 H2 FBA_DQS1 C7 DQSL VDDQ_8 H9
FBA_DQS3 C7 DQSL VDDQ_8 H9 DQSU VDDQ_9
DQSU VDDQ_9
FBA_DQM2 E7 A9
FBA_DQM0 E7 A9 FBA_DQM1 D3 DML VSS_1 B3
FBA_DQM3 D3 DML VSS_1 B3 DMU VSS_2 E1
DMU VSS_2 E1 VSS_3 G8
VSS_3 G8 FBA_DQS#2 G3 VSS_4 J2
FBA_DQS#0 G3 VSS_4 J2 FBA_DQS#1 B7 DQSL VSS_5 J8
FBA_DQS#3 B7 DQSL VSS_5 J8 DQSU VSS_6 M1 +1.5VS_VGA
DQSU VSS_6 M1 VSS_7 M9
VSS_7 M9 VSS_8 P1
VSS_8 VSS_9

1
P1 FBA_RST# T2 P9
FBA_RST# T2 VSS_9 P9 RESET VSS_10 T1 RV24
20,22 FBA_RST# RESET VSS_10 VSS_11
T1 L8 T9 4.99K_0402_1%
L8 VSS_11 T9 ZQ VSS_12 DIS@
ZQ VSS_12

2
J1 B1 CV103 +FBA_VREFD0_L
NC1 VSSQ_1
1

1
J1 B1 L1 B9
NC1 VSSQ_1 NC2 VSSQ_2

0.1U_0402_10V7-K
RV15 RV16 L1 B9 RV17 J9 D1
NC2 VSSQ_2 NC3 VSSQ_3

1
10K_0402_5% 243_0402_1% J9 D1 243_0402_1% L9 D8 1
@ DIS@ L9 NC3 VSSQ_3 D8 DIS@ FBA_MA15 M7 NC4 VSSQ_4 E2 RV25
FBA_MA15 M7 NC4 VSSQ_4 E2 NC5 VSSQ_5 E8 4.99K_0402_1%
2

2
NC5 VSSQ_5 VSSQ_6

DIS@
E8 F9 DIS@
VSSQ_6 F9 VSSQ_7 G1 2

2
VSSQ_7 G1 VSSQ_8 G9
VSSQ_8 G9 VSSQ_9
VSSQ_9 96-BALL
96-BALL SDRAM DDR3
SDRAM DDR3 K4W4G1646D-BC1A_FBGA96
K4W4G1646D-BC1A_FBGA96

C C

FBA_CLKA0

+1.5VS_VGA UV6 SIDE +1.5VS_VGA UV7 SIDE

1
CV78 CV79 CV80 CV81 CV82 CV83 CV89 CV90 CV91 CV92 CV93 CV94 RV26
40.2_0402_1%
10U_0603_6.3V6-M

10U_0603_6.3V6-M

DIS@
1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1 1 1 1 1 1 1 1 1 1 1 1

2
CV104 DIS@
1 2
DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

CDIS@

DIS@

2 2 2 2 2 2 2 2 2 2 2 2 .01U_0402_16V7-K

1
RV27
40.2_0402_1%
DIS@

2
+1.5VS_VGA UV6 SIDE +1.5VS_VGA UV7 SIDE FBA_CLKA0#
CV84 CV85 CV86 CV87 CV88 CV95 CV96 CV97 CV98 CV99
0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

1 1 1 1 1 1 1 1 1 1
DIS@

DIS@

DIS@

DIS@

CDIS@

DIS@

DIS@

DIS@

2 2 2 2 2 2 2 2 2 2

D D

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 R16M-M1-30 DDR3 VRAM U
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 21 of 80
1 2 3 4 5
 WWW.AliFixit.COM
1 2 3 4 5

Memory Partition A - Upper 32 bits

UV7 X76@
FBA_MA[15..0] 20,21
UV8 X76@
+FBA_VREFC1_U M8 E3 FBA_D36
VREFCA DQL0 FBA_D34 +FBA_VREFD1_L FBA_D60 FBA_BA[2..0] 20,21
H1 F7 M8 E3
VREFDQ DQL1 F2 FBA_D37 H1 VREFCA DQL0 F7 FBA_D58
A A
FBA_MA0 DQL2 FBA_D35 VREFDQ DQL1 FBA_D63 FBA_DQS[7..0] 20,21
N3 F8 F2
FBA_MA1 P7 A0 DQL3 H3 FBA_D39 FBA_MA0 N3 DQL2 F8 FBA_D59
FBA_MA2 A1 DQL4 FBA_D32
Group4 (IN1) FBA_MA1 A0 DQL3 FBA_D56 FBA_DQM[7..0] 20,21
P3 H8 P7 H3 Group7 (IN3)
FBA_MA3 N2 A2 DQL5 G2 FBA_D38 FBA_MA2 P3 A1 DQL4 H8 FBA_D62
FBA_MA4 A3 DQL6 FBA_D33 FBA_MA3 A2 DQL5 FBA_D57 FBA_DQS#[7..0] 20,21
P8 H7 N2 G2
FBA_MA5 P2 A4 DQL7 FBA_MA4 P8 A3 DQL6 H7 FBA_D61
FBA_MA6 A5 FBA_MA5 A4 DQL7 FBA_D[0..63] 20,21
R8 P2
FBA_MA7 R2 A6 D7 FBA_D41 FBA_MA6 R8 A5
FBA_MA8 T8 A7 DQU0 C3 FBA_D47 FBA_MA7 R2 A6 D7 FBA_D55
FBA_MA9 R3 A8 DQU1 C8 FBA_D42 FBA_MA8 T8 A7 DQU0 C3 FBA_D51
FBA_MA10 L7 A9 DQU2 C2 FBA_D43 FBA_MA9 R3 A8 DQU1 C8 FBA_D54
FBA_MA11 R7 A10/AP DQU3 A7 FBA_D44 FBA_MA10 L7 A9 DQU2 C2 FBA_D48
FBA_MA12 A11 DQU4 FBA_D46
Group5 (TOP) FBA_MA11 A10/AP DQU3 FBA_D52
N7 A2 R7 A7 Group6 (BOT)
FBA_MA13 T3 A12/BC DQU5 B8 FBA_D45 FBA_MA12 N7 A11 DQU4 A2 FBA_D50 +1.5VS_VGA
FBA_MA14 T7 A13 DQU6 A3 FBA_D40 FBA_MA13 T3 A12/BC DQU5 B8 FBA_D53
A14 DQU7 FBA_MA14 T7 A13 DQU6 A3 FBA_D49
A14 DQU7

1
+1.5VS_VGA RV30
+1.5VS_VGA
FBA_BA0 M2 B2 4.99K_0402_1%
FBA_BA1 N8 BA0 VDD_1 D9 FBA_BA0 M2 B2 DIS@
FBA_BA2 M3 BA1 VDD_2 G7 FBA_BA1 N8 BA0 VDD_1 D9

2
BA2 VDD_3 K2 FBA_BA2 M3 BA1 VDD_2 G7 CV127 +FBA_VREFC1_U
VDD_4 K8 BA2 VDD_3 K2
VDD_5 VDD_4

0.1U_0402_10V7-K
N1 K8
VDD_6 VDD_5

1
FBA_CLKA1 J7 N9 N1
20 FBA_CLKA1 CK VDD_7 VDD_6 1
FBA_CLKA1# K7 R1 FBA_CLKA1 J7 N9 RV31
20 FBA_CLKA1# FBA_CKEA1 K9 CK VDD_8 FBA_CLKA1# CK VDD_7
R9 K7 R1 4.99K_0402_1%
20 FBA_CKEA1 CKE VDD_9 FBA_CKEA1 CK VDD_8

DIS@
K9 R9 DIS@
CKE VDD_9 2

2
FBA_ODTA1 K1 A1
20 FBA_ODTA1 FBA_CSA1# ODT VDDQ_1 FBA_ODTA1
L2 A8 K1 A1
20 FBA_CSA1# FBA_RASA1# CS VDDQ_2 FBA_CSA1# ODT VDDQ_1
J3 C1 L2 A8
20 FBA_RASA1# FBA_CASA1# RAS VDDQ_3 FBA_RASA1# CS VDDQ_2
K3 C9 J3 C1
20 FBA_CASA1# FBA_WEA1# CAS VDDQ_4 FBA_CASA1# RAS VDDQ_3
L3 D2 K3 C9
B 20 FBA_WEA1# WE VDDQ_5 FBA_WEA1# CAS VDDQ_4 B
E9 L3 D2
VDDQ_6 F1 WE VDDQ_5 E9
FBA_DQS4 F3 VDDQ_7 H2 VDDQ_6 F1
FBA_DQS5 C7 DQSL VDDQ_8 H9 FBA_DQS7 F3 VDDQ_7 H2 +1.5VS_VGA
DQSU VDDQ_9 FBA_DQS6 C7 DQSL VDDQ_8 H9
DQSU VDDQ_9

1
FBA_DQM4 E7 A9
FBA_DQM5 D3 DML VSS_1 B3 FBA_DQM7 E7 A9 RV36
DMU VSS_2 E1 FBA_DQM6 D3 DML VSS_1 B3 4.99K_0402_1%
VSS_3 G8 DMU VSS_2 E1 DIS@
FBA_DQS#4 G3 VSS_4 J2 VSS_3 G8

2
FBA_DQS#5 B7 DQSL VSS_5 J8 FBA_DQS#7 G3 VSS_4 J2 CV130 +FBA_VREFD1_L
DQSU VSS_6 M1 FBA_DQS#6 B7 DQSL VSS_5 J8
VSS_7 DQSU VSS_6

0.1U_0402_10V7-K
M9 M1
VSS_8 VSS_7

1
P1 M9 1
FBA_RST# T2 VSS_9 P9 VSS_8 P1 RV37
20,21 FBA_RST# RESET VSS_10 FBA_RST# VSS_9
T1 T2 P9 4.99K_0402_1%
VSS_11 RESET VSS_10

DIS@
L8 T9 T1 DIS@
ZQ VSS_12 L8 VSS_11 T9 2

2
ZQ VSS_12
1

J1 B1
NC1 VSSQ_1

1
RV28 L1 B9 J1 B1
243_0402_1% J9 NC2 VSSQ_2 D1 RV29 L1 NC1 VSSQ_1 B9
DIS@ L9 NC3 VSSQ_3 D8 243_0402_1% J9 NC2 VSSQ_2 D1
FBA_MA15 M7 NC4 VSSQ_4 E2 DIS@ L9 NC3 VSSQ_3 D8
2

NC5 VSSQ_5 E8 FBA_MA15 M7 NC4 VSSQ_4 E2

2
VSSQ_6 F9 NC5 VSSQ_5 E8
VSSQ_7 G1 VSSQ_6 F9
VSSQ_8 G9 VSSQ_7 G1
VSSQ_9 VSSQ_8 G9 FBA_CLKA1
96-BALL VSSQ_9
SDRAM DDR3 96-BALL

1
K4W4G1646D-BC1A_FBGA96 SDRAM DDR3
K4W4G1646D-BC1A_FBGA96 RV38
C 40.2_0402_1% C
DIS@

2
CV131 DIS@
1 2
+1.5VS_VGA UV8 SIDE +1.5VS_VGA UV9 SIDE
.01U_0402_16V7-K

1
CV105 CV106 CV107 CV108 CV109 CV110 CV116 CV117 CV118 CV119 CV120 CV121
RV39
10U_0603_6.3V6-M

10U_0603_6.3V6-M

40.2_0402_1%
1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1U_0402_10V6-K

1 1 1 1 1 1 1 1 1 1 1 1 DIS@

2
DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

FBA_CLKA1#
2 2 2 2 2 2 2 2 2 2 2 2

+1.5VS_VGA UV8 SIDE +1.5VS_VGA UV9 SIDE

CV111 CV112 CV113 CV114 CV115 CV122 CV123 CV124 CV125 CV126
0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

1 1 1 1 1 1 1 1 1 1
DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

2 2 2 2 2 2 2 2 2 2

D D

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 R16M-M1-30 DDR3 VRAM L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 22 of 80
1 2 3 4 5
 WWW.AliFixit.COM
1 2 3 4 5

+1.5VS to +1.5VS_VGA
+1.5VS
VIN 1.8V (VBIAS=5V), IMAX=6A, Rds=15mohm
+1.8VS to +1.8VS_VGA
UV11 Bit
DIS@ MLPS
1 5 +1.8VS +1.8VS_VGA
VIN1 GND DIS@ +1.5VS_VGA
2 6 CV165 1 2 820P_0402_50V7-K
5 4 3 2 1
1 VIN2 CT
DIS@ +5VALW JV4 @
15PWRON_R 3

D
CV163 7 1 2 3 1 1 2 PS_0[5:1]
1U_0402_6.3V6-K ON VOUT1 JV5 1 2 JUMP_43X79 1 2 1 1 0 0 1
A
2 4 8 @ QV15 JUMP_43X39 A
VBIAS VOUT2 1
DIS@ AO3413_SOT23-3 1 DIS@ PS_1[5:1] 1 1 0 0 0

G
2

2
1 9 CV166 DIS@ CV190
DIS@ THERMALPAD 0.1U_0402_10V7-K RV156 4.7U_0603_6.3V6-K
CV164 2 300_0402_5%
0.1U_0402_10V7-K 2 PS_2[5:1] 1 1 0 0 0
DIS@
2

1
TPS22965DSGR_WSON8_2X2
PS_3[5:1] 1 1 X X X
RV155 D by Sonic 20150212

1
SCS00008K00 RV154
RB751V-40_SOD323-2 Change to SCS00008K00 4/19 DGPU_PWREN# 1 2 QV14 2 2 1 DGPU_PWREN#
DV4 1 2 DIS@ 2N7002KW_SOT323-3 G
SB00000YY00 S 10K_0402_5%

3
300K_0402_5% DIS@
RV132 1 DIS@
DIS@ CV189
DGPU_PWREN 1 2 15PWRON_R .01U_0402_16V7-K
10,74 DGPU_PWREN
DIS@
2
470K_0402_5% 1
20150416
DIS@ CV167
20150416 0.1U_0402_10V7-K
2 DIS@

B
+3VS to +3VS_VGA PS_0[1] ROM_CONFIG[0]
B

+5VALW +3VS +3VS_VGA

STRAP_BIOS_ROM_EN = 1
by Sonic 20150212
PS_0[2] ROM_CONFIG[1] ROM_CONFIG[2:0] = [001] 256MB
JV3 @ PS_0[3] ROM_CONFIG[2]
1

3
S

1 1 2
RV134 1 2
DIS@ 47K_0402_5% QV5 JUMP_43X39 1 (Default)
AO3413_SOT23-3 1@
PS_0[4] N/A
G
2

2
DIS@ @ CV188
2

RV138 4.7U_0603_6.3V6-K
470_0402_5%
2 PS_0[5] N/A 1 (Default)

1
DIS@ RV135 0 = PCIe GEN3 is not supported
PS_1[1] STRAP_BIF_GEN3_EN_A

1
D RV139
DGPU_PWREN# 2 1 QV8 2 2 1 DGPU_PWREN#
2N7002KW_SOT323-3 G
10K_0402_5% SB00000YY00 10K_0402_5% 0 = The CLKREQB power management
S
PS_1[2] STRAP_BIF_CLK_PM_EN

3
1

D @
1 @
DGPU_PWREN
RV136 1
@
2 0_0402_5% 2 QV6 capability is disabled
G 2N7002KW_SOT323-3 CV169
1

S SB00000YY00 0.1U_0402_10V7-K
3

RV137 DIS@ 2 DIS@

PS_1[3] N/A 0 (Default)
100K_0402_5%
20150226
@
2

PS_1[4] STRAP_TX_CFG_DRV_FULL_SWING 1 = The transmitter full-swing

is enabled
C C

PS_1[5] STRAP_TX_DEEMPH_EN 1 = Tx deemphasis enabled

PS_2[1] N/A 0 (Default)

PS_2[2] N/A 0 (Default)

+1.05VS_VDDP to ++1.05VS_VGA
PS_2[3] STRAP_BIOS_ROM_EN 0 = Disable the external BIOS ROM device
+5VALW +1.05VS_VDDP +1.05VS_VGA

QV9 DIS@ 1 (Default)

AO4430L_SO8 PS_2[4] N/A
8 1
7 2
1

6 3 1 (Default)
RV129 5 PS_2[5] N/A
10K_0402_5% 1 1
DIS@ CV161 CV162
4

4.7U_0603_6.3V6-K 0.1U_0402_10V7-K
PS_3[1] BOARD_CONFIG[0] PS_3[3..1]
2

RV141 DIS@ @
300_0402_5% 2 2 101 = Micron 2G
PS_3[2] BOARD_CONFIG[1]
1

DIS@ 110 = Samsung 2G

RV130 111 = Hynix 2G
PS_3[3] BOARD_CONFIG[2]
1

20K_0402_5%
DIS@
2

+1.05VS_VGA_GATE 20150411 D RV142

2 2 1 DGPU_PWREN# PS_3[4] N/A 1 (Default)
QV11
D D
2N7002KW_SOT323-3 G
1

D SB00000YY00 10K_0402_5%
1 S
3

DGPU_PWREN# 2 QV10 DIS@ DIS@

PS_3[5] N/A 1 (Default)
G 2N7002KW_SOT323-3 CV160
S SB00000YY00 0.1U_0402_10V7-K
3

DIS@ 2 DIS@

20150226
Security Classification LC Future Center Secret Data Title
Issued Date 2015/10/5 Deciphered Date 2016/10/31 R16M-M1-30 swich power
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 23 of 80
1 2 3 4 5
 WWW.AliFixit.COM
5 4 3 2 1

D D

BLANK C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 24 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

LCDVDD Circuit
+LCDVDD_CON
+3VS
U1 W= 60 mil
W= 60 mil 5 1 +LCDVDD_CON
IN OUT
1 2
GND
APU_ENVDD_R

4.7U_0603_6.3V6-K
C62 4 3
1U_0402_6.3VA-K EN OC
1
D
2 CMOS Camera D
G524B1T11U_SOT23-5 C64

1
R72 2

100K_0402_5%

2
Change R72 to mount

+3VS For 2D CCD

+3VS +3VS_CMOS
R71
1 2

2
R3
0_0402_5%
4.7K_0402_5%

2
@
R2

1
100K_0402_5%
APU_ENVDD_R

1
D Q12
2 2N7002WT1G_1N_SC-70-3
G
SB00000YY00
S

3
1
R1 C
APU_ENVDD 1 2 2 Change from SB00000YM00 to SB00000YY00 4/25
8 APU_ENVDD B
2.2K_0402_5% E

3
1

Q191
R285 MLMBT3904WT1G NPN SOT323-3
@ SB000010U00
C C
100K_0402_5%
2

Remove main source LRC to SB000010U00 4/19

eDP CONN.
@
Q29
@ R78 2N7002WT1G_SC-70-3
1 2 1 3 LOGO_LED#_CON

S
+3VALW
2.2K_0402_5% JLCD1 ME@
+LEDVDD +LEDVDD W= 80 mil 40 51
B+ +LEDVDD 39 40 GND11 50
R73 38 39 GND10 49

G
2A 80 mil

2
0_0805_5% +LCDVDD_CON 37 38 GND9 48
2A 80 mil RC407 +LCDVDD_CON W= 60 mil 37 GND8
1 2 C66 36 47
LOGO_LED# 1 2 35 36 GND7 46
52 LOGO_LED# +3VS_CMOS W= 50 mil 35 GND6
4.7U_0805_25V6-K

@ +3VS_CMOS R9456 1 EMC@ 20_0402_5% +3VDMIC W= 40 mil 34 45

For LED brighness issue 4/25 1.5K_0402_5% +3VS 34 GND5
1 33 44
+3VDMIC 16/02/13 LOGO_LED blink issue. @ R79 1 2 2.2K_0402_5% 32 33 GND4 43
2200P_0402_50V7-K

1. Reserve +3VALW and R79 on JLCD1.32 for logo led. +3VALW LOGO_LED#_CON 32 GND3
31 42
EMC_NS@ 31 GND2
2200P_0402_50V7-K

1 2. Reserve Q29 and R78. DMIC_DATA 30 41

2 1 EMC_NS@ 48 DMIC_DATA 30 GND1
DMIC_CLK 29
48 DMIC_CLK 29
B 28 B
C136

CPU_EDP_HPD 28
C135

2 BKOFF# 27
2 8 CPU_EDP_HPD APU_EDP_PWM 27
8 APU_EDP_PWM 26
BKOFF# 25 26
52 BKOFF# 25
EMC request CPU_EDP_HPD
1
24
23 24
20151126 R77 22 23
22

1
USB20_N2_CMOS 21
100K_0402_5% 21
USB20_P2_CMOS 20
20
2

@ R9455 19
100K_0402_5% 18 19
EMC requset. Close to JLCD ESD request 2
17 18
16 17
CPU_EDP_AUX# C17 1 2 0.1U_0402_10V7-K CPU_EDP_AUX#_CON 15 16
8 CPU_EDP_AUX# CPU_EDP_AUX CPU_EDP_AUX_CON 15
C18 1 2 0.1U_0402_10V7-K 14
8 CPU_EDP_AUX 14
13
+LEDVDD +LCDVDD_CON LOGO_LED# CPU_EDP_TX1- C13 1 2 0.1U_0402_10V7-K CPU_EDP_TX1-_CON 12 13
8 CPU_EDP_TX1- CPU_EDP_TX1+ CPU_EDP_TX1+_CON 12
AMD Request @1203 C14 1 2 0.1U_0402_10V7-K 11
8 CPU_EDP_TX1+ 11
10
10
3

CPU_EDP_TX0- C15 1 2 0.1U_0402_10V7-K CPU_EDP_TX0-_CON 9

8 CPU_EDP_TX0- CPU_EDP_TX0+ CPU_EDP_TX0+_CON 9
2 RF_NS@ 1 D5 C16 1 2 0.1U_0402_10V7-K 8
8 CPU_EDP_TX0+ 8
C67 RF_NS@ EMC@ 7
2200P_0402_50V7-K C68 PESD5V0U2BT_SOT23-3 6 7

1 2
2200P_0402_50V7-K CMOS USB Port 2 5 6
5
4
1

3 4
2 3
EXC24CH900U_4P 1 2
USB20_N2 4 3 USB20_N2_CMOS 1
9 USB20_N2 4 3 I-PEX_20439-040E-01

USB20_P2 1 2 USB20_P2_CMOS 2015/11/25 Updated!

9 USB20_P2 1 2
L32
EMC@
A A
Cost down 2016/7/4
Add for EMI issue 2016/7/11

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 eDP CONN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 25 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

UX1

+3V_DPMUX 14 8 MUX_PEQ
+3VS +3V_DPMUX 28 VDD33_1 PEQ
41 VDD33_2 5 APU_MUX_HPD
VDD33_3 IN_HPD IN_CA_DET APU_MUX_HPD 8
56 11
RX1 0_0603_5% VDD33_4 IN_CA_DET
1 2
APU_MUX_TX0+ CX1 1 2 0.1U_0402_10V7-K APU_MUX_TX0+_R 3 40 TYPEC_TX0+
8 APU_MUX_TX0+ APU_MUX_TX0- APU_MUX_TX0-_R IN_D0p DP_D0p TYPEC_TX0- TYPEC_TX0+ 34
@ CX5 1 2 0.1U_0402_10V7-K 4 39
8 APU_MUX_TX0- APU_MUX_TX1+ APU_MUX_TX1+_R IN_D0n DP_D0n TYPEC_TX1+ TYPEC_TX0- 34
CX2 1 2 0.1U_0402_10V7-K 6 37
8 APU_MUX_TX1+ APU_MUX_TX1- APU_MUX_TX1-_R IN_D1p DP_D1p TYPEC_TX1- TYPEC_TX1+ 34
CX3 1 2 0.1U_0402_10V7-K 7 36
+3V_DPMUX 8 APU_MUX_TX1- APU_MUX_TX2+ APU_MUX_TX2+_R IN_D1n DP_D1n TYPEC_TX2+ TYPEC_TX1- 34
CX4 1 2 0.1U_0402_10V7-K 9 34
8 APU_MUX_TX2+ APU_MUX_TX2- APU_MUX_TX2-_R IN_D2P DP_D2p TYPEC_TX2- TYPEC_TX2+ 34
CX6 1 2 0.1U_0402_10V7-K 10 33
8 APU_MUX_TX2- APU_MUX_TX3+ APU_MUX_TX3+_R IN_D2n DP_D2n TYPEC_TX3+ TYPEC_TX2- 34
CX7 1 2 0.1U_0402_10V7-K 12 31
8 APU_MUX_TX3+ APU_MUX_TX3- APU_MUX_TX3-_R IN_D3p DP_D3p TYPEC_TX3- TYPEC_TX3+ 34
CX8 1 2 0.1U_0402_10V7-K 13 30
8 APU_MUX_TX3- IN_D3n DP_D3n TYPEC_TX3- 34
D D
APU_MUX_AUX 50 55 MUX_AUX_TYPEC
APU_MUX_AUX# IN_DDC_SCL DP_AUXp_SCL MUX_AUX#_TYPEC MUX_AUX_TYPEC 34
Delete TP942 for display control issue , 49 54
Change EGPIO93 to MUX_SW 4/19 IN_DDC_SDA DP_AUXn_SDA MUX_AUX#_TYPEC 34
1 1 1 1
MUX_SW 45 16 HDMI_TXC+_REOUT
CX9 CX10 CX11 CX12 10 MUX_SW SW/SDA_CTL TMDS_CLKp HDMI_TXC-_REOUT HDMI_TXC+_REOUT 28
TPX1 1 Test_Point_20MIL 46 15
0.1U_0402_10V7-K 0.1U_0402_10V7-K .01U_0402_16V7-K .01U_0402_16V7-K PD TMDS_CLKn HDMI_TXC-_REOUT 28
2 2 2 2 APU_MUX_AUX CX13 1 2 0.1U_0402_10V7-K APU_MUX_AUX_R 52 19 HDMI_TX0+_REOUT
8 APU_MUX_AUX APU_MUX_AUX# APU_MUX_AUX#_R IN_AUXp TMDS_CH0p HDMI_TX0-_REOUT HDMI_TX0+_REOUT 28
8 APU_MUX_AUX# CX14 1 2 0.1U_0402_10V7-K 51 18
IN_AUXn TMDS_CH0n HDMI_TX1+_REOUT HDMI_TX0-_REOUT 28
22
MUX_I2C_CTL_EN TMDS_CH1p HDMI_TX1-_REOUT HDMI_TX1+_REOUT 28
38 21
I2C_CTL_EN TMDS_CH1n HDMI_TX2+_REOUT HDMI_TX1-_REOUT 28
25
Close to Pin14. Close to Pin41. Close to Pin28. Close to Pin56. MUX_MODE TMDS_CH2p HDMI_TX2-_REOUT HDMI_TX2+_REOUT 28
53 24
MODE TMDS_CH2n HDMI_TX2-_REOUT 28
CX15 1 2 2.2U_0402_6.3V6-M 1 48 HDMI_CLK_CON
CEXT TMDS_SCL HDMI_DAT_CON HDMI_CLK_CON 28
RX2 1 2 4.99K_0402_1% 27 47
REXT TMDS_SDA HDMI_DAT_CON 28
TYPEC_HPD RX3 MUX_PRE
1 2 0_0402_5% 32 20
33,34 TYPEC_HPD DP_CA_DET 42 DP_HPD INT PD 150K. TMDS_PRE
@ DP_CA_DET 23 MUX_RT
MUX_DDCBUF 2 TMDS_RT
HDMI_HPD_CON 17 TMDS_DDCBUF 26
28 HDMI_HPD_CON TMDS_HPD GND1 35
MUX_CFG0 44 GND2 43
DP_CFG0/SCL_CTL GND3

1
MUX_CFG1 29 57
DP_CFG1INT PD 150K. EPAD
1M_0402_5%
RX4
PS8339BQFN56GTR2-A1_QFN56_7X7

2
@
RX5 0_0402_5%
IN_CA_DET 1 2
2
G

RX6 Change from SB00000YM00 to SB00000YY00 4/25

C C

+3V_DPMUX 1 2 1 3
D

2N7002WT1G_1N_SC-70-3
4.7K_0402_5% SB00000YY00
QX1
2
G

QX2
RX7
AO3413_SOT23-3
1 2 3 1 APU_MUX_AUX#
S

2.2K_0402_5%
2
G

QX3
RX8
AO3413_SOT23-3
1 2 3 1 APU_MUX_AUX
S

2016/4/11 change RX14 to mount for HDMI issue

2.2K_0402_5%

20151118 mount RX10 Automatic Switching Mode 20151118 mount RX13&RX22

HDMI ID enable Auto mode, DP Higher Priolity
DP_CFG1 = L: default, auto test disable & input offset cancellation enable +3V_DPMUX +3V_DPMUX +3V_DPMUX +3V_DPMUX +3V_DPMUX +3V_DPMUX +3V_DPMUX +3V_DPMUX
= H: auto test enable & input offset cancellation enable
= M: auto test disable & input offset cancellation disable

DP_CFG0 = L: default, automatic EQ enable & AUX interception enable

B B
= H: automatic EQ disable & AUX interception enable
1

1
= M: automatic EQ disable & AUX interception disable, @ @ @
no pre-emphasis, 800mVpp swing. RX9 RX10 RX11 RX12 RX13 RX14 RX15 RX16 RX17
4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
2

2
MUX_CFG1
MODE = L: Control Switching Mode, HDMI ID disable MUX_DDCBUF MUX_MODE MUX_PEQ MUX_RT MUX_PRE MUX_SW MUX_I2C_CTL_EN
MUX_CFG0
= H: Automatic Switching Mode, HDMI ID disable
= M: Automatic Switching Mode, HDMI ID enable
1

1
@ @ @ @ @
RX18 RX19 RX20 RX21 RX22 RX23 RX24 @ RX25 RX26
TMDS_PRE = L: no pre-emphasis 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
= H: 1.5dB pre-emphasis
2

2
= M: 3.0dB pre-emphasis

TMDS_RT = L: Standard open drain driver

= H: Open drain driver with termination resistors Delete TP942 for display control issue ,
Change EGPIO93 to MUX_SW 4/19
Change RX16 to mount , RX25 to unmount
TMDS_DDCBUF = L: DDC pass through For Control Switching:
= H: DDC active buffer MUX_SW = L: DP output is selected
= M: DDC pass through with 40 kohm pull up resistor MUX_SW = H: TMDS output is selected
For Automatic Switching:
MUX_SW = L: DP output has higher priority.
PEQ = L: default, LEQ, compensate channel loss up to 12dB @ HBR2 MUX_SW = H: TMDS output has higher priority.
= H: HEQ, compensate channel loss up to 15dB @ HBR2
= M: LLEQ, compensate channel loss up to 5dB @ HBR2 Title
Security Classification LC Future Center Secret Data
A A
Issued Date 2015/10/5 Deciphered Date 2016/10/31 XXXX
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 26 of 80

WWW.ALISALER.COM 5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 HDMI RP

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 27 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

EXC24CH900U_4P EXC24CH900U_4P
HDMI_TX0-_REOUT 4 3 HDMI_TX0-_CON HDMI_TX2-_REOUT 4 3 HDMI_TX2-_CON
26 HDMI_TX0-_REOUT 4 3 26 HDMI_TX2-_REOUT 4 3

HDMI_TX0+_REOUT 1 2 HDMI_TX0+_CON HDMI_TX2+_REOUT 1 2 HDMI_TX2+_CON

26 HDMI_TX0+_REOUT 1 2 26 HDMI_TX2+_REOUT 1 2
L2 EMC@ L3 EMC@

EXC24CH900U_4P EXC24CH900U_4P
HDMI_TX1-_REOUT 4 3 HDMI_TX1-_CON HDMI_TXC-_REOUT 4 3 HDMI_TXC-_CON
26 HDMI_TX1-_REOUT 4 3 26 HDMI_TXC-_REOUT 4 3

HDMI_TX1+_REOUT 1 2 HDMI_TX1+_CON HDMI_TXC+_REOUT 1 2 HDMI_TXC+_CON

26 HDMI_TX1+_REOUT 1 2 26 HDMI_TXC+_REOUT 1 2
L4 EMC@ L5 EMC@

C C
D1 RCLAMP0524PATCT_SLP2510P8-10-9

9 1
+5VS_HDMI HDMI_HPD_CON 8 HDMI_HPD_CON +5VS_HDMI
2
HDMI_CLK_CON 7 4 HDMI_CLK_CON +5VS +5VS_HDMI_F +5VS_HDMI
HDMI_DAT_CON 6 5 HDMI_DAT_CON
+5VS_HDMI
D2
2 F1
1 1 2
EMC@ 3
3

MF-NSMF050-2 0.5A 13.2V

RB491DGT146_SMD3-3
02/13 change to SCS00006Q00. Change from SP040003A0J to SP040005L00 4/19 HDMI CONN.
JHDMI1
HDMI_HPD_CON 19
26 HDMI_HPD_CON HP_DET
18
17 +5V
D3 RCLAMP0524PATCT_SLP2510P8-10-9 HDMI_DAT_CON 16 DDC/CEC_GND
26 HDMI_DAT_CON HDMI_CLK_CON SDA
26 HDMI_CLK_CON 15
14 SCL
13 Reserved
HDMI_TXC-_CON 9 1 HDMI_TXC-_CON HDMI_TXC-_CON 12 CEC 20
HDMI_TXC+_CON 8 2 HDMI_TXC+_CON 11 CK- GND1 21
HDMI_TX0-_CON 7 4 HDMI_TX0-_CON HDMI_TXC+_CON 10 CK_shield GND2 22
HDMI_TX0+_CON 6 5 HDMI_TX0+_CON HDMI_TX0-_CON 9 CK+ GND3 23
8 D0- GND4
HDMI_TX0+_CON 7 D0_shield
HDMI_TX1-_CON 6 D0+
5 D1-
EMC@ HDMI_TX1+_CON 4 D1_shield
B B
3

+5VS_HDMI HDMI_TX2-_CON 3 D1+

2 D2-
HDMI_TX2+_CON 1 D2_shield
D2+

R68 1 2 2.2K_0402_5% HDMI_CLK_CON SINGA_2HE3Y37-000111F

ME@
R69 1 2 2.2K_0402_5% HDMI_DAT_CON
D4 RCLAMP0524PATCT_SLP2510P8-10-9

HDMI_TX1-_CON 9 1 HDMI_TX1-_CON
HDMI_TX1+_CON 8 2 HDMI_TX1+_CON
HDMI_TX2-_CON 7 4 HDMI_TX2-_CON
HDMI_TX2+_CON 6 5 HDMI_TX2+_CON

EMC@
3

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 HDMI CONN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 28 of 80
5 4 3 2 1
 WWW.AliFixit.COM
2 1

+3VS +3VS_3355

R15
1 2
@ 0_0805_5%
1
+3VS_3355 +1.5VS_3355
C12
201451109 2.2U_0603_6.3V6-K
2
1 1 1 1 1

0.1U_0402_10V6-K
CVG4

0.1U_0402_10V6-K
CVG6

0.1U_0402_10V6-K
CVG1

0.1U_0402_10V6-K
CVG2

0.1U_0402_10V6-K
CVG3
0.1U_0402_10V6-K
CVG5

0.1U_0402_10V6-K
CVG7

0.1U_0402_10V6-K
CVG8
1 1 1
2 2 2 2 2

2 2 2
+1.5VS +1.5VS_3355
@
R16
U2

30

17

27

28
1

6
1 2

VDDA33_DNW

VDDE33_IO1

PVDD33

VDDE33_IO2

VDDD15
VDDA15_DP

VDDA15_DAC
B B
0_0805_5% 1
C8531 DP_HPD 11 25 XTLI_U2
20151109 2.2U_0603_6.3V6-K HPD OSC_IN
2 26 XTLO_U2
29 OSC_OUT
TESTMODE

24 VGA_RED
2 RED VGA_RED 30
AUXP
AUXN 3 AUX_P
AUX_N 22 VGA_GREEN
4 GRN VGA_GREEN 30
ML0P
ML0N 5 ML0_P
CVG9 1 2 0.1U_0402_10V6-K ML0N ML0_N 21 VGA_BLUE
8 DDI2_VGA_TX0- BLU VGA_BLUE 30
CVG10 1 2 0.1U_0402_10V6-K ML0P ML1P 7
8 DDI2_VGA_TX0+ ML1_P
CVG11 1 2 0.1U_0402_10V6-K ML1N ML1N 8
8 DDI2_VGA_TX1- ML1_N
CVG12 1 2 0.1U_0402_10V6-K ML1P
8 DDI2_VGA_TX1+ R171
CVG13 1 2 0.1U_0402_10V6-K AUXN 20 VGA_HSYNC_R 2 36_0402_5%
8 PCH_VGA_AUX# HSYNC VGA_HSYNC 30
CVG14 1 2 0.1U_0402_10V6-K AUXP
8 PCH_VGA_AUX
1U_0402_10V6K1 2 CC210 10
RST_N 20141224_S
RC101 VGA_VSYNC_R R18 1
1 2 0_0402_5% DP_HPD R19 1.2K_0402_1% 19 2 36_0402_5%
8 PCH_VGA_HPD 1 2 23 VSYNC VGA_VSYNC 30
@ RST#
RSET
20151109
16 VGA_DDC_SCL
CFG1 12 DDC_SCL VGA_DDC_SCL 30
CFG2 15 CFG1
14 CFG2 18 VGA_DDC_SDA
13 CFG3 DDC_SDA VGA_DDC_SDA 30
CFG5

L24
31 1 2 +1.5VS_3355
SWOUT 1
32

GND
PGND C8530
4.7UH +-20% PCAA041B-4R7M 1.1A
4.7U_0402_6.3V6-M 20151120
2

33
PTN3356R1BS_HVQFN32_5X5
wait symbol
RVG1 1 2 1M_0402_5% Change SH00000JM0J 4.7UH +-20% TLPC4012C-4R7M 1.25A
to SH00000GT0J S COIL 4.7UH +-20% PCAA041B-4R7M 1.1A
+3VS_3355 +3VS_3355
YVG1

XTLI_U2 1 4
OSC1 GND2
1

2 3 XTLO_U2
GND1 OSC2 RC102 RC402 @
10K_0402_5% 10K_0402_5%
1 27MHZ_10PF_7V27000050 1
2

CVG15 CVG16
12P_0402_50V8-J 12P_0402_50V8-J CFG1 CFG2
2 2
1

RC400@ RC401
10K_0402_5% 10K_0402_5%
2

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 XXXX

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 29 of 80
2 1
 WWW.AliFixit.COM
5 4 3 2 1

L7
RC403 EMC@ SM01000L40J
1 2 0_0402_5% VGA_RED_R 1 2 VGA_RED_CON
29 VGA_RED
@ BLM15BB220SN1D_2P
D D
L8
RC107 EMC@ SM01000L40J
1 2 0_0402_5% VGA_GREEN_R 1 2 VGA_GREEN_CON
29 VGA_GREEN
@ BLM15BB220SN1D_2P

L25
RC108 EMC@ SM01000L40J
1 2 0_0402_5% VGA_BLUE_R 1 2 VGA_BLUE_CON
29 VGA_BLUE
@ BLM15BB220SN1D_2P

75_0402_1%

75_0402_1%

75_0402_1%
1 1 1 1 1 1

1
RT1 RT2 RT3 C8533 C8534 C8532 C8535 C19 C20
3.3P_0402_50V8-C
3.3P_0402_50V8-C
3.3P_0402_50V8-C 20151120 3.3P_0402_50V8-C
3.3P_0402_50V8-C
3.3P_0402_50V8-C
2 2 2 2 2 2
EMC@ EMC@ EMC@ EMC@ EMC@ EMC@

2
Please Close CRT Connector

20151109
RC405 1 2 0_0402_5%
@

+5VS_HDMI

C
Only for Skywalker C

CRT Connector
5

1
JCRT1

OE#
P
VGA_HSYNC VGA_HSYNC_1 RC404 VGA_HSYNC_CON
2 4 1 2 0_0402_5% 6
29 VGA_HSYNC A Y
@ 1 11
G
VGA_RED_CON T1 1
UT1
SN74AHCT1G125DCKR_SC70-5 7
20141224_S
3

@ VGA_DDC_SDA_CON 12
VGA_GREEN_CON 2
8
+5VS_HDMI VGA_HSYNC_CON 13
VGA_BLUE_CON 3
Traslater +5VS_HDMI 9
VGA_VSYNC_CON 14 16
4 17
10
5

VGA_DDC_SCL_CON 15
RC111 5
OE#
P

VGA_VSYNC 2 4 VGA_VSYNC_1 1 2 0_0402_5% VGA_VSYNC_CON

29 VGA_VSYNC A Y
@ SUYIN_070546HR015M28JZR
G

UT2 ME@
SN74AHCT1G125DCKR_SC70-5
3

@
20151109
20151125 update symbol!
RC112 1 2 0_0402_5%
@

B B
+5VS_HDMI

DT1 EMC@
VGA_RED_CON 1 6 VGA_BLUE_CON

+5VS_HDMI

1
RT5 2 5 +5VS_HDMI

2.2K_0402_5%

2
VGA_GREEN_CON 3 4
VGA_DDC_SCL RC113 1 2 0_0402_5% VGA_DDC_SCL_CON
29 VGA_DDC_SCL
@ CM1293A-04SO_SC-74-6

DT2 EMC@
1

VGA_VSYNC_CON 1 6 VGA_HSYNC_CON
RT7
+5VS_HDMI
2.2K_0402_5%
2 5 +5VS_HDMI
2

VGA_DDC_SDA RC406 1 2 0_0402_5% VGA_DDC_SDA_CON

29 VGA_DDC_SDA
@
VGA_DDC_SCL_CON 3 4 VGA_DDC_SDA_CON

20151113 CM1293A-04SO_SC-74-6

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 VGA CONN

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 30 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 31 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

SATA HDD CONN. SATA HDD CONN.

JHDD1

1
SATA_CTX_DRX_P0 C79 1 2 .01U_0402_16V7-K SATA_CTX_C_DRX_P0 2 GND1
C 9 SATA_CTX_DRX_P0 A+ C
SATA_CTX_DRX_N0 C77 1 2 .01U_0402_16V7-K SATA_CTX_C_DRX_N0 3
9 SATA_CTX_DRX_N0 A-
4
SATA_CRX_DTX_N0 C81 1 2 .01U_0402_16V7-K SATA_CRX_C_DTX_N0 5 GND2
9 SATA_CRX_DTX_N0 B-
SATA_CRX_DTX_P0 C80 1 2.01U_0402_16V7-K SATA_CRX_C_DTX_P0 6
+5VS 9 SATA_CRX_DTX_P0 B+
7
GND3

@ J56 JUMP_43X39
2 1 +3VS_HDD 8
+3VS 2 1 VCC_3V3_1
9
10 VCC_3V3_2
1 1 1 1 VCC_3V3_3
C78 C82 C83 C84 11
@ @ @ HDD_DETECT# 12 GND4
10U_0805_10V6-K 10U_0805_10V6-K 1U_0402_10V6-K 0.1U_0402_25V6-K 52 HDD_DETECT# 13 GND5
@ J55 JUMP_43X39 GND6
2 2 2 2 2 1 +5VS_HDD 14
+5VS 2 1 V5_1
15
16 V5_2
17 V5_3
18 GND7
R173 1
@
2 0_0402_5%
Pin18 connect to GND for SATA Gen3 19 DAS/DSS
20 GND8 23
21 V12_1 GND9 24
22 V12_2 GND10
V12_3
2N7002WT1G_1N_SC-70-3
Q17 R174 @
3

D
9 HDD_DEVSLP0 1 1 2
ALLTO_C166JQ-12239-L
SB00000YY00 10K_0402_5% ME@

G
2
For Toshiba 1TB HDD Issue 4/19
Change from SB00000YM00 to SB00000YY00 4/25

B 10 DEVSLP_GATE# B

1
C172
1000P_0402_50V7-K
2

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 SATA HDD
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 32 of 80
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5 4 3 2 1

+3VALW +3VL +3VPD_VDD

+3VPD +3VPD_VDD +3VPD_VDDIO
+3VPD_VDDIO +5VALW
VCCPD_VBUS
R98 TYPEC@ R99
1 2 1 2

1
0_0402_5%

2
0_0402_5% TYPEC@ 0_0402_5%
+3VALW +3VPD TYPEC@ R110 @
@ @ R9481
20160718 0_0402_5% 4.7K_0402_5%
R521
Change R99 Pin1 to +3VPD_VDD 0_0805_5% R9480

1
1 2

2
1
PD_XRES
TC32 1
20160415

0.1U_0402_16V7-K
Unmount R521 to fix U5 1

31

20
18

40
D dead battery issue C110 TYPEC@ D
+3VPD_VDD

VBUS

VSYS

VBUS_P
VDDIO
+3VPD_VDDIO 2

R215 1 TYPEC@2 0_0402_5% CCG2_I2C_CLK_PD_R 9 19

34 CCG2_I2C_CLK_PD CCG2_I2C_DATA_PD_R GPIO/UART_0_RX/UART_3_CTS/SPI_3_MOSI/I2C_3_SCL/HPD VCCD
R216 1 TYPEC@2 0_0402_5% 10
0.1U_0402_16V7-K

0.1U_0402_16V7-K

1U_0402_10V6-K

1 1 1 34 CCG2_I2C_DATA_PD GPIO/UART_0_TX/UART_3_RTS/SPI_3_CLK/I2C_3_SDA USB_P_PWR_SENSE

0.1U_0402_16V7-K

1U_0402_10V6-K
39

0.1U_0402_16V7-K

1U_0402_10V6-K
TYPEC@ TYPEC@ TYPEC@ 1 1 OC 1 1
C103 C104 C105 TYPEC@ TYPEC@ R108 1 TYPEC@2 0_0402_5% USBC1_CC1 5 TYPEC@ TYPEC@
USBC1_CC1_CONN USBC1_CC2 CC1 +3VPD_VDDIO
C902 C903 R109 1 TYPEC@2 0_0402_5% 3 C900 C901
2 2 2 USBC1_CC2_CONN CC2
4
+5VALW V5V 2 2
2 2
17 +3VALW
PD_VBUS_DISCHG 32 VDDD TYPEC@ +3V_MUX
VBUS_C_CTRL0 1 TYPEC@2 0_0402_5% VBUS_C_CTRL0_R 30 VBUS_DISCHARGE +5VALW R9483
65 VBUS_C_CTRL0 VBUS_C_CTRL0
29 0_0805_5%
R965 VBUS_C_CTRL1 1 2
6
26,34 TYPEC_HPD R105 1 TYPEC@ 2 0_0201_5% TYPEC_HPD_PD 35 VCONN
GPIO/P3.3

1
PD_VBUS_P_CTRL1

D
TC35 1 28 1 3 1
PD_VBUS_C_CTRL1 27 I2C_0_SCL/GPIO_OVT/UART_0_RTS/SPI_0_MISO VBUS_P_CTRL1 2 PD_VBUS_P_CTRL0 @
65 PD_VBUS_C_CTRL1 I2C_0_SDA/GPIO_OVT/UART_0_CTS/SPI_0_SEL VBUS_P_CTRL0
TYPEC@ R969 Q31
R214 1 2 0_0201_5% EC_SMB_DA2_R 36 47K_0402_5% AO3413_SOT23-3

G
52 EC_SMB_DA2

2
+3VALW R213 1 TYPEC@ 2 0_0201_5% EC_SMB_CK2_R 37 GPIO/UART_2_CTS/SPI_2_MOSI/I2C_2_SDA @
52 EC_SMB_CK2

2
52 INT#_TYPEC R101 1 TYPEC@ 2 0_0201_5% INT#_TYPEC_R 34 GPIO/UART_2_RTS/SPI_2_CLK/I2C_2_SCL
U5_SENSE# 38 GPIO/P3.2
33 3V_TPD8S300_FLT# R972 1 TYPEC@ 2 0_0402_5%
GPIO/P3.6

2
TYPEC@ USBC1_CC1_CONN
2.2K_0402_5% 1 2 R393 EC_SMB_CK2 VBUS_OVP_ACOK# R973 1 TYPEC@ 2 0_0402_5% @
2.2K_0402_5% 1 2 R394 EC_SMB_DA2 R971
USBC1_CC2_CONN 23 PD_MUX_EN 10K_0402_5%
TYPEC@ GPIO/P2.4 15 PD_SWD_IO 1
TC23

1
22 GPIO/UART_1_CTS/SPI_1_CLK/I2C_1_SCL/SWD_0_DAT/P2.0 16 PD_SWD_CLK 1 PD_MUX_EN#
+3VALW DMINUS GPIO/UART_1_RTS/SPI_1_MOSI/I2C_1_SDA/SWD_0_CLK/P2.1 TC24
21 7
1 1 DPLUS GPIO/UART_2_TX/SPI_2_MISO
TYPEC@ C108 TYPEC@ C109 8
GPIO/UART_2_RX/SPI_2_SEL

1
D @
C 1 C
390P_0402_50V8-J USB_OE# 25 2 Q30 @
390P_0402_50V8-J 34 USB_OE# GPIO/UART_0_RX/SPI_0_CLK
2.2K_0402_5% 1 2 R370 INT#_TYPEC 2 2 USB_SEL 24 G 2N7002KW_SOT323-3 C961
34 USB_SEL GPIO/UART_0_TX/SPI_0_MOSI

1
10K_0402_1% 1 2 R371 TYPEC_HPD 0_0402_5% 1 @ R233USBC_DPAUX1_PD
2 11 S 0.1U_0402_16V7-K
34 USBC_DPAUX1_MUX

3
0_0402_5%1 @ 2R234USBC_DPAUX2_PD 14 AUX_P_signal/GPIO/UART_1_TX/SPI_1_MISO 2
34 USBC_DPAUX2_MUX @
@ 0_0402_5% 1 @ R235USBC_DPAUX1_PD1
2 12 AUX_N_signal/GPIO/UART_1_RX/SPI_1_SEL
34 USBC_DPAUX1 R970
0_0402_5%1 @ 2R236USBC_DPAUX2_PD1 13 SBU1_signal/GPIO/UART_3_TX/SPI_3_MISO/SWD_1_CLK
34 USBC_DPAUX2 100K_0402_5%
SBU2_signal/GPIO/UART_3_RX/SPI_3_SEL/SWD_1_DAT

2
20160420 TC34 GND
33 1
TC33
Change pull up from +3VPD_VDD to +3VALW 41
1 PD_XRES 26 EPAD
by vender suggestion. Change C108,C109 from 150p to 390P for U20 co-lay 5/11 XRES
20160707
Add soft stop ??
Change INT#_TYPEC to pull high always , R370 delete TYPEC@ 5/18 TYPEC@
CYPD3125-40LQXIT_QFN40_6X6

0_0201_5%
USBC_DPAUX1 R897 1TYPEC@ 2 USBC_DPAUX1_R change from 0402 to 0201 for layout 2016/4/18
0_0201_5%
USBC_DPAUX2 R898 1TYPEC@ 2 USBC_DPAUX2_R +3V_MUX Materials shortage , change to co-lay 5/11
0_0201_5% change from 0402 to 0201 for layout 2016/4/18
USBC1_CC1_CONN R899 1TYPEC@ 2 USBC1_CC1_CONN_R
0_0201_5% change +3V_PD to +3V_MUX 2016/7/11
USBC1_CC2_CONN R900 1TYPEC@ 2 USBC1_CC2_CONN_R
1
@
C950
1U_0201_6.3V6-M
U20 @ 2 VBUS_P_CTRL = 1 (Consumer Path ON) FROM SYSTEM
VBUS_P_CTRL = 0/Z (Consumer Path OFF)
10
VPWR
USBC_DPAUX1 15 1 USBC_DPAUX1_R VCCPD_VBUS +5VALW
USBC_DPAUX2 SBU1 C_SBU1 USBC_DPAUX2_R USBC_DPAUX1_R 34
14 2
SBU2 C_SBU2 USBC_DPAUX2_R 34 Q27 Q28 TYPEC@
USBC1_CC1_CONN USBC1_CC1_CONN_R AON7380 3 VCC5M_Q_VBUS 3 AON7380 0.01_1206_1%
B 12 4 B
USBC1_CC2_CONN CC1 C_CC1 USBC1_CC2_CONN_R USBC1_CC1_CONN_R 34 2 2
11 5
CC2 C_CC2 USBC1_CC2_CONN_R 34 5 1 1 5USB_P_PWR_SENSE 1 2
USB20_N6_M_CON 20 7
34 USB20_N6_M_CON USB20_P6_M_CON D1 RPD_G1 R533
19
34 USB20_P6_M_CON D2

1U_0402_25V6-K
USB20_N6_D_CON 17 6 1 1

4
34 USB20_N6_D_CON USB20_P6_D_CON D3 RPD_G2 1 1
16 TYPEC@ TYPEC@

1
34 USB20_P6_D_CON D4 3V_TPD8S300_FLT# 33 TYPEC@ C180 C181 + C460 C461
9 1U_0402_25V6-K
FLT R156 TYPEC@ TYPEC@
3 2
VBIAS 100_0805_5% R974 TYPEC@ 470P_0402_50V7-K
1 8 R975 10K_0201_5% 2 2 2
@ GND1 13
GND2 PD_VBUS_P_CTRL1
1 2 10K_0201_5% 2 1 PD_VBUS_P_CTRL0 @ @
C951 18

2
1U_0402_10V6-K GND3 21
2 THERMAL_PAD TYPEC@ 150U_B2_6.3VM_R35M
TPD8S300_QFN20_3X3 1

1
C8622 1
PD_VBUS_DISCHG R537 R536
Protection solution 4/12 TYPEC@ 10M_0201_5% 10M_0201_5% C8623 TYPEC@
0.1U_0201_25V6-K 2 TYPEC@ TYPEC@ 0.1U_0201_25V6-K
2
Discharge Circuit

2
VCCPD_VBUS_CONN VCCPD_VBUS

reserves for VCCPD_VBUS_CONN 7/7

F11 201607/11
1 2 Change +3VAWL to +3V_MUX
5A_35V_T0603FF5000TM +3V_MUX
VCCPD_VBUS
VCCPD_VBUS_CONN @

U119
Add F10 2016/7/7
2

B3 A2 TYPEC@
C2 IN1 OUT1 A3 F10 R902 TYPEC@
C3 IN2 OUT2 B2 1 2 10K_0201_5%
A IN3 OUT3 A

A1 B1 5A_35V_T0603FF5000TM VBUS_OVP_ACOK#
TYPEC@
0.1U_0402_25V6-K

R903 EN# ACOK#

1
1 2 C1 C503
GND_1
GND_2
GND_3

2 OVLO 1U_0603_25V6-K
VBUS_DISCHARGE = 1 (Consumer Path ON)
TYPEC@
C502

1M_0201_5% VBUS_DISCHARGE = 0/Z (Consumer Path OFF)

TYPEC@
2

2
1 R904 FPF2281BUCX-F130_WLCSP12
A4
B4
C4

51.1K_0201_1% Title
Security Classification LC Future Center Secret Data
TYPEC@
TYPEC@ Issued Date 2015/09/01 Deciphered Date 2016/12/31 TYPE-C_Controller
1

SD00001LN0T 51.1K
OVP protection circuit 4/12 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 33 of 82
5 4 3 2 1
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5 4 3 2 1

+3VPD_VDDIO
+3V_MUX +3V_MUX ESD request
D35 TYPEC@
CCG2_I2C_CLK_PD R400 1 2 10K_0402_5%
1 TYPEC_CON_TXN1

0.1U_0402_16V7-K

0.1U_0402_16V7-K

0.1U_0402_16V7-K

0.1U_0402_16V7-K

0.1U_0402_16V7-K
CH1 +3V_MUX
1 1 1 1 1 CCG2_I2C_DATA_PD R399 1 TYPEC@ 2 10K_0402_5%
TYPEC_CON_TXN1 9 2 TYPEC_CON_TXP1

2
C111 C112 C113 C114 C115 NC_4 CH2
R401 TYPEC@
TYPEC_CON_TXP1 8 MUX_DPEQ R405 1 @ 2 10K_0402_5%
0_0402_5% 2 2 2 2 2 NC_3
3 MUX_SSEQ R402 1 @ 2 10K_0402_5%
VN

1
VDD_DCI
TYPEC_CON_RXN1 7 MUX_I2C_EN R115 1TYPEC@ 2 4.7K_0402_5%
TYPEC@ TYPEC@ TYPEC@ TYPEC@ TYPEC@ NC_2
U7

20
28

17
TYPEC_CON_RXP1 6 4 TYPEC_CON_RXN1 CE_USB R116 1 @ 2 10K_0402_5%

6
NC_1 CH3
D TYPEC_TX0+
C119 1 TYPEC@
2 0.1U_0402_16V7-K APU_MUX_TX0+_TYPEC 9 D

VDD_DCI
VDD33_1
VDD33_2
VDD33_3
26 TYPEC_TX0+ TYPEC_TX0- TYPEC@ APU_MUX_TX0-_TYPEC ML0P FLIP R117 1 @ 2 10K_0402_5%
26 TYPEC_TX0- C117 1 2 0.1U_0402_16V7-K 10
TYPEC_TX3+ TYPEC@ APU_MUX_TX3+_TYPEC ML0N 5 TYPEC_CON_RXP1
26 TYPEC_TX3+ C123 1 2 0.1U_0402_16V7-K 18 CH4
TYPEC_TX3- TYPEC@ APU_MUX_TX3-_TYPEC ML3P CE_DP R120 1 @ 2 10K_0402_5%
26 TYPEC_TX3- C124 1 2 0.1U_0402_16V7-K 19
ML3N
DCI_DATA 11 30 MUX_TYPEC_RXP1 AOZ8808DI-05_DFN-10-10-9_2P5X1
DCI_CLK 14 SSDE/DCI_DATA RX1P 31 MUX_TYPEC_RXN1 CE_USB R397 1 @ 2 10K_0402_5%
CDE/DCI_CLK RX1N EMC_TC@
40 MUX_TYPEC_RXP2
USB3P3_RXP
C127 1 2 0.1U_0402_16V7-K
TYPEC@ USB3P3_RXP_TYPEC 5 RX2P 39 MUX_TYPEC_RXN2 FLIP R398 1 @ 2 10K_0402_5%
9 USB3P3_RXP SSRXP RX2N D36
USB3P3_RXN
C128 1 2 0.1U_0402_16V7-K
TYPEC@ USB3P3_RXN_TYPEC 4
9 USB3P3_RXN USB3P3_TXP USB3P3_TXP_TYPEC SSRXN CE_DP
C125 1 2 0.1U_0402_16V7-K
TYPEC@ 8 1 TYPEC_CON_TXN2 R396 1 @ 2 10K_0402_5%
9 USB3P3_TXP USB3P3_TXN USB3P3_TXN_TYPEC SSTXP
9 USB3P3_TXN C126 1 2 0.1U_0402_16V7-K
TYPEC@ 7 CH1
SSTXN 33 MUX_TYPEC_TXP1 MUX_I2C_EN R118 1 @ 2 4.7K_0402_5%
TX1P TYPEC_CON_TXN2 9 2 TYPEC_CON_TXP2
34 MUX_TYPEC_TXN1 NC_4 CH2
TYPEC_TX2+ APU_MUX_TX2+_TYPEC TX1N MUX_TYPEC_TXP2 MUX_DPEQ R403 1 @ 2 10K_0402_5%
C121 1 2 0.1U_0402_16V7-K
TYPEC@ 15 37 TYPEC_CON_TXP2 8
26 TYPEC_TX2+ TYPEC_TX2- APU_MUX_TX2-_TYPEC ML2P TX2P MUX_TYPEC_TXN2
C122 1 2 0.1U_0402_16V7-K
TYPEC@ 16 36 NC_3 MUX_SSEQ
26 TYPEC_TX2- TYPEC_TX1+ APU_MUX_TX1+_TYPEC ML2N TX2N R404 1 @ 2 10K_0402_5%
C118 1 2 0.1U_0402_16V7-K
TYPEC@ 12 3
26 TYPEC_TX1+ TYPEC_TX1- APU_MUX_TX1-_TYPEC ML1P
C120 1 2 0.1U_0402_16V7-K
TYPEC@ 13 VN
26 TYPEC_TX1- ML1N +3V_MUX
TYPEC_CON_RXN2 7
MUX_AUX_TYPEC 24 NC_2
26 MUX_AUX_TYPEC MUX_AUX#_TYPEC AUXP MUX_CEXT
25 1 C116 1 2 2.2U_0402_10V6-K TYPEC_CON_RXP2 6 4 TYPEC_CON_RXN2
26 MUX_AUX#_TYPEC AUXN CEXT CE_DP
23 NC_1 CH3
I2C_EN 29 CE_DP 35 CE_USB MUX_AUX#_TYPEC
R121 1 TYPEC@2 100K_0402_5%
ADDR 3 I2C_EN CE_USB 38 FLIP TYPEC@ TYPEC@
DCICFG/ADDR FLIP 5 TYPEC_CON_RXP2
27 USBC_DPAUX1_MUX 1 R231 2 0_0402_5% USBC_DPAUX1 CH4 R122 1 2 100K_0402_5% MUX_AUX_TYPEC
CCG2_I2C_CLK_PD 21 SBU1 26 USBC_DPAUX2_MUX 1 R232 2 0_0402_5% USBC_DPAUX2 USBC_DPAUX1 33
TYPEC@
33 CCG2_I2C_CLK_PD DPEQ/CSCL SBU2 USBC_DPAUX2 33
CCG2_I2C_DATA_PD 22 32 TYPEC_MUX_HPD R127 1 2 0_0402_5%
33 CCG2_I2C_DATA_PD CEQ/CSDA IN_HPD AOZ8808DI-05_DFN-10-10-9_2P5X1

EPAD
TYPEC@
4.99K_0402_1% 2 1 R119 MUX_REXT 2 26,33 TYPEC_HPD EMC_TC@
REXT
USBC_DPAUX1_MUX +3V_MUX
TYPEC@ 33 USBC_DPAUX1_MUX USBC_DPAUX2_MUX

41
PS8743BQFN40GTR-B0_QFN40_4X6 TYPEC@ 33 USBC_DPAUX2_MUX
R132 1 @ 2 0_0402_5%

R128 1 @ 2 4.7K_0402_5% ADDR

C TYPEC@ EXC24CH900U_4P C
MUX_TYPEC_TXP1 1 2 MUX_TYPEC_C_TXP1 4 3 TYPEC_CON_TXP1 R129 1 @ 2 4.7K_0402_5%
0_0201_5% C132 0.1U_0402_10V7-K 4 3
0_0201_5% MUX_DPEQ R9474 1TYPEC@ 2 DCI_CLK
MUX_SSEQ R9470 1TYPEC@ 2 DCI_DATA
MUX_TYPEC_TXN1 1 2 MUX_TYPEC_C_TXN1 1 2 TYPEC_CON_TXN1
C131 0.1U_0402_10V7-K 1 2
0_0201_5% TYPEC@ L16 EMC_TC@ TYPEC@
R9471 1TI@ 2 I2C_EN R148 1 2 2M_0402_1% USBC_DPAUX2
0_0201_5% R134 1 @ 2 0_0402_5%
R9473 1TI@ 2 TYPEC_MUX_HPD
+3V_MUX 0_0201_5%
MUX_I2C_EN R9476 1TYPEC@ 2 I2C_EN R149 2 1 2M_0402_1% USBC_DPAUX1
TI@
MUX_REXT R9482 1 2 4.7K_0201_5% TYPEC@
R136 1 @ 2 0_0402_5%
TI@ TYPEC_HPD
0_0201_5%
MUX_CEXT R9472 1 2 0_0201_5% R9477 1TI@ 2 VDD_DCI
TYPEC@ L18 EMC_TC@
MUX_TYPEC_TXP2 1 2 MUX_TYPEC_C_TXP2 1 2 TYPEC_CON_TXP2
VDD_DCI R9466 1 1K_0201_5% C133 0.1U_0402_10V7-K 1 2
2
0_0201_5% MUX_TYPEC_TXN2
TI@ R9479 1TI@ 2 CE_DP 1 2 MUX_TYPEC_C_TXN2 4 3 TYPEC_CON_TXN2
4 3 D72 EMC_TC@ EMC_TC@
D73
MUX_CEXT C8524 10U_0402_6.3V6-M C134 0.1U_0402_10V7-K
1 2 TYPEC@ EXC24CH900U_4P USB20_P6_D_CON 1 2 2 1USB20_N6_D_CON
1 2 2 1
TI@ R139 1 @ 2 0_0402_5%
For TI co-lay 4/25 PESD5V0H1BSF SOD962 PESD5V0H1BSF SOD962
D74 EMC_TC@ EMC_TC@D75

USB20_P6_M_CON 1 2 2 1USB20_N6_M_CON
1 2 2 1
VCCPD_VBUS_CONN
PESD5V0H1BSF SOD962 PESD5V0H1BSF SOD962
D77 EMC_TC@ EMC_TC@D76
B For EMC Request 4/15 B
USBC1_CC2_CONN_R1 2 2 1USBC1_CC1_CONN_R
1

UCLAMP2271PPTNT_SGP1610N2-2

D80 1 2 2 1
EMC_TC@ 0_0201_5%
1

0_0201_5%
R850 1@ 2 R887 1@ 2
PESD5V0H1BSF SOD962 PESD5V0H1BSF SOD962
D79 EMC_TC@ EMC_TC@D78
EXC24CH900U_4P EXC24CH900U_4P
25
26
27
28
29

USBC_DPAUX1_R 1 2 2 1USBC_DPAUX2_R
2

USB20_N6_D USB20_N6_D_CON JUSB4 USB20_N6_M 4 3 USB20_N6_M_CON 1 2 2 1

4 3 4 3
4 3
2

GND25
GND26
GND27
GND28
GND29

USB20_P6_M 1 2 USB20_P6_M_CON PESD5V0H1BSF SOD962 PESD5V0H1BSF SOD962

USB20_P6_D 1 2 USB20_P6_D_CON 1 2
1 2
L17 EMC_TC@ L35 EMC_TC@
24 1
GND_B12 GND_A1 0_0201_5%
0_0201_5%
R851 1@ 2 TYPEC_CON_RXP1 23 2 TYPEC_CON_TXP1 R886 1@ 2
RX1+_B11 TX1+_A2
change from 0402 to 0201 for layout 2016/4/18 TYPEC_CON_RXN1 22 3 TYPEC_CON_TXN1 change from 0402 to 0201 for layout 2016/4/18
RX1-_B10 TX1-_A3
2016 4/15 For EMC Request
21 4
VBUS_B9 VBUS_A4
USBC_DPAUX2_R 20 5 USBC1_CC1_CONN_R +3V_MUX
R140 1 @ 2 0_0402_5% 33 USBC_DPAUX2_R SBU2_B8 CC1_A5 USBC1_CC1_CONN_R 33
USB20_N6_D_CON 19 6 USB20_P6_M_CON
33 USB20_N6_D_CON D-_B7 D+_A6 USB20_P6_M_CON 33
EXC24CH900U_4P
MUX_TYPEC_RXP1 4 3 TYPEC_CON_RXP1 USB20_P6_D_CON 18 7 USB20_N6_M_CON U19
33 USB20_P6_D_CON USB20_N6_M_CON 33

9
4 3 D+_B6 D-_A7
USBC1_CC2_CONN_R 17 8 USBC_DPAUX1_R 2 4 USB20_N6_M

VDD
33 USBC1_CC2_CONN_R CC2_B5 SBU1_A8 USBC_DPAUX1_R 33 9 USB20_N6 Y- M-
MUX_TYPEC_RXN1 1 2 TYPEC_CON_RXN1
1 2 16 9 1 5 USB20_P6_M
VBUS_B4 VBUS_A9 9 USB20_P6 Y+ M+
L19 EMC_TC@
TYPEC_CON_TXN2 15 10 TYPEC_CON_RXN2 USB_SEL 10 6 USB20_N6_D
TX2-_B3 RX2-_A10 33 USB_SEL SEL D-
R143 1 @ 2 0_0402_5%
TYPEC_CON_TXP2 14 11 TYPEC_CON_RXP2 USB_OE# 8 7 USB20_P6_D

GND
33 USB_OE# OE D+

2
TX2+_B2 RX2+_A11
A A
13 12 R888
GND_B1 GND_A12
100K_0402_5%

3
R144 1 @ 2 0_0402_5% PI3USB102ZMEX_UQFN10_1P4X1P8
GND34
GND33
GND32
GND31
GND30

TYPEC@

1
TYPEC@
L20 EMC_TC@
MUX_TYPEC_RXP2 1 2 TYPEC_CON_RXP2 HIGHS_UB11126-A5A0B-1H
34
33
32
31
30

1 2 ME@
Security Classification LC Future Center Secret Data Title
MUX_TYPEC_RXN2 4 3 TYPEC_CON_RXN2
4 3 Issued Date 2015/09/01 Deciphered Date 2016/12/31 TYPE-C_MUX
EXC24CH900U_4P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
R147 1 @ 2 0_0402_5%
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 34 of 82
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 Blank
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 35 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 BLANK

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 36 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

+5VALW +USB_VCCA

W=80mils
W=80mils
U15 EMC_NS@ For EMI
5 1 C8231 2 1000P_0402_50V7-K
IN OUT
2
GND
USB_ON# 4 3 USB_OC0#
52 USB_ON# EN OC USB_OC0# 10

1 G524B2T11U_SOT23-5 1
@ @
C824 C825
0.1U_0402_10V7-K 1000P_0402_50V7-K
2 2

C C
L9 EMC@
USB3P1_TXN C173 1 2 0.1U_0402_10V7-K USB3P1_TXN_C 1 2 USB3P1_TXN_CON
9 USB3P1_TXN 1 2

USB3P1_TXP C174 1 2 0.1U_0402_10V7-K USB3P1_TXP_C 4 3 USB3P1_TXP_CON +USB_VCCA

9 USB3P1_TXP 4 3
EXC24CH900U_4P
Close JUSB3
1 1
L10 EMC@
USB3P1_RXN 1 2 USB3P1_RXN_CON + C175 C176
9 USB3P1_RXN 1 2 150U_B2_6.3VM_R35M 470P_0402_50V7-K
2
USB3P1_RXP 4 3 USB3P1_RXP_CON 2
9 USB3P1_RXP 4 3
EXC24CH900U_4P

L11 EMC@
1 2 USB20_P4_CON
9 USB20_P4 1 2

4 3 USB20_N4_CON
9 USB20_N4 4 3
EXC24CH900U_4P

B B

EMC@ +USB_VCCA
D61 RCLAMP0524PATCT_SLP2510P8-10-9 20151119
JUSB3
D62 USB3P1_TXP_CON 9
USB20_P4_CON 1 6 USB20_N4_CON 1 StdA_SSTX+
USB3P1_TXP_CON 1 9 USB3P1_TXP_CON V_I/O1 V_I/O4 +USB_VCCA USB3P1_TXN_CON 8 VBUS
USB3P1_TXN_CON 2 8 USB3P1_TXN_CON 2 5 USB20_P4_CON 3 StdA_SSTX-
USB3P1_RXP_CON 4 USB3P1_RXP_CON Ground VBUS 7 D+
7
USB3P1_RXN_CON 5 6 USB3P1_RXN_CON 3 4 USB20_N4_CON 2 GND_DRAIN 10
V_I/O2 V_I/O3 USB3P1_RXP_CON 6 D- GND_1 11
4 StdA_SSRX+ GND_2 12
CM1293A_SC-74
USB3P1_RXN_CON 5 GND_5 GND_3 13
SC300003N00
StdA_SSRX- GND_4
EMC@
ALLTO_C190L1-109H9-L
3

ME@

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 USB3 PORT1

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 37 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 USB Port2/3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 38 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

L21 EMC@
USB3P2_TXN C170 1 2 0.1U_0402_10V7-K USB3P2_TXN_C 1 2 USB3P2_TXN_CON
9 USB3P2_TXN 1 2

USB3P2_TXP C171 1 2 0.1U_0402_10V7-K USB3P2_TXP_C 4 3 USB3P2_TXP_CON

9 USB3P2_TXP 4 3
EXC24CH900U_4P
+USB_VCCA

L22 EMC@
9 USB3P2_RXN
USB3P2_RXN 1
1 2
2 USB3P2_RXN_CON Close JUSB1
C C
1 1
USB3P2_RXP 4 3 USB3P2_RXP_CON + C826 C827
9 USB3P2_RXP 4 3 150U_B2_6.3VM_R35M 470P_0402_50V7-K
EXC24CH900U_4P 2
2

L23 EMC@
1 2 USB20_P5_CON
9 USB20_P5 1 2

4 3 USB20_N5_CON
9 USB20_N5 4 3
EXC24CH900U_4P

+USB_VCCA
20151119 EMC@
D10 RCLAMP0524PATCT_SLP2510P8-10-9
JUSB1
USB3P2_TXP_CON 9
1 StdA_SSTX+
USB3P2_TXN_CON 8 VBUS D265 USB3P2_TXP_CON 1 9 USB3P2_TXP_CON
B USB20_P5_CON 3 StdA_SSTX- USB20_P5_CON 1 6 USB20_N5_CON USB3P2_TXN_CON 2 8 USB3P2_TXN_CON B
7 D+ V_I/O1 V_I/O4 +USB_VCCA USB3P2_RXP_CON 4 7 USB3P2_RXP_CON
USB20_N5_CON 2 GND_DRAIN 10 2 5 USB3P2_RXN_CON 5 6 USB3P2_RXN_CON
USB3P2_RXP_CON D- GND_1 Ground VBUS
6 11
4 StdA_SSRX+ GND_2 12 3 4
USB3P2_RXN_CON GND_5 GND_3 V_I/O2 V_I/O3
5 13
StdA_SSRX- GND_4 CM1293A_SC-74
ALLTO_C190L1-109H9-L SC300003N00

3
ME@ EMC@

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 USB3 PORT2

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016
JITR1_LA-4141P Sheet 39 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

PORT1(AOU)
Move to Small Board wait confirm
20151117

D D

+5VALW +5VALW_CHGUSB

JUAL1
1
AOU1 JSENSE_CON 2 1
1 12 49 JSENSE_CON HP_OUTR_CON 3 2
IN OUT 49 HP_OUTR_CON HP_OUTL_CON 3
10 USB20P1 4
USB20_P1 DP_IN 49 HP_OUTL_CON 4
3 11 USB20N1 HGNDA 5
9 USB20_P1 USB20_N1 2 DP_OUT DM_IN 14 48,49 HGNDA 6 5
9 USB20_N1 DM_OUT GND 6
7
HGNDB 8 7
AOU_IFG# 48,49 HGNDB 8
9 AOU_IFG# 52 9
STATUS# 10 9
4 11 10
USB_OC1# 13 ILIM_SEL 12 11
10 USB_OC1# AOU_EN 5 FAULT# 13 12
52 AOU_EN EN ILIM_LO 13
15 R84 1 @ 2 20K_0402_1% 14
AOU_CTL1 6 ILIM_LO 16 ILIM_HI R85 1 2 20K_0402_1% 15 14
52 AOU_CTL1 CLT1 ILIM_HI 15
7 16
AOU_CTL3 8 CLT2 17 17 16
52 AOU_CTL3 CLT3 GND_Pad +5VALW_CHGUSB 17
18
TPS2546RTER_QFN16_4X4 19 18
1 19
@ USB20_N1_FFC_CON 20
C99 USB20_P1_FFC_CON 21 20
0.1U_0402_10V7-K
TI TPS2546 22 21
2 PCIE1_CRX_DTX_P 23 22
5 PCIE1_CRX_DTX_P PCIE1_CRX_DTX_N 23
24
5 PCIE1_CRX_DTX_N 24
25
PCIE1_CTX_C_DRX_P 26 25
5 PCIE1_CTX_C_DRX_P PCIE1_CTX_C_DRX_N 26
27
5 PCIE1_CTX_C_DRX_N 28 27
29 28
52 LAN_WAKE# PLT_RST# 29
30
10,16,45,46,53 PLT_RST# 31 30
10 CLKREQ_PCIE1_LAN# 31
C 32 C
33 32
34 33
+3VALW 34
35
+3VS 35
36
37 36
CLT1 CLT2 CLT3 ILIM_SEL MOD CLK_PCIE_LAN 38 37
9 CLK_PCIE_LAN CLK_PCIE_LAN# 38
39 41
9 CLK_PCIE_LAN# 39 GND1
40 42
40 GND2
0 0 0 X DCH OUT held low

ACES_51639-04041-001
1 1 1 1 CDP Data Connected and Port Power Mgt. Function Active
* ME@

* 1 1 1 0 SDP2 Data Connected

GNDA
* 1 1 0 X SDP1 Data Connected

* 0 1 0 X SDP1 Data Connected 2016/0203 Update pin18,pin 12 to +5VALW_CHGUSB

1 0 0 X DCP_Short Device Forced to stay in DCP BC 1.2 charging mode
2016/0203 Update pin32,pin 36to +GND
1 0 1 X DCP_Divider Device Forced to stay in DCP Divider 1 Charging Mode

0 1 1 X DCP_Auto Data Disconnected and Port Power Mgt. Function Active

*
0 0 1 X DCP_Auto Data Disconnected and Power Wake Function Active

B B

EMC@
EXC24CH900U_4P
USB20N1 4 3 USB20_N1_FFC_CON
4 3

USB20P1 1 2 USB20_P1_FFC_CON
1 2
L26

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 USB3 PORT1/PORT2(AOU)

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 40 of 80
5 4 3 2 1
 WWW.AliFixit.COM

BLANK

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 DC V TO VS/ V-PCH/VM

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 41 of 80
 WWW.AliFixit.COM
5 4 3 2 1

SATA ODD & ODD Power Control +5VS TO +5VS_ODD

D D

R9457 1 @ 2 0_0805_5%

+5VS +5VS_ODD
JODD1
1
1 U10 ODD@
80 mils J3 @
9 SATA_FTX_DRX_P1
SATA_FTX_DRX_P1 ODD@ C8541 1 2 .01U_0402_16V7-K SATA_FTX_C_DRX_P1 2
2
80 mils 5 1 +5VS_ODD_OUT 1 2
SATA_FTX_DRX_N1 ODD@ C8538 1 2 .01U_0402_16V7-K SATA_FTX_C_DRX_N1 3 IN2 OUT 1 2
9 SATA_FTX_DRX_N1 3
4
4 2 JUMP_43X79
9 SATA_FRX_DTX_N1
SATA_FRX_DTX_N1 ODD@ C8540 1 2 .01U_0402_16V7-K SATA_FRX_C_DTX_N1 5
5
1
ODD@ GND From FCH
SATA_FRX_DTX_P1 ODD@ C8536 1 2 .01U_0402_16V7-K SATA_FRX_C_DTX_P1 6
9 SATA_FRX_DTX_P1 6 C8537 4 3 ODD_EN
@ 7 14 IN1 EN ODD_EN 10 1
ZERO_ODD_DP# R524 1 2 0_0402_5% ODD_DP# 8 7 GND1 1U_0402_6.3V6-K ODD@
10 ZERO_ODD_DP# 8 2 G5243AT11U_SOT23-5 C8542
9 15

1
+5VS_ODD 10 9 GND2 SA00005XJ00 4.7U_0603_6.3V6-K
10 ODD@ 2
ZERO_ODD_DA# 11
12 11 R150
1 12 100K_0402_5%
13
ODD@ C8539 13

2
1U_0402_10V6-K
2 For detect S3#, S4# ODD plug or not SUYIN_127382HR013G121ZR
from EC 5/11
ME@
ODD@
R9463 1 2 0_0402_5%
+5VS +3VS
+5VS_ODD
@

2
2
52 ODD_DETECT# R523 1 2 0_0402_5%
R151 R152
@ RFC1 RFC2
@ 0_0402_5% 0_0402_5%
C 20160215 C

2200P_0402_50V7-K
ODD@ ODD@

47P_0402_50V8-J
1
R153 2 1
1 2

RF@
10K_0402_5% 1 2

2
G
Q10
ODD@
3 1
FCH_ODD_DA 10

D
2N7002KW_SOT323-3 For RF
SB00000YY00

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 XXXX

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 42 of 80

5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

C C

Move to Small Board

20151110

B B

A A

Security Classification LC Future Center Secret Data Title

WWW.ALISALER.COM
Issued Date 2015/10/5 Deciphered Date 2016/10/31 GBE LAN PHY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 43 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

Move to Small Board

20151110
C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 RJ45 CONN.

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 44 of 80
5 4 3 2 1
 WWW.AliFixit.COM

TYPE-A NGFF CCARD FOR WLAN +3V_WLAN

3.2H CONNECTOR
+3VS JWLBT1
+3V_WLAN 1 2
GND1 3.3VAUX1 1
USB20_P0 3 4 C218 @
9 USB20_P0 USB20_N0 USB_D+ 3.3VAUX2
5 6
0_0805_5% 1
@
2 R94
9 USB20_N0
7 USB_D- KEY A LED1#
8 10U_0603_6.3V6-M
GND2 NC 2
9 NC NC 10
2016 4/15 change to mount 11
13
NC
NC
NC
NC
12
14
16
RF request 15
17
NC
MLDIR_SENSE
LED2#
GND16
18
19 20
21 DP_ML3N DP_AUXN 22
+3V_WLAN 23 DP_ML3P DP_AUXP 24
25 GND3 GND13 26
27 DP_ML2N DP_ML1N 28
29 DP_ML2P DP_ML1P 30
1 1 31 GND4 GND14 32 For SW debug.
RF@ RF@ 33 DP_HPD DP_ML0N 34
C182 C183 PCIE3_CTX_C_DRX_P 35 GND5 DP_ML0P 36
5 PCIE3_CTX_C_DRX_P
47P_0402_50V8-J 2200P_0402_50V7-K PCIE3_CTX_C_DRX_N 37 PETP0 GND15 38 R171 @1 2 0_0402_5%
5 PCIE3_CTX_C_DRX_N UART0_TXD 10
2 2 39 PETN0 RESERVED1 40 R172 @1 2 0_0402_5% UART0_RXD 10
PCIE3_CRX_DTX_P 41 GND6 RESERVED2 42
5 PCIE3_CRX_DTX_P PCIE3_CRX_DTX_N 43 PERP0 RESERVED3 44
5 PCIE3_CRX_DTX_N
45 PERN0 COEX3 46
CLK_PCIE_WLAN 47 GND7 COEX2 48
9 CLK_PCIE_WLAN CLK_PCIE_WLAN# 49 REFCLKP0 COEX1 50 RTCCLK_R
9 CLK_PCIE_WLAN# RTCCLK_R 10
51 REFCLKN0 SUSCLK 52 PLT_RST#
PLT_RST# 10,16,40,46,53
CLKREQ_PCIE3_WLAN# 53 GND8 PERST0# 54 BT_ON_R R239 2 1 1K_0402_5%
10 CLKREQ_PCIE3_WLAN# BT_ON 10
55 CLKREQ0# W_DISABLE2# 56 RF_OFF#
+3VALW EC_WLAN_WAKE# RF_OFF# 10
57 PEWAKE0# W_DISABLE1# 58
59 GND9 I2C_DATA 60 R90 1 2 100_0402_1% EC_RX 52
61 PETP1 I2C_CLK 62
63 PETN1 ALERT# 64 EC_TX_R R89 1 2 100_0402_1%
2 10K_0402_5% EC_WLAN_WAKE# EC_TX 52
R390 1 65 GND10 RESERVED4 66
67 PERP1 PERST1# 68
69 PERN1 CLKREQ1#

1
70
71 GND11 PEWAKE1# 72 R91
73 REFCLKP1 3.3VAUX4 74 100K_0402_5%
75 REFCLKN1 3.3VAUX5
GND12

2
76 77
PEG1 PEG2
@ ARGOS_NASA0-S6705-TSH4
+3VALW Q3004 +3V_WLAN
ME@
S

3 1
AO3413_SOT23-3
G
2

R286
WLAN_PWRON# 1 2
52 WLAN_PWRON#
10K_0402_5% 1
@
C75
@ .01U_0402_16V7-K
2

2016 4/15 change to un-mount

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 WWAN/WLAN NGFF CONN.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

WWW.ALISALER.COM
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 45 of 80
 WWW.AliFixit.COM
5 4 3 2 1

RW7

+3VS 1 2

0_0402_5%
@

+3V3_AUX

All of cap. close to chip

CW6 should be closed to pin10, CW1 CW2

+3VS Pin12 and Pin10 can share CW6.
D D

4.7U_0603_6.3V6-K

0.1U_0402_10V7-K
CW7 1 1
CW4 CW6

0.1U_0402_10V7-K
0.1U_0402_10V7-K

4.7U_0603_6.3V6-M
CW3
1 2 2 1

1U_0402_10V6-K
1 1 CW8 CW9
Close to chip

0.1U_0402_10V7-K

4.7U_0603_6.3V6-K
CW4, CW7 should be closed to 1 1
Power pin 1,18 respectively 2 2
2 2

18

10

12

26

32

31

11

19
1

9
UW1 2 2
Close to chip, RW8 need to apply new P/N

MAIN_LDO_12VOUT

AUX_LDO_CAP

SD_IO_LDO_CAP
PLL_DLL_12VCCAIN
PE_33VCCAIN

SD_IO_SKT_33VIN

MAIN_LDO_VIN

AUX _33VIN

PE_12VCCAIN
CORE_12VCCD
RW8 1 2 191_0402_1% 4
PE_REXT
Change from SD000015W0T 6.2K to SD00001K700 191 ohm
PCIE2_CTX_C_DRX_N 5
5 PCIE2_CTX_C_DRX_N PCIE2_CTX_C_DRX_P PE_RXM
6
5 PCIE2_CTX_C_DRX_P PE_RXP
Close to chip
CW11 1 2 0.1U_0402_10V7-K PCIE2_CRX_C_DTX_P 7
5 PCIE2_CRX_DTX_P PE_TXP CW16
CW13 1 2 0.1U_0402_10V7-K PCIE2_CRX_C_DTX_N 8 17 1U_0402_10V6-K
5 PCIE2_CRX_DTX_N PE_TXM SD_SKT_33VOUT +CRD_POWER
1
CLK_PCIE_CR# 2
9 CLK_PCIE_CR# CLK_PCIE_CR PE_REFCLKM SD_WP
3 21
9 CLK_PCIE_CR PE_REFCLKP SD_WPI 2
20 SD_CD# 0_0402_5%
SD_CD#
@
27 SD_CLK_MS_DATA0_R
RW19 1 2 SD_CLK_MS_DATA0
PLT_RST# 14 SD_CLK 0_0402_5%
10,16,40,45,53 PLT_RST# PE_RST#_GATE# @
28 SD_CMD_MS_DATA2_R
RW20 1 2 SD_CMD_MS_DATA2
SD_CMD
@ 0_0402_5%
C 13 29 SD_MS_DATA3_R RW21 1 2 SD_MS_DATA3 C
+3VS MAIN_LDO_EN SD_D3
@ 0_0402_5%
30 SD_DATA2_MS_CLK_R
RW22 1 2 SD_DATA2_MS_CLK
15 SD_D2 0_0402_5%
DEV_WAKE# @
Make sure AMD platform support L1.S,if yes! 24 SD_DATA1_R RW23 1 2 SD_DATA1
the CLKREQ is by-direction in L1.S SD_D1 0_0402_5%
@
25 SD_DATA0_MS_DATA1_R
RW18 1 2 SD_DATA0_MS_DATA1
CLKREQ_PCIE2_CR# 23 SD_D0
10 CLKREQ_PCIE2_CR# CLKREQ# 20160704
22
LED#_IO1

+3V3_AUX 16
IO0_MAIN_LDOSEL

GND
OZ621FJ1LN_QFN32_4X4

33
SD_CLK_MS_DATA0

1
CW5
5P_0402_50V9-C
EMC_NS@
2

B B

+CRD_POWER for Edge 15''

JREAD1 ME@
40 mils
+3VS +3VS SD_CMD_MS_DATA2 2
3 CMD
4 VSS1
SD_CLK_MS_DATA0 5 VDD
CLK
1

1
@ @ 6
VSS2
RW1 RW2

10U_0603_6.3V6-M
0.1U_0402_10V7-K
100K_0402_5% 100K_0402_5% 1 1 SD_DATA0_MS_DATA1 7
SD_DATA1 8 DAT0
@

CW10
SD_DATA2_MS_CLK 9 DAT1

CW12
DAT2
2

SD_MS_DATA3 1
RW3 RW4 2 2 CD/DAT3
SD_CD#_R 1 2 SD_CD# SD_WP_R 1 2 SD_WP
SD_WP_R 10
SD_CD#_R 11 W/P
0_0402_5% 0_0402_5% 12 C/D
13 GND1
@ @
GND2
Close to JREAD1.
A
Check SD conn. spec. SUYIN_250312HB011M106ZL A
It will impact the behavior.

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 Card Reader
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 46 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 BLANK

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 47 of 80
5 4 3 2 1
 WWW.AliFixit.COM
A B C D E

+5VS +1.8V_LDO +1.65V_LDO +3V_LDO

LDO 1V8 VREF 1V65 LDO 3V3
RA1 +3VS
1 1
1 2 CA1 CA2 CA3 CA4 +5VS_CLASSD

0_0805_5% 1

4.7U_0603_10V6-K

4.7U_0603_10V6-K

0.1U_0402_10V7-K

0.1U_0402_10V7-K

CA5

CA6

CA7

CA8

CA9
CA10
@
1 1 1 1
0.1U_0402_10V7-K
C3505 close Pin7
2 1 1 1 1 1
CA11
2
2 2 2 2

0.1U_0402_10V7-K

4.7U_0603_10V6-K

0.1U_0402_10V7-K

1U_0402_6.3VA-K

0.1U_0402_10V7-K
2.2U_0402_6.3V6-M
1 2 2 2 2 2

+3VS +3VS_VDDO
X5R CAP X5R CAP
RA2 0_0402_5%
1 2
Close to Pin13,16 @ 1
CA12
0.1U_0402_10V7-K
CA12 close Pin2
2
UA1

APU_AZ_RST# 9 3
RESET# FILT_1.8V +1.8V_LDO
7
VDD_IO +3VS_VDDIO +3VL
2 +3VS_VDDO
APU_AZ_BITCLK 5 VDDO_3.3 18 RA4 1 2 0_0805_5%
BIT_CLK DVDD_3.3 +3VS_DVDD
APU_AZ_SYNC 8 27 +3V_AVDD_HP @
SYNC AVDD_3.3 +3V_LDO +3VALW
29 12/3 For PH noise
10 APU_AZ_SDIN0
APU_AZ_SDIN0 RA3 1 2 33_0402_5% APU_AZ_SDIN0_R 6
SDATA_IN
CX11852 VREF_1.65V
AVDD_5V
28
+1.65V_LDO
+5VS_AVDD RA5 1 @ 2 0_0805_5%
APU_AZ_SDOUT 4
SDATA_OUT 1
PC_BEEP 10 12 SPK_L2+ CA13 +3VS
2 49 PC_BEEP SPKR_MUTE# PC_BEEP LEFT+ SPK_L1- SPK_L2+ 49 2
39 14 1U_0402_6.3VA-K RA6 2 @ 1 0_0805_5%
SPKR_MUTE# LEFT- SPK_L1- 49 2
JSENSE 38 17 SPK_R2+
49 JSENSE
37 JSENSE RIGHT+ 15 SPK_R1- SPK_R2+ 49 CA13 close Pin24
GPIO1/PORTC_R_MIC RIGHT- SPK_R1- 49

EMC@ 36 35
DMIC_CLK RA7 1 2 33_0402_5% MIC_CLK_R 40 MUSIC_REQ/GPIO0/PORTC_L_MIC MICBIASC 34
25 DMIC_CLK DMIC_CLK/MUSIC_REQ/GPIO0 MICBIASB +MICBIASB +3VS_DVDD +3VS
DMIC_DATA 1
25 DMIC_DATA DMIC_DAT/GPIO1 PORTB_R
33 @
PORTB_R_LINE PORTB_L PORTB_R 49
32 RA8 1 2 0_0805_5%
PORTB_L_LINE PORTB_L 49
CA14 1 2 0.1U_0402_10V7-K 11
+5VS_CLASSD CLASS-D_REF EXT_MIC_A
30
13 PORTD_A_MIC 31 EXT_MIC_B EXT_MIC_A 49 X5R CAP, Please Close Pin18
LPWR_5.0 PORTD_B_MIC EXT_MIC_B 49
16
RF, close to RA7 W= 80mils RPWR_5.0 25 HGNDA
Close to RA7 (as RC filter) HGNDA HGNDA 40,49 1
CA15 1 2 1U_0402_6.3V6-K 19 26 HGNDB
FLY_P HGNDB HGNDB 40,49
20 CA16
FLY_N 24 1U_0402_6.3VA-K
DMIC_CLK +3V_AVDD_HP
+AVEE 21 AVDD_HP 2
+AVEE AVEE HP_OUTR
1

EMC@ CA17 23
PORTA_R HP_OUTL HP_OUTR 49
2.2U_0402_6.3V6-M

41 22
CA35 HP indicate 1 GND PORTA_L HP_OUTL 49
150P_0402_50V8-J
2

Should be Apple --> EXT_MIC_A, HGNDB

2 connect to CX11852-11Z_QFN40_5X5 Nokia --> EXT_MIC_B, HGNDA
For EMC Request 4/11 GNDA +5VS_AVDD
RA9 @ +5VS

1 2

38 31
1 AGND 0_0805_5%
1
CA18
APU_AZ_RST# 1U_0402_6.3VA-K
3
10 APU_AZ_RST# DGND 2 3
APU_AZ_BITCLK
10 APU_AZ_BITCLK 21
APU_AZ_SYNC
11
10 APU_AZ_SYNC
APU_AZ_SDOUT Please Close Pin28
10 APU_AZ_SDOUT
1

EMC_NS@ CC212
10P_0402_50V8-J
2

+3VS_VDDO

For EMC request:close to CPU. +1.5VS +3VS

20151209
1

+3VS_VDDIO
RA10 RA11 1 @ 2 0_0402_5%
47K_0402_5% W= 300mils
RA12 1 2 0_0402_5% +3VS_VDDIO
EMC_NS@ CA19 1 2 0.1U_0402_10V7-K
2

@ 1
CA20
EMC_NS@CA33 1 2 0.1U_0402_10V7-K 0.1U_0402_10V7-K 20151211
DA1
EC_MUTE# 1 2 SPKR_MUTE# 2
52 EC_MUTE# EMC_NS@CA34 1
APU_AZ_RST# 2 0.1U_0402_10V7-K
RB751V-40_SOD323-2
SCS00008K00
APU_AZ_BITCLK
CA20 close Pin7
2016/1/21

GND GNDA
1

Change DA1 Oohm to SCS00006S00

RC395 RC396 Change to SCS00008K00 4/19
10K_0402_5%
10K_0402_5%
4
Base on EMC request 4
@ @ 2015/11/25
2

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 Audio Codec
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 48 of 80
A B C D E
 WWW.AliFixit.COM
5 4 3 2 1

PC Beep
Apple --> EXT_MIC_A, HGNDB
CA21 1 2 0.1U_0402_10V7-K
EXT. MIC/LINE IN Nokia --> EXT_MIC_B, HGNDA

DA2
EC Beep @
D 2 CA24 D
52 BEEP# RA15 PC_BEEP EXT_MIC_A
1 1 2 1 2 RA13 1 2 100_0402_5% CA22 1 2 2.2U_0402_6.3V6-K HGNDB
PC_BEEP 48 48 EXT_MIC_A HGNDB 40,48
3
PCH Beep LBAT54CWT1G_SOT323-3 33_0402_5%
0.1U_0402_10V7-K
10 APU_SPKR EXT_MIC_B RA14 1 2 100_0402_5% CA23 1 2 2.2U_0402_6.3V6-K HGNDA
4/19 change LRC to SCS00007D00 48 EXT_MIC_B HGNDA 40,48

Changed CA29 & CA30 from 1uF to 2.2uF/X5R

1
CA25 1 2 0.1U_0402_10V7-K

RA16
to meet Port-D(headset-Mic) THD+N <= -65 dB
10K_0402_5%

2
+3VS

1
Change DA3 SCS00006S00 to 0 ohm

HeadPhone/LINE OUT 2016/7/4

RA31 @
RA17
5.11K_0402_1%

2
RA20 1 2 3K_0402_5% 1 2 0_0402_5%
+MICBIASB JSENSE_CON
JSENSE RA18 2 1 20K_0402_1% JSENSE_CON 40
48 JSENSE
HP_OUTL RA21 1 2 75_0402_5% HP_OUTL_CON RA19 2 1 39.2K_0402_1%
48 HP_OUTL HP_OUTL_CON 40
CA26
PORTB_L RA24
48 PORTB_L 1 2 1 2
Change DA3 SCS00006S00 to 0 ohm
100_0402_5%
10U_0603_6.3V6-M
2016/7/4
C C
RA32
@
RA27 1 2 3K_0402_5% 1 2 0_0402_5% +MICBIASB

HP_OUTR RA28 1 2 75_0402_5% HP_OUTR_CON

48 HP_OUTR HP_OUTR_CON 40
CA27
PORTB_R RA29
48 PORTB_R 1 2 1 2
100_0402_5%
10U_0603_6.3V6-M

CA31, CA32 change to 4.7U for Quality requirement

SPK CONN.
B
Speaker OUT ME update PN B

Need Lenght Match EMC@

EMC@ CA28 1 2 470P_0402_50V7-K SPK_L1-_CON
SPK_L1- RA22 1 2 BLM18PG221SN1D_2P SPK_L1-_CON EMC@
48 SPK_L1- SPK_L2+_CON
EMC@ CA29 1 2 470P_0402_50V7-K
SPK_L2+ RA23 1 2 BLM18PG221SN1D_2P SPK_L2+_CON
48 SPK_L2+
JSPK1
SPK_L2+_CON 1
SPK_L1-_CON 2 1
SPK_R2+_CON 3 2
SPK_R1-_CON 4 3
4
EMC@ EMC@ 5
SPK_R1- RA25 1 2 BLM18PG221SN1D_2P SPK_R1-_CON CA30 1 2 470P_0402_50V7-K SPK_R1-_CON GND1
48 SPK_R1- 6
EMC@ EMC@ GND2
SPK_R2+ RA26 1 2 BLM18PG221SN1D_2P SPK_R2+_CON CA31 1 2 470P_0402_50V7-K SPK_R2+_CON
48 SPK_R2+
EMI parts HIGHS_WS33040-S0351-HF
ME@
close to SPK Conn.
close to UA1

Change SPK conn. to 4 pins.

A A
20151119

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 HP/MIC JACK/Speaker
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 49 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

C Move to Small Board C

20151110

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 AUDIO JACK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 50 of 80
5 4 3 2 1

WWW.ALISALER.COM
 WWW.AliFixit.COM

BLANK

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

WWW.ALISALER.COM
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 51 of 80
 WWW.AliFixit.COM
5 4 3 2 1

+3VL
UE2 Need Closer UE1
+3VL

15/02/12, by sonic Vcc 3.3V +/- 5%

2
RE58 RE3 100K +/- 1%

2
UE2 10K_0402_5%
RE3 Board ID
EC_CS1#
RE7 VAD_BID min V AD_BID typ VAD_BID max Phase
1 8
+3VL

1
/CS VCC 100K_0402_1%
EC_DO
All capacitors close to EC 0 0K +/- 5% 0 V 0 V 0 V SDV
2 7

1
DO(IO1) /HOLD
EC_DI 5 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V FVT
RE59 DI(IO0)
CLK
6 EC_CLK Close to EC +3VL CE4 CE5 CE8 CE6 CE9 CE10 Board_ID
2 1 3 1 CE7 2 18K +/- 5% 0.436 V 0.503 V 0.538 V SIT

1
+3VL

0.1U_0402_25V6-K

0.1U_0402_25V6-K

0.1U_0402_25V6-K

0.1U_0402_25V6-K

0.1U_0402_25V6-K

0.1U_0402_25V6-K
10K_0402_5% /WP
1 2 +VCOREVCC
4
GND
CE19 1 1 1 1
@
1
@
1 33K_0402_5% 3 33K +/- 5% 0.712 V 0.819 V 0.875 V SVT
0.1U_0402_10V7-K 0.1U_0402_25V6-K +3VL_AVCC RE7
2 +3VS
D W25X10CLSNIG_SO8 4 4.7K +/- 5% 0.141 V 0.148 V 0.155 V D

2
2 2 2 2 2 2
5 24K +/- 5% 0.612 V 0.638 V 0.664 V
2016/4/15 For SVT
@

114
121
127
CLK_PCI_EC_R

12

11

26
50
92

74
RC390 1 2 0_0402_5% minimum trace width 12 mil +3VL +3VL_AVCC

3
UE1
LE1

VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VCC

AVCC
VBAT

VSTBY(PLL)
VCORE
1 2 +3VL_AVCC
CLK_PCI_EC
For EMC request BLM18PG121SN1D_2P
1 1
20151208
KBRST# 4 24 LOGO_LED# CE2 CE3
10 KBRST# KBRST#/GPB6 PWM0/GPA0 AOU_IFG# LOGO_LED# 25
SERIRQ 5 25 0.1U_0402_25V6-K 1000P_0402_50V7-K
9 SERIRQ LPC_FRAME# SERIRQ/GPM6 PWM1/GPA1 EC_ON2 AOU_IFG# 40 2 2
6 28
9 LPC_FRAME# LPC_AD3 LFRAME#/GPM5 PWM2/GPA2 PWRBTN_LED# EC_ON2 61,75,76
7 29 LE2
9 LPC_AD3 LPC_AD2 8 LAD3/GPM3 PWM3/GPA3 30 APUPWR_EN PWRBTN_LED# 56 EC_AGND 1 2
9 LPC_AD2 LAD2/GPM2 PWM PWM4/GPA4 APUPWR_EN 70,71
LPC_AD1 9 31 EC_FAN_PWM
9 LPC_AD1 LPC_AD0 LAD1/GPM1 PWM5/GPA5 EC_FAN_PWM 56
10 32 BEEP# BLM18PG121SN1D_2P
9 LPC_AD0 CLK_PCI_EC_R 13 LAD0/GPM0 PWM6/SSCK/GPA6 34 +1.05VS_VDDPPG BEEP# 49
LPC +3VALW
+1.05VS_VDDPPG
65 PD_VBUS_C_CTRL1_EC
WRST# 14
PD_VBUS_C_CTRL1_EC 15
LPCCLK/GPM4
WRST#
PWM7/RIG1#/GPA7
TMRI0/GPC4
120
124 SUSP#
60
delete OTP_RST
EC_RX ECSMI#/GPD4 TMRI1/GPC6 SUSP# 60,69,78
16
45 EC_RX EC_TX PWUREQ#/BBO/SMCLK2ALT/GPC7 TEMBER_DETECT#
17 66

2
+3VL 45 EC_TX LPC_RST# LPCPD#/GPE6 ADC0/GPI0 CP_BYPASS
22 67
10 LPC_RST# EC_SCI# LPCRST#/GPD2 ADC1/GPI1 BATT_TEMP CP_BYPASS 54 RE38
23 68 BATT_TEMP 66,67
10 EC_SCI# 126 ECSCI#/GPD3 ADC2/GPI2 69 Board_ID
RE4 GATEA20 ADC 10K_0402_1% RE40 1
1 2 WRST# 10 GATEA20 GA20/GPB5 ADC3/GPI3 70 FAN_ID 215K_0402_1% HDD_DETECT# 32
1 IT8586E/AX ADC4/GPI4 71 ADP_I FAN_ID 56

1
100K_0402_5% ADP_I 67 TEMBER_DETECT#
CE11 ADC5/DCD1#/GPI5 72 TP_REST
TP_REST 54

2
1U_0402_10V6-K
55 KSI[0..7]
KSI[0..7] KSI0 58
KSI0/STB#
LQFP-128L ADC6/DSR1#/GPI6
ADC7/CTS1#/GPI7
73 ADP_ID
ADP_ID 65 RE42 1 2 51K_0402_1%
ODD_DETECT# 42
KSI1 59 78 IMVPPOK
+3VALW KSO[0..17] KSI1/AFD# DAC2/TACH0B/GPJ2 IMVPPOK 70
55 KSO[0..17] KSI2 60 79 MAINPWON
KSI2/INIT# DAC3/TACH1B/GPJ3 H_PROCHOT_EC MAINPWON 65,66,68 +5VS
RPE1 KSI3 61 DAC 80
1 8 KSI4 62 KSI3/SLIN# DAC4/DCD0#/GPJ4 81 ENBKL
C ENBKL 8 C
2 7 KSI5 63 KSI4 DAC5/RIG0#/GPJ5 CP_CLK RE5 1 2 4.7K_0402_5%
3 6 KB_FN KSI6 64 KSI5 85 AOU_EN CP_DATA RE6 1 2 4.7K_0402_5%
AOU_IFG# KSI6 PS2CLK0/TMB0/CEC/GPF0 PBTN_OUT# AOU_EN 40
4 5 KSI7 65 86
36 KSI7 PS2DAT0/TMB1/GPF1 87 EC_SMB_CK2 PBTN_OUT# 10
KSO0
Move EC_WLAN_WAKE# to P45 KSO0/PD0 GPF2 EC_SMB_DA2 EC_SMB_CK2 33
10K_0804_8P4R_5% KSO1 37 Int. K/B PS2 88 +3VS
38 KSO1/PD1 GPF3 89 CP_CLK EC_SMB_DA2 33
KSO2 Matrix
KSO2/PD2 PS2CLK2/GPF4 CP_DATA CP_CLK 54 EC_FAN_PWM
RPE2 KSO3 39 90 RE8 1 @ 2 10K_0402_5%
KSO3/PD3 PS2DAT2/GPF5 CP_DATA 54
1 8 KSO1 KSO4 40
2 7 KSO2 KSO5 41 KSO4/PD4 96 BATT_CHG_LED#
KSO5/PD5 EXTERNAL SERIAL FLASH GPH3/ID3 BATT_CHG_LED# 65
3 6 FAN_ID KSO6 42 97 PWR_STATUS_LED#
4 5 LAN_WAKE# 43 KSO6/PD6 GPH4/ID4 98 PWR_STATUS_LED# 65
KSO7 ACOFF
KSO7/PD7 GPH5/ID5 PWR_GOOD_D ACOFF 67
KSO8 44 99
KSO8/ACK# GPH6/ID6 RE60
10K_0804_8P4R_5% KSO9 45
+5VALW KSO10 46 KSO9/BUSY 101 EC_CS1# PWR_GOOD_D 1 2 PWR_GOOD
+3VS KSO10/PE NC1 EC_DI PWR_GOOD 10
20150609 KSO11 51 102
RPE3 KSO12 52 KSO11/ERR# NC2 103 EC_DO
1 8 USB_ON# KSO12/SLCT SPI Flash ROM NC3 0_0402_5%
KSO13 53 105 EC_CLK
+3VL 2 7 EC_FAN_SPEED KSO13 NC4
KSO14 54 @
3 6 GPU_VR_HOT# KSO14
KSO15 55
4 5 LID_SW# KSO15
KSO16 56 108 ACIN
KSO17 57 KSO16/SMOSI/GPC3 AC_IN# 109 LID_SW#
10K_0804_8P4R_5% KSO17/SMISO/GPC5 UART LID_SW# LID_SW# 56 CC23 EMC@
PWR_GOOD_D 1 2
ON/OFF# 110 82 VDDPALW_PWRGD
RPE4 56 ON/OFF# PWRSW# EGAD/GPE1 VDDPALW_PWRGD 75
2015/06/09 111 SM Bus 83 EC_ON
EC_ON 68
1 8 SUSP# EC_SMB_CK1 115 XLP_OUT EGCS#/GPE2 84 AOU_CTL1 10P_0402_50V8-J
2 7 AC_PRESENT 66,67 EC_SMB_CK1 EC_SMB_DA1 SMCLK1/GPC1 EGCLK/GPE3 AOU_CTL1 40
116
3 6 66,67 EC_SMB_DA1 SMDAT1/GPC2 PM_SLP_S5#
4 5 SYSON 67 OTG
OTG
ADAPTER_ID_ON#
117
118 SMCLK2/PECI/GPF6 GPIO GPJ1
77
100 EC_MUTE# PM_SLP_S5# 10 20150611
65 ADAPTER_ID_ON# EC_SMB_CK3 SMDAT2/PECIRQT#/GPF7 SSCE0#/GPG2 VGA_AC_DC# EC_MUTE# 48
94 106
100K_0804_8P4R_5% 8,17,57,58 EC_SMB_CK3 EC_SMB_DA3 95 CRX1/SIN1/SMCLK3/GPH1/ID1 SSCE1#/GPG0 104 WLAN_PWRON# VGA_AC_DC# 17 +3VALW
8,17,57,58 EC_SMB_DA3 CTX1/SOUT1/GPH2/SMDAT3/ID2 DSR0#/GPG6 WLAN_PWRON# 45
107 SYSON
EMC_NS@ DTR1#/SBUSY/GPG1/ID7 SYSON 69,77
119 BKOFF#
CE14 2 1 0.1U_0402_25V6-K CRX0/GPC0 123 DCIN_ATTACHED2 BKOFF# 25 HDD_DETECT# 1 2
@ RE61 10K_0402_5%
CTX0/TMA0/GPB2 DCIN_ATTACHED2 65
For EMC, close to UE1 +3VL 112
VSTBY0 RI1#/GPD0
18 PM_SLP_S3#
PM_SLP_S3# 10
LAN_WAKE# 125 21 GPU_VR_HOT#
40 LAN_WAKE# GPE4 RI2#/GPD1 GPU_VR_HOT# 74
WAKE UP 76 INT#_TYPEC
B TACH2/GPJ0 AOU_CTL3 INT#_TYPEC 33 +3VL B
48 2016 4/15
TACH1A/TMA1/GPD7 47 EC_FAN_SPEED AOU_CTL3 40
+3VL USB_ON# TACH0A/GPD6 FN_LED# EC_FAN_SPEED 56 @
33 19
RPE5 37 USB_ON# CP_RESET# 35 GINT/CTS0#/GPD5 L80HLAT/BAO/GPE0 20 KB_FN FN_LED# 55 EC_ON 1 2
+3VS EC_SMB_CK1 54 CP_RESET# GPIO KB_FN 55 RE39 10K_0402_5%
1 8 EC_RSMRST# 93 RTS1#/GPE5 L80LLAT/GPE7
2 7 EC_SMB_DA1 10 EC_RSMRST# CLKRUN#/GPH0/ID0
3 6 EC_SMB_CK3 2015/03/23 +3VL
4 5 EC_SMB_DA3 EC_WAKE# 2
Please don't place any PU Resistor on GPG[7:2]
10,17 EC_WAKE# AC_PRESENT 128 CK32KE/GPJ7
Clock (Reserve hardware strapping)
2.2K_0804_8P4R_5% 10 AC_PRESENT CK32K/GPJ6 EC_MUTE# RE31 1 2 10K_0402_5%

1 @ 2
RE32 10K_0402_5%
+3VS
AVSS
VSS1

VSS2
VSS3
VSS4
VSS5
VSS6

1. Version CX : Don't Support Mirror Code

1
RC351
2 CP_BYPASS IT8586E-FX_LQFP128_14X14
Version DX/EX/FX : Support Mirror Code
IT8586E/FX LQFP 2. For Mirror Code
1

27
49
91
113
122

75

@ SA00005W940
10K_0402_5%
"H" --> Enable
EC_AGND "L" --> Disable (Default)
*

+3VL
For factory EC flash
PROCHOT# EC_SMB_CK1
ACIN RE33 1 2 10K_0402_5%
1 RE34 1@ 2 0_0402_5%
(EC asserts PROCHOT# signal by driving high, IT1 @1 EC_SMB_DA1 ACPRN 67
IT2 @1 DEV1 @ 2 1 RB751V-40_SOD323-2
the level shifter must invert it and drive the processor side PROCHOT# low.) IT3 @1
A IT4 @1 A
IT5 @ CE12 1 2 100P_0402_50V8-J

1 KSI7 Change DEV1 to SCS00008K00 4/19

IT6 @1 KSI6
VR_HOT# IT7 @1 WRST#
8,67,70,71 VR_HOT# IT8 @
1

D
1
H_PROCHOT_EC 2 CE17
G Title
QE1 S 47P_0402_50V8-J
Security Classification LC Future Center Secret Data
3

2N7002WT1G_1N_SC-70-3 2
Issued Date 2015/10/5 Deciphered Date 2016/10/31 XXXX

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 52 of 80
5 4 3 2 1
 WWW.AliFixit.COM
A B C D E

TPM IC

1 1

+3VALW R291, R810, C810, C811 for co-lay

SA00007DZ00 NPCT652LA0YX

1
Only for UMA SKU @
R810
0_0402_5%
+1.8VS Change R810 to R-short 4/19

2
1@
place close to 1 C811
device VDD/GND pins @ 10U_0603_6.3V6-M
C810
2
0.1U_0402_10V7-K
2

1 1
TPM@

22
+1.8VS TPM@ UTPM1

1
C808 C809 10K_0402_5%
0.1U_0402_10V7-K 10U_0603_6.3V6-M R287 2015/12/4 update.

VDD3

VDD2

NCI/VDD1
TPM@ R289 1 2 10K_0402_5% 2 2 TPM@
@ 2 1 18
R290 1 2 0_0402_5% SPI_CS_R# PIRQ# TPM_GP2
9 SPI_CS2#_TPM 3 2 1 +1.8VS
NCI1 4
SPI_SI_R 21 NCI2 5 R288 TPM@
SPI_SO_R 24 MOSI NCI3 10 10K_0402_5%
R292 @
9 SPI_SO
SPI_SO 1 2 0_0402_5% SPI_SO_R MISO NCI4 11
R293 @
9 SPI_SI
SPI_SI 1 2 0_0402_5% SPI_SI_R NCI5 12
R294 @
9 SPI_CLK
SPI_CLK 1 2 0_0402_5% SPI_CLK_R NCI6 13
2
SPI_CS_R# 20 NCI7 14
2
CS# VDD/NCI8 15
SPI_CLK_R 19 NCI9 16
SCLK GND/NCI10 25
+1.8VS NCI11
TPM_PLT_RST# 17 26
RST# NCI12 27
6 NCI13 28
GPIO NCI14 31
7 NCI15
1

PP
20150225

1
R295
10K_0402_5% 29
TPM@ NC1 30 R291 @
D264 NC2

GND1

GND2

GND3

GND4

GND5
10K_0402_5%
2

RB751V-40_SOD323-2
TPM_PLT_RST#

2
1 2
10,16,40,45,46 PLT_RST#
SLB9670VQ2.0_VQFN32_5X5

23

32

33
SCS00008K00 TPM@

Change to SCS00008K00 4/19 TPM@

Change UTPM1 SA000075L00 to SA000075L10 4/15 11/19 Change TPM vender

12/7 update SCH

3 3

NOTE:
Check timing sequence in SDV phase.

5 ms < t
NOTE:
1) It is recommended to connect the TPM to the system's
standby voltage to improve performance.
0 < t 2) SPI_RST# must be asserted for at least 5 msec after
VSB VSB power-up.
3) VSB may come up anytime before VDD power-up,
but not after VDD power-up.
4 4) SPI_RST# may be asserted together with VDD power 4
VDD negation, but should not at any point exceed 0.5V
1 ms < t above the VDD power level.

SPI_RST#

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 TPM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 53 of 80
A B C D E
 WWW.AliFixit.COM
5 4 3 2 1

Click Pad +5VS

Track point
D D

1
R58
+5VS
0_0603_5%

2
@

JCP1
ME@
1 JTP1
CP_CLK_BUS 2 1 TP_DATA2 1
3 2 TP_RESET 1
R59 1 2 2
TP_DATA2 4 3 2
3
TP_CLK2 5 4 3
4.7K_0402_5% 4
CP_DATA_BUS 6 5 4
5
7 6 TP_CLK2 5
6
CP_RESET# 8 7 6
52 CP_RESET# 7
CP_CLK 9 8 7
52 CP_CLK 8
CP_DATA 10 9 8
52 CP_DATA 9
TP_REST 11 10 13 9
52 TP_REST 10
BYPASS_PAD 12 11 GND1 14 10
11 13
12 GND2 11 GND1
12 14
12 GND2
KYOCE_046811-612-000846
ME@ JAE_FL10F012HA1R3000

TP_CLK2

TP_DATA2
C C

20160418
Change JCP1 to KYOCE_046811-612-000846
CP_CLK

CP_DATA

1 1
C8544 EMC@
C8543
100P_0402_50V8-J 100P_0402_50V8-J
EMC@ 2 2
2

PESD5V0U2BT_SOT23-3
EMC@ D269 Detele D66,add C8543,C8544 4/26
1

B B

+5VS

@ R81
R64
@ 1 2 CP_CLK_BUS
R63 1 2 4.7K_0402_5% TP_CLK2 TP_REST 1 2 TP_RESET 10 APU_SMB1CLK

R65 1 2 4.7K_0402_5% TP_DATA2 0_0402_5%

R66 1 0_0402_5%
@ 2 0_0402_5% BYPASS_PAD
R82
1 2 CP_DATA_BUS
10 APU_SMB1DATA
R67 1 2 100K_0402_5% CP_RESET# @
R62 0_0402_5%
@
1 2
52 CP_BYPASS

0_0402_5%

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 CP/TPOINTCONN.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 54 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

KB CONN
C C

JKB1 ME@

KSI[0..7] KSI1 1
52 KSI[0..7] 1
KSI7 2
KSO[0..17] KSI6 3 2
52 KSO[0..17] 3
KSO9 4
KSI4 5 4
KSI5 6 5
KSO0 7 6
KSI2 8 7
KSI3 9 8
KSO5 10 9
KSO1 11 10
KSI0 12 11
KSO2 13 12
KSO4 14 13
+3VS KSO7 15 14
KSO8 16 15
KSO6 17 16
17

1
KSO3 18
R180 KSO12 19 18
300_0402_5% KSO13 20 19
20

FN_LED#
KSO14 21
21

+3VS_KBLED
KSO11 22

2
KSO10 23 22
KSO15 24 23
+3VS_KBLED 25 24
FN_LED# 26 25
52 FN_LED# F1_LED# 26
27
10 F1_LED# F4_LED# 27
28
10 F4_LED# KB_FN 28
B 29 B
2

52 KB_FN 29
30
KSO16 31 30 33
EMC@ KSO17 32 31 GND1 34
PESD5V0U2BT_SOT23-3 32 GND2
D268
JAE_FL10F032HA2R3000
1

For EMC Request 4/15

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 KB/RTC/TOUCH PAN CONN.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 55 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

PWR B
FAN CONN. +3VL

1
R181
100K_0402_5%

2
SW1
D 1 3 ON/OFF# D
ON/OFF# 52
2 4

NTC010-AK1G-B160T_4P
+5VS +VCC_FAN @

@ 40mil
R182 1 2 1204 PW SW on MB
HIGHS_WS32051-S0471-HF
0_0603_5%
5 7
52 EC_FAN_PWM 5 G2
4 6
3 4 G1
52 EC_FAN_SPEED 3 +3VL
2 JPW1
1 2
52 FAN_ID 1 1
ON/OFF# 2 1
JFAN1 PWRBTN_LED# 2

ON/OFF#
3
ME@ 52 PWRBTN_LED# 3
4
4
5
GND1 6
GND2

HIGHS_FC1AF041-2201H

2
D34 ME@
PESD5V0U2BT_SOT23-3
1125 update symbol !!

1
C C
2016/7/11
Mount D34 for ESD issue

Lid Switch
Dual lay for hall sensor
FingerPrint CONN.

+3VS +3VS_FRP

R70 1 2 0_0402_5%

@
B HIGHS_FC1AF061-2201H B
8
7 GND2
GND1
@ 6 1 U16
USB20_P3 R410 1 2 0_0402_5% USB20_P3_CON 5 6 C52
9 USB20_P3 5 C390 5 1 LID_SW#
USB20_N3 R411 1 2 0_0402_5% USB20_N3_CON 4 +3VL VCC OUT LID_SW# 52
9 USB20_N3 4 2
3 0.1U_0402_10V6-K GND1
@ 3 2
3

2 4 3
2

0.1U_0402_10V7-K
1 GND2 NC
1 1
JFRP1 TCS10DLU_UFV5
ME@
2 Delete U16 4/26

AZC199-02S.R7G_SOT23-3
@ D31
1

2015/12/10 Update

Check pin define.1202

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 PBTN/LID/FP/FAN CONN.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 56 of 80
5 4 3 2 1
 WWW.AliFixit.COM

Thermal Sensor
placed near by VRAM
THU1
+3VS
EC_SMB_CK3
EC_SMB_DA3 EC_SMB_CK3 8,17,52,58
1 10 EC_SMB_CK3 EC_SMB_DA3 8,17,52,58
VCC SCL
REMOTE1+ 2 9 EC_SMB_DA3
DP1 SDA
1
C145 REMOTE1- 3 8
DN1 ALERT#
0.1U_0402_10V6-K REMOTE2+ 4 7 F75303M_THERM# R184@ 1 2 10K_0402_5%
2 DP2 THERM# +3VS
REMOTE2- 5 6
DN2 GND

F75303M_MSOP10

Address 1001_101xb
Internal pull up 1.2K to 1.5V
R for initial thermal shutdown temp

Close to U1 Close to +VCC_CORE Close JDIMM1&JDIMM2

REMOTE1+ REMOTE2+ REMOTE1+ REMOTE2+ REMOTE2+/-:
Trace width/space:10/10 mil
1 1 1 1
Trace length:<8"

1
C C
C146 C147 C148 @ 2 Q5 C149 @ 2 Q6
2200P_0402_50V7-K 2200P_0402_50V7-K 100P_0402_50V8-J B S TR TTC4116FU NPN SC-70-3 100P_0402_50V8-J B S TR TTC4116FU NPN SC-70-3
2 2 2 E SB000010U00 2 E SB000010U00

3
REMOTE1- REMOTE2- REMOTE1- REMOTE2-

20151120

REMOTE2+

1
C
C380 @ 2 Q7
100P_0402_50V8-J B S TR TTC4116FU NPN SC-70-3
2 E SB000010U00

3
@
REMOTE2-

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 Thermal Sensor
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

WWW.ALISALER.COM
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 57 of 80
 WWW.AliFixit.COM
A B C D E

1 1

APS G-Sensor
TABLE

P/N Mode Selection

+3VS +3VS_GS
+3VS_GS

RG1 1
@
2 0_0402_5%
H I2C Mode

2
@
3 +3VS_GS L SPI Mode 2

D
1

QG1
AO3413_SOT23-3

G
2
1U_0402_10V6K

W=40 mils 1 @
CG3

+3VS +3VS_GS
2

1U_0402_10V6K

10U_0603_6.3V6-M
1 1

CG1

CG2
RG2 RG3
2 2
@ 10K_0402_5% 10K_0402_5%
RG6 +3VS
1 2

14
10 GS_ON#

1
UGSEN1

1
100K_0402_5% 1

Vdd_IO

Vdd
8 RG5
@ CG4 I2C_CLK_GSENSE 4 CS @
SCL/SPC 0_0402_5%
.01U_0402_16V7-K I2C_DATA_GSENSE 6
2 ADDR_SEL 7 SDA/SDI/SDO
2016/1/27

2
SEL/SDO 11 GSENSE_INT
16 INT1/DRDY 9 GSENSE_INT2 1
GND_4 INT2 TG1
Change net name for co-lay lever shift 15
RES_2
+3VS_GS 13 10
GND_3 RES_1
+3VS_GS

2
2

GND_1

GND_2
RG4 3 NC_1
@
2.2K_0402_5% 2 1 RG7 @ NC_2
10K_0402_5%

12
@ LIS3DSHTR_LGA16_3X3
3 2.2K_0402_5% 2 1 RG8 un-mount RG4, address select. 3
@
Q13A
2

SB00000YS00
G1

I2C_CLK_GSENSE 1 6
S1 D1 EC_SMB_CK3 8,17,52,57
20151127 Update symbol!!!
NTJD5121NT1G_SC88-6
@
RC412 1 2 0_0402_5%
TABLE
5

Q13B @
G2

I2C_DATA_GSENSE 4 3 P/N ADDR_SEL Address

S2 D2 EC_SMB_DA3 8,17,52,57
SB00000YS00

@ PU AT EC SIDE, +3VS AND 4.7K H 32h (W) & 33h (R)

RC413 1 2 0_0402_5% LIS3DH
L 30h (W) & 31h (R)
NTJD5121NT1G_SC88-6

2016/1/29 H 3Eh (W) & 3Fh (R)

Change Q13 from SB00000EO1J to SB00000YS00 KX023-1025
L 3Ch (W) & 3Dh (R)

4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 G SENSOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 58 of 80
A B C D E
 WWW.AliFixit.COM
5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 XXXX
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 59 of 80
5 4 3 2 1

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1 2 3 4 5

+5VALW To +5VS For DisCharge +5VALW +0.6VS

+3VALW To +3VS

1
1
+3VALW +3VS R297
VIN 5V and 3.3V (VBIAS=5V), IMAX(per channel)=6A, Rds=18mohm R296 1K_0402_1%
U13 J7 @ 1K_0402_1%
1 14 +3VS_LS 1 2

2
2 VIN1_1 VOUT1_2 13 1 2
@

2
VIN1_2 VOUT1_1 C142 100P_0402_50V8-J JUMP_43X118
1 1
3VSON 3 12 1 2 SUSP
C140 ON1 CT1 C828
1U_0402_6.3V7-K 4 11 0.1U_0402_10V7-K Q14
A +5VALW A
VBIAS GND

1
2 C143 100P_0402_50V8-J 2 D D 2N7002WT1G_1N_SC-70-3
+5VALW 5VSON 5 10 1 2 +5VS 2 @ 2 SUSP
ON2 CT2 52,69,78 SUSP#
G G
6 9 J8 @ Q11
S S SB00000YY00

3
7 VIN2_1 VOUT2_2 8 +5VS_LS 1 2 2N7002WT1G_1N_SC-70-3
VIN2_2 VOUT2_1 1 2 SB00000YY00
1 15 JUMP_43X118 1 Change from SB00000YM00 to SB00000YY00 4/25
GPAD
C141 TPS22966DPUR_WSON14_2X3 C829
1U_0402_6.3V7-K 0.1U_0402_10V7-K
2 2
+1.8VALW to +1.8VS 2A request
R298
VIN 1.8V (VBIAS=5V), IMAX=6A, Rds=15mohm
1 2 3VSON
+1.8VALW Q190 +1.8VS
3.3K_0402_1% AO3413_SOT23-3 J9
@
3 +1.8VS_LS

D
1 1 1 2
C830 1 2
0.1U_0402_10V7-K JUMP_43X79 1

G
1

2
2 C813
C812 0.1U_0402_10V7-K
1U_0402_6.3V7-K 2
2
R299
SUSP# 1 2 5VSON
R310
2.2K_0402_5% SUSP 1 2 18PWRON

1 22K_0402_5% 1
C831 C151
B B
0.1U_0402_10V7-K 0.1U_0402_10V7-K
2 2

+1.05VALW_VDDP to +VDDP 10A request

VIN 0.95V (VBIAS=5V), IMAX=10A, Rds=7mohm
+1.05VALW_VDDP +1.05VS_VDDP
U112 J51 @
9 8 +1.05VS_VDDP_LS 1 2
VIN VOUT4 1 2
1 4 7 JUMP_43X79 1 1
+5VALW VBIAS VOUT3 C814
C215 +1.05VS_VDDP_EN 2 6 C834
1 EN VOUT2 10U_0603_6.3V6-M
10U_0603_6.3V6-M @ 10U_0603_6.3V6-M
2 C216 1 2 2 1 1 5 2 2
1U_0402_6.3V7-K GATE VOUT1
2 R300
100K_0402_5% D263 @ 2 3
GND
Change D263 to SCS00008K00 4/19
C153 @
1U_0402_6.3V7-K 1 M5938ARD1U_TDFN8_3X3

C C
+1.05VS_VDDP +3VALW +3VS

R301
2

SUSP# 1 2 +1.05VS_VDDP_EN
1 RC160
2

66.5K_0402_1% C150 2.2K_0402_5%

RC161
0.1U_0402_10V7-K 100K_0402_5%
1
2

2 RC165
+1.05VS_VDDPPG 52
1

2.2K_0402_5%
1

QCC2 D
2
1

G
MLMBT3904WT1G NPN SOT323-3

QC13
1

C S 2N7002WT1G_SC-70-3
3

2
B 20150528
2

RC163 E
3

100K_0402_5%
@
SB000010U00
1

Remove main source LRC to SB000010U00 4/19

D +3VS +3VS_APU D
J13 @
1 2
1 2
+3VALW JUMP_43X39 +3VALW_APU
J11 @
1 2
1 2
Security Classification LC Future Center Secret Data Title
JUMP_43X39
Issued Date 2015/10/5 Deciphered Date 2016/10/31 3VS/5VS/1.1VS/VDDIO_RUN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

WWW.ALISALER.COM
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 60 of 80

1 2 3 4 5
 WWW.AliFixit.COM
5 4 3 2 1

+VDDCR_FCH_ALW +3VL

During S0: track +VDDNB_CORE +RTC_LDO Change D249,D250 to SCS00008K00 4/19 +RTC_33 +RTC_LS +RTC_LDO

2
During S5/S4/S3: set to +0.775V +RTCBATT
50mA
D249
+5VALW RB751V-40_SOD323-2
D250 SCS00008K00 U116
ME@ J49
R302

1
JRTC1 1 2 2 1 2 3 2 1
1 VIN VOUT 2 1
1 1K_0402_1%

1
2 1 RB751V-40_SOD323-2
+5VALW 2 JUMP_43X39 @
SCS00008K00

1
R307 @ 3 C815 R306 1 4
GND1 4 1U_0402_6.3V7-K 1 2 GND ENABLE C816
D 10K_0402_5% D
GND2 2@ NCP698SQ15T1G_SC-82AB4 10U_0603_6.3V6M

2
2
FCH_S0_POWER TE_2041180-2 10K_0402_5%
1

1
R308 @ C817 @
10K_0402_5%
2 1U_0402_6.3V7-K
VFB=0.8V

3
2
Q18B

D2
FCH_S5_POWER5 NTJD5121NT1G_SC88-6
G2

S2
SB00000YS00

4
@

6
R309 @
0_0402_5%

D1
Q18A
1 2 2
10 APU_S5_MUX_CTRL G1 NTJD5121NT1G_SC88-6
+0.775VALW

S1
1

SB00000YS00
C818 @

1
Enable = MUX (S0 to S3) --> LOW 0.1U_0402_10V7-K @
2

Disable = MUX (S3 to S0) --> HIGH +0.775VALWP +0.775VALW

200mA
2016/1/29
50mA
Change Q18 from SB00000EO1J to SB00000YS00 U117
J54 J50
2 1 3 4 2 1
+1.8VALW 2 1 VIN VOUT 2 1

4.7U_0603_6.3V6K

1
2
JUMP_43X39 GND JUMP_43X39 @

1
C819 5 R303
@ 1 SET 5.9K_0402_1% C820 C821

2
C SHDN 10U_0603_6.3V6M C
220P_0402_50V7-K

2
APL5701-ABI-TRG_SOT23-5

2
+VDDNB_CORE Vgs(th) = 1.8V (tpy), 2.2V (max) +VDDCR_FCH_ALW
Rds(on) = 4.1 (typ), 5.3 (max) ; Vgs = 4.5V, Id = 20A R304
1 Q172 @ EC_ON2 1 2 EN_0_775VSP
52,75,76 EC_ON2

1
AO3420_SOT23-3 VFB=0.8V R305
2 66.5K_0402_1% +1.5VS

1
20K_0402_1%
S

C201 C202 C203 C204

20150226 C822 TDC :200mA
4.7U_0603_6.3V6-K

4.7U_0603_6.3V6-K

22U_0603_6.3V6-M

22U_0603_6.3V6-M
3 1 1 1 1 0.1U_0402_10V7-K

2
G

1
C832 @ 2 2 2 2
0.1U_0402_10V7-K
2 Reserves 2016/4/8
FCH_S0_POWER
add 0.775 W ALW PWR 5/18
20150303

+0.775VALW 1 @ Q173 1 Q174 @

AO3420_SOT23-3 AO3420_SOT23-3
RC408 2 2
@1 2 +0.775VALW_FCH
S

D
D

+1.05VALW_VDDP0_0603_5%
3 3
G
G

1 2 0_0603_5% 1
RC409 C833 @
@ 0.1U_0402_10V7-K
B
2 B
FCH_S5_POWER

Change 0.775 PWR to 1.05V PWR

2016/4/8

Co-lay 2015/11/05
+VDDNB_CORE +VDDCR_FCH_ALW

UC7 @
1 8 RC277 1 2
VIN1_1 VOUT_1
+0.775VALW_FCH 0_0603_5%
1 2 7
VIN1_2 VOUT_2
CC207

+0.775VALW_FCH 3 6 APU_S5_MUX_CTRL
10U_0603_6.3V6-M

+5VALW VIN2 SEL

2 4 5
1 VCC EN
10U_0603_6.3V6-M
CC208

1 9
GND
CC209

2
1U_0402_6.3V6-K

G5018RD1U_TDFN8_3X3
2

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 3VS/5VS/1.1VS/VDDIO_RUN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0

WWW.ALISALER.COM
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 61 of 80

5 4 3 2 1
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5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 XXXX
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 62 of 80
5 4 3 2 1

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D
20151119 UPDATE D

Screw Hole
H1 H2 H3 H4 H5 H6

@ @ @ @ @ @

1
PAD_C6P0D3P15 PAD_C6P0D3P15 PAD_C6P0D3P15 PAD_C6P0D3P15 PAD_C6P0D3P15 PAD_C6P0D3P15

H8 H9 H10 H11 H12 H13 H14 H15

@ @ @ @ @ @ @ @

1
PAD_C6P0D2P2 PAD_C6P0D2P2 PAD_C6P0D2P2 PAD_C6P0D2P2 PAD_C6P0D2P2 PAD_C6P0D2P2 PAD_C6P0D2P2 PAD_C5P0D2P2

H16 H17 H19 H20 H21

C C
@ @ @ @ @

1
1
PAD_C7P5D2P2 PAD_CT6P0B12P0D2P2 PAD_SHAPET8P0X11P0CB6P0D2P3 PAD_SHAPET8P0X11P0CB6P0D2P3 PAD_SHAPET8P0X11P0CB6P0D2P3

H22 H23 H24 H25

@ @ @ @

1
PAD_C6P0D3P3 PAD_C6P0D3P3 PAD_C2P5 PAD_C2P5

H31 H32

@ @
1

PAD_C2P6D2P6N PAD_O2P6X3P8D2P6X3P8N

Center Zero
B B

PCB Fedical Mark PAD

FD1 FD2 FD3 FD4 FD5 FD6
1

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 XXXX
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 63 of 80
5 4 3 2 1
 WWW.AliFixit.COM
1 2 3 4 5

ON/OFF
Switch

4 ACPRN

EC Battery
5 EC_ON IT8586E/AX VDDPALW_PWRGD
Pack
7 EC_RSMRST# PBTN_OUT# 8
A 13 +1.05VS_VDDPPG PM_SLP_S5# 9 Li-ion Adapter
A

14 APUPWR_EN PM_SLP_S3# 10
RTC 15 IMVPPOK SYSON 11
B+ PLT_RST# SUSP# 12

+3VL/VL
Board to EC ACPRN
SUSP TI
EC to Board EC_ON 12d
EC_ON2 BQ24780S
1.8VS/ 2 A Battery APDIN
+5VALW Charger
SMBus
+3VALW 5e
+0.775VALW/200mA ANPEC PSYS Switch Mode
+1.8VALW APL5701 +1.8VALWP/2.6A
5b 2 B+
+1.05VALW FOR
+0.775VALWEN EC_ON
Board to EC VDDPALW_PWRGD
EC to Board EC_RSMRST# 10ms 106uS

15mS
Richtek +5VALW/8A
5a Silergy
EC to Board PBTN_OUT# SYX198CQNC
RT8068A
PWM
B Board to EC PM_SLP_S5# FOR +5VLP/ 100mA FOR B
15~17mS
VDDAPWROK PGOOD +1.8VALWPEN EC_ON SYSTEM
Board to EC PM_SLP_S3# +5V_PWRGD PGOOD EN EC_ON

EC to Board SYSON
12c TI +3VALW/8A
5a Silergy
+3VS/6A TPS22966 SYX198BQNC
EC to Board SUSP# FOR PWM
12b +5VALW to +5VS +3VL/ 100mA 3 FOR
+5VS/6A
+3VALW to +3VS SYSTEM
ON SUSP# +3V_PWRGD PGOOD EN EC_ON
+2.5V
+1.2V 12
+1.5VS/5A SYX198DQNC
+5VS ON FOR
NCP698 +1.5VS
+3VS +RTC_LDO +RTCBATT 1 +3VALW PGOOD EN 12 SUSP#
+1.8VS EC_RSMRST#
11a
CPU PBTN_OUT# +1.35V_DDR_VDDIOSUS/11A Richtek
+1.5VS PM_SLP_S5#
AMD PM_SLP_S3# 12a RT8231A
+1.05VS_VDDP CARRIZO IMVPPOK
+0.675VS/1.5A
10ms
FP4 16 FOR DDR S5 11
SYSON
APU_PWROK
17 +3VS PGOOD S3 12
SUSP#
Board to EC +1.05VS_VDDPPG PLT_RST#
C
APU_RESET# 18 C

CLK_P/N 19 TI
EC to Board APUPWR_EN +1.05VS_VDDP/10A 5d
M5938ARD1U +1.05VALWP/10A TPS51367
12e
+VDD_GFX FOR
+1.05VS_VDDP FOR
13 PGOOD EN 12 6 +1.05VALWP
PGOOD EN EC_ON
+VDDNB_CORE +1.05VS_VDDPPG
SUSP# VDDPALW_PWRGD
1mS 1mS
14c Intersil
+VDD_CORE +1.05VS_VGA +VDD_CORE/TDC 22A
1mS ISL62771HRTZ
+1.5VS_VGA TQFN40_5X5
Board to EC IMVPPOK +VDDNB_CORE/TDC 12A
GPU +1.8VS_VGA 14b PWROK APU_PWROK
99.1mS FOR CPUCORE
AMD +3VS_VGA IMVPPOK 15 PGOOD EN APUPWR_EN
APU_PWROK DGPU_PWREN
108.6mS 101.9mS
PLT_RST# Intersil
+VDD_GFX/TDC 22A ISL62771HRTZ
111.9ms 103.9mS 14a TQFN40_5X5
APU_RESET# PLT_RST_VGA# Switch Mode
114.2ms PWROK APU_PWROK
FOR VDD_GFX
PGOOD_GFX PGOOD EN APUPWR_EN
CLK_P/N
97.6ms

37.6mS Intersil
D
G3-->S0 S3-->S0 S0-->S5-->S0 +VGA_CORE/TDC 28A ISL62771HRTZ D

S0-->S3 TQFN40_5X5
Switch Mode
FOR VGA_CORE
DGPU_PWROK PGOOD EN DGPU_PWREN

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 Power Sequence

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS D 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 64 of 80
1 2 3 4 5

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5 4 3 2 1

+3VALW

PD1
CUS357

2
VSYSTEM PD2
PR4 1SS355VMTE-17 PR1 PR2 1 2
100K_0402_1% 10K_0402_1% VSYSTEM2
750_0402_1% 52,66,68 MAINPWON
1 2 2 1 1 2 1 2
@ PR53 0_0402_5% 1 2
B+

1
PD4 @ PR5

2
PD3
CUS357 1M_0402_5%
CUS357 UMA@

3
E
PQ1 PR999

2
NTJD5121NT1G
2
B PR3 0_0402_5%

6
@ PR6 D PMBT3906 750K_0402_5% 2 1

1
2 ADAPTER_ID_ON C

PQ4A
0_0402_5%

1
D G VDD_CORE VGA VDDNB D

NTJD5121NT1G
S

1
540_0402NEW _30% 540_0402NEW _30% 540_0402NEW _30%

1
PR7 D C PRT1 PRT2 PRT3
10K_0402_1% PR8 5 PQ2 2 2 1 2 1 2 1

PQ4B
ADAPTER_ID_ON# 52
1 2 1M_0402_5% G PMBT3904 B
ADP_ID 52 E DIS@
S 2

3
2
PC1

1
A/D 1U_0603_25V7K
1
1

1
1
680P_0402_50V7-K
2 1 2 1 2 1

0.1U_0402_6.3V
PD5

1
2 AZ5425-01F_DFN1006P2E2 PRT6 PRT5 PRT4

PC2

PC3

2
PR50 540_0402NEW _30% 540_0402NEW _30% 540_0402NEW _30%
300K_0402_1% Charger 1.2VS VDD_GFX

2
1 2 DCIN_ATTACHED2 52
@ PR51 0_0402_5%

2
1
PR52

0.1U_0402_25V6
PC20 53.6K_0402_1%

1
PL1 EMC@ PQ5
BLM18KG300TN1D_2P AON7409
1 2
SUYIN_125022HB008M202ZL
APDIN PF1 PL2 EMC@ VSYSTEM 1
2
8 7
8
APDIN 2
7A_32V_0437007.W R
1 1
BLM18KG300TN1D_2P
2 5
3 VSYSTEM2 RTC Battery
7 6
6 5
EMC@ EMC@ EMC@ EMC@

4
5 4

1
10
9 GND2 4 3
1000P_0402_50V7-K

BATT_CHG_LED# 52 PR21 @ PC18

GND1 3 2
100P_0402_50V8-J

100P_0402_50V8J

1000P_0402_50V7-K
PWR_STATUS_LED# 52 200K_0402_1% 0.1U_0402_25V6

2
1

2 1
1
+3VALW +RTCBATT
+3VL

2
ME@ JDCIN1 <10,50> 1 2
2

2
PC4

PC5

PC6

PC7

PD6
CUS357

1
PR24 PR20
402K_0402_1% 100K_0402_5%

PR38 20160614
2

1 2
C 82K_0402_5% C
D
1 2 2 PQ6
67 DCIN_ATTACHED1 G 2N7002W T1G_SC-70-3
S

3
1

TYPEC@
1

2PD_VBUS_C_CTRL1
PR25 PQ12
PC17 100K_0402_5% 2N7002W T1G_SC-70-3
1

0.1U_0402_25V6 D
2

2 DCIN_ATTACHED#
2

G
S
3

VSYSTEM

PQ17A TYPEC@ PR57

NTJD5121NT1G 47K_0402_1%

6 TYPEC@

1
D

1
2 TYPEC@
G PR59
S 1M_0402_5%
1

3
D

2
TYPEC@
5

NTJD5121NT1G
G

PQ17B

1
S

4
TYPEC@
PR58
100K_0402_5%

TYPEC@ TYPEC@
PQ9 PQ10
AON7409 AON7409
VCCPD_VBUS1 1 VBUS_Q_VINT20 1
B
2 2 VSYSTEM2 B

3 3

1
5 5

1
TYPEC@ TYPEC@
@ PJ2 @ PJ1 PC19 PR34
4

4
JUMP_43X79 JUMP_43X79 1 3 0.1U_0402_25V6 200K_0402_1%

2PD_VBUS_C_CTRL1
E

2
1

2 1 2 1 PQ14
2 1 2 1 20160614 TYPEC@ PMBT3906

B
PR47 2 TYPEC@
1M_0402_5%
2

40V PROPECTION
2

PQ19
@ PQ7 TYPEC@ VSYSTEM
AON6248_DFN8-5 AON7466 PR48
@ PR26 1 TYPEC@ 3 20K_0402_1% TYPEC@
0.005_1206_1% 2 2 PR54
1

1 2 5 3 5 1 TYPEC@ 47K_0402_1%
VCCPD_VBUS

NTJD5121NT1G
PR49
1

1
100K_0402_5% D D
TYPEC@

1
1

TYPEC@ 2 1 2 PQ15 2 TYPEC@

@ PQ16A
VSYSTEM
4

PC16 G 2N7002W T1G_SC-70-3 G PR56

2

1 @ PR31 4.7U_0603_25V6-M S S 1M_0402_5%

2

3
@ PC15 47_0402_5% D
TYPEC@

2
1

1
0.1U_0402_25V6
15U_B2_25V + 1 2 PR46 5
@ PC11 100K_0402_5% G

PC21

1
@ PR27 10U_0805_25V6-K S
2

4
NTJD5121NT1G

0.1U_0402_25V6
10_0402_1% 2 @ PC14 @
20160622

1
1 2 0.01U_0603_50V7-K TYPEC@

@ PC22
1

1 2 VBUS_C_CTRL0 33 PR55

@ PQ16B
1
130K_0402

2
1

@ PC12 @ PR39 TYPEC@ TYPEC@

0.47U_0402_25V6-K 100K_0402_1% PR22 PR35
1

2 TYPEC@ 0_0402_5% 100K_0402_5%

2

@ PR28 PR63 DCIN_ATTACHED# 1 2 DCIN_ATTACHED

20K_0402_1% 10M_0402_5%
VOUT
VIN

ISENSE

DRV

@ PR32
100K_0402_1% TYPEC@ TYPEC@ PD_VBUS_C_N1 20160622
2

1 8 2 1 PR23 PR37
+3VPD
1

VCNTL POK 0_0402_5% 47K_0402_1% D

1

1 2 1 2 2 TYPEC@
10 @ PU2 7 33 PD_VBUS_C_CTRL1 G PQ11 @ PR45
VINSEL OCSET S 2N7002W T1G_SC-70-3 0_0402_5%
3
1

@ PR61 @ PR60 @ PR29 9 6

2

EN DELAY
0.1U_0402_25V6

169K_0402_1% 3.9K_0402_5% 3.9K_0402_5% TYPEC@

PC23
2

PR36
GND

2
1

@ PR33 100K_0402_5%
2

27.4K_0402_1% @
2

@ PR40 @ PC13
11
1

D 100K_0402_1% 0.1U_0402_25V6 @ PR44

2

2 0_0402_5%
20160628
2

G @ PQ18 @ PR30 1 2
1

S 2N7002W T1G_SC-70-3 0_0402_5% APL3542AQBI-TRG_TDFN10_3X3

3

@ PR62 1 2 TYPEC@
A 24.3K_0402_1% +3VPD PR41 @ PR43 A
1

0_0402_5% D D 0_0402_5%
TYPEC@
DCIN_ATTACHED1 1 2 2 PQ8 @ PQ13 2 1 2
2

PD_VBUS_C_CTRL1_EC 52
2N7002WT1G_SC-70-3

2N7002WT1G_SC-70-3

G G
1

S S
3

@ PR42
100K_0402_5%
2

Security Classification LC Future Center Secret Data Title

WWW.ALISALER.COM
Issued Date 2013/08/05 Deciphered Date 2014/12/31 DCIN / VIN Detector
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 65 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

PRT7 under CPU botten side :

D D
CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C

PL3 EMC@
BLM18KG300TN1D_2P
VMB2 VMB 1 2
PF2
JBATT1 12A_32V_0501012.WRS
1 2 1 PL4 EMC@
1 2 BATT+
BLM18KG300TN1D_2P
2 3 EC_SMCA 1 2
3 4 EC_SMDA
4 5 +5VLP
5 EMC@ EMC@ +3VALW

2
6
6 +3VL
C 7 PC9 PC10 C
7

1
8 1000P_0402_50V 0.01U_0402_25V

1
GND1

47K_0402_1%
9

12.7K_0402_1%
PC8
GND2 20160719

1
PESD5V0U2BT_SOT23-3

@ PR10

@ PR11
ME@ 0.1U_0603_16V7K PR9

2
1

1
EMC_NS@
15K_0402_1%
FOX_BBP27B1-B4023-9H
PR14 PR15
PD7
100_0402_1% PU1
1

2
OTP_N_003
100_0402_1% 1 8 NTC_V_1
2

2
VCC TMSNS1
2 7 OTP_N_002 2 1

100K_0402_1%_NCP15WF104F03RC
@ PR13 GND RHYST1
52,65,68 MAINPWON 1 2 3 6 PR12
OT1 TMSNS2

1
0_0402_5% 20K_0402_1%
EC_SMB_CK1 52,67 4 5
OT2 RHYST2

PRT7
G718TM1U_SOT23-8
EC_SMB_DA1 52,67

2
PR16
100K_0402_1% 20160719
2 1
+3VALW
B B

1 2
A/D
BATT_TEMP 52,67
PR17
10K_0402_1%

A A
<Variant Name>

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/05 Deciphered Date 2014/12/31 BATTERY CONN/OTP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 66 of 80
5 4 3 2 1

WWW.ALISALER.COM
 WWW.AliFixit.COM
5 4 3 2 1

D D

PQ114
AON7380 3
2
5 1

VSYSTEM2
20160622

4
EMC@
PL102 PQ103 20160614 PQ104
1UH_PCMB053T-1R0MS_7A_20% PR101 AON7380 3 20160614 3 AON7380
PL101
0.01_1206_1% 2 2
1 2 VSYSTEM3 1 2 5 1 1 2 1 5 EMC@ EMC@
10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K
B+

2200P_0402_25V7-K
10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K
33U_D2_25VM_R40M

.01U_0402_50V7-K

1
EMC@ 2.2UH_PCMB063T-2R2MS_8A_20% EMC@

0.1U_0402_25V6-K
1
1

1
PC104

PC109

PC110

PC111

PC112

PC113

PC114

PC116

PC135
@ PC108 PR102 PC106 PC107 PR103 AON7380

4
1

5
+ 56_0402_5% 56_0402_5%
PC102

PC103

PC137

PC138
EMC@ 0.1U_0402_25V7K PQ115 0.047U_0603_25V 0.047U_0603_25V PQ106

2 2

2 2
2 1
PC136

EMC@ PC105 PQ105 AON7380

2

2
1000P_0402_50V7-K AON7380 PR106 4
2

1 2

1 2
2 4 4 2.2_0603_5% PR104
EMC@ EMC@

1
2.2_0603_5%
20160614

3
2
1
PC115 @ 1 2 PC117 PC118 PQ107

1
2
3

1
2
3
0.1U_0402_25V7K PC130 330P_0402_50V7-K 30 25 330P_0402_50V7-K AON7409

2
0.1U_0402_25V7K @ PR136 BTST1 BTST2 1
0_0603_5% LX1_CHG 32 23 LX2_CHG 2 PR110
SW1 SW2

1
3 0.01_1206_1%

2
PC119 DL1_CHG 29 26 DL2_CHG 5 1 2
@ PR108 @ PR111 1U_0603_25V7-K LODRV1 LODRV2 BATT+

2
DH1_CHG 31 24 DH2_CHG PC121

1U_0603_25V7-K
0.1U_0402_25V7K
4
HIDRV1 HIDRV2

1
C 1 2 C
0_0402_5% 0_0402_5%

0.1U_0402_25V7K
1 22

PC122
VBUS PC120

1
VBUS VSYS

1
PC131

PC132
1U_0603_25V7-K 0.1U_0402_25V7K

2
2 21 BATDRV#
ACN BATDRV#

2
3 20
ACP SRP
1 2 VDDA 7 PU101 19
BQ25700_VDD VDDA SRN PR112 10_0603_5% 1 2
PR113 BQ25700_VDD

1
10_0402_1% 6 28 1 2 PR114 10_0603_5% 1 2
PR117 PR119 40.2K_0402_1% ILIM_HIZ REGN PC124 2.2U_0603_10V7-K
255K_0402_1% 1 2 1 2 PC126 680P_0402_50V7-K
PC125 1800P_0402_50V7-K 16 17 1 2 1 2
COMP1 COMP2

1
PD101 PC123 2 1 PR120 20K_0402_1%

2
1SS355VMTE-17 1U_0603_25V7-K PC133 100P_0402_50V8-J 1 2
VR_HOT#_P 1 2 11 18 PC134 15P_0402_50V8-J
VDDA

2
PROCHOT# CELL_BATPRES

2
2 1 VR_HOT#_P @ PR121 0_0402_5%
8,52,70,71 VR_HOT#

1
PR116 1 2 13
52,66 EC_SMB_CK1 @ PR122 0_0402_5% SCL 8 1 2 PR118
220K_0402_1% ADP_I 52
1 2 12 IADPT @ PR127 0_0402_5% 33.2K_0402_1%
PD102 52,66 EC_SMB_DA1 @ PR123 0_0402_5% SDA 9 2 1

1
1SS355VMTE-17 1 2 4 IBAT @ PR129 0_0402_5%

2
52 ACPRN @ PR125 0_0402_5% CHRG_OK 10
2 1 2 1 5 PSYS
17 GPIO5_AC_BATT 52 OTG ENZ_OTG
PR126 10K_0402_1% 27
PGND

1
15 D
From EC

100P_0402_50V8-J

100P_0402_50V8-J
CMPOUT

1
33 2

2
14 PAD

PC127

PC128
@ PR132 PR135 G PQ111 PR124
CMPIN

1
0_0402_5% D 100K_0402_5% 52,66 BATT_TEMP 100K_0402_1%
S

3
1 2 2 PQ112 PR131 2N7002WT1G_SC-70-3

2
52 ACOFF G 2N7002WT1G_SC-70-3 100K_0402_1% 2 1

2
B S BQ25700RSNR_QFN32_4X4 B

3
PR128
1
20160614 1M_0402_5%
20160614

1
PR133 D
10K_0402_1% 1 2 2 PQ113
65 DCIN_ATTACHED1 @ PR134 0_0402_5% G 2N7002WT1G_SC-70-3
S
2

3
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/05 Deciphered Date 2014/12/31 CHARGER

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 67 of 80
5 4 3 2 1

WWW.ALISALER.COM
 WWW.AliFixit.COM
5 4 3 2 1

+3VALW
FSW=750 KHz
B+ @
TDC:8A
D
2
PJ201
1 EMC@ EMC@ RF_NS@ +3V_VIN 7 2 +3V_PWRGD
OCP:11A D

2 1 EN2 PG @ PR202 PC203

2200P_0402_25V7-K

1
1 0_0603_5% 0.1U_0603_25V7-M

47P_0402_50V8-J

10U_0805_25V6-K
0.1U_0402_25V6-K
+3VALW

1
JUMP_43X79 PR201 8 6 +3VBS 1 2 1 2

PC232

PC201
IN BS

PC202
1M_0402_5% PL201

PC230
2.2UH_PCMB063T-2R2MS_8A_20% PJ202
8A
EMC@ EMC@

2
2 9 10 +3VLX 1 2 +3VALW_P 2 1

2
GND LX 2 1
@ JUMP_43X118
EMC_NS@

2
3V5V_ON 1 4 +3VALW_OUT 1 2 +3VALW_P

2200P_0402_25V7-K
EN1 OUT @ PR203 0_0402_5% PR204

22U_0805_6.3V6-M

22U_0805_6.3V6-M

22U_0805_6.3V6-M

22U_0805_6.3V6-M

0.1U_0402_25V6
4.7_0603_5%
100mA 1 1 1 1

1
PR206 +3VALW_FB 3 5 1 2

PC204

PC205

PC206

PC207

PC210

PC211
2.2K_0402_1% FB LDO @ PR205 0_0402_5% +3VL

2 1
EC_ON 1 2
52 EC_ON 1 EMC_NS@

2
PC208 2 2 2 2
PU201 4.7U_0603_6.3V6-K PC209
SYX198BQNC_QFN10_3X3 680P_0402_50V7K
+3VL

1
2

1
47K_0402_1%
1

2
@ PC213
PR216

PR208
0.1U_0402_25V6-K 1M_0402_5%
47K_0402_1%
1

PR217

1
PC212 PR207

2
0.01U_0402_25V7-K 1K_0402_1%
2

D 1 2 1 2
2
2

G
3

D
S
1

52,65,66 MAINPWON 5 NTJD5121NT1G

C G C
S PQ201A
4

NTJD5121NT1G

PQ201B

+3VALW

1
@ PR209
100K_0402_5%
@ PR210
0_0402_5% +5VALW

2
+3V_PWRGD 1 2
FSW=750 KHz
B+ @ @ PR211
TDC:8A
2
PJ203
1 RF_NS@ EMC@ EMC@ +5V_VIN 8 2 +5V_PWRGD
0_0402_5%
1 2
OCP:11A
2 1 IN PG PC217
47P_0402_50V8-J

2200P_0402_25V7-K

1 0.1U_0603_25V7-M
10U_0805_25V6-K

10U_0805_25V6-K
0.1U_0402_25V6-K

+5VALW
1

JUMP_43X79 9 6 +5VBS 1 2 1 2
PC231

PC233

PC215

PC214

PC216

GND BS @ PR212 0_0603_5% PL202

PC218 2.2UH_PCMB063T-2R2MS_8A_20% PJ204
8A
EMC@ EMC@ 2
2

2 1 2+5V_VCC 5 10 +5VLX 1 2 +5VALW_P 1

VCC LX 2 1

2
1U_0603_25V6M @ JUMP_43X118
B 3V5V_ON 1 4 +5VALW_OUT 1 2+5VALW_P EMC_NS@ B

2200P_0402_25V7-K
EN OUT @ PR213 0_0402_5% PR214

22U_0805_6.3V6-M

22U_0805_6.3V6-M

22U_0805_6.3V6-M

22U_0805_6.3V6-M

22U_0805_6.3V6-M

22U_0805_6.3V6-M

0.1U_0402_25V6
4.7_0603_5%
100mA 1 1 1 1

1
+5VFB 3 7

PC219

PC220

PC221

PC222

PC223

PC224

PC227

PC228
+5VLP

1
FB LDO
1 EMC_NS@

2
2
PC225 2 2 2 2
PU202 4.7U_0603_6.3V6-K PC226
SYX198CQNC_QFN10_3X3 680P_0402_50V7K

1
2

PC229 PR215
6800P_0402_25V7-K 1K_0402_1%
1 2 1 2

6800pf soft start 2ms

47nf soft start 7ms

A A

<Variant Name>

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/08 Deciphered Date 2013/08/05 3VALW/5VALW

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 68 of 80
5 4 3 2 1

WWW.ALISALER.COM
 WWW.AliFixit.COM
A B C D

PJ301
2 1
2 1
@ JUMP_43X118

PJ302 +1.2V
+1.2VP 2 1
2 1
1
@ JUMP_43X118 1

+1.2VP PJ303
2 1
PJ304 +0.6VSP 2 1 +0.6VS
B+ EMC@ EMC@ RF_NS@ RF_NS@

1
2 1 B+_1.2V
2 1 PC301 @ JUMP_43X39

2200P_0402_25V

47P_0402_50V8-J

68P_0402_50V8J
@ JUMP_43X79 10U_0603_6.3V6M

0.1U_0402_25V6

2
10U_0805_25V6-K

10U_0805_25V6-K
1 1

1
PC302

PC304

PC307

PC305

PC306
PC303
+0.675VS
2

2
2
TDC: 1.5A

1
255K_0402_1%
PR301
100K_0402_1% +0.6VSP

+0.6VSP
PR302
1 2

+1.2VP
1.2V

10U_0603_6.3V6M

0.1U_0402_6.3V7-K
2
TDC: 12A

1
PC308

PC309
OCP: 15A

5
Fsw: 300KHz

14

11

13

19

20

2
PQ301

VTT
CS
PGND

VID

VLDOIN
AON7408L PR303 21
2.2_0603_5% PAD
4 1 2 1 2 18 1
BOOT VTTGND
PC310
0.22U_0603_25V7K DH_1.2V 17
UGATE VTTSNS
2 +0.6VSP
PL301

1
2
3
2
1UH_PCMC063T-1R0MN_11A_20% 2

PU301 3 VTTREF_0.6V
EMC@ EMC@ 1 2 LX_1.2V 16 GND
RT8231AGQW_WQFN20_3X3
+1.2VP PHASE
4 VTTREF_0.6V
EMC_NS@ VTTREF
2

PR306
2200P_0402_25V7-K

PR304 DL_1.2V 15 5.1_0603_5%

LGATE
2
470P_0402_50V7K

12 2 1
330U_D2_2V_R9M
0.1U_0402_25V6

1 4.7_0603_5% +5VALW
VDD

1
PR305

PGOOD
1
1

+
PC312

PC313

PC311

@ PC314

6.04K_0402_1% PQ302 5 1 PC315

TON
1

AON7380 VDDQ 0.033U_0402_16V7K

FB

S5

S3

2
4 PC316
2

2 2 1U_0402_10VA-K
EMC_NS@

10
2
3
2
1
2

PC317
680P_0402_50V7K

2 TON_1.2V

S5_1.2V

S3_1.2V
@ PR308
1
2

100K_0402_1%
1 2 +3VS
PR307

887K_0402_1%
10K_0402_1%
1

PR309
FB_1.2V

PR311

1
B+_1.2V @ 0_0402_5% SUSP# 52,60,78
1 2

1 2
52,77 SYSON

1
3
PR312 PC318 3

20K_0402_5% 0.1U_0402_6.3V7-K

2
1
@ PR313 PC319
47K_0402_5% 0.1U_0402_6.3V7-K

4 4

<Variant Name>

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/05 Deciphered Date 2014/12/31 +1.2V/+0.6VS

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 69 of 80
A B C D
 WWW.AliFixit.COM
5 4 3 2 1

PC401 PR402 EMC@

680P_0402_50V 2K_0402_1% PL402
1 2 1 2 BLM18KG300TN1D_2P
1 2

PL403
BLM18KG300TN1D_2P
PR403 PR404 PC402 PR405 RF_NS@ EMC@ EMC@ VIN_+VDDNB_CORE 1 2
PR401 2.05K_0402_1% 120K_0402_1% 390P_0402_50V 32.4K_0402_1% B+
100_0402_1% 1 2 1 2 1 2 1 2
EMC@

33U_D2_25VM_R40M

33U_D2_25VM_R40M

33U_D2_25VM_R40M

33U_D2_25VM_R40M
1 2
+VDDNB_CORE 1 1 1 1

2200P_0402_25V7-K
0.1U_0402_25V6
47P_0402_50V8-J

10U_0805_25V6-K

10U_0805_25V6-K
PR407 PR406 PC405 + + + +

PC413

PC414

PC403

PC531
1 20160215

1
@ 0_0402_5% 301_0402_1% 100P_0402_50V

PC406

PC407

PC408

PC411

PC412
5
1 2 1 2 1 2 1 2
8 VDDNB_SENSE 2@ 2@ 2 2
PQ401 @ @

2
D PC404 TPCA8065-H 2 D
@ PC415 1000P_0402_50V7-K
330P_0402_50V
1 2 UGATE_NB 4 +VDDNB_CORE

TDC=12A
VSUMP_NB
OCP=22A

3
2
1
1
PL401
EMC@

COMP_NB
VSEN_NB
PR408 PHASE_NB 1 4 +VDDNB_CORE
+VDDNB_CORE

FB_NB
2.61K_0402_1%

2
PQ402 2 3 1 1

11K_0402_1%

330U_D2_2VM_R9M

330U_D2_2VM_R9M

10U_0603_6.3V6M

0.1U_0402_10V6K
2 2

2
PR410 PC418 TPCA8057-H

PR409
2

2
PC417 BOOT_NB 1 2 1 2 PR411 + +

PC419

PC420

PC421

PC422
PRT401 PC416 0.047U_0402_25V7-K PGOOD_NB 4.7_0603_5% 0.36UH_PDME064TR36MS1_24A_20%
CLOSE PL401 10K_0402_NTC 0.1U_0402_25V7-K 2.2_0603_5% 0.22U_0603_25V7K
EMC_NS@

1
1 LGATE_NB 2 2

1
1 PR412 LGATE_NB 4
604_0402_1% PHASE_NB
VSUMN_NB 1 2

1
@ PR413 UGATE_NB PC425
2 100_0402_1% 680P_0402_50V7-K

3
2
1
PC423 1 2 1 2 BOOT_NB
EMC_NS@

2
0.1U_0402_25V7-K
PR414 820P_0402_50V
27.4K_0402_1% 1 @ PC424

40

39

38

37

36

35

34

33

32

31
1 2

ISUMP_NB

ISUMN_NB

VSEN_NB

FB_NB

COMP_NB

PGOOD_NB

LGATE_NB

PHASE_NB

UGATE_NB

BOOT_NB
PR415
10.7K_0402_1% PRT402
470K_0402_3% CLOSE PQ401 PR417
1 2 2 1 APU_NTC_NB 1 30 3.65K_0402_1%
NTC_NB BOOT2 VSUMP_NB 1 2
APU_IMON_NB 2 29
IMON_NB UGATE2
APU_SVC@ PR416 1 2 0_0402_5% 3 28 PR419
8 APU_SVC SVC PHASE2 1_0402_1%
@ PR418 1 2 0_0402_5% APU_VRHOT_A 4 27 @ PR421 VSUMN_NB 1 2
8,52,67,71 VR_HOT# VR_HOT_L LGATE2 0_0603_5%
1

APU_SVD@ PR420 1 2 0_0402_5% 5 26 APU_VDDP PR424 1 2

8 APU_SVD SVD VDDP +5VALW
1

C PR422 PC426 1_0603_5% C

133K_0402_1% 1000P_0402_50V @ PR423 1 2 0_0402_5% 6 PU401 25 APU_VDD 2 1 EMC@
+1.8VS VDDIO VDD PL404
ISL62771HRTZ_TQFN40_5X5
2

1
APU_SVT@ PR425 1 2 0_0402_5% 7 24 LGATE1_APU PC427 PC428 BLM18KG300TN1D_2P
8 APU_SVT
2

SVT LGATE1 1U_0402_10V 1U_0402_10V 1 2

EN_APU 8 23 PHASE1_APU

2
ENABLE PHASE1 PL405
APU_PWROK_1 9 22 UGATE1_APU BLM18KG300TN1D_2P
PWROK UGATE1 RF_NS@ EMC@ EMC@ VIN_+VDD_CORE 1 2
PC429 1 2 0.1U_0402_16V7-K 10 21 BOOT1_APU B+
IMON BOOT1
EMC@

PGOOD
PR427

2200P_0402_25V7-K
ISUMN
ISUMP

COMP
ISEN2

ISEN1

VSEN
133K_0402_1%

NTC

RTN

0.1U_0402_25V6
47P_0402_50V8-J

10U_0805_25V6-K

10U_0805_25V6-K

10U_0805_25V6-K

10U_0805_25V6-K
1 2

FB

TP
1

1
+1.8VS

PC430

PC431

PC435

PC432

PC433

PC434

PC436
+3VALW

5
11

12

13

14

15

16

17

18

19

20

41
PQ403

2
1

PR429 TPCA8065-H 2

1
27.4K_0402_1%
@ PR428 1 2 PR430 +VDD_CORE
1.91K_0402_1% 10K_0402_1% UGATE1_APU 4

APU_COMP
APU_VSEN
PR431

APU_FB
TDC=22A

APU_RTN
2

@ 0_0402_5% 2 1

2
1 2 APU_PWROK_1
8 APU_PWROK APU_PWROK_1 71
PRT403 CLOSE PQ403
PR432
@ 0_0402_5%
OCP=43A

3
2
1
1

+5VALW 470K_0402_3% PGOOD_APU 1 2

IMVPPOK 52
PL406
PR433 PR435
10.7K_0402_1% @ 0_0402_5% PHASE1_APU 1 4 EMC@
+VDD_CORE
2

PGOOD_NB 1 2
2

@ PR434 PQ404 PQ405 2 3 1 1 1

10U_0603_6.3V6M

0.1U_0402_10V6K
470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M
5

2
0_0402_5% PR436 PC437 TPCA8057-H TPCA8057-H

2
PR504 BOOT1_APU 1 2 1 2 PR437 + + +

PC457

PC438

PC439

PC440

PC441
+1.8VS @ 0_0402_5% 4.7_0603_5% 0.36UH_PCMC104T-R36MN1R105_20%
1

1 2 2.2_0603_5% 0.22U_0603_25V7K
71 PGOOD_GFX EMC_NS@

1
APU_ISEN2 2 2 @ 2

1
LGATE1_APU 4 4

APU_ISEN1
1

1
@ PR438 @ PR439 PC442

3
2
1

3
2
1
1

1K_0402_1% 1K_0402_1% 680P_0402_50V7-K

B PR441 B
EMC_NS@

2
10K_0402_1%
2

PC443 PR442 PC444 @ PR443

330P_0402_50V
2

1000P_0402_50V7-K 301_0402_1% 100P_0402_50V 32.4K_0402_1%

APU_SVC 1 2 1 2 1 2 2 1
VSUM+_VDD
APU_SVD
2

PR445 PR446 PC446

PR444 1.65K_0402_1% 120K_0402_1%390P_0402_50V
0.047U_0402_25V7-K

2.61K_0402_1% 1 2 1 2 1 2
2

PR450
PC445
2

PC448 3.65K_0402_1%
PC447
11K_0402_1%
1
1

0.1U_0402_25V6 PR451 PC449 VSUM+_VDD 1 2

PR449

@ PR447 @ PR448 CLOSE PL406 @ 2K_0402_1% 680P_0402_50V

2

2
2

220_0402_5% 220_0402_5% 1 2 2 1
PRT404 PR453
1

10K_0402_NTC PR455 1_0402_1%

2

PR454 100_0402_1% VSUM-_VDD 1 2

698_0402_1% 1 2
+VDD_CORE
1

VSUM-_VDD 1 2APU_ISUMN
PR456
2 @ 0_0402_5%
PC450 @ PC451 1 2
0.1U_0402_25V7-K @ PR457 820P_0402_50V VDD_SENSE 8
PRE-PWROK METAL VID CODES 100_0402_1%
1 1 2 1 2 PR458
@ 0_0402_5%
SVC SVD Boot Voltage 1 2
VSS_SENSE 8
PR459
0 0 1.1V
1

PC452 100_0402_1%
0.01U_0402_25V 1 2
0 1 1.0V(Default) PR460
2

47K_0402_1%
1 0 0.9V 1 2
52,71 APUPWR_EN
1 1 0.8V
1 2 EN_APU
76 VDDAPWROK
@ PR461
10K_0402_1%
1

A PC453 A
0.1U_0402_10V7-K
2

<Variant Name>

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/15 Deciphered Date 2013/08/15 VCORE/VDDNB

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 70 of 80
5 4 3 2 1

WWW.ALISALER.COM
 WWW.AliFixit.COM
5 4 3 2 1

EMC@
PL407
BLM18KG300TN1D_2P
GFX_B+ 1 2

PL408
BLM18KG300TN1D_2P
+1.8VS EMC@ EMC@ 1 2
B+
EMC@

2200P_0402_25V7-K
10U_0805_25V6-K
10U_0805_25V6-K

10U_0805_25V6-K

10U_0805_25V6-K

0.1U_0402_25V6-K
1

1
PC490
1 1

PC454
1

1
D D

PC497

PC498

PC455

PC456
1

2
5
@ PR467 @ PR500

2
1K_0402_1% 1K_0402_1% 2 2

1
@ PR463 PR462 PR464 PR465 +VDD_GFX
2

2
0_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
APU_GFX_SVC GFX_UGATE1 4 PQ406
TPCA8065-H TDC =22A

2
APU_GFX_SVD
OCP =43A
PR466
PL409

3
2
1
@ 0_0402_5%
1

1 2 GFX_PHASE1 1 4
@ PR481 @ PR479 +VDD_GFX
220_0402_5% 220_0402_5% PQ408 2 3

2
PR468 PC459 TPCA8057-H

40

39

38

37

36

35

34

33

32

31
GFX_BOOT1 1 2 1 2 PR469
2

4.7_0603_5% 0.36UH_PCMC104T-R36MN1R105_20%

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M
ISUMP_NB

ISUMN_NB

VSEN_NB

FB_NB

COMP_NB

PGOOD_NB

LGATE_NB

PHASE_NB

UGATE_NB

BOOT_NB

1
2.2_0603_5% 0.22U_0603_25V7K PQ407
EMC_NS@ 1 1 1

1
TPCA8057-H PR471

1
GFX_LGATE1 4 4 + + +

PC461

PC460

PC478
PR472 PR470 10_0402_1%
1 2 100K_0402_1%1 30 3.65K_0402_1%
NTC_NB BOOT2
PR473

PU402_VSUM-2
PU402_VSUM+
1 2 100K_0402_1%2 29 2 @ 2 2

2
IMON_NB UGATE2

1
PC462

3
2
1

3
2
1
PR474 APU_GFX_SVC @ PR501 1 2 0_0402_5% 3 28 680P_0402_50V7-K
8
@ 0_0402_5% APU_GFX_SVC SVC PHASE2
EMC_NS@

2
1 2 GFX_VRHOT_L 4 27 @ PR475
8,52,67,70 VR_HOT# VR_HOT_L LGATE2 0_0603_5%
APU_GFX_SVD @ PR502 1 2 0_0402_5% 5 PU402 26 GFX_VDDP 1 2
8 APU_GFX_SVD SVD VDDP
PR476
+5VALW
6 25 GFX_VDD 1 2
+1.8VS VDDIO ISL62771HRTZ_TQFN40_5X5 VDD
PR477 APU_GFX_SVT @ PR503 1 2 0_0402_5% 7 24 GFX_LGATE1 1_0603_5%
8 APU_GFX_SVT SVT LGATE1

1
110K_0402_1%
1 2 8 23 GFX_PHASE1 PC463 PC464
C
52,70 APUPWR_EN ENABLE PHASE1 1U_0402_10V6-K 1U_0402_10V6-K C

2
@ PR478 1 2 0_0402_5% 9 22 GFX_UGATE1
70 APU_PWROK_1 PWROK UGATE1
1

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
1 2 PC465 2 1 GFX_IMON 10 21 GFX_BOOT1
0.1U_0402_10V6-K PR482 133K_0402_1% IMON BOOT1
2

1
PGOOD

PC467

PC468

PC469

PC470

PC471

PC472

PC473

PC474

PC475

PC476

PC477
@ PD401

ISUMN
ISUMP

COMP
ISEN2

ISEN1

VSEN
CUS357 2 1

NTC

RTN
PC466 1000P_0402_50V7-K

FB

TP

2
@ @

11

12

13

14

15

16

17

18

19

20

41
1

D
2
10 VDDGFX_PD G
PGOOD_GFX 70
@ PQ409 S PR490
3

2N7002W T1G_SC-70-3 93.1K_0402_1%

1 2 GFXNTC

GFX_NTC_1
PRT405
470K_0402_3%
2 1
1

CLOSE to PQ406
PR496
10.5K_0402_1%
2

+5VALW PR483
@ 0_0402_5% GFX_COMP
1 2

1 2
PC480 GFX_FB
B B
PR484 0.1U_0402_25V6-K
10K_0402_5% 1 2 PC481 PR485 PC482 @ PR486
PR487 1000P_0402_25V7-K 499_0402_1% 47P_0402_50V8-J 32.4K_0402_1%
649_0402_1% 1 2GFX_FB_2 1 2 1 2 1 2
PU402_VSUM- 1 2
1

PR491 PR493
PR488 PR489 @ PR492 1.5K_0402_1% 54.9K_0402_1%
2.61K_0402_1% 3.9_0402_1% 10K_0402_5% @ PC484 1 2 1 2GFX_FB_1 1 2
330P_0402_50V8-J
1

1 2 1 2
1
PC485

PR494
2

11K_0402_1% 0.22U_0402_10V6-K PC483

0.047U_0402_25V7-K

1
150P_0402_50V8-J
2
2

1 @ PR495
2

2
PC486

PRT406 PC487 2K_0402_1%

10K_0402_NTC 0.1U_0402_25V6-K
CLOSE to PL409
1

2
2 GFX_FB_3
1

PU402_VSUM+

PR497
1

100_0402_1% @ PC488
1 2 680P_0402_50V7-K
+VDD_GFX
2

PR498
@ 0_0402_5%
1 2
8 VDDCR_GFX_SENSE
1

PC489
330P_0402_50V8-J
2

8 GFX_VSS_SENSE
A A

PR505
100_0402_1%
1 2

<Variant Name>

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/08 Deciphered Date 2013/08/05 PWR-VGA_CORE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 71 of 80
5 4 3 2 1

WWW.ALISALER.COM
 WWW.AliFixit.COM
5 4 3 2 1

D D
+VDDNB_CORE

1
PC491 PC492 PC493 PC494 @ PC495 @ PC496
22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M

2
C C

+VDD_CORE
1

1
PC503 PC504 PC505 PC506 @ PC507 @ PC509
22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M
2

2
1

1
PC508 PC510 PC511 PC512 PC513
22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M
2

2
B B

A A

<Variant Name>

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/01 Deciphered Date 2014/08/01 VCCCPUCORE DECOUPLING
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 72 of 80
5 4 3 2 1

WWW.ALISALER.COM
 A
B
C
D

5
5

@
@

PC524 PC514

@
PC534 22U_0603_6.3V6-M 22U_0603_6.3V6-M
22U_0603_6.3V6-M 2 1 2 1
2 1

@
@

PC525 PC515

@
PC535 22U_0603_6.3V6-M 22U_0603_6.3V6-M
22U_0603_6.3V6-M 2 1 2 1
2 1
@
@

PC526 PC516

@
PC536 22U_0603_6.3V6-M 22U_0603_6.3V6-M
22U_0603_6.3V6-M 2 1 2 1
2 1
@
@

PC527 PC517

@
PC537 22U_0603_6.3V6-M 22U_0603_6.3V6-M
22U_0603_6.3V6-M 2 1 2 1
2 1
@
@

PC528 PC518

@
PC538 22U_0603_6.3V6-M 22U_0603_6.3V6-M
22U_0603_6.3V6-M 2 1 2 1
2 1
@

PC519
@

PC529 22U_0603_6.3V6-M
@ PC539 22U_0603_6.3V6-M 2 1
22U_0603_6.3V6-M 2 1
@

2 1 PC520

4
4

PC552 22U_0603_6.3V6-M
@

PC540 22U_0603_6.3V6-M 2 1

WWW.ALISALER.COM
22U_0603_6.3V6-M 2 1
@

2 1 PC521
@

PC553 22U_0603_6.3V6-M
@

PC541 22U_0603_6.3V6-M 2 1
22U_0603_6.3V6-M 2 1
@

2 1 PC522
@

PC554 22U_0603_6.3V6-M
@

PC542 22U_0603_6.3V6-M 2 1
22U_0603_6.3V6-M 2 1
@

2 1 PC523
@

PC533 22U_0603_6.3V6-M
@

PC543 22U_0603_6.3V6-M 2 1
22U_0603_6.3V6-M 2 1

<Variant Name>
2 1
+

Issued Date
2
1

+
2
1

560U 2V M D2 LESR3M
2
1

560U 2V M D2 LESR3M PC544

@

Security Classification
560U 2V M D2 LESR3M PC546
@
+

PC548
@
+
+
2
1

2
1
2
1

560U 2V M D2 LESR3M
560U 2V M D2 LESR3M 560U 2V M D2 LESR3M PC545
PC549 PC547
@@

@
@

PC550
2
1
+

PC551
220U_B3_2.5VM_R35M
2
1
+

3
3

220U_B3_2.5VM_R35M

2013/08/01
+VDDNB_CORE
+VDD_CORE

+VDD_GFX

Deciphered Date
LC Future Center Secret Data

2
2

2014/08/01

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
B
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size

Date:
Title

Document Number

Monday, August 01, 2016

VCCCPUCORE DECOUPLING

1
1

Sheet
73
of
80
Rev
1.0
WWW.AliFixit.COM

A
B
C
D
 WWW.AliFixit.COM
5 4 3 2 1

ISL62771 Schematic for FT3 solution DIS_EMC@

PL601
+5VALW +5VALW BLM18KG300TN1D_2P
1 2
+VGA_B+

2
@ PR601 @ PR602 DIS_RF_NS@ DIS_EMC@ DIS_EMC@ PL602 B+
PR603 0_0603_5% 0_0603_5% BLM18KG300TN1D_2P

2200P_0402_50V7K
DIS@ 27K_0402_1% 1 2

5
10,23 DGPU_PW REN 1 2

10U_0805_25V6K

10U_0805_25V6K
47P_0402_50V8-J

0.1U_0402_25V6
1

1
PC602
VDD_62771
DIS_EMC@

PC603
1

1
PC606

PC611

PC607
PC601

2
1

1
+3VS_VGA 0.1U_0402_25V6 PC604 PC605 2
DIS@ 1U_0402_10V 1U_0402_10V VGA_UGATE1 4 DIS@ PQ601

2
D TPCA8065-H D

DIS@

DIS@
2
+VGA_CORE

25

26
PR604 DIS@ DIS@ 0.36UH_PDME064TR36MS1_24A_20%

3
2
1
10K_0402_1% DIS@

VDDP
VDD
PL603
DIS@
VGA_PHASE1 1 4

1
PR605 8
@ 0_0402_5% ENABLE 2 3
1 2 PG_VDD 20 @ PR614 DIS@ PC612 DIS_EMC_NS@
10 DGPU_PW ROK
35 PGOOD 0_0603_5% 0.22U_0603_25V DIS@ PQ602 @ PQ603 PR607 DIS@ PR608 DIS_EMC@

2
PGOOD_NB 21 1 2 1 2 TPCA8057-H TPCA8057-H 4.7_0603_5% 3.65K_0402_1%

330U_D2_2VM_R9M

330U_D2_2VM_R9M

0.1U_0402_25V6
16 PLT_RST_VGA# BOOT1

5
@ PR606 1 2 0_0402_5% 9 VSUM+ 1 2 1 1
@ PR609 1 2 0_0402_5% 3 PWROK
17 SVI2_SVC SVC

1
@ PR615 1 2 5 22 + +

PC613

PC614

PC615
0_0402_5%
17 SVI2_SVD SVD UGATE1
PR612 1 @ PR611 1 2 0_0402_5% 7 ISEN1 1 2
T96

1
@ 0_0402_5% @ PR610 1 2 0_0402_5% 4 SVT
52 GPU_VR_HOT# DIS_EMC_NS@

2
1 2 6 VR_HOT_L 23 4 4 DIS@ PR616 2 2
+3VS_VGA VDDIO PHASE1

DIS@

DIS@
PC616 10K_0402_1%

2
1 2 DIS@ PC609 680P_0402_50V DIS@ PC608
DIS@ PR613 100P_0402_50V8-J 24 VGA_LGATE1 0.22U_0603_25V

2
42.2K_0402_1% LGATE1

3
2
1

3
2
1

1
DIS@ PR617 1 2 1 2 19 @ PR620 DIS@ PC618 DIS@ PR618
+VGA_CORE DIS@ PC617 499_0402_1% COMP 0_0603_5% 0.22U_0603_25V7-K 1_0402_1%
18 VDDC_SEN 1
470P_0402_50V 2 1 2 DIS@ PC610 30 1 2 1 2 VSUM- 1 2
1 2 150P_0402_50V8-J BOOT2
1

@ PR619
2

DIS@ PR622 1 2 32.4K_0402_1% 18 29

@ PR621 10_0402_1% @ PC620 FB UGATE2
1

DIS@ PR623 1 2 1 2 680P_0402_50V7-K

0_0402_5% DIS@ PC619 715_0402_1% 28
2

330P_0402_50V7-K @ PR624 PHASE2 +VGA_B+

1

2.7K_0402_1% 16
VSEN DIS_RF_NS@ DIS_EMC@ DIS_EMC@
1

27
DIS@ PC621 LGATE2
330P_0402_50V7-K 17 DIS@ PU601
2
2

RTN

2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6
5
@ PR625 DIS@ PC622 ISL62771HRTZ_TQFN40_5X5
1000P_0402_25V7-K

47P_0402_50V8-J
1
2

1
PC623

PC625

DIS@ PC626

DIS@ PC627
0_0402_5% DIS@ PR626

PC624
10_0402_1%
1

36 31 VDD_62771

2
C COMP_NB BOOT_NB VGA_UGATE2 4 DIS@ PQ604 2 C
18 VDDC_RTN @ PR627 TPCA8065-H
10K_0402_5% 32 DIS@ PR628
UGATE_NB 10K_0402_1% +VGA_CORE
1 2 37 DIS@

3
2
1
FB_NB 33 1 2 0.36UH_PDME064TR36MS1_24A_20%
PHASE_NB
PL604
34 1 2 VGA_PHASE2 1 4 DIS_EMC@ DIS_EMC@
38 LGATE_NB
VSEN_NB DIS@ PR629 2 3
10K_0402_1% DIS@ PQ605 @ PQ606 DIS_EMC_NS@ DIS@ PR631

2
VGA_LGATE2 TPCA8057-H TPCA8057-H PR630 3.65K_0402_1%

5
4.7_0603_5% VSUM+ 1 2
VSUM+ 14 13 ISEN1

330U_D2_2VM_R9M

330U_D2_2VM_R9M

0.1U_0402_25V6
ISUMP ISEN1
+VGA_CORE

2200P_0402_25V7-K
1 1
12 ISEN2 ISEN2 1 2

1
ISEN2

1
15 + + TDC: 28A

DIS@ PC629

DIS@ PC630

PC631

PC638
DIS@ PR634
ISUMN
1

11K_0402_1% 4 4 DIS@ PR632

DIS_EMC_NS@ EDC: 42A

1
10K_0402_1%

2
2
2 2
DIS@ PR633
2.61K_0402_1% 40
PC632
680P_0402_50V7K DIS@ PC628
OCP: 46A
Fsw: 300KHz

2
DIS@ PC634 ISUMP_NB 0.22U_0603_25V
2

3
2
1

3
2
1

1
82N_0402_50V DIS@ PR636
1 39 1_0402_1%
ISUMN_NB
1

@ PC635 DIS@ PR638 VSUM- 1 2

330P_0402_50V 100K_0402_1%
2

1 1 2
2

DIS@ PC633 2 @ PR637 NTC_NB 11

0.1U_0402_25V7K DIS@ PR635 0_0402_5% NTC
1
1

DIS@ PRT601 560_0402_1% 10

10K_0402_NTC IMON 2
1

IMON_NB
CLOSE to PL603
TP

@ PR639
100_0402_1% DIS@ PR641
2

41

27.4K_0402_1%

1
CLOSE to PQ601
1

VSUM- DIS@ PRT602

2

470K_0402NEW _3%
2

DIS@ PR640 2

2
PC637 DIS@ 100K_0402_1%
1

B DIS@ PC636 DIS@ PR642 B

0.1U_0402_25V6
1

BOTTOM PAD 0.1U_0402_25V 130K_0402

CONNECT TO GND
Through 8 VIAs
1

DIS@ PR643
10.7K_0402_1%
2

A A

<Variant Name>

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/05 Deciphered Date 2014/12/31 +VGA_CORE

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 74 of 80
5 4 3 2 1
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5 4 3 2 1

D D

PR701
54.9K_0402_1%
1 2
52,61,76 EC_ON2

0.1U_0402_6.3V7-K
1

1
PC701

2
0.1U_0402_16V7-K PR702

PC702
196K_0402_1% +3VALW

2
PR704

1
100K_0402_1%

24

25

26

27

28

29
PR703

1
220K_0402_1%

REFIN2

GND2
REFIN

EN
RA
VREF
+1.05VALWP

2
+5VALW 23 1 VDDPALW _PW RGD
GSNS PGOOD VDDPALW _PW RGD 52 FSW=800KHz
C
PC703
22
VSNS LP#
2 @ PR705
0_0402_5%
TDC:10A C

@ PR706
0_0402_5%
2 1 21
SLEW MODE
3 1 2 OCP:16A
1 2 0.01U_0402_25V7-K20 4 @ PR707 PC704
TRIP NC 0_0603_5% 0.1U_0603_25V7K
PC705 19 PU701 5 BST_1.05VS
1 2 1 2 PL701
2.2U_0603_10V6-K GND1 BST 1UH_PCMC063T-1R0MN_11A_20% +1.05VALWP
1 2 18 6 SW _1.05VS
TPS51367RVER_QFN28_3P5X4P5 1 2 EMC@ EMC@
PJ701 V5 SW1
2 1 RF_NS@ EMC@ EMC@ VIN_1.05VS 17 7
B+ 2 1 VIN3 SW2

2
68P_0402_50V8J

10U_0805_25V6-K

10U_0805_25V6-K

2200P_0402_25V7-K

0.1U_0402_25V6

@ JUMP_43X79 16 8 PR708

2200P_0402_25V7-K
VIN2 SW3
1

1@ 4.7_0603_5%
PC706

PC707

PC708

PC709

PC710

22U_0805_6.3V6-M

22U_0805_6.3V6-M

22U_0805_6.3V6-M

22U_0805_6.3V6-M

0.1U_0402_25V6
PC714 15 9
VIN1 SW4 EMC_NS@

1
47P_0402_50V8-J

PC716

PC717
PGND5

PGND4

PGND3

PGND2

PGND1
1 1 1 1
2

PC711

PC712

PC713

PC715
2

2
2 2 2 2

14

13

12

11

10

1
PC718
680P_0402_50V7K
EMC_NS@

2
B B

Mode Frequency PJ702

2 1
2 1
@ JUMP_43X118
GND 400KHz
PJ703
2 1
+1.05VALWP 2 1 +1.05VALW_VDDP
Float 800KHz @ JUMP_43X118

A A

<Variant Name>

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/01 Deciphered Date 2014/08/01 +1.05VALW_VDDP

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 75 of 80
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

+3VALW

1
PR821
100K_0402_1%
+1.8VALW
70 VDDAPWROK @ PR822 TDC: 2.6A
0_0402_5%
Fsw: 1MHz

2
1 2

PL801
@ PJ801 1UH_PH041H-1R0MS_3.8A_20%

4
JUMP_43X39
2 1 VIN_+1.8VSP 10 1 1.8VSP_LX 1 2
+5VALW

PG
2 1 PVIN2 LX1 +1.8VSP

2
9 2
PVIN1 LX2

1
C
PR803 C

1
PC801 PC802 8 3 4.7_0603_5%
10U_0603_10V 10U_0603_10V SVIN1 LX3 EMC_NS@ PR804 PC805
EMC@ EMC@

2
PU801 20K_0402_1% 22P_0402_50V

2 1

2200P_0402_25V7-K
22U_0805_6.3VAM

22U_0805_6.3VAM

0.1U_0402_25V6
RT8068AZQW_WDFN10_3X3

PC842
5 6 PC804

GND
EN FB

PC806

PC807

PC808
PR801

NC
33K_0402_1% EMC_NS@ 680P_0402_50V

2
1 2 EN_1.8VSP

11

7
52,61,75 EC_ON2

2
1 2

1
@ PR802 PC803

1
1M_0402_5% 0.1U_0402_10V
@ PD801

2
CUS357 PR805

1
10K_0402_1%

2
B B

PJ802
+1.8VSP 2 1 +1.8VALW
2 1

@ JUMP_43X39

A A

<Variant Name>

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/05 Deciphered Date 2014/12/31 +1.8VALW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 76 of 80
5 4 3 2 1

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 WWW.AliFixit.COM
5 4 3 2 1

PJ804
D +2.5VSP 2 1 +2.5VALW D
2 1

@ JUMP_43X39

+2.5VALW
@ PJ803 PL802 TDC: 2A
JUMP_43X39 1UH_PH041H-1R0MS_3.8A_20%
Fsw: 1MHz

4
2 1 VIN_+2.5VSP 10 1 2.5VSP_LX 1 2
+5VALW

PG
2 1 PVIN2 LX1 +2.5VSP

2
9 2
PVIN1 LX2

1
PR808
PC809 PC810 8 3 4.7_0603_5%
C 10U_0603_10V 10U_0603_10V SVIN1 LX3 EMC_NS@ PR809 C
EMC@ EMC@

2
PU802 31.6K_0402_1%

2 1

2200P_0402_25V7-K
22U_0805_6.3VAM

22U_0805_6.3VAM

0.1U_0402_25V6
RT8068AZQW_WDFN10_3X3

1
5 6 PC812 PC813

GND
EN FB

PC814

PC815

PC816

PC843
22P_0402_50V

NC
EMC_NS@

2
52,69 SYSON 680P_0402_50V

2
1 2 EN_2.5VSP

11

7
@ PR806 0_0402_5%

1
@ PR807 @ PC811
1M_0402_5% 0.22U_0402_10V6-K

2
PR810

1
10K_0402_1%

2
B B

A A
Security Classification LC Future Center Secret Data Title
Issued Date 2013/08/05 Deciphered Date 2014/12/31 +2.5VSP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 77 of 80
5 4 3 2 1

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 WWW.AliFixit.COM
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PR811
33K_0402_1%
1 2
52,60,69 SUSP#

2
D D

1
PR812 PC817 +1.5VSP PJ14 +1.5VS
1M_0402_5% 0.1U_0402_16V7-K 2 1
2 1

2
@ JUMP_43X79

1
+1.5VSP
FSW=800KHz
PJ13 PU803 TDC:5A
2 1 EMC@ EMC@ 8 1 @ PR813 PC822 OCP:8A
B+ 2 1 IN EN 0_0603_5% 0.1U_0603_25V7K

2200P_0402_25V7-K
@ JUMP_43X79 6 BS_1.5VSP 1 2 1 2 PL803

SYX198DQNC_QFN10_3X3
BS
1

1
10U_0805_25V6-K

PC819
0.1U_0402_25V6
0.68UH_PCMB063T-R68MS_+-20%
SW_1.5VSP EMC@ EMC@ +1.5VSP
PC818

PC844
9 10 1 2
GND LX
2

2
4 FB_1.5VSP
3 FB
C ILMT +3VALW EMC_NS@ C

2
7
BYP PR820
4.7_0603_5%

2200P_0402_25V7-K
22U_0805_6.3V6-M

22U_0805_6.3V6-M

22U_0805_6.3V6-M

22U_0805_6.3V6-M

0.1U_0402_25V6
2 1 1 1 1
PG

1
PC829

PC830
5

1
LDO

PC825

PC826

PC827

PC828
PC821
4.7U_0402_6.3V6-M
+3VALW

2
1
2 2 2 2

2
EMC_NS@

1
PC820
4.7U_0402_6.3V6-M
2
PC823
680P_0402_50V7K

2
@ PR814
0_0402_5%
1 2

1
PC824

1
330P_0402_50V7-K
2 1 PR818

2
30.9K_0402_1%
PR815
100K_0402_5%

2
2

2
@ PR816 PR817
B 0_0402_5% 1K_0402_1% B
1

2
PR819
20K_0402_1%

1
A A

<Variant Name>

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/01 Deciphered Date 2014/08/01 +1.5VS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 78 of 80
5 4 3 2 1

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 WWW.AliFixit.COM
5 4 3 2 1

B+
+5VLP/ 100mA Richtek
Silergy RT8068A
SYX198CQNC
+5VALW/8A +1.8VALWP/2.6A
PWM FOR +1.8VALWP
EC_ON EN PGOOD EC_ON EN PGOOD VDDAPWROK
FOR SYSTEM +3VALW

D D

DCIN Adapter +3VL/ 100mA

Silergy Richtek
SYX198BQNC RT8068A
+3VALW/8A +2.5VSP/1A
PWM FOR +2.5VALWP
EC_ON EN PGOOD +3VALW
FOR SYSTEM SYSON EN PGOOD empty

Richtek +1.2VP/6.5A

Powewr Dual RT8231A

SYSON S5
Switch Circuit SUSP# S3 +0.6VSP/1.5A
TI FOR DDR PGOOD +3VS
BQ25700RSNR
Battery Charger Intersil +VDD_CORE/TDC 22A
C
Switch Mode ISL62771HRTZ C

TQFN40_5X5
FOR CPUCORE +VDDNB_CORE/TDC 12A
APUPWR_EN EN PGOOD
PGOOD_NB IMVPPOK
Typec
SMBus
Intersil
ISL62771HRTZ
TQFN40_5X5 +VGA_CORE/TDC 22A
Batt. MOSFET Switch Mode
APUPWR_EN EN FOR VDD_GFX
PGOOD PGOOD_GFX

TI
TPS51367
+1.05VALWP/10A
B
FOR +1.05VALWP B
S5_EN EN
Battery PGOOD VDDPALW_PWRGD

Silergy +1.5VSP/1.5A
SYX198D
SUSP# EN

FOR 1.5V PGOOD +3VALW

A A

<Variant Name>

Security Classification LC Future Center Secret Data Title

Issued Date Deciphered Date Block Diagram

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. NM-A871
Date: Monday, August 01, 2016 Sheet 79 of 80

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5 4 3 2 1
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5 4 3 2 1

D D

C C

B B

A A

<Variant Name>

Security Classification LC Future Center Secret Data Title

Issued Date 2015/10/5 Deciphered Date 2016/10/31 XXXX
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, August 01, 2016 Sheet 80 of 80
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