LOGICAL & PHYSICAL ADDRESSES (cont…)

BASE OFFSET ADDRESSING

• Problem1
There is a Base / Relocation register, whose contents are added to
every address generated by a user process at the time it is sent to
memory. Draw its pictorial representation.

• Problem 2
In i8086, the logical address (16 bits) of the next instruction is
specified by the value of IP register. The physical address of the
instruction is computed by shifting the CS register (16 bits) left by
four bits and adding contents of IP to it, thus generating a physical
address of 20 bits. Draw its pictorial representation.

Problem 3
In i8086, the contents of IP register is ox0B10 and contents of Code
Segment contains oxD000. Compute the Physical address and also give
the size of Logical and Physical address space

SWAPPING:

Problem 4. Consider a process of size 1 MB. Disk to memory

Placement Algorithms (Best Fit,First Fit,Next Fit):

Problem 5
– Show how the available memory of 810 KB will accommodate following
job sequence with all the four placement algorithms.
– Job Sequence:
J1 (90K),J2 (45K), J3 (180K), J4 (90K), J5 (135K), J6 (180K), J3
terminates,J5 terminates, J7 (135K), J8 (180K), J7 AND J8
TERMINATE, J9(285K).

Problem 6
– Show how the available memory of 2560 KB will accommodate following
job sequence with all the four placement algorithms. OS Kernel takes
400 KB.
– Job Sequence:
– P1 (600K), P2 (1000K), P3 (300K), P2 terminates, P4 (700K), P5 (500K).
– Draw the pictorial representation using MVT

BUDDY SYSTEM:

Problem 8
– Show how the available memory of 1MB will be allocated using Buddy
Memory Allocation scheme.
– (P1:100K);(P2:240K);(P3:64 K); (P4:256 K). P2 terminates. P1
terminates. (P5:75K). P3 terminates. P4 terminates. P5 terminates

Problem 9
– Consider a swapping system in which memory consists of the
following hole sizes in memory order: 10, 4, 20, 18, 7, 9, 12 and 5 KBs
– Which hole is taken for successive segment requests of
a.12 KB
b.10 KB
c.9 KB
– for First Fit?
– Repeat the question for Best Fit, Worst Fit and Next Fit

Problem 10
A swapping system eliminates empty slots by compaction. Assuming a
random distribution of many empty slots and many data segments. Time to
read or write a 32 bit memory word of is 10 nsec. How long does it take to
compact 128 MB? For simplicity, assume that word 0 is part of an empty
slot and that the highest word in memory contains valid data

Problem 11
Given five memory partitions of 100, 500, 200, 300 and 600 KB (in order).
How would each of the First Fit, Best Fit and Worst Fit algorithms place
processes of 212 Kb, 417 Kb, 112 KB, and 426 KB (in order)? Which
algorithm makes the most efficient use of memory?

PAGING:

Problem 12
• Consider a logical address space of 16 pages each of 1024 words (each word of 2
Bytes) mapped into a physical memory of 32 frames
• Give the Logical and Physical address format
• Also give the total Logical and Physical address space
• Compute the required page table size for this situation.

Problem 13
• A system has 48 bit L.A & a main memory of 64 GBs. Page size is 4096 bytes.
Compute the number of pages and frames that exist in the system. Also give L.A &
P.A format.

Problem 14
• Consider a system with
– L.A = 32 bits ; Page Size = 4 K ; Main memory = 512 MB.
• Compute the total process address space and maximum number of pages in a process
address space. Also give the logical and physical address format. Also give the
page
table size for this situation.
Ans:
Logical address = 32-bit
ƒ Process address space = 2^32 B
= 4 GB
ƒ Main memory = RAM = 512 MB
ƒ Page size = 4K
ƒ Maximum pages in a process address space = 2^32 / 4K
= 1M

Problem 15
• Consider a LA space of 8 pages of 1024 words mapped into memory of 32 frames.
– How many bits are there in the LA?
– How many bits are there in PA?

Problem 16
• For each of the following logical addresses (given in decimal) compute the
page number and offset within the page; if the page size is 4 KB
– 20000
– 32768
– 60000
• Repeat for an 8 KB page
Problem 17
• A machine has a 32 bit address space and an 8 KB page. The page table is
entirely in hardware, with one 32 bit word per entry. When a process
starts the page table is copied to the hardware from memory at one
word every 100 nsec. If each process runs for 100 msec (including the
time to load the page table), what fraction of the CPU time is devoted to
loading the page tables?

Problem 18
• A machine has a 48 bit virtual addresses and 32 bit physical addresses.
Pages are 8 KB. How many entries are needed for the page table?

Problem 19
• Consider a system with memory access time of 100 nsec. Page table is implemented
using
associative memory. The TLB access time is 20 ns. Hit ratio is 80%. Calculate the
Effective memory access time. Calculate the Effective memory access time if there
is no
TLB, i.e. the entire page table is kept in memory.

Problem 20
• Repeat above example with a hit ratio of 95% and compare

Problem 21
Consider a paging system with the page table stored in memory.
a. If a memory reference takes 200 nanoseconds, how long does a paged memory
reference
take?
b. If we add associative registers, and 75 percent of all page-table references are
found in
the associative registers, what is the effective memory reference time? (Assume
that
finding a page-table entry in the associative registers takes zero time, if the
entry is
there.)

Problem 22
• Consider a system with 80% hit ratio, 50 nsec time to search the associative
registers,
750 nsec time to access main memory. Find the time to access a page:
a. When the page number is found in associative memory
b. When the page number is not found in associative memory
c. Find the effective memory access time

Problem 23
• A computer with a 32 bit address uses a two level page table. Virtual addresses
are split
into a 9 bit top level page table field, an 11 bit second level page table field
and an offset.
How large are the pages and how many are there in the address space?

Problem 24
• Suppose that a 32 bit virtual address is broken up into four fields: a, b, c and
d. The first
three are used for a three level page table system. The fourth field, d, is the
offset. Does
the number of pages depend on the sizes of all four fields? If not, which ones
matter and
which ones do not?

Problem 25
• A computer has 32 bit logical addresses and 4 KB pages. How many entries are
needed in
the page table if traditional (one level) paging is used?
• How many page table entries are needed for two level paging, with 10 bits in each
part?

Problem 27
• In a 64 bit machine, with 256 MB RAM and a 4 KB page size, how many entries will
there
be in the page table if it is inverted?

Problem 28
Consider the given segment table What are the Physical
addresses for the following logical addresses:
• (2,399)
• (4,0)
• (4,1000)
• (3,1300)
• (6,297)

Segment Table

limit base
0 1000 1400
1 400 6300
2 400 4300
3 1100 3200
4 1000 4700

Problem 29
Consider the given segment table, What are the
Physical addresses for the following logical addresses:
• 0,430
• 1,10
• 2,500
• 3,400
• 4,112

Seg Base Len

Problem
Consider MULTICS on a GE 345 processor, with Logical
Address of 34 bits and p ga e size of 1 KB. s is of 18 bits and
d is of 16 bits.
– What is the largest segment size?
– What is the maximum number of segments per process?
– Give maximum number of pages per segment.
– Give the LA format including the no of bits for p and d

Problem
• Consider a process in MULTICS with its segment # 15
having 5096 bytes. The page size is 1 KB. The process
generates a Logical Address of (15, 3921).
– Is it a legal address? If yes why?
– How many pages does the segment have?
– What page does the logical address refer to, and what is
its offset?
– What is the P A if page#3 (i What is the P.A if page#3 (i.e fourth page) is in
frame e. fourth page) is in frame
12?

~~~ Quiz questions~~~

2. Consider a system with byte-addressable memory, 32 bit logical addresses, 4

3. Calculate the number of bits required in the address for memory having size of
16 GB. Assume the memory is 4 byte addressable.

Imp link:
https://www.gatevidyalay.com/paging-formulas-practice-problems/
https://www.geeksforgeeks.org/cpu-scheduling-numerical-questions/
http://docplayer.net/53596517-Operating-systems-lecture-16-memory-management.html