i

Arithmetic Logic Unit

Submitted
by

Priti Gangwar
Roll No. – 2K19/EC/134
&
Ritik Gupta
Roll No.--2K19/EC/147

Submitted to

Ms. Lavi Tanwar

Department of Electronics & Communication Engineering

Delhi Technological University, Delhi
Delhi-110042

Nov, 2020
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Electronics & Communication Engg. Deptt.

DELHI TECHNOLOGICAL UNIVERSITY
(Formerly Delhi College of Engineering)
Shahbad Daulatpur, Bawana Road-Delhi-42

Candidate’s Declaration

I, hereby, declare that the work embodied in this project entitled “Priti Gangwar & Ritik Gupta,
Roll Nos. 2K19/EC/134 & 2K19/EC/147” submitted to the Department of Electronics &
Communication Engineering, Delhi Technological University, Delhi is an authentic record of
my own bonafide work and is correct to the best of my knowledge and belief. This work has
been undertaken taking care of engineering ethics.

Name and Signature of the Student:

PRITI GANGWAR (2K19/EC/134)

RITIK GUPTA (2K19/EC/147)

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ELECTRONICS AND COMMUNICATION

DELHI TECHNOLOGICAL UNIVERSITY
(Formerly Delhi College of Engineering)
Bawana Road, Delhi-110042

CERTIFICATE

I hereby certify that the Project Dissertation titled “4-Bit Arithmetic Logic Unit” which is
submitted by Priti Gangwar & Ritik Gupta, Roll Nos. 2K19/EC/134 & 2K19/EC/147,
Electronics & Communication, Delhi Technological University, Delhi in partial fulfilment of
the requirement for the award of the degree of Bachelor of Technology, is a record of the project
work carried out by the students under my supervision. To the best of my knowledge this work
has not been submitted in part or full for any Degree or Diploma to this University or elsewhere.

Place: Delhi Prof. Lavi Tanwar

Date: 23 Nov 2020
Supervisor
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ACKNOWLEDGEMENT

Presentation inspiration and motivation have always played a key role in the success of any
venture.

We express our sincere thanks to Prof. Yogesh Singh, Vice Chancellor, Delhi Technological
University, Delhi.

We pay our deep sense of gratitude to Prof. N.S. Raghava (HOD) of EC Department, Delhi
Technological University, Delhi to encourage us to the highest peak and to provide us the
opportunity to prepare the project. We are immensely obliged to for their elevating inspiration,
encouraging guidance and kind supervision in the completion of our project.

We feel to acknowledge our indebtedness and deep sense of gratitude to our guide Prof. Lavi
Tanwar whose invaluable guidance and kind supervision given to us throughout the course
which shaped the present work as its show.

Last, but not the least, our parents are also an important inspiration for time. So with due
regards. We express our gratitude to them.
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ABSTRACT

With the Arithmetic Logic Unit, we can mathematically and logically process two 4-bit
numbers using multiplexers.

● The front-side buses (left panel) are the inputs A and B.

● The back-side buses (right panel) are the data output and the function selection
● Data passing through the ALU circuit does so on a system of buses. These buses consists of
groups of wires (4 parallel bits in simple systems) each carrying a single byte of binary data.
We’ll try to put our best foot forward to make it work on a simulator.
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CONTENTS

Candidate’s Declaration ii
Certificate iii
Acknowledgement iv
Abstract v
Contents vi
List of Figures vii
List of Tables viii
List of Symbols ix
CHAPTER 1 INTRODUCTION
1.1 Arithmetic Circuit 1
1.1.1 Input Carry
1.1.2 Addition
1.1.3 Subtraction
1.1.4 Increment
1.1.5 Decrement
1.2 Logic Microoperations 3
1.2.1 Special Symbol
1.2.2 List of logic microoperation
1.2.3 Hardware implementation
1.3 Some Application 6
1.3.1 Selective set
1.3.2 Selective complement
1.3.3 Selective Clear
1.4 Shift Microoperation 8
1.4.1 Circular Shift
1.4.2 Arithmetic Shift
1.4.3 Hardware Implementation
1.5 Shifter 10
1.6 Arithmetic Logic Shift Unit 11
CHAPTER 2 Methodology and Implementation 12
CHAPTER 3 Result and Conclusion 14
References 15
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List of Figures

Figure 1.1 – 4-Bit Arithmetic Circuit

Figure 1.2 – One phase of logic circuit
Figure 1.3 – Arithmetic shift right
Figure 1.4 – Shifter Circuit
Figure 2.1 – One stage of arithmetic logic shift unit
Figure 3.1 –Multisim Model
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List of Tables

Table 1.1: Arithmetic Microoperation

Table 1.2: Aritmetic Circuit function table
Table 1.3: Truth Table for 16 function of 2 variable
Table 1.4: 16 Logic Microoperation
Table 1.5: Shift Microoperation
Table 2.1: Function table for Arithmetic Logic shift unit
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List of symbols
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CHAPTER 1 INTRODUCTION

An arithmetic logic unit (ALU) is combinational logic circuit which is typically used to
implement a CPU's arithmetic and logic operations. An ALU will typically take one or two
input operands and output a result along with a set of status bits. A selection input will determine
the operation performed.

1.1 Arithmetic Circuit

Table 1.1

The arithmetic micro operations listed in Table 1.1 can be implemented in one composite
arithmetic circuit. The basic component of an arithmetic circuit is the parallel adder. By
controlling the data inputs to the adder, it is possible to obtain different types of arithmetic
operations.
The diagram of a 4-bit arithmetic circuit is shown in Fig 1.1. It has four full-adder circuits that
constitute the 4-bit adder and four multiplexers for choosing different operations. There are
two 4-bit inputs A and B and a 4-bit output D. The four inputs from A go directly to the X inputs
of the binary adder. Each of the four inputs from B are connected to the data inputs of the
multiplexers. The multiplexer’s data inputs also receive the complement of B. The other two
data inputs are connected to logic-0 and logic-1. Logic-0 is a fixed voltage value (0 volts for TTL
integrated circuits) and the logic-1 signal can be generated through- an inverter whose input is 0.
The four multiplexers are controlled by two selection inputs, S1 and So.

1.1.1 Input Carry

The input carry Cin goes to the carry input of the FA in the least significant position. The other
carries are connected from one stage to the next. The output of the binary adder is calculated
from the following arithmetic:

sum: D=A+Y +C i n

where A is the 4-bit binary number at the X inputs and Y is the 4-bit binary number at the Y
inputs of the binary adder. C in is the input carry, which can be equal to 0 or 1. Note that the
symbol + in the equation above denotes an arithmetic plus. By controlling the value of Y with
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the two selection inputs Si and So and making Cin equal to 0 or 1, it is possible to generate the
eight arithmetic micro operations listed in Table 1.2.

Figure 1.1

S1 S0 Cin X
0 0 0 A+B
0 0 1 A+B+1
0 1 0 A+B’
0 1 1 A+B’+1
1 0 0 A
1 0 1 A+1
1 1 0 A-1
1 1 1 A
Table 1.2

1.1.2 Addition
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When SiSo = 00, the value of B is applied to the Y inputs of the adder. If Cin = 0, the output D =
A + B. If Cin = 1, output D = A + B + 1. Both cases perform the add microoperation with or without
adding the input carry.

1.1.3 Subtraction
When SiSo = 01, the complement of B is applied to the Y inputs of the adder. If C in = 1, then D =
A + B + 1. This produces A plus the 2's complement of B, which is equivalent to a subtraction of A
— B. When C in = 0, then D = A + B . This is equivalent to subtract with borrow, that is, A — B —
1.

1.1.4 Increment
When SiSo = 10, the inputs from B are neglected, and instead, all 0's are inserted into the Y inputs.
The output becomes D = A + 0 + C in. This gives D = A when C,,, = 0 and D = A + 1 when C,, = 1. In
the first case we have a direct transfer from input A to output D. In the second case, the value
of A is incremented by 1.

1.1.5 Decrement
When SiSo = 11, all l's are inserted into the Y inputs of the adder to produce the decrement
operation D = A — 1 when Cu, = 0. This is because a number with all l's is equal to the 2's
complement of 1 (the 2's complement of binary 0001 is 1111). Adding a number A to the 2's
complement of 1 produces F = A + 2's complement of 1 = A — 1. When C in = 1, then D = A — 1 +
1= A, which causes a direct transfer from input A to output D. Note that the microoperation D =
A is generated twice, so there are only seven distinct microoperations in the arithmetic circuit.

1.2 Logic Microoperations

Logic microoperations specify binary operations for strings of bits stored in registers. These
operations consider each bit of the register separately and treat them as binary variables. For
example, the exclusive-OR microoperation with the contents of two registers R1 and R2 is
symbolized by the statement:

It specifies a logic microoperation to be executed on the individual bits of the registers provided
that the control variable P = 1. As a numerical example, assume that each register has four bits.
Let the content of R1 be 1010 and the content of R2 be 1100. The exdusive-OR microoperation
stated above symbolizes the following logic computation:

1010 Content of R1
1100 Content of R2
0110 Content of R1 after P = 1

The content of R1, after the execution of the microoperation, is equal to the bit-by-bit
exclusive-OR operation on pairs of bits in R2 and previous values of Rl. The logic
microoperations are seldom used in scientific computations, but they are very useful for bit
manipulation of binary data and for making logical decisions.

1.2.1 Special Symbols

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Special symbols will be adopted for the logic microoperations OR, AND, and complement, to
distinguish them from the corresponding symbols used to express Boolean functions. The
symbol will be used to denote an OR microoperation and the symbol A to denote an AND
microoperation. The complement microoperation is the same as the l's complement and uses
a bar on top of the symbol that denotes the register name. By using different symbols, it will
be possible to differentiate between a logic microoperation and a control (or Boolean)
function. Another reason for adopting two sets of symbols is to be able to distinguish the
symbol + , when used to symbolize an arithmetic plus, from a logic OR operation. Although the
+ symbol has two meanings, it will be possible to distinguish between them by noting where the
symbol occurs. When the symbol + occurs in a microoperation, it will denote an arithmetic
plus. When it occurs in a control (or Boolean) function, it will denote an OR operation. We will
never use it to symbolize an OR microoperation. For example, in the statement
P + Q: R1 +— R2 + R3, R4 <— R5 V R6

the + between P and Q is an OR operation between two binary variables of a control function.
The + between R2 and R3 specifies an add microoperation. The OR microoperation is
designated by the symbol between registers R5 and R6.

1.2.2 List of Logic Microoperations

There are 16 different logic operations that can be performed with two binary variables. They
can be determined from all possible truth tables obtained with two binary variables as shown in
Table 1.3 . In this table, each of the 16 columns F 0 through F15 represents a truth table of one possible
Boolean function for the two variables x and y. Note that the functions are determined from the
16 binary combinations that can be assigned to F.

x y F. F1 F2 F3 F4 F, F6 F, F8 F9 F10 F11 F12 F13 F14 F15

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

0 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

1 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

Table 1.3

The 16 Boolean functions of two variables x and y are expressed in algebraic form in the first
column of Table 1.4. The 16 logic microoperations are derived from these functions by replacing
variable x by the binary content of register A and variable y by the binary content of register B. It is
important to realize that the Boolean functions listed in the first column of Table 1.4 represent a
relationship between two binary variables x and y. The logic micro-operations listed in the second
column represent a relationship between the binary content of two registers A and B. Each bit of
the register is treated as a binary variable and the microoperation is performed on the string of
bits stored in the registers.
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Table 1.4

1.2.3 Hardware Implementation

The hardware implementation of logic microoperations requires that logic gates be

inserted for each bit or pair of bits in the registers to perform the required logic function.
Although there are 16 logic microoperations, most computers use only four—AND, OR, XOR
(exclusive-OR), and complement—from which all others can be derived .
Figure 1.2 shows one stage of a circuit that generates the four basic logic microoperations. It consists
of four gates and a multiplexer. Each of the four logic operations is generated through a gate
that performs the required logic. The outputs of the gates are applied to the data inputs of the
multiplexer. The two selection inputs S 1 and So choose one of the data inputs of the multiplexer
and direct its value to the output. The diagram shows one typical stage with subscript i. For a
logic circuit with n bits, the diagram must be repeated n times for i = 0, 1, 2, . . . , n – 1. The selection
variables are applied to all stages. The function table in Fig. 1.2(b) lists the logic microoperations
obtained for each combination of the selection variables.
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Figure 1.2
1.3 Some Applications

Logic microoperations are very useful for manipulating individual bits or a portion of a word
stored in a register. They can be used to change bit values, delete a group of bits, or insert new
bit values into a register. The following examples show how the bits of one register (designated
by A) are manipulated by logic microoperations as a function of the bits of another register
(designated by B). In a typical application, register A is a processor register and the bits of register
B constitute a logic operand extracted from memory and placed in register B.

1.3.1 Selective set

The selective-set operation sets to 1 the bits in register A where there are corresponding l's in
register B. It does not affect bit positions that have 0's in B. The following numerical
example clarifies this operation:

1010 A before
1100 B (logic operand)
1110 A after
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The two leftmost bits of B are l's, so the corresponding bits of A are set to 1. One of these
two bits was already set and the other has been changed from 0 to 1. The two bits of A
with corresponding 0's in B remain unchanged. The example above serves as a truth table
since it has all four possible combinations of two binary variables. From the truth table
we note that the bits of A after the operation are obtained from the logic-OR operation
of bits in B and previous values of A. Therefore, the OR microoperation can be used to
selectively set bits of a register.

1.3.2 Selective-complement

The selective-complement operation complements bits in A where there are corresponding

l's in B. It does not affect bit positions that have 0's in B. For example:

1010 A before
1100 B (logic operand)
0110 A after
Again the two leftmost bits of B are l's, so the corresponding bits of A are complemented. This
example again can serve as a truth table from which one can deduce that the selective-complement
operation is just an exclusive-OR microoperation. Therefore, the exclusive-OR microoperation can be
used to selectively complement bits of a register.

1.3.3 Selective-clear
The selective-clear operation clears to 0 the bits in A only where there are corresponding l's in B.
For example:
1010 A before
1100B (logic operand)
0010 A after
Again the two leftmost bits of B are l's, so the corresponding bits of A are cleared to 0. One can
deduce that the Boolean operation performed on the individual bits is AB'. The corresponding logic
microoperation is
A—A.B’

The mask operation is similar to the selective-clear operation except that the bits of A are cleared
only where there are corresponding 0's in B. The mask operation is an AND micro operation as seen
from the following numerical example:

1010 A before
1100 B (logic operand)
1000 A after masking
The two rightmost bits of A are cleared because the corresponding bits of B are 0's. The two leftmost
bits are left unchanged because the corresponding bits of B are l's. The mask operation is more
convenient to use than the selective-clear operation because most computers provide an AND
instruction, and few provide an instruction that executes the microoperation for selective-clear.
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The insert operation inserts a new value into a group of bits. This is done by first masking the
bits and then ORing them with the required value. For example, suppose that an A register contains
eight bits, 0110 1010. To replace the four leftmost bits by the value 1001 we first mask the four
unwanted bits:

0110 1010 A before

0000 1111 B (mask)
0000 1010 A after masking

and then insert the new value:

A before
0000 1010
B (insert)
1001 0000
A after insertion
1001 1010

The mask operation is an AND microoperation and the insert operation is an OR microoperation.
The clear operation compares the words in A and B and produces an all 0's result if the two
numbers are equal. This operation is achieved by an exclusive-OR microoperation as shown by
the following example:

1010 A
1010 B
0000 A 4—A ED B
When A and B are equal, the two corresponding bits are either both 0 or both 1. In either case
the exclusive-OR operation produces a 0. The all-O's result is then checked to determine if the
two numbers were equal.

1.4 Shift Microoperations

Shift microoperations are used for serial transfer of data. They are also used in conjunction with
arithmetic, logic, and other data-processing operations. The contents of a register can be shifted
to the left or the right. At the same time that the bits are shifted, the first flip-flop receives its binary
information from the serial input. During a shift-left operation the serial input transfers a bit into
the rightmost position. During a shift-right operation the serial input transfers a bit into the leftmost
position. The information transferred through the serial input determines the type of shift. There
are three types of shifts: logical, circular, and arithmetic.
A logical shift is one that transfers 0 through the serial input. We will adopt the symbols shl and
shr for logical shift-left and shift-right microoperations. For example:
R1 s—shl R1
R2 F shr R2
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are two microoperations that specify a 1-bit shift to the left of the content of register R1 and a
1-bit shift to the right of the content of register R2. The register symbol must be the same on
both sides of the arrow. The bit transferred to the end position through the serial input is
assumed to be 0 during a logical shift.

1.4.1 Circular shift

The circular shift (also known as a rotate operation) circulates the bits of the register around
the two ends without loss of information. This is accomplished by connecting the serial output
of the shift register to its serial input. We will use the symbols cil and cir for the circular shift
left and right, respectively. The symbolic notation for the shift microoperations is shown in
Table 1.3.

Table 1.5

1.4.2 Arithmetic shift

An arithmetic shift is a microoperation that shifts a signed binary number
to the left or right. An arithmetic shift-left multiplies a signed binary number
by 2. An arithmetic shift-right divides the number by 2. Arithmetic shifts must
leave the sign bit unchanged because the sign of the number remains the same

when it is multiplied or divided by 2. The leftmost bit in a register holds the sign bit, and the
remaining bits hold the number. The sign bit is 0 for positive and 1 for negative. Negative numbers
are in 2's complement form. Figure 1.4 shows a typical register of n bits. Bit R, _ t in the leftmost
position holds the sign bit. R, _ 2 is the most significant bit of the number and R 0 is the least
significant bit. The arithmetic shift-right leaves the sign bit unchanged and shifts the number
(including the sign bit) to the right. Thus R, _ remains the same, R, _ 2 receives the bit from R„ _1,
and so on for the other bits in the register. The bit in R o is lost.

Figure 1.3
The arithmetic shift-left inserts a 0 into Ro, and shifts all other bits to the left. The initial bit of R,
_ t is lost and replaced by the bit from R, _ 2. A sign reversal occurs if the bit in R. _ t changes in value
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after the shift. This happens if the multiplication by 2 causes an overflow. An overflow occurs after
an arithmetic shift left if initially, before the shift, R, _ t is not equal to R, _ 2. An overflow flip-flop V5
can be used to detect an arithmetic shift-left overflow.

V, = R„ _ IEBR„ - 2
If V, = 0, there is no overflow, but if V, = 1, there is an overflow and a sign reversal after the shift.
V, must be transferred into the overflow flip-flop with the same clock pulse that shifts the register.
1.4.3 Hardware Implementation
A possible choice for a shift unit would be a bidirectional shift register with parallel load. Information
can be transferred to the register in parallel and then shifted to the right or left. In this type of
configuration, a clock pulse is needed for loading the data into the register, and another pulse is
needed to initiate the shift. In a processor unit with many registers it is more efficient to implement
the shift operation with a combinational circuit. In this way the content of a register that has to be
shifted is first placed onto a common bus whose output is connected to the combinational shifter,
and the shifted number is then loaded back into the register. This requires only one clock pulse for
loading the shifted value into the register.

1.5 Shifter
A combinational circuit shifter can be constructed with multiplexers as shown in
Fig.1.5.The 4-bit shifter has four data inputs, A0 through A3, and
four data outputs, Ho through H3. There are two serial inputs, one for shift left
(0 and the other for shift right (Ii). When the selection input S = 0, the input data are shifted right
(down in the diagram). When S = 1, the input data are shifted left (up in the diagram). The function
table in Fig. 1.5 shows which input goes to each output after the shift. A shifter with n data inputs
and outputs requires n multiplexers. The two serial inputs can be controlled by another
multiplexer to provide the three possible types of shifts.

Figure 1.4
1.6 Arithmetic Logic Shift Unit
Instead of having individual registers performing the microoperations directly,
computer systems employ a number of storage registers connected to a com-
mon operational unit called an arithmetic logic unit, abbreviated ALU. To perform a
microoperation, the contents of specified registers are placed in the inputs of the common ALU. The
ALU performs an operation and the result of the operation is then transferred to a destination register.
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The ALU is a combinational circuit so that the entire register transfer operation from the source
registers through the ALU and into the destination register can be performed during one dock pulse
period. The shift microoperations are often performed in a separate unit, but sometimes the shift unit is
made part of the overall ALIT,
The arithmetic, logic, and shift circuits introduced in previous sections can be combined into one
ALU with common selection variables_ One stage of an arithmetic logic shift unit is shown in Fig. 1.6 .
The subscript i designates a typical stage. inputs are applied to both the arithmetic and logic units.
A particular microoperation is selected with inputs S, A 4 x 1 multiplexer at the output chooses
between an arithmetic output in E, and a logic output in H. The data in the multiplexer are selected
with inputs S 3 and S2. The other two data inputs to the multiplexer receive inputs A,_, for the
shift-right operation and A + r for the shift-left operation. Note that the diagram shows just one typical
stage. The circuit of Fig. 1.6 must be repeated n times for an n-bit ALU. The output carry C, of a given
arithmetic stage must be connected to the input carry C, of the next stage in sequence. The input
carry to the first stage is the input carry C„„ which provides a selection variable for the arithmetic
operations.
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CHAPTER 2

Multisim
Multisim is industry standard SPICE simulation and circuit design software for analog, digital, and
power electronics in education and research.Multisim integrates industry standard SPICE simulation
with an interactive schematic environment to instantly visualize and analyze electronic circuit
behavior. Multisim has an intuitive interface that helps educators reinforce circuit theory and improve
retention of theory throughout engineering curriculum. Researchers and designers use Multisim to
reduce PCB prototype iterations and save development costs by adding powerful circuit simulation
and analyses to the design flow.

Methodology and Implementation

The circuit whose one stage is specified in Fig. 2.1 provides eight arithmetic operation, four logic
operations, and two shift operations. Each operation is selected with the five variables S 3, S2, Si, So,
and C.,. The input carry Cu, is used for selecting an arithmetic operation only.

Figure 2.1

Table 1.4 lists the 14 operations of the ALU. The first eight are arithmetic operations and are
selected with S3S2 = 00. The next four are logic operations and are selected with S3S2 = 01. The input
carry has no effect during the logic operations and is marked with don't-care x's. The last two
operations are shift operations and are selected with S3S2 = 10 and 11. The other three selection inputs
have no effect on the shift.
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S3 S2 S1 S0 Cin X
0 0 0 0 0 A+B
0 0 0 0 1 A+B+1
0 0 0 1 0 A+B’
0 0 0 1 1 A+B’+1
0 0 1 0 0 A
0 0 1 0 1 A+1
0 0 1 1 0 A-1
0 0 1 1 1 A
0 1 0 0 X A^B
0 1 0 1 X A∨B
0 1 1 0 X A⊕B
0 1 1 1 X A’
1 0 X X X << A
1 1 X X X >> A

Table 2.1
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CHAPTER 3 RESULTS & CONCLUSION

Multisim Model

Figure 3.1

In conclusion, our 4-bit ALU design and implementation worked correctly. The methods
we used to design each component in the system made for proper execution of the ALU.
While at first we had issues switching individual registers performing the microoperations
directly, between them. Once we figured this out, the project worked correctly. This project
let us use the knowledge we have gained over the past labs.
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References

[1]. Arithmetic Logic Unit – Wikipedia

[2]. Computer System Architecture-morris mano Third Edition

[3]. Arithmetic Logic Unit (ALU) - Tutorialspoint

[4]. Introduction of ALU and Data Path - GeeksforGeeks