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2010-Electrical Performnace-Operating Temperature Trends in Amorphous

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2010-Electrical Performnace-Operating Temperature Trends in Amorphous

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Rajesh Agarwal
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818 IEEE ELECTRON DEVICE LETTERS, VOL. 31, NO.

8, AUGUST 2010

Operating Temperature Trends in Amorphous


In–Ga–Zn–O Thin-Film Transistors
Ken Hoshino and John F. Wager, Senior Member, IEEE

Abstract—The electrical performance as a function of operating


temperature of amorphous indium gallium zinc oxide (a-IGZO)
thin-film transistors (TFTs) is assessed by measuring drain cur-
rent versus gate voltage [log(ID )−VGS ] transfer curves at tem-
peratures from −50 ◦ C to +50 ◦ C. These bottom-gate staggered
a-IGZO TFTs are fabricated using thermal silicon dioxide as the
gate insulator. An almost rigid log(ID )−VGS transfer curve shift
to lower (more negative) turn-on voltage (VON ) with increasing
temperature is observed. The extent of the VON operating tem-
perature dependence of a TFT appears to be correlated to its trap
density. A lower trap density gives rise to less VON operating tem-
perature dependence. Although log(ID )−VGS transfer curves
are observed to shift almost rigidly with temperature, a more
detailed temperature-dependence assessment indicates that the
shift is not exactly rigid. The mobility is found to increase slightly
with increasing operating temperature. This trend is attributed to
enhanced detrapping at a higher operating temperature.
Index Terms—Gallium compounds, indium compounds, Fig. 1. log(ID )−VGS transfer curves measured at VDS = 20 V and at six
temperature measurement, thin-film transistors (TFTs), zinc different temperatures between −50 ◦ C and +50 ◦ C using 20 ◦ C steps. Only
compounds. positive sweeps (VGS from −20 to 40 V) are shown. The arrow indicates the
direction of turn-on voltage shift with increasing operating temperature.

A MORPHOUS oxide semiconductor (AOS)-based thin-


film transistors (TFTs) are regarded as a top choice for
the next-generation large-area electronics, including flat-panel
an RF power of 100 W in 5 mTorr of pure Ar. A ceramic
3-inch In:Ga:Zn:O = 1:1:1:4 target prepared by Cerac, Inc. is
displaced 4 inches away from the substrate. Post-deposition
displays [1]–[3]. In particular, amorphous indium gallium zinc annealing is performed in air at 200 ◦ C, 250 ◦ C, and 300 ◦ C,
oxide (a-IGZO) is currently the most well-studied AOS material followed by aluminum electrode deposition via thermal evap-
[4]–[7]. However, there appears to be only a single contribu- oration. A Sun Systems EC-1A environmental chamber is
tion to the technical literature, which addresses the operating employed to provide a controlled testing environment, starting
temperature characteristics of a-IGZO TFTs [8]. These authors at +50 ◦ C and decreasing to −50 ◦ C using 20 ◦ C steps. An
attribute the rigid transfer curve shift to more negative gate Agilent 4155C semiconductor parameter analyzer is used to
voltage as the operating temperature increases, i.e., the same monitor all electrical characteristics. Two drain current–gate
basic trend observed in this study, to the creation of oxygen voltage log(ID )−VGS transfer curves are obtained at each
vacancies. An alternative explanation for this phenomenon is measurement temperature. One log(ID )−VGS curve is obtained
to ascribe it to electron trapping. Thus, the purpose of the at VDS = 1 V and is used to extract mobility. The other
work presented herein is to report on the operating temperature log(ID )−VGS curve is monitored at VDS = 20 V.
dependence of the electrical characteristics of a-IGZO-based Two measured electrical parameters are employed to quan-
TFTs and to interpret this trend in the context of electron titatively assess the operating temperature dependence of an
trapping. a-IGZO TFT: the turn-on voltage (VON ) and the average mobil-
The TFT structure is bottom-gate staggered, employing ity (μAVG ). VON is defined as the gate–source voltage at which
p-type crystalline-Si substrate with a 100-nm-thick thermally the drain current starts to increase appreciably. The average
grown SiO2 layer and a tantalum/gold back contact. The mobility is defined as [9]
a-IGZO channel layer is deposited via RF sputtering on top of 

the thermal silicon dioxide. RF sputtering is performed using GCH (VGS ) 
μAVG (VGS ) = W  (1)
C
L G GS[V − V ON 
]
VDS →0
Manuscript received April 16, 2010; accepted April 30, 2010. Date of
publication June 10, 2010; date of current version July 23, 2010. This work
was supported in part by the National Science Foundation through CCI Grant
where GCH is the channel conductance, GCH (VGS ) =
CHE-0847970, by Hewlett-Packard Company, and by FlexTech Alliance. The (ID (VGS )/VDS )|VDS →0 , W is the channel width, L is the
review of this letter was arranged by Editor J. K. O. Sin. channel length, and CG is the gate capacitance density, which
The authors are with the School of Electrical Engineering and Com- is ∼ 34.5 nF/cm2 for devices used in this study.
puter Science, Oregon State University, Corvallis, OR 97331 USA (e-mail:
[email protected]; [email protected]). Fig. 1 shows the six log(ID )−VGS transfer curves measured
Digital Object Identifier 10.1109/LED.2010.2049980 at VDS = 20 V and at temperatures of −50 ◦ C, −30 ◦ C, −10 ◦ C,

0741-3106/$26.00 © 2010 IEEE


HOSHINO AND WAGER: OPERATING TEMPERATURE TRENDS IN AMORPHOUS In–Ga–Zn–O TFTs 819

Fig. 3. Operating temperature dependence of the average mobility. The arrow


Fig. 2. Turn-on voltage VON as a function of TFT operating temperature. shows the mobility trend as the operating temperature increases.
Each set of dots (, , and ) corresponds to the measured data from a different
TFT. The solid lines denote the fits using the discrete donor trap model. The
dashed lines are the least square fit curves. tive mass (mde = 0.34m0 ) [13]. pTO is calculated using the
Fermi–Dirac statistics
10 ◦ C, 30 ◦ C, and 50 ◦ C. Since these curves display a negligible ⎧ ⎫
amount of hysteresis, only positive sweeps (VGS measured from ⎨ 1 ⎬
−20 to 40 V) are shown. The arrow indicates the direction of pTO (T ) = NT 1 −  (4)
shift as temperature increases. ⎩ 1 + exp ETkB−E F ⎭
T
The VON extracted from log(ID )−VGS transfer curves is pre-
sented as a function of the operating temperature in Fig. 2. The where NT is the trap sheet density.
clear trend is that VON decreases with increasing temperature Thus, according to the discrete donor trap model, the oper-
between −50 ◦ C to +50 ◦ C. No clear correlation could be estab- ating temperature dependence of VON may be specified in the
lished between the post-deposition annealing temperature and functional form
the VON operating temperature trend. The dashed lines included
in Fig. 2 correspond to least square fits of the experimental data, VON (T ; NT , EC -ET , EC -EF ) (5)
whereas the solid lines denote the fits using the discrete donor
trap model [10]–[12]. where VON is the dependent variable and T is the independent
variable, whereas NT , EC -ET , and EC -EF are the model
The discrete donor trap model is an extremely simple model
parameters whose values may be estimated from fitting to the
which is employed herein in an attempt to rationalize the
experimental data. Realistic fits to the experimental data could
only be obtained when EC -ET ∼
experimentally observed temperature trends shown in Fig. 2.
= 0.02 eV. Therefore, NT and
This model implicitly assumes that electron charge in the EC -EF were estimated by assuming EC -ET = 0.02 eV.
accumulation layer channel and trapped electron charge are Returning to Fig. 2, note that the discrete donor trap model
both located precisely at the insulator–semiconductor interface. fitting suggests that a TFT with a lower trap density, and, hence,
Note that the discrete donor trap model can account for a rigid an equilibrium Fermi level position further separated from the
shift of the transfer curve but does not address the subthreshold conduction band minimum, has a VON which is less dependent
swing [12]. Moreover, electronic charge trapping is presumed upon the operating temperature. The negative VON shift with
to occur exclusively at a single discrete donor level. The turn- increasing operating temperature occurs because more conduc-
on voltage VON is then expressed as [12] tion band states are populated with increasing temperature [i.e.,
q nCO increases, as evident from (3), and this increase in nCO
VON = − (nCO − pTO ) (2) leads to a corresponding negative shift of VON via (2); there is
CG
a negligible change in VON due to the temperature dependence
where q is the electronic charge, CG is the capacitance density of pTO , as given by (4)]. Although only three sets of data are
of the insulator, nCO is the equilibrium conduction band elec- shown in Fig. 2, all eight TFTs tested exhibit the same trend.
tron sheet density, and pTO is the empty donorlike trap equilib- Note that the TFT indicated by a triangle in Fig. 2 exhibited
rium sheet density. nCO is approximated using the Boltzmann no measurable operating temperature dependence. This lack of
statistics temperature dependence is ascribed to the lower value of EF ,
  which is directly related to its low trap density.
2/3 EC − E F Although the log(ID )−VGS transfer curves display an almost
nCO (T ) = NC exp − (3)
kB T rigid shift to lower voltages with increasing temperature, there
is a small nonrigid distortion of these curves which is attributed
where the conduction band density of states is given by NC = to a temperature dependence of the channel mobility. Fig. 3
2(2πmde kB T /h2 )3/2 , kB is Boltzmann’s constant, T is the shows the average mobility (μAVG ) versus the overvoltage
temperature, and mde is the electron-density-of-states effec- (VGS − VON ) as a function of operating temperature. Both
820 IEEE ELECTRON DEVICE LETTERS, VOL. 31, NO. 8, AUGUST 2010

average and incremental mobilities (not shown) exhibit a no- “12.1-inch WXGA AMOLED display driven by indium–gallium–zinc
ticeable temperature dependence, shifting to higher values with oxide TFT array,” in Proc. SID Dig., 2008, pp. 1–4, 3.1.
[3] M. Ito, M. Kon, M. Ishizaki, and N. Sekine, “A flexible active-matrix
increasing operating temperature. This mobility temperature TFT array with amorphous oxide semiconductors for electronic paper,”
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exhibiting no measurable VON temperature dependence. No [4] K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, and H. Hosono,
“Room-temperature fabrication of transparent flexible thin-film transistors
clear temperature dependence is observed for the subthreshold using amorphous oxide semiconductors,” Nature, vol. 432, no. 7016,
ON-OFF
slope S or the drain current ON-to-OFF current ratio ID . pp. 488–492, Nov. 2004.
In conclusion, the log(ID )−VGS transfer curves of a-IGZO [5] H.-H. Hsieh, T. Kamiya, K. Nomura, H. Hosono, and C.-C. Wu, “Model-
TFTs have been observed to shift almost rigidly to lower (more ing of amorphous InGaZnO4 thin film transistors and their subgap density
of states,” Appl. Phys. Lett., vol. 92, no. 13, p. 133 503, Mar. 2008.
negative) gate voltages with increasing operating temperature. [6] A. Suresh and J. F. Muth, “Bias stress stability of indium gallium zinc
The extent of this shift appears to increase with increasing oxide channel based transparent thin film transistors,” Appl. Phys. Lett.,
trap density. One a-IGZO TFT demonstrated its log(ID )−VGS vol. 92, no. 3, p. 033 502, 2008.
[7] H. Q. Chiang, B. R. McFarlane, D. Hong, R. E. Presley, and J. F. Wager,
transfer curves to be almost temperature independent due to its “Process effects on the stability of amorphous indium gallium zinc ox-
low trap density. However, a small but noticeable increase in ide thin-film transistors,” J. Non-Cryst. Solids, vol. 354, pp. 2826–2830,
the channel mobility is noted for all of the TFTs tested. This 2008.
[8] K. Takechi, M. Nakata, T. Eguchi, H. Yamaguchi, and S. Kaneko,
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ACKNOWLEDGMENT Appl. Phys., vol. 95, no. 10, pp. 5813–5819, May 15, 2004.
[10] S. M. Sze, Physics of Semiconductor Devices, 1st ed. New York: Wiley,
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“Electrical modeling of thin-film transistors,” Crit. Rev. Solid State Mater.
R EFERENCES Sci., vol. 33, no. 2, pp. 101–132, Apr. 2008.
[12] J. F. Wager, D. A. Keszler, and R. E. Presley, Transparent Electronics.
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