4

Logic Gates and Related Devices

Logic gates are electronic circuits that can be used to implement the most elementary logic expressions,
also known as Boolean expressions. The logic gate is the most basic building block of combinational
logic. There are three basic logic gates, namely the OR gate, the AND gate and the NOT gate. Other
logic gates that are derived from these basic gates are the NAND gate, the NOR gate, the EXCLUSIVE-
OR gate and the EXCLUSIVE-NOR gate. This chapter deals with logic gates and some related devices
such as buffers, drivers, etc., as regards their basic functions. The treatment of the subject matter is
mainly with the help of respective truth tables and Boolean expressions.

4.1 Positive and Negative Logic

The binary variables, as we know, can have either of the two states, i.e. the logic ‘0’ state or the
logic ‘1’ state. These logic states in digital systems such as computers, for instance, are represented by
two different voltage levels or two different current levels. If the more positive of the two voltage or
current levels represents a logic ‘1’ and the less positive of the two levels represents a logic ‘0’, then
the logic system is referred to as a positive logic system. If the more positive of the two voltage or
current levels represents a logic ‘0’ and the less positive of the two levels represents a logic ‘1’, then
the logic system is referred to as a negative logic system. The following examples further illustrate this
concept.
 If the two voltage levels are 0 V and +5 V, then in the positive logic system the 0 V represents a
logic ‘0’ and the +5 V represents a logic ‘1’. In the negative logic system, 0 V represents a logic ‘1’
and +5 V represents a logic ‘0’.
If the two voltage levels are 0 V and −5 V, then in the positive logic system the 0 V represents a
logic ‘1’ and the −5 V represents a logic ‘0’. In the negative logic system, 0 V represents a logic ‘0’
and −5 V represents a logic ‘1’.
It is interesting to note, as we will discover in the latter part of the chapter, that a positive OR is a
negative AND. That is, OR gate hardware in the positive logic system behaves like an AND gate in
the negative logic system. The reverse is also true. Similarly, a positive NOR is a negative NAND,
and vice versa.

4.2 Truth Table

A truth table lists all possible combinations of input binary variables and the corresponding outputs of
a logic system. The logic system output can be found from the logic expression, often referred to as
the Boolean expression, that relates the output with the inputs of that very logic system.
When the number of input binary variables is only one, then there are only two possible inputs, i.e.
‘0’ and ‘1’. If the number of inputs is two, there can be four possible input combinations, i.e. 00, 01, 10
and 11. Figure 4.1(b) shows the truth table of the two-input logic system represented by Fig. 4.1(a).

A
Logic
Y
System
B

(a)

A B Y
0 0 0
0 1 1
1 0 1
1 1 1

(b)

Figure 4.1 Two-input logic system.

A B C Y
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1

Figure 4.2 Truth table of a three-input logic system

4.3 Logic Gates
The logic gate is the most basic building block of any digital system, including computers. Each one
of the basic logic gates is a piece of hardware or an electronic circuit that can be used to implement
some basic logic expression. While laws of Boolean algebra could be used to do manipulation with
binary variables and simplify logic expressions, these are actually implemented in a digital system
with the help of electronic circuits called logic gates. The three basic logic gates are the OR gate, the
AND gate and the NOT gate.

4.3.1 OR Gate
An OR gate performs an ORing operation on two or more than two logic variables. The OR operation
on two independent logic variables A and B is written as Y = A + B and reads as Y equals A OR B
and not as A plus B. An OR gate is a logic circuit with two or more inputs and one output. The output
of an OR gate is LOW only when all of its inputs are LOW. For all other possible input combinations,
the output is HIGH. This statement when interpreted for a positive logic system means the following.
The output of an OR gate is a logic ‘0’ only when all of its inputs are at logic ‘0’. For all other possible
input combinations, the output is a logic ‘1’. Figure 4.3 shows the circuit symbol and the truth table
of a two-input OR gate. The operation of a two-input OR gate is explained by the logic expression

Y = A+B (4.1)

As an illustration, if we have four logic variables and we want to know the logical output of (A +
B + C + D, then it would be the output of a four-input OR gate with A, B, C and D as its inputs.

A B Y
0 0 0
A
0 1 1
Y=A+B
B 1 0 1
1 1 1

Figure 4.3 Two-input OR gate.

A
B Y=A+B+C A B C Y
C 0 0 0 0
0 0 1 1
(a)
0 1 0 1
A 0 1 1 1
B 1 0 0 1
C Y=A+B+C+D
D 1 0 1 1
(b) 1 1 0 1
1 1 1 1

(c)

Figure 4.4 (a) Three-input OR gate, (b) four-input OR gate and (c) the truth table of a three-input OR gate.
Figures 4.4(a) and (b) show the circuit symbol of three-input and four-input OR gates. Figure 4.4(c)
shows the truth table of a three-input OR gate. Logic expressions explaining the functioning of three-
input and four-input OR gates are Y = A + B + C and Y = A + B + C + D.

Example 4.1
How would you hardware-implement a four-input OR gate using two-input OR gates only?

Solution
Figure 4.5(a) shows one possible arrangement of two-input OR gates that simulates a four-input OR
gate. A, B, C and D are logic inputs and Y 3 is the output. Figure 4.5(b) shows another possible
arrangement. In the case of Fig. 4.5(a), the output of OR gate 1 is Y 1 = (A + B. The second

A Y1
A 1
Y1 B
1
Y2
B 2 3 Y3
C 3 Y3 C Y2
D 2
D
(a) (b)

Figure 4.5 Example 4.1.

OR gate produces the output Y 2 = Y 1 + C = A + B + C. Similarly, the output of OR gate 3 is

Y 3 = Y 2 + D = A + B + C + D. In the case of Fig. 4.5(b), the output of OR gate 1 is Y 1 = A + B.
The second OR gate produces the output Y 2 = C + D. Output Y 3 of the third OR gate is given by
Y 1 + Y 2 = A + B + C + D.

Example 4.2
Draw the output waveform for the OR gate and the given pulsed input waveforms of Fig. 4.6(a).

Solution
Figure 4.6(b) shows the output waveform. It can be drawn by following the truth table of the OR gate.
'1'

'0'
'1'

'0'
a b c d e f g h i j k
t (a)

'1'

'0'
a b c d e f g h i j k

(b)

Figure 4.6 Example 4.2.

 4.3.2 AND Gate
An AND gate is a logic circuit having two or more inputs and one output. The output of an AND gate
is HIGH only when all of its inputs are in the HIGH state. In all other cases, the output is LOW. When
interpreted for a positive logic system, this means that the output of the AND gate is a logic ‘1’ only
when all of its inputs are in logic ‘1’ state. In all other cases, the output is logic ‘0’. The logic symbol
and truth table of a two-input AND gate are shown in Figs 4.7(a) and (b) respectively. Figures 4.8(a)
and (b) show the logic symbols of three-input and four-input AND gates respectively. Figure 4.8(c)
gives the truth table of a four-input AND gate.
The AND operation on two independent logic variables A and B is written as Y = AB and reads
as Y equals A AND B and not as A multiplied by B. Here, A and B are input logic variables and Y is
the output. An AND gate performs an ANDing operation:

A B Y
0 0 0
A 0 1 0
Y=A.B 1 0 0
B
1 1 1
(a)
(b)
Figure 4.7 Two-input AND gate.

A A B C D Y
B Y=A.B.C 0 0 0 0 0
C
0 0 0 1 0
(a) 0 0 1 0 0
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
A
B Y=A.B.C.D 0 1 1 1 0
C 1 0 0 0 0
D 1 0 0 1 0
(b) 1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 1

(c)

Figure 4.8 (a) Three-input AND gate, (b) four-input AND gate and (c) the truth table of a four-input AND gate.
• for a two-input AND gate, Y = AB;
• for a three-input AND gate, Y = ABC;
• for a four-input AND gate, Y = ABCD.

If we interpret the basic definition of OR and AND gates for a negative logic system, we have an
interesting observation. We find that an OR gate in a positive logic system is an AND gate in a negative
logic system. Also, a positive AND is a negative OR.

Example 4.3
Show the logic arrangement for implementing a four-input AND gate using two-input AND gates only.

Solution
Figure 4.9 shows the hardware implementation of a four-input AND gate using two-input AND gates.
The output of AND gate 1 is Y 1 = AB The second AND gate produces an output Y 2 given by
Y 2 = Y 1C = ABC. Similarly, the output of AND gate 3 is Y = Y 2.D = ABCD and hence the
result.

4.3.3 NOT Gate

A NOT gate is a one-input, one-output logic circuit whose output is always the complement of the
input. That is, a LOW input produces a HIGH output, and vice versa. When interpreted for a positive
logic system, a logic ‘0’ at the input produces a logic ‘1’ at the output, and vice versa. It is also known
as a ‘complementing circuit’ or an ‘inverting circuit’. Figure 4.10 shows the circuit symbol and the
truth table.
The NOT operation on a logic variable X is denoted as X or X  . That is, if X is the input to a NOT
circuit, then its output Y is given by Y = X or X  and reads as Y equals NOT X. Thus, if X = 0 Y = 1
and if X = 1 Y = 0.

Example 4.4
For the logic circuit arrangements of Figs 4.11(a) and (b), draw the output waveform.

Solution
In the case of the OR gate arrangement of Fig. 4.11(a), the output will be permanently in logic ‘1’
state as the two inputs can never be in logic ‘0’ state together owing to the presence of the inverter.
In the case of the AND gate arrangement of Fig. 4.11(b), the output will be permanently in logic ‘0’
state as the two inputs can never be in logic ‘1’ state together owing to the presence of the inverter.

A Y1
1 Y2
B 2
C 3 Y= A.B.C.D
D

Figure 4.9 Implementation of a four-input AND gate using two-input AND gates.
 X Y=X

(a)

X Y
X 0 1
Y=X
1 0

(b)

Figure 4.10 (a) Circuit symbol of a NOT circuit and (b) the truth table of a NOT circuit.

(a)

(b)

Figure 4.11 Example 4.4.

4.3.4 EXCLUSIVE-OR Gate

The EXCLUSIVE-OR gate, commonly written as EX-OR gate, is a two-input, one-output gate. Figures
4.12(a) and (b) respectively show the logic symbol and truth table of a two-input EX-OR gate. As can
be seen from the truth table, the output of an EX-OR gate is a logic ‘1’ when the inputs are unlike and
a logic ‘0’ when the inputs are like. Although EX-OR gates are available in integrated circuit form
only as two-input gates, unlike other gates which are available in multiple inputs also, multiple-input
EX-OR logic functions can be implemented using more than one two-input gates. The truth table of
a multiple-input EX-OR function can be expressed as follows. The output of a multiple-input EX-OR
logic function is a logic ‘1’ when the number of 1s in the input sequence is odd and a logic ‘0’ when
the number of 1s in the input sequence is even, including zero. That is, an all 0s input sequence also
produces a logic ‘0’ at the output. Figure 4.12(c) shows the truth table of a four-input EX-OR function.
The output of a two-input EX-OR gate is expressed by

Y = A ⊕ B = AB + AB (4.2)
 A
Y =A + B
B
(a)

A B Y
0 0 0
0 1 1
1 0 1
1 1 0

(b)

A B C D Y
0 0 0 0 0
0 0 0 1 1
0 0 1 0 1
0 0 1 1 0
0 1 0 0 1
0 1 0 1 0
0 1 1 0 0
0 1 1 1 1
1 0 0 0 1
1 0 0 1 0
1 0 1 0 0
1 0 1 1 1
1 1 0 0 0
1 1 0 1 1
1 1 1 0 1
1 1 1 1 0
(c)

Figure 4.12 (a) Circuit symbol of a two-input EXCLUSIVE-OR gate, (b) the truth table of a two-input
EXCLUSIVE-OR gate and (c) the truth table of a four-input EXCLUSIVE-OR gate

Example 4.5
How do you implement three-input and four-input EX-OR logic functions with the help of two-input
EX-OR gates?

Solution
Figures 4.13(a) and (b) show the implementation of a three-input EX-OR logic function and a four-input
EX-OR logic function using two-input logic gates:

• For Fig. 4.13(a), the output Y 1 is given by A ⊕ B. The final output Y is given by Y = Y 1 ⊕ C =
A ⊕ B ⊕ C = A ⊕ B ⊕ C.
• Figure 4.13(b) can be explained on similar lines.
 A
Y1
B Y
C
(a)

A
Y1
Y2
B
C Y
D
(b)

Figure 4.13 (a) Three-input EX-OR gate and (b) a four-input EX-OR gate.

Example 4.6
How can you implement a NOT circuit using a two-input EX-OR gate?

Solution
Refer to the truth table of a two-input EX-OR gate reproduced in Fig. 4.14(a). It is clear from the truth
table that, if one of the inputs of the gate is permanently tied to logic ‘1’ level, then the other input
and output perform the function of a NOT circuit. Figure 4.14(b) shows the implementation.

A B Y
0 0 0
0 1 1
1 0 1
1 1 0

(a)

'1'
Output
Input

(b)

Figure 4.14 Implementation of a NOT circuit using an EX-OR gate.

4.3.5 NAND Gate
NAND stands for NOT AND. An AND gate followed by a NOT circuit makes it a NAND gate [Fig.
4.15(a)]. Figure 4.15(b) shows the circuit symbol of a two-input NAND gate. The truth table of a
NAND gate is obtained from the truth table of an AND gate by complementing the output entries [Fig.
4.15(c)]. The output of a NAND gate is a logic ‘0’ when all its inputs are a logic ‘1’. For all other
input combinations, the output is a logic ‘1’. NAND gate operation is logically expressed as

Y = AB (4.3)

In general, the Boolean expression for a NAND gate with more than two inputs can be written as

Y = ABCD (4.4)

4.3.6 NOR Gate

NOR stands for NOT OR. An OR gate followed by a NOT circuit makes it a NOR gate [Fig. 4.16(a)].
The truth table of a NOR gate is obtained from the truth table of an OR gate by complementing the
output entries. The output of a NOR gate is a logic ‘1’ when all its inputs are logic ‘0’. For all other input
combinations, the output is a logic ‘0’. The output of a two-input NOR gate is logically expressed as

Y = A + B (4.5)

(a)

A
Y=A.B
B

(b)

A B Y
0 0 1
0 1 1
1 0 1
1 1 0

(c)

Figure 4.15 (a) Two-input NAND implementation using an AND gate and a NOT circuit, (b) the circuit symbol
of a two-input NAND gate and (c) the truth table of a two-input NAND gate.
 A A
Y Y=A+B
B B

(a) (b)
A B Y
0 0 1
0 1 0
1 0 0
1 1 0
(c)

Figure 4.16 (a) Two-input NOR implementation using an OR gate and a NOT circuit, (b) the circuit symbol of
a two-input NOR gate and (c) the truth table of a two-input NOR gate.

In general, the Boolean expression for a NOR gate with more than two inputs can be written as

Y = A + B + C + D (4.6)

4.3.7 EXCLUSIVE-NOR Gate

EXCLUSIVE-NOR (commonly written as EX-NOR) means NOT of EX-OR, i.e. the logic gate that
we get by complementing the output of an EX-OR gate. Figure 4.17 shows its circuit symbol along
with its truth table.
The truth table of an EX-NOR gate is obtained from the truth table of an EX-OR gate by
complementing the output entries. Logically,

Y = A ⊕ B = AB + AB (4.7)

A
Y =A + B
B

(a)

A B Y
0 0 1
0 1 0
1 0 0
1 1 1

(b)

Figure 4.17 (a) Circuit symbol of a two-input EXCLUSIVE-NOR gate and (b) the truth table of a two-input
EXCLUSIVE-NOR gate.
The output of a two-input EX-NOR gate is a logic ‘1’ when the inputs are like and a logic ‘0’
when they are unlike. In general, the output of a multiple-input EX-NOR logic function is a logic
‘0’ when the number of 1s in the input sequence is odd and a logic ‘1’ when the number of 1s in the
input sequence is even including zero. That is, an all 0s input sequence also produces a logic ‘1’ at
the output.

4.3.8 INHIBIT Gate

There are many situations in digital circuit design where the passage of a logic signal needs to be
either enabled or inhibited depending upon certain other control inputs. INHIBIT here means that the
gate produces a certain fixed logic level at the output irrespective of changes in the input logic level.
As an illustration, if one of the inputs of a four-input NOR gate is permanently tied to logic ‘1’ level,
then the output will always be at logic ‘0’ level irrespective of the logic status of other inputs. This
gate will behave as a NOR gate only when this control input is at logic ‘0’ level. This is an example of
the INHIBIT function. The INHIBIT function is available in integrated circuit form for an AND gate,
which is basically an AND gate with one of its inputs negated by an inverter. The negated input acts
to inhibit the gate. In other words, the gate will behave like an AND gate only when the negated input
is driven to a logic ‘0’. Figure 4.20 shows the circuit symbol and truth table of a four-input INHIBIT
gate.

'1' '0'

I/P