Confidential Draft

3/4/10
CS43L22
4. APPLICATIONS
4.1 Overview
4.1.1 Basic Architecture
The CS43L22 is a highly integrated, low power, 24-bit audio DAC comprised of a Digital Signal Processing
Engine, headphone amplifiers, a digital PWM modulator and two full-bridge power back-ends. Other fea-
tures include battery level monitoring and compensation and temperature monitoring. The DAC is de-
signed using multi-bit delta-sigma techniques and operates at an oversampling ratio of 128Fs, where Fs
is equal to the system sample rate.

The PWM modulator operates at a fixed frequency of 384 kHz. The power MOSFETs are configured for
either stereo full-bridge or mono parallel full bridge output. The DAC operates in one of four sample rate
speed modes: Quarter, Half, Single and Double. It accepts and is capable of generating serial port clocks
(SCLK, LRCK) derived from an input Master Clock (MCLK).

4.1.2 Line Inputs

4 pairs of stereo analog inputs are provided for applications that require analog passthrough directly to
the HP/Line amplifiers. This analog input portion allows selection from and configuration of multiple com-
binations of these stereo sources.

4.1.3 Line & Headphone Outputs

The analog output portion of the CS43L22 includes a headphone amplifier capable of driving headphone
and line-level loads. An on-chip charge pump creates a negative headphone supply allowing a full-scale
output swing centered around ground. This eliminates the need for large DC-Blocking capacitors and al-
lows the amplifier to deliver more power to headphone loads at lower supply voltages.

4.1.4 Speaker Driver Outputs

The Class D power amplifiers drive 8 Ω (stereo) and 4 Ω (mono) speakers directly, without the need for
an external filter. The power MOSFETS are powered directly from a battery eliminating the efficiency loss
associated with an external regulator. Battery level monitoring and compensation maintains a steady out-
put as battery levels fall. A temperature monitor continually measures the die temperature and registers
when predefined thresholds are exceeded. NOTE: The CS43L22 should only be used in captive speaker
systems where the outputs are permanently tied to the speaker terminals.

4.1.5 Fixed Function DSP Engine

The fixed-function digital signal processing engine processes the PCM serial input data. Independent vol-
ume control, left/right channel swaps, mono mixes, tone control and limiting functions also comprise the
DSP engine.

4.1.6 Beep Generator

The beep generator delivers tones at select frequencies across approximately two octave major scales.
With independent volume control, beeps may be configured to occur continuously, periodically, or at sin-
gle time intervals.

4.1.7 Power Management

Two control registers provide independent power-down control of the DAC, Headphone and Speaker out-
put blocks in the CS43L22 allowing operation in select applications with minimal power consumption.

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4.2 DSP Engine

Fixed Function DSP LIMARATE[7:0]

LIMRRATE[7:0]
MSTAVOL[7:0] LMAX[2:0]
MSTBVOL[7:0] CUSH[2:0]
+12dB/-102dB LIMSRDIS
0.5dB steps LIMZCDIS
LIMIT

Chnl Vol.
Limiter
Settings PWM
Modulator
PCMAMUTE
PCMBMUTE
PCMAVOL[6:0] Peak
PCMBVOL[6:0] Detect
PCM Serial Interface

PCMASWAP[1:0]
+12dB/-51.5dB
PCMBSWAP[1:0]
0.5dB steps

Σ
Bass/
Channel
Demph VOL VOL Treble/
Swap
Control
DEEMPH INV_PCMA
INV_PCMB TC_EN
MSTAMUTE BASS_CF[1:0]
BPVOL[4:0]
MSTBMUTE TREB_CF[1:0] DAC
OFFTIME[2:0] DIGSFT BASS[3:0]
ONTIME[3:0] 0dB/-50dB DIGZC TREB[3:0]
2.0dB steps PLYBCKB=A +12.0dB/-10.5dB
FREQ[3:0]
BEEP[1:0] 1.5dB steps
BEEPMIXDIS Beep VOL
Generator

Figure 5. DSP Engine Signal Flow

Referenced Control Register Location

DSP
DEEMPH ............................. “HP/Speaker De-Emphasis” on page 44
PCMxMUTE ........................ “PCM Channel x Mute” on page 47
PCMxVOL[6:0] .................... “PCM Channel x Volume” on page 47
INV_PCMx........................... “Invert PCM Signal Polarity” on page 43
PCMxSWAP[1:0] ................. “PCM Channel Swap” on page 52
MSTxVOL[7:0]..................... “Master Volume Control” on page 51
MSTxMUTE......................... “Master Playback Mute” on page 43
DIGSFT ............................... “Digital Soft Ramp” on page 44
DIGZC ................................. “Digital Zero Cross” on page 45
PLYBCKB=A........................ “Playback Volume Setting B=A” on page 43
TC_EN................................. “Tone Control Enable” on page 50
BASS_CF[1:0] ..................... “Bass Corner Frequency” on page 50
TREB_CF[1:0] ..................... “Treble Corner Frequency” on page 50
BASS[3:0]............................ “Bass Gain” on page 51
TREB[3:0]............................ “Treble Gain” on page 50
LIMIT ................................... “Peak Detect and Limiter” on page 54
LIMSRDIS ........................... “Limiter Soft Ramp Disable” on page 53
LIMZCDIS............................ “Limiter Zero Cross Disable” on page 54
LMAX[2:0]............................ “Limiter Maximum Threshold” on page 53
CUSH[2:0] ........................... “Limiter Cushion Threshold” on page 53
LIMARATE[7:0].................... “Limiter Attack Rate” on page 55
LIMRRATE[7:0] ................... “Limiter Release Rate” on page 54

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4.2.1 Beep Generator
The Beep Generator generates audio frequencies across approximately two octave major scales. It offers
three modes of operation: Continuous, multiple and single (one-shot) beeps. Sixteen on and eight off
times are available.

Note: The Beep is generated before the limiter and may affect desired limiting performance. If the lim-
iter function is used, it may be required to set the beep volume sufficiently below the threshold to prevent
the peak detect from triggering. Since the master volume control, MSTxVOL[7:0], will affect the beep vol-
ume, DAC volume may alternatively be controlled using the PCMxVOL[6:0] bits.

BEEP[1:0] = CONTINUOUS BEEP: Beep turns on at a configurable frequency (FREQ) and volume (BPVOL) and remains on
'11' until BEEP is cleared.

BEEP[1:0] = MULTI-BEEP: Beep turns on at a configurable frequency (FREQ)

'10' and volume (BPVOL) for the duration of ONTIME and turns off for
the duration of OFFTIME. On and off cycles are repeated until
BEEP is cleared.

BEEP[1:0] = SINGLE-BEEP: Beep turns on at a

'01' configurable frequency (FREQ) and
volume (BPVOL) for the duration of
ONTIME. BEEP must be cleared
and set for additional beeps.

BPVOL[4:0] ...
FREQ[3:0]

ONTIME[3:0] OFFTIME[2:0]

Figure 6. Beep Configuration Options

Referenced Control Register Location

MSTxVOL[7:0]..................... “Master Volume Control: MSTA (Address 20h) & MSTB (Address 21h)” on page 51
PCMxVOL[6:0] .................... “PCMx Volume: PCMA (Address 1Ah) & PCMB (Address 1Bh)” on page 47
OFFTIME[2:0] ..................... “Beep Off Time” on page 48
ONTIME[3:0] ....................... “Beep On Time” on page 48
FREQ[3:0] ........................... “Beep Frequency” on page 47
BEEP[1:0]............................ “Beep Configuration” on page 49
BEEPMIXDIS ...................... “Beep Mix Disable” on page 49
BPVOL[4:0] ......................... “Beep Volume” on page 49

4.2.2 Limiter
When enabled, the limiter monitors the digital input signal before the DAC and PWM modulators, detects
when levels exceed the maximum threshold settings and lowers the master volume at a programmable
attack rate below the maximum threshold. When the input signal level falls below the maximum threshold,
the AOUT volume returns to its original level set in the Master Volume Control register at a programmable
release rate. Attack and release rates are affected by the DAC soft ramp/zero cross settings and sample
rate, Fs. Limiter soft ramp and zero cross dependency may be independently enabled/disabled.

Notes:
1. Recommended settings: Best limiting performance may be realized with the fastest attack and
slowest release setting with soft ramp enabled in the control registers. The MIN bits allow the user to
set a threshold slightly below the maximum threshold for hysteresis control - this cushions the sound
as the limiter attacks and releases.
2. The Limiter maintains the output signal between the CUSH and MAX thresholds. As the digital input
signal level changes, the level-controlled output may not always be the same but will always fall within

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the thresholds.
Referenced Control Register Location
Limiter Controls ................... “Limiter Control 2, Release Rate (Address 28h)” on page 54, “Limiter Attack Rate (Address 29h)” on page 55
Master Volume Control........ “Master Volume Control: MSTA (Address 20h) & MSTB (Address 21h)” on page 51

In p u t

M A X [2 :0 ]

L im ite r
A T T A C K /R E L E A S E S O U N D
C U S H IO N
V o lu m e

O u tp u t
(a fte r L im ite r)
C U S H [2 :0 ]

M A X [2 :0 ]

A R A T E [5 :0 ] R R A T E [5 :0 ]

Figure 7. Peak Detect & Limiter

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4.3 Analog Passthrough
The CS43L22 accommodates analog routing of the analog input signal directly to the headphone amplifiers
by using the PASSTHRUx mux. This feature is useful in applications that utilize an FM tuner where audio
recovered over-the-air must be transmitted to the headphone amplifier directly. This analog passthrough
path reduces power consumption and is immune to modulator switching noise that could interfere with some
tuners.

Four analog input channels can be chosen or summed by using the PASSxSEL bits as shown in Figure 8
to provide input to the CS43L22 when in analog passthrough mode. A pair of passthrough amplifiers can be
used to mute and apply gain to the input signals.

ANLGSFTA
ANLGGZCA
PASSB=A
PASSAMUTE
PASSTHRUA
PASSASEL[4:1] PASSAVOL[7:0]
+12dB/-60dB
0.5 dB steps
DAC A
Output

AIN1A
AIN2A
AIN3A
AIN4A
Σ
ANALOG PASS
Analog Passthru THRU TO
Amplifiers HEADPHONE
AMPLIFIER MUX
AIN4B
AIN3B
AIN2B
AIN1B
Σ
DAC B
Output
ANLGSFTB
PASSBSEL[4:1] ANLGGZCB
PASSB=A
PASSBMUTE PASSTHRUB
PASSBVOL[7:0]
+12dB/-60dB
0.5 dB steps

Figure 8. Analog Passthrough Signal Flow

Referenced Control Register Location

Analog Front End
PASSB=A ............................ “Passthrough Channel B=A Gang Control” on page 42
ANLGSFTx .......................... “Ch. x Analog Soft Ramp” on page 42
ANLGZCx ............................ “Ch. x Analog Zero Cross” on page 42
PASSxSEL4,3,2,1 ................ “Passthrough Input Channel Mapping” on page 42
PASSxMUTE ....................... “Passthrough Mute” on page 44
PASSxVOL[7:0] ................... “Passthrough x Volume” on page 46
PASSTHRUx........................ “Passthrough Analog” on page 44

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