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Lecture 2

This document provides an overview of the EE370A course on digital electronics. It discusses several topics that will be covered, including scaling trends in transistors over time, the evolution of MOSFET designs like FinFETs, Koomey's law on energy efficiency, and hierarchical design approaches. It also previews recent developments in applications, processing engines, biologically-inspired systems, neuromorphic chips, and quantum computing. The goal is to give students context for why this course is important as digital designs continue advancing.

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Saransh Shivhare
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0% found this document useful (0 votes)
40 views16 pages

Lecture 2

This document provides an overview of the EE370A course on digital electronics. It discusses several topics that will be covered, including scaling trends in transistors over time, the evolution of MOSFET designs like FinFETs, Koomey's law on energy efficiency, and hierarchical design approaches. It also previews recent developments in applications, processing engines, biologically-inspired systems, neuromorphic chips, and quantum computing. The goal is to give students context for why this course is important as digital designs continue advancing.

Uploaded by

Saransh Shivhare
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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EE370A: DIGITAL ELECTRONICS

MODULE-1, LECTURE-2
Dr. Shubham Sahay,
Assistant Professor,
Department of Electrical Engineering,
IIT Kanpur
SCALING TRENDS
➢ Scaling: reduce area.
18 months
➢ Large number of transistors per die.
➢ Increase functionality.
➢ Device capacitance reduces.
➢ Switching energy dissipation reduces.
➢ Short channel effects increases.
➢ Static power dissipation increases and
dominates over dynamic counterpart.
➢ Current design power-centric, previously:
area-centric.

Source: Wikipedia

Source: S. Sahay, IITD PhD Thesis, November 2017.


EVOLUTION OF MOSFETS

> 14 nm node 14 nm to 5 nm < 3 nm < 5 nm

Goal: Reduce area, enhance the gate control; integrate as many channels as possible (increase density)
oPlanar: gate on one side
oFinFETs: gate on 3 sides
oGAA and MBC: Gate wrapped around channel
KOOMEY’S LAW
➢ Long live the Moore’s law
➢ And the Moore’s law is dead!
➢ Energy-driven world: Koomey’s law is more fundamental
as it relates energy per computation to time.

Source: Wikipedia
SMART REVOLUTION

“Siri! Why am I still single”

“Siri opens the front camera.”

➢Smart revolution: advancement in transistor technology


oTransistor-Human body analogy
oCell : Transistor :: Body : Smart devices
oBillions of transistors enable your smartphone: small chunk of silicon dictates our lifestyle

5
HIERARCHICAL DESIGN

Human Body ➢ Handcrafting individual transistors becomes impossible


due to large number of transistors.
➢ Divide and conquer approach.
Biological systems ➢ Any digital system is organized in a hierarchical manner.
➢ Entities treated as black box the moment one traverses
Organ up the hierarchy.
➢ Semi-custom design: At each level of abstraction,
Tissue
entities can be re-used.
➢ Need: a library of entities.
Cell
➢ Similar to coding: library of routines/functions which
may be called.
SEMI-CUSTOM DESIGN FLOW
➢ High-level description language (HDL):
Verilog or VHDL for behavioral
description.
➢ Logic synthesis tool converts it to a
gate netlist: gates and
interconnections.
➢ Formulate test case to check
functionality of system: RTL
verification: most popular job in India.
➢ Once functionality is satisfied, plan
where to place these logic gates or
standard cells.
➢ Place the standard cells.
➢ Connect them via interconnect wires.
➢ Check if the system meets
specifications.
➢ If no, optimize the PnR (placement
and routing.
➢ If yes, send it for fabrication in a
format accepted by manufacturers
(foundries) known as GDSII.
➢ Now-a-days automated by dedicated
optimization tools.
7
DIGITAL SYSTEM DESIGN APPROACHES
WHY THIS COURSE??
➢ Reality is too complex.
➢ Library cells and modules are custom designed.
➢ Creating accurate black box models requires in-depth understanding of internal operation.
➢ If design constraints are stringent, design has to be customized.
➢ Abstraction based design may fail.
➢ Scaling exaggerates such failures.
➢ Clock: to order a sequence of events in a circuit.
➢ Ideally, a step function and reaches all modules at the same time.
➢ Power and ground strips are laid throughout the chip.
RECENT DEVELOPMENTS

source: https://data-flair.training/blogs/big-data-
applications/

source: https://www.rooksecurity.com/building-
security-into-iot-development/

source: NVIDIA
Source: ESSEC business school
SHIFT IN APPLICATIONS

source: IBM flash


memory summit

➢Are Memory and storage two different entities?


ADVANCED PROCESSING ENGINES
• Von-Neumann architecture: memory and processor are
separate blocks.
• Memory access: increases delay + energy dissipation

Google TPU (2017)


Nvidia Turing (2018) 92 TMAC/s @ 40
8.1 TMAC/s @ 36 watts
watts

Von-Neumann Architecture Custom Digital Architecture

DRAM

Memory Processor Local Buffer • Human brain: memory and (analog) processing at the same
ALU ALU ALU ALU time.
• 100 billion neurons.
ALU ALU ALU ALU • 100-1000 synapses: 100 trillion synapses in 2 litre space.
BUS • Consumes only 20 W power.
ALU ALU ALU ALU
Large data transfer Cost! • Real-time processing even with ionic conduction
mechanism.
• Neuromorphic: inspired from brain.
BIOLOGICALLY PLAUSIBLE SYSTEMS

Inputs: Voltage,
Weights: conductance,
inputs Synaptic weights
𝑥1 𝑤𝑖1 Current: weighted sum
𝑥2 𝑤𝑖2
𝑥3 𝑤𝑖3 𝑦𝑖 Neuron
𝑤𝑖4
𝑥4 𝑤𝑖5 𝑛 ➢ Ohm’s law: multiplication
𝑥5 𝑦𝑖 = ෍ 𝑥𝑖 ∙ 𝑤𝑖𝑗 ➢ Kirchoff’s law: addition.
𝑗=1 ➢ Non-von Neumann architecture
➢ No efficient adjustable cross-point device- Until Recently. 14
A PEEK INTO THE FUTURE: NEUROMORPHIC ICS
➢ CMOS neuromorphic processors

Intel Loihi IMEC-GF


➢ Hybrid CMOS-NVM based inference accelerators

UCSB UMich True North HP DPE

➢ CNT-NVM based computing primitives

15
Stanford’s HD computing
QUANTUM COMPUTING
➢ Works with quantum bits or qubits.
➢ Unlike digital bits, qubits follow principle of superposition.
➢ Allows them to remain in two states at the same time.
➢ Similar to calling heads or tails in a spinning coin.
➢ Qubits perform several calculations at once due to superposition and best suited to solving optimization problems.
➢ Doesn’t work well with classical algorithms like simulated annealing.
➢ QC requires development of dedicated quantum algorithms.
➢ Quantum entanglement allows qubits to link together and perform even complex functions.
➢ Qubits are stable at ultra-low temperatures (sub-millikelvin).
➢ Cooling requires huge power.

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