SSI Gates Familiarization

(IC Package Pin Configuration. Input and Output Logic Levels of a Gate. )
Experiment 1

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Group No. 6

Name Signature
DELEMOS JOSHUA______ _________________________
DELOS SANTOS REGINE_____________________________________
DELOS REYES JOHN PAULO__________________________________
DESPOLON JULIUS_________________________________________
DE VERA MARC LOUISE______________________________________

Date Performed: __November 29, 2021

Date Submitted: ________________

__FELIXBERTO CORTES_JR._
Professor, LCST Lab

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EXPERIMENT

1 (IC Package Pin Configuration. Input and Output Logic Levels of a Gate. )
Experiment 1

Objectives

1. To identify the input and output terminals of a gate in an IC package.

2. To identify the supply terminals of SSI IC.
3. To determine the state of input and output terminals of SSI gates using Logic
Probe.

Basic Information
 Some TTL circuits as shown in Figure 1-1. Each IC is enclosed within a 14- or 16- pin
package. A notch placed on the left side of the package is used as reference for the pin
numbers. The pins are numbered along the two sides starting from the notch and continuing
counterclockwise. The inputs and outputs of the gates are connected to the package pins.

 The TTL IC’s are distinguished by their numerical designation, e.g., the 5400 and 7400
series. The former has a wide temperature range and is suitable for military use, while the
latter has a narrower temperature range and is suitable for commercial use. The numerical
designation of the 7400 series means that the IC packages are numbered as 7400, 7401, 7402,
etc.

 The TTL logic family actually consists of several subfamilies or series. Table 1-1. lists the
name of each series and the prefix designation that identifies the IC as being part of that
series. ICs that are part of the standard TTL have an identification number that starts with
74. Likewise, ICs that are part of the high-speed TTL series have an identification number
that starts with 74H; ICs in the Schottky TTL series starts with 74S; and similarly for the
other series.

 The differences between the various TTL series are in their electrical characteristics, e.g.,
power dissipation, propagation delay, and switching speed. They do not differ in pin
assignment nor on the logic operation performed by the internal circuits. For example, all the
ICs listed in Table 1-1 with an 86 number, no matter what the prefix, contain four exclusive–
OR gates with the same pin assignment in each package.

Table 1–1 Various Series of the TTL Logic Family

TTL Series Prefix Example
Standard TTL 74 7486
High-Speed TTL 74H 74H86
Low-Power TTL 74L 74L86
Schottky TTL 74S 74S86
Low-Power Schottky TTL 74LS 74LS86
Advanced Schottky TTL 74AS 74AS86
Advanced Low-Power Schottky TTL 74ALS 74ALS86

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 Figure 1–1 Some typical integrated-circuit gates

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Materials

1 Logic Probe 1 Breadboard

1 Power supply 1 Cutter pliers
1 Long nose pliers Connecting wires

Integrated Circuit (IC)

1 74LS00 1 74LS02
1 74LS04 1 74LS08
1 74LS32 1 74LS86

Procedure

1. Examine the ICs supplied to you. The number is printed on the surface of each IC.

74LS00 74LS02
74LS04 74LS08
74LS32 74LS86

2. Wire the 74LS00 as shown in Figure 1–2. Set the power supply to 5V and connect it to your
circuit.

3. Using the logic probe, test the status condition or logic level at the input and output terminals
of each gate in the IC. Record the logic values in the corresponding tables.

4. Remove the IC mounted on the breadboard and replace it with another IC.

5. Repeat step 3. for each of the other IC’s.

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 5V

Power
Supply

14 13 12 11 10 9 8
V CC

GND
1 2 3 4 5 6 7 connection for
logic probe

Figure 1–2 Experimental Set-up

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 DATA and RESULTS

Table 1–2 Test Results for 74LS00 IC

Input Terminals Output Terminals
Pin No. Logic Indication Pin No. Logic Indication
1 1 3 0
2 1 6 1
4 1 8 1
5 0 11 1
9 0
10 1
12 0
13 0

Table 1–3 Test Results for 74LS02 IC

Input Terminals Output Terminals
Pin No. Logic Indication Pin No. Logic Indication
2 1 1 0
3 1 4 0
5 1 10 0
6 0 13 1
8 0
9 1
11 0
12 0

Table 1–4 Test results for 74LS04 IC

Input Terminals Output Terminals
Pin No. Logic Indication Pin No. Logic Indication
1 1 2 0
3 1 4 0
5 1 6 0

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 9 0 8 1
11 0 10 1
13 0 12 1

Table 1–5 Test Results for 74LS08 IC

Input Terminals Output Terminals
Pin No. Logic Indication Pin No. Logic Indication
1 1 3 1
2 1 6 0
Table 1–6 Test Results
4 1 8 0
for 74LS32 IC
5 0 11 0
9 0
10 1
12 0
13 0
Input Terminals Output Terminals
Pin No. Logic Indication Pin No. Logic Indication
1 1 3 1
2 1 6 1
4 1 8 1
5 0 11 0
9 0
10 1
12 0
13 0

Table 1–7 Test Results for 74LS86 IC

Input Terminals Output Terminals
Pin No. Logic Indication Pin No. Logic Indication
1 1 3 0
2 1 6 1
4 1 8 1
5 0 11 0
9 0
10 1
12 0

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Questions

1. What is the logical equivalent of the “hang” input? ___________

—> logic 1 a HIGH

2. Identify the following ICs with the same pin configuration.

—> Among the IC’s available in the experiment;74LS08, 74LS00, 74LS32,
and 74LS86 have the same pin configuration

3. Describe the pin configurations of 74LS02 and 74LS04 ICs.

—> the pin configuration of the IC 746502 has a different set of

input and output terminals in comparison to the other IC’s. The IC
746504 has input terminals that are odd number pin terminals and
output terminals that are even numbers (exuding I and I as they are for
VCC and GND)

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ANALYSIS and CONCLUSION:

Conclusion:
—> the 74LS32 is called an OR GATE, The output shows that any input that
is added by 1 or high will be 1 and 0 or low is only shown if both inputs are
low.
The 74LS02 is the NOR gate, which is opposite of the OR GATE.
—>The 7465

LS028 is called an AND GATE, the output shows that any input that is
multiplied by 0 or low will be 0 and 1 or high is only shown if both inputs are high.
The 74LS00 is the NHND GATE, which is opposite of the AND GATE.
—>The 74LS05 is an INVERTER gate, the output will show the opposite of the
input. If the input is low the output will be high and vice versa.
—>Lastly, 74LS86 is called the XOR gate (exclusive, OR Gate) where the output
will only show high if one of the input is high and the output will provide low if
both input are either high or low
—>This information shows how the outputs that we have measured are valid for
the truth table for each gate. Each gate has its own function and each function can
be proven by calculating each logical outcome for each gate.

Analysis:
In this experiment, power consumption plays an important role in the
present day. Power and performance are always traded off to meet the system
requirements. Now we are tasked to test each pins of the integrated circuits on the
table. Using the table we can identify the pins configuration of the IC. High power
is equal to one and the low power is approaching zero.

—> to start with, we begin in the first table using the data per 74LS00 (NAND
Gate) IGS. The input terminals pin no 1,2,4, 5, 9, 10, 12, 13 has no high indication
in their logic levels while its pins no. 3, 6, 8, U Shows low light indication in their
logic level . The next one is table 2. using the data for 74LS02 IC (NOR GATE),
The terminal pin no. 2,3,5,6,8,9,11,12 have no light indicated in their logic level
with the pins no. 1,3,5,9,11,13 have no light indication in their logic
level. In table 3, using the data for 74LS04 IC (INVERTER) the pins no.
1,3,5,9,11,13 have no light indication, while the pins no. 2,4,6,8,10,12 shows low
light indication in their logic level. In data for 74LS08 IC (AND GATE) the pins
no. 1,2,4,5,9,10,12,13 have no light indicated in their logic level. In the 74LS32 IC
(OR GATE) the data shows the pins 3,6,8,11 show high light indication. In the
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data for 746568 IC (XOR GATE, the pins 1,2,4,5,9,10,12,13 have no light
indication in their logic level.

—> Using the data we gathered it can be observed that the 74LS00 IC and the
746508 have the same pins that don't have light indication in their logic level. And
they also have the same pins number that shows light indicatton but have opposite
logic indication which tells that the two gates are opposites to each other. The same
for 74LS02 and 74LS32 or the NOR GATE and OR GATE . But in the Palls
D474LS04 IC or which is the INVERTER has a different number of pins that have
no light and light indication. It means that the inverter has only one input and one
output.

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 Truth Table Derivation
( Truth Table Construction. Operating Condition of an IC. )
Experiment 2

LCST Lab SCORE

Group No. 6

Name Signature

DELEMOS JOSHUA______ ________________________

DELOS SANTOS REGINE_____________________________________
DELOS REYES JOHN PAULO__________________________________
DESPOLON JULIUS_________________________________________
DE VERA MARC LOUISE______________________________________

Date Performed: _November 29, 2021___

Date Submitted: __________________

__FELIXBERTO CORTES_JR._
Professor, LCST Lab

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EXPERIMENT

2 Truth Table Derivation

( Truth Table Construction. Operating Condition of an IC. )
Experiment 2

OBJECTIVES

1. To demonstrate the derivation of the truth table for SSI gates.

2. o determine whether the IC under test is still in its operating condition or not.

Basic Information
 A truth table defines a logic operation by a list of the output of the operation against all the
possible input combinations. For example, the truth tables for the operations AND and OR,
assuming input variables X and Y, are obtained by listing the values of the output of the
operation for each possible X-Y combination. The results of the operation are then tabulated
having one row for each possible input-output combination.

 The truth tables for AND and OR are shown below. These tables clearly demonstrate the
definition of the operations.

AND OR
X Y X•Y X Y X+Y
0 0 0 0 0 0
0 1 0 0 1 1
1 0 0 1 0 1
1 1 1 1 1 1

Materials
1 Logic Probe 1 Breadboard
1 Power supply 1 Wire Stripper
1 Long nose pliers Connecting wires
1 IC Puller

Integrated Circuits ( IC )

1 74LS00 1 74LS02
1 74LS04 1 74LS08
1 74LS32 1 74LS86

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Procedure
1. Check the ICs supplied to you by applying the test procedures in Expt. 1.

2. If any of the ICs do not tally with the test results obtained in Expt. 1, call the attention of
the Laboratory Instructor for immediate replacement of the defective ICs.

3. Wire the 74LS00 as shown in Figure 2–3. Adjust the power supply to 5V.

4. Choose any one of the gates in the IC package. Test its output indication using the logic
probe by applying input values as indicated in the 74LS00 table. Record the output
indication onto the corresponding table.

5. Repeat steps 3. and 4. for each of the following ICs:

74LS02 74LS04
74LS08 74LS32
74LS86

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 5V

Power
Supply

14 13 12 11 10 9 8
V CC

GND
1 2 3 4 5 6 7 connection for
A B F logic probe

Figure 2–3 Experimental circuit connection.

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 DATA and RESULTS

74LS00 74LS02
Input Output Input Output
A B F A B F
0 0 1 0 0 1
0 1 1 0 1 0
1 0 1 1 0 0
1 1 0 1 1 0

74LS04 74LS08
Input Output Input Output
A F A B F
0 1 0 0 0
1 0 0 1 0
1 0 0
1 1 1

74LS32 74LS86
Input Output Input Output
A B F A B F
0 0 0 0 0 0
0 1 1 0 1 1
1 0 1 1 0 1
1 1 1 1 1 0

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Questions

Referring to the tables, write the logical statements that suitably describe the
function table of each of the following gates:

4. AND Gate
-A HIGH output (1) results only if all the inputs to the AND gate are HIGH (1).

5. OR Gate
-OR gate is an electronic circuit that gives a high output (1) if one or more of its
inputs are high or 1.

6. Inverter
-Is to invert the direct current (DC) output into alternating current (AC).

7. NAND Gate
-produces an output 1 result only if one or more of its inputs are 0 or low

8. NOR Gate
-A NOR gate is a logic gate which gives a 1 output only when both inputs are
0.

9. XOR Gate
-produce a 0 result when both inputs match or both 1 and 0.

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ANALYSIS and CONCLUSION:

We analyzed that completing the truth table from the given inputs value we can make a logic
circuitof it. In table 1, we used the INVERTER (NOT), OR and NOR gates. We used their IC’s
number and connect the wires based on the truth table and logic circuit. The INVERTER is the
reverse ofthe input value, the OR gate is the sum of inputs value. If the inputs have 1 value all
the outputs would be one. The NOR gate is the reverse output of the OR gate. And the NAND
gate is the reverse of the output of AND gate.

In table 2, we used the INVERTER (NOT), OR and NOR. The output of an XNOR gate is
true when all of its inputs are true or when all of its inputs are false. If some of its inputs are true
and others are false, then the output of the XNOR gate is false. The truth table for an XNOR gate
with two inputs appears to the right. We therfore conclude that the truth table gives the
breakdown of the logical function by listing all the values that the function will attain. The truth
table of logic gates gives us all the information about the combination of inputs and their
corresponding output for the logic operation.

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 Interconnection of Basic Logic Gates
( Truth Table of the Resulting Circuit. Equivalent Basic Gate. )
Experiment 3

LCST Lab SCORE

Group No. 6

Name Signature

DELEMOS JOSHUA______ ________________________

DELOS SANTOS REGINE_____________________________________
DELOS REYES JOHN PAULO__________________________________
DESPOLON JULIUS_________________________________________
DE VERA MARC LOUISE______________________________________

Date Performed: _November 29, 2021_____

Date Submitted: __________________

__FELIXBERTO CORTES JR._

Professor, LCST Lab

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EXPERIMENT

3 Interconnection of Basic Logic Gates

( Truth Table of the Resulting Circuit. Equivalent Basic Gate. )
Experiment 3

OBJECTIVES

1. To interconnect a gate with other gate/s.

2. To experimentally verify the output signal of the resulting circuit.
3. To compare the certain gate combinations with existing basic gates.

Basic Information
 Combining or interconnecting logic gates forms a logic circuit. A logic circuit is an
electronic circuit that processes information by performing logical operations on it. In logic
circuits, there are only two possible levels for the input and output signals: HIGH and LOW,
numerically represented by the binary digits 1 and 0, respectively.

 The output signal, using binary notation, is controlled by the logic circuit in accordance with
the input system. The basic logic gates are the AND, the OR and the Inverter (NOT) circuits.
The AND circuit yields a binary 1 output only if a binary 1 is present on each of the input
terminals, otherwise the output is a binary 0. The OR circuit yields a binary 1 output if a
binary 1 is present on at least one of the input terminals. The NOT circuit yields the
complement/inverse of the input signal, i.e., producing a binary 1 output for a binary 0 input,
and vice versa. Often, certain combinations of logic gates are commonly used, e.g., a NAND
circuit consists of NOT + AND circuits, and a NOR for NOT + OR.

Materials
1 Logic Probe 1 Breadboard
1 Power supply 1 Cutter pliers
1 Long nose pliers Connecting Wires

Integrated Circuit (IC)

1 74LS04 1 74LS08
1 74LS32 1 74LS00
1 74LS02

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Procedure

1. Test the logic level of each IC supplied and report any damage to the Laboratory Officer for
immediate replacement.

2. Connect the circuit as in Figure 3–4b. Adjust the power to 5V and connect it to your circuit.

3. Test the output signal as data are applied to the input terminal/s. Record the levels of the
logic signals in Table 3–8.

4. For the following circuits in Figure 3–4b to Figure 3–8, repeat steps 2. and 3.. Record the
data into the corresponding sections of the table.

A F A F
(a) (b)

Figure 3–4

A
F
B

Figure 3–5

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 A
F
B

Figure 3–6

A
B
F

Figure 3–7

A
B
F

Figure 3–8
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 DATA and RESULTS

Table 3–8
A F
A NAND gate with input 0 1
Figure 3–4a
terminals short-circuited
1 0
A F
A NOR gate with input terminals 0 1
Figure 3–4b
short-circuited
1 0
A B F
0 0 1
An AND gate with input
Figure 3–5 terminals inverted (Bubbled 0 1 0
AND) 1 0 0
1 1 0
A B F
0 0 1
An OR gate with input terminals 0 1 1
Figure 3–6
inverted (Bubbled OR)
1 0 1
1 1 0
A B F
0 0 0
A combination of INVERTER, 0 1 1
Figure 3–7
AND, and OR gates
1 0 1
1 1 0
A B F
0 0 1
A combination of INVERTER, 0 1 0
Figure 3–8
AND, and OR gates
1 0 0
1 1 1

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Questions

1.Explain, in your own words, the procedures for experimentally deriving the truth table

In performing the experiment. We find out that on theoretical reasoning it derives or

invented on the actual logic circuit by making the logic gates in their corresponding
value.
2. On the next page provided, construct the theoretical truth tables of the circuits in Figure 
3–4a to Figure 3–8. Compare these with the “actual” truth tables, i.e., those obtained
experimentally. Explain any discrepancies.

Figure 3-4a. NOT GATE

INPUT OUTPUT
0 1
1 0

Figure 3-ba. AND GATE

INPUT OUTPUT
0 0
1 0

Figure 3-5 NOR GATE

INPUT (A) INPUT (B) OUTPUT
0 0 1
0 1 0
1 0 0
1 1 0

Figure 3-6 NAND GATE

INPUT (A) INPUT (B) OUTPUT
0 0 1
0 1 1
1 0 1
1 1 0

Figure 3-7 XOR GATE

INPUT (A) INPUT (B) OUTPUT
0 0 0
0 1 1
1 0 1
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 1 1 0

Figure 3-8 XNOR GATE

INPUT (A) INPUT (B) OUTPUT
0 0 1
0 1 0
1 0 0
1 1 1

3. Referring to data table, identify the corresponding basic gate equivalent of each of the
experimental circuits.

Figure Equivalent Gate

Figure 3–4a NOT GATE
Figure 3–4b NOT GATE
Figure 3–5 NOR GATE
Figure 3–6 NAND GATE
Figure 3–7 XOR GATE
Figure 3–8 XNOR GATE

4. Design an Exclusive NOR gate using NOR gates only.

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ANALYSIS and CONCLUSION:

In analysis in performing this experiment it shows more significant difference in terms

of making logic circuit. In many pieces or material that we need to use in the application of
any devices, we find out that through the simplification it easily to manage the circuit and it
is not time consuming and lot of great impacts or beneficial for us designer.

We conclude that complex logic circuit has a simple and precise equivalent circuit that
we need to be able to use for economic reason and other aspect.

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DOCUMENTATION:

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